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//Ripple Counter module ripplecount(clk,rst,count); input clk,rst; output [3:0]count; wire [3:0]count; tff1 a1(rst,clk,count[0]); tff1 a2(rst,~count[0],count[1]); tff1

a3(rst,~count[1],count[2]); tff1 a4(rst,~count[2],count[3]); endmodule

//T FLIP FLOP // T Flip Flop module tff1(rst,clk,q); input clk,rst; output q; reg q; always@(posedge clk) begin if(rst) q<=0; else q<=~q; end endmodule