YEDITEPE UNIVERSITY DEPARTMENT OF COMPUTER ENGINEERING

SEMINAR
Sharing of SRAM Tables among NPN Equivalent LUTs
Assoc. Prof. Dr. Fatih Koan Istanbul Sabahattin Zaim University
4th April 2013 Engineering Building A-412 15:00-16:00

Abstract
In this talk, we introduce a novel lookup table (LUT) and its usage in the congurable logic block (CLB) architectures for SRAM-based eldprogrammable gate array (FPGA) architectures. The proposed CLB allows sharing of SRAM tables of LUTs among NPN-equivalent functions to reduce the size of memories used for storing the functions and also reduces the number of conguration bits required. We measured many different characteristics of FPGAs using our new CLB architecture, including area, delay, routing, and power requirements. We have experimented with MCNC benchmarks and reported the results.

-----------------------------------------------------------------------------------------*Fatih Kocan received the B.S. degree in computer science and engineering from Hacettepe University, Ankara, Turkey, and the M.Sc. and Ph.D. degrees in databases and VLSI/CAD, respectively, from Case Western Reserve University, Cleveland, OH. He is currently an Associate Professor at Istanbul Sabahattin Zaim University. In the past, he worked for Gebze Institute of Technology, Southern Methodist University (Dallas,TX), Istanbul Kemerburgaz University and Umm ul Qura University (KSA). His research interests include reconfigurable computing, FPGA/CAD, and algorithms.