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Roberts Discrete VGA ATI M92LP-S2 Schematics Document uFCPGA Mobile Penryn Intel PM45 + ICH9M
C C

2009-05-19 REV :-1


B B

DY : Nopop Component

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

Cover Page
Size Document Number Custom Rev

hexainf@hotmail.com GRATIS - FOR FREE


5

Roberts Discrete
Sheet
1

-1
of 60

Date: Tuesday, May 19, 2009


4 3 2

Roberts Discrete Block Diagram


Clock Generator SLG8SP513VTR
D

CPU DC/DC
ISL6266A
INPUTS
+PWR_SRC +VCC_CORE
28,29 39,40

OUTPUTS

19

Intel Mobile CPU Penryn


Socket P
VRAM 32Mx32bx2 (256MB) 4
55 4,5,6

Project code : 91.4AQ01.001 PCB P/N : 48.4AQ12.011 Revision : 08224-1

SYSTEM DC/DC
TPS51117
INPUTS
+PWR_SRC
43 30

OUTPUTS
+1.05V_VCCP
D

SYSTEM DC/DC
MAX17020
41 27

FSB 800/1066MHz

INPUTS
+PWR_SRC

OUTPUTS
+5V_ALW2 +3.3V_RTC_LDO +5V_ALW +3.3V_ALW

GDDR3 700MHz CRT (on I/Oboard) 48 LCD


20
C

RGB CRT

Intel PM45
PCIe x 16 AGTL+ CPU I/F DDR Memory I/F External Graphics
7,8,9,10,11,12

SYSTEM DC/DC
DDRII 667/800 Channel A

DDRII 667/800 DDRII 667/800

Slot 0
17

TPS51116
INPUTS
Power SW
+PWR_SRC
25

44

31

OUTPUTS
+1.8V_SUS +0.9V_DDR_VTT +V_DDR_MCH_REF

ATI M92LP-S2
LVDS(Dual Channel)
51,52,53,54

DDR II 667/800 Channel B

Slot 1
18

G577BR91U

SYSTEM DC/DC
APL5912
42
C

32

PCIE x 1 & USB 2.0 x 1

New Card

25

INPUTS
+1.8V_SUS

OUTPUTS
+1.5V_RUN +1.1V_RUN

DMIx4

C-LINK

PCIE x 1

10/100 NIC
I/O Board Connector
Marvell 88E8040
38

RJ45 CONN
+PWR_SRC
48

VGA
TPS51117
INPUTS
50 33

OUTPUTS
+VCC_CORE_RUN

CardReader
SD/SDIO/MMC MS/MS Pro/xD 26 Realtek RTS5159
32

Intel
USB2.0

USB 2.0 x 2

PCIE

Left Side: USB x 2

MAXIM CHARGER
PCIE x 1& USB 2.0 x 1

ICH9-M
USB 2.0/1.1 ports (12) PCI Express ports (6) High Definition Audio USB 2.0

Mini-Card
802.11a/b/g
26

26

MAX8731A
+DC_IN +PWR_SRC +PBATT

45

INPUTS

OUTPUTS

USB 2.0 x 1

Digital Mic Array MIC IN


Internal Analog MIC

Azalia CODEC
IDT 92HD71B7
36

SATA ports (4) AZALIA LPC I/F ACPI 1.1 PCI/PCI BRIDGE
13,14,15,16

CAMERA (Option) Bluetooth

25

SYSTEM DC/DC
LDO
INPUTS
26 +5V_ALW 34
B

OUTPUTS
+5V_RUN +3.3V_RUN +1.8V_RUN
26

USB 2.0 x 1

25

+3.3V_ALW

LPC Bus
USB 2.0 x 1

+1.8V_SUS

Right Side: USB x 1

31

PCB LAYER
L1: L2: L3: L4: L5: L6: L7: L8: Top GND Signal Signal VCC Signal GND Bottom
A

SATA

HP1

SATA

KBC
SPI

OP AMP
MAX9789C
37

WINBOND
WPCE773L
29

2CH SPEAKER HDD


23

ODD
23

Flash ROM 2MB


30

Touch PAD
33

Int. KB
33

Thermal
EMC2102
25 35

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

Block Diagram
Document Number Rev

Fan
23
5 4 3 2

Size

A3

Roberts Discrete
Sheet
1

-1
of 60

Date: Tuesday, May 19, 2009

ICH9M Functional Strap Definitions


Signal
HDA_SDOUT

ICH9 Integrated pull-up and pull-down Resistors


ICH9 EDS 642879 Rev.1.5

Cantiga chipset and ICH9M I/O controller Hub strapping configuration


Montevina Platform Design guide 22339 Rev.0.5
Pin Name
CFG[2:0]

Usage/When Sampled

ICH9 EDS 642879 Comment

Rev.1.5

SIGNAL
CL_CLK[1:0] CL_DATA[1:0] CL_RST0# DPRSLPVR/GPIO16 ENERGY_DETECT HDA_BIT_CLK HDA_DOCK_EN#/GPIO33 HDA_RST# HDA_SDIN[3:0] HDA_SDOUT HDA_SYNC GLAN_DOCK#

Resistor Type/Value
PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-DOWN 20K PULL-DOWN 20K PULL-DOWN 20K
The pull-up or pull-down active when configured for native GLAN_DOCK# functionality and determined by LAN controller.

Strap Description

Configuration

Allows entrance to XOR Chain testing when TP3 XOR Chain Entrance/ PCIE Port Config1 bit1, pulled low. When TP3 not pulled low at rising edge of PWROK, sets bit1 of RPC.PC (Cofig Registers: Rising Edge of PWROK. offset 224h). This signal has weak internal pull-down. PCIE config1 bit0, Rising Edge of PWROK. PCIE config2 bit2, Rising Edge of PWROK. Reserved. This signal has a weak internal pull-down. Sets bit0 of PRC.PC (Config Registers: Offset 224h). This signal has a weak internal pull-up. Sets bit2 of PRC.PC2 (Config Registers: Offset 224h). This signal should not be pulled high.

FSB Frequency Select 000 = FSB1067 011 = FSB667 010 = FSB800 others = Reserved

HDA_SYNC

Reserved CFG[4:3] CFG8 CFG[15:14] CFG[18:17] CFG5 CFG6 CFG7 DMI x2 Select iTPM Host Interface Intel Management engine crypto strap PCIE Graphics Lane 0 = DMI x2 1 = DMI x4 (Default) 0 = The iTPM Host Interface is enabled (Note 2) 1 = The iTPM Host Interface is disabled (default) 0 = Transport Layer Security (TLS) cipher suite with no confidentiality 1 = TLS cipher suite with confidentiality(Default) 0 = Reserved Lanes, 15->0, 14->1 ect.. 1 = Normal operation (Default): Lane Numbered in Order

GNT2#/ GPIO53 GPIO20 GNT1#/ GPIO51 GNT3#/ GPIO55

ESI Strap (Server Only) ESI compatible mode is for server platforms only. Rising Edge of PWROK. This signal should not be pulled low for desktop and mobile. Top-Block Swap override. Rising Edge of PWROK. Sampled low: Top-Block Swap mode (inverts A16 for all cycles targeting FWH BIOS space). Note: Software will not be able to clear the Top-Swap bit until the system is rebooted without GNT3# being pulled down. Controllable via Boot BIOS Destination bit (Config Registers: Offset 3410h:bit 11:10). GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC

CFG9

CFG10

PCIE Loopback enable 0 = Enable (Note 3) 1 = Disable (Default) 00 10 01 11 = = = = Reserve XOR mode Enabled ALLZ mode Enable (Note 3) Disabled (Default)

CFG[13:12] XOR/ALL

GNT[3:0]#/GPIO[55,53,51]

PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 15K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-UP 20K PULL-DOWN 15K
CFG20 CFG16 CFG19 FSB Dynamic ODT DMI Lane Reversal

GNT0#: SPI_CS1#/ GPIO58 SPI_MOSI

Boot BIOS Destination Selection 0:1. Rising Edge of PWROK.

GPIO20 GPIO49 LDA[3:0]#/FHW[3:0]# LAN_RXD[2:0] LDRQ[0] LDRQ[1]/GPIO23 PME# PWRBTN# SATALED#


SPI_CS1#/GPIO58/CLGPIO6

0 = Dynamic ODT Disabled 1 = Dynamic ODT Enabled (Default) 0 = Normal operation (Default): Lane Numbered in Order 1 = Reverse Lanes DMI x4 mode [MCH->ICH]: (3->0, 2->1, 1->2 and 0->3) DMI x2 mode [MCH->ICH]: (3->0, 2->1)

Integrated TPM Enable, Sample low: the Integrated TPM will be disable. Rising Edge of CLPWROK. Sample high: the MCH TPM enable strap is sampled low and the TPM Disable bit is clear, the Integrated TPM will be enable. DMI Termination Voltage. Rising Edge of CLPWROK. PCI Express Lane Reversal. Rising Edge of PWROK. No Reboot. Rising Edge of PWROK. The signal is required to be low for desktop applications and required to be high for mobile applications. Signal has weak internal pull-up. Sets bit 27 of MPC.LR (Device 28: Function 0:Offset D8). If sampled high, the system is strapped to the "No Reboot" mode (ICH9 will disable the TCO Timer system reboot feature). The status is readable via the NO REBOOT bit. This signal should not be pull low unless using XOR Chain testing. Sampled low: the Flash Descriptor Security will be overridden. If high, the security measures will be in effect. This should only be enabled in manufacturing environments using an external pull-up resister.

GPIO49

Digital Display Port 0 = Only Digital Display Port or PCIE is operational (Default) (SDVO/DP/iHDMI) and PCIe are Concurrent with PCIe 1 = Digital display Port the PEG port operating simulataneously via 0 = No SDVO Card Present (Default) 1 = SDVO Card Present 0 = LFP Disabled (Default) 1 = LFP Card Present; PCIE disabled

SATALED#

SDVO SDVO Present _CTRLDATA L_DDC_DATA Local Flat Panel (LFP) Present NOTE:

SPI_MOSI SPI_MISO SPKR TACH_[3:0] TP[3] USB[11:0][P,N]

SPKR

TP3 GPIO33/ HDA_DOCK _EN#

XOR Chain Entrance. Rising Edge of PWROK. Flash Descriptor Security Override Strap. Rising Edge of PWROK.

1. All strap signals are sampled with respect to the leading edge of the (G)MCH Power OK (PWROK) signal. 2. iTPM can be disabled by a 'Soft-Strap' option in the Flash-decriptor section of the Firmware. This 'Soft-Strap' is activated only after enabling iTPM via CFG6. Only one of the CFG10/CFG12/CFG13 straps can be enabled at any time.

PCIE Routing
LANE2 LANE3 LANE5 MiniCard WLAN LAN New Card

USB Table
USB
Pair 0 1 2 3 4 5 6 7 8 9 10 11 Device USB1 USB2 USB3 RESERVED MINI CARD RESERVED BLUETOOTH NEW CARD RESERVED RESERVED Card Reader CAMERA

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

Table of Content
Size Document Number Custom Rev

hexainf@hotmail.com GRATIS - FOR FREE

Roberts Discrete
Sheet 3 of 60

-1

Date: Tuesday, May 19, 2009

SSID = CPU
U41A 1 OF 4 7 H_A#[35..3] H_A#[35..3] H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 7 H_ADSTB#0 7 H_REQ#[4..0] J4 L5 L4 K5 M3 N2 J1 N3 P5 P2 L2 P4 P1 R1 M1 A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# ADSTB0# REQ0# REQ1# REQ2# REQ3# REQ4# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# A32# A33# A34# A35# ADSTB1# A20M# FERR# IGNNE# STPCLK# LINT0 LINT1 SMI# ADS# BNR# BPRI# H1 E2 G5 H5 F21 E1 F1 D20 CPU_IERR# B3 H4 C1 F3 F4 G3 G2 G6 E4 AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20 ITP_BPM#0 ITP_BPM#1 ITP_BPM#2 ITP_BPM#3 ITP_BPM#4 ITP_BPM#5 ITP_TCK ITP_TDI ITP_TDO ITP_TMS ITP_TRST# ITP_DBRESET# R50 R51 D21 A24 B25 C7 R76 1 1 1 H_CPURST# H_RS#0 H_RS#1 H_RS#2 R47 1 H_ADS# 7 H_BNR# 7 H_BPRI# 7 H_DEFER# 7 H_DRDY# 7 H_DBSY# 7 H_BREQ#0 7 2 56R2J-4-GP H_INIT# 14 +1.05V_VCCP

ADDR GROUP 0 ADDR GROUP 0

CONTROL

DEFER# DRDY# DBSY# BR0# IERR# INIT# LOCK# RESET# RS0# RS1# RS2# TRDY# HIT# HITM#

H_REQ#0 K3 H_REQ#1 H2 H_REQ#2 K2 H_REQ#3 J3 H_REQ#4 L1 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 Y2 U5 R3 W6 U4 Y5 U1 R4 T5 T3 W2 W5 Y4 U2 V4 W3 AA4 AB2 AA3 V1 A6 A5 C4 D5 C6 B4 A3 1 1 1 1 1 1 1 1 1 1 1 RSVD_CPU_1 RSVD_CPU_2 RSVD_CPU_3 RSVD_CPU_4 RSVD_CPU_5 RSVD_CPU_6 RSVD_CPU_7 RSVD_CPU_8 RSVD_CPU_9 RSVD_CPU_10 RSVD_CPU_11 M4 N5 T2 V3 B2 C3 D2 D22 D3 F6 B1

H_LOCK# 7 H_CPURST# 7,26 H_RS#[2..0] 7

H_TRDY# 7 H_HIT# 7 H_HITM# 7 ITP_BPM#0 26 ITP_BPM#1 26 ITP_BPM#2 26 ITP_BPM#3 26 ITP_BPM#4 26 ITP_BPM#5 26 ITP_TCK 26 ITP_TDI 26 ITP_TDO 26 ITP_TMS 26 ITP_TRST# 26 ITP_DBRESET# 26 2 Do Not Stuff 2 56R2J-4-GP CPU_PROCHOT# 39 +1.05V_VCCP H_THERMDA 35 H_THERMDC 35 H_THRMTRIP# 8,14,29,34

XDP/ITP SIGNALS

BPM0# BPM1# BPM2# BPM3# PRDY# PREQ# TCK TDI TDO TMS TRST# DBR#

ADDR GROUP 1 ADDR GROUP 1

H_THERMDA 1 C49 Do Not Stuff

DY
H_THERMDC 2

THERMAL
PROCHOT# THRMDA THRMDC THERMTRIP#

DY

7 H_ADSTB#1 14 H_A20M# 14 H_FERR# 14 H_IGNNE# 14 H_STPCLK# 14 H_INTR 14 H_NMI 14 H_SMI# TP30 TP31 TP13 TP23 TP21 TP24 TP19 TP55 TP25 TP34 TP12

H_THERMDA, H_THERMDC routing together, Trace width / Spacing = 10 / 10 mil


H_THRMTRIP# should connect to ICH9 and MCH without T-ing.

RSVD#M4 RSVD#N5 RSVD#T2 RSVD#V3 RSVD#B2 RSVD#C3 TEST7 RSVD#D2 RSVD#D22 RSVD#D3 RSVD#F6 KEY_NC SKT-CPU478P-GP

ICH
RESERVED

DY

2 Do Not Stuff

+1.05V_VCCP CLK_CPU_BCLK 19 CLK_CPU_BCLK# 19

HCLK

BCLK0 BCLK1

A22 A21

62.10040.221

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

CPU-FSB(1/3)
Roberts Discrete
Sheet 4 of

Rev

-1
60

Date: Tuesday, May 19, 2009

SSID = CPU

H_DINV#[3..0] H_DSTBN#[3..0] H_DSTBP#[3..0] H_D#[63..0]

H_DINV#[3..0] H_DSTBN#[3..0]

7 7

H_DSTBP#[3..0] 7 H_D#[63..0] 7

U41B 2 OF 4 H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 7 H_DSTBN#0 7 H_DSTBP#0 7 H_DINV#0 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 7 H_DSTBN#1 7 H_DSTBP#1 7 H_DINV#1 CPU_GTLREF0 C376 Do Not Stuff R53 R60 R58 R7 1 1 1 1 E22 F24 E26 G22 F23 G25 E25 E23 K24 G24 J24 J23 H22 F26 K22 H23 J26 H26 H25 N22 K25 P26 R23 L23 M24 L22 M23 P25 P23 P22 T24 R24 L25 T25 N25 L26 M26 N24 AD26 C23 D25 C24 AF26 AF1 A26 B22 B23 C21 D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# DSTBN0# DSTBP0# DINV0# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# DSTBN1# DSTBP1# DINV1# GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 BSEL0 BSEL1 BSEL2 SKT-CPU478P-GP D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# DSTBN2# DSTBP2# DINV2# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63# DSTBN3# DSTBP3# DINV3# COMP0 COMP1 COMP2 COMP3 DPRSTP# DPSLP# DPWR# PWRGOOD SLP# PSI# Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22 AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20 R26 U26 AA1 Y1 E5 B5 D24 D6 D7 AE6 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_DSTBN#2 7 H_DSTBP#2 7 H_DINV#2 7 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 H_DSTBN#3 7 H_DSTBP#3 7 H_DINV#3 7 COMP0 COMP1 COMP2 COMP3 R350 R349 R14 R13 1 1 1 1 2 2 2 2 27D4R2F-L1-GP 54D9R2F-L1-GP 27D4R2F-L1-GP 54D9R2F-L1-GP

Layout notes Z= 55 Ohm 0.5" MAX for CPU_GTLREF0


+1.05V_VCCP 2

R357 1KR2F-3-GP 1

DATA GRP3

DATA GRP2

DATA GRP0 DATA GRP0 DATA GRP1 DATA GRP1

R354 2KR2F-3-GP 2

DY

DY DY DY DY

2 Do Not Stuff 2 Do Not Stuff 2 Do Not Stuff 2 Do Not Stuff

TEST1 TEST2 CPU_TEST3 CPU_TEST5

MISC

19 CPU_BSEL0 19 CPU_BSEL1 19 CPU_BSEL2

H_DPRSTP# 8,14,39 H_DPSLP# 14 H_DPWR# 7 H_PWRGOOD 14,34 H_CPUSLP# 7 PSI# 39

Layout Note: Comp0, 2 connect with Zo=27.4 ohm, make trace length shorter than 0.5". Comp1, 3 connect with Zo=55 ohm, make trace length shorter than 0.5".

62.10040.221

Route the CPU_TEST3 and CPU_TEST5 signals through a ground referenced Zo = 55-ohm trace that ends in a via that is near a GND via and is accessible through an oscilloscope connection.

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

CPU-FSB(2/3)
Roberts Discrete
Sheet 5 of

Rev

hexainf@hotmail.com GRATIS - FOR FREE

-1
60

Date: Tuesday, May 19, 2009

SSID = CPU
+VCC_CORE C366 SC22U6D3V5MX-2GP C25 Do Not Stuff C36 Do Not Stuff C31 Do Not Stuff C11 Do Not Stuff C370 Do Not Stuff C5 Do Not Stuff C6 Do Not Stuff C3 Do Not Stuff C365 Do Not Stuff U41D A4 A8 A11 A14 A16 A19 A23 AF2 B6 B8 B11 B13 B16 B19 B21 B24 C5 C8 C11 C14 C16 C19 C2 C22 C25 D1 D4 D8 D11 D13 D16 D19 D23 D26 E3 E6 E8 E11 E14 E16 E19 E21 E24 F5 F8 F11 F13 F16 F19 F2 F22 F25 G4 G1 G23 G26 H3 H6 H21 H24 J2 J5 J22 J25 K1 K4 K23 K26 L3 L6 L21 L24 M2 M5 M22 M25 N1 N4 N23 N26 P3 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 1 4 OF 4 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25 1 1 1 1 1 1 1 1 1 1 C10 SC22U6D3V5MX-2GP

DY
2
D

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

+VCC_CORE

+VCC_CORE

U41C 3 OF 4 A7 A9 A10 A12 A13 A15 A17 A18 A20 B7 B9 B10 B12 B14 B15 B17 B18 B20 C9 C10 C12 C13 C15 C17 C18 D9 D10 D12 D14 D15 D17 D18 E7 E9 E10 E12 E13 E15 E17 E18 E20 F7 F9 F10 F12 F14 F15 F17 F18 F20 AA7 AA9 AA10 AA12 AA13 AA15 AA17 AA18 AA20 AB9 AC10 AB10 AB12 AB14 AB15 AB17 AB18 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCA VCCA VID0 VID1 VID2 VID3 VID4 VID5 VID6 VCCSENSE VSSSENSE AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20 G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21 B26 C26 AD6 AF5 AE5 AF4 AE3 AF3 AE2 AF7 AE7 R302 1 SKT-CPU478P-GP CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_VID6 R311 1 CPU_VID[6..0]

+VCC_CORE C14 SC22U6D3V5MX-2GP C338 SC22U6D3V5MX-2GP C357 SC22U6D3V5MX-2GP C363 SC22U6D3V5MX-2GP C15 Do Not Stuff C352 Do Not Stuff C26 Do Not Stuff C35 Do Not Stuff C367 Do Not Stuff C13 Do Not Stuff

1 2 C24 SC22U6D3V5MX-2GP

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

+VCC_CORE C12 SC22U6D3V5MX-2GP C17 SC22U6D3V5MX-2GP C30 SC22U6D3V5MX-2GP C29 SC22U6D3V5MX-2GP C340 SC22U6D3V5MX-2GP C344 SC22U6D3V5MX-2GP C347 SC22U6D3V5MX-2GP C368 SC22U6D3V5MX-2GP C32 Do Not Stuff

1 2 C336 SC22U6D3V5MX-2GP

DY
2

+1.05V_VCCP C44 SCD1U10V2KX-4GP C43 SCD1U10V2KX-4GP C45 SCD1U10V2KX-4GP C9 SCD1U10V2KX-4GP C7 SCD1U10V2KX-4GP TC17 Do Not Stuff

1 2 C8 SCD1U10V2KX-4GP

DY
2

layout note: "+1.5V_VCCA" as short as possible

NCTF PIN
CPU_GND1 1 TP10
B

+1.5V_VCCA

+1.5V_RUN 1 R356 2 Do Not Stuff

39 1 1 C374 SCD01U16V2KX-3GP C377 SC10U6D3V5MX-3GP

Layout Note: Place as close as possible to the CPU VCCA pin.

CPU_GND2 1 CPU_GND3 1

2 100R2F-L1-GP-U

+VCC_CORE VCC_SENSE 39 VSS_SENSE 39

TP224 TP20

VCC_SENSE and VSS_SENSE lines should be of equal length.

2 100R2F-L1-GP-U

CPU_GND4 1 TP56

62.10040.221
SKT-CPU478P-GP

62.10040.221

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

CPU-Power(3/3)
Roberts Discrete
Sheet
1

Rev

-1
of 60

Date: Tuesday, May 19, 2009


5 4 3 2

SSID = MCH

U52A 5 H_D#[63..0] H_D#[63..0] H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 F2 G8 F8 E6 G2 H6 H2 F6 D4 H3 M9 M11 J1 J2 N12 J6 P2 L2 R2 N9 L6 M5 J3 N2 R1 N5 N6 P13 N8 L7 N10 M3 Y3 AD14 Y6 Y10 Y12 Y14 Y7 W2 AA8 Y9 AA13 AA9 AA11 AD11 AD10 AD13 AE12 AE9 AA2 AD8 AA3 AD3 AD7 AE14 AF3 AC1 AE3 AC3 AE11 AE8 AG2 AD6 H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63

1 OF 10 H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8 H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35 H_ADS# H_ADSTB#_0 H_ADSTB#_1 H_BNR# H_BPRI# H_BREQ# H_DEFER# H_DBSY# HPLL_CLK HPLL_CLK# H_DPWR# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY# A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20 H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9 H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_A#[35..3]

H_A#[35..3] 4

+1.05V_VCCP

H_SWING routing Trace width and Spacing use 10 / 20 mil H_SWING Resistors and Capacitors close MCH 500 mil ( MAX )
1

R368 221R2F-2-GP 2

H_SWING C399 SCD1U10V2KX-4GP 2 1 R367 100R2F-L1-GP-U

H_ADS# 4 H_ADSTB#0 4 H_ADSTB#1 4 H_BNR# 4 H_BPRI# 4 H_BREQ#0 4 H_DEFER# 4 H_DBSY# 4 CLK_MCH_BCLK 19 CLK_MCH_BCLK# 19 H_DPWR# 5 H_DRDY# 4 H_HIT# 4 H_HITM# 4 H_LOCK# 4 H_TRDY# 4

HOST

H_DINV#[3..0] H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3 H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3 H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3 H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4 H_RS#_0 H_RS#_1 H_RS#_2 J8 L3 Y13 Y1 L10 M7 AA5 AE6 L9 M8 AA6 AE5 B15 K13 F13 B13 B14 B6 F12 C8 H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3 H_DSTBN#[3..0] H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#[3..0] H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 H_REQ#[4..0] H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_RS#[2..0] H_RS#0 H_RS#1 H_RS#2

H_RCOMP routing Trace width and Spacing use 10 / 20 mil


1 R361 2 H_RCOMP 24D9R2F-L-GP

H_DINV#[3..0]

H_DSTBN#[3..0]

Place R51 near to the chip ( < 0.5")

H_DSTBP#[3..0] 5

H_REQ#[4..0]

+1.05V_VCCP 2

H_SWING H_RCOMP 4,26 H_CPURST# 5 H_CPUSLP#

C5 E3 C12 E11 A11 B11

H_SWING H_RCOMP H_CPURST# H_CPUSLP# H_AVREF H_DVREF CANTIGA-GM-GP-U-NF

R369 1KR2F-3-GP 1

H_RS#[2..0]

H_AVREF

R372 2KR2F-3-GP

DY

C403 Do Not Stuff

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

Cantiga-HOST(1/6)

hexainf@hotmail.com GRATIS - FOR FREE

Size Document Number Custom

Rev

Roberts Discrete
Sheet 7 of 60

-1

Date: Tuesday, May 19, 2009

SSID = MCH * is current setting


CFG Strap CFG 5 CFG 6 CFG 7 CFG 9 CFG 10 CFG 12 CFG 13 CFG 16 CFG 19 DMI Lane Reserved CFG 20 SDVO concurrent with PCIE SDVO_CTRLDATA L_DDC_DATA DDPC_CTRLDATA Low DMI X 2 ITPM enable TLS cipher suite with no confidentiality PCIE GFX lane reversed PCIE loopback enable ALLZ mode enable XOR mode enable
FSB dynamic ODT disable

U52B M36 N36 R33 T33 AH9 AH10 AH12 AH13 K12 AL34 AK34 AN35 AM35 T24 B31 B2 M1 AY21 RESERVED#M36 RESERVED#N36 RESERVED#R33 RESERVED#T33 RESERVED#AH9 RESERVED#AH10 RESERVED#AH12 RESERVED#AH13 RESERVED#K12 RESERVED#AL34 RESERVED#AK34 RESERVED#AN35 RESERVED#AM35 RESERVED#T24

2 OF 10

High DMI X 4 ITPM disable TLS cipher suite with confidentiality PCIE GFX lane numbered in oder PCIE loopback disable ALLZ mode disable XOR mode disable
FSB Dynamic ODT enable

DDR CLK/ CONTROL/COMPENSATION

SA_CK_0 SA_CK_1 SB_CK_0 SB_CK_1 SA_CK#_0 SA_CK#_1 SB_CK#_0 SB_CK#_1 SA_CKE_0 SA_CKE_1 SB_CKE_0 SB_CKE_1 SA_CS#_0 SA_CS#_1 SB_CS#_0 SB_CS#_1 SA_ODT_0 SA_ODT_1 SB_ODT_0 SB_ODT_1 SM_RCOMP SM_RCOMP#

AP24 AT21 AV24 AU20 AR24 AR21 AU24 AV20 BC28 AY28 AY36 BB36 BA17 AY16 AV16 AR13 BD17 AY17 BF15 AY13 BG22 BH21 M_RCOMPP M_RCOMPN SM_RCOMP_VOH SM_RCOMP_VOL

M_CLK_DDR0 M_CLK_DDR1 M_CLK_DDR2 M_CLK_DDR3 M_CLK_DDR#0 M_CLK_DDR#1 M_CLK_DDR#2 M_CLK_DDR#3 M_CKE0 M_CKE1 M_CKE2 M_CKE3 M_CS0# M_CS1# M_CS2# M_CS3# M_ODT0 M_ODT1 M_ODT2 M_ODT3 17 17 18 18 17 17 18 18 17 17 18 18

17 17 18 18 17 17 18 18

* * * * * * * *

+1.8V_SUS 1 R380 80D6R2F-L-GP 2

RSVD

RESERVED#B31 RESERVED#B2 RESERVED#M1 RESERVED#AY21

+1.8V_SUS

2 R377 80D6R2F-L-GP 2 SM_RCOMP_VOH 1 1 C159 SC2D2U10V3KX-1GP C162 SCD01U16V2KX-3GP 1 R116 3K01R2F-3-GP 2 SM_RCOMP_VOL 1 C151 SCD01U16V2KX-3GP 1 2 2 2 C145 SC2D2U10V3KX-1GP R119 1KR2F-3-GP 1 +3.3V_RUN 1 R370 56R2J-4-GP 2 1 TSATN#_KBC 29 1 2 1 1 R122 1KR2F-3-GP

* PCIE and SDVO are * operatiing simultaneously via the PEG port SDVO interface disable * SDVO interface enable LFP disable LFP card present * SDVO/iHDMI/DP SDVO/iHDMI/DP * interface enabled interface disabled
Normal operation Reverse DMI lanes Only PCIE or SDVO is operational
CFG11 CFG18 CFG19 CFG20

BG23 BF23 BH18 BF18

RESERVED#BG23 RESERVED#BF23 RESERVED#BH18 RESERVED#BF18

SM_RCOMP_VOH BF28 SM_RCOMP_VOL BH28 SM_VREF SM_PWROK SM_REXT SM_DRAMRST# AV42 AR36 BF17 BC36

DY

SM_REXT R374 1

2 499R2F-2-GP

R142 Do Not Stuff R145 Do Not Stuff

DPLL_REF_CLK B38 DPLL_REF_CLK# A38 DPLL_REF_SSCLK E41 DPLL_REF_SSCLK# F41 PEG_CLK PEG_CLK# F43 E43 CLK_MCH_3GPLL CLK_MCH_3GPLL#

For Discrete

DY
2

+3.3V_RUN R104 1 R128 1 R117 1 R121 1 4 3

CLK

CLK_MCH_3GPLL 19 CLK_MCH_3GPLL# 19

DY DY DY DY
RN20

2 Do Not Stuff 2 Do Not Stuff 2 Do Not Stuff 2 Do Not Stuff 1 2

FSB setting
19 MCH_CLKSEL0 19 MCH_CLKSEL1 19 MCH_CLKSEL2 TP86 TP88 T25 R25 P25 P20 P24 C25 N24 M24 E21 C23 C24 N21 P21 T21 R20 M20 L21 H21 P29 R28 T28 CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 CFG_16 CFG_17 CFG_18 CFG_19 CFG_20

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3 DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

AE41 AE37 AE47 AH39 AE40 AE38 AE48 AH40 AE35 AE43 AE46 AH42 AD35 AE44 AF46 AH43

DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3

DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3

13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 +1.05V_VCCP

DMI

PM_EXTTS#0 PM_EXTTS#1

1 1

SRN10KJ-5-GP R383 1 R112 1 R111 1 R102 1 R382 1 R375 1 R101 1 R105 1 R103 1

2 Do Not Stuff 2 Do Not Stuff 2 Do Not Stuff 2 Do Not Stuff 2 Do Not Stuff

CFG9 CFG10 CFG12 CFG13 CFG16

TP87

GRAPHICS VID

DY DY DY DY DY DY DY DY DY

2 Do Not Stuff 2 Do Not Stuff 2 Do Not Stuff 2 Do Not Stuff

CFG5 CFG6 CFG7 CFG8 TP84 TP85 1 1 1

CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3 DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

DY
2

R371 Do Not Stuff

TSATN#_KBC TSATN# C Q19 Do Not Stuff

DY
E

15 PM_SYNC# 5,14,39 H_DPRSTP# 17 PM_EXTTS#0 18 PM_EXTTS#1

A00
15,29,35 PM_PWROK

PWROK_R RSTIN#

1 R139 2 Do Not Stuff R94

R29 B7 N33 P32 AT40 AT11 T20 R32

PM_SYNC# PM_DPRSTP# PM_EXT_TS#_0 PM_EXT_TS#_1 PWROK RSTIN# THERMTRIP# DPRSLPVR

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4

B33 B32 G33 F33 E33

GFX_VR_EN

C34 +1.05V_VCCP 2 R126 1KR2F-3-GP 1

C175 SCD1U10V2KX-4GP

100R2F-L1-GP-U C94 Do Not Stuff

DY
2

4,14,29,34 H_THRMTRIP# 15,39 DPRSLPVR

NC#BG48 NC#BF48 NC#BD48 NC#BC48 NC#BH47 NC#BG47 NC#BE47 NC#BH46 NC#BF46 NC#BG45 NC#BH44 NC#BH43 NC#BH6 NC#BH5 NC#BG4 NC#BH3 NC#BF3 NC#BH2 NC#BG2 NC#BE2 NC#BG1 NC#BF1 NC#BD1 NC#BC1 NC#F1 NC#A47 CANTIGA-GM-GP-U-NF

ME

13,25,26,29,32,38 PLT_RST#

BG48 BF48 BD48 BC48 BH47 BG47 BE47 BH46 BF46 BG45 BH44 BH43 BH6 BH5 BG4 BH3 BF3 BH2 BG2 BE2 BG1 BF1 BD1 BC1 F1 A47

CL_CLK CL_DATA CL_PWROK CL_RST# CL_VREF

AH37 AH36 AN36 AJ35 AH34

MCH_CLVREF

CL_CLK0 15 CL_DATA0 15 M_PWROK 15 CL_RST#0 15

+3.3V_RUN 1 R130 499R2F-2-GP 2 R131 CLKREQ#_B 1 2 10KR2J-3-GP

MCH_CLVREF ~= 0.35V
DDPC_CTRLCLK DDPC_CTRLDATA SDVO_CTRLCLK SDVO_CTRLDATA CLKREQ# ICH_SYNC# TSATN# N28 M28 G36 E36 K36 H36 B12 TSATN#

MISC

TP271 CLKREQ#_B 19 MCH_ICH_SYNC# 15

Main Source

HDA

HDA_BCLK HDA_RST# HDA_SDI HDA_SDO HDA_SYNC

B28 B30 B29 C29 A28

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

Cantiga-DMI/CFG(2/6)
Size Document Number Custom Rev

+V_DDR_MCH_REF

+1.8V_SUS

CFG CFG PM PM NC

Roberts Discrete
Sheet 8 of 60

-1

Date: Tuesday, May 19, 2009

SSID = MCH

17 M_A_DQ[63..0]

M_A_DQ[63..0] M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 AJ38 AJ41 AN38 AM38 AJ36 AJ40 AM44 AM42 AN43 AN44 AU40 AT38 AN41 AN39 AU44 AU42 AV39 AY44 BA40 BD43 AV41 AY43 BB41 BC40 AY37 BD38 AV37 AT36 AY38 BB38 AV36 AW36 BD13 AU11 BC11 BA12 AU13 AV13 BD12 BC12 BB9 BA9 AU10 AV9 BA11 BD9 AY8 BA6 AV5 AV7 AT9 AN8 AU5 AU6 AT5 AN10 AM11 AM5 AJ9 AJ8 AN12 AM13 AJ11 AJ12

U52D SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63

4 OF 10 SA_BS_0 SA_BS_1 SA_BS_2 SA_RAS# SA_CAS# SA_WE# BD21 BG18 AT25 BB20 BD20 AY20 M_A_BS#0 17 M_A_BS#1 17 M_A_BS#2 17 M_A_RAS# 17 M_A_CAS# 17 M_A_WE# 17

18 M_B_DQ[63..0]

M_B_DQ[63..0] M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63 AK47 AH46 AP47 AP46 AJ46 AJ48 AM48 AP48 AU47 AU46 BA48 AY48 AT47 AR47 BA47 BC47 BC46 BC44 BG43 BF43 BE45 BC41 BF40 BF41 BG38 BF38 BH35 BG35 BH40 BG39 BG34 BH34 BH14 BG12 BH11 BG8 BH12 BF11 BF8 BG7 BC5 BC6 AY3 AY1 BF6 BF5 BA1 BD3 AV2 AU3 AR3 AN2 AY2 AV1 AP3 AR1 AL1 AL2 AJ1 AH1 AM2 AM3 AH3 AJ3

U52E SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

5 OF 10 SB_BS_0 SB_BS_1 SB_BS_2 SB_RAS# SB_CAS# SB_WE# BC16 BB17 BB33 AU17 BG16 BF14 M_B_BS#0 18 M_B_BS#1 18 M_B_BS#2 18 M_B_RAS# 18 M_B_CAS# 18 M_B_WE# 18

M_A_DM[7..0] SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7 SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7 SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8 SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14 AM37 AT41 AY41 AU39 BB12 AY6 AT7 AJ5 AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7 AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8 BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25 M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 M_A_DQS[7..0] M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14

M_A_DM[7..0] 17

M_B_DM[7..0] SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7 SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7 SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8 SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14 AM47 AY47 BD40 BF35 BG11 BA3 AP1 AK2 AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6 AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5 AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33 M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7 M_B_DQS[7..0] M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14

M_B_DM[7..0] 18

M_A_DQS[7..0] 17

M_B_DQS[7..0] 18

MEMORY

M_A_DQS#[7..0]

M_A_DQS#[7..0] 17

MEMORY

M_B_DQS#[7..0]

M_B_DQS#[7..0] 18

SYSTEM

M_A_A[14..0] 17

SYSTEM

M_A_A[14..0]

M_B_A[14..0]

M_B_A[14..0] 18

DDR

CANTIGA-GM-GP-U-NF

CANTIGA-GM-GP-U-NF

DDR

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

Cantiga-DDR(3/6)

hexainf@hotmail.com GRATIS - FOR FREE

Size Document Number Custom

Rev

Roberts Discrete
Sheet 9 of 60

-1

Date: Tuesday, May 19, 2009

SSID = MCH
+1.05V_VCCP +1.8V_SUS AP33 AN33 BH32 BG32 BF32 BD32 BC32 BB32 BA32 AY32 AW32 AV32 AU32 AT32 AR32 AP32 AN32 BH31 BG31 BF31 BG30 BH29 BG29 BF29 BD29 BC29 BB29 BA29 AY29 AW29 AV29 AU29 AT29 AR29 AP29 BA36 BB24 BD16 BB21 AW16 AW13 AT13 U52G 7 OF 10 C390 SC22U6D3V5MX-2GP

FOR VCC CORE


AG34 AC34 AB34 AA34 Y34 V34 U34 AM33 AK33 AJ33 AG33 AF33 AE33 AC33 AA33 Y33 W33 V33 U33 AH28 AF28 AC28 AA28 AJ26 AG26 AE26 AC26 AH25 AG25 AF25 AG24 AJ23 AH23 AF23 T32

U52F

6 OF 10

POWER

VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM

VCC GFX NCTF

VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC

for Discrete
Y26 AE25 AB25 AA25 AE24 AC24 AA24 Y24 AE23 AC23 AB23 AA23 AJ21 AG21 AE21 AC21 AA21 Y21 AH20 AF20 AE20 AC20 AB20 AA20 T17 T16 AM15 AL15 AE15 AJ15 AH15 AG15 AF15 AB15 AA15 Y15 V15 U15 AN14 AM14 U14 T14 VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG

TC21 ST220U2D5VBM-2GP

C435 SC22U6D3V5MX-2GP

C431 SCD1U10V2KX-4GP

+1.05V_VCCP +1.05V_VCCP +1.05V_VCCP +1.05V_VCCP +1.5V_RUN +1.8V_SUS +1.8V_SUS +1.5V_RUN +3.3V_RUN

VCCD_HPLL VCCA_PEG_PLL VCCD_PEG_PLL VCC_AXF VCCD_TVDAC VCC_SM VCC_SM_CK VCCA_PEG_BG VCC_HV

157.2mA 50mA 50mA 321.35mA 35mA 3000mA 124mA 414uA 105.3mA

Place on the Edge

CANTIGA-GM-GP-U-NF

VCC GFX

VCC SM LF

C81 SCD22U10V2KX-1GP

C134 SCD22U10V2KX-1GP

C182 SCD47U6D3V2KX-GP

C178 SC1U10V3KX-3GP

C99 SCD1U10V2KX-4GP

C92 SCD1U10V2KX-4GP

1 2

C186 SC1U10V3KX-3GP

VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF

AV44 SM_LF1_GMCH BA37 SM_LF2_GMCH AM40SM_LF3_GMCH AV21 SM_LF4_GMCH AY5 SM_LF5_GMCH AM10SM_LF6_GMCH BB13 SM_LF7_GMCH 1 1 1

TP83 TP82

1VCC_AXG_SENSE 1VSS_AXG_SENSE

AJ14 AH14

Main Source

VCC_AXG_SENSE VSS_AXG_SENSE

VCC NCTF

VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF

W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16

DY
2

DY
2

DY
2

for Discrete

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

C98 SCD22U10V2KX-1GP

C84 Do Not Stuff

C91 Do Not Stuff

C80 Do Not Stuff

2898.52mA

Coupling CAP 370 mils from the Edge

DY
2

DY
2

Coupling CAP

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

POWER

C111 Do Not Stuff

C166 SCD22U10V2KX-1GP

C113 SCD1U10V2KX-4GP

VCC SM

C156 Do Not Stuff

VCC CORE

C426 Do Not Stuff

CANTIGA-GM-GP-U-NF

3000mA

+1.05V_VCCP VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23

1 R125 2 Do Not Stuff

VCC_GMCH_35

A00 Supply +1.05V_VCCP


Place CAP where LVDS and DDR2 taps

Signal Group VCC VTT VCC_PEG VCC_DMI VCCA_SM VCCA_SM_CK VCCA_HPLL VCCA_MPLL

Imax 3060mA 852mA 1782mA 456mA 720mA 26mA 24mA 139.2mA

+1.05V_VCCP

FOR VCC SM
+1.8V_SUS

+1.05V_VCCP +1.05V_VCCP +1.05V_VCCP +1.05V_VCCP +1.05V_VCCP +1.05V_VCCP

DY

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

Cantiga-Power(4/6)
Size Document Number Custom Date: Tuesday, May 19, 2009 Rev

Roberts Discrete
Sheet 10 of 60

-1

SSID = MCH
+1.05V_VCCP U52H 8 OF 10 C143 SCD47U6D3V2KX-GP C135 SC2D2U10V3KX-1GP C123 SC4D7U6D3V3KX-GP C128 SC4D7U6D3V3KX-GP EC48 SCD1U25V3KX-GP VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT U13 T13 U12 T12 U11 T11 U10 T10 U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1 TC3 Do Not Stuff 1 1 1 1 1 2

for Discrete
B27 A26 A25 B25 VCCA_CRT_DAC VCCA_CRT_DAC VCCA_DAC_BG VSSA_DAC_BG

1 2

DY

CRT

+1.05V_VCCP 2

F47 L48

VCCA_DPLLA

852mA

VTT

+1.05V_VCCP D22 1 R396 2 3 BAT54-7-F-GP 2 1 10R2J-2-GP 1 2 +1.05V_VCCP 1D05V_VCC_AXF C408 SC1U10V3KX-3GP 1 R373 2 Do Not Stuff 1 +1.8V_SUS +1.05V_VCCP +1.05V_VCCP C437 SCD1U10V2KX-4GP 1 R398 2 Do Not Stuff +3.3V_RUN +3.3V_VCC_HV

VCCA_HPLL 24mA

M_VCCA_MPLL M_VCCA_HPLL C393 SC4D7U6D3V3KX-GP C387 SCD1U10V2KX-4GP 1 1

AE1 J48 J47

L12 1 2 FCM1608KF-1-GP

VCCA_MPLL139.2mA VCCA_LVDS VSSA_LVDS

for Discrete

+M_VCCA_MPLL_HPLL

+1.5V_RUN 1 1 R402 2 Do Not Stuff VCCA_PEG_BG C442 SCD1U10V2KX-4GP 1D05V_RUN_PEGPLL AD48 VCCA_PEG_BG

414uA

C384 SCD1U10V2KX-4GP

C391 Do Not Stuff

120ohm 100MHz

+1.05V_VCCP

AA48 AR20 AP20 AN20 AR17 AP17 AN17 AT16 AR16 AP16

50mA VCCA_PEG_PLL
VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM

M_VCCA_MPLL

A PEG

L11 1 2 FCM1608KF-1-GP

A LVDS

120ohm 100MHz

PLL

R351 Do Not Stuff

A00

VCCA_DPLLB

M_VCCA_HPLL

AD1

2 2

DY
2

DY

C126 SC22U6D3V5MX-2GP

C130 SC4D7U6D3V3KX-GP

C129 SC1U10V3KX-3GP

C127 Do Not Stuff

DY
2

POWER
A SM
+VCC_AXF

+1.05V_VCCP L16 1 2 BLM18BB221SN1D-GP

C407 Do Not Stuff

1D05V_RUN_PEGPLL C443 SCD1U10V2KX-4GP 1 C450 SC10U6D3V5MX-3GP 1

C133 SCD1U10V2KX-4GP

+1.05V_VCCP C140 SC22U6D3V5MX-2GP 1 R120 2 Do Not Stuff

720mA

1 R97 2 Do Not Stuff R100 1R3F-GP

C144 Do Not Stuff

1D05V_SM_CK C157 SCD1U10V2KX-4GP 1

220ohm 100MHz

321.35mA

DY
2

+1.5V_RUN

C153 SCD01U16V2KX-3GP

C152 SCD1U10V2KX-4GP

SM CK

124mA

1 R115 2 Do Not Stuff

1D5VRUN_TVDAC

AP28 AN28 AP25 AN25 AN24 AM28 AM26 AM25 AL25 AM24 AL24 AM23 AL23

VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF

2 1 1 1 2 2 C446 SC10U6D3V5MX-3GP C185 SCD1U10V2KX-4GP Main Source 1 C137 SC10U6D3V5MX-3GP

A CK

AXF

VCC_AXF VCC_AXF VCC_AXF

B22 B21 A21

VCC_SM_CK VCC_SM_CK VCC_SM_CK VCC_SM_CK

BF21 BH20 BG20 BF20

for Discrete

for Discrete
105.3mA
VCC_HV VCC_HV VCC_HV VCC_PEG VCC_PEG VCC_PEG VCC_PEG VCC_PEG VCC_DMI VCC_DMI VCC_DMI VCC_DMI C35 B35 A35 V48 U48 V47 U47 U46 AH48 AF48 AH47 AG47

C5381 SCD01U16V2KX-3GP

HDA

180ohm 100MHz

C5382 SCD1U10V2KX-4GP

L5128 1 2 HCB1608K-181T20GP

TV

B24 A24

118.8mA VCC_TX_LVDS K47


VCCA_TV_DAC VCCA_TV_DAC

+3.3V_VCC_HV

1D5VRUN_QDAC A32 VCC_HDA

HV

C191 SC10U6D3V5MX-3GP

2 C447 SC4D7U6D3V3KX-GP

1D5VRUN_TVDAC +1.05V_VCCP 1 R360 2 Do Not Stuff C385 SCD1U10V2KX-4GP 1 1D5VRUN_QDAC 1D05V_RUN_HPLL 1D05V_RUN_PEGPLL

M25 L28 AF1 AA47 M38 L37

VCCD_TVDAC 35mA VCCD_QDAC 2mA VCCD_HPLL 157.2mA

D TV/CRT

50mA VCCD_PEG_PLL

LVDS

C438 SCD1U10V2KX-4GP 2

VCCD_LVDS VCCD_LVDS

VTTLF

456mA

DMI

VTTLF VTTLF VTTLF

A8 L1 AB2

VTTLF1 VTTLF2 VTTLF3

C395 SCD47U6D3V2KX-GP

C394 SCD47U6D3V2KX-GP

1 2

1 2

1 2

C90 SCD47U6D3V2KX-GP

for Discrete

CANTIGA-GM-GP-U-NF

C445 SC10U6D3V5MX-3GP

1782mA

26mA

PEG

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

Cantiga-Power/Filter(5/6)
Roberts Discrete
Sheet 11 of

Rev

hexainf@hotmail.com GRATIS - FOR FREE

-1
60

Date: Tuesday, May 19, 2009

SSID = MCH
U52I AU48 AR48 AL48 BB47 AW47 AN47 AJ47 AF47 AD47 AB47 Y47 T47 N47 L47 G47 BD46 BA46 AY46 AV46 AR46 AM46 V46 R46 P46 H46 F46 BF44 AH44 AD44 AA44 Y44 U44 T44 M44 F44 BC43 AV43 AU43 AM43 J43 C43 BG42 AY42 AT42 AN42 AJ42 AE42 N42 L42 BD41 AU41 AM41 AH41 AD41 AA41 Y41 U41 T41 M41 G41 B41 BG40 BB40 AV40 AN40 H40 E40 AT39 AM39 AJ39 AE39 N39 L39 B39 BH38 BC38 BA38 AU38 AH38 AD38 AA38 Y38 U38 T38 J38 F38 C38 BF37 BB37 AW37 AT37 AN37 AJ37 H37 C37 BG36 BD36 AK15 AU36 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 9 OF 10 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23 AJ6 BG21 L12 AW21 AU21 AP21 AN21 AH21 AF21 AB21 R21 M21 J21 G21 BC20 BA20 AW20 AT20 AJ20 AG20 Y20 N20 K20 F20 C20 A20 BG19 A18 BG17 BC17 AW17 AT17 R17 M17 H17 C17 BA16 AU16 AN16 N16 K16 G16 E16 BG15 AC15 W15 A15 BG14 AA14 C14 BG13 BC13 BA13 AN13 AJ13 AE13 N13 L13 G13 E13 BF12 AV12 AT12 AM12 AA12 J12 A12 BD11 BB11 AY11 AN11 AH11 Y11 N11 G11 C11 BG10 AV10 AT10 AJ10 AE10 AA10 M10 BF9 BC9 AN9 AM9 AD9 G9 B9 BH8 BB8 AV8 AT8 U52J VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 10 OF 10 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS AH8 Y8 L8 E8 B8 AY7 AU7 AN7 AJ7 AE7 AA7 N7 J7 BG6 BD6 AV6 AT6 AM6 M6 C6 BA5 AH5 AD5 Y5 L5 J5 H5 F5 BE4 BC3 AV3 AL3 R3 P3 F3 BA2 AW2 AU2 AR2 AP2 AJ2 AH2 AF2 AE2 AD2 AC2 Y2 M2 K2 AM1 AA1 P1 H1 U24 U28 U25 U29 AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17 BH48 BH1 A48 C1 A3 E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48 GMCH_GND11 GMCH_GND21 GMCH_GND31 GMCH_GND41 +1.05V_VCCP 2 U52C 3 OF 10 R133 49D9R2F-GP 1

Place R133 close to MCH within 500 mils.

L32 G32 M32 M33 K33 J33 M29 C44 B43 E37 E38 C41 C40 B37 A37 H47 E46 G40 A40 H48 D45 F40 B40 A41 H38 G37 J37 B42 G38 F37 K37

L_BKLT_CTRL L_BKLT_EN L_CTRL_CLK L_CTRL_DATA L_DDC_CLK L_DDC_DATA L_VDD_EN LVDS_IBG LVDS_VBG LVDS_VREFH LVDS_VREFL LVDSA_CLK# LVDSA_CLK LVDSB_CLK# LVDSB_CLK LVDSA_DATA#_0 LVDSA_DATA#_1 LVDSA_DATA#_2 LVDSA_DATA#_3 LVDSA_DATA_0 LVDSA_DATA_1 LVDSA_DATA_2 LVDSA_DATA_3 LVDSB_DATA#_0 LVDSB_DATA#_1 LVDSB_DATA#_2 LVDSB_DATA#_3 LVDSB_DATA_0 LVDSB_DATA_1 LVDSB_DATA_2 LVDSB_DATA_3

PEG_COMPI PEG_COMPO PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8 PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15 PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8 PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15 PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9 PEG_TX#_10 PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15 PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8 PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15

T37 T36 H44 J46 L44 L40 N41 P48 N44 T43 U43 Y43 Y48 Y36 AA43 AD37 AC47 AD39 H43 J44 L43 L41 N40 P47 N43 T42 U42 Y42 W47 Y37 AA42 AD36 AC48 AD40 J41 M46 M47 M40 M42 R48 N38 T40 U37 U40 Y40 AA46 AA37 AA40 AD43 AC46 J42 L46 M48 M39 M43 R47 N37 T39 U36 U39 Y39 Y46 AA36 AA39 AD42 AD46

PEG_CMP PCIE_MRX_GTX_N[0..15] PCIE_MRX_GTX_N0 PCIE_MRX_GTX_N1 PCIE_MRX_GTX_N2 PCIE_MRX_GTX_N3 PCIE_MRX_GTX_N4 PCIE_MRX_GTX_N5 PCIE_MRX_GTX_N6 PCIE_MRX_GTX_N7 PCIE_MRX_GTX_N8 PCIE_MRX_GTX_N9 PCIE_MRX_GTX_N10 PCIE_MRX_GTX_N11 PCIE_MRX_GTX_N12 PCIE_MRX_GTX_N13 PCIE_MRX_GTX_N14 PCIE_MRX_GTX_N15 PCIE_MRX_GTX_P[0..15] PCIE_MRX_GTX_P0 PCIE_MRX_GTX_P1 PCIE_MRX_GTX_P2 PCIE_MRX_GTX_P3 PCIE_MRX_GTX_P4 PCIE_MRX_GTX_P5 PCIE_MRX_GTX_P6 PCIE_MRX_GTX_P7 PCIE_MRX_GTX_P8 PCIE_MRX_GTX_P9 PCIE_MRX_GTX_P10 PCIE_MRX_GTX_P11 PCIE_MRX_GTX_P12 PCIE_MRX_GTX_P13 PCIE_MRX_GTX_P14 PCIE_MRX_GTX_P15 PCIE_MTX_GRX_C_N0 PCIE_MTX_GRX_C_N1 PCIE_MTX_GRX_C_N2 PCIE_MTX_GRX_C_N3 PCIE_MTX_GRX_C_N4 PCIE_MTX_GRX_C_N5 PCIE_MTX_GRX_C_N6 PCIE_MTX_GRX_C_N7 PCIE_MTX_GRX_C_N8 PCIE_MTX_GRX_C_N9 PCIE_MTX_GRX_C_N10 PCIE_MTX_GRX_C_N11 PCIE_MTX_GRX_C_N12 PCIE_MTX_GRX_C_N13 PCIE_MTX_GRX_C_N14 PCIE_MTX_GRX_C_N15 PCIE_MTX_GRX_C_P0 PCIE_MTX_GRX_C_P1 PCIE_MTX_GRX_C_P2 PCIE_MTX_GRX_C_P3 PCIE_MTX_GRX_C_P4 PCIE_MTX_GRX_C_P5 PCIE_MTX_GRX_C_P6 PCIE_MTX_GRX_C_P7 PCIE_MTX_GRX_C_P8 PCIE_MTX_GRX_C_P9 PCIE_MTX_GRX_C_P10 PCIE_MTX_GRX_C_P11 PCIE_MTX_GRX_C_P12 PCIE_MTX_GRX_C_P13 PCIE_MTX_GRX_C_P14 PCIE_MTX_GRX_C_P15 C572 C649 C653 C569 C658 C692 C693 C694 C700 C712 C688 C690 C699 C703 C711 C718 C573 C650 C657 C574 C656 C704 C807 C746 C811 C814 C713 C727 C731 C734 C736 C739 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2

PCIE_MRX_GTX_N[0..15] 51

LVDS LVDS

VSS

GRAPHICS

VSS

PCIE_MRX_GTX_P[0..15] 51

PCI-EXPRESS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_SCB VSS_SCB VSS_SCB VSS_SCB VSS_SCB NC#E1 NC#D2 NC#C3 NC#B4 NC#A5 NC#A6 NC#A43 NC#A44 NC#B45 NC#C46 NC#D47 NC#B47 NC#A46 NC#F48 NC#E48 NC#C48 NC#B48

PCIE_MTX_GRX_N[0..15] SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP PCIE_MTX_GRX_N0 PCIE_MTX_GRX_N1 PCIE_MTX_GRX_N2 PCIE_MTX_GRX_N3 PCIE_MTX_GRX_N4 PCIE_MTX_GRX_N5 PCIE_MTX_GRX_N6 PCIE_MTX_GRX_N7 PCIE_MTX_GRX_N8 PCIE_MTX_GRX_N9 PCIE_MTX_GRX_N10 PCIE_MTX_GRX_N11 PCIE_MTX_GRX_N12 PCIE_MTX_GRX_N13 PCIE_MTX_GRX_N14 PCIE_MTX_GRX_N15 PCIE_MTX_GRX_P[0..15] PCIE_MTX_GRX_P0 PCIE_MTX_GRX_P1 PCIE_MTX_GRX_P2 PCIE_MTX_GRX_P3 PCIE_MTX_GRX_P4 PCIE_MTX_GRX_P5 PCIE_MTX_GRX_P6 PCIE_MTX_GRX_P7 PCIE_MTX_GRX_P8 PCIE_MTX_GRX_P9 PCIE_MTX_GRX_P10 PCIE_MTX_GRX_P11 PCIE_MTX_GRX_P12 PCIE_MTX_GRX_P13 PCIE_MTX_GRX_P14 PCIE_MTX_GRX_P15

PCIE_MTX_GRX_N[0..15] 51

F25 H25 K25 H24

TVA_DAC TVB_DAC TVC_DAC TV_RTN

TV TV

C31 E32

TV_DCONSEL_0 TV_DCONSEL_1

E28 G28 J28 G29 H32 J32 J29 E29 L29

PCIE_MTX_GRX_P[0..15] 51

CRT_BLUE CRT_GREEN CRT_RED

VSS NCTF

VGA VGA

CRT_IRTN CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC CRT_TVO_IREF CRT_VSYNC

VSS SCB

TP103 TP80 TP226 TP78

NCTF PIN

CANTIGA-GM-GP-U-NF

for Discrete

CANTIGA-GM-GP-U-NF CANTIGA-GM-GP-U-NF

NC

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size C Document Number

Cantiga-GND/LVDS/VGA(6/6)
Roberts Discrete
Sheet 12 of

Rev

-1
60

Date: Tuesday, May 19, 2009

SSID = ICH
5 OF 6 U25E AA26 AA27 AA3 AA6 AB1 AA23 AB28 AB29 AB4 AB5 AC17 AC26 AC27 AC3 AD1 AD10 AD12 AD13 AD14 AD17 AD18 AD21 AD28 AD29 AD4 AD5 AD6 AD7 AD9 AE12 AE13 AE14 AE16 AE17 AE2 AE20 AE24 AE3 AE4 AE6 AE9 AF13 AF16 AF18 AF22 AH26 AF26 AF27 AF5 AF7 AF9 AG13 AG16 AG18 AG20 AG23 AG3 AG6 AG9 AH12 AH14 AH17 AH19 AH2 AH22 AH25 AH28 AH5 AH8 AJ12 AJ14 AJ17 AJ8 B11 B14 B17 B2 B20 B23 B5 B8 C26 C27 E11 E14 E18 E2 E21 E24 E5 E8 F16 F28 F29 G12 G14 G18 G21 G24 G26 G27 G8 H2 H23 H28 H29 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS ICH9M-GP-NF VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS H5 J23 J26 J27 AC22 K28 K29 L13 L15 L2 L26 L27 L5 L7 M12 M13 M14 M15 M16 M17 M23 M28 M29 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 P12 P13 P14 P15 P16 P17 P2 P23 P28 P29 P4 P7 R11 R12 R13 R14 R15 R16 R17 R18 R28 T12 T13 T14 T15 T16 T17 T23 B26 U12 U13 U14 U15 U16 U17 AD23 U26 U27 U3 V1 V13 V15 V23 V28 V29 V4 V5 W26 W27 W3 Y1 Y28 Y29 Y4 Y5 AG28 AH6 AF2 B25 A1 A2 A28 A29 AH1 AH29 AJ1 AJ2 AJ28 AJ29 B1 B29

2 OF 6 +3.3V_RUN D11 C8 D9 E12 E9 C9 E10 B7 C7 C5 G11 F8 F11 E7 A3 D2 F10 D5 D10 B3 F7 C3 F3 F4 C1 G7 H7 D1 G5 H6 G1 H3 PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# J5 E1 J6 C4 U25B AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 PIRQA# PIRQB# PIRQC# PIRQD# ICH9M-GP-NF REQ0# GNT0# REQ1#/GPIO50 GNT1#/GPIO51 REQ2#/GPIO52 GNT2#/GPIO53 REQ3#/GPIO54 GNT3#/GPIO55 C/BE0# C/BE1# C/BE2# C/BE3# IRDY# PAR PCIRST# DEVSEL# PERR# PLOCK# SERR# STOP# TRDY# FRAME# PLTRST# PCICLK PME# F1 G4 B6 A7 F13 F12 E6 F6 D8 B4 D6 A5 D3 E3 R1 C6 E4 C2 J4 A4 F5 D7 C14 D4 R2 PCI_IRDY# PCIRST1# 1 PCI_DEVSEL# PCI_PERR# PCI_PLOCK# PCI_SERR# PCI_STOP# PCI_TRDY# PCI_FRAME# PCI_PLTRST# ICH_PME# 1 CLK_PCI_ICH TP138 19 TP135 PCI_STOP# PCI_PLOCK# PCI_IRDY# PCI_PERR# PCI_REQ0# PCI_GNT0# PCI_REQ1# PCI_GNT1# PCI_REQ2# PCI_GNT2# PCI_REQ3# PCI_GNT3# RN57 PCI_PIRQF# PCI_TRDY# PCI_REQ3# PCI_PIRQD# 8 7 6 5 1 2 3 4 SRN8K2J-4-GP RN25 PCI_PIRQB# PCI_PIRQG# PCI_REQ0# PCI_PIRQH# 8 7 6 5 1 2 3 4 SRN8K2J-4-GP RN26 8 7 6 5 1 2 3 4 SRN8K2J-4-GP RN58 PCI_DEVSEL# PCI_REQ1# PCI_FRAME# PCI_REQ2# 8 7 6 5 1 2 3 4 SRN8K2J-4-GP RN56 H4 K6 F2 G2 PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH# PCI_SERR# PCI_PIRQE# PCI_PIRQA# PCI_PIRQC# 8 7 6 5 1 2 3 4 SRN8K2J-4-GP

+3.3V_RUN

PCI

U32 5 8,25,26,29,32,38 PLT_RST# PLT_RST# 4 B VCC Y GND Do Not Stuff 1 R262 2 Do Not Stuff C5388 SC220P50V2KX-3GP 1 2 3 PCI_PLTRST#

1 TP179 1 TP261

DY

+3.3V_RUN R245 1

DY

2 1 R240 Do Not Stuff 1

Do Not Stuff U27 SPI_WP# SPI_MOSO SPI_CS#0 4 3 2 1 GND SI WP# SCLK SO HOLD# CS# VCC 5 6 7 8 SPI_MOSI SPI_CLK SPI_HOLD#

DY
2

DY
2

C315 Do Not Stuff

DY

Interrupt I/F
PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5

Do Not Stuff

RP1 USB_OC#11 USB_OC#6 USB_OC#1 USB_OC#2 +3.3V_ALW 1 2 3 4 5 SRN10KJ-L3-GP 10 9 8 7 6 USB_OC#0 USB_OC#5 USB_OC#7 USB_OC#4 +3.3V_ALW +3.3V_ALW 8 7 6 5

RN55 1 2 3 4 SRN10KJ-6-GP 4 OF 6 U25D USB_OC#3 USB_OC#10 USB_OC#8 USB_OC#9

PCI_GNT0# 1 R442 SPI_CS#1 1 R443 PCI_GNT3# 1 R441

DY DY DY

2 Do Not Stuff 2 Do Not Stuff 2 Do Not Stuff

BOOT BIOS Strap PCI_GNT#0 SPI_CS#1 BOOT BIOS Location

1 0 1

SPI PCI LPC(Default)

Direct Media Interface

N29 N28 P27 P26 26 PCIE_RXN2 26 PCIE_RXP2 26 PCIE_TXN2 26 PCIE_TXP2 38 PCIE_RXN3 38 PCIE_RXP3 38 PCIE_TXN3 38 PCIE_TXP3 L29 L28 M27 M26 J29 J28 K27 K26 G29 G28 H27 H26 25 PCIE_RXN5 25 PCIE_RXP5 25 PCIE_TXN5 25 PCIE_TXP5 E29 E28 F27 F26 C29 C28 D27 D26 SPI_CLK SPI_CS#0 SPI_MOSI SPI_MOSO R233 1 R241 1 R230 1 R237 1

PERN1 PERP1 PETN1 PETP1 PERN2 PERP2 PETN2 PETP2

DMI0RXN DMI0RXP DMI0TXN DMI0TXP DMI1RXN DMI1RXP DMI1TXN DMI1TXP DMI2RXN DMI2RXP DMI2TXN DMI2TXP DMI3RXN DMI3RXP DMI3TXN DMI3TXP

V27 V26 U29 U28 Y27 Y26 W29 W28 AB27 AB26 AA29 AA28 AD27 AD26 AC29 AC28 T26 T25 AF29 AF28 AC5 AC4 AD3 AD2 AC1 AC2 AA5 AA4 AB2 AB3 AA1 AA2 W5 W4 Y3 Y2 W1 W2 V2 V3 U5 U4 U1 U2

DMI_RXN0 DMI_RXP0 DMI_TXN0 DMI_TXP0 DMI_RXN1 DMI_RXP1 DMI_TXN1 DMI_TXP1 DMI_RXN2 DMI_RXP2 DMI_TXN2 DMI_TXP2 DMI_RXN3 DMI_RXP3 DMI_TXN3 DMI_TXP3

8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 +1.5V_RUN 2

1 1

A16 swap override strap PCI_GNT#3 low = A16 swap override enable high = default

Mini Card LAN

C500 2 C497 2

1 SCD1U16V2KX-3GP 1 SCD1U16V2KX-3GP

PCIE_C_TXN2 PCIE_C_TXP2

C506 2 C510 2

1 SCD1U16V2KX-3GP 1 SCD1U16V2KX-3GP

PCIE_C_TXN3 PCIE_C_TXP3

PCI-Express

PERN3 PERP3 PETN3 PETP3 PERN4 PERP4 PETN4 PETP4 PERN5 PERP5 PETN5 PETP5

USB Pair 0 1 2 3 4 5 6 7 8 9 10

Device USB1 USB2 USB3 RESERVED MINI CARD RESERVED BLUETOOTH NEW CARD RESERVED RESERVED Card Reader CAMERA
A

New Card

DMI_ZCOMP DMI_IRCOMP

DMI_IRCOMP_R USB_PN0 48 USB_PP0 48 USB_PN1 48 USB_PP1 48 USB_PN2 31 USB_PP2 31 TP246 TP247 USB_PN4 26 USB_PP4 26 TP250 TP251 USB_PN6 25 USB_PP6 25 USB_PN7 25 USB_PP7 25 TP248 TP249 TP252 TP253 USB_PN10 32 USB_PP10 32 USB_PN11 25 USB_PP11 25

PERN6/GLAN_RXN PERP6/GLAN_RXP PETN6/GLAN_TXN PETP6/GLAN_TXP

DY DY DY DY

2 Do Not Stuff 2 Do Not Stuff 2 Do Not Stuff 2 Do Not Stuff

SPI_CLK_R SPI_CS#0_R SPI_CS#1 SPI_MOSI_R SPI_MOSO_R USB_OC#0 USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7 USB_OC#8 USB_OC#9 USB_OC#10 USB_OC#11

D23 D24 F23 D25 E23 N4 N5 N6 P6 M1 N2 M4 M3 N3 N1 P5 P3

ICH_GND1 ICH_GND2 ICH_GND3 ICH_GND4

1 TP177 1 TP178

48 USB_OC#0 48 USB_OC#1 31 USB_OC#2

NCTF PIN
1 TP125 1 TP127 R208 1 2 22R2F-1-GP

USB_RBIAS_PN AG2 AG1

USBP0N USBP0P USBP1N USBP1P SPI_CLK USBP2N SPI_CS0# USBP2P SPI_CS1#/GPIO58/CLGPIO6 USBP3N USBP3P SPI_MOSI USBP4N SPI_MISO USBP4P USBP5N OC0#/GPIO59 USBP5P OC1#/GPIO40 USBP6N OC2#/GPIO41 USBP6P OC3#/GPIO42 USBP7N OC4#/GPIO43 USBP7P OC5#/GPIO29 USBP8N OC6#/GPIO30 USBP8P OC7#/GPIO31 USBP9N OC8#/GPIO44 USBP9P OC9#/GPIO45 USBP10N OC10#/GPIO46 USBP10P OC11#/GPIO47 USBP11N USBP11P USBRBIAS USBRBIAS#

USB_PN3 1 USB_PP3 1 USB_PN5 1 USB_PP5 1

USB1 USB2 USB3

USB

SPI

USB_PN8 1 USB_PP8 1 USB_PN9 1 USB_PP9 1 USB_PN10 USB_PP10

BlUETOOTH New Card

C518 2 C517 2

1 SCD1U16V2KX-3GP 1 SCD1U16V2KX-3GP

PCIE_C_TXN5 PCIE_C_TXP5

DMI_CLKN DMI_CLKP

CLK_PCIE_ICH# 19 CLK_PCIE_ICH 19

R429 24D9R2F-L-GP

11
Main Source

Wistron Corporation
Card Reader CAMERA Title
Size Document Number Custom 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

ICH9-PCI/PCIE/DMI/USB/GND(1/4)
Roberts Discrete
Sheet
1

ICH9M-GP-NF

Rev

hexainf@hotmail.com GRATIS - FOR FREE


5

-1
of 60

Date: Tuesday, May 19, 2009


4 3 2

13

SSID = ICH
ICH_RTCX1 R445 1 X4 1 1
D

2 10MR2J-L-GP

ICH_RTCX2

4 1 C520 SC12P50V2JN-3GP
D

X-32D768KHZ-38GPU

C522 SC12P50V2JN-3GP

1 OF 6 +RTC_CELL R456 1 2 1 2 ICH_RTCRST# ICH_RTCRST# SRTCRST# SM_INTRUDER# ICH_INTVRMEN LAN100_SLP 20KR2F-L-GP C307 SC1U10V3KX-3GP C23 C24 A25 F20 C22 B22 A22 E25 R461 1 2 C526 SC1U10V3KX-3GP F14 G13 D14 D13 D12 E13 +1.5V_RUN R506 1 R444 Do Not2 Stuff 1 20KR2F-L-GP C13 U25A RTCX1 RTCX2 FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3 FWH4/LFRAME# LDRQ0# LDRQ1#/GPIO23 A20GATE A20M# K5 K4 L6 K2 K3 J3 J1 N7 AJ27 AJ25 AE23 AJ26 AD22 AF25 AE22 AG25 L3 AF23 AF24 AH27 AG26 AG27 H_THERMTRIP_R 1 R165 H_DPRSTP# H_FERR#_R LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3

LPC_LAD[0..3]

LPC_LAD[0..3]

26,29

RTC LPC

G49 Do Not Stuff 1

RTCRST# SRTCRST# INTRUDER# INTVRMEN LAN100_SLP GLAN_CLK LAN_RSTSYNC LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2 GLAN_DOCK#/GPIO56 GLAN_COMPI GLAN_COMPO HDA_BIT_CLK HDA_SYNC HDA_RST#

LPC_LFRAME# 26,29 1

+3.3V_RUN R438

DY
R163

+RTC_CELL

Do Not Stuff KA20GATE 29 H_A20M# 4 H_DPRSTP# 5,8,39 H_DPSLP# 5 1 R166 2 56R2J-4-GP H_PWRGOOD 5,34 H_IGNNE# 4 H_INIT# 4 H_INTR 4 H_NMI 4 H_SMI# 4 H_STPCLK# 4 2 H_THERMTRIP_1 54D9R2F-L1-GP 1 R167 R242 1 +3.3V_RUN 1 +1.05V_VCCP 2

LAN / GLAN CPU

DPRSTP# DPSLP# FERR# CPUPWRGD IGNNE# INIT# INTR RCIN# NMI SMI# STPCLK# THRMTRIP#

56R2J-4-GP H_FERR# 4

Place within 500 mil of SB.


1 R201 1 R197 1 R205 1 2 33R2J-2-GP 2 33R2J-2-GP 2 33R2J-2-GP

DY

2GPIO56 GLAN_COMP ACZ_BIT_CLK ACZ_SYNC_R ACZ_RST#_R

B10 B28 B27 AF6 AH4 AE7 AF4 AG4 AH3 AE5

DY

Do Not Stuff KBRCIN# 29 +1.05V_VCCP R164 1 2 56R2J-4-GP 2 Do Not Stuff H_THRMTRIP# 4,8,29,34

24D9R2F-L-GP 36 ICH_AZ_CODEC_BITCLK 36 ICH_AZ_CODEC_SYNC 36 ICH_AZ_CODEC_RST#

36 ICH_SDIN_CODEC 36 ICH_SDOUT_CODEC 1 1 1 R194 C227 Do Not Stuff 2 33R2J-2-GP ACZ_SDATAOUT_R C230 Do Not Stuff SATA_LED#

IHDA

HDA_SDIN0 HDA_SDIN1 HDA_SDIN2 HDA_SDIN3 HDA_SDOUT

PECI SATA4RXN SATA4RXP SATA4TXN SATA4TXP SATA5RXN SATA5RXP SATA5TXN SATA5TXP SATA_CLKN SATA_CLKP SATARBIAS# SATARBIAS

Placed Within 2" from SB.


AH11 AJ11 AG12 AF12 AH9 AJ9 AE10 AF10 AH18 AJ18 AJ7 AH7 SATARBIAS 1 R187 2 24D9R2F-L-GP CLK_PCIE_SATA# 19 CLK_PCIE_SATA 19

-1

AG5 AG7 AE8

DY
2

DY
2

HDA_DOCK_EN#/GPIO33 HDA_DOCK_RST#/GPIO34 SATALED#

1 TP235

AG8 AJ16 AH16 AF17 AG17 AH13 AJ13 AG14 AF14

C473 1 C474 1

2 SCD01U50V2KX-1GP 2 SCD01U50V2KX-1GP

SATA_TXN0_C SATA_TXP0_C

SATA

HDD ODD

23 SATA_RXN0_C 23 SATA_RXP0_C 23 SATA_TXN0 23 SATA_TXP0 23 SATA_RXN1_C 23 SATA_RXP1_C 23 SATA_TXN1 23 SATA_TXP1

SATA0RXN SATA0RXP SATA0TXN SATA0TXP SATA1RXN SATA1RXP SATA1TXN SATA1TXP ICH9M-GP-NF

C475 1 C476 1

2 SCD01U50V2KX-1GP 2 SCD01U50V2KX-1GP

SATA_TXN1_C SATA_TXP1_C

Place within 500 mils from SB.

+RTC_CELL R448 2
A

1 330KR2F-L-GP R271

ICH_INTVRMEN

integrated VccSus1_05,VccSus1_5,VccCL1_5

INTVRMEN
LAN100_SLP

High=Enable High=Enable

Low=Disable
Main Source

integrated VccLan1_05VccCL1_05
2 1 330KR2F-L-GP R264 2 1 1MR2J-1-GP SM_INTRUDER#

LAN100_SLP

Low=Disable

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

ICH9-LAN/HDA/SATA/LPC(2/4)
Roberts Discrete
Sheet
1

Rev

-1
of 60

Date: Tuesday, May 19, 2009


5 4 3 2

14

SSID = ICH
3 OF 6 +3.3V_ALW U25C 25,26 SMB_CLK 25,26 SMB_DATA RN60 4 3
D

+3.3V_RUN RN49 SATA0GP/GPIO21 SATA1GP/GPIO19 SATA4GP/GPIO36 SATA5GP/GPIO37 CLK14 CLK48 SUSCLK SLP_S3# SLP_S4# SLP_S5# AH23 AF19 AE21 AD20 H1 AF3 P1 C16 E16 G17 ICH_SUSCLK SB_SLP_S3# PM_SLP_S5# GPIO26 PM_PWROK DPRSLPVR 8,39 PM_BATLOW#_R PM_PWRBTN# 29 LAN_RST#1 RSMRST#_KBC 29 CK_PWRGD 19 M_PWROK PM_SLP_M# 1 TP183 F24 B19 F22 C19 C25 A19 F21 D18 A16 C18 C11 C20 GPIO24 GPIO10 GPIO14 1 1 TP180 R268 Do Not Stuff CL_VREF0_ICH CL_VREF1_ICH CL_RST#0 8 2 +3.3V_ALW 1 CL_CLK0 8 CL_DATA0 8 M_PWROK 8 M_PWROK 1 R439 2 Do Not Stuff +3.3V_RUN 1 PM_PWROK 8,29,35 GPIO10 GPIO13 GPIO14 GPIO17 GPIO48 R502 R503 R507 R504 R505 Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff 1 1 TP182 PM_SLP_S4# 25,29,44 TP259 SATA0GP SATA1GP SATA2GP SATA3GP CLK_14M_ICH 19 CLK_48M_ICH 19 ICH_SUSCLK 35 PM_PWROK DPRSLPVR LAN_RST#1 RSMRST#_KBC R440 R232 R266 R447 1 1 1 1 SATA2GP SATA3GP SATA1GP SATA0GP 8 7 6 5 1 2 3 4 SRN10KJ-6-GP
D

1 2 SRN2K2J-1-GP

SMB_DATA SMB_CLK TP257

RI# SUS_STAT#/LPCPD# SYS_RESET# PMSYNC#/GPIO0 SMBALERT#/GPIO11

R267 1 RN59 4 3

2 10KR2J-3-GP

LINKALERT#

26 ITP_DBRESET#_1 8 PM_SYNC#

SUS_STAT# ITP_DBRESET#_1

R4 G19 M6

Clocks

ICH_RI#

F19

SMB

LINKALERT# ME_EC_CLK1 ME_EC_DATA1

G16 A13 E17 C17 B18

SMBCLK SMBDATA LINKALERT#/GPIO60/CLGPIO4 SMLINK0 SMLINK1

SATA GPIO

DY

1 2 SRN10KJ-5-GP

ME_EC_DATA1 ME_EC_CLK1

1 TP186 19 H_STP_PCI# 19 H_STP_CPU# 29 PM_CLKRUN#

SMB_ALERT# H_STP_PCI# H_STP_CPU#

A17 A14 E19 L4

2 2 2 2

10KR2J-3-GP Do Not Stuff Do Not Stuff 10KR2J-3-GP

S4_STATE#/GPIO26 C10

SYS GPIO Power MGT

STP_PCI# STP_CPU# CLKRUN# WAKE# SERIRQ THRM# VRMPWRGD SST

PWROK

G20

DPRSLPVR/GPIO16 M2 BATLOW# PWRBTN# LAN_RST# RSMRST# CK_PWRGD CLPWROK SLP_M# CL_CLK0 CL_CLK1 CL_DATA0 CL_DATA1 CL_VREF0 CL_VREF1 CL_RST0# CL_RST1# GPIO24/MEM_LED GPIO10/SUS_PWR_ACK GPIO14/AC_PRESENT GPIO9/WOL_EN B13 R3 D20 D22 R5 R6 B16

R455 1 RN61 8 7 6 5

2 10KR2J-3-GP

PCIE_WAKE#

25,38 PCIE_WAKE# 29 INT_SERIRQ 35 THERM_SCI# 29,39 VGATE_PWRGD R263 1 29 29 29

PCIE_WAKE# INT_SERIRQ VGATE_PWRGD ICH_TP7 ECSCI# PLTRST_DELAY#_SB ECSWI# ECSMI# GPIO12 GPIO13 GPIO17 GPIO18 GPIO22 GPIO27 GPIO28 CLK_SEL0 CLK_SEL1 GPIO48 1 iTPM_EN

E20 M5 AJ23 D21 A20 AG19 AH21 AG21 A21 C12 C21 AE18 K1 AF8 AJ22 A9 D19 L1 AE19 AG22 AF21 AH24 A8 M7 AJ24 B21 AH20 AJ20 AJ21

1 2 3 4 SRN8K2J-4-GP

SMB_ALERT# PM_BATLOW#_R ITP_DBRESET#_1 ICH_RI#

1 1 1 1 1

DY DY DY DY DY

2 2 2 2 2

DY
ECSCI#

2 Do Not Stuff

R451 1

2 10KR2J-3-GP

ECSMI#

ECSWI# ECSMI# TP181 TP168

1 1 1 1 1

MISC GPIO Controller Link

+3.3V_RUN RN63 4 3

C523 SCD1U10V2KX-4GP

TP123 TP184 TP262 19 CLKSATAREQ# 1 2 H_STP_CPU# H_STP_PCI# TP124 36 SB_SPKR 8 MCH_ICH_SYNC# TP263

DY
1 1 2 2 1 2 2

C309 Do Not Stuff

DY
2 +3.3V_RUN +3.3V_RUN 1

DY
2

iTPM Select
1 R179 Do Not Stuff 1

DY
2 1

R449 Do Not Stuff

iTPM_EN R446 100KR2J-1-GP

iTPM_EN

DY DY
2 2

R423 Do Not Stuff CLK_SEL0 CLK_SEL1

R261 Do Not Stuff

R235 R244 R247 R421 R424 R180 R238

DY

2 2 1 1 2 1 1

8K2R2J-3-GP 8K2R2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP Do Not Stuff 10KR2J-3-GP

PM_CLKRUN# INT_SERIRQ GPIO18 ECSCI# ECSWI# GPIO22 CLKSATAREQ#

ICH_TP3

SPKR MCH_SYNC# TP3 PWM0 PWM1 PWM2 ICH9M-GP-NF

DY
1 2

Do Not Stuff

R450 453R2F-1-GP

TACH1/GPIO1 TACH2/GPIO6 TACH3/GPIO7 GPIO8 LAN_PHY_PWR_CTRL/GPIO12 ENERGY_DETECT/GPIO13 TACH0/GPIO17 GPIO18 GPIO20 SCLOCK/GPIO22 GPIO27 GPIO28 SATACLKREQ#/GPIO35 SLOAD/GPIO38 SDATAOUT0/GPIO39 SDATAOUT1/GPIO48 GPIO49 GPIO57/CLGPIO5

R454 3K24R2F-GP 2

CLK Gen Select


CLK_SEL0 CLL_SEL1
R5398 PLTRST_DELAY#_SB 1

0 = Disable
1 1

1 = Enable

R185 Do Not Stuff

DY DY
2 2

R427 Do Not Stuff

Disable Seligo Realtek ICS

X 1 1 0

X 1 0 1

DY

PLTRST_DELAY#

PLTRST_DELAY# 29,51

Do Not Stuff

+3.3V_ALW

U29 1 +3.3V_RUN SB_SLP_S3# 2 3 RN62 4 3 1 2 SRN2K2J-1-GP


A A

B A

DY

VCC Y

5 4 PM_SLP_S3# PM_SLP_S3# 25,29,34,35,42,43,44,50

GND Do Not Stuff 1 R265 2 Do Not Stuff

U56 17,18,19 ICH_SMBDATA 1 2 SMB_CLK 3 2N7002SPT 6 5 4 ICH_SMBCLK 17,18,19 SMB_DATA

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

ICH9-GPIO/PM/CL(3/4)
Roberts Discrete
Sheet
1

Rev

hexainf@hotmail.com GRATIS - FOR FREE


5

-1
of 60

Date: Tuesday, May 19, 2009


4 3 2

15

+RTC_CELL

6 OF 6 U25F A23 C524 SCD1U10V2KX-4GP C525 SCD1U10V2KX-4GP C496 SCD1U10V2KX-4GP C501 SCD1U10V2KX-4GP VCCRTC V5REF 2mA V5REF_SUS 2mA VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B V5REF_S0 V5REF_S5 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 A15 B15 C15 D15 E15 F15 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18 C495 Do Not Stuff C492 Do Not Stuff C503 Do Not Stuff

+1.05V_VCCP

SSID = ICH
1 2

A6 AE1 AA24 AA25 AB24 AB25 AC24 AC25 AD24 AD25 AE25 AE26 AE27 AE28 AE29 F25 G25 H24 H25 J24 J25 K24 K25 L23 L24 L25 M24 M25 N23 N24 N25 P24 P25 R24 R25 R26 R27 T24 T27 T28 T29 U24 U25 V24 V25 U23 W24 W25 K23 Y24 Y25 AJ19 AC16 AD15 AD16 AE15 AF15 AG15 AH15 AJ15 AC11 AD11 AE11 AF11 AG10 AG11 AH10 AJ10 AC9

A00

DY
2

DY
2

DY
2

1634mA

*Within a given well, 5VREF needs to be up before the corresponding 3.3V rail

1D5V_DMIPLL_ICH_S0 C263 SCD01U16V2KX-3GP 1D5V_DMIPLL_ICH_S0 1 C265 SC10U6D3V5MX-3GP L5 2 1 IND-1D2UH-7-GP

+1.5V_RUN

D15 CH751H-40PT

D14 CH751H-40PT

CORE

R274 10R2J-2-GP 1 1 V5REF_S5

R213 10R2J-2-GP 1

+3.3V_RUN

+5V_RUN

+3.3V_ALW

+5V_ALW

V5REF_S0

+1.05V_VCCP C253 SC4D7U6D3V3KX-GP 1 R434 2 Do Not Stuff +1.05V_VCCP

VCCDMI C488 SCD1U10V2KX-4GP 1 1

C304 SC1U10V3KX-3GP

C242 SCD1U16V2KX-3GP

23mA VCCDMIPLL R29


W23 50mA VCCDMI Y23 VCCDMI AB23 2mA V_CPU_IO AC23 V_CPU_IO VCC3_3 VCCA3GP VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 AG29 AJ6 AC10 AD19 AF20 AG24 AC20 B9 F9 G3 G6 J2 J7 K7 PCI_VCCP_CORE_S0 SB_VCC_3_3_C 3D3V_VCCPCORE_ICH_S0 SB_V_CPU_IO

C252 SC10U6D3V5MX-3GP

C478 SCD1U10V2KX-4GP

+1.5V_RUN

+3.3V_RUN 2 1 R430 2 Do Not Stuff 1 C477 SCD1U10V2KX-4GP 1 R437 2 Do Not Stuff

DY
2

C246 SC10U6D3V5MX-3GP

C244 SC10U6D3V5MX-3GP

C251 SC2D2U10V3KX-1GP

C489 Do Not Stuff

C512 Do Not Stuff

TC9 Do Not Stuff

C231 SC4D7U6D3V3KX-GP

C479 Do Not Stuff

646mA

SB_V_CPU_IO

1 R431 2 Do Not Stuff

DY
2

DY
2

DY
2

VCCP_CORE

+3.3V_RUN

308mA

C507 SCD1U10V2KX-4GP

C509 SCD1U10V2KX-4GP

C516 SCD1U10V2KX-4GP

+1.5V_RUN +3.3V_RUN L4

+VCCSATAPLL

+3.3V_RUN SB_VCC_3_3_C C232 SC1U10V3KX-3GP EC56 SCD1U25V3KX-GP +3.3V_ALW 1 C217 SCD1U10V2KX-4GP 1 R191 2 Do Not Stuff C223 SCD1U10V2KX-4GP 1 1 1 R177 2 Do Not Stuff

C213 SC10U6D3V5MX-3GP

C219 SC1U10V3KX-3GP

1 2 L-10UH-11-GP C306 SCD1U10V2KX-4GP C301 Do Not Stuff 1 R269 2 Do Not Stuff 1 SB_VCCLAN3_3 1 1

PCI

11mA VCCHDA AJ4


AJ3 AC8 F17 AD8 F18 A18 D16 D17 E22 AF1 T1 T2 T3 T4 T5 T6 U6 U7 V6 V7 W6 W7 Y6 Y7 T7 G22 G23

SB_VCCHDA +VCCSUSHDA VCCSUS1_05[1] VCCSUS1_05[2] VCCSUS1_5[1] VCCSUS1_5[2] C515 SCD1U10V2KX-4GP 1 1 TP243 TP260 1

47mA 11mA VCCSUSHDA VCCSATAPLL


VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCCPUSB VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCCUSBPLL 11mA VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCCLAN1_05 VCCLAN1_05 VCCLAN3_378mA VCCLAN3_3 VCCGLANPLL23mA USB CORE VCCSUS1_05 VCCSUS1_05 ARX VCCSUS1_5 VCCSUS1_5 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCCL1_05 VCCCL1_5

DY
2

DY

+1.5V_RUN

+1.5V_RUN

Do Not Stuff

C481 SC1U10V3KX-3GP

C220 SC1U10V3KX-3GP

C303 SC2D2U10V3KX-1GP

1 R5400 2 Do Not Stuff

VCC_GLAN_PLL 1 1

C312 SC10U6D3V5MX-3GP

A00

VCCPSUS

+1.5V_RUN

R172

ATX

1342mA

+1.5V_RUN

+3.3V_RUN +3.3V_ALW SB_VCCHDA 1 R188 2 Do Not Stuff

C480 SCD1U10V2KX-4GP

C485 SCD1U10V2KX-4GP

SB_VCCSUS3_3 C308 SCD1U10V2KX-4GP C313 Do Not Stuff C302 Do Not Stuff 1 1 1

AC18 AC19 AC21 G10 G9 AC12 AC13 AC14 AJ5 AA7 AB6 AB7 AC6 AC7 A10 A11 A12 B12 A27 D28 D29 E26 E27

1 R270 2 Do Not Stuff

212mA

DY
2

DY
2

+1.5V_RUN 1 R183 2 Do Not Stuff 1

1 C491 SCD1U16V2KX-3GP C490 SCD022U16V2KX-3GP 1 R436 2 Do Not Stuff 1 2 2 1 2 +3.3V_ALW C221 SCD1U10V2KX-4GP

1D5V_USB_S0 C482 SCD1U10V2KX-4GP C483 SCD1U10V2KX-4GP C222 Do Not Stuff 1 1

DY
2

73mA

VCCCL3_3 VCCCL3_3

A24 B24

VCCLAN1D05 1
A

VCCSUS1_05[3] Main Source VCCSUS1_5[3] C513 SC1U10V3KX-3GP C511 SCD1U10V2KX-4GP C514 SCD1U10V2KX-4GP
A

C521 Do Not Stuff +1.5V_RUN C279 Do Not Stuff

DY
2

SB_VCCLAN3_3 VCC_GLAN_PLL

C493 SCD1U10V2KX-4GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

C276 SC4D7U6D3V3KX-GP

DY

+3.3V_RUN 1 R453 2 Do Not Stuff 3D3V_GLAN_S0

VCCGLAN1_5 VCCGLAN1_5 VCCGLAN1_5 VCCGLAN1_5

SB_VCCCL3_3

A26

VCCGLAN3_31mA ICH9M-GP-NF
3

1 R452 2 Do Not Stuff

+3.3V_RUN

GLAN POWER

80mA

ICH9-POWER(4/4)
Roberts Discrete
Sheet
1

Rev

A00
5 4

-1
of 60

Date: Tuesday, May 19, 2009


2

16

DM2

SSID = MEMORY

9 M_A_DQS#[7..0] 9 M_A_DQ[63..0]
D

C72 Do Not Stuff

C74 Do Not Stuff

C192 Do Not Stuff

C195 Do Not Stuff

9 M_A_DM[7..0] 9 M_A_DQS[7..0] 9 M_A_BS#2 9 M_A_A[14..0] 9 M_A_BS#0 9 M_A_BS#1

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_BS#2 M_A_BS#0 M_A_BS#1 M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7 M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 +V_DDR_MCH_REF 8 8 M_ODT0 M_ODT1 M_ODT0 M_ODT1

107 106 5 7 17 19 4 6 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194 11 29 49 68 129 146 167 186 13 31 51 70 131 148 169 188 114 119 1 2

BA0 BA1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7# DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 OTD0 OTD1 VREF VSS GND MH1 SKT-SODIMM200-37GP

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 SDA SCL VDDSPD SA0 SA1 NC#50 NC#69 NC#83 NC#120 NC#163/TEST VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS GND MH2

195 197 199 198 200 50 69 83 120 163 81 82 87 88 95 96 103 104 111 112 117 118 3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165 168 171 172 177 178 183 184 187 190 193 196 201 MH2

ICH_SMBDATA ICH_SMBCLK

ICH_SMBDATA 15,18,19 ICH_SMBCLK 15,18,19 +3.3V_RUN

1 R55 1 R56

2 Do Not Stuff 2 Do Not Stuff

-1

+3.3V_RUN

C54 SCD1U16V2KX-3GP

+1.8V_SUS

Layout Note: Place near DM1


C122 SC2D2U10V3KX-1GP C116 SC2D2U10V3KX-1GP C160 Do Not Stuff C138 Do Not Stuff C109 SCD1U16V2KX-3GP C100 SCD1U16V2KX-3GP C106 SCD1U16V2KX-3GP TC8 Do Not Stuff

PM_EXTTS#0 8

DY
2

C132 SC2D2U10V3KX-1GP

+1.8V_SUS

C93 Do Not Stuff

C53 Do Not Stuff

102 101 100 99 98 97 94 92 93 91 105 90 89 116 86 84 85

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16/BA2

RAS# WE# CAS# CS0# CS1# CKE0 CKE1 CK0 CK0# CK1 CK1#

108 109 113 110 115 79 80 30 32 164 166 10 26 52 67 130 147 170 185 M_CLK_DDR0 M_CLK_DDR#0 M_CLK_DDR1 M_CLK_DDR#1 M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_RAS# 9 M_A_WE# 9 M_A_CAS# 9 M_CS0# 8 M_CS1# 8 M_CKE0 8 M_CKE1 8 M_CLK_DDR0 8 M_CLK_DDR#0 8 M_CLK_DDR1 8 M_CLK_DDR#1 8

put near connector


M_CLK_DDR0 M_CLK_DDR#0 M_CLK_DDR1 M_CLK_DDR#1

DY
2

DY
2

DY
2

DY
2

Layout Note: Place these resistors close to DM1, all trace length Max=1.5".
+0.9V_DDR_VTT RN37 M_A_A9 M_A_A12 1 2 4 3 SRN56J-4-GP RN31 M_A_A10 M_A_BS#0 4 3 1 2 SRN56J-4-GP RN4 M_ODT0 M_CS0# 4 3 1 2 SRN56J-4-GP RN12 M_CKE1 M_A_A14 4 3 1 2 SRN56J-4-GP RN29 M_A_WE# M_A_CAS# 4 3 1 2 SRN56J-4-GP RN28 M_CS1# M_ODT1 4 3 1 2 SRN56J-4-GP RN11 M_A_A11 M_A_A7 4 3 1 2 SRN56J-4-GP 4 3 4 3 1 2 4 3 4 3 4 3 4 3 RN6 1 2 SRN56J-4-GP RN35 1 2 SRN56J-4-GP RN10 1 2 SRN56J-4-GP RN33 1 2 SRN56J-4-GP RN39 4 3 SRN56J-4-GP RN8 1 2 SRN56J-4-GP RN17 1 2 SRN56J-4-GP M_A_A0 M_A_A4 M_A_BS#1 M_A_RAS# M_CKE0 M_A_BS#2 M_A_A1 M_A_A3 M_A_A6 M_A_A2
B

M_A_A13

Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT.
+0.9V_DDR_VTT

M_A_A5 M_A_A8

C96 SCD1U16V2KX-3GP

C87 SCD1U16V2KX-3GP

C409 SCD1U16V2KX-3GP

C119 SCD1U16V2KX-3GP

C115 SCD1U16V2KX-3GP

C428 SCD1U16V2KX-3GP

DY

DY

DY

DY

DY

DY

C420 SCD1U16V2KX-3GP

C101 Do Not Stuff

C103 Do Not Stuff

C432 Do Not Stuff

C114 Do Not Stuff

C83 Do Not Stuff

C118 Do Not Stuff

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

C203 SCD1U16V2KX-3GP

DY

C202 Do Not Stuff

202 MH1

DDRII-SODIMM SLOT1
Roberts Discrete
Sheet
1

Rev

hexainf@hotmail.com GRATIS - FOR FREE


5

-1
of 60

62.10017.E21
2

Date: Tuesday, May 19, 2009

17

DM1

SSID = MEMORY

MH1 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 9 M_B_BS#2 9 M_B_BS#0 9 M_B_BS#1 M_B_BS#2 M_B_BS#0 M_B_BS#1 M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63 102 101 100 99 98 97 94 92 93 91 105 90 89 116 86 84 85 107 106 5 7 17 19 4 6 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194 50 69 83 120 163 110 115 79 80 108 113 109 ICH_SMBCLK ICH_SMBDATA M_ODT2 M_ODT3 197 195 114 119 1 1 1 201 C201 SC2D2U10V3KX-1GP C200 SCD1U16V2KX-3GP

MH1 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16_BA2 BA0 BA1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

MH2 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7# DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 CK0 CK0# CK1 CK1# SA0 SA1 VDD_SPD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS GND

MH2 13 31 51 70 131 148 169 188 11 29 49 68 129 146 167 186 10 26 52 67 130 147 170 185 30 32 164 166 198 200 199 +1.8V_SUS 81 82 87 88 95 96 103 104 111 112 117 118 2 3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165 168 171 172 177 178 183 184 187 190 193 196 202 2 M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7 M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7 M_CLK_DDR2 M_CLK_DDR#2 M_CLK_DDR3 M_CLK_DDR#3 1 R57 1 R54 2 Do Not Stuff 2 Do Not Stuff +3.3V_RUN 1

put near connector


M_CLK_DDR2 M_CLK_DDR#2 M_CLK_DDR3 M_CLK_DDR#3

9 M_B_DQS#[7..0]
D

C71 Do Not Stuff

C75 Do Not Stuff

C193 Do Not Stuff

C197 Do Not Stuff

9 M_B_DQ[63..0] 9 M_B_DM[7..0] 9 M_B_DQS[7..0] 9 M_B_A[14..0]

-1
C52 SCD1U16V2KX-3GP +3.3V_RUN 2

C136 SC2D2U10V3KX-1GP

C107 SC2D2U10V3KX-1GP

C112 SC2D2U10V3KX-1GP

C105 SC2D2U10V3KX-1GP

C97 Do Not Stuff

C124 SCD1U16V2KX-3GP

C104 SCD1U16V2KX-3GP

C131 SCD1U16V2KX-3GP

C150 Do Not Stuff

TC4 Do Not Stuff

EC12 SCD1U25V3KX-GP

+1.8V_SUS

Layout Note: Place near DM2

DY

C56 Do Not Stuff

M_CLK_DDR2 M_CLK_DDR#2 M_CLK_DDR3 M_CLK_DDR#3

8 8 8 8

+3.3V_RUN

DY
2

DY
2

DY
2

Layout Note: Place these resistors close to DM2, all trace length Max=1.5".
+0.9V_DDR_VTT RN7 M_B_CAS# M_B_WE# 4 3 1 2 SRN56J-4-GP RN13 M_B_BS#2 M_CKE2 4 3 1 2 SRN56J-4-GP RN16 M_B_A5 M_B_A8 4 3 1 2 SRN56J-4-GP RN32 M_B_BS#1 M_B_A0 4 3 1 2 SRN56J-4-GP RN15 M_B_A1 M_B_A3 4 3 1 2 SRN56J-4-GP RN5 M_CS3# M_ODT3 4 3 1 2 SRN56J-4-GP RN40 M_CKE3 4 3 1 2 SRN56J-4-GP 4 3 4 3 4 3 4 3 4 3 4 3 4 3 RN27 1 2 SRN56J-4-GP RN38 1 2 SRN56J-4-GP RN36 1 2 SRN56J-4-GP RN34 1 2 SRN56J-4-GP RN9 1 2 SRN56J-4-GP RN30 1 2 SRN56J-4-GP RN14 1 2 SRN56J-4-GP M_B_A12 M_B_A9 M_B_RAS# M_CS2# M_B_A10 M_B_BS#0 M_B_A4 M_B_A2 M_B_A7 M_B_A6
B

M_ODT2 M_B_A13

+0.9V_DDR_VTT

Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT.

M_B_A14 M_B_A11

C415 SCD1U16V2KX-3GP

C425 SCD1U16V2KX-3GP

C414 SCD1U16V2KX-3GP

C406 SCD1U16V2KX-3GP

C405 SCD1U16V2KX-3GP

C95 SCD1U16V2KX-3GP

C410 SCD1U16V2KX-3GP

C88 SCD1U16V2KX-3GP

8 PM_EXTTS#1

DY

DY

DY

DY

C102 SCD1U16V2KX-3GP

C430 Do Not Stuff

C418 Do Not Stuff

C117 Do Not Stuff

C404 Do Not Stuff

NC#50 NC#69 NC#83 NC#120 NC#163/TEST CS0# CS1# CKE0 CKE1 RAS# CAS# WE# SCL SDA ODT0 ODT1 VREF GND

8 M_CS2# 8 M_CS3# 8 M_CKE2 8 M_CKE3 9 M_B_RAS# 9 M_B_CAS# 9 M_B_WE# 15,17,19 ICH_SMBCLK 15,17,19 ICH_SMBDATA +V_DDR_MCH_REF 8 8 M_ODT2 M_ODT3

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

DDRII-SODIMM SLOT2
Roberts Discrete
Sheet
1

Rev

SKT-SODIMM200-38GP 62.10017.E31
3 2

-1
of 60

Date: Tuesday, May 19, 2009

18

SSID = CLOCK
3D3V_S0_CK505 +3.3V_RUN 3D3V_S0_CK505_IO X3 C229 SC1U10V3KX-3GP C210 SCD1U16V2KX-3GP C239 SCD1U16V2KX-3GP C209 SCD1U16V2KX-3GP C215 SCD1U16V2KX-3GP C237 SCD1U16V2KX-3GP C226 Do Not Stuff 1 R204 2 Do Not Stuff 1 1 1 1 1 1 1 1 2 CLK_XTAL_OUT 1
D

NEWCARD_CLKREQ# MINI1_CLKREQ# NEWCARD_CLKREQ# CLK_PCIE_NEW CLK_PCIE_NEW#

R193 1 R195 1

2 10KR2J-3-GP 2 10KR2J-3-GP

+3.3V_RUN

C463 Do Not Stuff

C464 Do Not Stuff

3D3V_S0_CK505_IO

CLK_XTAL_IN 1

DY
2 U54 VDD96_IO VDDPLL3_IO VDDSRC_IO VDDSRC_IO VDDSRC_IO VDDCPU_IO VDDREF VDD48 VDDPCI VDDSRC VDDCPU VDDPLL3 19 27 43 52 33 56 4 16 9 46 62 23

DY
2

EC57 SC22P50V2JN-4GP

X-14D31818M-37GP C462 SC12P50V2JN-3GP

DY
2

C461 SC12P50V2JN-3GP

RN RN

A00
4 Do Not Stuff 3 4 Do Not Stuff 3 4 Do Not Stuff 3 4 Do Not Stuff 3 CLK_CPU_BCLK 4 CLK_CPU_BCLK# 4 CLK_MCH_BCLK 7 CLK_MCH_BCLK# 7 CLK_CPU_ITP 26 CLK_CPU_ITP# 26 CLK_PCIE_LAN 38 CLK_PCIE_LAN# 38

CPUT0 CPUC0 CPUT1_F CPUC1_F

61 60 58 57

CLK_CPU_BCLK1 CLK_CPU_BCLK1# CLK_MCH_BCLK1 CLK_MCH_BCLK1# CLK_CPU_ITP1 CLK_CPU_ITP1# CLK_PCIE_LAN1 CLK_PCIE_LAN1#

RN42 1 2 RN43 1 2 RN44 1 2 RN45 1 2

RN RN

3 2 32 CLK_48M_CARD 15 CLK_48M_ICH 1 C245 C233 SC1U10V3KX-3GP C211 SC10U6D3V5MX-3GP C218 SCD1U16V2KX-3GP C238 SCD1U16V2KX-3GP C207 SCD1U16V2KX-3GP C225 SCD1U16V2KX-3GP C234 SCD1U16V2KX-3GP 1 R200 2 Do Not Stuff 1 15 H_STP_PCI# 15 H_STP_CPU# R217 1 2 22R2J-2-GP 1 R216 2 22R2J-2-GP FSA 17

X1 X2

RN RN

CPUT2_ITP/SRCT8 54 CPUC2_ITP/SRCC8 53 USB_48MHZ/FSLA SRCT7/CR#_F SRCC7/CR#_E PCI_STOP# CPU_STOP# SRCT6 SRCC6 SRCT10 SRCC10 51 50 48 47 41 42

RN RN

+3.3V_RUN

3D3V_S0_CK505

DY 2Do Not Stuff


45 44

15,17,18 ICH_SMBCLK 15,17,18 ICH_SMBDATA 15 CK_PWRGD

7 6 63

SCLK SDATA CK_PWRGD/PD#

CLK_PCIE_NEW1 CLK_PCIE_NEW1#

RN48 2 1 RN RN

3 Do Not Stuff 4

CLK_PCIE_NEW 25 CLK_PCIE_NEW# 25 NEWCARD_CLKREQ# MINI1_CLKREQ# 26 25

SRCT11 SRCT11/CR#_H 40 SRCC11 SRCC11/CR#_G 39


SRCT9 SRCC9 37 38 34 35 31 32 28 29 CLK_PCIE_MINI1_1 CLK_PCIE_MINI1_1# CLK_MCH_3GPLL1 CLK_MCH_3GPLL1# CLK_PCIE_ICH1 CLK_PCIE_ICH1# CLK_PCIE_SATA1 CLK_PCIE_SATA1# RN22 2 1 RN23 2 1 RN54 2 1 RN53 2 1

3 Do Not Stuff 4 3 Do Not Stuff 4 3 Do Not Stuff 4 3 Do Not Stuff 4 RN RN

15 CLKSATAREQ# 8 CLKREQ#_B 26 PCLK_FWH 29 PCLK_KBC 13 CLK_PCI_ICH

R178 1 R196 1 R207 1 R212 1

2 475R2F-L1-GP 2 33R2J-2-GP 2 33R2J-2-GP 2 33R2J-2-GP

CLKREQ#_1 PCI2_TME 27_SEL ITP_EN

8 10 11 12 13 14

CLK_PCIE_MINI1 26 CLK_PCIE_MINI1# 26 CLK_MCH_3GPLL 8 CLK_MCH_3GPLL# 8 CLK_PCIE_ICH 13 CLK_PCIE_ICH# 13 CLK_PCIE_SATA 14 CLK_PCIE_SATA# 14 CLK_VGA_27M_NSS 52 CLK_VGA_27M_SS 52 CLK_PCIE_VGA 51 CLK_PCIE_VGA# 51

PCI0/CR#_A PCI1/CR#_B PCI2/TME PCI3 PCI4/27_SELECT PCI_F5/ITP_EN

SRCT4 SRCC4 SRCT3/CR#_C SRCC3/CR#_D SRCT2/SATAT SRCC2/SATAC

RN RN RN RN

15 CLK_14M_ICH C236 Do Not Stuff C243 Do Not Stuff C224 Do Not Stuff

R190 1

2 33R2J-2-GP

FSB FSC

64 5 55

FSLB/TEST_MODE REF0/FSLC/TEST_SEL NC#55 GND GNDSRC GNDSRC GNDSRC GNDCPU GND GND48 GNDPCI GNDREF

RN RN

27MHZ_NONSS/SRCT1/SE1 24 27MHZ_SS/SRCC1/SE2 25 SRCT0/DOTT_96 SRCC0/DOTC_96 20 21

CLK_VGA_27M_SS1 CLK_PCIE_VGA1 CLK_PCIE_VGA1#

R5397 1 RN51 2 1

33R2J-2-GP

3 Do Not Stuff 4 RN RN

GND

DY
2

DY
2

DY
2

A00
SLG8SP513VTR-GP

for Discrete Rename for GPU clock

18 15 1

22 30 36 49 59 26

65

Main source: 71.08513.003 (SLG8SP513VTR) 2nd source: 71.00875.C03 (RTM875N-606-VD-GRT)

3D3V_S0_CK505 3D3V_S0_CK505 1 3D3V_S0_CK505 2 1 1 CLK_VGA_27M_NSS R206 10KR2J-3-GP 1 EC140 Do Not Stuff 1 CLK_VGA_27M_SS EC139 Do Not Stuff

for Discrete

R209 10KR2J-3-GP 2 ITP_EN R218 Do Not Stuff

0 1

SRC8 CPU_ITP

PCI2_TME
2 PCI2_TME 1

Output Overclocking of CPU and SRC allowed

27_SEL

0
R202 Do Not Stuff

DY
2

27_SEL

PIN 20 DOT96T SRCT0

ITP_EN

Output

R198 10KR2J-3-GP

DY

DY

PIN 21 DOT96C SRCC0

DY
2

Overclocking of CPU and SRC not allowed


0 1

GM45 PM45

SEL2 SEL1 SEL0 FSC FSB FSA 1 0 0 0 0 0 0 1 1 0 1 1 1 0 0


4

CPU
100M 133M 166M 200M 266M

FSB
X 533M 667M 800M 1067M

5 CPU_BSEL2 5 CPU_BSEL1 5 CPU_BSEL0

R186 1

2 10KR2J-3-GP

FSC FSB FSA Main Source


A

1 R412 2 Do Not Stuff R214 1 2 2K2R2J-2-GP R215 1 R411 1 R181 1 2 1KR2J-1-GP 2 1KR2J-1-GP 2 1KR2J-1-GP

A00

Wistron Corporation
MCH_CLKSEL0 8 MCH_CLKSEL1 8 MCH_CLKSEL2 8 Title 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Clock Generator SLG8SP513VTR


Size Document Number Custom Date: Tuesday, May 19, 2009 Rev

hexainf@hotmail.com GRATIS - FOR FREE


5

Roberts Discrete
Sheet
1

-1
of 60

19

SSID = VIDEO

SSID = Inverter

LVDS CONNECTOR INVERTER POWER


GFX_PWR_SRC LCD1 49 1 47 51 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 50 +LCDVDD EC22 SCD1U10V2KX-4GP C76 SC1U10V3KX-3GP 1 +3.3V_RUN 1 GFX_PWR_SRC F1 2 LCD_BRIGHTNESS +3.3V_DELAY 2 1 2 D7 K 1 FUSE-3A32V-7-GP C69 SCD1U25V3KX-GP +PWR_SRC

DYR75Not Stuff Do DY
A LBKLT_CTL 51 C68 SC1KP50V2KX-1GP

46

LCD_CBL_DET# 29

1 R81 2 Do Not Stuff LCD_TST LDDC_CLK LDDC_DATA LCD_DET_G VGA_TXBOUT0VGA_TXBOUT0+ VGA_TXBOUT1VGA_TXBOUT1+ VGA_TXBOUT2VGA_TXBOUT2+ VGA_TXBCLKVGA_TXBCLK+ VGA_TXAOUT0VGA_TXAOUT0+ VGA_TXAOUT1VGA_TXAOUT1+ VGA_TXAOUT2VGA_TXAOUT2+ VGA_TXACLKVGA_TXACLK+ 1 LCD_TST 29 LDDC_CLK 52 LDDC_DATA 52 VGA_TXBOUT0- 51 VGA_TXBOUT0+ 51 VGA_TXBOUT1- 51 VGA_TXBOUT1+ 51 VGA_TXBOUT2- 51 VGA_TXBOUT2+ 51 VGA_TXBCLK- 51 VGA_TXBCLK+ 51 VGA_TXAOUT0- 51 VGA_TXAOUT0+ 51 VGA_TXAOUT1- 51 VGA_TXAOUT1+ 51 VGA_TXAOUT2- 51 VGA_TXAOUT2+ 51 VGA_TXACLK- 51 VGA_TXACLK+ 51 AFTP5 VGA_TXBOUT0VGA_TXBOUT0+ VGA_TXBOUT1VGA_TXBOUT1+ VGA_TXBOUT2VGA_TXBOUT2+ VGA_TXBCLKVGA_TXBCLK+ 1 1 1 1 1 1 1 1 1 R73 1 2 2 100R2F-L1-GP-U

BRIGHTNESS 29 BLON_OUT 29

45

A00
R5425 100KR2J-1-GP

44

43

LCD_BRIGHTNESS LCD_TST EC87 Do Not Stuff EC19 Do Not Stuff 1 1

42

SSID = VIDEO

41 48

IPEX-CONN40-2R-GP 20.F1093.040

AFTP1 AFTP3 AFTP2 AFTP4 AFTP7 AFTP6 AFTP9 AFTP8

DY
2

DY
2

Do Not Stuff

LCD POWER
For EMI request
+LCDVDD +3.3V_RUN

-1
VGA_TXBCLKVGA_TXBCLK+ VGA_TXAOUT0VGA_TXAOUT0+ VGA_TXAOUT1VGA_TXAOUT1+ VGA_TXAOUT2VGA_TXAOUT2+ VGA_TXACLKVGA_TXACLK+ VGA_TXBOUT0VGA_TXBOUT0+ VGA_TXBOUT1VGA_TXBOUT1+ VGA_TXBOUT2VGA_TXBOUT2+ 29 LCD_TST_EN 2 BAT54CPT-GP D20 51 LCDVDD_EN 1 3ENVDD_D 1 1 R508 2 0R2J-2-GP 1 ENVDD C392 Do Not Stuff 1 2 3 4 R359 49K9R2F-L-GP

U48 IN#1 OUT EN GND GND IN#8 IN#7 IN#6 IN#5 9 8 7 6 5 1 G5281RC1U-GP 2

DY
2

EC30 Do Not Stuff

EC29 Do Not Stuff

EC36 Do Not Stuff

EC35 Do Not Stuff

EC39 Do Not Stuff

EC40 Do Not Stuff

EC26 Do Not Stuff

EC25 Do Not Stuff

EC24 Do Not Stuff

EC23 Do Not Stuff

EC28 Do Not Stuff

EC27 Do Not Stuff

EC21 Do Not Stuff

EC20 Do Not Stuff

EC38 Do Not Stuff

EC37 Do Not Stuff

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

For EMI request

Size Document Number Custom

LCD/Inverter Connector
Roberts Discrete
Sheet 20 of

Rev

Date: Tuesday, May 19, 2009

60

C73 SC1U10V3KX-3GP

-1

(Blanking)

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

CRT
Rev

hexainf@hotmail.com GRATIS - FOR FREE


5

Roberts Discrete
Sheet
1

-1
of 60

Date: Tuesday, May 19, 2009


4 3 2

21

(Blanking)

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

HDMI
Rev

Roberts Discrete
Sheet
1

-1
of 60

Date: Tuesday, May 19, 2009


5 4 3 2

22

SSID = SATA

+5V_HDD

+5V_RUN

SATA HDD Connector


HDD1 1 AFTP10 1 AFTP11 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 C498 Do Not Stuff P1 P2 P3 P4 P5 P6 P7 NP2 17 SKT-SATA7P+15P-23-GP 22.10300.431 16 NP1 S1

G81 2 Do Not Stuff G82 2 Do Not Stuff 1 1

+5V_HDD 1 C289 SC10U6D3V5MX-3GP 1 2 C277 SCD1U16V2KX-3GP +3.3V_RUN 1 C508 Do Not Stuff 14 SATA_RXP0_C 14 SATA_RXN0_C SC3900P50V2KX-2GP 1 SC3900P50V2KX-2GP 1 2 C254 2 C250 SATA_RXP0 SATA_RXN0 2 14 SATA_TXN0 14 SATA_TXP0 AFTP12 AFTP14 AFTP13 AFTP16 AFTP15 AFTP17 1 1 1 1 1 1 +3.3V_RUN +5V_HDD SATA_RXP0 SATA_RXN0 SATA_TXN0 SATA_TXP0

DY DY
2

SSID = SATA

+5V_MOD

+5V_RUN

ODD Connector
ODD1 8 NP1 S1 S2 S3 S4 S5 S6 S7 P1 P2 P3 P4 P5 P6 NP2 9 SKT-SATA7P+6P-62-GP 22.10300.421 1 AFTP18 SATA_TXP1 14 SATA_TXN1 14 SATA_RX1-_C SATA_RX1+_C SCD01U50V2KX-1GP 1 SCD01U50V2KX-1GP 1 2 C469 2 C467 SATA_RXN1_C 14 SATA_RXP1_C 14 +5V_MOD

G83 G84 G85 G86

2 2 2 2

1 Do Not Stuff 1 Do Not Stuff 1 Do Not Stuff 1 Do Not Stuff

AFTP20 AFTP21 AFTP22 AFTP24 AFTP23

1 1 1 1 1

+5V_MOD SATA_TXN1 SATA_TXP1 SATA_RX1-_C SATA_RX1+_C

ODD_MD 1 AFTP19

C452 SCD1U10V2KX-4GP

1 C455 SC10U6D3V5MX-3GP

SATA_RX- and SATA_RX+ Trace Length match within 20 mil

SSID = Thermal

Fan Connector
FAN1 4

3
35 EMC2102_FAN_TACH_1 35 EMC2102_FAN_DRIVE EMC2102_FAN_TACH_1 AFTP25 EMC2102_FAN_DRIVE 1 3 2 1 K 5 D4 RB551V30-GP A MLX-CON3-6-GP-U 20.F0700.003

1
Main Source

*Layout* 15 mil

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title AFTP26 AFTP27 1 1 EMC2102_FAN_TACH_1 EMC2102_FAN_DRIVE Size Document Number Custom

C16 SC22U6D3V5MX-2GP

HDD/ODD/FAN
Roberts Discrete
Sheet 23 of

Rev

hexainf@hotmail.com GRATIS - FOR FREE

-1
60

Date: Tuesday, May 19, 2009

(Blanking)

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

PCI
Rev

Roberts Discrete
Sheet
1

-1
of 60

Date: Tuesday, May 19, 2009


5 4 3 2

24

SSID = ExpressCard Camera Connector


D

SSID = User.Interface
AFTP92 AFTP96 AFTP95 AFTP98 AFTP97 AFTP100 AFTP99 AFTP101 AFTP102 AFTP103 AFTP104 1 1 1 1 1 1 1 1 1 1 1 PCIE_TXP5 PCIE_TXN5 PCIE_RXP5 PCIE_RXN5 CLK_PCIE_NEW CLK_PCIE_NEW# +3.3V_ALW LID_CLOSE# CPUSB# USB_PP7 USB_PN7 CAMERA1 10 8 7 6 5 4 3 2 1 9 Do Not Stuff AFTP105 AFTP106 AFTP108 AFTP110 AFTP109 AFTP112 AFTP111 AFTP113 1 1 1 1 1 1 1 1 NEWCARD_CLKREQ# +3.3V_CARD PERST# +3.3V_CARDAUX PCIE_WAKE# +1.5V_CARD SMB_DATA SMB_CLK ACES-CON8-3-GP-U AUD_DMIC_CLK_G_R AUD_DMIC_IN0_R R69 R70 1 2 33R2J-2-GP CAMERA_DET# 29 AUD_DMIC_CLK_G 36 4 AUD_DMIC_IN0 36 3 USB_PN11 13
D

Place them Near to Chip


+3.3V_ALW C499 SCD1U16V2KX-3GP +1.5V_RUN C487 SCD1U16V2KX-3GP C504 Do Not Stuff +3.3V_RUN C484 SC10U6D3V5MX-3GP C256 SC4D7U6D3V5KX-3GP +3.3V_CARD C262 SC10U6D3V5MX-3GP C486 SCD1U16V2KX-3GP +1.5V_CARD C502 SCD1U16V2KX-3GP +3.3V_CARDAUX C505 SCD1U16V2KX-3GP

1 2 33R2J-2-GP +3.3V_CAMERA

DY
EC17 Do Not Stuff

L2 Do Not Stuff

DY
2

DY
2

DY
2

C65

DY

AFTP107

EC18 Do Not Stuff

USB_PP11 13

AUD_DMIC_IN0_R EC15 Do Not Stuff NEWCARD_OC# AFTP114 PM_SLP_S3# 15,29,34,35,42,43,44,50 21 19 18 1 +3.3V_RUN 1 R77 2 Do Not Stuff 1 EC16 Do Not Stuff SHDN# PERST# CPUSB# CPPE# SYSRST# 20 8 9 10 6 PERST# CPUSB# CPPE# NRST RN24 3 4 PM_SLP_S4# 15,29,44 2 1 +3.3V_ALW 1 EC14 Do Not Stuff

+3.3V_CAMERA

DY
2

DY
2

U55

Digital Mic Power

AUD_DMIC_CLK_G_R

GND OC# RCLKEN STBY#

GND

DY
2 2

C66 SC4D7U6D3V3KX-GP AFTP89 AFTP88 AFTP90 AFTP91 AFTP93 AFTP94 1 1 1 1 1 1 CAMERA_DET# AUD_DMIC_CLK_G_R AUD_DMIC_IN0_R +3.3V_CAMERA USB_PN11 USB_PP11

+1.5V_RUN +1.5V_CARD +3.3V_CARD +3.3V_RUN

16 14 13 5 4

NC#16 1_5VIN 1_5VOUT 3_3VOUT 3_3VIN AUXOUT AUXIN 1_5VOUT 1_5VIN 3_3VOUT 3_3VIN

DY
1 R435

Do Not Stuff

-1
PLT_RST# 8,13,26,29,32,38

2 Do Not Stuff Do Not Stuff

C494 2 G577DSR91U-GP

1 DY

+3.3V_CARDAUX +3.3V_ALW +1.5V_CARD

15 17 11 12 3 2

+3.3V_RUN +3.3V_CARD +1.5V_RUN

+1.5V_CARD Max. 650mA, Average 500mA. +3.3V_CARD Max. 1300mA, Average 1000mA +3.3V_CARDAUX Max. 275mA
B

SSID = User.Interface
+3.3V_RUN

Bluetooth Module conn.


BT1 11 1 2 3 4 5 6 7 8 9 10 C77 SC2D2U10V3KX-1GP
B

26,46 BT_ACT 26,46 WLAN_ACT 13 USB_PP6 13 USB_PN6 29 BLUETOOTH_EN

New Card Connector


NEW1 31 NP1 1 AFTP121 19 NEWCARD_CLKREQ# +3.3V_CARD 1 CPPE# NEWCARD_CLKREQ# PERST# +3.3V_CARDAUX 15,38 PCIE_WAKE# +1.5V_CARD
A

R83 10KR2J-3-GP

EC33 Do Not Stuff

EC31 Do Not Stuff

R74 Do Not Stuff

EC32 Do Not Stuff

12 FOX-CON10-GP-U 20.F0711.010

DY
2 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 1 AFTP120 PCIE_TXP5 13 PCIE_TXN5 13 PCIE_RXP5 13 PCIE_RXN5 13 CLK_PCIE_NEW 19 CLK_PCIE_NEW# 19 LID_CLOSE# CPUSB# +3.3V_ALW LID_CLOSE# 29 USB_PP7 13 USB_PN7 13 1 1 AFTP116 AFTP115 AFTP117 AFTP118 AFTP119 1 1 1 1 1 USB_PP6 USB_PN6 BLUETOOTH_EN WLAN_ACT +3.3V_RUN

DY
2

DY
2

DY
2

15,26 SMB_DATA 15,26 SMB_CLK AFTP123 AFTP122

1 1

CONN_TP2 CONN_TP3

3 5 7 9 11 13 15 17 19 21 23 25 27 29 NP2 32

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

FOX-CONN30A-9GP 20.F0908.030

DY
2

EC70 Do Not Stuff

DY

EC69 Do Not Stuff

Bluetooth/CAM/New Card
Roberts Discrete
Sheet
1

Rev

hexainf@hotmail.com GRATIS - FOR FREE


5

-1
of 60

Date: Tuesday, May 19, 2009


4 3 2

25

SSID = Wireless

SSID = SDIO
MINI1 53 C5385 Do Not Stuff C272 Do Not Stuff C275 Do Not Stuff +1.5V_RUN +3.3V_RUN +3.3V_RUN_CARD C274 SC2D2U10V3KX-1GP C287 SCD1U16V2KX-3GP

SD/XD/MS Card Reader


EC74 Do Not Stuff EC75 Do Not Stuff EC142 Do Not Stuff EC145 Do Not Stuff EC147 Do Not Stuff EC146 Do Not Stuff EC144 Do Not Stuff EC143 Do Not Stuff SD_DAT0/XD_D6/MS_D0 XD_D4/SD_DAT1 SD_DAT2/XD_RE# SD_DAT3/XD_WE# SD_CMD SD_CLK SD_CD# SD_WP 1 1 AFTP29 AFTP28 AFTP30 AFTP42 AFTP41 AFTP32 AFTP31 AFTP34 AFTP33 AFTP45 AFTP44 AFTP36 AFTP35 AFTP46 SD_CMD 1 SD_CD# 1 SD_WP 1 MS_INS# 1 XD_D0 1 XD_RDY 1 XD_CE# 1 XD_CLE 1 XD_ALE 1 XD_WP# 1 XD_CD# 1 SD_CLK 1 MS_CLK 1 1 SD_CLK/XD_D1/MS_CLK

Mini Card Connector(802.11a/b/g)


1 1 1 1 1
D

1 AFTP43

MINI_2_WAKE#

NP1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 R493 LPC_LFRAME#_IN 1 R494 LPC_LAD3_IN 1 R495 LPC_LAD2_IN 1 R496 LPC_LAD1_IN 1 R497 LPC_LAD0_IN 1

25,46 WLAN_ACT 25,46 BT_ACT 19 MINI1_CLKREQ#

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

For EMI
+3.3V_RUN_CARD CARD1 23 14 33 8 9 26 27 28 30 31 32 1 2 3 4 5 6 7 34 NP1 NP2 SD_VCC MS_VCC XD_VCC XD_D0 XD_D1 XD_D2 XD_D3 XD_D4 XD_D5 XD_D6 XD_D7 XD_R/B XD_RE XD_CE XD_CLE XD_ALE XD_WE XD_WP XD_CD_SW NP1 NP2 CARD-PUSH-36P-5-GP SD_DAT0 SD_DAT1 SD_DAT2 SD_DAT3 SD_CMD SD_CLK SD_CD_SW SD_WP_SW MS_DATA0 MS_DATA1 MS_DATA2 MS_DATA3 MS_BS MS_INS MS_SCLK 4IN1_GND 4IN1_GND 4IN1_GND 4IN1_GND 25 29 10 11 12 24 36 35 19 20 18 16 21 17 15 13 22 38 37 SD_DAT0/XD_D6/MS_D0 XD_D4/SD_DAT1 SD_DAT2/XD_RE# SD_DAT3/XD_WE# SD_CMD SD_CLK SD_CD# SD_WP SD_DAT0/XD_D6/MS_D0 XD_D3/MS_D1 XD_D2/MS_D2 XD_D7/MS_D3 XD_D5/MS_BS MS_INS# MS_CLK

19 CLK_PCIE_MINI1# 19 CLK_PCIE_MINI1 8,13,25,29,32,38 PLT_RST# 19 PCLK_FWH 29 E51_RXD 29 E51_TXD R498 1 R499 1

DY DY

2 Do Not Stuff 2 Do Not Stuff E51_RXD_R E51_TXD_R

15 16 17 18 19 20 21 22

DY 2 DY 2 DY 2 DY 2 DY 2

Do Not Stuff LPC_LFRAME# 14,29 Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff LPC_LAD3 LPC_LAD2 LPC_LAD1 LPC_LAD0 LPC_LAD[0..3] 14,29 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 1 AFTP39 XD_D0 SD_CLK/XD_D1/MS_CLK XD_D2/MS_D2 XD_D3/MS_D1 XD_D4/SD_DAT1 XD_D5/MS_BS SD_DAT0/XD_D6/MS_D0 XD_D7/MS_D3 XD_RDY SD_DAT2/XD_RE# XD_CE# XD_CLE XD_ALE SD_DAT3/XD_WE# XD_WP# XD_CD#

1 1 1 1

AFTP37 AFTP40 AFTP38 AFTP47 SD_CMD 32 SD_CLK 32 SD_CD# 32 SD_WP 32

R211 1 R210 1

DY DY

2 Do Not Stuff 2 Do Not Stuff

WIFI_RF_EN PLT_RST#

29

XD_D0 SD_CLK/XD_D1/MS_CLK XD_D2/MS_D2 XD_D3/MS_D1 XD_D4/SD_DAT1 XD_D5/MS_BS SD_DAT0/XD_D6/MS_D0 XD_D7/MS_D3 XD_RDY SD_DAT2/XD_RE# XD_CE# XD_CLE XD_ALE SD_DAT3/XD_WE# XD_WP# XD_CD#

13 PCIE_RXN2 13 PCIE_RXP2

23 24 25 26 27 28 29 30 SMB_CLK SMB_DATA 31 32 33 34 35 36 37 38 39 40 41 42 1 43 44 45 46 47 48 49 R171 50 51 52 NP2 54 1 1

PLT_RST# 8,13,25,29,32,38 +3.3V_RUN

1 1 1 1

AFTP48 AFTP50 AFTP49 AFTP51 MS_INS# 32 MS_CLK 32 1

-1
G3331 2
C

SMB_CLK 15,25 SMB_DATA 15,25

13 PCIE_TXN2 13 PCIE_TXP2

1 1 Do Not Stuff AFTP52

2 Do Not Stuff G3330

USB_PN4 13 USB_PP4 13

+3.3V_RUN

AFTP54

SSID = User.Interface
+1.05V_VCCP

AFTP53

ITP Connector
R20 54D9R2F-L1-GP 2 1

AFTP55 R17 54D9R2F-L1-GP 2 1 R16 54D9R2F-L1-GP 2 1 R24 54D9R2F-L1-GP 2 1 R9 Do Not Stuff 2 1

+5V_ALW

DY

+5V_MINICARD

DY

H_CPURST# use pull-up Resistor close ITP connector 500 mil ( max ), others place near CPU side.
ITP1 1 R19 R23 R21 1 1

Do Not Stuff

4 ITP_TDI 4 ITP_TMS 4 ITP_TRST# 4 ITP_TCK 4 ITP_TDO 19 CLK_CPU_ITP# 19 CLK_CPU_ITP 4,7 H_CPURST# 4 ITP_BPM#5 4 ITP_BPM#4 4 ITP_BPM#3 4 ITP_BPM#2 4 ITP_BPM#1 4 ITP_BPM#0 4 ITP_DBRESET#

ITP_TDI ITP_TMS ITP_TRST#

SKT-MINI52P-21-GP

R10 ITP_TCK ITP_TDO CLK_CPU_ITP# CLK_CPU_ITP R25 1 1

DY DY DY DY DY DY DY DY DY DY DY DY DY DY

2 Do Not Stuff 2 2 Do Not Stuff Do Not Stuff

ITP_TDI_1 ITP_TMS_1 ITP_TRST#_1 ITP_TCK_1

29 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

DY

2 1 R18 1 R345 1 R342 R8 R12 R15 1 1 1 1 R3 1 R5 1 R6 2 2 Do Not Stuff 2 Do Not Stuff Do Not Stuff 2 2 Do Not Stuff Do Not Stuff 2 Do Not Stuff 2 Do Not Stuff 2 Do Not Stuff 2 Do Not Stuff 2 Do Not Stuff 2 Do Not Stuff

Do Not Stuff

ITP_TDO_1 CLK_CPU_ITP#_1 CLK_CPU_ITP_1 H_CPURST#_1 ITP_BPM#5_1 ITP_BPM#4_1 ITP_BPM#3_1 ITP_BPM#2_1 ITP_BPM#1_1 ITP_BPM#0_1 ITP_DBRESET#_1 +1.05V_VCCP

DY

Do Not Stuff ITP_BPM#4 ITP_BPM#3 ITP_BPM#2 ITP_BPM#1 ITP_BPM#0 ITP_DBRESET# 1 R22 54D9R2F-L1-GP 2 2 1 +3.3V_RUN 1 R344 2

DY

1 R4 1 R343

+5V_ALW 1

1K2R2F-1-GP R11 54D9R2F-L1-GP

+3.3V_RUN 1

C305 Do Not Stuff


A

DY
2

C468 SCD1U16V2KX-3GP

+3.3V_RUN C235 Do Not Stuff C241 Do Not Stuff C294 Do Not Stuff

+1.5V_RUN C471 SCD1U16V2KX-3GP

WLAN_ACT CLK_PCIE_MINI1# CLK_PCIE_MINI1 E51_TXD_R E51_RXD_R PCIE_RXN2 PCIE_TXP2 +3.3V_RUN +1.5V_RUN WIFI_RF_EN PLT_RST# SMB_CLK SMB_DATA WLAN_ACT

1 1 1 1 1 1 1 1 1 1 1 1 1

AFTP56 AFTP59 AFTP58 AFTP61 AFTP65 AFTP64 AFTP67 AFTP69 AFTP72 AFTP71 AFTP73 AFTP75 AFTP74 1

15 ITP_DBRESET#_1

30 Do Not Stuff Do Not Stuff

+1.05V_VCCP use Decoupling Capacitor close ITP connector 100 mil ( max )

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

CPU
TCK(PIN AC5)
EC65 SC220P50V2KX-3GP

ITP Connector
TCK(PIN 5) FBO(PIN 11)

DY
2

DY
2

DY
2

MINICARD/SD/ITP CONN
Roberts Discrete
Sheet
1

Rev

-1
of 60

Date: Tuesday, May 19, 2009


5 4 3 2

26

(Blanking)

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

WWAN
Rev

hexainf@hotmail.com GRATIS - FOR FREE


5

Roberts Discrete
Sheet
1

-1
of 60

Date: Tuesday, May 19, 2009


4 3 2

27

(Blanking)

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

WPAN
Rev

Roberts Discrete
Sheet
1

-1
of 60

Date: Tuesday, May 19, 2009


5 4 3 2

28

+3.3V_RUN +3.3V_RTC_LDO

CAP close to VCC-GND pin pair


L17 1 2 BLM18AG601SN-3GP VBAT

+3.3V_RUN

SSID = KBC
1 C196 DY Do Not Stuff 35 THERM_SDA 4 5 2 1 R415

DY

C466 SC10U6D3V5MX-3GP

C459 SC10U6D3V5MX-3GP

C465 SCD1U10V2KX-4GP

C451 SCD1U10V2KX-4GP

C457 SCD1U10V2KX-4GP

C458 SCD1U10V2KX-4GP

C460 SCD1U10V2KX-4GP

C456 Do Not Stuff

C194 SCD1U10V2KX-4GP

2 Do Not Stuff

U22 3 2 1 2N7002SPT R417 1 THERM_SCL 35 KBC_SDA1

DY
2

115 88 76 46 19

102

80

U20A

KBC_SCL1 1 OF 2 BAT_IN# 48

GPIO41

AVCC

VCC VCC VCC VCC VCC

VDD

+3.3V_RTC_LDO 1

R152 2 45 AD_IA

104 97 98 99 100 108 96

VREF GPI90/AD0 GPI91/AD1 GPI92/AD2 GPI93/AD3 GPIO05 GPIO04

10KR2J-3-GP 52 THERMTRIP_VGA#

A/D LPC

for Discrete

KBC_THERMTRIP#

PCB_VER0 PCB_VER1 PCB_VER2

PH for Discrete Internal PL for UMA

25 CAMERA_DET#

101 105 106 107

GPI94 GPI95 GPI96 GPI97

D/A

GPIO10/LPCPD# LRESET# LCLK LFRAME# LAD0 LAD1 LAD2 LAD3 SERIRQ GPIO11/CLKRUN# KBRST# GA20 ECSCI#/GPIO54 GPIO65/SMI# GPIO67/PWUREQ#

124 7 2 3 126 127 128 1 125 8 122 121 29 9 123

DY

2 +3.3V_RUN

PLT_RST1#_1 LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3 PCLK_KBC 19 LPC_LFRAME# 14,26 LPC_LAD[0..3] INT_SERIRQ 15 PM_CLKRUN# 15 KBRCIN# 14 KA20GATE 14 PANEL_BKEN 52 2 R157 1 10KR2J-3-GP 4,8,14,34 H_THRMTRIP# 14,26

+1.05V_VCCP 1

Do Not Stuff

R162 2K2R2J-2-GP C199 2 1 SCD1U16V2KX-3GP C KBC_THERMTRIP# 2

E51_RxD R147 KA20GATE KBRCIN#

DY
RN21

2 Do Not Stuff

ECSCI#_KBC ECSWI#_KBC

for Discrete
E

4 3

DY
RN47

1 2 +3.3V_RTC_LDO

Do Not Stuff Q9 CH3904PT-GP KBC_SCL1 KBC_SDA1

+3.3V_RTC_LDO

30 EC_SPI_WP#_R 34,42,43,44,50 RUNPWROK 30 PWRLED 34 3.3V_DELAY_EN

for Discrete
15,51 PLTRST_DELAY# 41 3V_5V_POK 8,15,35 PM_PWROK 48 PSID_DISABLE# 20 BLON_OUT 39 CPUCORE_ON

DY

-1

for 31,48 Discrete

50 GFX_CORE_EN USB_PWR_EN#

GPIO01/TB2 GPIO03 GPIO06 GPIO07 GPIO23 GPIO24 GPIO30 GPIO31 GPIO32/D_PWM GPIO33/H_PWM GPIO40/F_PWM GPIO42/TCK GPIO43/TMS GPIO44/TDI GPIO45/E_PWM GPIO46/TRST# GPIO47 GPIO50/TDO GPIO51 GPIO52/RDY# GPIO53 GPIO70 GPIO71 GPIO72 GPO82/TRIS#

SMB

GPIO74/SDA2 GPIO73/SCL2 GPIO22/SDA1 GPIO17/SCL1

BAT_SDA 45,48 BAT_SCL 45,48

D13 15 ECSWI# 1 3 ECSWI#_KBC KBC_PWRBTN# R425 LID_CLOSE# R422 LCD_CBL_DET# R409 KB_DET# R406 CAMERA_DET# R401 KBC_THERMTRIP# R404 S5_ENABLE R407 KCOL0 R400 KBC_GPIO76 R420 BAS16-1-GP 2 D11 BAT_SDA BAT_SCL 4 3 1 1 1 1 1 1 1 1 1

SP SPI

GPIO66/G_PWM

81

1.8V_RUN_EN 34

GPIO

GPIO77 GPIO76/SHBM GPIO75 GPIO81

84 83 82 91

KBC_GPIO76

BLUETOOTH_EN 25 WIFI_RF_EN 26 1.1V_RUN_EN 42

15

ECSCI#

1 3 BAS16-1-GP 2 D12 ECSCI#_KBC

DY

GPO83/SOUT_CR/BADDR1 111 GPIO87/SIN_CR 113 GPO84/BADDR0 112 GPIO16 GPIO34 GPIO36 114 14 15

E51_TxD E51_RxD

E51_TxD 26 E51_RxD 26 PM_LAN_ENABLE 38 TSATN#_KBC 8 S5_ENABLE 34

15

ECSMI#

1 BAS16-1-GP 3 ECSMI#_KBC

DY

TSATN#_KBC

SRN4K7J-8-GP 2 100KR2J-1-GP 2 Do Not Stuff 2 100KR2J-1-GP 2 Do Not Stuff 2 100KR2J-1-GP 2 100KR2J-1-GP 2 10KR2J-3-GP 2 Do Not Stuff 2 10KR2J-3-GP

DY

SER/IR

A00
VCORF GND GND GND GND GND GND +3.3V_RUN AGND 44

KBC_VCORF 1

+3.3V_RTC_LDO C204 SC1U10V3KX-3GP 1

U20B KBC_XI C5390 Do Not Stuff KBC_XO 37 AMP_MUTE# 48 PSID_EC 15 PM_PWRBTN# 20 LCD_TST_EN 37 KBC_BEEP 30 BATLOW_LED 20 BRIGHTNESS 79 30 63 117 31 32 118 62 32KX2 GPIO55/CLKOUT GPIO14/TB1 GPIO20/TA2 GPIO56/TA1 GPIO15/A_PWM GPIO21/B_PWM GPIO13/C_PWM

2 OF 2 KCOL[0..16] 33

77

32KX1/32KCLKIN

116 89 78 45 18 5

103

WPCE773LA0DG-GP

R151 10KR2J-3-GP 2 2

DY
2

PCB_VER0 PCB_VER1 PCB_VER2 1 1 1 10KR2J-3-GP R143 Do Not Stuff R141

DY
2

DY
2

X00 X01 X02 A00

MB VER2 ID VERSION VER1


0 0 0 0 0 0 1 1

-1
R413 Do Not Stuff 45 ACAV_IN D

VER0

R5432 Do Not Stuff 1

DY DY
2 2

0 1 0 1

U5113 1 1 2 3 B A VCC 5

DY
Y 4 1

GND

DY

PM_PWROK 33 KB_DET# 20 LCD_CBL_DET# 20 LCD_TST 33 TPDATA 33 TPCLK 13 12 11 10 71 72 GPIO12/PSDAT3 GPIO25/PSCLK3 GPIO27/PSDAT2 GPIO26/PSCLK2 GPIO35/PSDAT1 GPIO37/PSCLK1

BAT_IN#

DY
S

Do Not Stuff

D3305 Do Not Stuff

KBSOUT0/JENK# KBSOUT1/TCK KBSOUT2/TMS KBSOUT3/TDI KBSOUT4/JEN0# KBSOUT5/TDO KBSOUT6/RDY# KBSOUT7 KBSOUT8 KBSOUT9 KBSOUT10 KBSOUT11 KBSOUT12/GPIO64 KBSOUT13/GPIO63 KBSOUT14/GPIO62 KBSOUT15/GPIO61/XOR_OUT GPIO60/KBSOUT16 GPIO57/KBSOUT17

KBC

53 52 51 50 49 48 47 43 42 41 40 39 38 37 36 35 34 33 54 55 56 57 58 59 60 61 85

KCOL0 KCOL1 KCOL2 KCOL3 KCOL4 KCOL5 KCOL6 KCOL7 KCOL8 KCOL9 KCOL10 KCOL11 KCOL12 KCOL13 KCOL14 KCOL15 KCOL16 KCOL17 KROW0 KROW1 KROW2 KROW3 KROW4 KROW5 KROW6 KROW7 ECRST#

1 KROW[0..7] 33 TP122 Do Not Stuff

Q5113 Do Not Stuff

PS/2

+3.3V_RUN 1

KBC CLK EMI PCLK_KBC DY


1 PCLK_KBC_RC R410 Do Not Stuff

C228 SC15P50V2JN-2-GP 2 1 KBC_XI

30 30 30 30

EC_SPI_DI EC_SPI_DO EC_SPI_CS# EC_SPI_CLK

EC_SPI_DI EC_SPI_DO EC_SPI_CS# EC_SPI_CLK R5415 2 0R2J-2-GP 1

1 R192

2 0R2J-2-GP

86 87 90 EC_SPI_CLK_C 92

F_SDI F_SDO F_CS0# F_SCK

FIU

KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7 VCC_POR#

PLTRST_DELAY# R148 Do Not Stuff E51_TxD PLT_RST1#_1 1 X1 X-32D768KHZ-38GPU

-1
ECRST# Main Source

DY
2 2

1 R153 2 Do Not Stuff

PLT_RST# 8,13,25,26,32,38

WPCE773LA0DG-GP

A00
C190 Do Not Stuff +3.3V_RTC_LDO 10KR2J-3-GP R173 2 2 R170 Do Not Stuff 1 CPUCORE_ON

DY
2 R199 20MR3-GP

R149 4K7R2J-2-GP 1 2

Wistron Corporation
1 2 ECRST#_C B Q10 CH3906PT-GP C C214 SC1U10V3KX-3GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

DY
1

C453 Do Not Stuff 2

34,35 PURE_HW_SHUTDOWN# C240 1 R203 X3_1 1 33KR3-GP 2 KBC_XO RUNPWROK 2 R156

1 1

KBC Winbond WPC773L


Roberts Discrete
Sheet 29 of

hexainf@hotmail.com GRATIS - FOR FREE

SC15P50V2JN-2-GP

DY

2 60

SRN4K7J-8-GP RN46 1 2

DY

Rev

Do Not Stuff

-1

Date: Tuesday, May 19, 2009

EC132 Do Not Stuff

15,25,34,35,42,43,44,50 30 45 25 15,39

64 95 93 94 119 6 109 120 65 66 16 17 48 AD_OFF 20 15 RSMRST#_KBC 21 15,25,44 PM_SLP_S4# PLTRST_DELAY#_EC 22 1 2 R5399 Do Not Stuff 23 PM_PWROK_R R158 Do Not Stuff 1 2 24 25 26 27 CPUCORE_ON_R R159 28 1 2 ECSMI#_KBC Do Not Stuff 73 74 75 110 PM_SLP_S3# KBC_PWRBTN# AC_IN# LID_CLOSE# VGATE_PWRGD 2 1 R3328 2K2R2J-2-GP RUNPWROK_R R182 1 2 Do Not Stuff

68 67 69 70

KBC_SDA1 KBC_SCL1

4 3

1 2

10KR2J-3-GP R138

Do Not Stuff R146

Do Not Stuff R150

SPI FLASH ROM (16M bits)


+3.3V_RTC_LDO
D

SSID = Flash.ROM
+3.3V_RTC_LDO C470 SCD1U16V2KX-3GP C472 SCD1U16V2KX-3GP

SSID = User.Interface

3 4

C454 RN50 SRN100KJ-6-GP Do Not Stuff

R484 100KR2J-1-GP 2

DY
2 2

Power Board to Board CONN


CN1 5 29 KBC_PWRBTN# 1 R500 2 KBC_PWRBTN#_IN 1 AFTP124 EC161 Do Not Stuff 1 2 3 4 6 ACES-CON4-10-GP-U Do Not Stuff 1

2 1

EC_SPI_HOLD#

-1
R419 29 EC_SPI_CS# 29 EC_SPI_DI 29 EC_SPI_WP#_R 1 1 1 R501 2 2 Do Not Stuff EC_SPI_CS# EC_SPI_WP# 0R2J-2-GP EC135 SC4D7P50V2CN-1GP 1 2 3 4

U23 CS# VCC DO HOLD# WP# CLK GND DIO 8 7 6 5

+3.3V_RTC_LDO

DY
EC_SPI_HOLD# R414 1 1 1 2 33R2J-2-GP EC_SPI_CLK 29 EC_SPI_DO 29 2 EC134 SC4D7P50V2CN-1GP

W25X16AVSSIG-GP EC133 SC4D7P50V2CN-1GP

SSID = User.Interface
B

Power/Battery LED
+5V_ALW

SSID = RBATT
+3.3V_RTC_LDO +RTC_CELL U24 2 1 R227 2 RTC_PWR_L 3 R220 1 RTC_PWR 1 2

RTC Connector
B

POWER LED
LED1 C 29 PWRLED B R1 1 E R2 PDTC124EU-1-GP 330R2J-3-GP EC62 Do Not Stuff 2 LED_PWR# 1 2 PWR_LED_B 3

+RTC_VCC RTC1 1 2 NP1 NP2 PWR GND NP1 NP2 BAT-CON2-1-GP-U 62.70001.011 +RTC_VCC

White
1

Q12

R491

Do Not Stuff C519 SC1U10V3KX-3GP

1 1KR2J-1-GP SDMG0340LC7F-GP-U AFTP125

DY
2

Amber
LED-OW-3-GP

Width=20mils
1 AFTP126

BATT LED
Q11 C 29 BATLOW_LED B R1 1 E R2 PDTC124EU-1-GP 270R2J-L EC61 Do Not Stuff LED_BAT# 1 R492 2 BAT_LED_B

DY
2

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

FWH/LED/Power Dash/RTC
Roberts Discrete
Sheet
1

Rev

-1
of 60

Date: Tuesday, May 19, 2009


5 4 3 2

30

SSID = USB

Right USB Port CONN


+5V_USB2 6 1 2 CN3 L1 Do Not Stuff 4 3 2 1 AFTP127 4 3 USB_PP2 5 1 MLX-CON4-15-GP-U 20.F0693.004
C

13 USB_PN2

USB_PN2

DY
13 USB_PP2

AFTP133 AFTP135 AFTP134 +5V_ALW

1 1 1

+5V_USB2 USB_PN2 USB_PP2 +5V_USB2

-1
1 SC4D7U6D3V3KX-GP TC12 2

U1

at least 80 mil

at least 80 mil
C327 SC1U10V3KX-3GP TC11 ST100U6D3VBM-5GP C328 SCD1U16V2KX-3GP VOUT VOUT VOUT FLG# 8 7 6 5 1 R296 Do Not Stuff

EC78 SC1U6D3V2KX-GP

1 2 3 4

RT9711BPF-GP

DY

GND VIN VIN EN/EN#

DY

13 USB_OC#2

29,48 USB_PWR_EN#

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

USB
Rev

hexainf@hotmail.com GRATIS - FOR FREE


5

Roberts Discrete
Sheet
1

-1
of 60

Date: Tuesday, May 19, 2009


4 3 2

31

SSID = SDIO
Please close to pin8.
+3.3V_PHY +3.3V_PHY C319 SCD1U16V2KX-3GP C310 SCD1U16V2KX-3GP
D

+3.3V_RUN 1 R259 2 Do Not Stuff


D

VREG C298 SC1U6D3V2KX-GP C297 SC1U6D3V2KX-GP C300 SCD1U16V2KX-3GP C320 SC4D7U6D3V3KX-GP C5386 Do Not Stuff 1 1 1 1 1 2

DY
2

+3.3V_PHY 2 R260 SD_CMD 26 2 L5129 2 1 CARD_RST#_R BLM18BD601SN1D-GP 1 R283 Do Not Stuff R284 1

Please close to pin11 and pin33.


+3.3V_RUN_CARD

MODE_SEL SD_CMD

CARD_RREF CARD_RST# 1

DYDo Not Stuff


1 R5404 2 1 1 2K2R2J-2-GP C318 Do Not Stuff 1 C5387 SC1U10V2KX-1GP PLT_RST# 8,13,25,26,29,38

6K2R2F-GP

C299 SCD1U16V2KX-3GP

U34

DY
2

10

33 11

45 36 14 2 44

DY
2

Place far away U34.

MODE_SEL SD_CMD GPIO0 RREF RST#

CARD_3V3

AV_PLL

3V3_IN

VREG

D3V3 D3V3

MS_D5 MS_D4

26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26

XD_CD# SD_WP SD_CD# XD_D4/SD_DAT1 XD_D5/MS_BS XD_D3/MS_D1 SD_DAT0/XD_D6/MS_D0 XD_D2/MS_D2 MS_INS# XD_D7/MS_D3 SD_CLK/XD_D1/MS_CLK XD_D0 XD_WP# XD_RDY SD_DAT3/XD_WE# SD_DAT2/XD_RE# XD_ALE XD_CE# XD_CLE

XD_CD# SD_WP SD_CD# XD_D4/SD_DAT1 XD_D5/MS_BS XD_D3/MS_D1 SD_DAT0/XD_D6/MS_D0 XD_D2/MS_D2 MS_INS# XD_D7/MS_D3 SD_CLK/XD_D1/MS_CLK XD_D0 XD_WP# XD_RDY SD_DAT3/XD_WE# SD_DAT2/XD_RE# XD_ALE XD_CE# XD_CLE

19 20 21 23 25 26 27 28 29 31 34 35 37 38 39 40 41 42 43

NC#30 NC#7 NC#3

SP1 SP2 SP3 SP4 SP5 SP6 SP7 SP8 SP9 SP10 SP11 SP12 SP13 SP14 SP15 SP16 SP17 SP18 SP19

DP DM

5 4 13 47 48

USB_PP10 USB_PN10 XTAL_CTR R272 2 10KR2J-3-GP

XTAL_CTR XTLO XTLI

+3.3V_PHY

CLK_48M_CARD 19

RTS5159-GR-GP
EESK EECS EEDO EEDI GND GND GND GND 17 16 15 18

24 22

30 7 3

6 12 32 46

USB_PN10 13

4 26 MS_CLK MS_CLK 1 R250 2 Do Not Stuff SD_CLK/XD_D1/MS_CLK SD_CLK 1 R249 2 Do Not Stuff 1 1 USB_PN10 USB_PP10

DY
Do Not Stuff L6 1 2
B

26

SD_CLK

USB_PP10 13

C273 Do Not Stuff

DY DY
2 2

C280 Do Not Stuff

Power mode select


No staff R and C for power saving mode.
MODE_SEL
A A

Main Source 1 1

R280 Do Not Stuff

DY

DY

C317 Do Not Stuff Title Size Document Number Custom

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

RTS5158E
Roberts Discrete
Sheet
1

Rev

-1
of 60

Date: Tuesday, May 19, 2009


5 4 3 2

32

SSID = KBC

SSID = Touch.Pad

TouchPad Connector
D D

+5V_RUN

C167 SCD1U16V2KX-3GP

Internal KeyBoard Connector


KB1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 1 JAE-CON27-GP 20.K0291.027 AFTP166 KCOL10 KCOL11 KCOL9 KCOL14 KCOL13 KCOL15 KCOL16 KCOL12 KCOL0 KCOL2 KCOL1 KCOL3 KCOL8 KCOL6 KCOL7 KCOL4 KCOL5 KROW0 KROW3 KROW1 KROW5 KROW2 KROW4 KROW6 KROW7 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 AFTP137 AFTP136 AFTP138 AFTP140 AFTP139 AFTP142 AFTP141 AFTP144 AFTP143 AFTP145 AFTP150 AFTP148 AFTP147 AFTP149 AFTP151 AFTP153 AFTP152 AFTP154 AFTP156 AFTP155 AFTP158 AFTP157 AFTP159 AFTP160 AFTP162 AFTP164 29

+5V_RUN

2 1

RN18 SRN10KJ-5-GP 5 3 4 1 2 3 4 6 C163 SC33P50V2JN-3GP

TPAD1

29 TPCLK 29 TPDATA KROW[0..7] 29 C174 SC33P50V2JN-3GP 1 1 AFTP146

KCOL[0..16] 29

C168 SC1U10V3KX-3GP

ACES-CON4-10-GP-U

2 2

AFTP161 AFTP163 AFTP165 KB_DET# 29

1 1 1

+5V_RUN TPCLK TPDATA

For EMI
KCOL3 KCOL2 KCOL1 KCOL0 EC110 Do Not Stuff EC104 Do Not Stuff EC107 Do Not Stuff EC102 Do Not Stuff EC105 Do Not Stuff EC103 Do Not Stuff EC109 Do Not Stuff EC112 Do Not Stuff 1 1 1 1 1 1 1 1 KCOL11 KCOL10 KCOL9 KCOL8 EC127 Do Not Stuff EC125 Do Not Stuff EC129 Do Not Stuff EC123 Do Not Stuff 1 1 1 1 KROW3 KROW2 KROW1 KROW0 1 KROW7 KROW6 KROW5 KROW4 EC130 Do Not Stuff EC128 Do Not Stuff EC126 Do Not Stuff EC124 Do Not Stuff 1 1 1 1 2 KCOL16 EC118 Do Not Stuff

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY

KCOL7 KCOL6 KCOL5 KCOL4 EC116 Do Not Stuff EC114 Do Not Stuff EC121 Do Not Stuff EC119 Do Not Stuff EC115 Do Not Stuff EC111 Do Not Stuff EC113 Do Not Stuff EC120 Do Not Stuff 1 1 1 1 1 1 1 1

KCOL15 KCOL14 KCOL13 KCOL12

Main Source

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

DY
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

KeyBoard/Touch Pad
Roberts Discrete
Sheet
1

Rev

hexainf@hotmail.com GRATIS - FOR FREE


5

-1
of 60

Date: Tuesday, May 19, 2009


4 3 2

33

SSID = Reset.Suspend
R161 5,14 H_PWRGOOD 1

H_THRMTRIP# 4,8,14,29

DY

H_PWRGD_R 1 C198

DY
C

E Q8 Do Not Stuff 2 Do Not Stuff

Do Not Stuff

DY

2 D10 BAS16-1-GP 41 3V_5V_EN 1 1 1 R168 2 1KR2J-1-GP 3 PURE_HW_SHUTDOWN# 29,35

DY
2

R160 Do Not Stuff

S5_ENABLE 29

+1.8V_RUN 2 R5422 10R3F-GP 1.8V_RUN_1 D 1


C

Run Power
+3.3V_RTC_LDO

G R5410 +PWR_SRC 100KR2J-1-GP Q5109 2N7002SPT 6 5 4 S 1 2 1.8V_RUN_EN#

Q5111 2N7002-7F-GP

+1.8V_SUS +1.8V_RUN U67 S S S G

R5411 10KR2J-3-GP 1 2 3 1 2

C600 SC10U6D3V5KX-1GP R517

1 2 3 4

D D D D

8 7 6 5

FDS8880-NL-GP

DY

2 1

RUN_POWER_ON_1.8V

Do Not Stuff

Id: 11.6A Rds: 0.01ohm

29 1.8V_RUN_EN

1.8V_RUN_EN +5V_RUN +5V_ALW U30 S S S G AO4468-GP

C806 SCD01U50V2KX-1GP Q5102 SI2301BDS-T1-GP

C534 Do Not Stuff 2


B

1 R460 10KR2J-3-GP

Z_12V

D16 Do Not Stuff

NDS0610-NL-GP 84.S0610.B31 Z_12V_G3

C314 SC6800P25V2KX-1GP

Q22

RUN_POWER_ON

DY

R5124 100KR2J-1-GP 3.3V_ALW_1

-1
29 3.3V_DELAY_EN 1 R5412 2 Do Not Stuff Q5110 2N7002SPT

+PWR_SRC

R275 1 10KR2J-3-GP

2RUN_POWER_ON_5V

1 2 3 4

D D D D

8 7 6 5

+3.3V_ALW

+3.3V_DELAY
B

Id: 2A Rds: 0.15ohm

R281 100KR2J-1-GP

1 R5420 100R2F-L1-GP-U 2 1 2 3 3.3V_DELAY_1

2 R458 330KR2F-L-GP

DY
A 2

R459 100KR2J-1-GP 2 D 3

+3.3V_RUN

+3.3V_ALW 1 2 3 4 U31 S S S G AO4468-GP D D D D 8 7 6 5

A00
Q23 2N7002-8-GP R273 1 10KR2J-3-GP 2RUN_POWER_ON_3.3V 1

Z_12V_D3

R5125 29,42,43,44,50 RUNPWROK 1

G 2 Q21 2N7002-7F-GP 15,25,29,35,42,43,44,50


A

Do Not Stuff

DY

3.3V_DELAY_EN_1 C5245 Do Not Stuff

C316 SCD01U50V2KX-1GP

DY
2

PM_SLP_S3#

G S

Optional RC network to fine tune PWR SEQ.


Main Source

For Discrete
A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

Power Plane Enable


Roberts Discrete
Sheet
1

Rev

-1
of 60

Date: Tuesday, May 19, 2009


5 4 3 2

34

SSID = Thermal
C386 SC4D7U6D3V5KX-3GP
D

+5V_RUN

+3.3V_RUN

+5V_RUN

R66 R63 10KR2J-3-GP 1

C389 SCD1U16V2KX-3GP 2

DY
D6

Do Not Stuff

DY
2

R348 Do Not Stuff


D

EMC2102_FAN_TACH EMC2102_FAN_DRIVE +3.3V_RTC_LDO R346 2

K RB551V30-GP

EMC2102_FAN_TACH_1

EMC2102_FAN_TACH_1 23 EMC2102_FAN_DRIVE 23

RN3

DY

3 4

2 1 SRN4K7J-8-GP

+3.3V_RUN

Do Not Stuff

THERM_SCL 29 THERM_SDA 29 +3.3V_RUN R340 27 24 29 26 2 1 U8 2 49D9R2F-GP 28 25 23 SMCLK 22 SMDATA EMC2102_VDD_3D3

VDD_5Va

VDD_5Vb

TACH

FANa

FANb

GND

1.For CPU Sensor

+3.3V_RUN

C60 SCD1U16V2KX-3GP

4 H_THERMDC C50 SC470P50V3JN-2GP 4 H_THERMDA 52 VGA_THERMDC 2 1

Layout notice : Both H_THERMDA and THERMDC routing 10 mil trace width and 10 mil spacing.

2 1 2 VDD_3V DN1 DP1 NC#21 GND ALERT# 21 20 19 18 17 16 15 ALERT# CLK_32K EMC2102_CLK_SEL EM2102_RESET# R88 2 1 10KR2J-3-GP R87 2 R89 8K2R2J-3-GP

3 4 5 C63 SC470P50V3JN-2GP EMC2102_DN3 EMC2102_DP3 6 7

DY

1 Do Not Stuff

THERM_SCI# 15

EMC2102
DN2 DP2 DN3 THERMTRIP# POWER_OK# DP3 SYS_SHDN# FAN_MODE SHDN_SEL TRIP_SET CLK_IN CLK_SEL RESET# NC#15

GND = Internal Oscillator Selected +3.3V = External 32.768kHz Clock Selected

52 VGA_THERMDA NC#8

2.VGA Sensor.
Layout notice : Both DN2 and DP2 routing 10 mil trace width and 10 mil spacing.

for Discrete

C388 must be near Q18

GND = Channel 1 OPEN = Channel 3 +3.3V = Disabled


R67 2

10

11

12

13

14

EMC2102-DZK-GP R85 R84 1 10KR2J-3-GP 1 10KR2J-3-GP +3.3V_RTC_LDO 1 +3.3V_RUN R347 10KR2J-3-GP 2


B

CH3904PT-GP Q18 C

C61 must be near EMC2102


C61 SC470P50V3JN-2GP +3.3V_RUN

DY 1
Do Not Stuff R68

EMC2102_SHDN

2 2

+3.3V_RUN

+3.3V_RUN 1

DY C388 Stuff Do Not

3.HW T8 sensor
B

DY
R71

EMC2102_FAN_mode 2

R362 10KR2J-3-GP

2 TP223 TP72 1 1 EMC2102_FAN_TACH_1 EMC2102_FAN_DRIVE

1 10KR2J-3-GP S

Q17 2N7002-7F-GP D PURE_HW_SHUTDOWN# 29,34

C78 SCD1U16V2KX-3GP

Layout notice : Both DN3 and DP3 routing 10 mil trace width and 10 mil spacing.

Do Not Stuff

1 R82 10KR2F-2-GP 2 V_DEGREE 1 G

GND = Fan is OFF OPEN = Fan is at 60% full-scale +3.3V = Fan is at 75% full-scale

TRIP_SET Pin Voltage V_DEGREE=(((Degree-75)/21)


1 R78 2K37R2F-GP 2

32K suspend clock output A00


Q13 2N7002-8-GP R219 D 15 ICH_SUSCLK 3 2 S CLK_32K_R 1 2 1 CLK_32K 10R2J-2-GP 1

C70 SCD1U16V2KX-3GP

DY
2 RUN_POWER_ON

C249 Do Not Stuff U10 EM2102_RESET# 15,25,29,34,42,43,44,50 PM_SLP_S3# 1 2 3 B A

+3.3V_ALW C82

DY

VCC Y

5 4

DY 1
PM_PWROK 8,15,29

Main Source

Do Not Stuff

GND Do Not Stuff Title Size Document Number Custom

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Thermal EMC2102
Roberts Discrete
Sheet
1

Rev

hexainf@hotmail.com GRATIS - FOR FREE


5

-1
of 60

Date: Tuesday, May 19, 2009


4 3 2

35

SSID = AUDIO
+3.3V_RUN

Place C530 close to pin1


C537 SCD1U10V2KX-4GP C530 SC1U6D3V2KX-GP C533 SCD1U10V2KX-4GP 1 1 1

Place C533 close to pin9


D

+VDDA

C550 SCD1U10V2KX-4GP

+3.3V_RUN 1 1 R467 2 Do Not Stuff 2 C529 SCD1U10V2KX-4GP +DVDD_IO U61 1 9 40 3 DVDD_CORE DVDD_CORE NC#40/OTP DVDD_IO AVDD1 AVDD2 SENSE_A SENSE_B/NC#34 14 ICH_AZ_CODEC_BITCLK 14 ICH_SDIN_CODEC 14 ICH_SDOUT_CODEC
C

C555 SC1U10V3KX-3GP

+VDDA 1

+VDDA 1 R487 20KR2F-L-GP R479 5K1R2F-2-GP 2 R473 R478 C541 1 39K2R2F-L-GP 1 20KR2F-L-GP 1 SC1KP50V2KX-1GP AUD_HP1_OUT_L 37 AUD_HP1_OUT_R 37

25 38 13 34 39 41 37 21 22 28 23 24 29 35 36

2 2 2

AUD_HP1_JD# 37,47 EXT_MIC_JD# 47

AUD_SENSE_A AUD_SENSE_B AUD_HP1_OUT_L AUD_HP1_OUT_R AUD_EXT_MIC_L AUD_EXT_MIC_R AUD_VREFOUT_B AUD_INT_MIC_L AUD_INT_MIC_R AUD_VREFOUT_C AUD_LINE_OUT_L AUD_LINE_OUT_R C547 1 C549 1 R292 1 C560 1 SC1U10V3KX-3GP 2 SC1U10V3KX-3GP 2 2 4K7R2J-2-GP 2 SC1U6D3V2KX-GP

6 R465 2 1 33R2J-2-GP SB_AZ_CODEC_SDIN0_R 8 5 10 11 1

BITCLK SDI_CODEC SDO SYNC RESET# PORTC_L PORTC_R VREFOUT_C PORTD_L PORTD_R PORTB_L PORTB_R VREFOUT_B PORTA_L PORTA_R NC#37

14 ICH_AZ_CODEC_SYNC 14 ICH_AZ_CODEC_RST#

AUD_EXT_MIC_L 47 AUD_EXT_MIC_R 47 AUD_VREFOUT_B 47 INT_MIC_L_R 47

DY
2

C532 Do Not Stuff

25 AUD_DMIC_IN0

AUD_DMIC_CLK AUD_DMIC_IN0

46 2 4

DMIC_CLK VOL_UP/DMIC_0/GPIO1 VOL_DN/DMIC_1/GPIO2

PORTE_L 14 PORTE_R 15 VREFOUT_E/GPIO4 31 PORTF_L PORTF_R GPIO3 16 17 30 18 19 20 12 32 33 27 26 42 AUD_CAP2 AUD_VREFFLT C558 SC10U6D3V5MX-3GP C561 SC10U6D3V5MX-3GP 1 1

AUD_LINE_OUT_L 37 AUD_LINE_OUT_R 37

Port Port Port Port

A---> B---> C---> D--->

HP Ext Mic Int Mic Speaker

47 48

EAPD/GPIO0/SPDIF_OUT0OR1 SPDIF_OUT0

NC#18 NC#19 NC#20 PCBEEP MONO_OUT

AUD_PC_BEEP Trace width>15 mils PC BEEP


AUD_PC_BEEP C531 2 1 SCD1U10V2KX-4GP SB_SPKR_R

R464 499KR2F-1-GP 1 2

From SB
SB_SPKR 15

2 R468 Do Not Stuff

43 44 45
B

GPIO5 GPIO6 GPIO7/SPDIF_OUT1

CAP2 VREFFILT AVSS1 AVSS2

7 49

DVSS GND 92HD71B7A5NLGXB3X8-GP

Azalia I/F EMI


ICH_SDOUT_CODEC +3.3V_RUN 1 U59 R466 Do Not Stuff 25 AUD_DMIC_CLK_G 2 1 EC154 SC22P50V2JN-4GP ICH_AZ_CODEC_SDOUT1 5 4 VCC Y OE# A GND 1 2 3

DY

DY

Do Not Stuff R477 2 1 22R2J-2-GP AUD_DMIC_CLK


A

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. C528 Do Not Stuff Title Size Document Number Custom

DY
2

AUDIO CODEC 92HD71B7


Roberts Discrete
Sheet
1

Rev

-1
of 60

Date: Tuesday, May 19, 2009


5 4 3 2

36

SSID = AUDIO
Signal inverter for speaker shutdown
+5V_RUN +5V_SPK_AMP

Close to U24.8
L18 C538 SC10U6D3V5MX-3GP 1 2 1 C545 SCD1U10V2KX-4GP

Close to U24.18
C563 SC1U10V3KX-3GP C552 SC10U6D3V5MX-3GP +5V_SPK_AMP 1 C562 SCD1U10V2KX-4GP C553 SC1U6D3V2KX-GP C554 SC1U6D3V2KX-GP

+5V_SPK_AMP

+5V_SPK_AMP 1 2 C546 SC1U6D3V2KX-GP


D

60ohm 100MHz 3000mA 0.05ohm DC

BLM21PG600SN-1GP

C548 SC1U6D3V2KX-GP

+5V_SPK_AMP 1 R485 100KR2J-1-GP 2 3 2 1 2N7002SPT 1 R489 10MR2J-L-GP 2 AUD_HP1_JD AMP_MUTE# AUD_HP1_EN U36 4 36,47 AUD_HP1_JD# AUD_HP1_JD# AUD_HP1_JD 5 6

18

U62 AUD_SPK_L1 AUD_SPK_L2 AUD_SPK_R2 AUD_SPK_R1 AUD_HP1_JACK_R AUD_HP1_JACK_L AUD_AMP_GAIN1 AUD_AMP_GAIN2 SC2D2U10V5KX-2GP 2K2R2J-2-GP C564 R490 1 2 AUD_HP1_OUT_R1 1 2 AUD_HP1_OUT_R2 1 2 AUD_HP1_OUT_L1 1 2 AUD_HP1_OUT_L2

CPVDD

HPVDD

PVDD

PVDD

17

VDD

30

47 47 47 47

AUD_SPK_L1 AUD_SPK_L2 AUD_SPK_R2 AUD_SPK_R1

6 7 19 20 15 16 31 32 26 27

OUTL+ OUTLOUTROUTR+ HPR HPL GAIN1 GAIN2 HP_INR HP_INL

SPKR_INR SPKR_INL

2 3

AUD_LIN_R AUD_LIN_L

Close to Pin9

C544 1 C543 1

2 SCD033U16V3KX-GP 2 SCD033U16V3KX-GP R486 2

AUD_LINE_OUT_R 36 AUD_LINE_OUT_L 36 +5V_SPK_AMP

6040

1 Do Not Stuff 0R2J-2-GP

47 AUD_HP1_JACK_R 47 AUD_HP1_JACK_L

CPGND

CPVSS

PGND PGND

PVSS

C322 SC1U10V3KX-3GP

C557 SC2D2U10V5KX-2GP
C

R488 2K2R2J-2-GP

9789
2 MAX9789CETJ-GP

6040
2

C556 SC1U10V3KX-3GP

R469 0R2J-2-GP

GND GND

36 AUD_HP1_OUT_R 36 AUD_HP1_OUT_L

AMP AMP

SPKR_EN# MUTE# HP_EN REGEN C1P C1N VOUT BIAS SET

23 25 22 4 10 12 29 24 1

AUD_SPK_ENABLE# AMP_MUTE#_R AUD_HP1_EN AMP_REGEN AMP_C1P C321 1 AMP_C1N AUD_BIAS AUD_SET 1

R483 2

From EC
R286 2 AMP_MUTE# 29 +5V_RUN

9789 1

2 SC1U10V3KX-3GP +VDDA

9789 1

100KR2J-1-GP

C565 Do Not Stuff

21 5

28 33

11

13

14

TPA6040 MAX9789
C564 C557 10U 10U 2.2U 2.2U

C551 1AUD_CPVSS +VDDA 1 +5V_SPK_AMP 1 +5V_SPK_AMP 1 R285 100KR2J-1-GP 2 2 U35 4 3 2 1 2N7002SPT 2 AUD_SPK_ENABLE# AMP_MUTE# R287 100KR2J-1-GP 5 6

SC1U10V3KX-3GP

R472 AMP_REGEN AUD_SET AUD_BIAS C535 1 C566 1 C567 2 2 6040 2 6040 1 9789 KBC_BEEP_R 1 Do Not Stuff 1 10KR2J-3-GP 1KR2J-1-GP R509 2 Do Not Stuff SCD1U10V2KX-4GP 2 KBC_BEEP 29

R293 100KR2J-1-GP

From EC
AUD_HP1_JD# 2

D17

DY
1 Do Not Stuff

3AUD_SPK_ENABLE NB_SPK_EN#

GAIN SETTING
+5V_SPK_AMP

Main source
1 R288 100KR2J-1-GP 2

Second source
B

R290 Do Not Stuff

DY
2

TPA6040A (74.06040.013) R486 100K No ASM No ASM No ASM 0.033uF 0.033uF 1uF No ASM 10uF 10uF

MAX9789A (74.09789.013) No ASM 0 Ohm 0 Ohm 100K No ASM No ASM No ASM 0.1uF 2.2uF

G80 1 2 Do Not Stuff G79 1 2 Do Not Stuff G77 1 2 Do Not Stuff G78 1 2 Do Not Stuff

AUD_AMP_GAIN1 R291 100KR2J-1-GP

AUD_AMP_GAIN2

R483
R289 Do Not Stuff

DY
2 2

R469 R286 C535

GAIN1 0 0 1 1
A

GAIN2 0 1 0 1

GAIN 6dB 10dB 15.6dB 21.6dB

C566 C565 C567 C564 C557

Main Source

2.2uF

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

AUDIO AMP/SPEAKER
Roberts Discrete
Sheet
1

Rev

hexainf@hotmail.com GRATIS - FOR FREE


5

-1
of 60

Date: Tuesday, May 19, 2009


4 3 2

37

SSID = LOM
+2.5V_LOM +3.3V_LAN +1.2V_LOM

TP270 TP269 U26

1 1 57 52 51 32 28 22 19 1 8 40 45 61 64 23 33 39 44 48 58 2 7 13

VDDO_TTL VDDO_TTL VDDO_TTL VDDO_TTL VDDO_TTL

AVDDL AVDD AVDD AVDDL AVDDL AVDDL AVDDL

VDD25 AVDDL

+3.3V_LAN R229 2 1 4K7R2J-2-GP 34 35 36 37 NC#34 NC#35 NC#36 NC#37

VDD VDD VDD VDD VDD VDD VDD VDD

WAKE# PERST# REFCLKP REFCLKN PCIE_TXN PCIE_TXP PCIE_RXN PCIE_RXP LED_LINK# NC#62 LED_SPEED# LED_ACT# PU_VDDO_TTL#42 PU_VDDO_TTL#43 XTALI XTALO

6 5 55 56 50 49 53 54 63 62 60 59 15 14 LANX1 LANX2 R228 2 LAN_RXN3 LAN_RXP3 C285 1 C284 1 2 SCD1U10V2KX-4GP 2 SCD1U10V2KX-4GP

PCIE_WAKE# 15,25 PLT_RST# 8,13,25,26,29,32 CLK_PCIE_LAN 19 CLK_PCIE_LAN# 19 PCIE_RXN3 13 PCIE_RXP3 13 PCIE_TXN3 13 PCIE_TXP3 13

+3.3V_LAN LOM_DISABLE# TP145 +3.3V_RUN TP147 +3.3V_LAN 1 1 1 R246 Do Not Stuff R221 1 R243 1 R239 1 2 2 2KR2F-3-GP 2 Do Not Stuff 2 Do Not Stuff 1 1 LANSC LANPWR LANSV LANRSET CTRL12 CTRL25 LANHP LANHN 10 12 11 47 9 16 3 4 24 25 LOM_DISABLE# VAUX_AVLBL SWITCH_VCC VMAIN_AVLBL SWITCH_VAUX RSET PD_12 PD_25 HSDACP HSDACN

88E8040-A0-NNC1C000-GP

DY DY
TP136 TP139

TSTPT TESTMODE

VPD_DATA VPD_CLK

DY
X2

1
C

Do Not Stuff GND +3.3V_LAN LANX2 1 1 +3.3V_LAN 2 LANX1 1 C268 1 C260 SC12P50V2JN-3GP C283 1 C281 1 2 SC1KP50V2KX-1GP 2 SC1U10V3KX-3GP 2 SC1U10V3KX-3GP

RXN TXN NC#27 NC#31 18 21 27 31

17 20 26 30

RXP TXP NC#26 NC#30

41 38

29 46

42 43

65

2VPD_DATA

48 48 48 48

MDI0MDI1MDI0+ MDI1+

MDI0MDI1MDI0+ MDI1+

R236 +PU_VDDO_TTL[43] 1 2 4K7R2J-2-GP R231 R234 +PU_VDDO_TTL[42] 1 2 4K7R2J-2-GP

XTAL-25MHZ-96GP C259 SC12P50V2JN-3GP

+2.5V_LOM C257 1 C258 1 C255 1 C288 1 C291 1 2 SCD1U10V2KX-4GP 2 SC1KP50V2KX-1GP 2 SC1KP50V2KX-1GP 2 SC1U10V3KX-3GP 2 SC4D7U6D3V5KX-3GP
B

DYDo Not Stuff


1
B

+1.2V_LOM +3.3V_RUN R510 1 +3.3V_LAN C264 1 2 C267 1 C282 1 C270 1 C292 1 Q14 C261 1 S 1 D MDI0+ C290 SC4D7U6D3V5KX-3GP C271 SC4D7U6D3V5KX-3GP C286 SC10U6D3V5MX-3GP C269 SCD1U10V2KX-4GP C266 SCD1U10V2KX-4GP 1 1 1 1 1 MDI0MDI1+ MDI11 R222 1 R223 1 R225 1 R224 C278 1 2 SC4D7U6D3V5KX-3GP D 1 G R257 10KR2J-3-GP 2 2 SC1KP50V2KX-1GP 2 SC1KP50V2KX-1GP 2 SC1U10V3KX-3GP 2 SC1KP50V2KX-1GP 2 SC1U10V3KX-3GP 2 SC1U10V3KX-3GP

DY DY

Do Not Stuff R248 1 2 Do Not Stuff +3.3V_ALW

C296 SCD1U10V2KX-4GP

AO3403-GP

DY DY DY DY

2 2 2 2

MDIS0_LAN Do Not Stuff Do Not Stuff MDIS1_LAN Do Not Stuff Do Not Stuff

1 C247

2 DYDo Not Stuff 2 DYDo Not Stuff

1 C248

Q15 2N7002-7F-GP 29 PM_LAN_ENABLE G

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

LAN Marvell-88E8040
Roberts Discrete
Sheet
1

Rev

-1
of 60

Date: Tuesday, May 19, 2009


5 4 3 2

38

SSID = CPU.Regulator

8,15 DPRSLPVR 5,8,14 H_DPRSTP# +3.3V_RUN PR11 1 1 R297 1 2 10KR2J-3-GP

CPUCORE_ON 29

DY

2 Do Not Stuff

CPU_VID[6..0] CPU_VID6 CPU_VID5 CPU_VID4 CPU_VID3 CPU_VID2 CPU_VID1 CPU_VID0

CLK_EN# +3.3V_RUN

TP22 Do Not Stuff 499R2F-2-GP Do Not Stuff Do Not Stuff Do Not Stuff
D

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

R305 10R3F-GP 2 2

C337 SCD1U10V2KX-4GP

+3.3V_RUN 1

49

43

42

41

40

39

38

48

47

45

DPRSLPVR

DPRSTP#

CLK_EN#

VR_ON

GND

VID6

VID5

VID4

VID3

VID2

VID1

VID0

3V3

+1.05V_VCCP

R312 1K91R2F-1-GP

U40

46

44

37

1 R29 6266A_DPRSTP# 1 R307 6266A_DPRSLPVR 1 R169 6266A_VRON 1 R308 6266A_D6 1 R309 6266A_D5 1 R303 6266A_D4 1 R304 6266A_D3 1 R298 6266A_D2 1 R301 6266A_D1 1 R310 6266A_D0 1 R313

6266A_CLK_EN#

6266A_3V3

Do Not Stuff

R314 BOOT1 UGATE1 PHASE1 PGND1 LGATE1 PVCC 36 35 34 33 32 31 30 29 28 27 R319 26 25 6266A_BOOT2 1 2 1R3F-GP +5V_RUN 6266A_BOOT1 1 2 1R3F-GP 2

15,29 VGATE_PWRGD 5 C341 1 2 SCD1U16V2KX-3GP PSI# 1 R35 1 R315 1 R316 2

1 6266A_PSI# 2 Do Not Stuff 2 6266A_PMON 3 4K99R2F-L-GP 2 6266A_RBIAS 4 147KR2F-GP 5

PGOOD PSI# PMON RBIAS VR_TT# NTC SOFT OCSET VW COMP FB FB2

C339 1

6266A_PHASE1

6266A_PHASE1 40
C

R36 Do Not Stuff

DY
2

SCD22U25V3KX-GP 6266A_UGATE1 6266A_PHASE1

6266A_UGATE1 40

4 CPU_PROCHOT# R37 1

6266A_ LGATE1 C345 1 2 SC2D2U10V3KX-1GP 6266A_LGATE2

6266A_ LGATE1 40

DY

2 Do Not Stuff C343 1

DY

6266A_VO C350 1

6266A_NTC 6 C346 2 Do Not Stuff 1 26266A_SOFT 7 SCD015U50V3KX-GP 6266A_OCSET 8 1 2 R38 12K1R2F-L1-GP 6266A_VW 9 2 SC1KP50V2KX-1GP R299 1

DY

2 Do Not Stuff

ISL6266AHRZ-GP

LGATE2 PGND2 PHASE2 UGATE2 BOOT2 NC#25

6266A_LGATE2 40

74.06266.073

6266A_PHASE2 6266A_UGATE2 C351 1 2 SCD22U25V3KX-GP 6266A_PHASE2 6266A_UGATE2 40 6266A_PHASE2 40

6266A_COMP 10 R317 1 C349 1 2 SC100P50V2JN-3GP R318 1 2 97K6R2F-GP


B

6266A_FB 2 6266A_FB2

11 12

8K25R2F-1-GP

DROOP

ISEN2 23

13

14

15

16266A_DROOP 16 R323 3K92R2F-GP 6266A_DFB 17

18

19

20

21

22

SC270P50V2KX-1GP C356

1 1KR2F-3-GP 6266A_VO 6266A_VSUM

6266A_ISEN2

6266A_VDIFF

6266A_VSEN

6266A_VDD

R322 1KR2F-3-GP 2

24 6266A_ISEN1 2 C18 SCD22U10V2KX-1GP 6266A_VO C19 SCD22U10V2KX-1GP 6266A_ISEN2 40 2 6266A_VO 40 40 6266A_VSUM 6266A_VSUM C358 SCD22U10V2KX-1GP 1 R332 2K61R2F-1-GP 1 2

C348 1 2

ISEN1

VSUM

VDIFF

VSEN

GND

VDD

RTN

DFB

VIN

VO

6266A_RTN

R320 1 2 1 2 100R2F-L1-GP-U R321 1 2 1KR2F-3-GP 6266A_SOFT SC2200P50V2KX-2GP

6266A_VIN

6266A_ISEN1 40

PWR_SRC_CPU 1 SCD01U50V2KX-1GP 1 SCD22U10V2KX-1GP 1 10R3F-GP R327 2 1

C360 SCD047U10V2KX-2GP 2 1

2 R331

2 SC180P50V2JN-1GP

C361 SC330P50V2KX-3GP

C364 1

1 PR12

DY

2 Do Not Stuff

R41 1 1 10R3F-GP C28 SC1U10V3KX-3GP 6266A_VO 2

+5V_RUN

R328 11KR2F-L-GP

R300 NTC-10K-9-GP 2

A00
6 VCC_SENSE 1 1 R329 2 Do Not Stuff

C20 2

6 VSS_SENSE

1 R330 2 Do Not Stuff

A00

C359 SC330P50V2KX-3GP

C27

R324 1 2 Main Source


A

C362 SCD01U50V2KX-1GP

Do Not Stuff

Wistron Corporation
6266AGND Title Size Document Number Custom 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

CPU VCORE POWER(1/2)


Roberts Discrete
Sheet
1

Rev

hexainf@hotmail.com GRATIS - FOR FREE


5

-1
of 60

Date: Tuesday, May 19, 2009


4 3 2

39

SSID = CPU.Regulator
PWR_SRC_CPU +PWR_SRC G10 C1 SC10U25V6KX-1GP C333 SC10U25V6KX-1GP C354 SC10U25V6KX-1GP C2 SC10U25V6KX-1GP 1
D

+PWR_SRC

PWR_SRC_CPU 2 5 6 7 8 5 6 7 8 1 C4 SCD1U25V3KX-GP C335 SCD1U25V3KX-GP C21 SCD1U25V3KX-GP

Do Not Stuff G2 1 2 Do Not Stuff G1 1 2 Do Not Stuff G4 1 2 Do Not Stuff G3 1 2 Do Not Stuff G9 1 2 Do Not Stuff G8 1 2 Do Not Stuff G7 1 2 Do Not Stuff G6 1 2 Do Not Stuff

U39 AOL1426-GP S S S S G S S S S S G

U3 AOL1426-GP

Do Not Stuff G5 1 2

TC10 SE100U25VM-11GP

1 2

PTC3 SE100U25VM-11GP

4 3 2 1

4 3 2 1

D D D D D

D D D D D D

CPU noise

+VCC_CORE 39 6266A_UGATE1 6266A_UGATE1 L8 1 2 IND-D36UH-9-GP 1 1 5 6 7 8 5 6 7 8 TC14 Do Not Stuff G53 Do Not Stuff U2 AOL1412-GP 1 S S S S G S S S S S G TC1 SE330U2VDM-L-GP 2 2 1 TC16 SE330U2VDM-L-GP

39 6266A_PHASE1

6266A_PHASE1

68.R3610.20C
D D D D D U38 AOL1412-GP 4 3 2 1 D D D D D D G52 Do Not Stuff 4 3 2 1 1

DY

39 6266A_ LGATE1

39 6266A_VSUM 39 6266A_ISEN1 39 6266A_VO 39 6266A_ISEN2

6266A_VSUM 6266A_ISEN1 6266A_VO 6266A_ISEN2 PWR_SRC_CPU

R42 R39 R43 R40

1 1 1 1

2 3K65R2F-1-GP 2 10KR2F-2-GP 2 1R2F-GP 2 10KR2F-2-GP

6266A_ LGATE1

C22 SC10U25V6KX-1GP

2 C355 SC10U25V6KX-1GP

C23 SC10U25V6KX-1GP

C334 SCD1U25V3KX-GP

U42 AOL1426-GP S S S G S S S S S G

U5 AOL1426-GP

C353 SCD1U25V3KX-GP

5 6 7 8

5 6 7 8

4 3 2 1

4 3 2 1

D D D D 6266A_UGATE2

D D D D D D

+VCC_CORE 39 6266A_UGATE2 39 6266A_PHASE2 L10 6266A_PHASE2 5 6 7 8 5 6 7 8 TC15 SE330U2VDM-L-GP TC13 SE330U2VDM-L-GP 1 2 IND-D36UH-9-GP 1

68.R3610.20C
U43 AOL1412-GP G54 Do Not Stuff G55 Do Not Stuff

U6 AOL1412-GP S S S G 4 3 2 1 6266A_LGATE2 6266A_VSUM 6266A_ISEN2 6266A_VO 6266A_ISEN1 R333 1 R325 1 R334 1 R326 1 S S S S S G

4 3 2 1

39 6266A_LGATE2

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 0.36UH PCMC104T-R36MN1R05J CYNTEC DCR 1.05(+5%~-5%)mohm Isat =60Arms 68.R3610.20C O/P cap: 330U 2V EEFSX0D331ER 9mOhm 3.0Arms Panasonic/79.33719.L01 H/S: AOL1426 PowerPAK/ 10.2mohm/12.5mOhm@4.5Vgs/84.01426.037 L/S: AOL1412 PowerPAK/ 3.8mohm/4.65mOhm@4.5Vgs/ 84.01412.037

2 3K65R2F-1-GP 2 10KR2F-2-GP 2 1R2F-GP 2 10KR2F-2-GP Title Size Document Number Custom Main Source
A

D D D D

D D D D D D

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

CPU VCORE POWER(2/2)


Roberts Discrete
Sheet
1

Rev

-1
of 60

Date: Tuesday, May 19, 2009


5 4 3 2

40

SSID = PWR.Plane.Regulator_3p3v5v
+PWR_SRC G19

+PWR_SRC G17

PWR_SRC_17020

Do Not Stuff G23 2 1 PWR_SRC_17020 Do Not Stuff G63 2 1 Do Not Stuff G70 2 1 Do Not Stuff G68 2 1 +5V_ALW2 +5V_VCC1 R393 Do Not Stuff

1
Do Not Stuff G72 1
4

No Install for ISL6236 Install 10 ohm for MAX8778

Do Not Stuff G33 1 Do Not Stuff G21 1 Do Not Stuff G36 1 Do Not Stuff

2 1 1

10R3F-GP

0.1uF for ISL6236, Install with 1uF for Max8778

PWR_SRC_17020

C177 SC4D7U6D3V5KX-3GP

-1
PWR_SRC_17020

R399 Do Not Stuff

+3.3V_RTC R397 Do Not Stuff

+2.0V_REF_3V5VREG +5V_VCC1

R113 Do Not Stuff

C165 1 2 SC1U25V3KX-1-GP 3V/5V_VIN

+5V_VCC1

A00
R384 Do Not Stuff PWR_SRC_17020

C85 SC10U25V6KX-1GP

C401 SC10U25V6KX-1GP

C86 SCD1U25V3KX-GP

R114

3V/5V_TON

C421 SC1KP50V2KX-1GP

C148 SC10U25V6KX-1GP

C422 SC10U25V6KX-1GP

C147 SCD1U25V3KX-GP

CLOSE TO PIN 10 +3.3V_RTC

MAX8778_3/5V_AGND

R107 Do Not Stuff

2 C146

U15 IRF8707PBF-GP

D 8 D 7 D 6 D 5

1 R391 2 Do Not Stuff

LDO_EN

DY

U12 IRF8707PBF-GP

SC1U25V3KX-1-GP

5 6 7 8

2 DYDo Not Stuff

DY

C169 SCD1U25V3KX-GP

C402 Do Not Stuff

DY

R387 Do Not Stuff

C155 SC1U25V3KX-1-GP

DY
1

D D D D D D S S S S G G

LDOREFIN LDO IN RTC ONLDO VCC TON REF

5V_ALW +/- 5% Design Current: 7.65A Peak current 10.7A 11.8<OCP<15A


3

MAX8778_3/5V_AGND

4 3 2 1

U18

8 7 6 5 4 3 2 1

MAX8778_3/5V_AGND

1
Do Not Stuff G45 1 Do Not Stuff G43 1 Do Not Stuff G48 1 Do Not Stuff G47 1 Do Not Stuff G46 1 Do Not Stuff G66 2

2 1

+5V_ALWP SCD1U10V2KX-4GP

U11 AO4712-GP

R129 2D2R5F-2-GP

TC7 ST220U6D3VDM-15GP ST220U6D3VDM-15GP

TC20 Do Not Stuff

1 C424

18778_PHASE2_Sn

C179 SCD1U25V3KX-GP

BST1 DL1 VDD SECFB AGND PGND DL2 BST2

DY

17020_PHASE2 S S S S G G

15V_PHASE1_Sn 2

D 8 D 7 D 6 D 5

U17 AO4712-GP

G41 Do Not Stuff

+DH1

MAX8778_3/5V_AGND 17020_PHASE1

PR19 Do Not Stuff MAX8778_3/5V_AGND

MAX8778_3/5V_AGND

1 2 IND-3D3UH-57GP

1 R136 2 390KR2F-GP

DY

C139 SCD1U25V3KX-GP

C397 SCD1U10V2KX-4GP

5 6 7 8

G44

L15

17020_FB 17020_ILIM1 3V_5V_POK 5V_EN

R106 1 2 Do Not Stuff 1 +5V_VCC1

DY

R86 Do Not Stuff

TC2 ST220U6D3VDM-15GP

+5V_ALW

+5V_ALWP

G18 Do Not Stuff

NEC 220uF 6D3V, V Size ESR=25mohm

1 S 2 S 3 S 4 G

MAX8778_3/5V_AGND

C183 1

33 9 10 11 12 13 14 15 16

GND

R108

CLOSE TO PIN 30

L13

NEC 220uF 6D3V, V Size ESR=25mohm


+3.3V_ALWP

3V_ALW +/- 5% Design Current: 4.07A Peak current 5.81A 6.39<OCP<8.13A


+3.3V_ALWP G30 +3.3V_ALW

1 32 31 30 29 28 27 26 25
17020_REFIN2 17020_ILIM2 17020_OUT2 17020_SKIP# 3V_5V_POK 3V_EN 17020_UGATE2

2
MAX8778_3/5V_AGND

BYP OUT1 FB1 ILIM1 PGOOD1 ON1 DH1 LX1

180KR2F-GP

SCD1U25V3KX-GP

REFIN2 ILIM2 OUT2 SKIP# PGOOD2 ON2 DH2 LX2

1 2 IND-3D3UH-57GP

1
Do Not Stuff G32 1 Do Not Stuff G31 1 Do Not Stuff G27 1 Do Not Stuff G26 1

D D D D D D

C176 SC330P50V2KX-3GP

8778_FB1_1

17 18 19 20 21 22 23 24

MAX17020ETJ-GP

C149 SCD1U25V3KX-GP

4 3 2 1

1 S 2 S 3 S 4 G

8778_LGATE2

DY
2 2 1

R132 Do Not Stuff

0R3-0-U-GP 17020_LGATE1

+5V_ALW2

R137 Do Not Stuff

C172 SC1U25V3KX-1-GP

1 G42 Do Not Stuff

MAX8778_3/5V_AGND

Do Not Stuff G64 2 1 Do Not Stuff

A00
2
+5V_ALW2 MAX8778_3/5V_AGND

Vout2 = Vref(Rrefin_top/Rrefin_bottom + 1) A00


1 R127 2 Do Not Stuff

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 3.3UH PCMC063T3R3MN CYNTEC DCR 28~30mohm Isat =13.5Arms 68.3R310.20A O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L O/P cap: 150U 6.3V PSLB20J157M(45) 45mOhm 1.374rms NEC_TOKIN/77.C1571.09L H/S: IRF8707 SO-8/ 14.2mohm/17.5mOhm@4.5Vgs/ 84.08707.037 L/S: AOS4712 SO-8/ 15mohm/18mOhm@4.5Vgs/ 84.04712.037

8778_BOOT1_1 1

217020_BOOT1

8778_SECFB

R135

17020_BOOT2 1

2 8778_BOOT2_1 R118 0R3-0-U-GP

DY

C79 Do Not Stuff

Do Not Stuff

Vout1 = 0.7(Rtop/Rbottom + 1)
34 3V_5V_EN

R110 1 R134 1

2 Do Not Stuff 2 Do Not Stuff 1 1

3V_EN

5V_EN

+3.3V_RTC_LDO

C141 Do Not Stuff

DYDY
2 2

C180 Do Not Stuff

1
R109 100KR2J-1-GP 3V_5V_POK

3V_5V_POK 29 +5V_ALW2

+3.3V_RTC_LDO

-1
1 2
5V_ALW2_EN

U19

SC1U10V3KX-3GP C171

NC#4

SKIPSEL Operating Mode

GND

Open/REF (2V)

High (VCC or 3.3V) forced-PWM operation

R5413 Do Not Stuff

G9091-330T11U-GP R5414 Do Not Stuff

pulse-skipping ultrasonic mode mode Open (REF) 400kHz 300kHz

DY
1

TONSEL CH1 Freq


1

GND 400kHz 500kHz

High (VCC) 200kHz 300kHz


1

CH2 Freq

LDOREFIN Operating Mode

GND 4.90/5.0/5.10

VCC

VLDOREFIN = 0.5V
Main Source

3.23/3.3/3.37 0.96/1.0/1.04

C184 SC1U10V3KX-3GP

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 3.3UH PCMC063T3R3MN CYNTEC DCR 28~30mohm Isat =13.5Arms 68.3R310.20A O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L O/P cap: 150U 6.3V PSLB20J157M(45) 45mOhm 1.374rms NEC_TOKIN/77.C1571.09L H/S: IRF8707 SO-8/ 14.2mohm/17.5mOhm@4.5Vgs/ 84.08707.037 L/S: AOS4712 SO-8/ 15mohm/18mOhm@4.5Vgs/ 84.04712.037

1 2 3

VIN GND EN

VOUT

5 4 1

Wistron Corporation
FB1 GND VCC REFIN2 5V RTC (3.3V)
Title 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

hexainf@hotmail.com GRATIS - FOR FREE


A

Operating 4.925/5.00/5.075 1.482/1.50/1.518 Mode

Operating 3.255/3.30/3.345 Mode

1.038/1.050 /1.062
Size A2 Date:

DC to DC 3.3V/5V
Document Number

Roberts Discrete
Sheet
E

Rev

-1

Tuesday, May 19, 2009

41

of

60

SSID = PWR.Plane.Regulator_1p5v

+5V_ALW

+1.8V_SUS

C208 SC1U10V3KX-3GP

C205 SC10U6D3V5MX-3GP

DY

C206 Do Not Stuff

+1.5V_RUN +/- 5% Design Current: 2.8A Peak current 3.5A


U21
C

VCNTL

29,34,43,44,50 RUNPWROK 15,25,29,34,35,43,44,50 PM_SLP_S3# 1 R189 2 2K2R2J-2-GP 1 C216 Do Not Stuff 1D5V_EN

7 8

POK EN

VIN VIN VOUT VOUT

5 9 TC22 ST100U6D3VBM-5GP C212 SCD01U16V2KX-3GP 3 4 1 1 R176 1KR2F-3-GP 2

+1.5V_RUN

Vo=0.8*(1+(R1/R2))

GND

DY
2 APL5912-KAC-GP

DY
2

FB

SO-8-P

R184 1K13R2F-1-GP 2

SSID = PWR.Plane.Regulator_1p1v
+5V_ALW
B

Vout=0.8V*(R1+R2)/R2

TC23 Do Not Stuff

NEC_TOKIN 100uF, 6.3V, B2 Size Iripple=1.374A, ESR=45mohm

U5111 1 29 1.1V_RUN_EN 2 3 1 R5416 B VCC A 5 +5V_ALW 4 1.1V_EN 1 1 +1.8V_SUS

DY

GND Do Not Stuff

74LVC1G07GW
C427 SC1U10V3KX-3GP

DYDo Not Stuff


2

Please place near KBC U20.

C439 SC10U6D3V5MX-3GP

DY

C440 Do Not Stuff

+1.1V_RUN +/- 5% Design Current: 2.32A Peak current 2.9A

U53 +3.3V_ALW 1 R5423 10KR2F-2-GP 2 29,34,43,44,50 RUNPWROK 15,25,29,34,35,43,44,50 PM_SLP_S3# 1 R278 2 Do Not Stuff 1 7 1.1V_EN 1 8 POK EN

VCNTL

VIN VIN VOUT VOUT

5 9 C436 SCD01U16V2KX-3GP 3 4 1 R3302 1KR2F-3-GP 1 2

+1.1V_SRC_MP

+1.1V_RUN

DY

G3306 1 2 Do Not Stuff G3307 1 2 Do Not Stuff G3308 1 2 Do Not Stuff

GND

C423 Do Not Stuff

FB

Q5112 2N7002SPT +1.1V_RUN

1.1V_RUN_EN

1 R3315 2 Do Not Stuff

APL5912-KAC-GP

TC24 ST100U6D3VBM-5GP

Vo=0.8*(1+(R1/R2))

R3304 Do Not Stuff

DY
2

SO-8-P

Main Source

R3303 2K67R2F-2-GP 2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

3 1

R5424 2 10R3F-GP

Vout=0.8V*(R1+R2)/R2
Size Document Number Custom Date: Tuesday, May 19, 2009
4 3 2

DC to DC 1.5V/1.1V
Roberts Discrete
Sheet
1

Rev

1.1V_RUN_EN
5

-1
of 60

42

SSID = PWR.Plane.Regulator_1p05v

+1.05V_RUNP G67 2 1

+1.05V_VCCP

+1.05V_RUNP G69 1 2 Do Not Stuff G73 1 2 Do Not Stuff G76 1 2 Do Not Stuff G24 1 2 Do Not Stuff G34 1 2 Do Not Stuff G38 1 2 Do Not Stuff G39 1 2 Do Not Stuff G40 1 2 Do Not Stuff

+1.05V_VCCP

Do Not Stuff G74 2 1 Do Not Stuff G71 2 1


D

+PWR_SRC G15 1 2

+1.05V_PWR_SRC

+PWR_SRC G60 1 2 Do Not Stuff G59 1 2 Do Not Stuff G61 1 2 Do Not Stuff G62 1 2 Do Not Stuff G58 1 2 Do Not Stuff

+1.05V_PWR_SRC

Do Not Stuff G75 2 1 Do Not Stuff G20 2 1 Do Not Stuff G37 2 1 Do Not Stuff G22 2 1 Do Not Stuff G65 2 1 Do Not Stuff

Do Not Stuff G14 1 2 Do Not Stuff G13 1 2 Do Not Stuff G12 1 2 Do Not Stuff G16 1 2 Do Not Stuff

+5V_ALW
C

H/S: FDS8880_NL SO-8/ 10mohm/12mOhm@4.5Vgs 84.08880.037


1

+1.05V_PWR_SRC

C412 SC10U25V6KX-1GP

C125 SC10U25V6KX-1GP

C411 SC10U25V6KX-1GP

C120 SCD1U25V3KX-GP

C400 SC1U10V3KX-3GP

5 6 7 8

U13 FDS8880-NL-GP C396 SC1U10V3KX-3GP 1 R365 2 Do Not Stuff U49 +1.05V_V5FILT 4 10 14 5 1 V5FILT V5DRV VBST VFB EN_PSV TON TRIP DRVH LL DRVL VOUT PGOOD GND PGND 13 12 9 3 6 7 8 +1.05V_DRVH +1.05V_LL +1.05V_DRVL +1.05V_VOUT RUNPWROK 29,34,42,44,50 R358 1 2 +3.3V_RUN 10KR2J-3-GP D19 2 3 +5V_RUN U16 FDS8672S-GP

5 6 7 8

R364 300R3-GP 2

DY
2

U50 Do Not Stuff

+5V_ALW 2 A

A00

+1.05V_LL1

C398 1 2 S S S G 4 3 2 1 SCD1U25V3KX-GP

DY
4 3 2 1 S S S G

C121 Do Not Stuff

D D D D

D D D D

+1.05V_SUSP+/- 5% Design Current: 9.46A Peak current 11.82A 13<OCP<16.55


L14 1 1 2 Do Not Stuff G35 C413 SCD1U10V2KX-4GP +1.05V_RUNP ST330U2D5VDM-13GP

D21 RB551V30-GP K D23 1 15,25,29,34,35,42,44,50 PM_SLP_S3# +1.05V_PWR_SRC 1 R355 R363 1 PR13 1 2 CH751H-40PT 2 100KR2J-1-GP

5 6 7 8

5 6 7 8

IND-1D5UH-34-GP 1 R388 Do Not Stuff

+1.05V_EN

U51 Do Not Stuff

DY
2

TC6

TC5

C378 SCD01U50V2KX-1GP

7K15R2F-L-GP

RT: Non_ASM TI: ASM

DY

4 3 2 1

PR15

4 3 2 1

R366

TPS51117PWR-GP

Do Not Stuff

DY Do Not Stuff
2 +1.05V_LL

DY

C429 Do Not Stuff

2 200KR2J-L1-GP

+1.05V_TON 2 +1.05V_TRIP 11

DY
S S S G S S S S G

DY

Do Not Stuff

+1.05V_VBST +1.05V_VFB

D D D D

D D D D D

Vout=0.75V*(R1+R2)/R2
+1.05V_VOUT 1 R353 12KR2F-L-GP 1

1 BAW56-2-GP RT: Non_ASM TI: ASM TI: Non_ASM RT :ASM TI: Non_ASM RT :ASM

PM_SLP_S3#

R352 30KR2F-GP

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 1.5UH PCMC104T-1R5MN Cyntec DCR:3.8 ~4.2mohm Isat =33Arms 68.1R510.10J O/P cap: 330U 2.5V PSLV0E337M(15) 15mOhm 2.886Arms NEC_TOKIN/ 77.C3371.10L H/S: IRF8707 SO-8/14.2mohm/17.5mOhm@4.5Vgs/ 84.08707.037 L/S: FDS8672S SO-8/ 5.3mOhm/7.0mohm@4.5Vgs/ 84.08672.A37 Switching freq-->350KHz

L/S: FDS8672S SO-8 5.3mOhm/7.0mohm@4.5Vgs 84.08672.A37

DY
2

C382 Do Not Stuff

+1.05V_VFB

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

DC to DC 1.05V
Roberts Discrete
Sheet
1

Rev

hexainf@hotmail.com GRATIS - FOR FREE


5

-1
of 60

Date: Tuesday, May 19, 2009


4 3 2

43

SSID = PWR.Plane.Regulator_1p8v0p9v

TI TPS51116 for 1.8V and 0.9V


PR2 SC1U10V3KX-3GP PC9 2 1 1 10KR2F-2-GP 1 +5116_PWR_SRC +3.3V_ALW 2 2 51116_VDD

+5V_ALW +5V_ALW 1 PR4 5D1R3J-GP 2 PC16 SC1U10V3KX-3GP +5V_ALW A 15,25,29,34,35,42,43,50 PD1 Do Not Stuff PM_SLP_S3# PR9 PR8 1 1

A00
2 10KR2F-2-GP 0D9V_EN 1 2 C89 SCD1U10V2KX-4GP

PC7 SC1KP50V2KX-1GP

DY
K

15,25,29 PM_SLP_S4#

DY

2 Do Not Stuff

+1.8V_SUS_P PG8 1 2 Do Not Stuff PG10 1 2 Do Not Stuff PG14 1 2 Do Not Stuff PG13 1 2 Do Not Stuff PG12 1 2 Do Not Stuff PG11 1 2 Do Not Stuff PG9 1 2 Do Not Stuff PG15 1 2 Do Not Stuff PG16 1 2 Do Not Stuff PG17 1 2

+1.8V_SUS

16

14

VDDP

VDDP

ILIM

DY
1 29,34,42,43,50 RUNPWROK 1

PR6 Do Not Stuff 13

15

+ILIM

PU1 22 TPS51116_VBST1 21 TPS51116_UGT 1 PR1 2 TPS51116_VBST Do Not Stuff

A00

BST DH

PGD NC#12 EN/PSV VTTEN VTTIN DL NC#7 PGND2 TON VDDQS VTT VTTS VSSA GND VCCA REF FB PGND1 PGND1 18 17 8 9 6 19 TPS51116_LGT LX 20 TPS51116_PHS

RT
PR7

2 619KR2F-GP

A00

12 PM_SLP_S4#_1 11 0D9V_EN 10 23 1 7 2 1

1ST TI51116
C

2ND RT8207 +1.8V_SUS_P ASM +5V_ALW PR16 1 +1.8V_SUS_P PR14 1 PC2 SC1U10V3KX-3GP 2 Do Not Stuff 2 Do Not Stuff 2 PC17 +0D9V_DDR_P Do Not Stuff

+PWR_SRC PG6 2

+5116_PWR_SRC 1

PR7

Non_ASM

DY

Do Not Stuff PG4 2 1 TPS51116_VDDQSNS 51116_VDDQSET +5V_ALW 1 1 PR17 2 +5116_PWR_SRC Do Not Stuff Do Not Stuff PC12 SC10U25V6KX-1GP PC19 SC10U25V6KX-1GP PC18 SCD1U25V3KX-GP PC20 SC4D7U25V5KX-GP Do Not Stuff 2 2 2 1 Do Not Stuff PG7 2 1 Do Not Stuff PG5 2 1 Do Not Stuff PG3 2 1

DY
1

24 2

-1

25

1 PR3 2 Do Not Stuff PC8 SCD033U16V3KX-GP 5 6 7 8 D D D D PU2 AOL1426-GP

D3302 CH751H-40PT 2
B

RT8207GQW-GP +V_DDR_MCH_REF

DY PC10

1 PM_SLP_S4#_1 R5421 PC5 SC10U6D3V5MX-3GP PC4 SC10U6D3V5MX-3GP PC6 SC10U6D3V5MX-3GP S S S G

+1.8V_SUS +/- 5% Design Current: 14.1A Peak current 20.1A 22.11<OCP<28.14A

Do Not Stuff PG19 1 2 Do Not Stuff PG20 1 2 Do Not Stuff PG21 1 2


B

15,25,29 PM_SLP_S4# 1 2

4 3 2 1

+0D9V_DDR_P

+1.8V_SUS_P PC3 SCD1U10V2KX-4GP TPS51116_UGT TPS51116_VBST 1 2 TPS51116_PHS 1 1 C5389 SCD047U10V2KX-2GP PL1 2 PTC2 ST330U2D5VDM-13GP PTC1 ST330U2D5VDM-13GP PC15 SCD1U10V2KX-4GP COIL-1UH-33-GP 2 1 PR10 Do Not Stuff PC14 SC4D7U6D3V5KX-3GP 1 1 1 1

20KR2F-L-GP

PC1 SCD1U25V3KX-GP 5 6 7 8 D D D D U14 AOL1412-GP

PG18 Do Not Stuff

DY
2

Do Not Stuff PG22 1 2 Do Not Stuff PG23 1 2 Do Not Stuff PG25 1 2 Do Not Stuff PG24 1 2

TPS51116_PHS_SET +0D9V_DDR_P PG2 +0.9V_DDR_VTT 2

DY
2

PC13 Do Not Stuff TPS51116_VDDQSNS PR5 Do Not Stuff 51116_VDDQSET

State S0 S3 S4/S5
A

S3 Hi Lo Lo

S5 Hi Hi Lo

VDDR On On Off

VTTREF On On Off

VTT On Off(Hi-Z) Off

TPS51116_LGT 1

Do Not Stuff PG1 1 2 Do Not Stuff

4 3 2 1

DY
PC11 Do Not Stuff

S S S G

Do Not Stuff

DY

Main Source

VDDQSET GND V5IN FB Resistors

VDDQ (V) 2.5 1.8 Adjustable

VTTREF and VTT VVDDQSNS/2 VVDDQSNS/2 VVDDQSNS/2

NOTE DDR DDR2 1.5 V < VVDDQ < 3 V

Close to VFB Pin (pin5)

PR18 Do Not Stuff

DY
2

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 0.82UH PCMC063T-R82MN Cyntec DCR:14~15mohm Isat =18Arms 68.R8210.10V O/P cap: 330U 2.5V PSLV0E337M(15) 15mOhm 2.886Arms NEC_TOKIN/ 77.C3371.10L H/S: AOL1426 PowerPAK/ 10.2mohm/12.5mOhm@4.5Vgs/84.01426.037 L/S: AOL1412 PowerPAK/ 3.8mohm/4.65mOhm@4.5Vgs/ 84.01412.037 Switching freq-->400KHz
4 3 2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

DC to DC 1.8V/0.9V
Roberts Discrete
Sheet
1

Rev

-1
of 60

Date: Tuesday, May 19, 2009


5

44

SSID = Charger
MAX8731_LDO 1 R339 10KR2F-2-GP ACAV_IN
D

+PBATT

EC77 SCD1U25V3KX-GP

EC76 SCD1U25V3KX-GP

EC80 SCD1U25V3KX-GP

EC79 SCD1U25V3KX-GP

+3.3V_RTC_LDO

R72 100KR2J-1-GP 2 +DC_IN_SS

Adaptor In Soft-Start Circuit


Layout Trace 250mil
8 7 6 5 2 U47 D D D D

Layout Trace 300mil


S S S G 1 2 3 4 +SDC_IN R338 1 2 +DC_IN_SS G57 Do Not Stuff G56 Do Not Stuff D01R2512F-4-GP +PWR_SRC

29

AC_IN# C67 Do Not Stuff

Layout Trace 300mil


1 2 3 4 U37 S S S G AO4407A-GP R295 470KR2J-2-GP 2 1 D D D D 8 7 6 5

+PBATT

DY
2

A00

Q4 G S ACAV_IN

AO4407A-GP R59 10KR2J-3-GP 2

DC_IN_D R64 R62 1 2 DCIN_GATE2 1 2 100KR2J-1-GP DCIN_GATE1 1

2N7002-7F-GP

R341 15K4R2F-GP

29 ACAV_IN

G S ACAV_IN G

Q2 2N7002-7F-GP

49K9R2F-L-GP Q3 2N7002-7F-GP

1 R46 2 Do Not Stuff 1 C39 SC1U25V5KX-1GP U7 2 MAX8731_DCIN MAX8731_ACIN C46 SCD01U50V2KX-1GP 22 2 11 1 C64 SCD1U25V3KX-GP ACAV_IN BAT_SCL DCIN ACIN VDD 1

CHG_AGNDCHG_AGND

CHG_AGND 1 C369 SC10U25V0KX-3GP C38 SC1U10V3KX-3GP 5 6 7 8 C40 SCD1U25V3KX-GP C371 Do Not Stuff

ASNS

CSSP CSSN VCC BST LDO

28 27 26 25 21 24 23 20 19 18 17 MAX8731_CSIP

R49 33R2J-2-GP MAX8731_VCC R45 0R3-0-U-GP D5 MAX8731_BST 1 2MAX8731_BST1 K A MAX8731_LDO BAS516-1-GP MAX8731_DHI R44 C34 1R3F-GP MAX8731_LX 1 2 1 2 C42 SC220P50V2KX-3GP MAX8731_DLO 1 2

D D D D

DY
2

CHG_AGND C48 1

+3.3V_RTC_LDO

13 10

ACOK DHI SCL LX

SC1U10V3KX-3GP

4 3 2 1

G S S S

R48 49K9R2F-L-GP

U45 SI4800BDY-T1

R52 365KR3F-GP

+DC_IN_SS

MAX8731_CSSN

MAX8731_CSSP

C47 SCD1U25V3KX-GP

1 C41 SCD1U25V3KX-GP

CHG_AGND 29,48 BAT_SCL

+PBATT 2 SCD1U25V3KX-GP L9 MAX8731_LX1 1 IND-5D8UH-GP 5 6 7 8 2 CHG_PWR R306 1 2 D01R2512F-4-GP 1

CHG_AGND

Layout Trace 300mil


C331 SC10U25V0KX-3GP C329 SC10U25V0KX-3GP C323 Do Not Stuff

29,48 BAT_SDA

BAT_SDA

SDA DLO

G51 Do Not Stuff

BATSEL

PGND CSIP

G50 Do Not Stuff

14 CHG_AGND 29 AD_IA 8

CSIN INP

4 3 2 1

G S S S

MAX8731_CSIN

R61 1MAX8731_CCV1

GND

C58 SCD01U50V2KX-1GP

C57 SCD01U50V2KX-1GP

C55 SCD01U50V2KX-1GP

C62 SCD1U16V2KX-3GP

C51 SC1U10V3KX-3GP

2 10KR2F-2-GP MAX8731_CCV 6 MAX8731_CCI 5 MAX8731_CCS 4 MAX8731_REF 3 MAX8731_DAC 7 12 C59 SCD1U16V2KX-3GP 1 1 1

CCV CCI CCS REF DAC GND

FBSB

16 R335

FBSA

15

BAT_SENSE 1

BATT_SENSE

BATT_SENSE 48

100R2F-L1-GP-U C372 SCD01U50V2KX-1GP Main Source


A

R65 10KR2F-2-GP

29

MAX8731AETI-GP

1 2 G11 Do Not Stuff

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

CHG_AGND

CHARGER MAX8731
Roberts Discrete
Sheet
1

U44 SI4800BDY-T1

DY

D D D D

Rev

hexainf@hotmail.com GRATIS - FOR FREE


5

-1
of 60

Date: Tuesday, May 19, 2009


4 3 2

45

2 EC54 Do Not Stuff

DY

For EMI

+3.3V_RTC_LDO

25,26 WLAN_ACT 25,26 BT_ACT

DY

H12 Do Not Stuff 2 EC151 Do Not Stuff 1

H18 Do Not Stuff

H6 Do Not Stuff

H3 Do Not Stuff

SPR2 SPRING-24-GP 34.45T31.001

2 1 EC163 Do Not Stuff 1 1 2 1 1

DY
1

1 H9 Do Not Stuff H11 Do Not Stuff

EC81 SCD1U16V2KX-3GP

DY

H2 Do Not Stuff

1 EC88 Do Not Stuff

DY
EC162 Do Not Stuff

34.4W005.301 Mini Card BOSS

+3.3V_RUN

DY

SPR3 SPRING-24-GP 34.45T31.001 H14 Do Not Stuff 1 1 1 H10 Do Not Stuff H5 Do Not Stuff H7 Do Not Stuff 1 2 1 1 1

1 EC93 SC47P50V2JN-3GP

DY

1 EC9 Do Not Stuff

34.4W004.501 New Card BOSS


1

SPR5 SPRING-58-GP 34.4B312.002 H16 Do Not Stuff EC165 Do Not Stuff

+5V_MOD

DY

DY

H4 Do Not Stuff

H13 Do Not Stuff

H8 Do Not Stuff

1 EC166 Do Not Stuff

EC71 Do Not Stuff

DY

1 EC122 Do Not Stuff

1 1 1 1

SPR4 SPRING-24-GP 34.45T31.001

DY

1 EC108 Do Not Stuff

34.4W001.201 NB Thermal BOSS

H19 Do Not Stuff

H17 Do Not Stuff

H15 Do Not Stuff

H1 Do Not Stuff

1 EC169 1 EC168 1 EC167 1

+5V_ALW

DY

1 SW1 SPRING-24-GP 34.45T31.001

SPR1 SPRING-24-GP 34.45T31.001 H20 Do Not Stuff SPR6 SPRING-6-GP

+5V_ALW

1 EC53 Do Not Stuff 2 DY

DY
Do Not Stuff

DY
Do Not Stuff 2

Do Not Stuff 2

EC96 Do Not Stuff 2 +3.3V_ALW 1 EC99 SC47P50V2JN-3GP

DY

for Discrete

+5V_RUN

+3.3V_RUN

+DC_IN_SS

+0.9V_DDR_VTT

EC83 Do Not Stuff

DY

EC85 Do Not Stuff

DY

EC41 Do Not Stuff

DY

EC92 Do Not Stuff

DY

+3.3V_RUN

EC150 Do Not Stuff

DY

EC82 Do Not Stuff

DY

EC43 Do Not Stuff

DY

EC91 Do Not Stuff

DY
+PWR_SRC

EC137 Do Not Stuff 2 1

DY

EC101 Do Not Stuff 2 1

DY

EC34 Do Not Stuff 2 1

DY

1 C324 SCD1U25V3KX-GP

EC159 Do Not Stuff +5V_RUN +1.8V_SUS +3.3V_RUN

DY

+PWR_SRC

EC173 Do Not Stuff

DY

EC58 Do Not Stuff

DY

EC90 Do Not Stuff

DY

EC45 Do Not Stuff

DY

EC97 Do Not Stuff

DY

EC171 Do Not Stuff

DY

EC10 Do Not Stuff

DY

EC11 Do Not Stuff

DY

EC44 Do Not Stuff

DY

1 EC13 SCD1U25V3KX-GP

EC172 Do Not Stuff


2

DY

EC86 Do Not Stuff

DY

EC50 Do Not Stuff

DY

EC47 Do Not Stuff

DY

1 EC1 SCD1U25V3KX-GP
2

EC170 Do Not Stuff 2 1 EC174 Do Not Stuff

DY

EC64 Do Not Stuff

DY

EC68 Do Not Stuff

DY

EC46 Do Not Stuff

DY

EC94 Do Not Stuff

DY

DY

EC141 Do Not Stuff

DY

EC153 Do Not Stuff

DY

EC55 Do Not Stuff

DY

EC149 Do Not Stuff Title

DY

EC152 Do Not Stuff

DY

EC98 Do Not Stuff

DY

DY

DY

DY

DY

Main Source

1 EC136 Do Not Stuff

1 EC148 Do Not Stuff

1 EC106 Do Not Stuff

1 EC49 Do Not Stuff

+1.05V_VCCP

Size Document Number Custom

Date: Tuesday, May 19, 2009 Sheet


1

EC72 Do Not Stuff

DY

EC67 Do Not Stuff

DY

EC117 Do Not Stuff

DY

EC138 Do Not Stuff

DY

EC63 Do Not Stuff

DY

EC59 Do Not Stuff

DY

EC51 Do Not Stuff

DY

DY

DY

DY

1 EC42 Do Not Stuff

1 EC52 Do Not Stuff

1 EC89 Do Not Stuff

MISC
46 of 60 Rev

DY

DY

DY

SSID = Mechanical

Roberts Discrete
-1

1 EC66 Do Not Stuff 2 1 EC73 SCD1U16V2KX-3GP

1 EC100 Do Not Stuff 2 1 EC95 SCD1U16V2KX-3GP

1 EC2 Do Not Stuff

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Wistron Corporation
A

EC131 Do Not Stuff

DY

SSID = AUDIO

C559 SC1U10V3KX-3GP

Speaker Connector
SPK1 AUD_SPK_L2_R 1 AUD_SPK_L1_R 2 AUD_SPK_R2_R 3 AUD_SPK_R1_R 4 MLX-CON4-15-GP-U 20.F0693.004 5

36 AUD_VREFOUT_B 1 R471 4K7R2J-2-GP 2 1 R470 4K7R2J-2-GP

MIC IN -1
1 AFTP76 1 2 6

A00
37 AUD_SPK_L2 37 AUD_SPK_L1 37 AUD_SPK_R2 37 AUD_SPK_R1 AUD_SPK_L2 AUD_SPK_L1 AUD_SPK_R2 AUD_SPK_R1 EC3 Do Not Stuff EC4 Do Not Stuff EC6 Do Not Stuff R30 R28 R31 R32 1 1 1 1 EC8 Do Not Stuff 2 Do Not Stuff 2 Do Not Stuff 2 Do Not Stuff 2 Do Not Stuff

MIC1 MIC_IN_L_C

36 AUD_EXT_MIC_L 6

AUD_EXT_MIC_L

C539 2

1 SC1U10V3KX-3GP

MIC_IN_L_2

R481 1 2 Do Not Stuff 1 R480 2 Do Not Stuff

DY
2

DY
2

DY
2

DY
2

36 AUD_EXT_MIC_R

AUD_EXT_MIC_R

C540 2

1 SC1U10V3KX-3GP

MIC_IN_R_2

MIC_IN_R_C

3 4 EC157 SC100P50V2JN-3GP 2 1 EC158 SC100P50V2JN-3GP

36 EXT_MIC_JD# 1

AFTP77 AFTP79 AFTP80 AFTP78


C

1 1 1 1

AUD_SPK_L2_R AUD_SPK_L1_R AUD_SPK_R2_R AUD_SPK_R1_R

5 7 8 9 10 PHONE-JK284-GP 22.10133.D01

1 AFTP81 1 AFTP82 1 AFTP83

MIC_IN_L_C MIC_IN_R_C EXT_MIC_JD#

Internal Microphone
B

LINE1 OUT
AFTP84 CN6 MICROPHONE-40-GP-U1 23.42143.001 36,37 AUD_HP1_JD# 37 AUD_HP1_JACK_L 37 AUD_HP1_JACK_R AUD_HP1_JACK_L AUD_HP1_JACK_R 60D4R2F-GP R475 2 2 BLM18BD601SN1D-GP L19 AUD_HP1_JACK_L2 AUD_HP1_JACK_R2 1 1 2 2 L20 BLM18BD601SN1D-GP 1 AUD_HP1_JACK_L1 AUD_HP1_JACK_R1 EC155 Do Not Stuff EC156 Do Not Stuff 1 6 3 4 5 7 8 9 10 AUD_HP1_JD# 1 1 2 1 1

LOUT1

36 INT_MIC_L_R 1

1 2

EC160 SC1KP50V2KX-1GP

R474 60D4R2F-GP

DY
2

DY
2

600ohm 100MHz 200mA 0.5ohm DC

PHONE-JK284-GP 22.10133.D01

1 AFTP85 1 AFTP86 1 AFTP87

AUD_HP1_JD# AUD_HP1_JACK_L1 AUD_HP1_JACK_R1

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

Audio Jack
Roberts Discrete
Sheet
1

Rev

hexainf@hotmail.com GRATIS - FOR FREE


5

-1
of 60

Date: Tuesday, May 19, 2009


4 3 2

47

SSID = PWR.Support
2 R98 15KR2J-1-GP 1 E

+5V_ALW

R93 10KR2J-3-GP 2 CH3904PT-GP Q7

DY
3 D9

1 Do Not Stuff +5V_ALW 2 1 R99 +3.3V_ALW 1


D

B 2
D

R91 D PS_ID D S 1 2 33R2J-2-GP

Q6 FDV301N-NL-GP

I/O Board Connector

R95 100KR2J-1-GP

PSID_DISABLE#_R

DY

PSID_DISABLE# 29

Do Not Stuff

D8 BAV99-4-GP 2

R90 2K2R2J-2-GP

PSID_EC 29

R92 1 CN4 51 NP1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 NP2 54 53 52 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 55 56 ACES-CONN50A-GP-U 20.F1318.050 AFTP170 AFTP173 AFTP174 AFTP171 AFTP176 AFTP175 AFTP177 AFTP178 AFTP179 AFTP181 AFTP180 AFTP182 AFTP183 AFTP185 AFTP184 AFTP186 AFTP187 1 AFTP167

DY

Do Not Stuff

The caps should be used only as last resort for EMI suppression.
+DC_IN 1 2 3 4 U46 S S S G AO4407A-GP D D D D 8 7 6 5 +DC_IN_SS

C373 SC1U25V5KX-1GP

C375 SCD01U50V2KX-1GP

C380 SCD01U50V2KX-1GP

AFTP169 Do Not Stuff

EC177

52 M_RED
C

DY
2

DY
2

C332 Do Not Stuff

AFTP168

C381 SCD01U50V2KX-1GP

C379 SC10U25V6KX-1GP

R337 240KR3-GP

52 M_GREEN 52 M_BLUE

+5V_RUN R2 DDC_DATA_CON DDC_CLK_CON USB_PP0 USB_PN0 USB_PP1 USB_PN1 MDI0+ 38 MDI0- 38 +2.5V_LOM VGA_HSYNC 52,54 VGA_VSYNC 52,54 DDC_DATA_CON 52 DDC_CLK_CON 52 29 AD_OFF 13 13 13 13 Q16 Q5 3 OUT 1 IN R1 B 2 GND Do Not Stuff R1 R1 E C

+5V_USB1

DY
R2

DY

+DC_IN_GATE 2 R336 47KR3J-L-GP 1

Do Not Stuff

38 38

MDI1+ MDI1-

+3.3V_RTC_LDO D2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +5V_USB1 USB_PP0 USB_PN0 USB_PP1 USB_PN1 MDI1+ MDI1MDI0+ MDI0M_RED M_BLUE VGA_VSYNC DDC_DATA_CON DDC_CLK_CON M_GREEN VGA_HSYNC +5V_RUN +2.5V_LOM 2

+5V_ALW

-1
at least 80 mil
SC4D7U6D3V3KX-GP 1 C4502 SC1U6D3V2KX-GP 1 2 3 4

USB Power
U9 GND OC1# IN OUT1 EN1/EN1#OUT2 EN2/EN2# OC2# G546B2P1UF-GP USB_OC#0 13 USB_OC#1 13 8 7 6 5 +5V_USB1

BAT_SCL

3 1 BAV99-4-GP

+5V_RUN 1
B

+2.5V_LOM 1

at least 80 mil
TC18 Do Not Stuff EC84 Do Not Stuff 1 1

C4501

D3 2 BAT_SDA 3 1 BAV99-4-GP D1

C342 SCD01U16V2KX-3GP

C33 SCD01U16V2KX-3GP

DY

DY

DY

29,31 USB_PWR_EN# BAT_IN# 3

1 BAV99-4-GP

Batt Connecter
BATT1 GND GND GND2 GND1 BAT_ALERT SYS_PRES# BATT_PRS# DAT_SMB CLK_SMB BATT2+ BATT1+ TYCO-CON9-1-GP 20.80959.009 11 10 9 8 7 6 5 4 3 2 1 AFTP188 AFTP189 AFTP191 AFTP190 AFTP192 1 PBAT_ALARM# PBAT_PRES1# PBAT_SMBDAT1 PBAT_SMBCLK1 1 R1 1

1 1 1 1

PBAT_PRES1# PBAT_SMBDAT1 PBAT_SMBCLK1 +PBATT

D18 2 PBAT_ALARM# 3

DY
1 Do Not Stuff

R294 2 1 +3.3V_RTC_LDO 470KR2J-2-GP

Reserved for EMI


Place near DCIN1
+DC_IN BAT_IN# 29 BAT_SDA 29,45 BAT_SCL 29,45 +PBATT 1 Main Source
A

AFTP193 2 100R2F-L1-GP-U RN1 4 3 1 2 SRN100J-3-GP

DY
2

EC175 Do Not Stuff Title Size Document Number Custom

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

C326 SCD1U25V3KX-GP

C325 SC2200P50V2KX-2GP

R2 1 2 Do Not Stuff

BATT_SENSE 45

-1
3 2

LEFT IO/BATT CONN


Roberts Discrete
Sheet
1

Rev

-1
of 60

Date: Tuesday, May 19, 2009


5 4

48

(Blanking)

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

USB Port
Roberts Discrete
Sheet
1

Rev

hexainf@hotmail.com GRATIS - FOR FREE


5

-1
of 60

Date: Tuesday, May 19, 2009


4 3 2

49

+PWR_SRC

+VGA_PWR_SRC

SSID = Video.PWR.Regulator
29 GFX_CORE_EN
D

+5V_ALW 1 U5112 1 2 3 1 R5417 Do Not Stuff B VCC A 5 4 GFX_CORE_ON_R

G3327 2

Do Not Stuff G3329 1 2 Do Not Stuff G3328 1 2 Do Not Stuff +VGA_PWR_SRC

DY

GND Do Not Stuff

74LVC1G07GW

+VCC_GFX_CORE +/- 5% Design Current: 9.408A Peak current 11.76A 12.936<OCP<16.464

+5V_ALW

DY
2

Please place near KBC U20.

8 7 6 5

SC2200P50V2KX-2GP

R3323 3D3R3J-L-GP 2 51117C_V5FILT C3317 SC1U6D3V2KX-GP 2 R3318 1 Do Not Stuff U3302 4 10 51117C_VFB 51117C_VBST 5 14 1 2 11 V5FILT V5DRV VFB VBST EN_PSV TON TRIP TPS51117PWR-GP R3316 7K32R2F-GP 2 DRVH DRVL LL VOUT PGOOD GND PGND 13 9 12 3 6 7 8 51117C_DRVH 51117C_DRVL 51117C_LL 51117C_LL1 C3319 1

D D D D

C3301 2 2 U3301 FDS8880-NL-GP

C3309 SCD1U25V3KX-GP 2

C3307 SC10U25V6KX-1GP 2

1 C3308 SC10U25V6KX-1GP +VCC_GFX_CORE

C3318 SC1U6D3V2KX-GP +5V_ALW A

SCD1U16V2KX-3GP

D3301 RB551V30-GP K

1 2 3 4

S S S G

+VCC_GFX_CORE L3301 1 1 2 TC3301 TC3302 ST330U2D5VDM-13GP


C

51117_VOUT_VGA RUNPWROK 1 2 R3317 Do Not Stuff 29,34,42,43,44 8 7 6 5

Do Not Stuff

f=400kHz,Ton resister =150k


1 1 C5383 Do Not Stuff

DY

+3.3V_ALW Q3303 FDS8672S-GP S S S G

SCD1U10V2KX-4GP

DYR3310Not Stuff Do
2

D D D D

DY
2

DY
2

C3314 Do Not Stuff 1 51117_VOUT_VGA

1 2 3 4

R3312 10KR2F-2-GP 2

51117C_VFB 1 1

A00 PWRCNTL_0 X X
B

R3313 Do Not Stuff

R3301 47K5R2F-GP 2 1

DY
2 2

R3305 37K4R2F-1-GP

15,25,29,34,35,42,43,44

1 1 1

DY

GFX_CORE_ON_R 51117C_LL_TON 51117C_TRIP

C3313

ST330U2D5VDM-13GP

GFX_CORE_EN

R3314 R3306 PM_SLP_S3# R3324

2 Do Not Stuff 2 Do Not Stuff 2 150KR2J-GP

IND-1D5UH-34-GP

G3309

A00
+3.3V_DELAY +3.3V_DELAY R5419 0R2J-2-GP 1 2 2 1 1 R5431 10KR2F-2-GP
B

PWRCNTL_1 H X X L

+VCC_GFX_CORE 1.10V 1.10V 1.10V 0.90V

X X

PWRCNTL_1#

PWRCNTL_0#

R3322 Do Not Stuff Q3302 2N7002-7F-GP R3326 10KR2F-2-GP 1 1

DY
2

D3304 1 2PWRCNTL_1_1 3 PWRCNTL_1 52 PWRCNTL_1_R 2 R3325 100KR2J-1-GP 1

DY
2 PWRCNTL_0 52

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 1.5UH PCMC104T-1R5MN Cyntec DCR:3.8 ~4.2mohm Isat =33Arms 68.1R510.10J O/P cap: 330U 2.5V PSLV0E337M(15) 15mOhm 2.886Arms NEC_TOKIN/ 77.C3371.10L H/S: FDS8880-NL SO-8/9.6mohm/12mOhm@4.5Vgs/ 84.08880.037 L/S: FDS8672S SO-8/ 5.3mOhm/7.0mohm@4.5Vgs/ 84.08672.A37 Switching freq-->350KHz
D Q3301 Do Not Stuff

C3316 SCD1U10V2KX-4GP +3.3V_DELAY 1

Do Not Stuff

R3327 Do Not Stuff G PWRCNTL_0_R 2 1 1

DY
PWRCNTL_0_1 2

R3321 Do Not Stuff

DY
S

DY

DY

R3320 Do Not Stuff

R5418 Do Not Stuff C3315 Do Not Stuff Main Source


A

DY
A

DY
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Document Number

VGA_CORE
Rev

Roberts Discrete
Sheet
1

-1
of 60

Date: Tuesday, May 19, 2009


5 4 3 2

50

U5110A

1 OF 7 PCIE_MTX_GRX_P[0..15] PCIE_MTX_GRX_N[0..15] PCIE_MTX_GRX_P[0..15] 12 PCIE_MTX_GRX_N[0..15] 12

SSID = VIDEO
PCIE_MTX_GRX_P0 PCIE_MTX_GRX_N0 PCIE_MTX_GRX_P1 PCIE_MTX_GRX_N1
D

AF30 AE31 AE29 AD28 AD30 AC31 AC29 AB28 AB30 AA31 AA29 Y28 Y30 W31 W29 V28 V30 U31 U29 T28 T30 R31 R29 P28 P30 N31 N29 M28 M30 L31 L29 K30

PCIE_RX0P PCIE_RX0N PCIE_RX1P PCIE_RX1N PCIE_RX2P PCIE_RX2N PCIE_RX3P PCIE_RX3N PCIE_RX4P PCIE_RX4N PCIE_RX5P PCIE_RX5N PCIE_RX6P PCIE_RX6N PCIE_RX7P PCIE_RX7N PCIE_RX8P PCIE_RX8N PCIE_RX9P PCIE_RX9N PCIE_RX10P PCIE_RX10N PCIE_RX11P PCIE_RX11N PCIE_RX12P PCIE_RX12N PCIE_RX13P PCIE_RX13N PCIE_RX14P PCIE_RX14N PCIE_RX15P PCIE_RX15N

PCIE_TX0P PCIE_TX0N PCIE_TX1P PCIE_TX1N PCIE_TX2P PCIE_TX2N PCIE_TX3P PCIE_TX3N PCIE_TX4P PCIE_TX4N PCIE_TX5P PCIE_TX5N PCIE_TX6P PCIE_TX6N PCIE_TX7P PCIE_TX7N PCIE_TX8P PCIE_TX8N PCIE_TX9P PCIE_TX9N PCIE_TX10P PCIE_TX10N PCIE_TX11P PCIE_TX11N PCIE_TX12P PCIE_TX12N PCIE_TX13P PCIE_TX13N PCIE_TX14P PCIE_TX14N PCIE_TX15P PCIE_TX15N

AH30 PCIE_MRX_GTX_R_P0 AG31 PCIE_MRX_GTX_R_N0 AG29 PCIE_MRX_GTX_R_P1 AF28 PCIE_MRX_GTX_R_N1 AF27 PCIE_MRX_GTX_R_P2 AF26 PCIE_MRX_GTX_R_N2 AD27 PCIE_MRX_GTX_R_P3 AD26 PCIE_MRX_GTX_R_N3 AC25 PCIE_MRX_GTX_R_P4 AB25 PCIE_MRX_GTX_R_N4 Y23 Y24 AB27 AB26 Y27 Y26 W24 W23 V27 U26 U24 U23 T26 T27 T24 T23 P27 P26 P24 P23 M27 N26 PCIE_MRX_GTX_R_P5 PCIE_MRX_GTX_R_N5 PCIE_MRX_GTX_R_P6 PCIE_MRX_GTX_R_N6 PCIE_MRX_GTX_R_P7 PCIE_MRX_GTX_R_N7 PCIE_MRX_GTX_R_P8 PCIE_MRX_GTX_R_N8 PCIE_MRX_GTX_R_P9 PCIE_MRX_GTX_R_N9 PCIE_MRX_GTX_R_P10 PCIE_MRX_GTX_R_N10 PCIE_MRX_GTX_R_P11 PCIE_MRX_GTX_R_N11 PCIE_MRX_GTX_R_P12 PCIE_MRX_GTX_R_N12 PCIE_MRX_GTX_R_P13 PCIE_MRX_GTX_R_N13 PCIE_MRX_GTX_R_P14 PCIE_MRX_GTX_R_N14 PCIE_MRX_GTX_R_P15 PCIE_MRX_GTX_R_N15

C5115 1

2 SCD1U16V2KX-3GP 1 C5117 2 SCD1U16V2KX-3GP 1 C5118 2 SCD1U16V2KX-3GP 1 C5119 2 SCD1U16V2KX-3GP 1 C5129 2 SCD1U16V2KX-3GP 1 C5131 2 SCD1U16V2KX-3GP 1 C5138 2 SCD1U16V2KX-3GP 1 C5143 2 SCD1U16V2KX-3GP 1 C5149 2 SCD1U16V2KX-3GP 1 C5151 2 SCD1U16V2KX-3GP 1 C5121 2 SCD1U16V2KX-3GP 1 C5123 2 SCD1U16V2KX-3GP 1 C5125 2 SCD1U16V2KX-3GP 1 C5128 2 SCD1U16V2KX-3GP 1 C5133 2 SCD1U16V2KX-3GP 1 C5141 2 SCD1U16V2KX-3GP 1 C5147

PCIE_MRX_GTX_P0 PCIE_MRX_GTX_N0 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P1 PCIE_MRX_GTX_N1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P2 PCIE_MRX_GTX_N2 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P3 PCIE_MRX_GTX_N3 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P4 PCIE_MRX_GTX_N4 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P5 PCIE_MRX_GTX_N5 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P6 PCIE_MRX_GTX_N6 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P7 PCIE_MRX_GTX_N7 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P8 PCIE_MRX_GTX_N8 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P9 PCIE_MRX_GTX_N9 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P10 PCIE_MRX_GTX_N10 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P11 PCIE_MRX_GTX_N11 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P12 PCIE_MRX_GTX_N12 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P13 PCIE_MRX_GTX_N13 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P14 PCIE_MRX_GTX_N14 2 SCD1U16V2KX-3GP LVTMDP PCIE_MRX_GTX_P15 PCIE_MRX_GTX_N15 2 SCD1U16V2KX-3GP U5110F

PCIE_MRX_GTX_P[0..15] PCIE_MRX_GTX_N[0..15]

PCIE_MRX_GTX_P[0..15] 12 PCIE_MRX_GTX_N[0..15] 12

C5114 1

PCIE_MTX_GRX_P2 PCIE_MTX_GRX_N2 PCIE_MTX_GRX_P3 PCIE_MTX_GRX_N3 PCIE_MTX_GRX_P4 PCIE_MTX_GRX_N4 PCIE_MTX_GRX_P5 PCIE_MTX_GRX_N5 PCIE_MTX_GRX_P6 PCIE_MTX_GRX_N6 PCIE_MTX_GRX_P7 PCIE_MTX_GRX_N7 PCIE_MTX_GRX_P8 PCIE_MTX_GRX_N8
C

C5116 1

C5127 1

C5130 1

PCI EXPRESS INTERFACE PCI EXPRESS INTERFACE

C5135 1

C5142 1

C5148 1

C5150 1

6 OF 7
C

PCIE_MTX_GRX_P9 PCIE_MTX_GRX_N9 PCIE_MTX_GRX_P10 PCIE_MTX_GRX_N10 PCIE_MTX_GRX_P11 PCIE_MTX_GRX_N11 PCIE_MTX_GRX_P12 PCIE_MTX_GRX_N12 PCIE_MTX_GRX_P13 PCIE_MTX_GRX_N13 PCIE_MTX_GRX_P14 PCIE_MTX_GRX_N14 PCIE_MTX_GRX_P15 PCIE_MTX_GRX_N15

C5120 1

LVDS CONTROL

VARY_BL DIGON

AB11 AB12

LBKLT_CTL 20 LCDVDD_EN 20

C5122 1

1 VGA_TXBCLK+ VGA_TXBCLKVGA_TXBOUT0+ VGA_TXBOUT0VGA_TXBOUT1+ VGA_TXBOUT1VGA_TXBOUT2+ VGA_TXBOUT2VGA_TXBCLK+ 20 R5120 VGA_TXBCLK- 20 VGA_TXBOUT0+ 20 VGA_TXBOUT0- 20 VGA_TXBOUT1+ 20 VGA_TXBOUT1- 20 VGA_TXBOUT2+ 20 VGA_TXBOUT2- 20

1 R5117 10KR2J-3-GP 2

C5126 1

TXOUT_U0P_DPF2P AL21 TXOUT_U0N_DPF2N AK20 TXOUT_U1P_DPF1P AH22 TXOUT_U1N_DPF1N AJ21 TXOUT_U2P_DPF0P AL23 TXOUT_U2N_DPF0N AK22 TXOUT_U3P TXOUT_U3N AK24 AJ23

C5132 1

C5140 1

C5145 1

TXCLK_LP_DPE3P AL15 TXCLK_LN_DPE3N AK14 TXOUT_L0P_DPE2P AH16 TXOUT_L0N_DPE2N AJ15 TXOUT_L1P_DPE1P AL17 TXOUT_L1N_DPE1N AK16

VGA_TXACLK+ VGA_TXACLKVGA_TXAOUT0+ VGA_TXAOUT0VGA_TXAOUT1+ VGA_TXAOUT1VGA_TXAOUT2+ VGA_TXAOUT2-

VGA_TXACLK+ 20 VGA_TXACLK- 20 VGA_TXAOUT0+ 20 VGA_TXAOUT0- 20 VGA_TXAOUT1+ 20 VGA_TXAOUT1- 20 VGA_TXAOUT2+ 20 VGA_TXAOUT2- 20


B

CLOCK 19 CLK_PCIE_VGA 19 CLK_PCIE_VGA# CLK_PCIE_VGA CLK_PCIE_VGA# AK30 AK32 PCIE_REFCLKP PCIE_REFCLKN CALIBRATION L9 N9 N10 PLTRST_DELAY# AL27 NC#L9 NC#N9 NC_PWRGOOD PERSTB
M92-S2-GP M92-S2-GP

PCIE_CALRP PCIE_CALRN

Y22 AA22

PCIE_CALRP PCIE_CALRN

R5118 1 R5119 1

2 1K27R2F-L-GP 2 2KR2F-3-GP +1.1V_RUN

TXOUT_L2P_DPE0P AH18 TXOUT_L2N_DPE0N AJ17 TXOUT_L3P TXOUT_L3N AL19 AK18

15,29 PLTRST_DELAY#

10KR2J-3-GP 2

C5124 1

TXCLK_UP_DPF3P AH20 TXCLK_UN_DPF3N AJ19

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

VGA-PCIE/LVDS(1/4)
Size Document Number Custom Rev

hexainf@hotmail.com GRATIS - FOR FREE


5

Roberts Discrete
Sheet
1

-1
of 60

Date: Tuesday, May 19, 2009


4 3 2

51

SSID = VIDEO
L5126 +1.8V_RUN 1 2 SC10U6D3V5KX-1GP C5287 2 1 SC10U6D3V5KX-1GP C5293 SCD1U16V2KX-3GP C5306 2 1 SCD01U16V2KX-3GP C5307 2 1 +DPLL_PVDD

U5110B

2 OF 7

TXCAP_DPA3P TXCAM_DPA3N MUTI GFX DPA TX0P_DPA2P TX0M_DPA2N TX1P_DPA1P TX1M_DPA1N AA1 Y4 AC7 Y2 U5 U1 Y7 V2 Y8 V4 AB7 W1 AB8 W3 AB9 W5 AC6 W6 AD7 AA3 AC8 AA5 AE8 AA6 AE9 AB4 AD9 AB2 AC10 AC5 DVPCNTL_MVP_0 DVPCNTL_MVP_1 DVPCNTL_0 DVPCNTL_1 DVPCNTL_2 DVPCLK DVPDATA_0 DVPDATA_1 DVPDATA_2 DVPDATA_3 DVPDATA_4 DVPDATA_5 DVPDATA_6 DVPDATA_7 DVPDATA_8 DVPDATA_9 DVPDATA_10 DVPDATA_11 DVPDATA_12 DVPDATA_13 DVPDATA_14 DVPDATA_15 DVPDATA_16 DVPDATA_17 DVPDATA_18 DVPDATA_19 DVPDATA_20 DVPDATA_21 DVPDATA_22 DVPDATA_23 TX2P_DPA0P TX2M_DPA0N TXCBP_DPB3P TXCBM_DPB3N TX3P_DPB2P TX3M_DPB2N TX4P_DPB1P TX4M_DPB1N TX5P_DPB0P TX5M_DPB0N

AF2 AF4 AG3 AG5 AH3 AH1 AK3 AK1 AK5 AM3 AK6 AM5 AJ7 AH6 AK8 AL7 +DAC1_AVDD +1.8V_RUN L5120 1 2 BLM15BD121SN1D-GP
D

BLM15BD121SN1D-GP

DPB

L5122 +1.1V_RUN 1 2 SC10U6D3V5KX-1GP C5295 2 1 SC1U10V3KX-3GP C5312 2 1 SCD1U16V2KX-3GP C5296 2 1

+DPLL_VDDC

BLM15BD121SN1D-GP

SCD01U16V2KX-3GP C5297 2 1

C5311 SCD01U16V2KX-3GP

C5289 SCD1U16V2KX-3GP

C5288 SC1U6D3V2KX-GP

C5310 SCD01U16V2KX-3GP

C5309 SCD1U16V2KX-3GP

R144 Do Not Stuff

DY
1

DYR140 Stuff Do Not


I2C 1 Do Not Stuff R5215 1 R5216 1

20 LDDC_CLK 20 LDDC_DATA
C

DY DY

2 2 Do Not Stuff

R1 R3

SCL SDA GENERAL PURPOSE I/O R RB G GB B BB HSYNC VSYNC RSET AM26 AK26 AL25 AJ25 AH24 AG25 AH26 AJ27 AD22 AG24 AE22 AE23 AD23 AM12 AK12 AL11 AJ11 VGA_RSET 1 R5220 +DAC1_AVDD +DAC1_VDD1DI 1 2 499R2F-2-GP +DAC2_VDD2DI +1.8V_RUN M_RED R5381 M_GREEN R5382 M_BLUE R5383 1 2 150R2F-1-GP 1 2 150R2F-1-GP 1 2 150R2F-1-GP M_RED 48 M_GREEN 48 M_BLUE 48 VGA_HSYNC 48,54 VGA_VSYNC 48,54
C

+3.3V_DELAY

2 10KR2J-3-GP

1 R5203

VGA_CLK_REQ#

54 GPIO_VGA_00 54 GPIO_VGA_01 54 GPIO_VGA_02

TP5141

54 GPIO_VGA_05 1 PANEL_BKEN 1 R5213 29 PANEL_BKEN 54 GPIO_VGA_08 54 GPIO_VGA_09 54 GPIO_VGA_11 54 GPIO_VGA_12 54 GPIO_VGA_13 50 PWRCNTL_0 19 CLK_VGA_27M_SS TP5134 1 TP5133

2 Do Not Stuff

THERMTRIP_VGA 50 PWRCNTL_1 29 THERMTRIP_VGA# R5121 1 2 10KR2J-3-GP 54 GPIO_VGA_22 VGA_CLK_REQ# Do Not Stuff 1 R5218 2 GPIO_VGA_29 GPIO_VGA_30 Do Not Stuff 1 R5219 2

DY
2

DY
2

DY
2

R2 R2B G2 G2B B2 B2B C Y COMP DAC2 H2SYNC V2SYNC

VGA_THERM#

U6 U10 T10 U8 U7 T9 T8 T7 P10 P4 P2 N6 N5 N3 Y9 N1 M4 R6 W10 M2 P8 P7 N8 N7 T11 R11 L6 L5 L3 L1 K4 AF24 AB13 W8 W9 W7 AD10 AC14

GPIO_0 GPIO_1 GPIO_2 GPIO_3_SMBDATA GPIO_4_SMBCLK GPIO_5_AC_BATT GPIO_6 GPIO_7_BLON GPIO_8_ROMSO GPIO_9_ROMSI GPIO_10_ROMSCK GPIO_11 GPIO_12 GPIO_13 GPIO_14_HPD2 GPIO_15_PWRCNTL_0 GPIO_16_SSIN GPIO_17_THERMAL_INT GPIO_18_HPD3 GPIO_19_CTF GPIO_20_PWRCNTL_1 GPIO_21_BB_EN GPIO_22_ROMCSB GPIO_23_CLKREQB GPIO_29_DRM_0 GPIO_30_DRM_1 JTAG_TRSTB JTAG_TDI JTAG_TCK JTAG_TMS JTAG_TDO TESTEN GENERICA GENERICB GENERICC GENERICD GENERICE_HPD4 HPD1

DAC1

(Placed between this pin and AVSSQ)

70mA

AVDD AVSSQ VSS1DI

+3.3V_DELAY

C5308 SC1U6D3V2KX-GP

54 54 54 54

DVPDATA20 DVPDATA21 DVPDATA22 DVPDATA23

+DAC1_VDD1DI

C5305 SC4D7U6D3V5KX-3GP

+1.8V_RUN L5125 1 2 BLM15BD121SN1D-GP

40mA
C5315 Do Not Stuff C5314 Do Not Stuff C5313 Do Not Stuff

45mA VDD1DI

1 R5210 2 Do Not Stuff

+3.3V_DELAY

Need confirm rating.


AK10 AL9 AH12 AM10 AJ9 AL13 AJ13 AD19 AC19 AE20 AE17 AE19 2 2K2R2J-2-GP R124 1 2 AG13 VGA_R2SET 1 R5162 1 R5212 1 R5214 2 715R2F-GP 2 Do Not Stuff 2 Do Not Stuff 2 +DAC2_A2VDD

R5202 1KR2J-1-GP 1

Q5105 2N7002-7F-GP G S

-1
R5196 1KR2J-1-GP 2 1

C5301 Do Not Stuff

C5299 Do Not Stuff

C5298 Do Not Stuff

DY
2 DAC2_HSYNC 54 DAC2_VSYNC 54 +DAC2_VDD2DI

DY
2

DY
2

DY
2

TP5146 TP5151

1 1

GENERICB

C5300 Do Not Stuff

TP5143 TP5142 TP5144 JTAG_TESTEN TP5145

JTAG_TRSTB 1 1 1 1

65mA

1 R5211 2 Do Not Stuff

+1.8V_RUN 1

1 TP5150 1 TP5138

40mA VDD2DI
VSS2DI

R5167 499R2F-2-GP 2
VREFG VOLTAGE DIVIDER IS (VREFG = VDDR4,5(1.8V) / 3 = .6V)

+DAC2_A2VDDQ

+1.8V_RUN

65mA
VGA_VREFG AC16

A2VDD A2VDDQ A2VSSQ

+DAC2_A2VDD C5303 SCD1U16V2KX-3GP +DAC2_A2VDDQ 1 1 +3.3V_DELAY

1mA
C5302 SC1U6D3V2KX-GP

1mA
VREFG

L5127 1 2 BLM15BD121SN1D-GP

R5186 249R2F-GP 2

C5291 SCD1U16V2KX-3GP

R2SET

-1
AE6 AE5 AD2 AD4 AC11 AC13 AD13 AD11 AB22 AC22

R123 2K2R2J-2-GP 1

+DPLL_PVDD PLL/CLOCK +DPLL_VDDC AF14 AE14 AD14 R5396 19 CLK_VGA_27M_NSS 1 2 1 XTALIN_R 1 TP5139 R5395 150R2F-1-GP 2 AM28 AK28 124R2F-U-GP XTALIN XTALOUT DPLL_PVDD DPLL_PVSS DPLL_VDDC

DDC/AUX

120mA

DDC1CLK DDC1DATA AUX1P AUX1N

LDDC_CLK 20 LDDC_DATA 20

300mA

DDC2CLK DDC2DATA AUX2P AUX2N NC#AB22 NC#AC22

M92CRT_DDCCLK M92CRT_DDCDATA

R5204 1 1 R5166

DY DY

2 2

Do Not Stuff DDC_CLK_CON DDC_DATA_CON Do Not Stuff

35 VGA_THERMDA 35 VGA_THERMDC
A

T4 T2 FAN_PWM +TSVDD SCD1U16V2KX-3GP R5 AD17 AC17

Ask ATI do we still need 2N7002?


AE16 AD16 AC1 AC3 AD20 AC20 M92CRT_DDCDATA 4 5 48 DDC_CLK_CON DDC_CLK_CON 6 2N7002SPT +3.3V_DELAY RN2 3 4

+3.3V_DELAY

DPLUS DMINUS TS_FDO TSVDD TSVSS

THERMAL DDCAUX5P DDCAUX5N 2 1 SRN2K2J-1-GP Main Source U4 3 2 1 M92CRT_DDCCLK Title DDC_DATA_CON DDC_DATA_CON 48
A

L5121 +1.8V_RUN 1 2

TP5140 SC1U10V3KX-3GP C5304 2 1

20mA

BLM15BD121SN1D-GP

DDC6CLK DDC6DATA NC_DDCAUX7P NC_DDCAUX7N

C5290 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

M92-S2-GP

5V @ CRT side

VGA-TV/CRT/DP PORT
Size C Document Number Rev

Roberts Discrete
Sheet
1

-1
of 60

Date: Tuesday, May 19, 2009


5 4 3 2

52

SSID = VIDEO
AA27 AB24 AB32 AC24 AC26 AC27 AD25 AD32 AE27 AF32 AG27 AH32 K28 K32 L27 M32 N25 N27 P25 P32 R27 T25 T32 U25 U27 V32 W25 W26 W27 Y25 Y32

U5110E

5 OF 7 +1.8V_RUN +1.8V_RUN

C5200 SCD01U16V2KX-3GP

C5201 SCD01U16V2KX-3GP

C5203 SCD01U16V2KX-3GP

C5216 SCD01U16V2KX-3GP

C5217 SCD01U16V2KX-3GP

C5252 SC1U6D3V2KX-GP

C5251 SC1U6D3V2KX-GP

C5248 SC1U6D3V2KX-GP

C5247 SC1U6D3V2KX-GP

C5244 SC1U6D3V2KX-GP

C5243 SC1U6D3V2KX-GP

C5249 SC1U6D3V2KX-GP

C5250 SC1U6D3V2KX-GP

+1.8V_RUN

C5226 SC1U6D3V2KX-GP

C5227 SC1U6D3V2KX-GP

C5228 SCD1U16V2KX-3GP

VSS_MECH VSS_MECH VSS_MECH

C5229 SCD1U16V2KX-3GP

C5230 SC1U6D3V2KX-GP

C5231 SC1U6D3V2KX-GP

M6 N11 N12 N13 N16 N18 N21 P6 P9 R12 R15 R17 R20 T13 T16 T18 T21 T6 U15 U17 U20 U3 U9 V13 V16 V18 V6 Y10 Y15 Y17 Y20 Y6

L5109 C5218 SC1U6D3V2KX-GP C5219 SC1U6D3V2KX-GP C5207 SCD1U16V2KX-3GP C5221 SC10U6D3V5KX-1GP C5208 SCD1U16V2KX-3GP

C5331 SC1U6D3V2KX-GP

C5330 SCD1U16V2KX-3GP

C5326 SCD1U16V2KX-3GP

C5327 SCD1U16V2KX-3GP

C5332 SC1U6D3V2KX-GP

VSSRHA
PLL

M92-S2-GP

+PCIE_PVDD

+1.8V_RUN

L5108

+PCIE_PVDD

L8 H7

NC_MPV18 NC_SPV18 SPV10 35mA SPVSS

1 2 BLM15BD121SN1D-GP
SC1U6D3V2KX-GP C5232 2 1 SC10U6D3V5KX-1GP C5198 SCD1U16V2KX-3GP C5205

300mA

SCD01U16V2KX-3GP C5206 2 1

+SPV10

H8 J7

+VCC_GFX_CORE

C5338 SC10U6D3V5KX-1GP

C5339 SC10U6D3V5KX-1GP

C5334 SC10U6D3V5KX-1GP

BACK BIAS

M11 M12

BBP#1 144mA BBP#2

M92-S2-GP

+1.8V_RUN SC4D7U6D3V5KX-3GP SC4D7U6D3V5KX-3GP SC4D7U6D3V5KX-3GP C5366 C5359 C5377


B

C5348 Do Not Stuff

C5333 SC10U6D3V5KX-1GP

+VCC_GFX_CORE

AM30

PCIE_PVDD 68mA

VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI

M13 M15 M16 M17 M18 M20 M21 N20

C5329 SC10U6D3V5KX-1GP

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

1 2 BLM15BD121SN1D-GP 1

+VDD_CT

300mA

LEVEL TRANSLATION

136mA

GND

AA20 AA21 AB20 AB21

VDD_CT VDD_CT VDD_CT VDD_CT


I/O

CORE

60mA

+3.3V_DELAY

C5255 SC1U6D3V2KX-GP

C5254 SC1U6D3V2KX-GP

C5253 SC1U6D3V2KX-GP

C5340 SC1U6D3V2KX-GP

C5341 SC1U6D3V2KX-GP

C5323 SC1U6D3V2KX-GP

C5321 SC1U6D3V2KX-GP

C5322 SC1U6D3V2KX-GP

C5325 SC1U6D3V2KX-GP

C5324 SC1U6D3V2KX-GP

C5316 SC1U6D3V2KX-GP

C5317 SC1U6D3V2KX-GP

C5319 SC1U6D3V2KX-GP

C5318 SCD1U16V2KX-3GP 2 1

C5222 SC1U6D3V2KX-GP

C5223 SC1U6D3V2KX-GP

C5224 SCD1U16V2KX-3GP

C5225 SCD1U16V2KX-3GP

170mA

U11 U12 V11 V12 AA11 AA12 Y11 Y12

VDDR5 VDDR5 VDDR5 VDDR5 VDDR4 VDDR4 VDDR4 VDDR4


MEM CLK

C5320 SC1U6D3V2KX-GP

AA17 AA18 AB17 AB18

VDDR3 VDDR3 VDDR3 VDDR3

170mA

+1.8V_RUN

A32 AM1 AM32

+1.8V_RUN L5115 1 2 BLM15BD121SN1D-GP +VDDRHA

VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC

AA15 N15 N17 R13 R16 R18 R21 T12 T15 T17 T20 U13 U16 U18 U21 V15 V17 V20 V21 Y13 Y16 Y18 Y21

C5246 SC10U6D3V5KX-1GP

PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

A3 A30 AA13 AA16 AB10 AB15 AB6 AC9 AD6 AD8 AE7 AG12 AH10 AH28 B10 B12 B14 B16 B18 B20 B22 B24 B26 B6 B8 C1 C32 E28 F10 F12 F14 F16 F18 F2 F20 F22 F24 F26 F6 F8 G10 G27 G31 G8 H14 H17 H2 H20 H6 J27 J31 K11 K2 K22 K6

C5209 SC1U6D3V2KX-GP

C5210 SC1U6D3V2KX-GP

C5211 SC1U6D3V2KX-GP

C5212 SC1U6D3V2KX-GP

C5213 SC1U6D3V2KX-GP

C5214 SC1U6D3V2KX-GP

SC10U6D3V5KX-1GP C5179

SC10U6D3V5KX-1GP C5180

SC10U6D3V5KX-1GP C5182

SC10U6D3V5KX-1GP C5185

C5215 SC1U6D3V2KX-GP

+1.8V_RUN

C5237 SC1U6D3V2KX-GP

C5240 SC1U6D3V2KX-GP

C5241 SC1U6D3V2KX-GP

C5238 SCD1U16V2KX-3GP

C5242 SC1U6D3V2KX-GP

C5239 SCD01U16V2KX-3GP

C5166 SCD1U16V2KX-3GP

C5167 SCD1U16V2KX-3GP

C5170 SCD1U16V2KX-3GP

C5171 SCD1U16V2KX-3GP

C5172 SCD1U16V2KX-3GP

C5176 SCD1U16V2KX-3GP

C5177 SCD1U16V2KX-3GP

U5110D MEM I/O PCIE

4 OF 7

C5204 SC10U6D3V5KX-1GP

H13 H16 H19 J10 J23 J24 J9 K10 K23 K24 K9 L11 L12 L13 L20 L21 L22

VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 2.2A VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1

PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR

AB23 AC23 AD24 AE24 AE25 AE26 AF25 AG26 L23 L24 L25 L26 M22 N22 N23 N24 R22 T22 U22 V22

500mA

+1.1V_RUN

PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC 2A PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC

+VCC_GFX_CORE

POWER

+VCC_GFX_CORE

L17 L16

VDDRHA 1 1 1 1 1 1
ISOLATED CORE I/O

300mA

SC1U6D3V2KX-GP C5376 2 1

C5349 Do Not Stuff

300mA

DP E/F POWER

DP A/B POWER

DY
AE11 AF11 2
+DPA_VDD18

DY
2

DY
2

1 2 BLM15BD121SN1D-GP

U5110G

7 of 7

C5347 Do Not Stuff

L5119

SCD1U16V2KX-3GP SCD1U16V2KX-3GP C5361 C5378

R5387

+1.8V_RUN

DY

2
+VCC_GFX_CORE L5116 +SPV10

Do Not Stuff

SC1U6D3V2KX-GP C5233 2 1

SC1U6D3V2KX-GP C5235 2 1

SCD1U16V2KX-3GP C5234

SC1U6D3V2KX-GP C5360 2 1

C5352 Do Not Stuff

170mA

200mA

1A

DY
AE1 AE3 AG1 AG6 AH5 2

DY
2

DY
2

L5117

C5354 Do Not Stuff

SC1U6D3V2KX-GP C5365 2 1

SCD1U16V2KX-3GP C5367

C5355 Do Not Stuff

C5353 Do Not Stuff

300mA

DY
200mA
2
+DPF_VDD18

DY
2

DY
2

1 2 BLM15BD121SN1D-GP

AG14 AH14 AM14 AM16 AM18

DPE_VSSR DPE_VSSR DPE_VSSR DPE_VSSR DPE_VSSR

DPA_VSSR DPA_VSSR DPA_VSSR DPA_VSSR DPA_VSSR

L5107 2 1 BLM18PG300SN-GP

DPE_VDD10 DPE_VDD10

DPA_VDD10 DPA_VDD10

R5389

+1.8V_RUN

DY

Do Not Stuff

AF16 AG17

DPF_VDD18 DPF_VDD18

NC_DPB_VDD18 NC_DPB_VDD18

AE13 AF13

+1.1V_RUN L5106 2 1 BLM18PG300SN-GP

+DPB_VDD18

+1.1V_RUN

SC1U6D3V2KX-GP C5373 2 1

SCD1U16V2KX-3GP C5375

170mA

C5358 Do Not Stuff

SC4D7U6D3V5KX-3GP SC4D7U6D3V5KX-3GP C5363 C5374

C5356 Do Not Stuff

1A

DY
AF10 AG9 AH8 AM6 AM8 2

DY
2

DY
2

AF23 AG23 AM20 AM22 AM24

DPF_VSSR DPF_VSSR DPF_VSSR DPF_VSSR DPF_VSSR

DPB_VSSR DPB_VSSR DPB_VSSR DPB_VSSR DPB_VSSR

+1.8V_RUN
A

C5357 Do Not Stuff

DPF_VDD10 DPF_VDD10

200mA

+DPF_VDD10

AF22 AG22

DPB_VDD10 DPB_VDD10

AF8 AF9

C5199 Do Not Stuff

L5113

+1.8V_RUN
A

SC1U6D3V2KX-GP C5362 2 1

SCD1U16V2KX-3GP SCD1U16V2KX-3GP C5372 C5364

C5343 Do Not Stuff

C5342 Do Not Stuff

M92LP Version Part R5401 Q5106 R5402 R5403 Q5107 C5384 A11 No stuff Stuff Stuff No stuff Stuff No stuff A12 Stuff No stuff No stuff No stuff No stuff No stuff

300mA

150R2F-1-GP

150R2F-1-GP

20mA
2
+DPE_PVDD

20mA
DP PLL POWER

DY
2

DY
2

DY
2

AG18 AF19

DPE_PVDD DPE_PVSS

DPA_PVDD DPA_PVSS

AG8 AG7

+DPA_PVDD

1 2 BLM15BD121SN1D-GP

2 R5386

1 AF17

DPEF_CALR

DPAB_CALR

AE10 1 R5385

1 R5391 2 Do Not Stuff

Main Source +1.8V_RUN

+1.8V_RUN

+DPE_VDD10

AG20 AG21

AF6 AF7

C5350 Do Not Stuff

+1.1V_RUN

+1.1V_RUN

SCD01U16V2KX-3GP C5236 2 1

DPE_VDD18 DPE_VDD18

200mA

+DPE_VDD18

AG15 AG16

NC_DPA_VDD18 NC_DPA_VDD18

1 2 BLM15BD121SN1D-GP

300mA
C5351 Do Not Stuff

L5118

20mA
C5346 Do Not Stuff C5344 Do Not Stuff

SC1U6D3V2KX-GP C5368 2 1

SC4D7U6D3V5KX-3GP C5371

300mA

DY
2

DY
2

DY
2

C5345 Do Not Stuff

1 2 BLM15BD121SN1D-GP

+DPF_PVDD

AG19 AF20

NC_DPF_PVDD NC_DPF_PVSS

DPB_PVDD DPB_PVSS

AG10 AG11

+DPB_PVDD

1 R5392 2 Do Not Stuff


Title

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

hexainf@hotmail.com GRATIS - FOR FREE


5

M92-S2-GP

VGA-POWER/GND(3/4)
Size A2 Date: Document Number

Roberts Discrete
Sheet
1

Rev

-1

Tuesday, May 19, 2009

53

of

60

SSID = VIDEO

U5110C 55 MDA[0..63] MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63 MVREFD MVREFS

3 OF 7 MAA[0..11] 55 52 GPIO_VGA_00

+3.3V_DELAY

ATI RESERVED CONFIGURATION STRAPS


R5161 1 R5140 1 R5139 1 R5142 1 R5141

( 0.5 * VDDR1 ) ( for SSTL-1.8/SSTL-2/DDR2 ) ( 0.7 * VDDR1 ) ( for GDDR3/GDDR4 )

DIVIDER RESISTORS MVREF TO 1.8V MVREF TO GND

DDR2 100R 100R

DDR3 40.2R 100R

+1.8V_RUN

R5164 40D2R2F-GP

C5380 SCD01U16V2KX-3GP

C5285 SCD1U16V2KX-3GP

+1.8V_RUN

R5165 100R2F-L1-GP-U

K27 J29 H30 H32 G29 F28 F32 F30 C30 F27 A28 C28 E27 G26 D26 F25 A25 C25 E25 D24 E23 F23 D22 F21 E21 D20 F19 A19 D18 F17 A17 C17 E17 D16 F15 A15 D14 F13 A13 C13 E11 A11 C11 F11 A9 C9 F9 D8 E7 A7 C7 F7 A5 E5 C3 E1 G7 G6 G1 G3 J6 J1 J3 J5 K26 J26 J25 K7 J8 K25 L10 K8 L7
R5170

DQA_0 DQA_1 DQA_2 DQA_3 DQA_4 DQA_5 DQA_6 DQA_7 DQA_8 DQA_9 DQA_10 DQA_11 DQA_12 DQA_13 DQA_14 DQA_15 DQA_16 DQA_17 DQA_18 DQA_19 DQA_20 DQA_21 DQA_22 DQA_23 DQA_24 DQA_25 DQA_26 DQA_27 DQA_28 DQA_29 DQA_30 DQA_31 DQA_32 DQA_33 DQA_34 DQA_35 DQA_36 DQA_37 DQA_38 DQA_39 DQA_40 DQA_41 DQA_42 DQA_43 DQA_44 DQA_45 DQA_46 DQA_47 DQA_48 DQA_49 DQA_50 DQA_51 DQA_52 DQA_53 DQA_54 DQA_55 DQA_56 DQA_57 DQA_58 DQA_59 DQA_60 DQA_61 DQA_62 DQA_63 MVREFDA MVREFSA

MEMORY INTERFACE

MAA_0 MAA_1 MAA_2 MAA_3 MAA_4 MAA_5 MAA_6 MAA_7 MAA_8 MAA_9 MAA_10 MAA_11 MAA_12 MAA_13/BA2 MAA_14/BA0 MAA_15/BA1 DQMA_0 DQMA_1 DQMA_2 DQMA_3 DQMA_4 DQMA_5 DQMA_6 DQMA_7 RDQSA_0 RDQSA_1 RDQSA_2 RDQSA_3 RDQSA_4 RDQSA_5 RDQSA_6 RDQSA_7 WDQSA_0 WDQSA_1 WDQSA_2 WDQSA_3 WDQSA_4 WDQSA_5 WDQSA_6 WDQSA_7 ODTA0 ODTA1 CLKA0 CLKA0B CLKA1 CLKA1B RASA0B RASA1B CASA0B CASA1B CSA0B_0 CSA0B_1 CSA1B_0 CSA1B_1 CKEA0 CKEA1 WEA0B WEA1B RSVD#1 RSVD#2 RSVD#3

K17 J20 H23 G23 G24 H24 J19 K19 J14 K14 J11 J13 H11 G11 J16 L15 E32 E30 A21 C21 E13 D12 E3 F4 H28 C27 A23 E19 E15 D10 D6 G5 H27 A27 C23 C19 C15 E9 C5 H4 L18 K16 H26 H25 G9 H9 G22 G17 G19 G16 H22 J22 G13 K13 K20 J17 G25 H10 AB16 G14 G20

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12_R BA2 BA0 BA1 DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7 RDQSA0 RDQSA1 RDQSA2 RDQSA3 RDQSA4 RDQSA5 RDQSA6 RDQSA7 WDQSA0 WDQSA1 WDQSA2 WDQSA3 WDQSA4 WDQSA5 WDQSA6 WDQSA7

DY DY DY DY DY DY

2 Do Not Stuff 2 Do Not Stuff

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESE

52 GPIO_VGA_01

GPIO3 , H2SYNC , V2SYNC


2 Do Not Stuff 2 Do Not Stuff 2 Do Not Stuff 2 Do Not Stuff 2 10KR2J-3-GP

Stuff when single rank type. 1CS:4Mx32x8x1

52 GPIO_VGA_02

PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

52 GPIO_VGA_05

BA2 BA0 BA1

55 55 55

1 R5201 2 Do Not Stuff

If BIOS_ROM_EN (GPIO22) = 0

If BIOS_ROM_EN (GPIO22) = 1
Part Number M25P05A M25P10A M25P20 M25P40 M25P80 Pm25LV512A Pm25LV010A GPIO[13,12,11]
D

MAA12

55

52 GPIO_VGA_08

1 1 1 1 1 1 1 1

52 GPIO_VGA_09

R5146

Size of the primary GPIO[13,12,11] Manufacturer memory apertures 128MB 256MB 64MB 32MB 512MB 1GB 2GB 4GB x000 x001 x010 x x x x x ST Microelectronics

52 GPIO_VGA_11

R5147

52 GPIO_VGA_12

R5148

DY DY DY DY DY

2 Do Not Stuff 2 Do Not Stuff 2 Do Not Stuff 2 Do Not Stuff 2 Do Not Stuff

0100 0101 0101 0101 0101 0100 0101

52 GPIO_VGA_13 DQMA#[0..7] 55 52 GPIO_VGA_22

R5149

Chingis (formerly PMC)

R5150

52 DAC2_VSYNC

R5155

52 DAC2_HSYNC RDQSA[0..7] 55

R5156

STRAPS TX_PWRS_ENB (Internal PD) TX_DEEMPH_EN

PIN GPIO0

DESCRIPTION
Tansmitter Power Savings Enable V 0= 50% Tx output swing 1= Full Tx output swing Transmitter De-emphasis Enable V 0= Tx de-emphasis disabled 1= Tx de-emphasis enabled

GPIO1

WDQSA[0..7]

55 R5153 R5154

(Internal PD)
48,52 VGA_VSYNC

ODT[0:1] : Used for DDR2 only . NC for GDDR3 .


1 1 2 10KR2J-3-GP 2 10KR2J-3-GP
CLKA0 CLKA0# CLKA1 CLKA1# RASA0# RASA1# CASA0# CASA1# CSA0_0# CSA0_1#_R CSA1_0# CSA1_1#_R CKEA0 CKEA1 WEA0# WEA1#

BIF_GEN2_EN_A

GPIO2

V 0 = Advertises the PCI-E device


as 2.5GT/s 1 = Advertises the PCI-E device as 5GT/s

CLKA0 CLKA0# CLKA1 CLKA1# RASA0# RASA1# CASA0# CASA1# CSA0_0#

55 55 55 55 55 55 55 55 55 R5200

48,52 VGA_HSYNC

No stuff when signle rank type. 1CS:4Mx32x8x1


+1.8V_RUN

BIF_CLK_PM_EN

GPIO8

V 0= Disable CLKREQ#power management capability


1= Enable CLKREQ# power management capability
C

Place Close to VRAM


2 Do Not Stuff 2 Do Not Stuff
CSA0_1# 55 55 RASA0# 55 RASA1# CSA1_1# 55 55 CASA0# 55 CASA1# 55 WEA0# 55 WEA1# 55 CSA0_0# 55 CSA1_0# RASA0# RASA1# CASA0# CASA1# WEA0# WEA1# CSA0_0# CSA1_0# CSA0_1# CSA1_1# CKEA0 CKEA1 CLKA0 CLKA0# CLKA1 CLKA1# R5192 R5198 R5191 R5184 R5197 R5195 R5189 R5188 R5209 R5208 R5187 R5173 R5163 R5172 R5194 R5193

ROMIDCFG[3:0] (Internal PD)

GPIO[13,12,11]

1 1

DY
R5199

CSA1_0#

55

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

2 121R2F-GP 2 121R2F-GP 2 121R2F-GP 2 121R2F-GP 2 121R2F-GP 2 121R2F-GP 2 121R2F-GP 2 121R2F-GP

if BIOS_ROM_EN=1,then Config[3:0] defines the ROM type if BIOS_ROM_EN=0,then Config[3:0] defines the primary memory apeture size

DY

R5168 40D2R2F-GP

CKEA0 CKEA1 WEA0# WEA1#

55 55 55 55

Enable external BIOS ROM device

BIOS_ROM_EN (Internal PD) AUD[1] AUD[0] (Internal PD)

GPIO_22_ROMCSB V 0= Disable external BIOS ROM device


1= Enable external BIOS ROM device AUD[1:0] V 00:No audio function 01:Audio for DisplayPort and HDMI ( if adapter is detected) 10:Audio for DisplayPort only 11:Audio for both DisplayPort and HDMI

+1.8V_RUN

R5185 1 R5190 1 R5384 1 R5205 1

DY DY DY

2 Do Not Stuff 2 Do Not Stuff 2 243R2F-2-GP 2 Do Not Stuff

NC_MEM_CALRN0 NC_MEM_CALRN1 MEM_CALRP1 NC_MEM_CALRP0 DRAM_RST CLKTESTA CLKTESTB


M92-S2-GP

C5379 SCD01U16V2KX-3GP

C5284 SCD1U16V2KX-3GP

VGA_HSYNC
VGA_VSYNC

R5169 100R2F-L1-GP-U

+1.8V_RUN

No stuff when signle rank type. 1CS:4Mx32x8x1

55 CSA0_1# 55 CSA1_1# 55 CKEA0 55 CKEA1 55 CLKA0 55 CLKA0# 55 CLKA1 55 CLKA1#

DY DY

2 Do Not Stuff 2 Do Not Stuff 2 121R2F-GP 2 121R2F-GP 2 60D4R2F-GP 2 60D4R2F-GP 2 60D4R2F-GP 2 60D4R2F-GP

4K7R2J-2-GP 2

R5171

4K7R2J-2-GP 2

R5206 2KR2J-1-GP

STRAPS MEM_TYPE

PIN
DVPDATA(23:20)

DESCRIPTION
MEMORY TYPE,MAKE AND SIZE INFO 0000 - GDDR3 16Mx32 Qimonda 0001 - GDDR3 32Mx32 Hynix 0010 - GDDR3 32Mx32 Qimonda 0011 - GDDR3 32Mx32 Samsung

55 MEM_RST

R5207 Do Not Stuff

DY
2

C5370 SC1U6D3V2KX-GP

(Internal PD)
R5217

52 DVPDATA20

1 1 1 1

VRAM2 VRAM2 DY DY
2 2

10KR2J-3-GP

52 DVPDATA21

R5158

Do Not Stuff

52 DVPDATA22

R5159

Do Not Stuff
B

52 DVPDATA23

R5160

Do Not Stuff

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

VGA-MEMORY/STRAPS(4/4)
Size A2 Date:
5 4 3 2

Document Number

Roberts Discrete
Sheet
1

Rev

-1

Tuesday, May 19, 2009

54

of

60

SSID = VIDEO
U5109 R5183 T12 T9 T4 T1 P12 P9 P4 P1 L11 L2 G11 G2 D12 D9 D4 D1 B12 B9 B4 B1 J12 J1 V10 V3 L12 L1 G12 G1 A10 A3
C

U5108 R5182 2 243R2F-2-GP MAA12 54 MEM_RST 54 1 R5405 DQMA#3 DQMA#2 DQMA#0 DQMA#1 BA2 BA1 BA0 CLKA0 CLKA0# CKEA0 WEA0# RASA0# CASA0# CSA0_0# MAA11 MAA10 MAA9 MAA8 MAA7 MAA6 MAA5 MAA4 MAA3 MAA2 MAA1 MAA0 2 1KR2J-1-GP T12 T9 T4 T1 P12 P9 P4 P1 L11 L2 G11 G2 D12 D9 D4 D1 B12 B9 B4 B1 J12 J1 V10 V3 L12 L1 G12 G1 A10 A3 54 WDQSA[0..7] WDQSA7 WDQSA6 WDQSA4 WDQSA5 RDQSA7 RDQSA6 RDQSA4 RDQSA5 MDA57 MDA61 MDA63 MDA62 MDA58 MDA59 MDA56 MDA60 MDA54 MDA55 MDA52 MDA48 MDA53 MDA50 MDA51 MDA49 MDA36 MDA38 MDA39 MDA33 MDA32 MDA34 MDA35 MDA37 MDA42 MDA40 MDA44 MDA43 MDA41 MDA46 MDA45 MDA47 P2 P11 D11 D2 P3 P10 D10 D3 T3 T2 R3 R2 M3 N2 L3 M2 T10 T11 R10 R11 M10 N11 L10 M11 G10 F11 F10 E11 C10 C11 B10 B11 G3 F2 F3 E2 C3 C2 B3 B2 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSA VSSA VSS VSS VSS VSS VSS VSS VSS VSS ZQ RFU RESET SEN MF DM3 DM2 DM1 DM0 RAS BA0 BA1 BA2 BA1 BA0 CK CK# WE CKE BA2 CS CAS CKE WE# RAS# CAS# CS0# A12/CS1# A11 A10 A9 A8/AP A7 A6 A5 A4 A3 A2 A1 A0 MF0 VREF VREF VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDA VDDA VDD VDD VDD VDD VDD VDD VDD VDD A4 J2 V9 V4 A9 N3 N10 E10 E3 H10 G9 G4 J11 J10 H4 H9 H3 F4 F9 J3 L4 K2 M9 K11 L9 K10 H11 K9 M4 K3 H2 K4 H12 H1 R12 R9 R4 R1 V12 V1 N12 N9 N4 N1 J9 J4 E12 E9 E4 E1 C12 C9 C4 C1 A12 A1 K12 K1 V11 V2 M12 M1 F12 F1 A11 A2 MEM_ZQ1 1 MEM_RST 1 R5406 DQMA#7 DQMA#6 DQMA#4 DQMA#5 RASA1# BA0 BA1 CLKA1 CLKA1# WEA1# CKEA1 BA2 CSA1_0# CASA1# MAA7 MAA8 MAA3 MAA10 MAA11 MAA2 MAA1 MAA0 MAA9 MAA6 MAA5 MAA4 VREFA1 VREFA3 +1.8V_RUN 2 2 243R2F-2-GP MAA12 54 MEM_RST 54 2 1KR2J-1-GP +1.8V_RUN
D

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSA VSSA VSS VSS VSS VSS VSS VSS VSS VSS

ZQ RFU RESET SEN MF DM3 DM2 DM1 DM0 BA2 BA1 BA0 CK CK# CKE WE# RAS# CAS# CS0# A12/CS1# A11 A10 A9 A8/AP A7 A6 A5 A4 A3 A2 A1 A0 VREF VREF VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDA VDDA VDD VDD VDD VDD VDD VDD VDD VDD

A4 J2 V9 V4 A9 N3 N10 E10 E3 H10 G9 G4 J11 J10 H4 H9 H3 F4 F9 J3 L4 K2 M9 K11 L9 K10 H11 K9 M4 K3 H2 K4

MEM_ZQ0 1 MEM_RST

BA2 BA1 BA0

DQMA#[0..7] 54 54 54 54 54 54 54 54 54 54 54 54

DQMA#[0..7] 54 RASA1# BA0 BA1 CLKA1 CLKA1# WEA1# CKEA1 BA2 CSA1_0# CASA1# CSA1_1# 54 54 54 54 54 54 54 54 54 54 54

CLKA0 CLKA0# CKEA0 WEA0# RASA0# CASA0# CSA0_0# CSA0_1#

54 WDQSA[0..7] WDQSA3 WDQSA2 WDQSA0 WDQSA1 RDQSA3 RDQSA2 RDQSA0 RDQSA1 MDA30 MDA29 MDA25 MDA31 MDA24 MDA26 MDA27 MDA28 MDA20 MDA23 MDA22 MDA21 MDA16 MDA17 MDA19 MDA18 MDA6 MDA2 MDA4 MDA7 MDA0 MDA1 MDA5 MDA3 MDA15 MDA12 MDA11 MDA13 MDA14 MDA10 MDA8 MDA9 P2 P11 D11 D2 P3 P10 D10 D3 T3 T2 R3 R2 M3 N2 L3 M2 T10 T11 R10 R11 M10 N11 L10 M11 G10 F11 F10 E11 C10 C11 B10 B11 G3 F2 F3 E2 C3 C2 B3 B2

54 RDQSA[0..7]

WDQS3 WDQS2 WDQS1 WDQS0 RDQS3 RDQS2 RDQS1 RDQS0 DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ23 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

+1.8V_RUN MAA[0..11] 54 1 R5174 511R2F-2-GP +1.8V_RUN 2

54 RDQSA[0..7]

WDQS3 WDQS2 WDQS1 WDQS0 RDQS3 RDQS2 RDQS1 RDQS0 DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ23 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

A7 A8/AP A3 A10 A11 A2 A1 A0 A9 A6 A5 A4 MF1

+1.8V_RUN MAA[0..11] 54 1 R5175 511R2F-2-GP

H12 VREFA0 H1 VREFA2 R12 R9 R4 R1 V12 V1 N12 N9 N4 N1 J9 J4 E12 E9 E4 E1 C12 C9 C4 C1 A12 A1 K12 K1 V11 V2 M12 M1 F12 F1 A11 A2

54 MDA[0..63]

54 MDA[0..63]

VREF=0.72 * VDDQ

VREF=0.72 * VDDQ

R5176 1K18R2F-GP

R5177 1K18R2F-GP

+1.8V_RUN 1

+1.8V_RUN 1

R5178 511R2F-2-GP 2

R5179 511R2F-2-GP 2

C5258 SCD01U16V2KX-3GP

1 C5279 SCD01U16V2KX-3GP

VREF=0.72 * VDDQ

VREF=0.72 * VDDQ

+1.8V_RUN 1 R5180 1K18R2F-GP 1

+1.8V_RUN 1 R5181 1K18R2F-GP 1 2 C5280 SCD01U16V2KX-3GP

C5257 SCD01U16V2KX-3GP

HYB18H1G321AF-11-GP

HYB18H1G321AF-11-GP

+1.8V_RUN

Place below decoupling caps close VDD pin.


1 1 1 1 1 1 1 1 1 1 1 C5278 SC10U6D3V5KX-1GP C5271 SC10U6D3V5KX-1GP C5259 SC10U6D3V5KX-1GP C5281 SC10U6D3V5KX-1GP C5260 SC10U6D3V5KX-1GP C5275 SC10U6D3V5KX-1GP C5272 SC10U6D3V5KX-1GP C5276 SC10U6D3V5KX-1GP C5273 SC10U6D3V5KX-1GP C5277 SC10U6D3V5KX-1GP C5274 SC10U6D3V5KX-1GP

+1.8V_RUN

Place below decoupling caps close VDD pin.


1 1 1 1 1 1 1 1 1 1 C5262 SC10U6D3V5KX-1GP C5263 SC10U6D3V5KX-1GP C5264 SC10U6D3V5KX-1GP C5265 SC10U6D3V5KX-1GP C5266 SC10U6D3V5KX-1GP C5267 SC10U6D3V5KX-1GP C5268 SC10U6D3V5KX-1GP C5269 SC10U6D3V5KX-1GP C5270 SC10U6D3V5KX-1GP C5282 SC10U6D3V5KX-1GP 1 C5283 SC10U6D3V5KX-1GP Main Source
A

C5256 SC10U6D3V5KX-1GP

C5261 SC10U6D3V5KX-1GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

VRAM
Rev

hexainf@hotmail.com GRATIS - FOR FREE


5

Roberts Discrete
Sheet
1

-1
of 60

Date: Tuesday, May 19, 2009


4 3 2

55

ICH9M SMBus Block Diagram

KBC SMBus Block Diagram


+5V_RUN SRN10KJ-5-GP

TouchPad Conn.
PSDAT1 PSCLK1 +3.3V_ALW +3.3V_RUN +3.3V_RTC_LDO TPDATA TPCLK TPDATA TPCLK TPDATA TPCLK

+3.3V_RUN SRN2K2J-1-GP SRN2K2J-1-GP

ICH9M
SMBCLK SMBDATA SMB_CLK SMB_DATA ICH_SMBCLK ICH_SMBDATA

DIMM 1
SCL SDA SCL1 BAT_SCL SDA1 BAT_SDA

SRN4K7J-8-GP

SRN100J-3-GP PBAT_SMBCLK1 PBAT_SMBDAT1

Battery Conn.
CLK_SMB DAT_SMB

SMBus address:16

SMBus Address:A0
2N7002SPT

DIMM 2
ICH_SMBCLK ICH_SMBDATA SCL SDA

KBC
WPC773L

MAX8731
SCL SDA

SMBus address:12
2

SMBus Address:A4
2

Express Card
SMB_CLK SMB_DATA SMB_CLK SMB_DATA ICH_SMBCLK ICH_SMBDATA

Clock Generator
SCLK SDATA

+3.3V_RUN

+3.3V_RTC_LDO +3.3V_RUN SRN4K7J-8-GP

Thermal
THERM_SCL SRN4K7J-8-GP THERM_SDA SDA SCL

SMBus address:D2

SMBus address:7A

ICH_SMBCLK ICH_SMBDATA

Minicard WLAN
SMB_CLK SMB_DATA

GPIO61/SCL2 GPIO62/SDA2

KBC_SCL1 2N7002DW-1-GP KBC_SDA1

+3.3V_DELAY

SRN2K2J-1-GP

I2CC_SCL I2CC_SDA

LDDC_CLK LDDC_DATA

LCD Conn.
+5V_CRT_RUN

VGA
I/O Board CONN.
I2CA_SCL I2CA_SDA
4

SRN2K2J-1-GP

DDC_CLK_CON DDC_DATA_CON

G_CLK_DDC2_R G_DAT_DDC2_R

CRT CONN
4

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

SMBUS Block Diagram


Size C Document Number Rev

Roberts Discrete
Sheet
E

-1
of 60

Date: Tuesday, May 19, 2009


A B C D

56

Thermal Block Diagram


1

Audio Block Diagram


1

SPEAKER
OUTR+ OUTROUTLOUTL+

PORT_D_L PORT_D_R

SPKR_INL SPKR_INR

MAX9789C
PORT_A_L HP_INL HP_INR HPL HPR

CPU
DP1 H_THERMDA SC470P50V3JN-2GP
2

PORT_A_R

THRMDA

HP OUT
2

DN1

H_THERMDC

THRMDC

Thermal EMC2102 VGA


DP2 EMC2102_DP3 SC470P50V3JN-2GP DN2 EMC2102_DN3 THRMDC THRMDA

Codec 92HD71B7
PORTB_L PORTB_R VREFOUT_B

MIC IN

DMIC_CLK VOL_UP/DMIC_0/GPIO1

Digital MIC Array

DP3

EMC2102_DP2 MMBT3904-3-GP SC470P50V3JN-2GP

DN3

EMC2102_DN2

System sensor, put between CPU and NB.

PORTC_L PORTC_R VREFOUT_C

Analog MIC

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

Thermal/Audio Block Diagram


Roberts Discrete
Sheet
E

Rev

hexainf@hotmail.com GRATIS - FOR FREE


A

-1
of 60

Date: Tuesday, May 19, 2009


B C D

57

Adapter

+PWR_SRC ISL6266AHRZ TPS5117 TPS51116


+1.8V_SUS +VCC_CORE +1.05V_VCCP for Discrete
+V_DDR_MCH_REF +0.9V_DDR_VTT

TI51511

+VCC_GFX_CORE

P2003EVG Charger MAX8731A Battery +PBATT APL5912 FDS8880 APL5912

MAX17020
+1.5V_RUN
C

+1.8V_RUN

+1.1V_RUN
C

+5V_ALW2

+5V_ALW

+3.3V_ALW G577BR91U

G9091

G546B2P1UF

AO4468

RT9711BPF

SI2301BDS

AO4468

G577BR91U

AO3403
+1.5V_CARD

+3.3V_RTC_LDO

+5V_USB1

+5V_RUN

+5V_USB2

+3.3V_DELAY

+3.3V_RUN

+3.3V_CARDAUX

+3.3V_LAN

for Discrete

G9091
B

MAX9789A

FDC655BN

SI4800BDY

G5281RC1U

G577BR91U

RTS5158E

88E8040
B

+3.3V_CRT_LDO

+VDDA

+5V_HDD

+5V_MOD

+LCDVDD

+3.3V_CARD

+3.3V_RUN_CARD

+2.5V_LOM

+1.2V_LOM

Power Shape
Regulator
A

LDO

Switch
A

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

Power Block Diagram


Roberts Discrete
Sheet
1

Rev

-1
of 60

Date: Tuesday, May 19, 2009


5 4 3 2

58

DATE

VERSON

NO
1

PAGE
29 20 16 8,10, 11,16 Stuff R151, no stuff R150. Add R5425. Delete R432, R433.

Modified List

Issue Description
Change board ID from X02 to A00. Add resistor 100k ohm pull low to ground. To solve panel blinking issue. Delete zero ohm resistors for cost concern. Replace zero ohm resistors with pad for cost concern.

OWNER
EE EE EE
D

01/09
D

2 3

Replace R139, R125, R412, R384, R153, R329, R330, R127, R137, PR1, R351, R453, R5400, R365, R28, R30, R31, R32, RN42, RN43, RN44, RN45, RN48, RN22, RN23, RN54, RN53, RN51 with pads.

01/12

19,29, 39,41, 43,44, 47

EE

A00 01/13 01/21


7
C

5 6

44 50 34,35

Change PR9 from pad into 10k ohm resistor. Change C89 from dummy into 0.1u capacitor. Dummy R3313, Q3301, R3320, C3315, R3327, R3321, R5418, R5419. Add R5431 and D3304. R3305 change to 37.4K ohm. Use 84.27002.L04 for Q13 and Q23.

Adding RC circuit. Changing Power Play voltage control. To prevent components being damaged by high voltages.

EE EE EE
C

41

Change R5413 into zero ohm resistor.

EE

01/22 02/02 02/04


12 29 14 17 29 34 44 48 25 18 30 41 47 52 Add circuit D3305, U5113, R5432, C5390, Q5113, but dummy all. Change R158 to zero ohm resistor. Change R167 R435 R158 R413 R501 R5412 R5413 PR17 R5212 R5214 R397 R399 R2 R481 R480 R54 R55 R56 R57 to short pad. EE EE 9 11 50 45 Dummy D3304. Undummy R5419. Dummy C67. EE EE

05/19

2
B

52 26 48 31

change circuit R5218 R5219 to short pad change G3330 G3331 gap type add circuit C4501 C4502 Change EC78 0.1u to 1u,Change TC12 to 4.7u but DUMMY

EE
B

3 4 5

EE EE EE

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

Change List-EE
Size Document Number Custom Rev

hexainf@hotmail.com GRATIS - FOR FREE


5

Roberts Discrete
Sheet
1

-1
of 60

Date: Tuesday, May 19, 2009


4 3 2

59

DATE

VERSON

NO

PAGE

Modified List

Issue Description

OWNER

Main Source

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

Change List Power


Size Document Number Custom Rev

Roberts Discrete
Sheet
1

-1
of 60

Date: Tuesday, May 19, 2009


5 4 3 2

60