402b6 Compal Phqaa La-6831p Toshiba Satellite p750

A
PHQAA
Marseille 10R/10RG
LA-6831P REV 0.1 Schematic

Intel Processor(Sandy Bridge) / PCH(Cougar Point)
2010-07-05 Rev 0.1
Compal Electronics, Inc.
Compal Secret Data
Security Classification
200910/9
Issued Date
Deciphered Date
2010/01/23
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Cover Page
Size
B
Date:
Document Number
Rev
0.1
PHQAA LA-6831P M/B

Monday, August 02, 2010
Sheet
E
of
58
Fan Control
Intel CPU
Sandy Bridge
PCI-Express 16X 5GHz
VGA Thermal Sensor
APL5607
ADM1032ARMZ-2
page 6
page 14
Memory BUS(DDRIII) 200pin DDRIII-SO-DIMM X2
rPGA-989
37.5mm*37.5mm
Dual Channel
page 5,6,7,8,9,10
page 11,12
BANK 0, 1, 2, 3
1.5V DDRIII 1066/1333/1600 MT/s
VGA (DDR3)
NVIDIA N12M-GE, 64bit with 512MB/1GB
USB/B Right
CRT
FDI X8
page 26
DMI X4
2.7GT/s
NVIDIA N12P-GS/GE, 128bit with 1GB/2GB
Left USB
USB port 0,1

page 37
5GT/s
IR Emitter
page 13,14,15,16,17,18,19,20,21,22,23,24
Felica
USB port 5
page 38
USB
FingerPrinter
USB port 2
page 37
USB port 8
page 38
Int. Camera
USB port 9
page 38
USB port 11
page 25
5V 480MHz
LVDS Conn.
page 25
2
USB
HDMI-CEC
page 27
PCIe 1x
HDMI Conn.
1.5V 5GT/s
Intel PCH
Cougar Point - M
page 27
RTL8105E 10/100M
RTL8111E 1G PCIe port 1
RJ45
page 40
SATA port 0
5V 6GHz(600MB/s)
1.5V 5GT/s
PCIeMini Card
JET
PCIe port 4
3G/TV#1
TV#2
USB port 12
USB port 10
page 39
page 39
SATA HDD
B-CAS
page 38
SATA port 1
page 37
Express Card
USB USB port 4
page 39
Express Card
PCIe PCIe port 3
page 39
SIM
page 39
FCBGA-989
25mm*25mm
SATA port 2
5V 3GHz(300MB/s)
Cardreader
JMB389C
PCIeMini Card
WLAN PCIe port 2
page 39
PCIe 1x
page 40
PCIeMini Card
page 39
5V 480MHz
EC SMBus
PCIeMini Card
WiMax USB port 13
SATA ODD
SATA port 4
page 37
PCIe 1x
1.5V 5GT/s
page 28,29,30,31,32,33,34,35,36
PCIe port5
page 41
PCIe 1x
USB3.0
TUSB7320
1.5V 5GT/s
PCIe port6
page 42
LPC BUS
3.3V 24MHz
HD Audio
3.3V 33 MHz
TP& Light Pipe/B

LS-6061P page 46
RTC CKT.
page 28
DC/DC Interface CKT.
Cap Sensor
& Light Sensor/B
LS-6062P page 46
LED/B
LS-6063P
Debug Port
ENE KB930
page 45
Touch Pad
page 46
Int.KBD
page 45
page 36
EC ROM
(128KB)
page 45
Power Circuit DC/DC

page 48,49,50,51,52
53,54,55,56,57
Power On/Off CKT.

page 46
A
CIR
page 44
page 43
G-Sensor
page 45
Int.
MIC Conn
SPK Conn
JPIO
(HP &page
MIC)
37
page 43
page 25
EC SMBus
Audio & USB/B

LS-6064P page
37
Finger Printer/B
LS-6065P page
38
Power/B_FPC
DA300006JM0
ALC269
page 38
page 44
page 47
4
HDA Codec
MDC 1.5 Conn

SPI ROM
(4MB)
page 28
200910/9
Issued Date
Compal Secret Data
Deciphered Date
2010/01/23
page 46
B
Title
Block Diagram
Size
Document Number
Rev
0.1
PHQAA LA-6831P M/B

Date:
Sheet
E
of
58
DESIGN CURRENT 0.1A
+3VL
+5VL
DESIGN CURRENT 0.1A
B+
Ipeak=5A, Imax=3.5A, Iocp min=7.9
DESIGN CURRENT 5A
+5VALW
DESIGN CURRENT 2A
+1.8VS
SUSP#
SY8033BDBC
SUSP
DESIGN CURRENT 4A
N-CHANNEL
+5VS
BCPWON
SI4800
DESIGN CURRENT 0.5A
+5VS_L_BCAS
P-CHANNEL
AO-3413
KB_LED
RT8205EGQW
DESIGN CURRENT 400mA
+5VS_LED
+3VS_HDP
DESIGN CURRENT 1.6A
+5VS_ODD
P-CHANNEL
AO-3413
+5VS
LDO
G9191
ODD_EN#
P-CHANNEL
AO-3413
DESIGN CURRENT 5A
+3VALW
WOL_EN#
P-CHANNEL
AO-3413
SUSP
+3V_LAN
DESIGN CURRENT 4A
N-CHANNEL
+3VS
LCD_ENVDD
SI4800
P-CHANNEL
AO-3415
DESIGN CURRENT 1.5A
+LCD_VDD
C
BT_PWR#
P-CHANNEL
AO-3413
+BT_VCC
FELICA_PWR
DESIGN CURRENT 0.5A
+FLICA_VCC
DESIGN CURRENT 0.5A
+3VS_DGPU
DESIGN CURRENT 48A
+CPU_CORE
DESIGN CURRENT 28A
+VGA_CORE
P-CHANNEL
AO-3413
DGPU_PWR_EN
P-CHANNEL
AO-3413
VR_ON
ISL62883HRZ
SUSP# or DGPU_PWR_EN
APW7138NITRL
VTTP_EN
APW7138NITRL
DESIGN CURRENT 18A
+VTT
SUSP#
B
RT8209BGQW
DESIGN CURRENT 7A
+1.05VS
DESIGN CURRENT 3A
+1.05VS_DGPU
DGPU_PWR_EN
P-CHANNEL
AO-3413
SUSP#
DESIGN CURRENT 15A
+1.5V
SUSP
RT8209BGQW
DESIGN CURRENT 2A
N-CHANNEL
+1.5V_CPU
FDS6676AS
SUSP
DESIGN CURRENT 2A
N-CHANNEL
+1.5VS
FDS6676AS
VGA_PWROK
DESIGN CURRENT 10A
N-CHANNEL
+VRAM_1.5VS
FDS6676AS
SUSP or 0.75VR_EN#
DESIGN CURRENT 1.5A
G2992F1U
A
+0.75VS
A
GFXVR_EN
DESIGN CURRENT 22A
ADP3211AMNR2G
Compal Secret Data
200910/9
Issued Date
Deciphered Date
2010/01/23
5
+GFX_CORE
Title
Power Tree
Size
Document Number
Rev
0.1
PHQAA LA-6831P M/B

Date:
Sheet
1
of
58
Platform
Voltage Rails
( O MEANS ON
+RTCVCC
+5VL
+5VALW
+3VL
+3VALW
+1.5V
+5VS
Calpella
+3VS
+1.8VS
+VSB
power
plane
SKU
CPU
PCH
UMA(OPT@) Arrandale
HM55@/HM57@
Discrete Clarksfield/
HM55@/HM57@/PM55@
(DIS@)
Arrandale
Optimus
Arrandale
HM55@/HM57@
(OPT@)
X MEANS OFF )
B+
VGA
N/A
N11P@/N11M@
N11P@/N11M@
+1.5VS
1
+1.05VS
BTO Option Table
+0.75VS
+CPU_CORE
+VGA_CORE
+VRAM_1.5VS
explain
UMA
Discrete/
Optimus
BTO
IHDMI@
DHDMI@
+3VS_DGPU
+1.05VS_DGPU
S1
S3
S5 S4/ Battery only
explain
S5 S4/AC & Battery

don't exist
BTO
BTO
2
S5 S4/AC
3G
Device
HEX
Address
+3VS
DDR SO-DIMM 0
A0 H
1010 0000 b
+3VS
DDR SO-DIMM 1
A4 H
1010 0100 b
+3VS
Clock Generator
D2 H
1101 0010 b
+3VS
New Card
+3VS
WLAN/WIMAX
+3VS
Clock Generator
+3VS
3G
Clarksfield with
S3 Power Saving
CEC@
M1@
M3@
PSM3@
LAN
SLOT1
Fingerprint
LAN
WIMAX
10/100M
TV@
WIMAX@
8105E@
Felica
G-SENSOR
description Felica
BLUE TOOTH
G-SENSOR
SKU
Felica
BLUE TOOTH
G-SENSOR
Discrete
BT@
GSENSOR@
FELICA@
No Power Saving
BTO
NOPS@
Function
Power Saving
PS@
FP@
MDC@
CIR@
KBL@
Card reader
New Card
JMB385C/389C
New Card
explain
JMB385C
JMB389C
BTO
JMB385@
JMB389@
SIGNAL
Full ON
Camera & Mic
Discrete
Camera & Mic
3D@
Optimus
NO3D@
Camera & Mic
OPTFH@
CAM@
N11M
VRAM
N11P
N11E
N11M-GE1
N11M-GE2
N11M-OP1
8PCS@
N11P@
N11E@
N11MGE1@
N11MGE2@
N11MOP@
New Card
NEW@
SLP_S3# SLP_S4# SLP_S5#

HIGH
HIGH
HIGH
Power
Device
HEX
Address
S1(Power On Suspend)
HIGH
HIGH
HIGH
0001 0110 b
+3VS
PCH
96 H
1001 0110 b
S3 (Suspend to RAM)
LOW
HIGH
HIGH
+3VL
HDMI-CEC
34 H
0011 0100 b
+3VS
NVIDIA GPU
9A H
1001 1010 b
+3VS
G-Sensor
40 H
0100 0000 b
S4 (Suspend to Disk)
LOW
LOW
HIGH
+3VS
Light Sensor
52 H
0101 0010 b
S5 (Soft OFF)
LOW
LOW
LOW
G3
LOW
LOW
LOW
Virtual I2C
200910/9
Issued Date
Compal Secret Data
Deciphered Date
2010/01/23
B
8111E@
GPU
Address
KB Light
KB Light
N11P & N11E
16 H
Cap. Sensor
CIR
CIR
OPT@
HEX
+3VL
Modem
Modem
S3 Power Saving
explain
EC SM Bus2 Address
DIS@
Smart Battery
Address
Fingerprint
3D Panel
Device
HEX
KB Light
Fingerprint
Optimus
Power
Device
CIR
LVDS
+3VL
Power
Modem
Giga
SKU
S3 Power Saving
STATE
Clarksfield
BLUE TOOTH
Function
description
EC SM Bus1 Address
Arrandale
description
Power
Clarksfield
CEC
TV Tuner
3G@
Function
PCH SM Bus Address
COMMON
HDMI@
SLOT2
description
explain
Arrandale
MINI PCI-E SLOT
Function
S0
CPU
HDMI
description
+VTT
State
HDMI
Function
+GFX_CORE
Title
Notes List
Size Document Number
Custom
Rev
0.1
PHQAA LA-6831P M/B
Date:
Sheet
E
of
58
JCPUB
100 MHz
H_SNB_IVB#
<32> H_SNB_IVB#
C26
SNB_IVB#
@
1000P_0402_50V7K 2
H_PWRGOOD
1 C488
T1
TP_SKTOCC#
PAD
AN34
SKTOCC#
CLOCKS
PM_DRAM_PWRGD_R
1 C487
MISC
PROC_SELECT#
@
1000P_0402_50V7K 2
PAD
<33,44> H_PECI
+1.05VS_VCCP
AL33
CATERR#
H_PECI
AN33
PECI
R450
AL32
PROCHOT#
H_PROCHOT#
1 62_0402_5%
2 H_PROCHOT#_R
56_0402_5%
<44> H_PROCHOT#
R47
H_CATERR#
R14
<33> H_THERMTRIP#
R51
2 H_THERMTRIP#_R AN32
0_0402_5%
CLK_CPU_DMI
CLK_CPU_DMI#
Stuff R41 and R42 if do not support eDP
CLK_CPU_DMI <29>
CLK_CPU_DMI# <29>
+1.05VS_VCCP
120 MHz
A16
A15
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
SM_DRAMRST#
DDR3
MISC
T2
THERMAL
A28
A27
BCLK
BCLK#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
CLK_CPU_DPLL
CLK_CPU_DPLL#
R8
H_DRAMRST#
AK1
A5
A4
SM_RCOMP_0 R1437 2
SM_RCOMP_1 R1438 2
SM_RCOMP_2 R1439 2
AP29
AP27
XDP_PRDY#_R
XDP_PREQ#_R
R1 1
R2 1
@
@
2 0_0402_5%
2 0_0402_5%
XDP_PRDY#
XDP_PREQ#
AR26
AR27
AP30
XDP_TCK_R
XDP_TMS_R
XDP_TRST#_R
R4 1
R6 1
R7 1
@
@
@
2 0_0402_5%
2 0_0402_5%
2 0_0402_5%
XDP_TCK
XDP_TMS
XDP_TRST#
AR28
AP26
XDP_TDI_R
XDP_TDO_R
R8 1
R10 1
@
@
2 0_0402_5%
2 0_0402_5%
XDP_TDI
XDP_TDO
CLK_CPU_DPLL#
R42 1
2 1K_0402_5%
CLK_CPU_DPLL
R41 1
2 1K_0402_5%
H_DRAMRST# <7>
DDR3 Compensation Signals

Layout Note:Place these
resistors near Processor
1 140_0402_1%
1 25.5_0402_1%
1 200_0402_1%
THERMTRIP#
H_PWRGOOD
1 10K_0402_5%
H_PWRGOOD
<33> H_PWRGOOD
PM_SYS_PWRGD_BUF 1
R454
AM34
AP33
2 PM_DRAM_PWRGD_R
130_0402_5%
BUF_CPU_RST#
V8
AR33
PM_SYNC
UNCOREPWRGOOD
SM_DRAMPWROK
RESET#
+3VALW
TDI
TDO
Routed as a single daisy chain
R36
1
2
1K_0402_5%
DBR#
AL35
XDP_DBRESET#_R
R11 1
2 0_0402_5%
AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32
XDP_BPM#0_R
XDP_BPM#1_R
XDP_BPM#2_R
XDP_BPM#3_R
XDP_BPM#4_R
XDP_BPM#5_R
XDP_BPM#6_R
XDP_BPM#7_R
R12 1
R13 1
R15 1
R18 1
R19 1
R20 1
R21 1
R23 1
@
@
@
@
@
@
@
@
2
2
2
2
2
2
2
2
XDP_DBRESET#
+3VS
XDP_DBRESET# <30>
C
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_BPM#6
XDP_BPM#7
R24 1
R25 1
R26 1
R27 1
@
@
@
@
2
2
2
2
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
CFG12
CFG13
CFG14
CFG15
<10>
<10>
<10>
<10>
Close to CPU side
+1.5V_CPU
Sandy Bridge_rPGA_Rev0p61
C93
0.1U_0402_16V4Z
TCK
TMS
TRST#
JTAG & BPM
H_PM_SYNC
<30> H_PM_SYNC
PWR MANAGEMENT
PRDY#
PREQ#
2
R339
200_0402_5%
2
5
1
2
O
A
PM_SYS_PWRGD_BUF
PU/PD for JTAG signals
+1.05VS_VCCP
<30> DRAMPWROK
<30,44> PM_PWROK
U10
74AHC1G09GW_TSSOP5
R312
0_0402_5%
1
2
2 0_0402_5%
1 2
R3841
R340
39_0402_5%
@
SUSP
<9,47,54> SUSP
2
G
3
Q5
2N7002_SOT23
@
JXDP @
XDP Connector
XDP_PREQ#
XDP_PRDY#
XDP_BPM#0
XDP_BPM#1
Buffered Reset to CPU
XDP_BPM#2
XDP_BPM#3
+3VS
<30,44> PBTN_OUT#
<10> CFG0
<30,44,55> VGATE
<29> CLK_CPU_ITP
<29> CLK_CPU_ITP#
+1.05VS_VCCP
1 0.1U_0402_16V4Z
C84
+1.05VS_VCCP
PLT_RST# <32,39,40,41,42,44,45>
H_PWRGOOD
PBTN_OUT#
CFG0
VGATE
PLT_RST#
U3
OE#
IN
XDP_CPU_HOOK6
2
1K_0402_5% XDP_DBRESET#
OUT
GND
BUFO_CPU_RST#
C8
0.1U_0402_10V6K
@
R155
43_0402_1%
1
2 BUF_CPU_RST#
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
XDP_TCK
74AHC1G125GW_SOT353-5
1 51_0402_5%
XDP_TDI_R
R29
1 51_0402_5%
XDP_TDO
R30
1 51_0402_5%
XDP_TCK_R
R31
1 51_0402_5%
XDP_TRST#_R
R32
1 51_0402_5%
1A
2
C3
10U_0805_10V6K
JFAN
U1
1
2
3
4
+FAN1
<44> EN_DFAN1
10mil
EN
VIN
VOUT
VSET
+FAN1
GND
GND
GND
GND
8
7
6
5
1
2
3
C4
1000P_0402_50V7K
@
4
5
1
2
3
GND
GND
ACES_85204-0300N
APL5607KI-TRG_SO8
C1
10U_0805_10V6K
R3
10K_0402_5%
1
+3VS
FAN_SPEED1 <44>
1
27
28
R209
0_0402_5%
@
C6
0.01U_0402_25V7K
@
MOLEX 52435-2671
R69
75_0402_5%
5
2
VCC
2
1
R40
2
2
2
2
1K_0402_5%XDP_CPU_HOOK0
0_0402_5% XDP_CPU_HOOK1
1K_0402_5%XDP_CPU_HOOK2
0_0402_5% XDP_CPU_HOOK3
CLK_CPU_ITP
CLK_CPU_ITP#
1
1
1
1
@
@
@
@
2
PLT_RST#
R35
R152
R37
R451
R28
FAN Control Circuit
+5VS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
XDP_TMS_R
Issued Date
Compal Secret Data
200910/9
2010/01/23
Deciphered Date
5
Title
Sandy Bridge_JTAG/XDP/FAN
Custom
Rev
0.1
PHQAA LA-6831P M/B
Date:
Sheet

1
of
58
+1.05VS_VCCP
R34
24.9_0402_1%
<30>
<30>
<30>
<30>
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
<30>
<30>
<30>
<30>
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
<30>
<30>
<30>
<30>
<30>
<30>
<30>
<30>
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
<30>
<30>
<30>
<30>
<30>
<30>
<30>
<30>
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
DMI_PTX_CRX_P0
DMI_PTX_CRX_P1
DMI_PTX_CRX_P2
DMI_PTX_CRX_P3
B28
B26
A24
B23
DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
G21
E22
F21
D21
DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
G22
D22
F20
C21
DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]
DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
A21
H19
E19
F18
B21
C20
D18
E17
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
A22
G19
E20
G18
B20
C19
D19
F17
FDI0_TX[0]
FDI0_TX[1]
FDI0_TX[2]
FDI0_TX[3]
FDI1_TX[0]
FDI1_TX[1]
FDI1_TX[2]
FDI1_TX[3]
FDI0_FSYNC
FDI1_FSYNC
<30> FDI_FSYNC0
<30> FDI_FSYNC1
FDI_FSYNC0
FDI_FSYNC1
J18
J17
<30> FDI_INT
FDI_INT
H20
<30> FDI_LSYNC0
<30> FDI_LSYNC1
FDI_LSYNC0
FDI_LSYNC1
J19
H17
+1.05VS_VCCP
R9
2 24.9_0402_1%
+1.05VS_VCCP
R33
1 10K_0402_5%
EDP_COMP
FDI0_TX#[0]
FDI0_TX#[1]
FDI0_TX#[2]
FDI0_TX#[3]
FDI1_TX#[0]
FDI1_TX#[1]
FDI1_TX#[2]
FDI1_TX#[3]
DMI
DMI_PTX_CRX_P0
DMI_PTX_CRX_P1
DMI_PTX_CRX_P2
DMI_PTX_CRX_P3
B27
B25
A25
B24
FDI_INT
FDI0_LSYNC
FDI1_LSYNC
A18
A17
B16
eDP_COMPIO
eDP_ICOMPO
eDP_HPD
C15
D15
eDP_AUX
eDP_AUX#
C17
F16
C16
G15
eDP_TX[0]
eDP_TX[1]
eDP_TX[2]
eDP_TX[3]
C18
E16
D16
F15
eDP_TX#[0]
eDP_TX#[1]
eDP_TX#[2]
eDP_TX#[3]
PCI EXPRESS* - GRAPHICS
eDP_COMP signals should be

shorted near balls and
routed with typical
impedance <25m ohm
<30>
<30>
<30>
<30>
DMI_PTX_CRX_N0
DMI_PTX_CRX_N1
DMI_PTX_CRX_N2
DMI_PTX_CRX_N3
Intel(R) FDI
DMI_PTX_CRX_N0
DMI_PTX_CRX_N1
DMI_PTX_CRX_N2
DMI_PTX_CRX_N3
eDP
<30>
<30>
<30>
<30>
PEG_COMP
FDI_FSYNC0
FDI_FSYNC1
A
FDI_LSYNC0
FDI_LSYNC1
1 DIS@
R689
1 DIS@
R690
1 DIS@
R695
1 DIS@
R696
1 DIS@
R697
PEG_ICOMPI and RCOMPO signals should be

shorted and routed
with - max length = 500 mils - typical
impedance = 43 m ohm (4 mils)
PEG_ICOMPO signals should be routed with max length = 500 mils
- typical impedance = 14.5 m ohm (12 mils)
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
J22
J21
H22
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32
PCIE_GTX_C_CRX_N0
PCIE_GTX_C_CRX_N1
PCIE_GTX_C_CRX_N2
PCIE_GTX_C_CRX_N3
PCIE_GTX_C_CRX_N4
PCIE_GTX_C_CRX_N5
PCIE_GTX_C_CRX_N6
PCIE_GTX_C_CRX_N7
PCIE_GTX_C_CRX_N8
PCIE_GTX_C_CRX_N9
PCIE_GTX_C_CRX_N10
PCIE_GTX_C_CRX_N11
PCIE_GTX_C_CRX_N12
PCIE_GTX_C_CRX_N13
PCIE_GTX_C_CRX_N14
PCIE_GTX_C_CRX_N15
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32
PCIE_GTX_C_CRX_P0
PCIE_GTX_C_CRX_P1
PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_P3
PCIE_GTX_C_CRX_P4
PCIE_GTX_C_CRX_P5
PCIE_GTX_C_CRX_P6
PCIE_GTX_C_CRX_P7
PCIE_GTX_C_CRX_P8
PCIE_GTX_C_CRX_P9
PCIE_GTX_C_CRX_P10
PCIE_GTX_C_CRX_P11
PCIE_GTX_C_CRX_P12
PCIE_GTX_C_CRX_P13
PCIE_GTX_C_CRX_P14
PCIE_GTX_C_CRX_P15
M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25
PCIE_CTX_GRX_N0
PCIE_CTX_GRX_N1
PCIE_CTX_GRX_N2
PCIE_CTX_GRX_N3
PCIE_CTX_GRX_N4
PCIE_CTX_GRX_N5
PCIE_CTX_GRX_N6
PCIE_CTX_GRX_N7
PCIE_CTX_GRX_N8
PCIE_CTX_GRX_N9
PCIE_CTX_GRX_N10
PCIE_CTX_GRX_N11
PCIE_CTX_GRX_N12
PCIE_CTX_GRX_N13
PCIE_CTX_GRX_N14
PCIE_CTX_GRX_N15
C39
C40
C41
C42
C43
C44
C45
C46
C47
C48
C49
C50
C52
C51
C59
C53
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
PCIE_CTX_C_GRX_N0
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_N13
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_N15
M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25
PCIE_CTX_GRX_P0
PCIE_CTX_GRX_P1
PCIE_CTX_GRX_P2
PCIE_CTX_GRX_P3
PCIE_CTX_GRX_P4
PCIE_CTX_GRX_P5
PCIE_CTX_GRX_P6
PCIE_CTX_GRX_P7
PCIE_CTX_GRX_P8
PCIE_CTX_GRX_P9
PCIE_CTX_GRX_P10
PCIE_CTX_GRX_P11
PCIE_CTX_GRX_P12
PCIE_CTX_GRX_P13
PCIE_CTX_GRX_P14
PCIE_CTX_GRX_P15
C60
C72
C73
C74
C76
C75
C78
C77
C62
C61
C67
C66
C69
C68
C71
C70
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_P14
PCIE_CTX_C_GRX_P15
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
PCIE_GTX_C_CRX_N[0..15]
PCIE_GTX_C_CRX_P[0..15]
<13>
<13>
C39
0.22U_0402_10V6K
OPT@
C40
0.22U_0402_10V6K
OPT@
C41
0.22U_0402_10V6K
OPT@
C42
0.22U_0402_10V6K
OPT@
C43
0.22U_0402_10V6K
OPT@
C44
0.22U_0402_10V6K
OPT@
C45
0.22U_0402_10V6K
OPT@
C46
0.22U_0402_10V6K
OPT@
C47
0.22U_0402_10V6K
OPT@
C48
0.22U_0402_10V6K
OPT@
C49
0.22U_0402_10V6K
OPT@
C50
0.22U_0402_10V6K
OPT@
C51
0.22U_0402_10V6K
OPT@
C52
0.22U_0402_10V6K
OPT@
C53
0.22U_0402_10V6K
OPT@
C59
0.22U_0402_10V6K
OPT@
C60
0.22U_0402_10V6K
OPT@
C72
0.22U_0402_10V6K
OPT@
C73
0.22U_0402_10V6K
OPT@
C74
0.22U_0402_10V6K
OPT@
C75
0.22U_0402_10V6K
OPT@
C76
0.22U_0402_10V6K
OPT@
C77
0.22U_0402_10V6K
OPT@
C78
0.22U_0402_10V6K
OPT@
C61
0.22U_0402_10V6K
OPT@
C62
0.22U_0402_10V6K
OPT@
C66
0.22U_0402_10V6K
OPT@
C67
0.22U_0402_10V6K
OPT@
C68
0.22U_0402_10V6K
OPT@
C69
0.22U_0402_10V6K
OPT@
C70
0.22U_0402_10V6K
OPT@
C71
0.22U_0402_10V6K
OPT@
PCIE_CTX_C_GRX_N[0..15]
<13>
PCIE_CTX_C_GRX_P[0..15]
<13>
B
Typ- suggest 220nF. The change in AC capacitor

value from 100nF to 220nF is to enable
compatibility with future platforms having PCIE
Gen3 (8GT/s)
2
1K_0402_5%
2
1K_0402_5%
2
1K_0402_5%
2
1K_0402_5%
2
1K_0402_5%
200910/9
Issued Date
Compal Secret Data
Deciphered Date
2010/01/23
5
Close to CPU
FDI_INT
JCPUA
Title
Sandy Bridge_DMI/PEG/FDI
Custom
Rev
0.1
PHQAA LA-6831P M/B
Date:
Sheet
1
of
58
JCPUC
<11> DDR_A_D[0..63]
JCPUD
<12> DDR_B_D[0..63]
<11> DDR_A_BS0
<11> DDR_A_BS1
<11> DDR_A_BS2
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
AE10
AF10
V6
SA_BS[0]
SA_BS[1]
SA_BS[2]
DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#
<11> DDR_A_CAS#
<11> DDR_A_RAS#
<11> DDR_A_WE#
AE8
AD9
AF9
SA_CLK[0]
SA_CLK#[0]
SA_CKE[0]
AB6
AA6
V9
DDRA_CLK0
DDRA_CLK0#
DDRA_CKE0
SA_CLK[1]
SA_CLK#[1]
SA_CKE[1]
AA5
AB5
V10
DDRA_CLK1
DDRA_CLK1#
DDRA_CKE1
SA_CLK[2]
SA_CLK#[2]
SA_CKE[2]
AB4
AA4
W9
SA_CLK[3]
SA_CLK#[3]
SA_CKE[3]
SA_CS#[0]
SA_CS#[1]
SA_CS#[2]
SA_CS#[3]
SA_ODT[0]
SA_ODT[1]
SA_ODT[2]
SA_ODT[3]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
DDRA_CLK0 <11>
DDRA_CLK0# <11>
DDRA_CKE0 <11>
DDRA_CLK1 <11>
DDRA_CLK1# <11>
DDRA_CKE1 <11>
AB3
AA3
W10
AK3
AL3
AG1
AH1
DDRA_SCS0#
DDRA_SCS1#
AH3
AG3
AG2
AH2
DDRA_ODT0
DDRA_ODT1
DDRA_SCS0# <11>
DDRA_SCS1# <11>
DDRA_ODT0 <11>
DDRA_ODT1 <11>
DDR_A_DQS#[0..7]
DDR_A_DQS#0
C4
G6 DDR_A_DQS#1
DDR_A_DQS#2
J3
M6 DDR_A_DQS#3
AL6 DDR_A_DQS#4
AM8 DDR_A_DQS#5
AR12 DDR_A_DQS#6
AM15 DDR_A_DQS#7
D4
F6
K3
N6
AL5
AM9
AR11
AM14
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
DDR_A_DQS[0..7]
<11>
<11>
DDR_A_MA[0..15] <11>
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
SA_CAS#
SA_RAS#
SA_WE#
<12> DDR_B_BS0
<12> DDR_B_BS1
<12> DDR_B_BS2
<12> DDR_B_CAS#
<12> DDR_B_RAS#
<12> DDR_B_WE#
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
C9
A7
D10
C8
A9
A8
D9
D8
G4
F4
F1
G1
G5
F5
F2
G2
J7
J8
K10
K9
J9
J10
K8
K7
M5
N4
N2
N1
M4
N5
M2
M1
AM5
AM6
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AT5
AT6
AP6
AN8
AR6
AR5
AR9
AJ11
AT8
AT9
AH11
AR8
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15
DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
AA9
AA7
R6
DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#
AA10
AB8
AB9
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
SB_CLK[0]
SB_CLK#[0]
SB_CKE[0]
AE2
AD2
R9
DDRB_CLK0
DDRB_CLK0#
DDRB_CKE0
SB_CLK[1]
SB_CLK#[1]
SB_CKE[1]
AE1
AD1
R10
DDRB_CLK1
DDRB_CLK1#
DDRB_CKE1
SB_CLK[2]
SB_CLK#[2]
SB_CKE[2]
AB2
AA2
T9
SB_CLK[3]
SB_CLK#[3]
SB_CKE[3]
SB_CS#[0]
SB_CS#[1]
SB_CS#[2]
SB_CS#[3]
DDR SYSTEM MEMORY B
C5
D5
D3
D2
D6
C6
C2
C3
F10
F8
G10
G9
F9
F7
G8
G7
K4
K5
K1
J1
J5
J4
J2
K2
M8
N10
N8
N7
M10
M9
N9
M7
AG6
AG5
AK6
AK5
AH5
AH6
AJ5
AJ6
AJ8
AK8
AJ9
AK9
AH8
AH9
AL9
AL8
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15
DDR SYSTEM MEMORY A
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
SB_ODT[0]
SB_ODT[1]
SB_ODT[2]
SB_ODT[3]
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#
AD3
AE3
AD6
AE6
DDRB_SCS0#
DDRB_SCS1#
AE4
AD4
AD5
AE5
DDRB_ODT0
DDRB_ODT1
D7
F3
K6
N3
AN5
AP9
AK12
AP15
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
C7
G3
J6
M3
AN6
AP8
AK11
AP14
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
DDRB_CLK1 <12>
DDRB_CLK1# <12>
DDRB_CKE1 <12>
AA1
AB1
T10
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
DDRB_CLK0 <12>
DDRB_CLK0# <12>
DDRB_CKE0 <12>
DDRB_SCS0# <12>
DDRB_SCS1# <12>
DDRB_ODT0 <12>
DDRB_ODT1 <12>
DDR_B_DQS#[0..7]
DDR_B_DQS[0..7]
<12>
<12>
DDR_B_MA[0..15] <12>
H_DRAMRST#
2
R467
1K_0402_5%
2
SM_DRAMRST# <11,12>
BSS138_NL_SOT23-3
2
R464
4.99K_0402_1%
R465
1K_0402_5%
Q14
DDR3_DRAMRST#_R
1
<5> H_DRAMRST#
+1.5V
R466
0_0402_5%
1
2
@
<29> DRAMRST_CNTRL_PCH
1
R463
2 DRAMRST_CNTRL
0_0402_5%
1
Compal Secret Data
C140
0.047U_0402_25V6K
200910/9
Issued Date
Deciphered Date
2010/01/23
Title
Sandy Bridge_DDR3
2
5

Custom
Rev
0.1
PHQAA LA-6831P M/B
Date:
Sheet
1
of
58
+CPU_CORE
POWER
JCPUF
94A (Quad Core 45W)

53A (SV 35W)
+1.05VS_VCCP
PEG AND DDR
VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39
AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12
E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
22U_0805_6.3V6M
1
C146
C144
22U_0805_6.3V6M
1
C143
C141
22U_0805_6.3V6M
1
C137
C136
22U_0805_6.3V6M
1
C135
C134
22U_0805_6.3V6M
1
C133
C142
C147
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1
1
C145
C163
@
22U_0805_6.3V6M
1
1
C153
C160
@
@
22U_0805_6.3V6M
1
1
C152
C139
@
@
22U_0805_6.3V6M
22U_0805_6.3V6M
1
1
1
C138
C132
@
@
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
+CPU_CORE Decoupling:
4X 470U (4m ohm), 16X 22U, 10X 10U
22U_0805_6.3V6M
Bottom Socket Cavity

+CPU_CORE
22U_0805_6.3V6M
10U_0805_10V6K
1
C101
C102
10U_0805_10V6K
C103
C104
10U_0805_10V6K
C105
C106
C107
10U_0805_10V6K
1
C108
10U_0805_10V6K
1
C109
C110
C111
330U_D2_2V_Y
ESR 9mohm
Bottom Socket Cavity x 5
C10 +
C11 +
C12 +
330U_D2_2V_Y
10U_0805_10V6K
10U_0805_10V6K
10U_0805_10V6K
10U_0805_10V6K
10U_0805_10V6K
10U_0805_10V6K
330U_D2_2V_Y
C
Top Socket Edge

+CPU_CORE
J23
22U_0805_6.3V6M
1
C151
+1.05VS_VCCP
+1.05VS_VCCP
1
R70
130_0402_5%
C130
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C129
C124
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C123
22U_0805_6.3V6M
C122
22U_0805_6.3V6M
C121
C131
@
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C126
@
22U_0805_6.3V6M
C125
@
22U_0805_6.3V6M
R68
75_0402_5%
AJ29
AJ30
AJ28
H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT
SVID
Top Socket Cavity

VIDALERT#
VIDSCLK
VIDSOUT
1
R67 1
R63 1
R66
2
2 43_0402_1%
2 0_0402_5%
0_0402_5%
VR_SVID_ALRT# <55>
VR_SVID_CLK <55>
VR_SVID_DAT <55>
+CPU_CORE
B
22U_0805_6.3V6M
Pull high resistor on VR side

C158
C150
C128
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C127
C120
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C118
2
22U_0805_6.3V6M
22U_0805_6.3V6M
C119
C117
22U_0805_6.3V6M
+CPU_CORE
Co-Lay with C2, C5, C7, C9

+CPU_CORE
AJ35 VCCSENSE_R
AJ34 VSSSENSE_R
R65 1
R52 1
+CPU_CORE
330U_D2_2VM_R6M
2 0_0402_5%
2 0_0402_5%
VCCSENSE <55>
VSSSENSE <55>
1
+
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VCCIO_SENSE
R62
100_0402_1%
<54>
2 3
2
R105
100_0402_1%
@
330U_D2_2V_Y
1
+
C890
@
C2
C891
330U_D2_2V_Y
2 3
330U_D2_2VM_R6M
C5
@
C7
+
2
C9
+
2
330U_D2_2V_Y
A
200910/9
Issued Date
Compal Secret Data
330U_D2_2V_Y
+1.05VS_VCCP
Close to CPU
R102
0_0402_5%
VSS_SENSE_VCCIO
B10
A10
VCCIO_SENSE
VSSIO_SENSE
Bottom Socket Edge
Close to CPU
R64
100_0402_1%
VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24
C159
SENSE LINES
TOP Socket Cavity x 7
VCCIO40
CORE SUPPLY
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100
+1.05VS_VCCP Decoupling:
2X 330U (6m ohm), 12X 22U
8.5A
AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26
2010/01/23
Deciphered Date
Title
Sandy Bridge_POWER-1
Size
Document Number
Custom
Rev
0.1
PHQAA LA-6831P M/B
Date:
Sheet
1
of
58
+GFX_CORE
+GFX_CORE
Bottom Socket Edge
C873 +
330U_2.5V_M_R17
OPT@
2
Co-lay for Cost Down Plan
POWER
R74
100_0402_1%
UMA@
R251
0_0402_5%
UMA@
R75
100_0402_1%
UMA@
+GFX_CORE
R74
Close
100_0402_1%
OPT@
to CPU
OPT@
C342
OPT@
22U_0805_6.3V6M
22U_0805_6.3V6M
Bottom Socket Edge

1
C344
OPT@
Top Socket
Cavity
22U_0805_6.3V6M
C345
OPT@
C346
OPT@
22U_0805_6.3V6M
22U_0805_6.3V6M
C347
OPT@
C348
OPT@
22U_0805_6.3V6M
22U_0805_6.3V6M
Top Socket Edge
22U_0805_6.3V6M
C349
@
22U_0805_6.3V6M
C350
@
C351
@
C391
@
22U_0805_6.3V6M
+1.8VS
22U_0805_6.3V6M
VCCPLL Decoupling:
1X 330U (6m ohm), 1X 10U, 2x1U
R76
2
1
0_0805_5%
1.2A
+1.8VS_VCCPLL
10U_0805_10V6K
1
C185
@+
C186
2
330U_B2_2.5VM_R15M
C206
1U_0402_6.3V6K
B6
A6
A2
VCCPLL1
VCCPLL2
VCCPLL3
C230
1U_0402_6.3V6K
5A
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
C148
@
AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1
1
2
1
2
+V_SM_VREF_CNT
R486
+V_SM_VREF
1
1
Q2
@
AP2302GN-HF_SOT23-3
AL1
SM_VREF
R122
100_0402_1%
R252
100_0402_1%
+1.5V_CPU Decoupling:
1X 330U (6m ohm), 6X 10U
C341
R111
0_0402_5%
2
1
RUN_ON_CPU1.5VS3
+1.5V_CPU
+1.5V_CPU
10U_0805_10V6K
10U_0805_10V6K
10U_0805_10V6K
1 ESR 6mohm
C114
C115
C116
C149
C154
C155
ESR 17mohm
1
C180
@
330U_D2_2VM_R6M
C875
330U_2.5V_M_R17
2
10U_0805_10V6K
10U_0805_10V6K
10U_0805_10V6K
+VCCSA Decoupling:
1X 330U (6m ohm), 3X 10U
+VCCSA
Bottom Socket Cavity
6A
VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8
M27
M26
L26
J26
J25
J24
H26
H25
10U_0805_10V6K
VCCSA_VID0

+VCCSA
10U_0805_10V6K
VCCSA_VID1
0
0.90 V
0.80 V
0.75 V
0.65 V
C100
C447
C476
C477
2
2
10U_0805_10V6K
2 VCCSA_SENSE
0_0402_5%
1
1 R253
1
+
C485
@
330U_D2_2VM_R6M
C877 2
330U_2.5V_M_R17
10U_0805_10V6K
Bottom Socket Edge

VCCSA_SENSE
VCCSA_VID0
FC_C22
VCCSA_VID1
H23 VCCSA_SENSE
VCCSA_SENSE <53>
1 R95
0_0402_5% @
C22 VCCSA_VID0
C24
VCCSAP_VID1 <53>
R114
R119
10K_0402_5%
+1.5V_CPU
+1.5V
Follow CRB 1.0.
C345
22U_0805_6.3V6M
UMA@
C873
330U_2.5V_M_R17
UMA@
C212 1
2 0.1U_0402_16V4Z
C211 1
2 0.1U_0402_16V4Z
C210 1
2 0.1U_0402_16V4Z
R449
470_0805_5%
C179
10U_0805_10V4K
C346
22U_0805_6.3V6M
UMA@
SUSP
2N7002DW-T/R7_SOT363-6
C266
22U_0805_6.3V6M
UMA@
C341
22U_0805_6.3V6M
UMA@
C342
22U_0805_6.3V6M
UMA@
D
D
D
D
8
7
6
5
Issued Date
200910/9
2010/01/23
Deciphered Date
4
R455
1
2
220K_0402_5%
+VSB
R420
820K_0402_5%
Q46A
SUSP
SUSP <5,47,54>
2N7002DW-T/R7_SOT363-6
Compal Secret Data
S
S
S
G
C472
0.1U_0402_25V6
5
4
C344
22U_0805_6.3V6M
UMA@
FDS6676AS_SO8
RUN_ON_CPU1.5VS3
Q46B
C348
22U_0805_6.3V6M
UMA@
C343
22U_0805_6.3V6M
UMA@
Q33
1
2
3
4
C347
22U_0805_6.3V6M
UMA@
2 0.1U_0402_16V4Z
3 1
C271
22U_0805_6.3V6M
UMA@
JUMP_43X118
C213 1
C338
22U_0805_6.3V6M
UMA@
+1.5V
PJ30
+1.5V_CPU
C267
22U_0805_6.3V6M
UMA@
For Sandy Bridge
ESR 17mohm
10K_0402_5%
C112
330U_D2_2VM_R6M
@
+VCCSA
OPT@
22U_0805_6.3V6M
R75
100_0402_1%
OPT@
OPT@
C338
22U_0805_6.3V6M
22U_0805_6.3V6M
C343
OPT@
C271
VCC_AXG_SENSE <55>
VSS_AXG_SENSE <55>
2 0_0402_5%
2 0_0402_5%
+V_SM_VREF should
have 20 mil trace width
0.1U_0402_16V4Z
OPT@
Bottom Socket
Cavity
22U_0805_6.3V6M
C267
R121 1 OPT@
R251 1 OPT@
+1.5V_CPU
100K_0402_5%
OPT@
VCC_AXG_SENSE_R
VSS_AXG_SENSE_R
AK35
AK34
C266
33A
VAXG_SENSE
VSSAXG_SENSE
22U_0805_6.3V6M
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54
VREF
330U_D2_2VM_R6M
AT24
AT23
AT21
AT20
AT18
AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18
AN17
AM24
AM23
AM21
AM20
AM18
AM17
AL24
AL23
AL21
AL20
AL18
AL17
AK24
AK23
AK21
AK20
AK18
AK17
AJ24
AJ23
AJ21
AJ20
AJ18
AJ17
AH24
AH23
AH21
AH20
AH18
AH17
DDR3 -1.5V RAILS
ESR 6mohm
SA RAIL
MISC
R71
0_0402_5%
DIS@
C113
GRAPHICS
C112 +
1.8V RAIL
330U_D2_2VM_R6M
1
SENSE
LINES
JCPUG
R121
0_0402_5%
UMA@
ESR 17mohm
+GFX_CORE Decoupling:
2X 470U (4m ohm), 12X 22U
Title
Sandy Bridge_POWER-2
Custom
Rev
0.1
PHQAA LA-6831P M/B
Date:
Sheet
1
of
58
<5>
<5>
<5>
<5>
CFG12
CFG13
CFG14
CFG15
T26 PAD
T27 PAD
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
RSVD33
RSVD34
RSVD35
CFG2
AK28
AK29
AL26
AL27
AK26
AL29
AL30
AM31
AM32
AM30
AM28
AM26
AN28
AN31
AN26
AM27
AK31
AN29
R254
1K_0402_1%
@
AT26
AM33
AJ27
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
<5> CFG0
T5 PAD
T6 PAD
T7 PAD
T11 PAD
T12 PAD
T15 PAD
T18 PAD
T16 PAD
T19 PAD
T21 PAD
T20 PAD
PEG Static Lane Reversal - CFG2 is for the 16x

RSVD37
RSVD38
RSVD39
RSVD40
T8
J16
H16
G16
CFG2
1: Normal Operation; Lane #

socket pin map definition
definition matches
0:Lane Reversed
RSVD5
SA_DIMM_VREFDQ
CPU_RSVD6
CPU_RSVD7
B4
D1
RSVD6
RSVD7
SB_DIMM_VREFDQ
R115
1K_0402_1%
R116
1K_0402_1%
F25
F24
F23
D24
G25
G24
E23
D23
C30
A31
B30
B29
D30
B31
A30
C29
J20
B18
A19
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
VCCIO_SEL
J15
CFG4
R255
1K_0402_1%
@
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53
B34
A33
A34
B35
C35
Embedded Display Port Presence Strap
AJ32
AK32
CFG4
AH27
1 : Disabled; No Physical Display Port

attached to Embedded Display Port
0 : Enabled; An external Display Port device is

connected to the Embedded Display Port
T28 PAD
CFG6
RSVD54
RSVD55
AN35
AM35
CLK_RES_ITP <29>
CLK_RES_ITP# <29>
CFG5
AJ26
RSVD1
RSVD2
RSVD3
RSVD4
AR35
AT34
AT33
AP35
AR34
AJ31
AH31
AJ33
AH33
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45
R257
1K_0402_1%
@
RSVD56
RSVD57
RSVD58
AT2
AT1
AR1
R256
1K_0402_1%
@
PAD
PAD
PAD
PAD
T22
T24
T25
T23
F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3
VSS
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
(CFG[17:0] internal pull high to VCCIO)

L7
AG7
AE7
AK2
W8
RSVD27
KEY
B1
PCIE Port Bifurcation Straps
11: (Default) x16 - Device 1 functions 1 and 2 disabled
*10: x8, x8 - Device 1 function 1 enabled ; function 2
CFG[6:5]
disabled
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
CFG7
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
P9
P8
P6
P5
P3
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
M34
L33
L30
L27
L9
L8
L6
L5
L4
L3
L2
L1
K35
K32
K29
K26
J34
J31
H33
H30
H27
H24
H21
H18
H15
H13
H10
H9
H8
H7
H6
H5
H4
H3
H2
H1
G35
G32
G29
G26
G23
G20
G17
G11
F34
F31
F29
VSS
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
CFG Straps for Processor
JCPUE
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
JCPUI
AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH26
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2
JCPUH
AT35
AT32
AT29
AT27
AT25
AT22
AT19
AT16
AT13
AT10
AT7
AT4
AT3
AR25
AR22
AR19
AR16
AR13
AR10
AR7
AR4
AR2
AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10
AP7
AP4
AP1
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10
AN7
AN4
AM29
AM25
AM22
AM19
AM16
AM13
AM10
AM7
AM4
AM3
AM2
AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10
AL7
AL4
AL2
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10
AK7
AK4
AJ25
RESERVED
R258
1K_0402_1%
@
PEG DEFER TRAINING
CFG7
1: (Default) PEG Train immediately following xxRESETB

de assertion
0: PEG Wait for BIOS for training
Issued Date
Compal Secret Data
200910/9
2010/01/23
Deciphered Date
5
Title
Sandy Bridge_GND/RSVD/CFG
Size
Document Number
Custom
Rev
0.1
PHQAA LA-6831P M/B
Date:
Sheet

1
10
of
58
+1.5V
JDDRL
Close to JDDRL.1
DDR_A_D10
DDR_A_D11
DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDRA_CKE0
<7> DDRA_CKE0
C
DDR_A_BS2
<7> DDR_A_BS2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
DDRA_CLK0
DDRA_CLK0#
<7> DDRA_CLK0
<7> DDRA_CLK0#
DDR_A_MA10
DDR_A_BS0
<7> DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
<7> DDR_A_WE#
<7> DDR_A_CAS#
DDR_A_MA13
DDRA_SCS1#
<7> DDRA_SCS1#
DDR_A_D32
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
C181
1
C182
+0.75VS
R91
10K_0402_5%
+3VS
2.2U_0603_6.3V4Z
0.1U_0402_16V4Z
DDR_A_D58
DDR_A_D59
R90 1
2
10K_0402_5%
205
207
GND1
GND2
CKE1
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
S0#
ODT0
VDD
ODT1
NC
VDD
VREF_CA
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
EVENT#
SDA
SCL
VTT
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
BOSS1
BOSS2
206
208
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D[0..63]
DDR_A_MA[0..15]
DDR_A_D6
DDR_A_D7
<7>
<7>
<7>
DDR_A_D12
DDR_A_D13
SM_DRAMRST#
SM_DRAMRST# <7,12>
+1.5V
DDR_A_D14
DDR_A_D15
DDR_A_D20
DDR_A_D21
R79
1K_0402_1%
2
0_0402_5%
+VREF_DQA
DDR_A_D22
DDR_A_D23
1
R92
+VREF_DQA_DIMMA
R81
1K_0402_1%
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
DDRA_CKE1
DDRA_CKE1
<7>
DDR_A_MA15
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
DDRA_CLK1
DDRA_CLK1#
DDR_A_BS1
DDR_A_RAS#
DDRA_SCS0#
DDRA_ODT0
DDRA_ODT1
DDRA_CLK1 <7>
DDRA_CLK1# <7>
+1.5V
DDR_A_BS1 <7>
DDR_A_RAS# <7>
DDRA_SCS0# <7>
DDRA_ODT0 <7>
DDRA_ODT1
R80
1K_0402_1%
<7>
R89
1
0_0402_5%
+VREF_CAA
+VREF_CAA_DIMMA
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
R82
1K_0402_1%
C161
C162
0.1U_0402_16V4Z
DDR_A_D40
DDR_A_D41
CKE0
VDD
NC
BA2
VDD
A12/BC#
A9
VDD
A8
A5
VDD
A3
A1
VDD
CK0
CK0#
VDD
A10/AP
BA0
VDD
W E#
CAS#
VDD
A13
S1#
VDD
TEST
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SA0
VDDSPD
SA1
VTT
<7>
DDR_A_DQS#[0..7]
2.2U_0603_6.3V4Z
DDR_A_D34
DDR_A_D35
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
DDR_A_DQS[0..7]
DDR_A_DQS#1
DDR_A_DQS1
DDR3 SO-DIMM A
Reverse Type
DDR_A_D8
DDR_A_D9
DDR_A_D4
DDR_A_D5
DDR_A_D2
DDR_A_D3
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
RESET#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
Layout Note:
Place near JDDRL
close to JDDRL.126
+1.5V
DDR_A_D52
DDR_A_D53
Layout Note: Place these 4 Caps near

Command and Control signals of DIMMA
Layout Note:
Place near JDDRL1.203 and 204
Change C218 to OSCON at DVT

+1.5V
C218 1
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
2.2U_0603_6.3V4Z
0.1U_0402_16V4Z
C157
DDR_A_D0
DDR_A_D1
VREF_DQ
VSS
DQ0
DQ1
VSS
DM0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
VSS
DQ26
DQ27
VSS
C156
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
+VREF_DQA
+1.5V
+0.75VS
2 390U_2.5V_M_R10
C166 1
2 10U_0805_6.3V6M
C168 1
2 10U_0805_6.3V6M
C171 1
2 10U_0805_6.3V6M
C174 1
2 10U_0805_6.3V6M
C176 1
2 10U_0805_6.3V6M
C178 1
2 10U_0805_6.3V6M
C164 1
2 0.1U_0402_16V4Z
C167 1
2 0.1U_0402_16V4Z
C170 1
2 0.1U_0402_16V4Z
C173 1
2 0.1U_0402_16V4Z
C165 1
2 10U_0805_6.3V6M
C169 2
1 1U_0402_6.3V4Z
C172 2
1 1U_0402_6.3V4Z
C175 2
1 1U_0402_6.3V4Z
C177 2
1 1U_0402_6.3V4Z
PM_SMBDATA
PM_SMBCLK
PM_SMBDATA <12,29,39>
PM_SMBCLK <12,29,39>
+0.75VS
Compal Secret Data
200910/9
Issued Date
FOX_AS0A626-U2SN-7F_204P
@
Deciphered Date
2010/01/23
4
Title
DDRIII-SODIMM0
Custom
Rev
0.1
PHQAA LA-6831P M/B
Date:
Sheet
1
11
of
58
+1.5V
+1.5V
JDDRH
DDR_B_D10
DDR_B_D11
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDRB_CKE0
<7> DDRB_CKE0
2
DDR_B_BS2
<7> DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
DDRB_CLK0
DDRB_CLK0#
<7> DDRB_CLK0
<7> DDRB_CLK0#
DDR_B_MA10
DDR_B_BS0
<7> DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
<7> DDR_B_WE#
<7> DDR_B_CAS#
DDR_B_MA13
DDRB_SCS1#
<7> DDRB_SCS1#
DDR_B_D37
DDR_B_D36
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
R98 1
2
10K_0402_5%
+3VS
2.2U_0603_6.3V4Z
1
C207
@ 2
1 R99
2
10K_0402_5%
C208
2 @
0.1U_0402_16V4Z
+0.75VS
205
207
GND1
GND2
CKE1
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
S0#
ODT0
VDD
ODT1
NC
VDD
VREF_CA
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
EVENT#
SDA
SCL
VTT
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
BOSS1
BOSS2
206
208
SM_DRAMRST#
<7>
<7>
<7>
DDR_B_MA[0..15]
<7>
SM_DRAMRST# <7,11>
DDR_B_D14
DDR_B_D15
+1.5V
DDR_B_D20
DDR_B_D21
R83
1K_0402_1%
DDR_B_D22
DDR_B_D23
DDR_B_D28
DDR_B_D29
+VREF_DQB
2
0_0402_5%
+VREF_DQB_DIMMB
1
R93
DDR_B_DQS#3
DDR_B_DQS3
R84
1K_0402_1%
DDR_B_D30
DDR_B_D31
DDRB_CKE1
DDRB_CKE1
<7>
DDR_B_MA15
DDR_B_MA14
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
DDRB_CLK1
DDRB_CLK1#
DDR_B_BS1
DDR_B_RAS#
DDRB_SCS0#
DDRB_ODT0
DDRB_ODT1
DDRB_CLK1 <7>
DDRB_CLK1# <7>
+1.5V
DDR_B_BS1 <7>
DDR_B_RAS# <7>
DDRB_SCS0# <7>
DDRB_ODT0 <7>
R86
1K_0402_1%
DDRB_ODT1 <7>
R97
1
2
0_0402_5%
+VREF_CAB
+VREF_CAB_DIMMB
DDR_B_D32
DDR_B_D33
R94
1K_0402_1%
C187
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
C188
1
3
Layout Note:
Place near JDDRH
Close to JDDRH.126
DDR_B_D52
DDR_B_D53
Layout Note: Place these 4 Caps near

Command and Control signals of DIMMB
Layout Note:
Place near JDDRH.203 and 204
+1.5V
+1.5V
@
C189 1
DDR_B_D50
DDR_B_D51
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
+0.75VS
2 330U_B2_2.5VM_R15M
C192 1
2 10U_0805_6.3V6M
C194 1
2 10U_0805_6.3V6M
C197 1
2 10U_0805_6.3V6M
C200 1
2 10U_0805_6.3V6M
C202 1
2 10U_0805_6.3V6M
C204 1
2 10U_0805_6.3V6M
C190 1
2 0.1U_0402_16V4Z
C193 1
2 0.1U_0402_16V4Z
C196 1
2 0.1U_0402_16V4Z
C199 1
2 0.1U_0402_16V4Z
C191 1
2 10U_0805_6.3V6M
C195 2
1 1U_0402_6.3V4Z
C198 2
1 1U_0402_6.3V4Z
C201 2
1 1U_0402_6.3V4Z
C203 2
1 1U_0402_6.3V4Z
4
PM_SMBDATA
PM_SMBCLK
+0.75VS
Compal Secret Data
200910/9
Issued Date
FOX_AS0A626-UASN-7F_204P
@
DDR_B_D[0..63]
0.1U_0402_16V4Z
DDR_B_D40
DDR_B_D41
CKE0
VDD
NC
BA2
VDD
A12/BC#
A9
VDD
A8
A5
VDD
A3
A1
VDD
CK0
CK0#
VDD
A10/AP
BA0
VDD
W E#
CAS#
VDD
A13
S1#
VDD
TEST
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SA0
VDDSPD
SA1
VTT
DDR_B_D12
DDR_B_D13
2.2U_0603_6.3V4Z
DDR_B_D34
DDR_B_D35
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
DDR_B_DQS[0..7]
Close to JDDRH.1
DDR_B_DQS#[0..7]
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D2
DDR_B_D3
Reverse Type
DDR3 SO-DIMM B
DDR_B_D4
DDR_B_D5
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
C184
0.1U_0402_16V4Z
2.2U_0603_6.3V4Z
VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
RESET#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
C183
VREF_DQ
VSS
DQ0
DQ1
VSS
DM0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
VSS
DQ26
DQ27
VSS
DDR_B_D0
DDR_B_D1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
+VREF_DQB
Deciphered Date
2010/01/23
B
Title
DDRIII-SODIMM1
Custom
Rev
0.1
PHQAA LA-6831P M/B
Date:
Sheet
E
12
of
58
0.1U_0402_16V4Z
N12PGS@
CV9
N12PGS@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
N12PGS@
LV13
+1.05VS_DGPU
1
2
BLM18PG330SN1D_0603
N12MGE@
1
1
CV224
CV222
2
1U_0402_6.3V4Z
N12MGE@
45mA
N12MGE@
4.7U_0603_6.3V6K
CV223
1
+SP_PLLVDD
1U_0402_6.3V4Z
N12MGE@
Lane Reversal
LV2
BLM18PG330SN1D_0603
N12PGE@
CV85
10U_0603_6.3V6M
N12PGE@
CV8
0.1U_0402_16V4Z
N12PGE@
CV9
0.1U_0402_16V4Z
N12PGE@
CV7
22U_0805_6.3V6M
N12PGE@
CV12
0.1U_0402_16V4Z
N12PGE@
PCIE_GTX_C_CRX_P15
PCIE_GTX_C_CRX_N15
PCIE_GTX_C_CRX_P14
PCIE_GTX_C_CRX_N14
PCIE_GTX_C_CRX_P13
PCIE_GTX_C_CRX_N13
PCIE_GTX_C_CRX_P12
PCIE_GTX_C_CRX_N12
PCIE_GTX_C_CRX_P11
PCIE_GTX_C_CRX_N11
PCIE_GTX_C_CRX_P10
PCIE_GTX_C_CRX_N10
PCIE_GTX_C_CRX_P9
PCIE_GTX_C_CRX_N9
PCIE_GTX_C_CRX_P8
PCIE_GTX_C_CRX_N8
PCIE_GTX_C_CRX_P7
PCIE_GTX_C_CRX_N7
PCIE_GTX_C_CRX_P6
PCIE_GTX_C_CRX_N6
PCIE_GTX_C_CRX_P5
PCIE_GTX_C_CRX_N5
PCIE_GTX_C_CRX_P4
PCIE_GTX_C_CRX_N4
PCIE_GTX_C_CRX_P3
PCIE_GTX_C_CRX_N3
PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_N2
PCIE_GTX_C_CRX_P1
PCIE_GTX_C_CRX_N1
PCIE_GTX_C_CRX_P0
PCIE_GTX_C_CRX_N0
CV11
0.1U_0402_16V4Z
N12PGE@
CV5
0.22U_0402_10V6K
OPT@
CV13
0.22U_0402_10V6K
OPT@
CV15
0.22U_0402_10V6K
OPT@
CV17
0.22U_0402_10V6K
OPT@
CV19
0.22U_0402_10V6K
OPT@
CV21
0.22U_0402_10V6K
OPT@
CV23
0.22U_0402_10V6K
OPT@
CV25
0.22U_0402_10V6K
OPT@
CV27
0.22U_0402_10V6K
OPT@
CV37
0.22U_0402_10V6K
OPT@
CV39
0.22U_0402_10V6K
OPT@
CV41
0.22U_0402_10V6K
OPT@
CV29
0.22U_0402_10V6K
OPT@
CV31
0.22U_0402_10V6K
OPT@
CV33
0.22U_0402_10V6K
OPT@
CV35
0.22U_0402_10V6K
OPT@
CV6
0.22U_0402_10V6K
OPT@
CV14
0.22U_0402_10V6K
OPT@
CV16
0.22U_0402_10V6K
OPT@
CV18
0.22U_0402_10V6K
OPT@
CV20
0.22U_0402_10V6K
OPT@
CV22
0.22U_0402_10V6K
OPT@
CV24
0.22U_0402_10V6K
OPT@
CV26
0.22U_0402_10V6K
OPT@
CV28
0.22U_0402_10V6K
OPT@
CV38
0.22U_0402_10V6K
OPT@
CV40
0.22U_0402_10V6K
OPT@
CV42
0.22U_0402_10V6K
OPT@
CV30
0.22U_0402_10V6K
OPT@
CV32
0.22U_0402_10V6K
OPT@
CV34
0.22U_0402_10V6K
OPT@
CV36
0.22U_0402_10V6K
OPT@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
CV5
CV6
CV13
CV14
CV15
CV16
CV17
CV18
CV19
CV20
CV21
CV22
CV24
CV23
CV26
CV25
CV27
CV28
CV37
CV38
CV40
CV39
CV42
CV41
CV29
CV30
CV31
CV32
CV34
CV33
CV36
CV35
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
PCIE_GTX_CRX_P15
PCIE_GTX_CRX_N15
PCIE_GTX_CRX_P14
PCIE_GTX_CRX_N14
PCIE_GTX_CRX_P13
PCIE_GTX_CRX_N13
PCIE_GTX_CRX_P12
PCIE_GTX_CRX_N12
PCIE_GTX_CRX_P11
PCIE_GTX_CRX_N11
PCIE_GTX_CRX_P10
PCIE_GTX_CRX_N10
PCIE_GTX_CRX_P9
PCIE_GTX_CRX_N9
PCIE_GTX_CRX_P8
PCIE_GTX_CRX_N8
PCIE_GTX_CRX_P7
PCIE_GTX_CRX_N7
PCIE_GTX_CRX_P6
PCIE_GTX_CRX_N6
PCIE_GTX_CRX_P5
PCIE_GTX_CRX_N5
PCIE_GTX_CRX_P4
PCIE_GTX_CRX_N4
PCIE_GTX_CRX_P3
PCIE_GTX_CRX_N3
PCIE_GTX_CRX_P2
PCIE_GTX_CRX_N2
PCIE_GTX_CRX_P1
PCIE_GTX_CRX_N1
PCIE_GTX_CRX_P0
PCIE_GTX_CRX_N0
AL17
AM17
AM18
AM19
AL19
AK19
AL20
AM20
AM21
AM22
AL22
AK22
AL23
AM23
AM24
AM25
AL25
AK25
AL26
AM26
AM27
AM28
AL28
AK28
AK29
AL29
AM29
AM30
AM31
AM32
AN32
AP32
CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_REQ_GPU#
AR16
AR17
AR13
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#
AJ17
AJ18
<29> CLK_PCIE_VGA
<29> CLK_PCIE_VGA#
@
1
2
RV16
200_0402_1%
Differential signal
PLTRST_VGA_R#
1 DIS@
2
RV18
0_0402_5%
1 DIS@
2
RV19
2.49K_0402_1%
<32> PLTRST_VGA#
RV30
0_0402_5%
N12PGE@
60mA
+PLLVDD
RV18
0_0402_5%
OPT@
RV19
2.49K_0402_1%
OPT@
RV26
10K_0402_5%
OPT@
RV25
10K_0402_5%
OPT@
RV26 2 DIS@
CRT
+3VS_DGPU
XTALIN
XTAL_OUT
B1
B2
1 10K_0402_5% XTALOUT
2 DIS@
1 XTALSSIN
RV25
10K_0402_5%
D1
D2
<14> SMB_CLK_GPU
<14> SMB_DATA_GPU
<25> VGA_EDID_CLK
<25> VGA_EDID_DATA
VGA_EDID_CLK
E3
VGA_EDID_DATA E4
<26> VGA_CRT_CLK
<26> VGA_CRT_DATA
1
RV28
MIOB_HSYNC_NC
MIOB_VSYNC_NC
MIOA_DE_NC
MIOA_CTL3_NC
MIOA_VREF_NC
MIOB_DE_NC
MIOB_CTL3_NC
MIOB_VREF_NC
PEX_REFCLK
PEX_REFCLK_N
PEX_CLKREQ_N
MIOA_CLKIN_NC
MIOA_CLKOUT_NC
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT_N
MIOB_CLKIN_NC
MIOB_CLKOUT_NC
PEX_RST_N
PEX_TERMP
MIOA_CLKOUT_NC_N
MIOB_CLKOUT_NC_N
MIOACAL_PD_VDDQ_NC
MIOACAL_PU_GND_NC
PLLVDD
SP_PLLVDD
MIOBCAL_PD_VDDQ_NC
MIOBCAL_PU_GND_NC
VID_PLLVDD
XTAL_IN
XTAL_OUT
G3
G2
DACA_RED
DACA_GREEN
DACA_BLUE
VGA_CRT_CLK
VGA_CRT_DATA
G1
G4
F6
G6
I2CS_SCL
I2CS_SDA
DACA_VDD
DACA_VREF
DACA_RSET
I2CB_SCL
I2CB_SDA
I2CA_SCL
I2CA_SDA
DACB_RED
DACB_GREEN
DACB_BLUE
DACB_HSYNC
DACB_VSYNC
DACB_VDD
DACB_VREF
DACB_RSET
I2CH_SCL
I2CH_SDA
THERM#_VGA
PCIE_CTX_C_GRX_N[0..15]
<6> PCIE_CTX_C_GRX_N[0..15]
ACIN_VGA
VGA_ENVDD
HDMI_HPD_VGA
VGA_ENBKL
RV125
EDP@
0_0402_5%
2
1
EDP_HPD_R
VGA_BL_PWM
EDP_HPD
HPD_C
<25>
HPD_F
EDP_HPD_R
HPD_F
TV6
HDMI_HPD
RV4
100K_0402_5%
OPT@
RV5
100K_0402_5%
OPT@
RV29
100K_0402_5%
OPT@
HDMI_HPD_VGA
2
RV6
2.2K_0402_5%
1 DIS@
2
RV7
2.2K_0402_5%
RV10
100K_0402_5%
OPT@
RV6
2.2K_0402_5%
OPT@
RV7
2.2K_0402_5%
OPT@
RV8
2.2K_0402_5%
OPT@
RV9
2.2K_0402_5%
OPT@
RV11
2.2K_0402_5%
OPT@
RV12
2.2K_0402_5%
OPT@
RV13
2.2K_0402_5%
OPT@
HDCP_SDA
RV14
2.2K_0402_5%
OPT@
RV121
2.2K_0402_5%
OPT@
VGA_CRT_DATA
SMB_CLK_GPU
RV9
ACIN_VGA
THERM#_VGA
HDCP_SCL
RV32
10K_0402_5%
OPT@
1 DIS@
2
RV121
2.2K_0402_5%
1 DIS@
2
RV122
2.2K_0402_5%
I2CB_SDA
RV17
10K_0402_5%
OPT@
Y5
W3
AF1
RV15
10K_0402_5%
OPT@
VGA_CRT_R
VGA_CRT_G
N4
R4
1 DIS@
2
RV15
10K_0402_5%
AE1
V4
1 DIS@
2
RV17
10K_0402_5%
VGA_CRT_B
Close to GPU
120mA
T4
W4
0.1U_0402_16V4Z
+DACA_VDD
U5
T5
CV73
0.1U_0402_16V4Z
DIS@
AA7
AA6
1
CV72
DIS@
AM15
AM14
AL14
VGA_CRT_R
VGA_CRT_G
VGA_CRT_B
AM13
AL13
VGA_CRT_HSYNC
VGA_CRT_VSYNC
AJ12
AK12
AK13
+DACA_VDD
+DACA_VREF
DACA_RSET
1U_0402_6.3V4Z
1
CV48
DIS@
1
CV80
DIS@
CV81
DIS@
1 DIS@
2
RV20
150_0402_1%
1 DIS@
2
RV21
150_0402_1%
1 DIS@
2
RV23
150_0402_1%
LV3
1
2
+3VS_DGPU
MMZ1608D301BT_0603
DIS@
1
1
CV50
CV49
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
DIS@
DIS@
2
2
RV27
124_0402_1%
DIS@
LV3
MMZ1608D301BT_0603
OPT@
<26>
<26>
07/10/2010
HDMI HPD for OPT DGPU output
C879
@
0.1U_0402_16V4Z
1
2
+3VS
CV47
0.1U_0402_16V4Z
DIS@
AG7 +DACB_VDD 2
1
RV31
10K_0402_5%
AK6
AH7
DIS@
N12P-GS1-A1_BGA_973P
<32,33,47,56> VGA_PWROK
R1430
@
0_0402_5%
2
1 1
<27,31,33> HDMI_HPD
U55
IN1
HDMI_HPD_VGA
IN2
SN74AHC1G08DCKR_SC70-5
@
N12PGSR1@
RV31
10K_0402_5%
OPT@
2
10M_0402_5%
XTALIN
0_0402_5%
DIS@
R1431
XTAL_OUT
27MHZ_16PF_X5H027000FG1H
DIS@
1
1
CV45
CV46
DIS@
18P_0402_50V8J
18P_0402_50V8J
DIS@
2
2
RV123
10K_0402_5%
@
2
0_0402_5%
0.1U_0402_16V4Z
VGA_CRT_R <26>
VGA_CRT_G <26>
VGA_CRT_B <26>
VGA_CRT_HSYNC
VGA_CRT_VSYNC
1 DIS@
2
RV13
2.2K_0402_5%
1 DIS@
2
RV14
2.2K_0402_5%
I2CB_SCL
N2
P5
N5
1 DIS@
1 DIS@
2
RV11
2.2K_0402_5%
1 DIS@
2
RV12
2.2K_0402_5%
VGA_CRT_CLK
RV122
2.2K_0402_5%
OPT@
1 DIS@
2
2.2K_0402_5%
2
2.2K_0402_5%
1 DIS@
2
RV32
10K_0402_5%
1 DIS@
2
RV10
100K_0402_5%
RV8
SMB_DATA_GPU
W1
W2
1 DIS@
VGA_EDID_DATA
N3
L3
1 DIS@
2
RV1
10K_0402_5%
2 DIS@
1
RV2
10K_0402_5%
2 3D@
1
RV3
10K_0402_5%
1 DIS@
2
RV4
100K_0402_5%
1 DIS@
2
RV5
100K_0402_5%
1 DIS@
2
RV29
100K_0402_5%
2 DHDMI@1
R1429
100K_0402_5%
2 IHDMI@ 1
R1436
100K_0402_5%
+3VS_DGPU
VGA_EDID_CLK
Y1
Y2
Y3
AB3
AB2
AB1
AC4
AC1
AC2
AC3
AE3
AE2
U6
W6
Y6
AM1
AM2
PCIE_CTX_C_GRX_P[0..15]
<6> PCIE_CTX_C_GRX_P[0..15]
THERM#_VGA <14>
N1
P4
P1
P2
P3
T3
T2
T1
U4
U1
U2
U3
R6
T6
N6
AK4
AL4
AJ4
PCIE_GTX_C_CRX_N[0..15]
<6> PCIE_GTX_C_CRX_N[0..15]
0.1U_0402_16V4Z
XTAL_OUTBUFF
XTAL_SSIN
I2CC_SCL
I2CC_SDA
VGA_BL_PWM <25>
VGA_ENVDD <25>
VGA_ENBKL <25>
GPU_VID0 <56>
GPU_VID1 <56>
YV1
CLK_REQ_GPU#
DIS@
MIOA_HSYNC_NC
MIOA_VSYNC_NC
PCIE_GTX_C_CRX_P[0..15]
<6> PCIE_GTX_C_CRX_P[0..15]
HPD_C
VGA_BL_PWM
VGA_ENVDD
VGA_ENBKL
GPU_VID0
GPU_VID1
2
2N7002_SOT23-3
1
RV110
E2
E1
I2CB_SCL
I2CB_SDA
@
RV118
10K_0402_5%
OPT@
2 1
G
D
OPT@
3
MIOB_D0_NC
MIOB_D1_NC
MIOB_D2_NC
MIOB_D3_NC
MIOB_D4_NC
MIOB_D5_NC
MIOB_D6_NC
MIOB_D7_NC
MIOB_D8_NC
MIOB_D9_NC
MIOBD_10_NC
MIOB_D11_NC
MIOB_D12_NC
MIOB_D13_NC
MIOB_D14_NC
K1
K2
K3
H3
H2
H1
H4
H5
H6
J7
K4
K5
H7
J4
J6
L1
L2
L4
M4
L7
L5
K6
L6
M6
M7
QV2
1
<29> CLK_REQ_VGA#
PEX_TX0
PEX_TX0_N
PEX_TX1
PEX_TX1_N
PEX_TX2
PEX_TX2_N
PEX_TX3
PEX_TX3_N
PEX_TX4
PEX_TX4_N
PEX_TX5
PEX_TX5_N
PEX_TX6
PEX_TX6_N
PEX_TX7
PEX_TX7_N
PEX_TX8
PEX_TX8_N
PEX_TX9
PEX_TX9_N
PEX_TX10
PEX_TX10_N
PEX_TX11
PEX_TX11_N
PEX_TX12
PEX_TX12_N
PEX_TX13
PEX_TX13_N
PEX_TX14
PEX_TX14_N
PEX_TX15
PEX_TX15_N
MIOA_D0_NC
MIOA_D1_NC
MIOA_D2_NC
MIOA_D3_NC
MIOA_D4_NC
MIOA_D5_NC
MIOA_D6_NC
MIOA_D7_NC
MIOA_D8_NC
MIOA_D9_NC
MIOA_D10_NC
MIOA_D11_NC
MIOA_D12_NC
MIOA_D13_NC
MIOA_D14_NC
DACA_HSYNC
DACA_VSYNC
SMB_CLK_GPU
SMB_DATA_GPU
HDCP_SCL
HDCP_SDA
RV124
10K_0402_5%
OPT@
AF9
AD9
Internal Thermal Sensor
CV138
18P_0402_50V8J
OPT@
LVDS
<32,47,56> DGPU_PWR_EN
AE9
N12PGS@
45mA
1
2+SP_PLLVDD
RV30
0_0402_5%
45mA
YV1
27MHZ_16PF_X5H027000FG1H
OPT@
CV45
18P_0402_50V8J
OPT@
AM16
AG21
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23
GPIO24
CV12
Part 1 of 7
PEX_RX0
PEX_RX0_N
PEX_RX1
PEX_RX1_N
PEX_RX2
PEX_RX2_N
PEX_RX3
PEX_RX3_N
PEX_RX4
PEX_RX4_N
PEX_RX5
PEX_RX5_N
PEX_RX6
PEX_RX6_N
PEX_RX7
PEX_RX7_N
PEX_RX8
PEX_RX8_N
PEX_RX9
PEX_RX9_N
PEX_RX10
PEX_RX10_N
PEX_RX11
PEX_RX11_N
PEX_RX12
PEX_RX12_N
PEX_RX13
PEX_RX13_N
PEX_RX14
PEX_RX14_N
PEX_RX15
PEX_RX15_N
10U_0603_6.3V6M
AP17
AN17
AN19
AP19
AR19
AR20
AP20
AN20
AN22
AP22
AR22
AR23
AP23
AN23
AN25
AP25
AR25
AR26
AP26
AN26
AN28
AP28
AR28
AR29
AP29
AN29
AN31
AP31
AR31
AR32
AR34
AP34
CV11
CV8
PCIE_CTX_C_GRX_P15
PCIE_CTX_C_GRX_N15
PCIE_CTX_C_GRX_P14
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_N13
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_N0
+PLLVDD
GPIO
150mA
N12PGS@
0.1U_0402_16V4Z
PCI EXPRESS
DVO
LV2
1
2
BLM18PG330SN1D_0603
N12PGS@
2
CV85
CV7
N12PGS@
N12PGS@
22U_0805_6.3V6M
1
CLK
+1.05VS_DGPU
UV1A
Lane Reversal
I2C
DACs
Compal Secret Data
2009/01/01
Issued Date
Deciphered Date
2010/01/01
4
Title

VGA_PCIE/DAC/GPIO
Size
Document Number
Rev
0.1
PHQAA LA-6831P M/B

Date:
Sheet
1
13
of
58
UV1D
Part 4 of 7
2 RV127
VGA_EDP_AUX1
100K_0402_5%
EDP@
EDP@
+3VS_DGPU
VGA_HDMI_CLK
1 DIS@ 2
RV119
4.7K_0402_5%
<27> VGA_HDMI_TX2+
<27> VGA_HDMI_TX2<27> VGA_HDMI_TX1+
<27> VGA_HDMI_TX1<27> VGA_HDMI_TX0+
<27> VGA_HDMI_TX0<27> VGA_HDMI_CLK+
<27> VGA_HDMI_CLK-
VGA_HDMI_TX2+
VGA_HDMI_TX2VGA_HDMI_TX1+
VGA_HDMI_TX1VGA_HDMI_TX0+
VGA_HDMI_TX0VGA_HDMI_CLK+
VGA_HDMI_CLK-
AH6
AH5
AH4
AG4
AF4
AF5
AE6
AE5
IFPE_L0
IFPE_L0_N
IFPE_L1
IFPE_L1_N
IFPE_L2
IFPE_L2_N
IFPE_L3
IFPE_L3_N
AL2
AL3
AJ3
AJ2
AJ1
AH1
AH2
AH3
IFPF_L0
IFPF_L0_N
IFPF_L1
IFPF_L1_N
IFPF_L2
IFPF_L2_N
IFPF_L3
IFPF_L3_N
AP2
AN3
IFPC_AUX_I2CW _SCL
IFPC_AUX_I2CW _SDA_N
AP4
AN4
IFPD_AUX_I2CX_SCL
IFPD_AUX_I2CX_SDA_N
AE4
AD4
IFPE_AUX_I2CY_SCL
IFPE_AUX_I2CY_SDA_N
TESTMODE
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST_N
AF3
AF2
IFPF_AUX_I2CZ_SCL
IFPF_AUX_I2CZ_SDA_N
SERIAL
HDMI
<27> VGA_HDMI_CLK
<27> VGA_HDMI_DATA
VGA_HDMI_CLK
VGA_HDMI_DATA
VGA_HDMI_DATA
1 DIS@ 2
RV120
4.7K_0402_5%
RV119
4.7K_0402_5%
OPT@
RV120
4.7K_0402_5%
OPT@
<24> STRAP0
<24> STRAP1
<24> STRAP2
AB5
VGA_SMB_CK2
VGA_SMB_DA2
ALERT#
THERM#_VGA
GND
THERM#
UV2
ADM1032ARMZ-2REEL_MSOP8
OPT@
THERM#_VGA <13>
CV53
0.1U_0402_16V4Z
OPT@
CV54
2200P_0402_50V7K
OPT@
+3VS_DGPU
RV24
2.2K_0402_5%
OPT@
4
OPT@
QV1A
1
VGA_SMB_DA2
OPT@
QV1B
3
EC_SMB_CK2 <29,44,45,46>
2N7002DW-T/R7_SOT363-6
EC_SMB_DA2 <29,44,45,46>
2N7002DW-T/R7_SOT363-6
VGA_SMB_CK2
VGA_SMB_DA2
VDD_SENSE_0
VDD_SENSE_1
VDD_SENSE_2
D35
P7
AD20
GND_SENSE_0
GND_SENSE_1
GND_SENSE_2
AD19
E35
R7
VDD_SENSE
EC_SMB_CK2
1 DIS@ 2
RV35
0_0402_5%
EC_SMB_DA2
1 DIS@ 2
RV36
0_0402_5%
VDD_SENSE <56>
RV47
10K_0402_5%
OPT@
TEST
AP35
AP14
AN14
AN16
AR14
AP16
TESTMODE
ROM_CS_N
ROM_SI
ROM_SO
ROM_SCLK
C3
D3
C4
D4
ROM_CS#
ROM_SI
ROM_SO
ROM_SCLK
NC/SPDIF_NC
A5
MULTI_STRAP_REF0_GND
N9
MULTI_STRAP_REF1_GND
M9
W5
W7
V7
THERMDP
THERMDN
B5
B4
CEC
1
RV41
TV2
TV3
TV4
TV5
2
10K_0402_5%
+3VS_DGPU
RV47
10K_0402_5%
DIS@
ROM_CS#
ROM_SI <24>
ROM_SO <24>
ROM_SCLK <24>
STRAP0
STRAP1
STRAP2
1 DIS@ 2
RV48
40.2K_0402_1%
1 DIS@ 2
RV50
40.2K_0402_1%
THERM_D+
THERM_D-
N12PGSR1@
2
RV44
1
10K_0402_5%
for EMI
R398
10_0402_5%
@
C87
10P_0402_50V8J
@
RV48
40.2K_0402_1%
OPT@
RV50
40.2K_0402_1%
OPT@
Issued Date
Compal Secret Data

2009/01/01
2010/01/01
Deciphered Date
4
2
4
ADM1032ARMZ-2REEL_MSOP8
1
2200P_0402_50V7K
SCLK
SDATA
VGA_SMB_CK2
BUFRST_N
THERM_D-
DIS@
RV22
2.2K_0402_5%
OPT@
GENERAL
A4
1 DIS@ 2
RV49
10K_0402_5%
STRAP0
STRAP1
STRAP2
THERM_D+
DIS@
UV2
2
1
1
CV53
0.1U_0402_16V4Z VDD
2 D+
CV54
1
2 DIS@
3 D-
ROM_SCLK
RV49
10K_0402_5%
OPT@
+3VS_DGPU
+3VS_DGPU
IFPD_L0
IFPD_L0_N
IFPD_L1
IFPD_L1_N
IFPD_L2
IFPD_L2_N
IFPD_L3
IFPD_L3_N
VGA_EDP_AUX
VGA_EDP_AUX-
RV33
0_0402_5%
@
Internal Thermal Sensor

RV34
Address: 0x9E H
0_0402_5%
AR8
AR7
AP7
AN7
AN5
AP5
AR5
AR4
<25> VGA_eDP_AUX
<25> VGA_eDP_AUX-
SMB_DATA_GPU <13>
Address: 0x9A H
VGA_EDP_TX0+
VGA_EDP_TX0VGA_EDP_TX1+
VGA_EDP_TX3-
eDP
SMB_CLK_GPU <13>
+3VS_DGPU
<25> VGA_EDP_TX0+
<25> VGA_EDP_TX0<25> VGA_EDP_TX1+
<25> VGA_EDP_TX3-
External VGA Thermal Sensor
VGA_EDP_AUX
1
100K_0402_5%
IFPC_L0
IFPC_L0_N
IFPC_L1
IFPC_L1_N
IFPC_L2
IFPC_L2_N
IFPC_L3
IFPC_L3_N
A2
A7
B7
C5
C7
D5
D6
D7
E5
E7
F4
G5
H32
J25
J26
P6
U7
V6
Y4
AA4
AB4
AB7
AC5
AD6
AF6
AG6
AG20
AJ5
AK15
AL7
2 RV126
AM7
AM6
AL5
AM5
AM3
AM4
AP1
AR2
NC_0
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
NC_25
NC_26
NC_27
NC_28
NC_29
IFPB_TXC
IFPB_TXC_N
IFPB_TXD4
IFPB_TXD4_N
IFPB_TXD5
IFPB_TXD5_N
IFPB_TXD6
IFPB_TXD6_N
IFPB_TXD7
IFPB_TXD7_N
LVDS/TMDS
eDP is supported
only on IFPD
AP13
AN13
AN8
AP8
AP10
AN10
AR11
AR10
AN11
AP11
IFPA_TXC
IFPA_TXC_N
IFPA_TXD0
IFPA_TXD0_N
IFPA_TXD1
IFPA_TXD1_N
IFPA_TXD2
IFPA_TXD2_N
IFPA_TXD3
IFPA_TXD3_N
<25> VGA_TZCLK+
<25> VGA_TZCLK<25> VGA_TZOUT0+
<25> VGA_TZOUT0<25> VGA_TZOUT1+
<25> VGA_TZOUT1<25> VGA_TZOUT2+
<25> VGA_TZOUT2-
VGA_TZCLK+
VGA_TZCLKVGA_TZOUT0+
VGA_TZOUT0VGA_TZOUT1+
VGA_TZOUT1VGA_TZOUT2+
VGA_TZOUT2-
AM11
AM12
AM8
AL8
AM10
AM9
AK10
AL10
AK11
AL11
NC
<25> VGA_TXCLK+
<25> VGA_TXCLK<25> VGA_TXOUT0+
<25> VGA_TXOUT0<25> VGA_TXOUT1+
<25> VGA_TXOUT2-
VGA_TXCLK+
VGA_TXCLKVGA_TXOUT0+
VGA_TXOUT0VGA_TXOUT1+
VGA_TXOUT1VGA_TXOUT2+
VGA_TXOUT2-
Title

VGA_LVDS/HDMI/THERM/eDP
Size
Document Number
Rev
0.1
PHQAA LA-6831P M/B

Date:
Sheet
1
14
of
58
N12M-GE Performance Mode

Mode
NVCLK (MHz)
N12P-GS Performance Mode
MCLK (MHz)
+VGA_CORE
Mode
NVCLK (MHz)
MCLK (MHz)
N12P-GE Performance Mode
+VGA_CORE
Mode
NVCLK (MHz)
606
790
1.00 V
P0
TBD
TBD
TBD
P0
TBD
TBD
TBD
P8
TBD
TBD
TBD
P8
TBD
TBD
TBD
P8
TBD
TBD
TBD
P12
TBD
TBD
TBD
P12
TBD
TBD
TBD
P12
TBD
TBD
TBD
+VGA_CORE
UV1G
for
for
for
for
N12PGSR1@
+VGA_CORE
1
CV57
+VGA_CORE
330U_2.5V_M_R17
1
CV226
22U_0603_6.3V6M
OPT@
CV227
22U_0603_6.3V6M
OPT@
CV57
330U_2.5V_M_R17
OPT@
CV58
330U_2.5V_M_R17
OPT@
CV10
47U_0805_4V6
OPT@
CV43
22U_0805_6.3V6M
OPT@
CV60
10U_0603_6.3V6M
OPT@
CV61
10U_0603_6.3V6M
OPT@
CV51
4.7U_0603_6.3V6K
OPT@
CV62
1U_0402_6.3V4Z
OPT@
CV44
0.22U_0402_6.3V6K
OPT@
CV52
0.22U_0402_6.3V6K
OPT@
CV55
0.22U_0402_6.3V6K
OPT@
CV59
0.1U_0402_16V7K
OPT@
CV63
0.1U_0402_16V7K
OPT@
CV64
0.047U_0402_25V6K
OPT@
CV65
0.047U_0402_25V6K
OPT@
CV66
0.047U_0402_25V6K
OPT@
CV70
0.022U_0402_25V7K
OPT@
CV71
0.022U_0402_25V7K
OPT@
CV123
0.022U_0402_25V7K
OPT@
CV74
0.01U_0402_25V7K
OPT@
CV75
0.01U_0402_25V7K
OPT@
CV76
0.01U_0402_25V7K
OPT@
CV77
0.01U_0402_25V7K
OPT@
CV78
0.01U_0402_25V7K
OPT@
CV79
0.01U_0402_25V7K
OPT@
CV124
0.01U_0402_25V7K
OPT@
CV125
0.01U_0402_25V7K
OPT@
22U_0603_6.3V6M
+ CV58
330U_2.5V_M_R17
DIS@ 2
CV225
DIS@
2 DIS@
22U_0603_6.3V6M
CV226
DIS@
CV227
DIS@
22U_0603_6.3V6M
+VGA_CORE
CV60
DIS@
22U_0805_6.3V6M
CV61
DIS@
CV51
DIS@
10U_0603_6.3V6M
CV62
DIS@
CV44
DIS@
1U_0402_6.3V4Z
CV52
0.22U_0402_6.3V6K
DIS@
CV55
CV43
@
0.22U_0402_6.3V6K
DIS@
CV10
47U_0805_4V6
@
4.7U_0603_6.3V6K
10U_0603_6.3V6M
0.22U_0402_6.3V6K
+VGA_CORE
0.1U_0402_16V7K
CV59
CV63
0.1U_0402_16V7K
DIS@ 2
DIS@
0.047U_0402_25V6K
CV64
DIS@
CV65
DIS@
0.047U_0402_25V6K
CV66
DIS@
0.022U_0402_25V7K
CV70
DIS@
CV71
DIS@
0.047U_0402_25V6K
0.022U_0402_25V7K
CV123
DIS@
0.022U_0402_25V7K
+VGA_CORE
0.01U_0402_25V7K
CV74
CV225
22U_0603_6.3V6M
OPT@
N11E-GE1-LP
N11P-GE1
N11M-GE1 & N11M-OP1
N11M-GE2
VDD_56
VDD_57
VDD_58
VDD_59
VDD_60
VDD_61
VDD_62
VDD_63
VDD_64
VDD_65
VDD_66
VDD_67
VDD_68
VDD_69
VDD_70
VDD_71
VDD_72
VDD_73
VDD_74
VDD_75
VDD_76
VDD_77
VDD_78
VDD_79
VDD_80
VDD_81
VDD_82
VDD_83
VDD_84
VDD_85
VDD_86
VDD_87
VDD_88
VDD_89
VDD_90
VDD_91
VDD_92
VDD_93
VDD_94
VDD_95
VDD_96
VDD_97
VDD_98
VDD_99
VDD_100
VDD_101
VDD_102
VDD_103
VDD_104
VDD_105
VDD_106
VDD_107
VDD_108
VDD_109
VDD_110
32A
28A
16A
14A
Part 7 of 7
P21
P23
P25
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
T12
T14
T16
T18
T20
T22
T24
V11
V13
V15
V17
V19
V21
V23
V25
W11
W12
W13
W14
W15
W16
W17
W18
W19
W20
W21
W22
W23
W24
W25
Y12
Y14
Y16
Y18
Y20
Y22
Y24
VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16
VDD_17
VDD_18
VDD_19
VDD_20
VDD_21
VDD_22
VDD_23
VDD_24
VDD_25
VDD_26
VDD_27
VDD_28
VDD_29
VDD_30
VDD_31
VDD_32
VDD_33
VDD_34
VDD_35
VDD_36
VDD_37
VDD_38
VDD_39
VDD_40
VDD_41
VDD_42
VDD_43
VDD_44
VDD_45
VDD_46
VDD_47
VDD_48
VDD_49
VDD_50
VDD_51
VDD_52
VDD_53
VDD_54
VDD_55
POWER
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB25
AC11
AC12
AC13
AC14
AC15
AC16
AC17
AC18
AC19
AC20
AC21
AC22
AC23
AC24
AC25
AD12
AD14
AD16
AD18
AD22
AD24
L11
L12
L13
L14
L15
L16
L17
L18
L19
L20
L21
L22
L23
L24
L25
M12
M14
M16
M18
M20
M22
M24
P11
P13
P15
P17
P19
+VGA_CORE
P0
+VGA_CORE
MCLK (MHz)
0.01U_0402_25V7K
DIS@ 2
CV75
DIS@
CV76
DIS@
0.01U_0402_25V7K
CV77
DIS@
0.01U_0402_25V7K
CV78
DIS@
0.01U_0402_25V7K
0.01U_0402_25V7K
CV79
DIS@
CV124
DIS@
0.01U_0402_25V7K
CV125
DIS@
0.01U_0402_25V7K
Compal Secret Data
2009/01/01
Issued Date
Deciphered Date
2010/01/01
5
Title

VGA_VGA CORE
Size
Document Number
Rev
0.1
PHQAA LA-6831P M/B

Date:
Sheet
1
15
of
58
UV1E
3.5A
CV82
CV83
DIS@
4.7U_0603_6.3V6K
DIS@ 2
1U_0402_6.3V4Z
CV67
DIS@
CV68
DIS@
CV86
DIS@
2 0.1U_0402_16V4Z
1U_0402_6.3V4Z
D
0.1U_0402_16V4Z
+VRAM_1.5VS
CV99
CV100
0.1U_0402_16V4Z
DIS@ 2
DIS@
0.1U_0402_16V4Z
CV101
DIS@
CV102
DIS@
DIS@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CV103
CV104
DIS@
0.1U_0402_16V4Z
CV126
DIS@
0.1U_0402_16V4Z
CV82
4.7U_0603_6.3V6K
OPT@
CV83
4.7U_0603_6.3V6K
OPT@
CV67
1U_0402_6.3V4Z
OPT@
CV68
1U_0402_6.3V4Z
OPT@
CV86
0.1U_0402_16V4Z
OPT@
CV99
0.1U_0402_16V4Z
OPT@
CV100
0.1U_0402_16V4Z
OPT@
CV101
0.1U_0402_16V4Z
OPT@
CV102
0.1U_0402_16V4Z
OPT@
CV103
0.1U_0402_16V4Z
OPT@
CV104
0.1U_0402_16V4Z
OPT@
CV126
0.1U_0402_16V4Z
OPT@
+IFPAB_PLLVDD
@
1
2
RV96
1K_0402_1%
Part 5 of 7
J23
J24
J29
AA27
AA29
AA31
AB27
AB29
AC27
AD27
AE27
AJ28
B18
E21
G17
G18
G22
G8
G9
H29
J14
J15
J16
J17
J20
J21
J22
N27
P27
R27
T27
U27
U29
V27
V29
V34
W27
Y27
AK9
AJ11
FBVDDQ_0
FBVDDQ_1
FBVDDQ_2
FBVDDQ_3
FBVDDQ_4
FBVDDQ_5
FBVDDQ_6
FBVDDQ_7
FBVDDQ_8
FBVDDQ_9
FBVDDQ_10
FBVDDQ_11
FBVDDQ_12
FBVDDQ_13
FBVDDQ_14
FBVDDQ_15
FBVDDQ_16
FBVDDQ_17
FBVDDQ_18
FBVDDQ_19
FBVDDQ_20
FBVDDQ_21
FBVDDQ_22
FBVDDQ_23
FBVDDQ_24
FBVDDQ_25
FBVDDQ_26
FBVDDQ_27
FBVDDQ_28
FBVDDQ_29
FBVDDQ_30
FBVDDQ_31
FBVDDQ_32
FBVDDQ_33
FBVDDQ_34
FBVDDQ_35
FBVDDQ_36
FBVDDQ_37
AG9
AG10
+IFPD_PLLVDD
AJ9
AK7
@
1
2
RV51
1K_0402_1%
+IFPD_IOVDD
AJ8
CV87
DIS@
1
CV88
DIS@
0.1U_0402_16V4Z
IFPAB_PLLVDD
IFPAB_RSET
0.1U_0402_16V4Z
1U_0402_6.3V4Z
2
1
BLM18PG121SN1D_0603
DIS@
1
CV117
4.7U_0603_6.3V6K
DIS@
1
CV118
DIS@
+IFPAB_PLLVDD
CV93
DIS@
CV94
2 DIS@
0.1U_0402_16V4Z
CV120
DIS@
IFPA_IOVDD
IFPB_IOVDD
IFPC_PLLVDD
IFPC_RSET
J10
J11
J12
J13
J9
P9
R9
T9
U9
MIOA_VDDQ_NC_0
MIOA_VDDQ_NC_1
MIOA_VDDQ_NC_2
MIOA_VDDQ_NC_3
AJ6
AL1
IFPEF_PLLVDD
IFPEF_RSET
AE7
AD7
IFPE_IOVDD
IFPF_IOVDD
IFPD_PLLVDD
IFPD_RSET
220mA
0.1U_0402_16V4Z
1
CV134
DIS@
+IFPAB_IOVDD
1
CV135
DIS@
CV213
0.1U_0402_16V4Z
DIS@
CV96
DIS@
CV97
DIS@
1
CV98
DIS@
CV4
22U_0805_6.3V6M
DIS@
4.7U_0603_6.3V6K
1
CV105
DIS@
1
CV107
DIS@
LV4
2
1
BLM18PG121SN1D_0603
DIS@
CV108
4.7U_0603_6.3V6K
OPT@
+1.05VS_DGPU
CV108
4.7U_0603_6.3V6K
2 DIS@
CV109
4.7U_0603_6.3V6K
DIS@
CV109
4.7U_0603_6.3V6K
OPT@
CV107
1U_0402_6.3V4Z
OPT@
CV105
0.1U_0402_16V4Z
OPT@
C
120mA
0.1U_0402_16V4Z
240mA
1
CV217
DIS@
0.1U_0402_16V4Z
AA9
AB9
W9
Y9
MIOB_VDDQ_NC_0
MIOB_VDDQ_NC_1
MIOB_VDDQ_NC_2
MIOB_VDDQ_NC_3
CV115
0.1U_0402_16V4Z
N12MGE@
1U_0402_6.3V4Z
1
CV216
DIS@
1
CV112
DIS@
1
CV113
DIS@
CV110
0.1U_0402_16V4Z
DIS@
1 DIS@
CV111
4.7U_0603_6.3V6K
CV114
4.7U_0603_6.3V6K
DIS@
0.1U_0402_16V4Z
+MIO_VDDQ
2
R196
1
CV116
0.1U_0402_16V4Z
N12MGE@
2
N12PGSR1@
N12MGE@
1
0_0603_5%
+3VS_DGPU
CV115
10K_0402_5%
N12PGE@
CV115
10K_0402_5%
N12PGS@
220mA
1U_0402_6.3V4Z
CV111
4.7U_0603_6.3V6K
OPT@
CV110
0.1U_0402_16V4Z
OPT@
CV3
22U_0805_6.3V6M
OPT@
CV4
22U_0805_6.3V6M
OPT@
CV93
0.1U_0402_16V4Z
OPT@
CV92
10U_0603_6.3V6M
OPT@
CV98
10U_0603_6.3V6M
OPT@
CV94
0.1U_0402_16V4Z
OPT@
CV91
4.7U_0603_6.3V6K
OPT@
CV97
4.7U_0603_6.3V6K
OPT@
CV87
0.1U_0402_16V4Z
OPT@
CV89
1U_0402_6.3V4Z
OPT@
CV90
1U_0402_6.3V4Z
OPT@
CV88
0.1U_0402_16V4Z
OPT@
CV95
1U_0402_6.3V4Z
OPT@
CV96
1U_0402_6.3V4Z
OPT@
CV114
4.7U_0603_6.3V6K
OPT@
CV113
1U_0402_6.3V4Z
OPT@
CV112
0.1U_0402_16V4Z
OPT@
CV216
0.1U_0402_16V4Z
OPT@
CV217
0.1U_0402_16V4Z
OPT@
+IFPEF_PLLVDD
0.1U_0402_16V4Z
+3VS_DGPU
1
CV128
DHDMI@
1
CV129
DHDMI@
1
CV130
DHDMI@
1
CV131
DHDMI@
CV215
0.1U_0402_16V4Z
DHDMI@
+1.05VS_DGPU
LV10
2
1 4.7U_0603_6.3V6K
BLM18PG181SN1D_0603
DHDMI@
1
1
CV141
CV142
4.7U_0603_6.3V6K
DHDMI@
DHDMI@
2
2
0.1U_0402_16V4Z
CV131
10K_0402_5%
IHDMI@
LV11
2
1
BLM18PG181SN1D_0603
EDP@
CV140
4.7U_0603_6.3V6K
EDP@
1
CV143
DHDMI@
1
CV220
EDP@
0.1U_0402_16V4Z
1
CV139
EDP@
1
CV214
EDP@
+IFPD_PLLVDD
1
CV221
EDP@
CV221
10K_0402_5%
NOEDP@
CV218
0.1U_0402_16V4Z
EDP@
CV221
10K_0402_5%
NOEDP@
0.1U_0402_16V4Z
+IFPE_IOVDD
0.1U_0402_16V4Z
1U_0402_6.3V4Z
4.7U_0603_6.3V6K
285mA
1
CV144
DHDMI@
CV145
0.1U_0402_16V4Z
DHDMI@
CV143
10K_0402_5%
IHDMI@
1U_0402_6.3V4Z
+1.05VS_DGPU
LV12
2
1 4.7U_0603_6.3V6K
BLM18PG181SN1D_0603
EDP@
1
1
CV219
4.7U_0603_6.3V6K
CV147
EDP@
EDP@
2
2
CV213
10K_0402_5%
OPT@
CV212
10K_0402_5%
NOEDP@
0.1U_0402_16V4Z
1
CV148
EDP@
+IFPD_IOVDD
1
CV197
EDP@
CV212
10K_0402_5%
NOEDP@
CV212
0.1U_0402_16V4Z
EDP@
1U_0402_6.3V4Z
Compal Secret Data
2009/01/01
Issued Date
Deciphered Date
2010/01/01
5
+1.05VS_DGPU
120mA
1U_0402_6.3V4Z
A
CV95
DIS@
10U_0603_6.3V6M
IFPD_IOVDD
4.7U_0603_6.3V6K
LV8
2
1 4.7U_0603_6.3V6K
BLM18PG181SN1D_0603
DIS@
1
1
CV132
4.7U_0603_6.3V6K
CV133
DIS@
DIS@
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.8VS
CV92
DIS@
+PEX_PLLVDD
2
IFPC_IOVDD
+IFPEF_PLLVDD
LV7
2
1
BLM18PG181SN1D_0603
DHDMI@
2
4.7U_0603_6.3V6K
1U_0402_6.3V4Z
AG19
F7
VDD33_0
VDD33_1
VDD33_2
VDD33_3
VDD33_4
AK8
CV127
4.7U_0603_6.3V6K
DHDMI@
CV91
DIS@
CV3
22U_0805_6.3V6M
DIS@
LV4
BLM18PG121SN1D_0603
OPT@
1
CV119
DIS@
AG14
+3VS_DGPU
CV90
DIS@
4.7U_0603_6.3V6K
CV120
10K_0402_5%
OPT@
220mA
+1.05VS_DGPU
1U_0402_6.3V4Z
120mA
PEX_SVDD_3V3
PEX_SVDD_3V3_NC
LV5
CV89
DIS@
+3VS_DGPU
AC6
AB6
+IFPE_IOVDD
+1.05VS_DGPU
10U_0603_6.3V6M
1U_0402_6.3V4Z
AK16
AK17
AK21
AK24
AK27
PEX_IOVDD_0
PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
PEX_PLLVDD
+IFPD_IOVDD
1DHDMI@ 2
RV53
1K_0402_1%
1U_0402_6.3V4Z
1U_0402_6.3V4Z
600mA
120mA
+IFPD_PLLVDD
1 EDP@ 2
RV52
1K_0402_1%
0.1U_0402_16V4Z
AG11
AG12
AG13
AG15
AG16
AG17
AG18
AG22
AG23
AG24
AG25
AG26
AJ14
AJ15
AJ19
AJ21
AJ22
AJ24
AJ25
AJ27
AK18
AK20
AK23
AK26
AL16
+3VS_DGPU
+IFPAB_IOVDD
2200mA
1600mA
PEX_IOVDDQ_0
PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8
PEX_IOVDDQ_9
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13
PEX_IOVDDQ_14
PEX_IOVDDQ_15
PEX_IOVDDQ_16
PEX_IOVDDQ_17
PEX_IOVDDQ_18
PEX_IOVDDQ_19
PEX_IOVDDQ_20
PEX_IOVDDQ_21
PEX_IOVDDQ_22
PEX_IOVDDQ_23
PEX_IOVDDQ_24
POWER
4.7U_0603_6.3V6K
+VRAM_1.5VS
Title

VGA_POWER
Size
Document Number
Rev
0.1
PHQAA LA-6831P M/B

Date:
Sheet
1
16
of
58
UV1F
GND_0
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
GND_95
GND_96
Part 6 of 7
GND_97
GND_98
GND_99
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_174
GND_175
GND_176
GND_177
GND_178
GND_179
GND_180
GND_181
GND_182
GND_183
GND_184
GND_185
GND_186
GND_187
GND_188
GND_189
GND_190
GND_191
GND_192
GND
B3
B6
B9
B12
B15
B21
B24
B27
B30
B33
C2
C34
E6
E9
E12
E15
E18
E24
E27
E30
F2
F31
F34
F5
J2
J5
J31
J34
K9
L9
M2
M5
M11
M13
M15
M17
M19
M21
M23
M25
M31
M34
N11
N12
N13
N14
N15
N16
N17
N18
N19
N20
N21
N22
N23
N24
N25
P12
P14
P16
P18
P20
P22
P24
R2
R5
R31
R34
T11
T13
T15
T17
T19
T21
T23
T25
U11
U12
U13
U14
U15
U16
U17
U18
U19
U20
U21
U22
U23
U24
U25
V2
V5
V9
V12
V14
V16
V18
V20
V22
V24
V31
Y11
Y13
Y15
Y17
Y19
Y21
Y23
Y25
AA2
AA5
AA11
AA12
AA13
AA14
AA15
AA16
AA17
AA18
AA19
AA20
AA21
AA22
AA23
AA24
AA25
AA34
AB12
AB14
AB16
AB18
AB20
AB22
AB24
AC9
AD2
AD5
AD11
AD13
AD15
AD17
AD21
AD23
AD25
AD31
AD34
AE11
AE12
AE13
AE14
AE15
AE16
AE17
AE18
AE19
AE20
AE21
AE22
AE23
AE24
AE25
AG2
AG5
AG31
AG34
AK2
AK5
AK14
AK31
AK34
AL6
AL9
AL12
AL15
AL18
AL21
AL24
AL27
AL30
AN2
AN34
AP3
AP6
AP9
AP12
AP15
AP18
AP21
AP24
AP27
AP30
AP33
N12PGSR1@
Compal Secret Data
2009/01/01
Issued Date
Deciphered Date
2010/01/01
5
Title

VGA_GND
Size
Document Number
Rev
0.1
PHQAA LA-6831P M/B

Date:
Sheet
1
17
of
58
UV1B
Part 2 of 7
MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
+VRAM_1.5VS
RV55
1.1K_0402_1%
@
+FB_VREF
12mil
1
RV56
1.1K_0402_1%
@
CV146
0.01U_0402_25V7K
@
+1.05VS_DGPU
CV106
10U_0603_6.3V6M
DIS@
LV6
1
2
BLM18PG330SN1D_0603
DIS@
2
2
CV69
DIS@
100mA
1U_0402_6.3V4Z
CV149
DIS@
10U_0603_6.3V6M
CV84
DIS@
+FB_AVDD0
L32
N33
L33
N34
N35
P35
P33
P34
K35
K33
K34
H33
G34
G33
E34
E33
G31
F30
G30
G32
K30
K32
H30
K31
L31
L30
M32
N30
M30
P31
R32
R30
AG30
AG32
AH31
AF31
AF30
AE30
AC32
AD30
AN33
AL31
AM33
AL33
AK30
AK32
AJ30
AH30
AH33
AH35
AH34
AH32
AJ33
AL35
AM34
AM35
AF33
AE32
AF34
AE35
AE34
AE33
AB32
AC35
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
AG27
AF27
FB_DLLAVDD_0
FB_PLLAVDD_0
J19
J18
FB_DLLAVDD_1
FB_PLLAVDD_1
+FB_AVDD1
0.1U_0402_16V4Z
+VRAM_1.5VS
RV101
+FB_VREF
J27
2 DIS@ 1 60.4_0402_1%T30
2
1
T29
RV57
10K_0402_5%
N12PGS@
+1.05VS_DGPU
100mA
LV9
+FB_AVDD1
1U_0402_6.3V4Z
1
2
BLM18PG330SN1D_0603
N12PGS@
2
2
1
1
CV137
CV121
CV150
CV136
10U_0603_6.3V6M
N12PGS@
N12PGS@
N12PGS@
N12PGS@
0.1U_0402_16V4Z
1
1
2
2
MEMORY INTERFACE
A
MDA[0..63]
<20,21> MDA[0..63]
U30
V30
U31
V32
T35
U33
W 32
W 33
W 31
W 34
U34
U35
U32
T34
T33
W 30
AB30
AA30
AB31
AA32
AB33
Y32
Y33
AB34
AB35
Y35
W 35
Y34
Y31
Y30
W 29
Y29
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
P32
H34
J30
P30
AF32
AL32
AL34
AF35
DQMA0
DQMA1
DQMA2
DQMA3
DQMA4
DQMA5
DQMA6
DQMA7
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
L35
G35
H31
N32
AD32
AJ31
AJ35
AC34
DQSA#0
DQSA#1
DQSA#2
DQSA#3
DQSA#4
DQSA#5
DQSA#6
DQSA#7
FBA_DQS_W P0
FBA_DQS_W P1
FBA_DQS_W P2
FBA_DQS_W P3
FBA_DQS_W P4
FBA_DQS_W P5
FBA_DQS_W P6
FBA_DQS_W P7
L34
H35
J32
N31
AE31
AJ32
AJ34
AC33
DQSA0
DQSA1
DQSA2
DQSA3
DQSA4
DQSA5
DQSA6
DQSA7
FBA_W CK0
FBA_W CK0_N
FBA_W CK1
FBA_W CK1_N
FBA_W CK2
FBA_W CK2_N
FBA_W CK3
FBA_W CK3_N
P29
R29
L29
M29
AG29
AH29
AD29
AE29
FB_VREF_NC
FBA_DEBUG0
FBA_DEBUG1
RV57
10K_0402_5%
N12PGE@
CV137
10U_0603_6.3V6M
N12PGE@
LV9
BLM18PG330SN1D_0603
N12PGE@
CV121
10U_0603_6.3V6M
N12PGE@
CV136
0.1U_0402_16V4Z
N12PGE@
RV101
60.4_0402_1%
OPT@
CMDA18
CMDA19
CMDA20
CMDA21
CMDA22
CMDA23
CMDA24
CMDA25
CMDA26
CMDA27
CMDA28
CMDA29
CMDA30
GB2-128
Mode E - Mirror Mode Mapping
CMDA0 <20>
CMDA2
CMDA3
CMDA4
CMDA5
CMDA6
CMDA7
CMDA8
CMDA9
CMDA10
CMDA11
CMDA12
CMDA13
CMDA14
CMDA15
CMDA16
<20>
<20>
<20,21>
<20,21>
<20,21>
<20,21>
<20,21>
<20,21>
<20,21>
<20,21>
<20,21>
<20,21>
<20,21>
<20,21>
<21>
CMDA18
CMDA19
CMDA20
CMDA21
CMDA22
CMDA23
CMDA24
CMDA25
CMDA26
CMDA27
CMDA28
CMDA29
CMDA30
<21>
<21>
<20,21>
<20,21>
<20,21>
<20,21>
<20,21>
<20,21>
<20,21>
<20,21>
<20,21>
<20,21>
<20,21>
DQMA[7..0]
FBA_CLK0
FBA_CLK0_N
T32
T31
CLKA0
CLKA0#
FBA_CLK1
FBA_CLK1_N
AC31
AC30
CLKA1
CLKA1#
CMD3
CKE_L
CMD8
CMD2
A8
CMD21
A7
A6
CMD24
A2
A1
CMD23
A11
A9
CMD26
A5
A4
CMD7
A0
A12
CMD15
CAS#
CAS#
CMD13
BA1
A3
CMD4
A9
DQSA[7..0]
<20,21>
A11
CS0#_H
CMD29
BA0
BA0
CMD27
BA2
A15
CMD6
A3
BA1
ODT_H
CMD22
A4
A5
CMD12
A13
A14
CMD28
WE#
A10
CMD10
A1
A2
CMD25
A10
WE#
CMD9
A12
A0
CMD1
CS1#_L
CMD11
CS1#_H
CMD19
<20,21>
A8
CS0#_L
CMD18
<20,21>
32..63
RAS#
CMD0
ODT_L
CMD5
A6
RAS#
B
A7
CKE_H
CMD20
RST
RST
CMD14
A14
A13
CMD30
A15
BA2
CLKA0 <20>
CLKA0# <20>
CLKA1 <21>
CLKA1# <21>
N12PGSR1@
CV106
10U_0603_6.3V6M
OPT@
CV69
10U_0603_6.3V6M
OPT@
CV149
1U_0402_6.3V4Z
OPT@
CV84
0.1U_0402_16V4Z
OPT@
Compal Secret Data

2009/01/01
Issued Date
Deciphered Date
2010/01/01
4
0..31
CMD17
DQSA#[7..0]
DATA Bus
Address
CMD16
CV150
1U_0402_6.3V4Z
N12PGE@
CMDA2
CMDA3
CMDA4
CMDA5
CMDA6
CMDA7
CMDA8
CMDA9
CMDA10
CMDA11
CMDA12
CMDA13
CMDA14
CMDA15
CMDA16
LV6
BLM18PG330SN1D_0603
OPT@
10U_0603_6.3V6M
A
CMDA0
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
Title

VGA_MEM Interface A
Size
Document Number
Rev
0.1
PHQAA LA-6831P M/B

Date:
Sheet
1
18
of
58
UV1C
Part 3 of 7
MDB[0..63]
RV58
40.2_0402_1%
OPT@
RV59
40.2_0402_1%
OPT@
RV60
60.4_0402_1%
OPT@
+VRAM_1.5VS
MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63
B13
D13
A13
A14
C16
B16
A17
D16
C13
B11
C11
A11
C10
C8
B8
A8
E8
F8
F10
F9
F12
D8
D11
E11
D12
E13
F13
F14
F15
E16
F16
F17
D29
F27
F28
E28
D26
F25
D24
E25
E32
F32
D33
E31
C33
F29
D30
E29
B29
C31
C29
B31
C32
B32
B35
B34
A29
B28
A28
C28
C26
D25
B25
A25
F18
E19
D18
C17
F19
C19
B17
E20
B19
D20
A19
D19
C20
F20
B20
G21
F22
F24
F23
C25
C23
F21
E22
D21
A23
D22
B23
C22
B22
A22
A20
G20
FBC_DQM0
FBC_DQM1
FBC_DQM2
FBC_DQM3
FBC_DQM4
FBC_DQM5
FBC_DQM6
FBC_DQM7
A16
D10
F11
D15
D27
D34
A34
D28
DQMB0
DQMB1
DQMB2
DQMB3
DQMB4
DQMB5
DQMB6
DQMB7
FBC_DQS_RN0
FBC_DQS_RN1
FBC_DQS_RN2
FBC_DQS_RN3
FBC_DQS_RN4
FBC_DQS_RN5
FBC_DQS_RN6
FBC_DQS_RN7
B14
B10
D9
E14
F26
D31
A31
A26
DQSB#0
DQSB#1
DQSB#2
DQSB#3
DQSB#4
DQSB#5
DQSB#6
DQSB#7
FBC_DQS_WP0
FBC_DQS_WP1
FBC_DQS_WP2
FBC_DQS_WP3
FBC_DQS_WP4
FBC_DQS_WP5
FBC_DQS_WP6
FBC_DQS_WP7
C14
A10
E10
D14
E26
D32
A32
B26
FBC_WCK0
FBC_WCK0_N
FBC_WCK1
FBC_WCK1_N
FBC_WCK2
FBC_WCK2_N
FBC_WCK3
FBC_WCK3_N
G14
G15
G11
G12
G27
G28
G24
G25
FBCAL_TERM_GND
FBC_CLK0
FBC_CLK0_N
E17
D17
CLKB0
CLKB0#
FBC_DEBUG0
FBB_DEBUG1
FBC_CLK1
FBC_CLK1_N
D23
E23
CLKB1
CLKB1#
1 DIS@
FBCAL_PD_VDDQ
1 DIS@
FBCAL_PU_GND
2
K27
40.2_0402_1%
2
L27
RV59
40.2_0402_1%
1 DIS@ 2
M27
RV60
60.4_0402_1%
1 60.4_0402_1%G19
+VRAM_1.5VS RV105 2 N12PGS@
2
1
G16
RV61
10K_0402_5%
RV58
N12PGS@
CMDB0
FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CMD29
FBC_CMD30
FBC_CMD31
FBC_D0
FBC_D1
FBC_D2
FBC_D3
FBC_D4
FBC_D5
FBC_D6
FBC_D7
FBC_D8
FBC_D9
FBC_D10
FBC_D11
FBC_D12
FBC_D13
FBC_D14
FBC_D15
FBC_D16
FBC_D17
FBC_D18
FBC_D19
FBC_D20
FBC_D21
FBC_D22
FBC_D23
FBC_D24
FBC_D25
FBC_D26
FBC_D27
FBC_D28
FBC_D29
FBC_D30
FBC_D31
FBC_D32
FBC_D33
FBC_D34
FBC_D35
FBC_D36
FBC_D37
FBC_D38
FBC_D39
FBC_D40
FBC_D41
FBC_D42
FBC_D43
FBC_D44
FBC_D45
FBC_D46
FBC_D47
FBC_D48
FBC_D49
FBC_D50
FBC_D51
FBC_D52
FBC_D53
FBC_D54
FBC_D55
FBC_D56
FBC_D57
FBC_D58
FBC_D59
FBC_D60
FBC_D61
FBC_D62
FBC_D63
MEMORY INTERFACE C
<22,23> MDB[0..63]
CMDB2
CMDB3
CMDB4
CMDB5
CMDB6
CMDB7
CMDB8
CMDB9
CMDB10
CMDB11
CMDB12
CMDB13
CMDB14
CMDB15
CMDB16
CMDB18
CMDB19
CMDB20
CMDB21
CMDB22
CMDB23
CMDB24
CMDB25
CMDB26
CMDB27
CMDB28
CMDB29
CMDB30
CMDB0 <22>
CMDB2
CMDB3
CMDB4
CMDB5
CMDB6
CMDB7
CMDB8
CMDB9
CMDB10
CMDB11
CMDB12
CMDB13
CMDB14
CMDB15
CMDB16
<22>
<22>
<22,23>
<22,23>
<22,23>
<22,23>
<22,23>
<22,23>
<22,23>
<22,23>
<22,23>
<22,23>
<22,23>
<22,23>
<23>
CMDB18
CMDB19
CMDB20
CMDB21
CMDB22
CMDB23
CMDB24
CMDB25
CMDB26
CMDB27
CMDB28
CMDB29
CMDB30
<23>
<23>
<22,23>
<22,23>
<22,23>
<22,23>
<22,23>
<22,23>
<22,23>
<22,23>
<22,23>
<22,23>
<22,23>
GB2-128
DATA Bus
Address
0..31
CMD3
CKE_L
CMD8
CMD2
DQMB[7..0]
<22,23>
32..63
A8
A8
CS0#_L
CMD21
A7
A6
CMD24
A2
A1
CMD23
A11
A9
CMD26
A5
A4
CMD7
A0
A12
CMD15
CAS#
CAS#
CMD13
BA1
A3
CMD4
A9
DQSB#[7..0]
<22,23>
CS0#_H
CMD29
BA0
CMD27
BA2
A15
CMD6
A3
BA1
BA0
CMD17
CS1#_H
CMD19
DQSB[7..0]
<22,23>
ODT_H
CMD22
A4
CMD12
A13
A14
CMD28
WE#
A10
CMD10
A1
A2
A10
WE#
CMD9
A12
A0
CMD1
CS1#_L
RAS#
CMD0
ODT_L
CMD5
A6
CMD16
CLKB0 <22>
CLKB0# <22>
CLKB1 <23>
CLKB1# <23>
N12PGSR1@
A5
CMD25
CMD11
A11
CMD18
DQSB0
DQSB1
DQSB2
DQSB3
DQSB4
DQSB5
DQSB6
DQSB7
RAS#
A7
CKE_H
CMD20
RST
RST
CMD14
A14
A13
CMD30
A15
BA2
RV61
10K_0402_5%
N12PGE@
RV105
60.4_0402_1%
N12PGE@
Compal Secret Data
2009/01/01
Issued Date
Deciphered Date
2010/01/01
5
Title

VGA_MEM Interface C
Size
Document Number
Rev
0.1
PHQAA LA-6831P M/B

Date:
Sheet
1
19
of
58
Memory Partition A - Lower 32 bits
MDA[0..63]
UV5
+VRAM_1.5VS
+FBA_VREF0
RV62
1.1K_0402_1%
DIS@
2
1
+FBA_VREF0
RV63
1.1K_0402_1%
DIS@
CV151
0.01U_0402_25V7K
DIS@
CMDA7
CMDA10
CMDA24
CMDA6
CMDA22
CMDA26
CMDA5
CMDA21
CMDA8
CMDA4
CMDA25
CMDA23
CMDA9
CMDA12
CMDA14
CMDA30
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
CMDA29
CMDA13
CMDA27
M2
N8
M3
BA0
BA1
BA2
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
MDA3
MDA6
MDA1
MDA4
MDA2
MDA7
MDA0
MDA5
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
MDA29
MDA26
MDA30
MDA24
MDA27
MDA25
MDA31
MDA28
RV64
243_0402_1%
N12MGE@
J7
K7
K9
Group3
VREFCA
VREFDQ
CMDA7
CMDA10
CMDA24
CMDA6
CMDA22
CMDA26
CMDA5
CMDA21
CMDA8
CMDA4
CMDA25
CMDA23
CMDA9
CMDA12
CMDA14
CMDA30
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
CMDA29
CMDA13
CMDA27
M2
N8
M3
BA0
BA1
BA2
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
CMDA0
CMDA2
CMDA11
CMDA15
CMDA28
DQSA2
DQSA1
F3
C7
DQSL
DQSU
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQMA2
DQMA1
E7
D3
DML
DMU
CLKA0
CLKA0#
CMDA3
MDA19
MDA17
MDA18
MDA16
MDA20
MDA22
MDA21
MDA23
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
MDA14
MDA9
MDA12
MDA11
MDA13
MDA8
MDA15
MDA10
J7
K7
K9
CK
CK
CKE/CKE0
B2
D9
G7
K2
K8
N1
N9
R1
R9
Group1
RV63
1.1K_0402_1%
OPT@
DQSA0
DQSA3
F3
C7
DQSL
DQSU
CV151
0.01U_0402_25V7K
OPT@
RV64
160_0402_1%
N12PGE@
DQMA0
DQMA3
E7
D3
DML
DMU
DQSA#0
DQSA#3
CMDA20
G3
B7
T2
RESET
DQSA#2
DQSA#1
CMDA20
RV67
243_0402_1%
OPT@
ZQ/ZQ0
J1
L1
J9
L9
RV66
243_0402_1%
DIS@
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
RV66
243_0402_1%
OPT@
RV65
10K_0402_5%
DIS@
RV65
10K_0402_5%
OPT@
L8
DQSL
DQSU
B1
B9
D1
D8
E2
E8
F9
G1
G9
G3
B7
T2
L8
J1
L1
J9
L9
RV67
243_0402_1%
DIS@
96-BALL
SDRAM DDR3
K4W1G1646E-HC12_FBGA96
@
CV152
1U_0402_6.3V4Z
OPT@
CV159
1U_0402_6.3V4Z
OPT@
CV154
0.1U_0402_16V4Z
OPT@
CV156
0.1U_0402_16V4Z
OPT@
CV158
0.1U_0402_16V4Z
OPT@
CV162
0.1U_0402_16V4Z
OPT@
CV164
0.1U_0402_16V4Z
OPT@
CV153
1U_0402_6.3V4Z
OPT@
CV160
1U_0402_6.3V4Z
OPT@
CV155
0.1U_0402_16V4Z
OPT@
CV157
0.1U_0402_16V4Z
OPT@
CV161
0.1U_0402_16V4Z
OPT@
CV163
0.1U_0402_16V4Z
OPT@
CV165
0.1U_0402_16V4Z
OPT@
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQSL
DQSU
RESET
ZQ/ZQ0
CMDA0
CMDA3
CV152
DIS@
2
2
1U_0402_6.3V4Z
CV153
DIS@
0.1U_0402_16V4Z
CV154
DIS@
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CV155
DIS@
CV156
DIS@
2
2
0.1U_0402_16V4Z
CV157
DIS@
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
CV158
DIS@
0.1U_0402_16V4Z
RV98
10K_0402_5%
DIS@
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
RV98
10K_0402_5%
OPT@
B1
B9
D1
D8
E2
E8
F9
G1
G9
CKE_L
32..63
A8
A8
CS0#_L
CMD21
A7
A6
CMD24
A2
A1
CMD23
A11
A9
CMD26
A5
A4
CMD7
A0
A12
RV102
10K_0402_5%
DIS@
RV102
10K_0402_5%
OPT@
CV159
DIS@
2
2
1U_0402_6.3V4Z
0.1U_0402_16V4Z
CV160
DIS@
CV161
DIS@
2
2
0.1U_0402_16V4Z
CV162
DIS@
0.1U_0402_16V4Z
CV163
DIS@
2
2
0.1U_0402_16V4Z
CV164
DIS@
CV165
DIS@
0.1U_0402_16V4Z
CMD15
CAS#
CAS#
CMD13
BA1
A3
CMD4
A9
A11
CS0#_H
CMD29
BA0
CMD27
BA2
A15
CMD6
A3
BA1
BA0
CMD17
CS1#_H
CMD19
ODT_H
CMD22
A4
CMD12
A13
A14
CMD28
WE#
A10
CMD10
A1
A2
CMD25
A10
WE#
CMD9
A12
A0
CMD1
CS1#_L
A5
RAS#
CMD11
CMD0
ODT_L
CMD5
A6
RAS#
A7
CKE_H
CMD20
RST
RST
CMD14
A14
A13
CMD30
A15
BA2
Compal Secret Data
2009/01/01
Issued Date
Deciphered Date
2010/01/01
5
CMD3
CMD16
1U_0402_6.3V4Z
0..31
CMD18
+VRAM_1.5VS
1U_0402_6.3V4Z
ODT/ODT0
CS/CS0
RAS
CAS
WE
96-BALL
SDRAM DDR3
@
+VRAM_1.5VS
Address
CMD2
RV62
1.1K_0402_1%
OPT@
K1
L2
J3
K3
L3
<18,21>
<18,21>
DATA Bus
ODT/ODT0
CS/CS0
RAS
CAS
WE
DQSA[7..0]
DQSA#[7..0]
GB2-128
K1
L2
J3
K3
L3
<18,21>
+VRAM_1.5VS
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
<18,21>
DQMA[7..0]
Group2
CMDA0
CMDA2
CMDA11
CMDA15
CMDA28
RV64
160_0402_1%
N12PGS@
E3
F7
F2
F8
H3
H8
G2
H7
CMD8
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
CK
CK
CKE/CKE0
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
CLKA0#
Group0
M8
H1
CLKA0
CLKA0#
CMDA3
<18> CLKA0
<18> CLKA0#
+FBA_VREF0
+VRAM_1.5VS
CLKA0
VREFCA
VREFDQ
E3
F7
F2
F8
H3
H8
G2
H7
UV6
M8
H1
<18,21>
CMDA[30..0]
Title

VGA_VRAM_A Lower
Size
Document Number
Rev
0.1
PHQAA LA-6831P M/B

Date:
Sheet
1
20
of
58
Memory Partition A - Upper 32 bits

MDA[0..63]
UV8
+VRAM_1.5VS
+FBA_VREF1
M8
H1
VREFCA
VREFDQ
CMDA9
CMDA24
CMDA10
CMDA13
CMDA26
CMDA22
CMDA21
CMDA5
CMDA8
CMDA23
CMDA28
CMDA4
CMDA7
CMDA14
CMDA12
CMDA27
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
CMDA29
CMDA6
CMDA30
M2
N8
M3
BA0
BA1
BA2
1
RV68
1.1K_0402_1%
DIS@
2
1
+FBA_VREF1
RV69
1.1K_0402_1%
DIS@
CV166
0.01U_0402_25V7K
DIS@
J7
K7
K9
D7
C3
C8
C2
A7
A2
B8
A3
MDA42
MDA45
MDA40
MDA46
MDA41
MDA47
MDA43
MDA44
Group4
Group5
CK
CK
CKE/CKE0
M8
H1
VREFCA
VREFDQ
CMDA9
CMDA24
CMDA10
CMDA13
CMDA26
CMDA22
CMDA21
CMDA5
CMDA8
CMDA23
CMDA28
CMDA4
CMDA7
CMDA14
CMDA12
CMDA27
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
CMDA29
CMDA6
CMDA30
M2
N8
M3
BA0
BA1
BA2
CLKA1#
CMDA19
CMDA18
CMDA11
CMDA15
CMDA25
MDA58
MDA59
MDA57
MDA61
MDA60
MDA62
MDA56
MDA63
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
MDA51
MDA52
MDA48
MDA53
MDA49
MDA54
MDA50
MDA55
Group7
Group6
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
CMDA19
CMDA18
CMDA11
CMDA15
CMDA25
DQSA7
DQSA6
F3
C7
DQSL
DQSU
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQMA7
DQMA6
E7
D3
DML
DMU
CLKA1
CLKA1#
CMDA16
J7
K7
K9
CK
CK
CKE/CKE0
B2
D9
G7
K2
K8
N1
N9
R1
R9
CV166
0.01U_0402_25V7K
OPT@
RV70
160_0402_1%
N12PGE@
ODT/ODT0
CS/CS0
RAS
CAS
WE
DQSA4
DQSA5
F3
C7
DQSL
DQSU
DQMA4
DQMA5
E7
D3
DML
DMU
DQSA#4
DQSA#5
G3
B7
T2
DQSL
DQSU
RESET
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
CMDA20
T2
L8
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
B1
B9
D1
D8
E2
E8
F9
G1
G9
J1
L1
J9
L9
RV72
243_0402_1%
DIS@
RV72
243_0402_1%
OPT@
96-BALL
SDRAM DDR3
@
CV168
1U_0402_6.3V4Z
OPT@
CV175
1U_0402_6.3V4Z
OPT@
CV170
0.1U_0402_16V4Z
OPT@
CV172
0.1U_0402_16V4Z
OPT@
CV176
0.1U_0402_16V4Z
OPT@
CV178
0.1U_0402_16V4Z
OPT@
CV180
0.1U_0402_16V4Z
OPT@
RESET
ZQ/ZQ0
CMDA16
RV100
10K_0402_5%
DIS@
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
RV100
10K_0402_5%
OPT@
RV104
10K_0402_5%
OPT@
+VRAM_1.5VS
1U_0402_6.3V4Z
CV167
DIS@
2
2
1U_0402_6.3V4Z
CV168
DIS@
0.1U_0402_16V4Z
CV169
DIS@
CV170
DIS@
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CV171
DIS@
2
2
0.1U_0402_16V4Z
CV172
DIS@
1U_0402_6.3V4Z
CV173
DIS@
0.1U_0402_16V4Z
CMD3
CKE_L
CV174
DIS@
CV175
DIS@
2
2
1U_0402_6.3V4Z
0.1U_0402_16V4Z
CV176
DIS@
2
2
0.1U_0402_16V4Z
CV177
DIS@
0.1U_0402_16V4Z
CV178
DIS@
2
2
0.1U_0402_16V4Z
32..63
A8
A8
CS0#_L
CMD21
A7
A6
CMD24
A2
A1
CMD23
A11
A9
CMD26
A5
A4
CMD7
A0
A12
CV179
DIS@
CV180
DIS@
0.1U_0402_16V4Z
CMD15
CAS#
CAS#
CMD13
BA1
A3
CMD4
A9
A11
CS0#_H
CMD29
BA0
CMD27
BA2
A15
CMD6
A3
BA1
BA0
CMD17
CS1#_H
CMD19
ODT_H
CMD22
A4
CMD12
A13
A14
CMD28
WE#
A10
CMD10
A1
A2
CMD25
A10
WE#
CMD9
A12
A0
CMD1
CS1#_L
A5
RAS#
CMD11
CMD0
ODT_L
CMD5
A6
RAS#
A7
CMD16
CKE_H
CMD20
RST
RST
CMD14
A14
A13
CMD30
A15
BA2
Compal Secret Data
2009/01/01
Issued Date
Deciphered Date
2010/01/01
5
RV104
10K_0402_5%
DIS@
96-BALL
SDRAM DDR3
@
+VRAM_1.5VS
DQSL
DQSU
J1
L1
J9
L9
RV71
243_0402_1%
DIS@
RV71
243_0402_1%
OPT@
G3
B7
<18,20>
<18,20>
CMD18
ZQ/ZQ0
DQSA#7
DQSA#6
L8
CV167
1U_0402_6.3V4Z
OPT@
CV174
1U_0402_6.3V4Z
OPT@
CV169
0.1U_0402_16V4Z
OPT@
CV171
0.1U_0402_16V4Z
OPT@
CV173
0.1U_0402_16V4Z
OPT@
CV177
0.1U_0402_16V4Z
OPT@
CV179
0.1U_0402_16V4Z
OPT@
ODT/ODT0
CS/CS0
RAS
CAS
WE
CMDA19
CMDA20
K1
L2
J3
K3
L3
DQSA[7..0]
DQSA#[7..0]
0..31
CMD2
RV69
1.1K_0402_1%
OPT@
K1
L2
J3
K3
L3
<18,20>
DATA Bus
+VRAM_1.5VS
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
<18,20>
DQMA[7..0]
Address
CMD8
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
<18,20>
CMDA[30..0]
GB2-128
RV68
1.1K_0402_1%
OPT@
RV70
160_0402_1%
N12PGS@
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
CLKA1
CLKA1#
CMDA16
<18> CLKA1
<18> CLKA1#
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
+FBA_VREF1
RV70
243_0402_1%
N12MGE@
MDA38
MDA33
MDA39
MDA35
MDA36
MDA34
MDA37
MDA32
+VRAM_1.5VS
CLKA1
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
UV7
Title

VGA_VRAM_A Upper
Size
Document Number
Rev
0.1
PHQAA LA-6831P M/B

Date:
Sheet
1
21
of
58
Memory Partition C - Lower 32 bits

+VRAM_1.5VS
UV9
+FBB_VREF0
RV73
1.1K_0402_1%
8PCS@
CMDB7
CMDB10
CMDB24
CMDB6
CMDB22
CMDB26
CMDB5
CMDB21
CMDB8
CMDB4
CMDB25
CMDB23
CMDB9
CMDB12
CMDB14
CMDB30
+FBB_VREF0
RV74
1.1K_0402_1%
8PCS@
CV181
0.01U_0402_25V7K
8PCS@
CMDB29
CMDB13
CMDB27
UV10
M8
H1
VREFCA
VREFDQ
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
M2
N8
M3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
MDB3
MDB5
MDB2
MDB4
MDB1
MDB6
MDB0
MDB7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
MDB31
MDB25
MDB29
MDB24
MDB28
MDB26
MDB30
MDB27
<19> CLKB0
<19> CLKB0#
J7
K7
K9
CMDB7
CMDB10
CMDB24
CMDB6
CMDB22
CMDB26
CMDB5
CMDB21
CMDB8
CMDB4
CMDB25
CMDB23
CMDB9
CMDB12
CMDB14
CMDB30
Group0
Group3
CMDB29
CMDB13
CMDB27
M8
H1
VREFCA
VREFDQ
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
CMDB0
CMDB2
CMDB11
CMDB15
CMDB28
DQSB2
DQSB1
F3
C7
DQSL
DQSU
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQMB2
DQMB1
E7
D3
DML
DMU
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
BA0
BA1
BA2
CK
CK
CKE/CKE0
M2
N8
M3
CLKB0
CLKB0#
CMDB3
J7
K7
K9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
MDB16
MDB17
MDB19
MDB18
MDB23
MDB21
MDB22
MDB20
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
MDB13
MDB9
MDB14
MDB11
MDB12
MDB8
MDB15
MDB10
CLKB0#
CMDB0
CMDB2
CMDB11
CMDB15
CMDB28
K1
L2
J3
K3
L3
ODT/ODT0
CS/CS0
RAS
CAS
WE
DQSB0
DQSB3
F3
C7
DQSL
DQSU
DQMB0
DQMB3
E7
D3
DML
DMU
K1
L2
J3
K3
L3
ODT/ODT0
CS/CS0
RAS
CAS
WE
Group2
Group1
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
CMDB20
T2
RESET
L8
ZQ/ZQ0
G3
B7
CMDB20
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
DQSL
DQSU
T2
RESET
L8
ZQ/ZQ0
CMDB0
RV78
243_0402_1%
8PCS@
96-BALL
SDRAM DDR3
@
2
RV106
10K_0402_5%
8PCS@
RV111
10K_0402_5%
8PCS@
1U_0402_6.3V4Z
2
2
1U_0402_6.3V4Z
CV183
8PCS@
0.1U_0402_16V4Z
CV184
8PCS@
2
2
0.1U_0402_16V4Z
CV185
8PCS@
0.1U_0402_16V4Z
CV186
8PCS@
2
2
0.1U_0402_16V4Z
CV187
8PCS@
1U_0402_6.3V4Z
CV188
0.1U_0402_16V4Z
8PCS@
CV189
8PCS@
2
2
1U_0402_6.3V4Z
CV190
8PCS@
0.1U_0402_16V4Z
CV191
8PCS@
2
2
0.1U_0402_16V4Z
CV192
8PCS@
2009/01/01
Issued Date
CV193
8PCS@
CV194
8PCS@
2
2
0.1U_0402_16V4Z
A7
A6
CMD24
A2
A1
CMD23
A11
A9
CMD26
A5
A4
CMD7
A0
A12
CMD15
CAS#
CAS#
CMD13
BA1
A3
CMD4
A9
A11
CS0#_H
CMD29
BA0
CMD27
BA2
A15
CMD6
A3
BA1
BA0
CS1#_H
ODT_H
CMD22
A4
CMD12
A13
A5
A14
CMD28
WE#
A10
CMD10
A1
A2
CMD25
A10
WE#
CMD9
A12
A0
CMD1
CS1#_L
RAS#
CMD0
ODT_L
CMD5
A6
RAS#
A7
CKE_H
CMD20
RST
RST
CMD14
A14
A13
CMD30
A15
BA2
CV195
0.1U_0402_16V4Z
8PCS@
A
Deciphered Date
2010/01/01
5
A8
0.1U_0402_16V4Z
Compal Secret Data
A8
CS0#_L
CMD16
+VRAM_1.5VS
CV182
8PCS@
<19,23>
<19,23>
CMD21
CMD11
96-BALL
SDRAM DDR3
@
+VRAM_1.5VS
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
DQSB[7..0]
DQSB#[7..0]
32..63
CMD19
1
RV77
243_0402_1%
8PCS@
RV76
10K_0402_5%
8PCS@
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
J1
L1
J9
L9
CKE_L
CMD17
J1
L1
J9
L9
CMD3
CMD18
DQSL
DQSU
0..31
CMD2
G3
B7
DQSB#2
DQSB#1
Address
CMD8
CMDB3
DQSB#0
DQSB#3
<19,23>
DATA Bus
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
CK
CK
CKE/CKE0
<19,23>
DQMB[7..0]
+VRAM_1.5VS
BA0
BA1
BA2
<19,23>
CMDB[30..0]
GB2-128
CLKB0
CLKB0#
CMDB3
+FBB_VREF0
+VRAM_1.5VS
CLKB0
RV75
160_0402_1%
8PCS@
MDB[0..63]
Title

VGA_VRAM_C Lower

Custom
Date:
Rev
0.1
PHQAA LA-6831P M/B
Sheet
1
22
of
58
Memory Partition C - Upper 32 bits

MDB[0..63]
UV11
RV80
1.1K_0402_1%
8PCS@
CV196
0.01U_0402_25V7K
8PCS@
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
CMDB29
CMDB6
CMDB30
M2
N8
M3
BA0
BA1
BA2
CLKB1
CLKB1
CLKB1#
CMDB16
<19> CLKB1
<19> CLKB1#
RV81
160_0402_1%
8PCS@
J7
K7
K9
CMDB19
CMDB18
CMDB11
CMDB15
CMDB25
CLKB1#
ODT/ODT0
CS/CS0
RAS
CAS
WE
DQSB4
DQSB5
F3
C7
DQSL
DQSU
DQMB4
DQMB5
E7
D3
DML
DMU
DQSB#4
DQSB#5
G3
B7
RESET
L8
ZQ/ZQ0
D7
C3
C8
C2
A7
A2
B8
A3
MDB41
MDB46
MDB42
MDB47
MDB44
MDB45
MDB40
MDB43
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
CMDB19
CMDB18
CMDB11
CMDB15
CMDB25
DQSB7
DQSB6
F3
C7
DQSL
DQSU
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQMB7
DQMB6
E7
D3
DML
DMU
Group5
VREFCA
VREFDQ
CMDB9
CMDB24
CMDB10
CMDB13
CMDB26
CMDB22
CMDB21
CMDB5
CMDB8
CMDB23
CMDB28
CMDB4
CMDB7
CMDB14
CMDB12
CMDB27
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
CMDB29
CMDB6
CMDB30
M2
N8
M3
BA0
BA1
BA2
MDB56
MDB63
MDB57
MDB62
MDB58
MDB60
MDB59
MDB61
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
MDB49
MDB55
MDB48
MDB53
MDB51
MDB52
MDB50
MDB54
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
B2
D9
G7
K2
K8
N1
N9
R1
R9
J7
K7
K9
CK
CK
CKE/CKE0
K1
L2
J3
K3
L3
DQSB#7
DQSB#6
ODT/ODT0
CS/CS0
RAS
CAS
WE
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
G3
B7
CMDB20
DQSL
DQSU
T2
RESET
L8
ZQ/ZQ0
B1
B9
D1
D8
E2
E8
F9
G1
G9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
J1
L1
J9
L9
RV83
243_0402_1%
8PCS@
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
96-BALL
SDRAM DDR3
@
Group6
CV122
390U_2.5V_M_R10
8PCS@
0.1U_0402_16V4Z
CMDB19
CMDB16
RV108
10K_0402_5%
8PCS@
RV112
10K_0402_5%
8PCS@
CV198
8PCS@
2
2
1U_0402_6.3V4Z
CV199
8PCS@
CV200
8PCS@
2
2
0.1U_0402_16V4Z
CV201
8PCS@
CV202
8PCS@
2
2
0.1U_0402_16V4Z
CV203
8PCS@
CV204
0.1U_0402_16V4Z
8PCS@
0..31
CMD3
CKE_L
32..63
A8
A8
CS0#_L
CMD21
A7
A6
CMD24
A2
A1
CMD23
A11
A9
CMD26
A5
A4
CMD7
A0
A12
CMD15
CAS#
CAS#
CMD13
BA1
A3
CMD4
A9
A11
CMD29
BA0
CMD27
BA2
A15
CMD6
A3
BA1
BA0
CMD17
CS1#_H
CMD19
ODT_H
CMD22
A4
CMD12
A13
A5
A14
CMD28
WE#
A10
CMD10
A1
A2
CMD25
A10
WE#
CMD9
A12
A0
CMD1
CS1#_L
RAS#
CMD0
ODT_L
CMD5
A6
0.1U_0402_16V4Z
CV205
8PCS@
2
2
1U_0402_6.3V4Z
CV206
8PCS@
CV207
8PCS@
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z
CV208
8PCS@
CV209
8PCS@
CV210
8PCS@
2
2
0.1U_0402_16V4Z
CV211
0.1U_0402_16V4Z
8PCS@
RAS#
A7
CMD16
1
CS0#_H
CMD11
0.1U_0402_16V4Z
<19,22>
<19,22>
CMD18
96-BALL
SDRAM DDR3
@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
DQSB[7..0]
DQSB#[7..0]
Address
CMD2
+VRAM_1.5VS
<19,22>
DATA Bus
+VRAM_1.5VS
+VRAM_1.5VS
<19,22>
DQMB[7..0]
GB2-128
B1
B9
D1
D8
E2
E8
F9
G1
G9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
<19,22>
CMDB[30..0]
Group7
+VRAM_1.5VS
J1
L1
J9
L9
RV82
243_0402_1%
8PCS@
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
CMD8
CLKB1
CLKB1#
CMDB16
DQSL
DQSU
T2
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
Group4
M8
H1
CMDB20
+FBB_VREF1
+VRAM_1.5VS
CK
CK
CKE/CKE0
K1
L2
J3
K3
L3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
MDB37
MDB35
MDB36
MDB34
MDB38
MDB32
MDB39
MDB33
VREFCA
VREFDQ
CMDB9
CMDB24
CMDB10
CMDB13
CMDB26
CMDB22
CMDB21
CMDB5
CMDB8
CMDB23
CMDB28
CMDB4
CMDB7
CMDB14
CMDB12
CMDB27
E3
F7
F2
F8
H3
H8
G2
H7
+FBB_VREF1
RV79
1.1K_0402_1%
8PCS@
M8
H1
+FBB_VREF1
+VRAM_1.5VS
UV12
CKE_H
CMD20
RST
RST
CMD14
A14
A13
CMD30
A15
BA2
Compal Secret Data
2009/01/01
Issued Date
Deciphered Date
2010/01/01
5
Title

VGA_VRAM_C Upper

Custom
Date:
Rev
0.1
PHQAA LA-6831P M/B
Sheet
1
23
of
58
RV86
15K_0402_1%
N12MGE@
Power Rail
+3VS_DGPU
XCLK_417
ROM_SCLK
+3VS_DGPU
ROM_SI
+3VS_DGPU
STRAP2
+3VS_DGPU
PCI_DEVID[3]
STRAP1
+3VS_DGPU
3GIO_PADCFG[3]
3GIO_PADCFG[2]
3GIO_PADCFG[1]
3GIO_PADCFG[0]
STRAP0
+3VS_DGPU
USER[3]
USER[2]
USER[1]
USER[0]
Resistor Values
2
RV88
34.8K_0402_1%
DIS@
RV84
45.3K_0402_1%
@
RV89
24.9K_0402_1%
N12PGS@
RV89
30K_0402_1%
N12PGE@
RV92
15K_0402_1%
N12PGS@
1
RV91
4.99K_0402_1%
@
1
RV90
4.99K_0402_1%
@
+3VS_DGPU
Logical
Strapping Bit2
FB_0_BAR_SIZE
Logical
Strapping Bit1
SMB_ALT_ADDR
Logical
Strapping Bit0
VGA_DEVICE
PCI_DEVID[4]
SUB_VENDOR
SLOT_CLK_CFG
PEX_PLLEN_TERM
RAMCFG[3]
RAMCFG[2]
RAMCFG[1]
RAMCFG[0]
PCI_DEVID[2]
PCI_DEVID[1]
PCI_DEVID[0]
Pull-up to +3VS
1000
0000
10K
1001
0001
15K
1010
0010
20K
1011
0011
25K
1100
0100
30K
1101
0101
35K
1110
0110
45K
1111
0111
RV92
15K_0402_1%
N12PGE@
RV92
15K_0402_1%
N12MGE@
RV94
10K_0402_1%
OPT@
RV94
10K_0402_1%
DIS@
RV95
15K_0402_1%
@
GPU
RV93
15K_0402_1%
@
X76
DeviceID
ROM_SCLK
STRAP2
0x0A7A
Pull up 15K
Pull up 15K
N12M-GE
N12P-GS
0x0DF4
Pull up 15K
Pull down 25K
N12P-GE
0x0DF5
Pull up 15K
Pull down 30K
SUB_VENDOR
XCLK_417
No VBIOS ROM (Default)
277MHz (Default)
BIOS ROM is present
Reserved
FB_0_BAR_SIZE
USER Straps
256MB (Default)
User[3:0]
Reserved
1000-1100
H5TQ1G63BFR-12C
SA000032400
Samsung K4W1G1646E-HC12
SA000035700
512M
0010
PD 15K
3GIO_PADCFG
PEX_PLL_EN_TERM
3GIO_PADCFG[3:0]
Disable (Default)
Enable
0010
PD 15K
512M
0011
PD 20K
1G
0011
PD 20K
Notebook Default
SLOT_CLOCK_CFG
SD034150280
1G
Customer defined
B
0110
Hynix
Pull-down to Gnd
5K
ROM_SI
ROM_SO
ROM_SCLK
<14> ROM_SI
<14> ROM_SO
<14> ROM_SCLK
Logical
Strapping Bit3
RV88
34.8K_0402_1%
OPT@
2
STRAP0
STRAP1
STRAP2
<14> STRAP0
<14> STRAP1
<14> STRAP2
RV87
45.3K_0402_1%
OPT@
RV85
34.8K_0402_1%
@
1
RV87
45.3K_0402_1%
DIS@
+3VS_DGPU
Physical
Strapping pin
ROM_SO
SD034200280
GPU and MCH don't share a common reference clock
GPU and MCH share a common reference clock (Default)
SMBUS_ALT_ADDR
VGA_DEVICE
0x9E (Default)
3D Device
0x9C (Multi-GPU usage)
VGA Device (Default)
Compal Secret Data
Issued Date
2009/01/01
Deciphered Date
2010/01/01
5
Title

VGA_MSIC

Custom
Date:
Rev
0.1
PHQAA LA-6831P M/B
Sheet
1
24
of
58
R107
R109
C233
150_0603_5%
47K_0402_5%
0.1U_0402_16V4Z
EDP@
EDP@
EDP@
C229
Q1
0.01U_0402_25V7K
2N7002DW-T/R7_SOT363-6
EDP@
EDP@
OPTIMUS
+LCD_VDD
<31> LCD_EDID_DATA
<31> PCH_PWM
<31> UMA_ENVDD
<31> UMA_ENBKL
LVDS_EDID_DATA
2
USB20_N11_R
LCD_ENVDD
<32> USB20_P11
USB20_P11_R
WCM-2012-900T_0805
EC_ENBKL <44>
R112
100K_0402_5%
UMA@
1 CAM@ 2
R96
0_0402_5%
1 2
R109 2 LCDPWR_GATE
1
47K_0402_5%
1
OPT@
C229
0.01U_0402_25V7K
OPT@ 2
EDP@ 2
C251
0.1U_0402_16V7K
W=80mils
OPT@
Q17
AO3413_SOT23
LCDPWR_GATE
W=80mils
3
OPT@ 2
C228
0.1U_0402_16V7K
LED_PWM
EC_ENBKL
1
2
6
1 CAM@ 2
R78
0_0402_5%
L55
@
1 1
2 2
<32> USB20_N11
LCD_ENVDD
+5VS
LVDS_EDID_CLK
+3VS
LVDS_TXCLK-
Q1A
2N7002DW-T/R7_SOT363-6
OPT@
Reserve for EMI request
LVDS_TXCLK+
<31> LCD_EDID_CLK
LVDS_TXOUT2-
R120
100K_0402_5%
EDP@
<31> LCD_TXCLK+
<31> LCD_TXCLK-
LVDS_TXOUT2+
R108
100K_0402_5%
OPT@
<31> LCD_TXOUT2-
LVDS_TXOUT1-
R107
150_0603_5%
OPT@
12
+LCD_VDD
+LCD_VDD
W=80mils
Q1B
2N7002DW-T/R7_SOT363-6
OPT@
R112
100K_0402_5%
OPT@
EDP@
Q23
AO3413_SOT23
C233
0.1U_0402_16V4Z
OPT@
W=80mils
<31> LCD_TXOUT2+
1
LVDS_TXOUT1+
+5VS
<31> LCD_TXOUT1-
LVDS_TXOUT0-
+3VS
<31> LCD_TXOUT1+
R263
0_0402_5%
UMA@
R265
0_0402_5%
UMA@
R277
0_0402_5%
UMA@
R296
0_0402_5%
UMA@
R299
0_0402_5%
UMA@
R350
0_0402_5%
UMA@
<31> LCD_TXOUT0-
R262
0_0402_5%
UMA@
R264
0_0402_5%
UMA@
R298
0_0402_5%
UMA@
R297
0_0402_5%
UMA@
R300
0_0402_5%
UMA@
R332
0_0402_5%
UMA@
R357
0_0402_5%
UMA@
LVDS_TXOUT0+
1 OPT@ 2
R262
0_0402_5%
1 OPT@ 2
R263
0_0402_5%
1 OPT@ 2
R265
0_0402_5%
1 OPT@ 2
R264
0_0402_5%
1 OPT@ 2
R298
0_0402_5%
1 OPT@ 2
R277
0_0402_5%
1 OPT@ 2
R297
0_0402_5%
OPT@
1
2
R296
0_0402_5%
1 OPT@ 2
R300
0_0402_5%
1 OPT@ 2
R299
0_0402_5%
1 OPT@ 2
R332
0_0402_5%
1 OPT@ 2
R350
0_0402_5%
1 OPT@ 2
R357
0_0402_5%
<31> LCD_TXOUT0+
Close to LVDS Connector
LCD/PANEL BD. Conn.
DISCRETE
1 DIS@ 2
R331
0_0402_5%
1 DIS@ 2
R309
0_0402_5%
1 DIS@ 2
R317
0_0402_5%
1 DIS@ 2
R315
0_0402_5%
1 DIS@ 2
R308
0_0402_5%
1 DIS@ 2
R302
0_0402_5%
1 DIS@ 2
R305
0_0402_5%
1 DIS@ 2
R304
0_0402_5%
1 DIS@ 2
R314
0_0402_5%
1 DIS@ 2
R310
0_0402_5%
3D@
1
2
R349
0_0402_5%
1 DIS@ 2
R356
0_0402_5%
1 DIS@ 2
R358
0_0402_5%
<14> VGA_TXOUT0+
2

<14> VGA_TXOUT2<14> VGA_TXCLK+
<14> VGA_TXCLK<13> VGA_EDID_CLK
<13> VGA_EDID_DATA
<13> VGA_BL_PWM
<13> VGA_ENVDD
<13> VGA_ENBKL
LVDS_TXOUT0+
LVDS_TXOUT0-
+3VS
LVDS_TXOUT1+
LVDS_TXOUT1LVDS_TXOUT2+
LVDS_TXOUT2LVDS_TXCLK+
LVDS_TXCLK-
R107
R108
R109
150_0603_5%
100K_0402_5%
47K_0402_5%
CAM@
D84 @
UMA@
UMA@
UMA@
0.1U_0402_16V4Z
2
Q1
C229
1 CAM@ 2 +3VS_LVDS_CAM
1
2
1
R388
0_0603_5%
C225
2N7002DW-T/R7_SOT363-6
0.01U_0402_25V7K
3
JLVDS @
UMA@
UMA@
LVDS_EDID_CLK
PACDN042Y3R_SOT23-3
1 1
2 2
USB20_P11_R
LVDS_EDID_DATA
Q17
3 3
4
4
USB20_N11_R
INT_MIC_CLK
AO3413_SOT23
5 5
INT_MIC_CLK <43>
6 6
INT_MIC_DATA
UMA@
7 7
INT_MIC_DATA <43>
8 8
LVDS_TXOUT0+
LED_PWM
R387 2 NO3D@ 1 0_0402_5%
9 9
INVT_PWM <44>
10 10
LVDS_TXOUT0BKOFF#_R
11 11
12
2
1
BKOFF#
<44>
12
LVDS_TXOUT1+
R103
33_0402_5%
R143
EDP@
13 13
14
1
2
EDP_HPD <13>
14
LVDS_TXOUT1LCD_ENVDD
0_0402_5%
15 15
1
2
16 16
LVDS_TXOUT2+
R113
10K_0402_5%
17 17
18 18
LVDS_TXOUT2+3VS_LVDSDDC
19 19
20
2 R1440 1 NOEDP@
+3VS
20
LVDS_TXCLK+
0_0603_5%
21 21
3A
22 22
LVDS_TXCLK23 23
+LCD_VDD
24 24
25 25
26
For
EMI
1
1
26
27 27
1
1
+LCD_INV
28 28
C226
C227
@
29 29
30 30
0.1U_0402_16V4Z
4.7U_0805_10V4Z
C231
C232
2
2
680P_0402_50V7K
0.1U_0402_16V4Z
31 GND1
2
2
32 GND2
W=20mils
+3VS
LVDS_EDID_CLK
LVDS_EDID_DATA
2 R1434
1 LVDS_EDID_DATA
100K_0402_5%
2 R1435
1 LVDS_EDID_CLK
100K_0402_5%
EDP@
LED_PWM
EDP@
LCD_ENVDD
EC_ENBKL
C228
0.1U_0402_16V7K
UMA@
C233
0.1U_0402_16V4Z
UMA@
2
ACES_87242-3001-09

+LCD_INV
DISCRETE for Full-HD and 3D LVDS Panel
<14> VGA_TZOUT2+
<14> VGA_TZOUT2<14> VGA_TZCLK+
<14> VGA_TZCLK-
LVDS_TZOUT0+
LVDS_TZOUT0LVDS_TZOUT1+
LVDS_TZOUT2LVDS_TZCLK+
LVDS_TZCLK-
+5VALW
LVDS_TZCLK-
Close to LVDS1 Connector
1
2
3
4
5
6
7
8
9
10
11
12
<14> VGA_EDP_TX0+
4

<14> VGA_EDP_TX3<14> VGA_EDP_AUX
<14> VGA_EDP_AUXA
C881
C882
C883
C884
C885
C886
C887
C888
C889
C228
0.1U_0402_16V7K
NO3D@
C229
0.01U_0402_25V7K
NO3D@
C233
0.1U_0402_16V4Z
NO3D@
B+
For EMI
1
GND1
GND2
1
C268
1
C489
@
1
C490
LVDS_TZOUT0+
LVDS_TZOUT14
LVDS_TZOUT2+
LVDS_TZCLK-
Issued Date
200910/9
2010/01/23
Deciphered Date

C
Compal Secret Data
Close to LVDS1 Connector
EDP@
1
20.1U_0402_16V7K LVDS_EDID_CLK
EDP@
1
20.1U_0402_16V7K LVDS_EDID_DATA
B
Q1
2N7002DW-T/R7_SOT363-6
NO3D@
R109
47K_0402_5%
NO3D@
Q17
AO3413_SOT23
NO3D@
1
2
3
4
5
6
7
8
9
10
ACES_87213-1000N
@
DISCRETE for Full-HD and 3D eDP Panel

EDP@
1
20.1U_0402_16V7K
EDP@
1
20.1U_0402_16V7K
EDP@
1
20.1U_0402_16V7K
EDP@
1
20.1U_0402_16V7K
EDP@
1
20.1U_0402_16V7K
EDP@
1
20.1U_0402_16V7K
EDP@
1
20.1U_0402_16V7K
EDP@
1
20.1U_0402_16V7K
R108
100K_0402_5%
NO3D@
JLVDS1
C236
C880
R107
150_0603_5%
NO3D@
0.1U_0402_25V6
<14> VGA_TZOUT1-
LVDS_TZOUT1+
C235
0.1U_0402_25V6
2
0.1U_0402_25V6
<14> VGA_TZOUT1+
C234
68P_0402_50V8J
2
LVDS_TZOUT0-
0.1U_0402_25V6
<14> VGA_TZOUT0-
0.1U_0402_25V6
1 3D@
2
R500
0_0402_5%
1 3D@
2
R501
0_0402_5%
1 3D@
2
R502
0_0402_5%
1 3D@
2
R503
0_0402_5%
1 3D@
2
R504
0_0402_5%
1 3D@
2
R505
0_0402_5%
1 3D@
2
R507
0_0402_5%
1 3D@
2
R508
0_0402_5%
<14> VGA_TZOUT0+
3
For 3D Panel
LVDS_TZOUT0+
B+
L2
2
1
FBMA-L11-201209-221LMA30T_0805
1
Title
LVDS/eDP
Custom
Rev
0.1
PHQAA LA-6831P M/B
Date:

G
Sheet
25
H
of
58
D4
D5
CRT CONNECTOR
D3
+3VS
If=1A
+5VS
2 NBQ100505T-800Y_0402
CRT_R_L
L4
2 NBQ100505T-800Y_0402
CRT_G_L
CRT_B
L5
2 NBQ100505T-800Y_0402
CRT_HSYNC
CRT_VSYNC
1
1
RB491D_SOT23-3
2
1
1.1A_6V_MINISMDC110F-2
C237
0.1U_0402_16V4Z
2
@
JCRT
R200
0_0402_5%
UMA@
R204
0_0402_5%
UMA@
R211
0_0402_5%
UMA@
R213
0_0402_5%
UMA@
R235
0_0402_5%
UMA@
R236
0_0402_5%
UMA@
C238
C239
C240
1
C241
1
C242
1
C243
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
CRT_R_L
2.2P_0402_50V8C
Close to CRT Connector
2.2P_0402_50V8C
R138 R139 R140
2.2P_0402_50V8C
CRT_DATA
CRT_B_L
CRT_CLK
2.2P_0402_50V8C
<31> UMA_CRT_DATA
L3
CRT_G
2.2P_0402_50V8C
<31> UMA_CRT_CLK
CRT_R
CRT_B
2.2P_0402_50V8C
<31> UMA_CRT_VSYNC
+CRT_VCC
40 mils
F1
CRT_G
2
1
150_0402_1%
<31> UMA_CRT_HSYNC
DAN217_SC59
2
1
150_0402_1%
<31> UMA_CRT_G
<31> UMA_CRT_B
DAN217_SC59
CRT_R
2
1
150_0402_1%
1 OPT@ 2
R200
0_0402_5%
1 OPT@ 2
R204
0_0402_5%
1 OPT@ 2
R211
0_0402_5%
1 OPT@ 2
R213
0_0402_5%
1 OPT@ 2
R235
0_0402_5%
1 OPT@ 2
R236
0_0402_5%
1 OPT@ 2
R261
0_0402_5%
<31> UMA_CRT_R
DAN217_SC59
OPTIMUS
1
+CRT_VCC_R
D6
CRT_DDC_DAT
CRT_G_L
HSYNC
CRT_B_L
+CRT_VCC
VSYNC
CRT_DDC_CLK
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
G
G
16
17
ALLTO_C10532-11505-L_15P-T
+CRT_VCC
2
0.1U_0402_16V4Z
<13> VGA_CRT_VSYNC
<13> VGA_CRT_CLK
<13> VGA_CRT_DATA
CRT_B
1
L6
2
10_0402_5%
CRT_VSYNC
CRT_HSYNC
D_CRT_VSYNC
1
L7
2
10_0402_5%
HSYNC
5
1
CRT_G
D_CRT_HSYNC
+CRT_VCC
U6
SN74AHCT1G125GW _SOT353-5
P
OE#
U7
SN74AHCT1G125GW _SOT353-5
CRT_VSYNC
C245
@
VSYNC
CRT_CLK
CRT_DATA
1
C246
@
10P_0402_50V8J
<13> VGA_CRT_HSYNC
<13> VGA_CRT_B
CRT_R
1
10K_0402_5%
<13> VGA_CRT_G
CRT_HSYNC
1 DIS@
2
R178
0_0402_5%
1 DIS@
2
R181
0_0402_5%
1 DIS@
2
R167
0_0402_5%
1 DIS@
2
R177
0_0402_5%
1 DIS@
2
R179
0_0402_5%
1 DIS@
2
R193
0_0402_5%
1 DIS@
2
R194
0_0402_5%
P
OE#
DISCRETE
<13> VGA_CRT_R
2
R141
5
1
1
C244
10P_0402_50V8J
R261
0_0402_5%
UMA@
Close to CRT Connector

3
+CRT_VCC
+3VS
5
Q205B
4
CRT_DATA
1
C282
33P_0402_50V8K
2
@
2
Q205A
1
CRT_CLK
R159
4.7K_0402_5%
R153
4.7K_0402_5%
CRT_DDC_CLK
2N7002DW -T/R7_SOT363-6
CRT_DDC_DAT
2N7002DW -T/R7_SOT363-6
C285
33P_0402_50V8K
2 @
C284
470P_0402_50V8J
@
C283
470P_0402_50V8J
2 @
Compal Secret Data
200910/9
Issued Date
Deciphered Date
2010/01/23
A
Title
CRT
Size
Document Number
Rev
0.1
PHQAA LA-6831P M/B

Date:
Sheet
E
26
of
58
P3_7/CNTR0#/SSO/TXD1
P1_5/RXD0/CNTR01/INT11#
11
CEC_INT#
12
CEC_TEST
1 1
2 CEC@ 1CEC_XOUT 4
R171
47K_0402_5%
2 CEC@ 1CEC_XIN
R174
47K_0402_5%
HDMI_CEC
P1_4/TXD0
13
CEC_FSHUPD1 CEC@ 2
R170
4.7K_0402_5%
XOUT/P4_7
P1_3/KI3#/AN11/TZOUT
CEC_FSHUPD (Pin13)
Low= Force to update flash.
14
VSS/AVSS
P1_2/KI2#/AN10/CMP0_2
XIN/P4_6
P4_2/VREF
19
HDMI_HPD_R
1
3
P1_1/KI1#/AN9/CMP0_1
MODE
HDMI_CLK
HDMI_DATA
2
G
VCC/AVCC
Q50
2N7002_SOT23-3
CEC@
R165
100K_0402_5%
CEC@
2 CEC@ 1
R176
4.7K_0402_5%
C262
1
0.1U_0402_16V4Z
CEC@
HDMI_CECIN
HDMI_CECOUT
9
10
P4_5/INT0#/RXD1
P3_3/TCIN/INT3#/SSI00/CMP1_0
P1_7/CNTR00/INT10#
P3_4/SCS#/SDA/CMP1_1
20
HDMI_SCLK
HDMI_SDATA
1
Q48
BSH111_SOT23-3
CEC@
EC_SMB_DA1 <44,49>
Q47
BSH111_SOT23-3
CEC@
HDMI_DATA
16
R164
4.7K_0402_5%
CEC@
18
1
C848
1
C263
17
CEC@
2
1U_0402_6.3V4Z
2
0.1U_0402_16V4Z
CEC@
HDMI_CLK
15
+3VL
1 R163
2
27K_0402_5%
CEC@
R166
4.7K_0402_5%
CEC@
+3VL
+3VL
2
G
RESET#
CEC_INT# <44> +3VL

1 CEC@ 2
R168
4.7K_0402_5%
P1_6/CLK0/SSI01
2 CEC@ 1CEC_RST#
R169
4.7K_0402_5%
R581
27K_0402_5%
CEC@
HDMI_CECOUT
P3_5/SSCK/SCL/CMP1_2
D9
CH751H-40PT_SOD323-2
CEC@
R162
10K_0402_5%
CEC@
Q49
2N7002_SOT23-3
CEC@
+3VL
HDMI_CECIN
U16
Address: 0011010X
<44,49> EC_SMB_CK1
+3VL
+3VL
HDMI CEC Controller
R5F211A4C33SP-W4_LSSOP20
CEC@
+3VS
+3VS_DGPU
+HDMI_5V_OUT
<14> VGA_HDMI_TX0-
CV298
2 0.1U_0402_16V7K DHDMI@
VGA_DVI_TXD1-
CV295
2 0.1U_0402_16V7K DHDMI@
VGA_DVI_TXD2+
CV300
2 0.1U_0402_16V7K DHDMI@
VGA_DVI_TXD2-
VGA_DVI_TXD0-
2
R401
<14> VGA_HDMI_DATA
2
R438
<31> UMA_HDMI_DATA
Q18
BSH111_SOT23-3
HDMI@
1
DHDMI@
1
3
0_0402_5%
5
P
VGA_DVI_TXD1+
74AHCT1G125GW_SOT353-5
HDMI@
C265
0.1U_0402_16V4Z
HDMI@
2 0.1U_0402_16V7K DHDMI@
U9
OE#
2 0.1U_0402_16V7K DHDMI@
CV299
CV297
DHDMI@
2
1
R391
0_0402_5%
<14> VGA_HDMI_CLK
HDMI_HPD_C
R186
100K_0402_5%
HDMI@
HDMI_HPD_R
VGA_DVI_TXD0+
R185
2.2K_0402_5%
HDMI@
VGA_DVI_TXC-
2 0.1U_0402_16V7K DHDMI@
HDMI_SCLK
2 0.1U_0402_16V7K DHDMI@
R184
2.2K_0402_5%
HDMI@
HDMI_SDATA
+3VL
<14> VGA_HDMI_TX2-
CV294
<14> VGA_HDMI_TX2+
CV293
<31> UMA_HDMI_CLK
<14> VGA_HDMI_TX1-
VGA_DVI_TXC+
<14> VGA_HDMI_TX1+
2 0.1U_0402_16V7K DHDMI@
C264
0.1U_0402_16V4Z
HDMI@
<14> VGA_HDMI_TX0+
<14> VGA_HDMI_CLK-
CV296
<14> VGA_HDMI_CLK+
IHDMI@
2
1
R435
0_0402_5%
For DISCRETE
HDMI@
R145
HDMI_HPD_U 1
2
1K_0402_5%
+5VL
R453
R452
0_0402_5% 0_0402_5%
IHDMI@
DHDMI@
IHDMI@
Q19
BSH111_SOT23-3
1
0_0402_5%
HDMI@
HDMI@
2
1
R570
100K_0402_5%
HDMI@
2
1
R571
2.2K_0402_5%
+3VS
D55
HDMI_HPD_R
HDMI_HPD
<13,31,33>
HDMI@
<31> UMA_HDMI_TXC+
B
<31> UMA_HDMI_TXC<31> UMA_HDMI_TX0+

<31> UMA_HDMI_TX0<31> UMA_HDMI_TX1+
<31> UMA_HDMI_TX1<31> UMA_HDMI_TX2+
<31> UMA_HDMI_TX2-
CV308
2 0.1U_0402_16V7K IHDMI@
VGA_DVI_TXC+
CV304
2 0.1U_0402_16V7K IHDMI@
VGA_DVI_TXC-
CV306
2 0.1U_0402_16V7K IHDMI@
VGA_DVI_TXD0+
CV302
2 0.1U_0402_16V7K IHDMI@
CV303
2 0.1U_0402_16V7K IHDMI@
VGA_DVI_TXC+
VGA_DVI_TXD0-
2 0.1U_0402_16V7K IHDMI@
VGA_DVI_TXD1-
CV307
2 0.1U_0402_16V7K IHDMI@
VGA_DVI_TXD2+
2 0.1U_0402_16V7K IHDMI@
VGA_DVI_TXD2-
VGA_DVI_TXD0+
1
R175
L9
1
4
VGA_DVI_TXD1-
2
0_0402_5%
HDMI@
2
2
1
R182
L10
1
4
VGA_DVI_TXD2+
2
0_0402_5%
HDMI@
2
2
1
R187
L11
1
1
4
1 DHDMI@2
R195
499_0402_1%
1 DHDMI@2
R197
499_0402_1%
HDMI_R_D1- 1 DHDMI@2
R198
499_0402_1%
HDMI_R_D1+ 1 DHDMI@2
R202
499_0402_1%
R201
499_0402_1%
R203
499_0402_1%
R205
499_0402_1%
R206
499_0402_1%
HDMI_R_CK-
HDMI_R_CK+
HDMI_R_D0+
@
1
2
R207 100K_0402_5%
D54
+5VL
PMEG2010AEH_SOD123
CEC@
Q24
2N7002_SOT23-3
HDMI@
HDMI Connector
JHDMI
HDMI_HPD_C
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
+HDMI_5V_OUT
HDMI_R_D1+
HDMI_R_D2+
R195
680_0402_5%
IHDMI@
R197
680_0402_5%
IHDMI@
R198
680_0402_5%
IHDMI@
R202
680_0402_5%
IHDMI@
R201
680_0402_5%
IHDMI@
R203
680_0402_5%
IHDMI@
R205
680_0402_5%
IHDMI@
R206
680_0402_5%
IHDMI@
HDMI_SDATA
HDMI_SCLK
HDMI_CEC
HDMI_R_CKHDMI_R_CK+
HDMI_R_D0HDMI_R_D0+
HDMI_R_D1HDMI_R_D1+
HDMI_R_D2HDMI_R_D2+
07/10/2010
Intel DG P.132
HDMI_R_D2-
Issued Date
20
21
22
23
Compal Secret Data

200910/9
HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKGND
CK_shield GND
CK+
GND
D0GND
D0_shield
D0+
D1D1_shield
D1+
D2D2_shield
D2+
TYCO_1939864-1_19P
2010/01/23
Deciphered Date
4
F2
+HDMI_5V_OUT_F 2
1
+HDMI_5V_OUT
1.1A_6V_MINISMDC110F-21
HDMI@
C259
HDMI@
0.1U_0402_16V4Z
2
HDMI_R_D1-
PMEG2010AEH_SOD123
HDMI_R_D0-
OCE2012120YZF
@
1
2
R188
0_0402_5%
HDMI@
D53
+5VS
2
G
+5VS
2
0_0402_5%
HDMI@
2
2
3
HDMI_R_CK+
OCE2012120YZF
@
1
2
R183
0_0402_5%
VGA_DVI_TXD1+
HDMI_R_CK-
OCE2012120YZF
@
1
2
R180
0_0402_5%
VGA_DVI_TXD0-
VGA_DVI_TXD2-
2
0_0402_5%
HDMI@
2
2
OCE2012120YZF
@
1
2
R173
0_0402_5%
VGA_DVI_TXD1+
CV301
CV305
For Optimus
1
R157
L8
VGA_DVI_TXC-
Title
HDMI Conn./CEC
Size
Document Number
Rev
0.1
PHQAA LA-6831P M/B

Date:
Sheet
1
27
of
58
U2A
@
2
C248 1
1U_0402_6.3V4Z
R286 1
<43> AZ_BITCLK_HD
Integrated SUS 1.05V VRM Enable

High - Enable Internal VRs
PCH_INTVRMEN (must be always pulled high)
2 33_0402_5%
<43> PCH_SPKR
R142 1
<43> AZ_RST_HD#
+RTCVCC
2 33_0402_5%
2
1M_0402_5%
2
330K_0402_5%
R118 1
+3VS
SM_INTRUDER#
K22
PCH_INTVRMEN
C17
AZ_BITCLK
N34
AZ_SYNC
L34
PCH_SPKR
T10
AZ_RST#
K34
RTCX1
RTCX2
C34
2
R273
+3VALW_PCH
1
1K_0402_5%
R289 1
FWH4 / LFRAME#
INTRUDER#
<44> PWRME_CTRL#
+3VALW_PCH
<41> CR_CPPE#
CR_CPPE#
2
10K_0402_5%
2
1K_0402_5%
AZ_SDOUT
SERIRQ
HDA_BCLK
HDA_SYNC
SPKR
C36
CR_CPPE#
N32
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
HDA_SDIN0
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
HDA_SDO
HDA_DOCK_EN# / GPIO33
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
HDA_DOCK_RST# / GPIO13
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
HDA_SDO
PWRME_CTRL#
ME debug mode,
this signal has a weak internal pull down
= Disable (default)
*Low
High = Enable (flash descriptor security overide)
PCH_JTAG_TCK
J3
T37 PAD
PCH_JTAG_TMS
H7
T38 PAD
PCH_JTAG_TDI
K5
T39 PAD
PCH_JTAG_TDO
H1
JTAG_TCK
JTAG_TMS
JTAG_TDI
SATAICOMPO
SATAICOMPI
JTAG_TDO
SATA3RCOMPO
HDA_SYNC
SATA3COMPI
down
L=>On Die PLL is supplied by 1.8V

Need to pull high for Huron River platform
1
1K_0402_5%
C494
0.1U_0402_16V4Z
8
2
BSS138_NL_SOT23-3
@
1
2
R285
0_0402_5%
PCH_SPIDI
PCH_SPICLK
PCH_SPICS#
PCH_SPIDO
R572
R573
R574
R575
1
1
1
1
R569 2
+3VS
@
@
@
@
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
1 @
0_0603_5%
2
2
2
2
3
7
DI
CLK
CS#
DO
CS#
CLK
DI
VCC
VSS
SPI_MOSI
SATALED#
SATA0GP / GPIO21
SPI_MISO
for EMI
D36
LPC_FRAME#
E36
K36
FELICA_PWR
V5
SERIRQ
AM3
AM1
AP7
AP5
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
<44,45>
<44,45>
<44,45>
<44,45>
LPC_FRAME# <44,45>
+3VS
FELICA_PWR
<38>
SERIRQ
SERIRQ <44,45>
SATA_PRX_C_DTX_N0
SATA_PRX_C_DTX_P0
SATA_PTX_DRX_N0
SATA_PTX_DRX_P0
SATA_PRX_C_DTX_N0 <37>
SATA_PRX_C_DTX_P0 <37>
SATA_PTX_DRX_N0 <37>
SATA_PTX_DRX_P0 <37>
SATA_PRX_C_DTX_N2
SATA_PRX_C_DTX_P2
SATA_PTX_DRX_N2
SATA_PTX_DRX_P2
1
10K_0402_5%
+3VS
HDD
AM10
AM8
AP11
AP10
AD7
AD5
AH5
AH4
2
R136
ODD
SATA_LED#
R336 2
1 10K_0402_5%
CR_WAKE#
R334 2
1 10K_0402_5%
PCH_GPIO19
R335 1
2 10K_0402_5%
AB8
AB10
AF3
AF1
+RTCBATT
Y7
Y5
AD3
AD1
D13
BAS40-04_SOT23-3
+RTCVCC
Y3
Y1
AB3
AB1
C486
+3VL
0.1U_0402_16V4Z
2
Y11
Y10
SATAICOMP
1
R279
2
37.4_0402_1%
+1.05VS_VCC_SATA
SATA3_COMP
1
R280
2
49.9_0402_1%
+1.05VS_SATA3
1
R281
2
750_0402_1%
AB12
AB13
AH1
RBIAS_SATA3
P3
SATA_LED#
V14
CR_WAKE#
P1
PCH_GPIO19
SATA1GP / GPIO19
COUGARPOINT_FCBGA989~D
SATA_LED# <46>
CR_WAKE# <41>
PCH_GPIO19
<32>
BOOT BIOS Strap Bit 0
Q65R1@
CLK
HOLD
R397
10_0402_5%
@
S
C
D
DO
C86
10P_0402_50V8J
@
W25Q64BVSSIG_SO8
45@
Socket: SP07000F500/SP07000H900
Please close to U2 PCH
+3V_SPI
+5VALW
For MP phase
+5VALW
14
+3V_SPI
VCC
GND
+3VALW_PCH
1
PCH_JTAG_TMS
R306
100_0402_1%
DI
CLK
CS#
DO
R278
200_0402_5%
R330
200_0402_5%
PCH_JTAG_TDO
R363
200_0402_5%
PCH_JTAG_TDI
1
3
+3V_SPI
C482
SPI@
0.1U_0402_16V4Z
R301
100_0402_1%
R295
100_0402_1%
PCH_JTAG_TCK
2
51_0402_1%
1
R355
C456
SN74CBT3125PWRG4_TSSOP14
SPI@
SPI@
0.1U_0402_16V4Z
Issued Date
Compal Secret Data
Please close to U2 PCH,and between U2 & U13
200910/9
2010/01/23
Deciphered Date
5
+3VALW_PCH
+3VALW_PCH
3
6
8
11
Q37
SPI@
AO3416_SOT23-3
SPI@
LM393DG_SO8
2
1B
2B
3B
4B
RB715FGT106_UMD3
R226
SPI@
100K_0402_5%
2
G
SPI@
R432
SPI@
10K_0402_5%
U56B
SUSP#
1OE#
2OE#
3OE#
4OE#
1A
2A
3A
4A
1
2
+5VALW
2
5
9
12
KSI6
KSI5
KSI4
KSI7
+3VALW
C483
SPI@
0.1U_0402_16V4Z
<44,45,46>
SPIDI
<44,45>
SPICLK
<44,45>
SPICS#
<44,45>
SPIDO
D43
<39,44,47,52,54,56>
1
4
10
13
+5VALW
U53
<44,46,51> EC_ON
SPI@
LM393DG_SO8
U56A
SN74CBT3125PWRG4_TSSOP14
C455
SPI@
SPI@
0.1U_0402_16V4Z
EC_ON
8
P
1
DI
CLK
CS#
DO
GND
3
6
8
11
VCC
1B
2B
3B
4B
EC_ON
14
+3VS
1A
2A
3A
4A
R217
SPI@
100K_0402_5%
R418
SPI@
10K_0402_5%
2
1
SPI@
0.1U_0402_16V4Z
2
5
9
12
<44,45> KSO6
1OE#
2OE#
3OE#
4OE#
PCH_SPIDI
PCH_SPICLK
PCH_SPICS#
PCH_SPIDO
U51
C249
1
4
10
13
2
Q21
1
SATA3RBIAS
SPI_CS1#
U3
U13
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
SPI_CS0#
V4
PCH_SPIDO
SPI_CLK
T1
PCH_SPIDI
8M Byte
AZ_SYNC_R
2
33_0402_5%
1
R156
Y14
+3V_SPI
AZ_SYNC
+5VS
<43> AZ_SYNC_HD
T3
PCH_SPICS#
C38
A38
B37
C37
2
R284
+3VALW_PCH
PCH_SPICLK
SPI
signal has a weak internal pull

*This
H=>On Die PLL is supplied by 1.5V
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
HDA_RST#
A36
PWRME_CTRL#
LDRQ0#
LDRQ1# / GPIO23
INTVRMEN
A34
2 33_0402_5%
/ LAD0
/ LAD1
/ LAD2
/ LAD3
SRTCRST#
PCH_SPKR
<43> AZ_SDOUT_HD
FWH0
FWH1
FWH2
FWH3
RTCRST#
E34
PCH_INTVRMEN
High = Enabled (No Reboot)

Low = Disabled (Default)
G22
G34
2
1K_0402_5%
1
R560
1
R274
D20
PCH_SRTCRST#
SM_INTRUDER#
1
R276
PCH_RTCRST#
AZ_SDIN0_HD
<43> AZ_SDIN0_HD
R117 1
C20
A20
PCH_RTCX2
LPC
OSC
32.768KHZ_12.5PF_Q13MC14610002
2
1
C205
15P_0402_50V8J
PCH_RTCX1
2PCH_SRTCRST#
NC
R293 1
20K_0402_5%
JME
1
OSC
iME Setting.
1
15P_0402_50V8J
NC
SATA 6G
SATA
2
C216
Y3
RTC
C247 1
1U_0402_6.3V4Z
IHDA
JCOMS @
1
2
PCH_RTCRST#
JTAG
R292 1
20K_0402_5%
R291
10M_0402_5%
2
1
CMOS Setting, near DDR Door

+RTCVCC
Title
PCH_HDA/JTAG/SATA/SPI/LPC
Custom
Rev
0.1
PHQAA LA-6831P M/B
Date:
Sheet
1
28
of
58
U2B
NewCard
USB30
PERN2
PERP2
PETN2
PETP2
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
PCIE_PRX_JETTX_N3
PCIE_PRX_JETTX_P3
PCIE_PTX_JETRX_N3
PCIE_PTX_JETRX_P3
BG36
BJ36
AV34
AU34
PERN3
PERP3
PETN3
PETP3
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
PCIE_PRX_C_CRTX_N4
PCIE_PRX_C_CRTX_P4
PCIE_PTX_CRRX_N4
PCIE_PTX_CRRX_P4
BF36
BE36
AY34
BB34
PERN4
PERP4
PETN4
PETP4
<39>
<39>
<39>
<39>
PCIE_PRX_JETTX_N3
PCIE_PRX_JETTX_P3
PCIE_PTX_C_JETRX_N3
PCIE_PTX_C_JETRX_P3
C505 1
C503 1
<41>
<41>
<41>
<41>
PCIE_PRX_C_CRTX_N4
PCIE_PRX_C_CRTX_P4
PCIE_PTX_C_CRRX_N4
PCIE_PTX_C_CRRX_P4
C504 1
C868 1
<39>
<39>
<39>
<39>
PCIE_PRX_NEWTX_N5
PCIE_PRX_NEWTX_P5
PCIE_PTX_C_NEWRX_N5
PCIE_PTX_C_NEWRX_P5
NEW@
C499 2
1 0.1U_0402_16V7K
C500 2
1 0.1U_0402_16V7K
<42>
<42>
<42>
<42>
PCIE_PRX_C_USBTX_N6
PCIE_PRX_C_USBTX_P6
PCIE_PTX_C_USBRX_N6
PCIE_PTX_C_USBRX_P6
NEW@
C519 1
C869 1
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
PCIE_PRX_NEWTX_N5
PCIE_PRX_NEWTX_P5
PCIE_PTX_NEWRX_N5
PCIE_PTX_NEWRX_P5
BG37
BH37
AY36
BB36
PCIE_PRX_C_USBTX_N6
PCIE_PRX_C_USBTX_P6
PCIE_PTX_USBRX_N6
PCIE_PTX_USBRX_P6
BJ38
BG38
AU36
AV36
PERN6
PERP6
PETN6
PETP6
BG40
BJ40
AY40
BB40
PERN7
PERP7
PETN7
PETP7
+3VS
R287 1
2 10K_0402_5% CLKREQ_JET#
R338 1
2 10K_0402_5% CLKREQ_WLAN#
BE38
BC38
AW 38
AY38
<40> CLK_LAN#
<40> CLK_LAN
LAN
<40> CLKREQ_LAN#
WLAN
<39> CLK_WLAN#
<39> CLK_WLAN
<39> CLKREQ_WLAN#
<39> CLK_JET#
<39> CLK_JET
JET
<39> CLKREQ_JET#
<41> CLK_CR#
<41> CLK_CR
Card Reader
CLK_LAN#
CLK_LAN
Y40
Y39
CLKREQ_LAN#
J2
CLK_WLAN#
CLK_WLAN
AB49
AB47
CLKREQ_WLAN#
M1
CLK_JET#
CLK_JET
AA48
AA47
CLKREQ_JET#
V10
CLK_CR#
CLK_CR
Y37
Y36
CLKREQ_CR#
NewCard
<39> CLK_NEW#
<39> CLK_NEW
<39> CLKREQ_NEW#
<42> CLK_USB30#
<42> CLK_USB30
USB30
+3VALW_PCH
<42> CLKREQ_USB30#
R343 1
210K_0402_5%
CLKREQ_LAN#
R344 1
210K_0402_5%
CLKREQ_NEW#
R345 1
210K_0402_5%
CLKREQ_CR#
R346 1
210K_0402_5% CLKREQ_USB30#
R348 1
210K_0402_5%
PCH_GPIO46
R351 1
210K_0402_5%
PCH_GPIO56
<10> CLK_RES_ITP#
<10> CLK_RES_ITP
<5> CLK_CPU_ITP#
<5> CLK_CPU_ITP
A8
CLK_NEW#
CLK_NEW
Y43
Y45
2
2
R352
R353
2
2
@
@
PCIECLKRQ0# / GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P
PCH_SMLDATA0
SML1ALERT# / PCHHOT# / GPIO74
C13
PCH_GPIO74
SML1CLK / GPIO58
E14
PCH_SMLCLK1
M16
PCH_SMLDATA1
+3VS
Q3B
PCH_SMBDATA
R400
R386
3
Q3A
4.7K_0402_5%
4.7K_0402_5%
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
DRAMRST_CNTRL_PCH <7>
+3VALW_PCH
2 R364
1 2.2K_0402_5%
2 R385
1 2.2K_0402_5%
+3VS
PCH_SMLDATA1
3
Q4A
PCH_SMLCLK1
EC_SMB_DA2 <14,44,45,46>
2N7002DW-T/R7_SOT363-6
EC_SMB_CK2 <14,44,45,46>
2N7002DW-T/R7_SOT363-6
CL_CLK1
M7
CL_DATA1
T11
CL_RST1#
P10
Control Link only for support Intel IAMT.

+3VALW_PCH
M10
CLK_REQ_VGA#
CLK_REQ_VGA# <13>
EC_LID_OUT#
R123 1
2 10K_0402_5%
DRAMRST_CNTRL_PCH
R228 1
2 10K_0402_5%
PCH_GPIO74
R234 1
2 10K_0402_5%
PCH_SMLCLK0
R238 1
2 10K_0402_5%
PCH_SMLDATA0
R239 1
2 10K_0402_5%
CLKOUT_PCIE3N
CLKOUT_PCIE3P
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
AB37
AB38
CLK_PCIE_VGA#
CLK_PCIE_VGA
CLKOUT_DMI_N
CLKOUT_DMI_P
AV22
AU22
CLK_CPU_DMI#
CLK_CPU_DMI
CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P
AM12
AM13
CLK_DPLL#
CLK_DPLL
CLKIN_DMI_N
CLKIN_DMI_P
BF18
BE18
PCH_CLK_DMI#
PCH_CLK_DMI
CLKIN_GND1_N CLKIN_DMI2_N
CLKIN_GND1_P CLKIN_DMI2_P
VGA
+3VALW_PCH
CLK_CPU_DMI# <5>
CLK_CPU_DMI <5>
T13
T14
PAD
PAD
CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P
AK7
AK5
CLK_SATA#
CLK_SATA
REFCLK14IN
K45
CLK_14M_PCH
CLKIN_PCILOOPBACK
H45
CLK_PCILOOP
XTAL25_IN
XTAL25_OUT
V47
V49
PCH_X1
PCH_X2
XCLK_RCOMP
Y47
XCLK_RCOMP
1
R354
CLKOUTFLEX0 / GPIO64
K43
CLK_FLEX0
T29
PAD
F47
H47
PCH_48MCLK 1 @ R576 2
22_0402_5%
CLK_FLEX2
T31
PAD
K49
CLK_FLEX3
1 CLK_REQ_VGA#
2
10K_0402_5%
R275
2
R303
1
10K_0402_5%
120 MHz for eDP
CLKIN_GND1#
CLKIN_GND1
CLK_DOT#
CLK_DOT
CLKOUT_PCIE4N
CLKOUT_PCIE4P
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
BJ30
BG30
CLK_PCIE_VGA# <13>
CLK_PCIE_VGA <13>
G24
E24
CLKIN_DOT_96N
CLKIN_DOT_96P
From Clock Gen.
PCH_CLK_DMI#
PCH_CLK_DMI
R242 1
R243 1
2 10K_0402_5%
2 10K_0402_5%
CLKIN_GND1#
CLKIN_GND1
R244 1
R245 1
2 10K_0402_5%
2 10K_0402_5%
CLK_DOT#
CLK_DOT
R246 1
R247 1
2 10K_0402_5%
2 10K_0402_5%
CLK_SATA#
CLK_SATA
R248 1
R249 1
2 10K_0402_5%
2 10K_0402_5%
CLK_14M_PCH
R250 1
2 10K_0402_5%
For EMI
CLK_PCILOOP <32>
CLK_PCILOOP
@
2
R417
@
2
1
C474
22P_0402_50V8J
1
10_0402_5%
PEG_B_CLKRQ# / GPIO56
V40
V42
CLKOUT_PCIE6N
CLKOUT_PCIE6P
T13
V38
V37
CLKOUT_PCIE7N
CLKOUT_PCIE7P
AK14
AK13
PCH_SMLCLK0
G12
CLK_BCLK_ITP#
CLK_BCLK_ITP
1 2.2K_0402_5%
EC_LID_OUT# <44>
DRAMRST_CNTRL_PCH
C8
SML0CLK
CLKOUT_PCIE2N
CLKOUT_PCIE2P
L14
1 0_0402_5%
1 0_0402_5%
A12
SML0DATA
CLKOUT_PCIE5N
CLKOUT_PCIE5P
K12
SML0ALERT# / GPIO60
PEG_A_CLKRQ# / GPIO47
V45
V46
PCH_GPIO46
PCH_SMBDATA
CLKOUT_PCIE0N
CLKOUT_PCIE0P
CLKREQ_USB30#
1 0_0402_5%
1 0_0402_5%
C9
SML1DATA / GPIO75
PERN8
PERP8
PETN8
PETP8
CLK_USB30#
CLK_USB30
LVDS_SEL
PCH_SMBCLK
1 2.2K_0402_5%
2 R260
Q4B
E6
H14
2 R232
PCH_SMBCLK
L12
PCH_GPIO56
E12
SMBCLK
SMBDATA
CLKREQ_NEW#
AB42
AB40
R233
R282
PERN5
PERP5
PETN5
PETP5
SMBALERT# / GPIO11
EC_LID_OUT#
BE34
BF34
BB32
AY32
Link
Card Reader
1 0.1U_0402_16V7K
1 0.1U_0402_16V7K
PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
PCIE_PTX_WLANRX_N2
PCIE_PTX_WLANRX_P2
+3VALW_PCH
SMBUS
JET
C501 2
C502 2
PERN1
PERP1
PETN1
PETP1
Controller
PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
PCIE_PTX_C_WLANRX_N2
PCIE_PTX_C_WLANRX_P2
1 0.1U_0402_16V7K
1 0.1U_0402_16V7K
BG34
BJ34
AV32
AU32
CLKOUT_BCLK0_N / CLKOUT_PCIE8N
CLKOUT_BCLK0_P / CLKOUT_PCIE8P
FLEX CLOCKS
WLAN
<39>
<39>
<39>
<39>
C498 2
C497 2
PCIE_PRX_C_LANTX_N1
PCIE_PRX_C_LANTX_P1
PCIE_PTX_LANRX_N1
PCIE_PTX_LANRX_P1
CLOCKS
LAN
PCIE_PRX_C_LANTX_N1
PCIE_PRX_C_LANTX_P1
PCIE_PTX_C_LANRX_N1
PCIE_PTX_C_LANRX_P1
PCI-E*
<40>
<40>
<40>
<40>
2
90.9_0402_1%
T33
+1.05VS_VCCDIFFCLKN
48MCLK_USB30 <42>
R365 2
1 1M_0402_5%
Y2
PCH_X1
PAD
Q65R1@
C506
27P_0402_50V8J
PCH_X2
25MHZ_20PF_7A25000012
C507
27P_0402_50V8J
LVDS_SEL
+3VALW_PCH
A
R347 1
2 10K_0402_5%
LVDS_SEL
LVDS_SEL
@
R564 1
2 10K_0402_5%
Channel
Single
(Default)
Dual
Issued Date
Compal Secret Data
200910/9
2010/01/23
Deciphered Date
5
Title
PCH_PCI-E/SMBUS/CLK
Custom
Rev
0.1
PHQAA LA-6831P M/B
Date:
Sheet
1
29
of
58
U2C
1
200_0402_5%
1
10K_0402_5%
1
10K_0402_5%
1
10K_0402_5%
DRAMPWROK
PCH_SUSPWRDN_R
RI#
PCH_LOW_BAT#
PCH_RSMRST#
1
10K_0402_5%
PM_PWROK
1
10K_0402_5%
SYS_PWROK
1
10K_0402_5%
2
R127
2
R128
2
R129
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
BC24
BE20
BG18
BG20
DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN
<6>
<6>
<6>
<6>
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
BE24
BC20
BJ18
BJ20
DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP
<6>
<6>
<6>
<6>
DMI_PTX_CRX_N0
DMI_PTX_CRX_N1
DMI_PTX_CRX_N2
DMI_PTX_CRX_N3
DMI_PTX_CRX_N0
DMI_PTX_CRX_N1
DMI_PTX_CRX_N2
DMI_PTX_CRX_N3
AW24
AW20
BB18
AV18
DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
<6>
<6>
<6>
<6>
DMI_PTX_CRX_P0
DMI_PTX_CRX_P1
DMI_PTX_CRX_P2
DMI_PTX_CRX_P3
DMI_PTX_CRX_P0
DMI_PTX_CRX_P1
DMI_PTX_CRX_P2
DMI_PTX_CRX_P3
AY24
AY20
AY18
AU18
1
R130
+1.05VS_PCH
DMI_COMP
2
49.9_0402_1%
BJ24
BG25
1
R160
RBIAS_CPY
2
750_0402_1%
BH21
BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_INT
AW16
FDI_INT
AV12
FDI_FSYNC0
BC10
FDI_FSYNC1
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP
FDI
2
R316
2
R218
2
R220
2
R221
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI
+3VALW_PCH
D
<6>
<6>
<6>
<6>
DMI_ZCOMP
FDI_FSYNC0
FDI_FSYNC1
DMI2RBIAS
FDI_LSYNC0
AV14
FDI_LSYNC0
FDI_LSYNC1
BB10
FDI_LSYNC1
A18
DSWVREN
C12
E22
PCH_DPWROK
K3
SYS_PWROK
P12
PM_PWROK
1
R216
<5> DRAMPWROK
@
2
R137
SYS_RESET#
SYS_PWROK
IN2
PM_PWROK_R
2
0_0402_5%
L22
L10
SUSACK#
SUSACK#
1 PCH_SUSPWRDN_R
0_0402_5%
<44> PCH_RSMRST#
Stuff R137 if EC does not want to

involve in the handshake mechanism
for the DeepSX state entry and exit
1
R320
<44> PCH_SUSPWRDN
<5,44> PBTN_OUT#
+3VALW_PCH
1
R469
2
330K_0402_5%
D12
1
<44,46,50> ACIN
DRAMPWROK
B13
PCH_RSMRST#
C21
2 PCH_SUSPWRDN_R K16
0_0402_5%
PBTN_OUT#
E20
PCH_ACIN
H20
PCH_LOW_BAT#
E10
RI#
A10
APWROK
DRAMPWROK
RSMRST#
DPWROK
WAKE#
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
<6>
<6>
<6>
<6>
<6>
<6>
<6>
<6>
FDI_FSYNC0
PCH_DPWROK
<6>
FDI_FSYNC1
<6>
FDI_LSYNC0
<6>
FDI_LSYNC1
<6>
1
R222
PCH_RSMRST#
2
0_0402_5%
Stuff R222 if do not support DeepSX state
+RTCVCC
DSWVREN
B9
EC_SWI#
N3
PM_CLKRUN#
G8
SUS_STAT#
N14
SUSCLK
D10
PM_SLP_S5#
H4
PM_SLP_S4#
F4
PM_SLP_S3#
G10
PM_SLP_A#
T35
PAD
G16
PM_SLP_SUS#
T58
PAD
AP14
H_PM_SYNC
K14
PCH_GPIO29
R224
R225
1 330K_0402_5%
@
1 330K_0402_5%
EC_SWI# <39,40,42>
1
R566
DSWVREN must be always pulled high to +RTCVCC

T17
@
PAD
2
0_0402_5%
*
32.768 KHz
CLK_EC <44>
DSWVREN - Internal Deep Sleep 1.05V regulator

H Enable
L Disable
PM_SLP_S5# <44>
+3VS
SLP_S4#
PM_SLP_S4# <44>
PM_CLKRUN#
SUSWARN# / SUS_PWR_DN_ACK / GPIO30 SLP_S3#

PWRBTN#
SLP_A#
ACPRESENT / GPIO31
SLP_SUS#
BATLOW# / GPIO72
PMSYNCH
R313 1
2 8.2K_0402_5%
PM_SLP_S3# <44>
+3VALW_PCH
B
PWROK
System Power Management
PM_PWROK
SUSACK#
XDP_DBRESET#
<5> XDP_DBRESET#
U12
IN1
<5,44> PM_PWROK
T34
<5,44,55> VGATE
PAD
0.1U_0402_16V4Z
1
2
C250
<6>
<6>
<6>
<6>
<6>
<6>
<6>
<6>
FDI_INT <6>
DMI_IRCOMP
DSWVRMEN
+3VS
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
RI#
SLP_LAN# / GPIO29
H_PM_SYNC <5>
EC_SWI#
R319 1
2 10K_0402_5%
PCH_GPIO29
R563 1 @
2 10K_0402_5%
Q65R1@
D16
PM_PWROK
PCH_RSMRST#
D14
<49,51> POK
A
200910/9
Issued Date
Compal Secret Data
Deciphered Date
2010/01/23
5
Title
PCH_DMI/FDI/PM
Custom
Rev
0.1
PHQAA LA-6831P M/B
Date:
Sheet
1
30
of
58
U2D
OPT@
UMA_ENBKL
1
2
R230
100K_0402_5%
2
R471
LCTL_CLK
1
2.2K_0402_5%
2
R472
LCTL_DATA
1
2.2K_0402_5%
2
R223
LCD_EDID_CLK
1
2.2K_0402_5%
2
R229
LCD_EDID_DATA
1
2.2K_0402_5%
2
R237
UMA_CRT_CLK
1
2.2K_0402_5%
2
R231
UMA_CRT_DATA
1
2.2K_0402_5%
OPT@
UMA_CRT_B
1
2
R240
150_0402_1%
OPT@
UMA_CRT_G
1
2
R241
150_0402_1%
OPT@
UMA_CRT_R
1
2
R318
150_0402_1%
LCTL_CLK
LCTL_DATA
T45
P39
L_CTRL_CLK
L_CTRL_DATA
<25> LCD_TXOUT0<25> LCD_TXOUT1<25> LCD_TXOUT2<25> LCD_TXOUT0+

<25> LCD_TXOUT1+
<25> LCD_TXOUT2+
<26> UMA_CRT_B
<26> UMA_CRT_G
<26> UMA_CRT_R
<26> UMA_CRT_CLK
<26> UMA_CRT_DATA
<26> UMA_CRT_HSYNC
<26> UMA_CRT_VSYNC
AF37
AF36
LVD_IBG
LVD_VBG
AE48
AE47
LVD_VREFH
LVD_VREFL
LCD_TXCLKLCD_TXCLK+
AK39
AK40
LVDSA_CLK#
LVDSA_CLK
LCD_TXOUT0LCD_TXOUT1LCD_TXOUT2-
AN48
AM47
AK47
AJ48
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LCD_TXOUT0+
LCD_TXOUT1+
LCD_TXOUT2+
AN47
AM49
AK49
AJ47
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
AF40
AF39
LVDSB_CLK#
LVDSB_CLK
AH45
AH47
AF49
AF45
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
AH43
AH49
AF47
AF43
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
UMA_CRT_B
UMA_CRT_G
UMA_CRT_R
N48
P49
T49
CRT_BLUE
CRT_GREEN
CRT_RED
UMA_CRT_CLK
UMA_CRT_DATA
T39
M40
CRT_DDC_CLK
CRT_DDC_DATA
UMA_CRT_HSYNC
UMA_CRT_VSYNC
M47
M49
CRT_HSYNC
CRT_VSYNC
2
R311
CRT_IREF
1
1K_0402_0.5%
T43
T42
DAC_IREF
CRT_IRTN
R241
150_0402_1%
UMA@
SDVO_INTN
SDVO_INTP
AP39
AP40
+3VS
R214
2.2K_0402_5%
IHDMI@
R215
2.2K_0402_5%
IHDMI@
P38
M39
AT49
AT47
AT40
HDMI_HPD_UMA
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
UMA_HDMI_TX2UMA_HDMI_TX2+
UMA_HDMI_TXCUMA_HDMI_TXC+
HDMI_HPD
UMA_HDMI_TXCUMA_HDMI_TXC+
HDMI_HPD
<27>
<27>
<27>
<27>
<27>
<27>
<27>
<27>
<13,27,33>
HDMI_HPD_UMA 2
1
100K_0402_5%
R1433
HDMI
P46
P42
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
AP47
AP49
AT38
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
DDPD_CTRLCLK
DDPD_CTRLDATA
UMA_HDMI_CLK <27>
UMA_HDMI_DATA <27>
R1432
IHDMI@
0_0402_5%
2
1
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPC_CTRLCLK
DDPC_CTRLDATA
B
SDVO_STALLN
SDVO_STALLP
AM42
AM40
SDVO_CTRLCLK
SDVO_CTRLDATA
OPT@
R240
150_0402_1%
UMA@
AP43
AP45
L_DDC_CLK
L_DDC_DATA
SDVO_TVCLKINN
SDVO_TVCLKINP
T40
K47
L_BKLTEN
L_VDD_EN
L_BKLTCTL
LCD_EDID_CLK
LCD_EDID_DATA
OPT@
LVDS_IBG
1
2
R219
2.37K_0402_1%
T40 PAD
<25> LCD_TXCLK<25> LCD_TXCLK+

+3VS
P45
R219
2.37K_0402_1%
UMA@
PCH_PW M
Digital Display Interface
J47
M45
LVDS
<25> PCH_PW M
<25> LCD_EDID_CLK
<25> LCD_EDID_DATA
R230
100K_0402_5%
UMA@
UMA_ENBKL
UMA_ENVDD
CRT
<25> UMA_ENBKL
<25> UMA_ENVDD
R473 2
1 100K_0402_5%
C
M43
M36
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
AT45
AT43
BH41
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
R524 2
1 100K_0402_5%
Q65R1@
B
R311
1K_0402_5%
DIS@
R318
150_0402_1%
UMA@
R311
1K_0402_0.5%
UMA@
Compal Secret Data
200910/9
Issued Date
Deciphered Date
2010/01/23
5
Title
PCH_CRT/LVDS/HDMI
Size
Document Number
Custom
Rev
0.1
PHQAA LA-6831P M/B
Date:
Sheet
1
31
of
58
PLT_RST#
RP1
PCH_GPIO4
PCI_PIRQC#
PCI_PIRQA#
PCH_GPIO2
8.2K_0804_8P4R_5%
RP2
1
2
3
4
PCI_PIRQB#
ODD_DA#
W L_OFF#
8.2K_0804_8P4R_5%
1
R321
1
R322
1 DIS@
R578
1 DIS@
R544
TP25
TP26
TP27
TP28
TP29
TP30
TP31
TP32
TP33
TP34
TP35
TP36
TP37
TP38
TP39
TP40
IN1
IN2
PLTRST_VGA# <13>
1
@
2
1
R531
0_0402_5%
DGPU_RST#
R530
100K_0402_5%
OPT@
1
R532
1K_0402_5%
OPT@
OPT@
<13,33,47,56> VGA_PW ROK
DIS@
PLT_RST#
PLTRST_VGA#
1
0_0402_5%
2
R529
DF_TVS NV_CLE
NV_RCOMP
NV_CLE
R534
100K_0402_5%
AV10
NV_RB#
AT8
NV_RE#_WRB0
NV_RE#_WRB1
AY5
BA2
PCH_GPIO5
2
8.2K_0402_5%
PCI_PIRQD#
2
8.2K_0402_5%
DGPU_RST#
2
10K_0402_5%
DGPU_PW R_EN
2
10K_0402_5%
R578
10K_0402_5%
UMA@
NV_WE#_CK0
NV_WE#_CK1
C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32
USB port6 and port7 are disabled on HM65
USBRBIAS#
C33
USBBIAS
USBRBIAS
B33
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
A14
K20
B17
C16
L16
A16
D14
C14
EHCI 1
For Optimus
<13,47,56> DGPU_PW R_EN

<39> RF_OFF#
<39> W L_OFF#
<37> ODD_DA#
B
T32 PAD
<5,39,40,41,42,44,45>
<44> CLK_PCI_EC
<29> CLK_PCILOOP
<45> CLK_PCI_DDR
PLT_RST#
22_0402_5% 1
22_0402_5% 1
22_0402_5% 1
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
K40
K38
H38
G38
DGPU_RST#
PCH_GPIO52
DGPU_PW R_EN
C46
C44
E40
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54
RF_OFF#
PCH_GPIO53
W L_OFF#
D47
E42
F46
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55
PCH_GPIO2
ODD_DA#
PCH_GPIO4
PCH_GPIO5
G42
G40
C42
D44
PCI_PME#
K10
PLT_RST#
C6
2 R525
2 R526
2 R527
CLK_EC_R
CLK_PCH
CLK_SIO
H49
H43
J48
K42
H40
PIRQA#
PIRQB#
PIRQC#
PIRQD#
EHCI 2
PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
R544
10K_0402_5%
UMA@
DGPU_PW R_EN
1 OPT@ 2
R399
1K_0402_5%
For Optimus
AT12
BF3
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N8
USB20_P8
USB20_N9
USB20_P9
USB20_N10
USB20_P10
USB20_N11
USB20_P11
USB20_N12
USB20_P12
USB20_N13
USB20_P13
<37>
<37>
<37>
<37>
<37>
<37>
<42>
<42>
<39>
<39>
<38>
<38>
USB-RIGHT1
USB-RIGHT2
USB-Left1
USB-Left2
IR Emitter
USB20_N8 <38>
USB20_P8 <38>
USB20_N9 <39>
USB20_P9 <39>
USB20_N10 <39>
USB20_P10 <39>
USB20_N11 <25>
USB20_P11 <25>
USB20_N12 <39>
USB20_P12 <39>
USB20_N13 <38>
USB20_P13 <38>
1
R535
DMI & FDI Termination Voltage
NewCard
NV_CLE
Set to VCC when HIGH

Set to VSS when LOW
+1.8VS
Finger Printer
WiMax
RP3
BE28
BC30
BE32
BJ32
BC28
BE30
BF32
BG32
AV26
BB26
AU28
AY30
AU26
AY26
AV28
AW30
NV_ALE
AV5
AY1
RF_OFF#
8.2K_0804_8P4R_5%
8
7
6
5
TP21
TP22
TP23
TP24
AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
OPT@
1
2
C508
0.1U_0402_16V4Z
U20
OPT@
1
O 4 R5282
0_0402_5%
PCH_GPIO52
PCH_GPIO53
1
2
3
4
USB
8
7
6
5
B21
M20
AY16
BG46
NV_DQS0
NV_DQS1
AT10
BC8
+3VS
R533
0_0402_5%
OPT@
R324
1K_0402_5%
TV Tuner #1
Int. Camera
NV_CLE
3G/ TV tuner #2
1
2
3
4
AY7
AV7
AU3
BG4
NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15
PCI
8
7
6
5
NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3
+3VS
NVRAM
TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20
RSVD
BG26
BJ26
BH25
BJ16
BG16
AH38
AH37
AK43
AK45
C18
N30
H3
AH12
AM4
AM5
Y13
K24
L24
AB46
AB45
U2E
2
R323
1
1K_0402_5%
H_SNB_IVB# <5>
Felica
2
22.6_0402_1%
Within 500 mils
PME#
PLTRST#
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
SLP_CHG_M3
SLP_CHG_M4
EXP_CPPE#
USB_OC#0 <37,44>
USB_OC#1 <42,44>
USB-Right
USB-Left & eSATA
+3VALW _PCH
RP4
SLP_CHG_M3 <42>
SLP_CHG_M4 <42>
EXP_CPPE# <39>
USB_OC#0
SLP_CHG_M3
SLP_CHG_M4
USB_OC#4
Q65R1@
4
3
2
1
5
6
7
8
10K_0804_8P4R_5%
RP5
USB_OC#1
USB_OC#2
USB_OC#3
EXP_CPPE#
Boot BIOS Strap

RF_OFF#
1K_0402_5%
1K_0402_5%
1 R537
RF_OFF#
1 R538
PCH_GPIO19
1K_0402_5% 2
1 R536
W L_OFF#
PCH_GPIO19 <28>
PCH_GPIO19
0
0
1
1
0
1
0
1
Boot BIOS Loaction
10K_0804_8P4R_5%
Reserved
PCI
SPI
Low= A16 swap override Enable

High= A16 swap override Disable
200910/9
Issued Date
Compal Secret Data
Deciphered Date
2010/01/23
5
5
6
7
8
LPC
A16 Swap Override Strap

WL_OFF#
4
3
2
1
Title
PCH_PCI/USB/NAND
Custom
Rev
0.1
PHQAA LA-6831P M/B
Date:
Sheet
1
32
of
58
@
1 R100
2
100K_0402_5%
+3VALW _PCH
+3VS
U2F
ODD_EN#
BMBUSY# / GPIO0
TACH4 / GPIO68
C40
ODD_EN#
PCH_GPIO1
A42
TACH1 / GPIO1
TACH5 / GPIO69
B41
PCH_W L_BT_LED
PCH_GPIO57
PCH_GPIO6
H36
TACH2 / GPIO6
TACH6 / GPIO70
C41
LOGO_LED
EC_SCI#
E38
TACH3 / GPIO7
TACH7 / GPIO71
A40
PCH_GPIO71
<44> EC_SMI#
EC_SMI#
C10
GPIO8
<42> USB30_SMI#
1
2
R567
10K_0402_5%
@
HDMI_HPD
1
2
R539
10K_0402_5%
PCH_GPIO1
1
2
R540
10K_0402_5%
PCH_GPIO22
1
2
R542
10K_0402_5%
VGA_PW ROK
1 UMA@ 2
R579
10K_0402_5%
ODD_DETECT#
1
2
R545
200K_0402_5%
PCH_GPIO6
1
2
R546
10K_0402_5%
PCH_GPIO16
1
2
R577
10K_0402_5%
EC_SCI#
1
2
R550
10K_0402_5%
CIR_EN#
1
2
R551
100K_0402_5%
@
ISDBT_DET
1
2
R552
10K_0402_5%
PCH_GPIO49
1
2
R553
10K_0402_5%
OPTIMUS_EN#
1 DIS@
2
R555
10K_0402_5%
PCH_GPIO12
C4
LAN_PHY_PWR_CTRL / GPIO12
USB30_SMI#
G2
GPIO15
PCH_GPIO16
<13,32,47,56> VGA_PW ROK
VGA_PW ROK
<39> BT_ON#
T74 PAD
<37> ODD_DETECT#
SCLOCK / GPIO22
E8
GPIO24 / MEM_LED
GPIO27
PCH_GPIO28
P8
GPIO28
BT_ON#
K1
STP_PCI# / GPIO34
PCH_GPIO35
K4
GPIO35
ODD_DETECT#
V8
M5
PCH_PECI_R
P5
KB_RST#
PROCPWRGD
AY11
H_PW RGOOD
THRMTRIP#
AY10
PCH_THRMTRIP# 1
R416
RCIN#
INIT3_3V#
T14
NC_1
AH8
NC_2
AK11
NC_3
AH10
NC_4
AK10
NC_5
P37
SATA3GP / GPIO37
N2
SLOAD / GPIO38
CIR_EN#
M3
SDATAOUT0 / GPIO39
V13
ISDBT_DET
GATEA20
AU16
PECI
SATA2GP / GPIO36
OPTIMUS_EN#
SDATAOUT1 / GPIO48
VSS_NCTF_15
BG2
V3
SATA5GP / GPIO49
VSS_NCTF_16
BG48
PCH_GPIO57
D6
GPIO57
VSS_NCTF_17
BH3
VSS_NCTF_18
BH47
2 1K_0402_5% PCH_GPIO28
A4
VSS_NCTF_1
VSS_NCTF_19
BJ4
A44
VSS_NCTF_2
VSS_NCTF_20
BJ44
A45
VSS_NCTF_3
VSS_NCTF_21
BJ45
A46
VSS_NCTF_4
VSS_NCTF_22
BJ46
A5
VSS_NCTF_5
VSS_NCTF_23
BJ5
A6
VSS_NCTF_6
VSS_NCTF_24
BJ6
B3
VSS_NCTF_7
VSS_NCTF_25
C2
B47
VSS_NCTF_8
VSS_NCTF_26
C48
BD1
VSS_NCTF_9
VSS_NCTF_27
D1
BD49
VSS_NCTF_10
VSS_NCTF_28
D49
BE1
VSS_NCTF_11
VSS_NCTF_29
E1
BE49
VSS_NCTF_12
VSS_NCTF_30
E49
BF1
VSS_NCTF_13
VSS_NCTF_31
F1
BF49
VSS_NCTF_14
VSS_NCTF_32
F49
GATEA20 <44>
@
1
R212
2
0_0402_5%
<46> W L_BT_LED#
H_PECI <5,44>
KB_RST# <44>
Q53B
H_PW RGOOD <5>
2
390_0402_5%
PCH_W L_BT_LED
H_THERMTRIP# <5>
2N7002DW -T/R7_SOT363-6
This signal has weak internal

pull-up, can't be pulled low
PCH_GPIO49
On-Die PLL Voltage Regulator

H: Enable
L: Disable
1
T5
E16
PCH_GPIO37
<39> ISDBT_DET
TACH0 / GPIO17
LOGO_LED <46>
PAD T73
P4
A20GATE
SATA4GP / GPIO16
PCH_GPIO27
GPIO28
R325
D40
PCH_GPIO22
PCH_GPIO37
2
1
R547
100K_0402_5%
PCH_GPIO27
2
1
R402
10K_0402_5%
CIR_EN#
2 CIR@ 1
R405
10K_0402_5%
ISDBT_DET
1
2
R328
47K_0402_5%
OPTIMUS_EN#
2 OPT@ 1
R415
10K_0402_5%
U2
For Optimus
R555
10K_0402_5%
UMA@
ODD_EN# <47>
<44> EC_SCI#
CPU/MISC
PCH_GPIO28
BT_ON#
T7
PCH_GPIO12
+3VS
HDMI_HPD
EC_SMI#
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
<13,27,31> HDMI_HPD
USB30_SMI#
GPIO
1
1K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
NCTF
2
R390
1
R558
1
R556
1
R557
1
R549
1
R106
GATEA20
1
R548
KB_RST#
1
R559
LOGO_LED
1
R436
PCH_W L_BT_LED
1
R110
Q65R1@
GPIO8
Integrated Clock Chip Enable (Removed)

H: Disable
L: Enable
R326 1
2 1K_0402_5%
OPTIMUS_EN#
OPTIMUS_EN#
SKU
Discrete
Optimus
EC_SMI#
Integrated clock enable functionality

is achieved by soft-strap
The current default is clock enable
Compal Secret Data
200910/9
Issued Date
Deciphered Date
2010/01/23
5
Title
PCH_CPU/GPIO
Size
B
Date:
Document Number
Rev
0.1
PHQAA LA-6831P M/B

Sheet
1
33
of
58
U2G
C269
C275
C289
1U_0402_6.3V6K
2
1U_0402_6.3V6K
+1.05VS_PCH
This pin can be left as NC if

On-Die VR is enabled (Default)
AN19
+1.05VS_PCH
+VCCAPLLEXP
BJ22
C509
10U_0603_6.3V6M
@
AN16
AN17
AN21
+1.05VS_PCH
C273
C279
C510
1U_0402_6.3V6K
1mA
VCCALVDS
VSSALVDS
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
+VCCA_LVDS
AK36
AP24
C511
1U_0402_6.3V6K
2
AT24
AN34
BH29
1
V5REF_SUS
R424 1 DIS@
+1.8VS
AM38
+VCCTX_LVDS
AP36
AP37
C514
0.01U_0402_25V7K
OPT@
C513
OPT@
VCCIO[24]
+VCCAFDI_VRM
AP16
C280
1U_0402_6.3V6K
2
@
B
1
VCC3_3[7]
V34
+1.05VS_PCH
AP17
+VCCP_VCCDMI
AU20
C272
0.1U_0402_10V7K
VCCVRM[3]
AT16
VCCDMI[1]
20mA
VCCIO[1]
AT20
+VCCP_VCCDMI
AB36
+1.05VS_VCC_DMI
1
VCCPNAND[1]
VCC3_3[3]
VCCVRM[2]
VCCFDIPLL
VCCDMI[2]
R477
0_0805_5%
1
2
S0 Iccmax
Current (A)
1.05
0.001
0.001
0.001
VCC3_3
3.3
0.266
VCCADAC
3.3
0.001
VCCADPLLA
1.05
0.08
VCCADPLLB
1.05
0.08
VCCCORE
1.05
1.3
VCCDMI
1.05
0.042
VCCIO
1.05
2.925
VCCASW
1.05
1.01
VCCSPI
3.3
0.02
VCCDSW
3.3
0.002
VCCDFTERM
1.8
0.19
VCCRTC
3.3
6 uA
3.3
0.97
+1.05VS_VCCP
R480
0_0805_5%
1
2
+1.05VS_PCH
C276
1U_0402_6.3V6K
C270
1U_0402_6.3V6K
VCCDFTERM
VCCIO[26]
VCCIO[27]
+1.5VS
R474
0_0603_5%
1
2
+VCCAFDI_VRM
2
VCCIO[25]
FDI
BG6
C513
0_0402_5%
DIS@
+VCCP_VCCDMI
@
+1.05VS_VCCAPLL_FDI
C256
22U_0805_6.3V6M
OPT@
V33
VCCIO[20]
VCCIO[23]
L1 OPT@
1
2
0.1UH_MLF1608DR10KT_10%_1608
0.01U_0402_25V7K
+VCCAFDI_VRM
VCCIO[21]
Voltage
2 0_0402_5%
AM37
VCCIO[17]
C290
0.1U_0402_10V7K
+1.05VS_PCH
1 0_0603_5%
VCC3_3[6]
V5REF
R541
0_0603_5%
UMA@
AK37
1U_0402_6.3V6K
+3VS

VCCIO[16]
VCCIO[22]
V_PROC_IO
+3VS
VCCIO[15]
Voltage Rail
C286
10U_0603_6.3V6M
1 OPT@ 2
R541
0_0603_5%
VCCAPLLEXP
VCCIO[19] 2925mA
AP23
1
PCH Power Rail Table
L12
2
1
BLM18PG181SN1D_0603
+3VS
VCCTX_LVDS[4]
AN27
AN33
R483 2
0.1U_0402_10V7K
1
C288
C512
0.01U_0402_25V7K
U47
VCCIO[28]
VCCIO[18]
AP26
10U_0603_6.3V6M
VCCADAC
VSSADAC
60mA
AN26
AP21
1U_0402_6.3V6K
C277
1mA
+VCCA_DAC
U48
L22
1
2
1UH_LB2012T1R0M_20%
+3VS
HVCMOS
10U_0603_6.3V6M
VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
VCCCORE[16]
VCCCORE[17]
POWER
1300mA
CRT
JUMP_43X118
1
C274
AA23
AC23
AD21
AD23
AF21
AF23
AG21
AG23
AG24
AG26
AG27
AG29
AJ23
AJ26
AJ27
AJ29
AJ31
DMI
+1.05VS_PCH
1U_0402_6.3V6K
NAND / SPI
VCCIO
PJ31
2
LVDS
+1.05VS_VCCP
VCC CORE
VCCSUS3_3
+1.8VS
AG16
VCCSusHDA
VCCPNAND[2]
190mA
VCCPNAND[3]
1
AJ16
2
VCCPNAND[4]
L1
0.1UH_MLF1608DR10KT_10%_1608
UMA@
AG17
C278
0.1U_0402_10V7K
AJ17
C513
0.01U_0402_25V7K
UMA@
+3VS
20mA
VCCSPI
C514
0.01U_0402_25V7K
UMA@
V1
1
Q65R1@
C256
22U_0805_6.3V6M
UMA@
C281
1U_0402_6.3V6K
3.3 / 1.5
0.01
VCCVRM
1.5
0.16
VCCCLKDMI
1.05
0.02
VCCSSC
1.05
0.095
VCCDIFFCLKN
1.05
0.055
VCCALVDS
3.3
0.001
VCCTX_LVDS
1.8
0.06
+3VALW
PJ32
JUMP_43X79
@
+3VALW_PCH
Vgs=-4.5V,Id=3A,Rds<97mohm
C687
4.7U_0805_10V4Z
C688
1U_0402_6.3V4Z
Compal Secret Data
200910/9
Issued Date
Deciphered Date
2010/01/23
5
Title
PCH_POWER-1
Custom
Rev
0.1
PHQAA LA-6831P M/B
Date:
Sheet
1
34
of
58

+3VS
+1.05VS_PCH
L18
1
2
10UH_LB2012T100MR_20%
+3VS_VCC_CLKF33
1
C301
10U_0603_6.3V6M
@
R498
2
+VCCACLK
0_0603_5%
C310
1U_0402_6.3V6K
+3VALW_PCH
+5VALW
POWER
U2J
3mA
VCCIO[31]
V12
+3VS_VCC_CLKF33
T38
DCPSUSBYP
VCCIO[32]
+1.05VS_PCH
VCCIO[33]
BH23
AL29
+1.05VS_PCH
+VCCSUS
AA21
AA24
C311
AA26
C312
AA27
22U_0805_6.3V6M
2
2
22U_0805_6.3V6M
AA29
AA31
C323
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
C294
C308
2
AC26
1
AC27
1U_0402_6.3V6K
2
AC29
+1.05VS_PCH
AC31
L21
10UH_LB2012T100MR_20%
1
2
AD29
+1.05VS_VCCADPLLA
AD31
L19
1
2
10UH_LB2012T100MR_20%
+1.05VS_VCCADPLLB
1
C333
220U_B2_2.5VM_R15
+
2
W21
W23
1
C295
C515
C298
1U_0402_6.3V6K
W24
1U_0402_6.3V6K
2
2
2
220U_B2_2.5VM_R15
W26
W29
W31
+1.05VS_PCH
R522
2
W33
+VCCDIFFCLK
0_0603_5%
DCPSUS[3]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[6]
AA19
VCCASW[1]
VCCASW[2]
VCCIO[34]
1010mA
1mA
VCCASW[3]
VCCASW[4]
VCCASW[5]
VCCASW[6]
VCCASW[7]
VCCASW[8]
VCCASW[9]
VCCASW[10]
VCCASW[11]
VCCASW[12]
VCCASW[13]
VCCASW[14]
VCCASW[15]
V5REF_SUS
+VCCRTCEXT
C334
0.1U_0402_10V7K
N16
VCCSUS3_3[1]
1mA
V5REF
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCC3_3[8]
VCCASW[16]
VCC3_3[4]
Y49
T29
+3VALW_PCH
1
T24
V23
+3VALW_PCH
C321
0.1U_0402_10V7K
+5VALW_PCH
P24
C332
0.1U_0402_10V7K
R512
100_0402_5%
T26
VCCASW[20]
+PCH_V5REF_SUS
AN23
+VCCA_USBSUS
C335 1
AN24
P34
VCCVRM[4]
VCCIO[13]
+1.05VS_VCCADPLLA
BD47
+1.05VS_VCCDIFFCLKN
1
1
0_0603_5%
C320
1U_0402_6.3V6K
+1.05VS_VCCADPLLB
BF47
+VCCDIFFCLK
AF17
AF33
AF34
AG34
2
+1.05VS_VCCDIFFCLKN
+1.05VS_PCH
VCCADPLLB
80mA
80mA
C318
1U_0402_6.3V6K
1
1
VCCVRM[1]
VCCIO[7]
VCCIO[8]
VCCIO[9] 55mA
VCCIO[11]
2 1U_0402_6.3V6K
+VCCSST
V16
0.1U_0402_10V7K
+1.05VM_VCCSUS
C299
T17
V19
+V_CPU_IO
BJ8
VCCIO[10]
+3VALW_PCH
VCCIO[2]
VCCIO[4]
95mA
N20
1
N22
P20
C293
1U_0402_6.3V4Z
DCPSUS[1]
DCPSUS[2]
0_0603_5%
+1.05VM_VCCSUS
1
1
C316
1U_0402_6.3V6K
0_0603_5%
C325
4.7U_0603_6.3V6K
C322
C303
1mA
V_PROC_IO
P22
+3VS
C304
1U_0603_10V6K
AA16
+3VS
W16
T34
C313
0.1U_0402_10V7K
2
+3VS
AJ2
+1.05VS_SATA3
1
AF13
2
1
AH13
+1.05VS_SATA3
AH14
+1.05VS_PCH
R516
C297
0.1U_0402_10V7K
0_0805_5%
C329
1U_0402_6.3V6K

AK1
+VCCSATAPLL
+VCCAFDI_VRM
AF11
+VCCAFDI_VRM
AC16
1
+1.05VS_VCC_SATA
+1.05VS_VCC_SATA
AC17
+1.05VS_PCH
2
2
1
0_0805_5%
1
AD17
+1.05VS_PCH
L17
@
1
2
10UH_LB2012T100MR_20%
AF14
C296
10U_0603_6.3V6M
@
C331
1U_0402_6.3V6K
VCCASW[22]
VCCASW[23]
VCCASW[21]
T21
+VCCME_22
R509 2
1 0_0603_5%
V21
+VCCME_23
R517 2
1 0_0603_5%
T19
+VCCME_21
R520 2
1 0_0603_5%
+RTCVCC
+3VALW_PCH
0.1U_0402_10V7K
2
C327
1U_0402_6.3V6K
0.1U_0402_10V7K
1
C330
A22
C336
VCCRTC
10mA
VCCSUSHDA
P32
1
Q65R1@
0.1U_0402_10V7K
C307
0.1U_0402_16V4Z
Issued Date
Compal Secret Data
200910/9
2010/01/23
Deciphered Date
5
+PCH_V5REF_RUN
+1.05VS_PCH
CPU
0.1U_0402_10V7K
D7
RTC
R521
2
+3VS
R490
100_0402_5%
DCPSST
R511
+5VS
+PCH_V5REF_RUN
R491
+1.05VS_VCCP
1
VCCAPLLSATA
VCCIO[3]
AG33
+1.05VS_PCH
VCCIO[6]
MISC
VCCADPLLA
SATA
+1.05VS_VCCDIFFCLKN
R485
C326
0.1U_0603_25V7K
+3VALW_PCH
2
DCPRTC
+PCH_V5REF_SUS
1
M26
1
2
C306
0.1U_0402_10V7K
HDA
+1.05VS_PCH
D8
+1.05VS_PCH
+3VALW_PCH
V24
VCCASW[18]
VCC3_3[2]
0.1U_0402_10V7K
T23
VCCASW[17]
VCCASW[19]
C291
T27
2
VCC3_3[1]
VCCIO[12]
+VCCAFDI_VRM
@
DCPSUS[4]
VCCIO[5]
C337
1U_0402_6.3V6K
+1.05VS_PCH
AL24
C300
1U_0402_6.3V6K
@
119mA
VCCIO[14]
PCI/GPIO/LPC
VCCAPLLDMI2
Clock and Miscellaneous
VCCSUS3_3[7]
USB
+VCCAPLL_CPY_PCH
1
C302
10U_0603_6.3V6M
@
VCC3_3[5]
L20 @
1
2
10UH_LB2012T100MR_20%
P28
C328
1U_0402_6.3V6K
+PCH_VCCDSW
0.1U_0402_10V7K
1
P26
VCCDSW3_3
N26
VCCIO[30]
VCCIO[29]
VCCACLK

T16
@
C305
2
1
"@" Avoid leakage
AD49
C324
0.1U_0402_10V7K
1
D
+5VALW_PCH
JUMP_43X39
@ PJ334
+1.05VS_PCH
Title
PCH_POWER-2
Size
Document Number
Custom
Rev
0.1
PHQAA LA-6831P M/B
Date:
Sheet
1
35
of
58
U2I
AY4
AY42
AY46
AY8
B11
B15
B19
B23
B27
B31
B35
B39
B7
F45
BB12
BB16
BB20
BB22
BB24
BB28
BB30
BB38
BB4
BB46
BC14
BC18
BC2
BC22
BC26
BC32
BC34
BC36
BC40
BC42
BC48
BD46
BD5
BE22
BE26
BE40
BF10
BF12
BF16
BF20
BF22
BF24
BF26
BF28
BD3
BF30
BF38
BF40
BF8
BG17
BG21
BG33
BG44
BG8
BH11
BH15
BH17
BH19
H10
BH27
BH31
BH33
BH35
BH39
BH43
BH7
D3
D12
D16
D18
D22
D24
D26
D30
D32
D34
D38
D42
D8
E18
E26
G18
G20
G26
G28
G36
G48
H12
H18
H22
H24
H26
H30
H32
H34
F3
U2H
H5
AA17
AA2
AA3
AA33
AA34
AB11
AB14
AB39
AB4
AB43
AB5
AB7
AC19
AC2
AC21
AC24
AC33
AC34
AC48
AD10
AD11
AD12
AD13
AD19
AD24
AD26
AD27
AD33
AD34
AD36
AD37
AD38
AD39
AD4
AD40
AD42
AD43
AD45
AD46
AD8
AE2
AE3
AF10
AF12
AD14
AD16
AF16
AF19
AF24
AF26
AF27
AF29
AF31
AF38
AF4
AF42
AF46
AF5
AF7
AF8
AG19
AG2
AG31
AG48
AH11
AH3
AH36
AH39
AH40
AH42
AH46
AH7
AJ19
AJ21
AJ24
AJ33
AJ34
AK12
AK3
VSS[0]
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28
Q65R1@
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28
Q65R1@
Compal Secret Data
200910/9
Issued Date
Deciphered Date
2010/01/23
5
Title
PCH_GND
Custom
Rev
0.1
PHQAA LA-6831P M/B
Date:
Sheet
1
36
of
58
SATA HDD
Conn.
+5VS
C357
0.1U_0402_16V4Z
C358
0.1U_0402_16V4Z
JODD
C359
0.1U_0402_16V4Z
SSD HDD need 400mA for 3V(PHISON)
C363
10U_0805_10V4Z
@
C364
0.1U_0402_16V4Z
@
C365
0.1U_0402_16V4Z
@
C366
0.1U_0402_16V4Z
@
15
14
Close to JODD
GND
A+
AGND
BB+
GND
1
2
3
4
5
6
7
DP
+5V
+5V
MD
GND
GND
8
9
10
11
12
13
+3VS rail reserve for SSD

1
GND
GND
ODD_DA#_R
SATA_PTX_C_DRX_P2
SATA_PTX_C_DRX_N2
C378 1
C377 1
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
SATA_PRX_DTX_N2
SATA_PRX_DTX_P2
C376 1
C375 1
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
ODD_DETECT#_R
1
+5VS_ODD R561
ODD_DA#_R
1
R562
2
0_0402_5%
ODD_DETECT# <33>
2
0_0402_5%
ODD_DA# <32>
1
2
3
4
5
6
7
GND
A+
AGND
BB+
GND
24
23
GND
GND
Place components closely ODD CONN.
1.1A
1
1
C354
@
10U_0805_10V4Z 1U_0402_6.3V4Z
2
2
C352
10U_0805_10V4Z
C353
1
C355
0.1U_0402_16V4Z
C360
0.1U_0402_16V4Z
Close to JHDD
JHDD
SW5
SMT1-05-A_4P
3
+5VS_ODD
SANTA_206401-1_RV
6
5
C356
10U_0805_10V4Z
+3VS
SATA ODD Conn
Place closely JHDD SATA CONN.
1.2A
1
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12
SATA_PTX_C_DRX_P0
SATA_PTX_C_DRX_N0
C369 1
C367 1
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
SATA_PRX_DTX_N0
SATA_PRX_DTX_P0
C368 1
C370 1
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
R73
1
USB Board@ Right Side
+3VS
0_0402_5%
2
W=60mils
+USB_VCCA
<32> USB20_N0
USB20_N0_R
<32> USB20_P0
USB20_P0_R
W=60mils
2.5A
+5VALW
+USB_VCCA
U14
USB_EN#
1
2
3
4
GND VOUT
VIN VOUT
VIN VOUT
EN
FLG
8
7
6
5
2
C361
RT9715BGS_SO8
1
R87
For EMI
R77
1
1
1000P_0402_50V7K
SANTA_191201-1
@
1
2
R148 0_0402_5%
+5VALW
<32> USB20_N1
<32> USB20_P1
USB20_N0_R
USB20_P0_R
0_0402_5%
2
USB20_N1_R
USB20_P1_R
<43> HP_R
<43> HP_L
<43> MIC1_L
<43> MIC1_R
<43> NBA_PLUG
<43> BACK_SENSE
WCM-2012-900T_0805
1
R88
+5V_IO
USB20_N1_R
USB20_P1_R
2
0_0402_5%
L54
USB_OC#0 <32,44>
C362
4.7U_0805_10V4Z
2 @
1
2
R149 0_0402_5%
+5VL
WCM-2012-900T_0805
+5VS
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
L53
JPIO
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
ACES_85201-2005N
2
0_0402_5%
USB Board@ Left Side

S
Q8
+USB_VCCC
+USB_VCCB
AO3413_SOT23
<44> USB_EN#
1
R568
2
100K_0402_5%
2
G
+5VALW
USB_EN#
B
+USB_VCCC
2
R190
1
0_0402_5%
C428 1
2 1000P_0402_50V7K
C389 1
2 0.1U_0402_16V4Z
L15
<32> USB20_N2
<32> USB20_P2
JUSB
3
2
USB20_N2_R
USB20_P2_R
WCM-2012-900T_0805
2
R189
1
2
3
4
VCC
DD+
GND
GND
GND
GND
GND
5
6
7
8
ALLTOP C107L8-10405-L
1
0_0402_5%
D23
2 220U_6.3V_M_R15
C426 1
W=60mils
USB20_N2_R
USB20_P2_R
1
A
PJDLC05C_SOT23-3
Issued Date
Compal Secret Data
200910/9
2010/01/23
Deciphered Date
5
Title
SATA-HDD/ODD/USB
Size
Document Number
Rev
0.1
PHQAA LA-6831P M/B

Date:
Sheet
1
37
of
58
IR Emitter Connector
3D@
R150 1
2 0_0402_5%
L57
<32> USB20_P5
USB20_P5_R
<32> USB20_N5
USB20_N5_R
W CM-2012-900T_0805
3D@
R144 1
2 0_0402_5%
JIR
2 3D@
R151
+5VS
+IR_VCC
USB20_P5_R
USB20_N5_R
1
0_0603_5%
For ESD
3D@
C399
0.1U_0402_16V4Z
D10
USB20_P5_R
USB20_N5_R
1
2
3
4
1
2
3 GND
4 GND
5
6
ACES_87213-0400G
1
PESD5V0U2BT_SOT23-3
Felica
B-CAS Circuit
+3VS
+5VS
+5VALW
+3VS
TV@ RB7
10K_0402_5%
TV@ RB8
2.2K_0402_5%
CB3 TV@
4.7U_0603_6.3V6K
CB5
TV@
1U_0402_6.3V4Z
2
1
C758
0.1U_0402_16V4Z
FELICA@
USB20_N13
USB20_P13
FELICA_GND
<32> USB20_N13
<32> USB20_P13
Q20
AO3413_SOT23
FELICA@
R132
0_0603_5%
FELICA@
1
2
3
4
5
6
7
8
1
2
3
4
5
6
G1
G2
ACES_87151-06051
2
G
Q34
<28> FELICA_PW R
2
2
1
1
CB4
TV@
0.1U_0402_16V4Z
2
+5VS_L_BCAS
+5VS_L_BCAS
LB1 TV@
1
2
1 FBMA-L11-201209-221LMA30T_0805
2
3
3
1
+5VS_BCAS
QB2B
TV@
2
R419
FELICA@
C479
100K_0402_5%
FELICA@
0.1U_0402_16V7K
1
FELICA@
1
2
2
R403 47K_0402_5% 2
C403
D
0.01U_0402_25V7K
FELICA@
1
S 2N7002_SOT23-3
FELICA@
BCPW ON
47K_0402_5%
1
TV@
TV@
CB2
2
0.01U_0402_25V7K
2N7002DW -T/R7_SOT363-6
<39> BCPW ON
QB1
AO3413_SOT23
TV@
RB5
FELICA@
C414
0.1U_0402_16V4Z
100K_0402_5%
+FLICA_VCC
current = 0A
JFEL
Inrush
1 TV@
CB1
0.1U_0402_16V7K
TV@RB2
TV@
RB2
+FLICA_VCC
+5VS_L_BCAS
IN2
UB1 TV@
Finger printer
IN1
<39> BCRSTM
1
BCRSTM 2
B_R_BCRST 1 TV@
RB9
B_BCRST
2
100_0402_5%
B_BCRST <39>
IN2
+3VS
B_R_XBCCLK1 TV@
RB11
B_XBCCLK
2
100_0402_5%
B_XBCCLK <39>
1 R134
2
0_0603_5% 1
FP@
C480
0.1U_0402_16V4Z
FP@
2
+3VS_FP
USB20_N8
USB20_P8
FP_GND
<32> USB20_N8
<32> USB20_P8
JFP
UB2 TV@
IN1
XBCLKM
<39> XBCLKM
D82
+5VS_L_BCAS
R133
0_0603_5%
FP@
FP@
VIN
IO1
IO2 GND
1
2
3
4
5
6
1
2
3
4
GND
GND
P-TW O_161011-04021
CM1293A-02SR SOT143-4
<39> CPLGP1
CPLGP1
QB2A
TV@
2
2N7002DW -T/R7_SOT363-6
2
1
RB13 TV@
10K_0402_5%
2
B
For ESD
1
2
RB12
TV@
10K_0402_5%
QB4 TV@
2SB1197K_SOT23-3
BCIO
BCIO <39>
10K_0402_5%
+5VS_L_BCAS
TV@
2
1
2
RB14
TV@
1.5K_0402_5%
Compal Secret Data
200910/9
Issued Date
Deciphered Date
2010/01/23
RB1
1
Title
IR/FP/B-CAS/Felica
Size
Document Number
Rev
0.1
PHQAA LA-6831P M/B

Date:
Sheet
1
38
of
58
Disable
BT_CRTL
BT_ON#
PCIE--JET
Short PJ27 for Wimax

Short PJ26 for WLAN
**If +3V_WLAN is +3VS, please

remove D24
<38> BCRSTM
<38> BCPWON
<29> PCIE_PRX_JETTX_N3
<29> PCIE_PRX_JETTX_P3
CM2
CM3
C253
CM7
CM8
47P_0402_50V8J
2
@
4.7U_0805_10V4Z
0.01U_0402_25V7K
0.01U_0402_25V7K
Q36
CM1
<29> PCIE_PTX_C_JETRX_N3
<29> PCIE_PTX_C_JETRX_P3
2
G
<33> BT_ON#
0.1U_0402_16V4Z
BT_CTRL
For SED
S 2N7002_SOT23-3
+3VS
CM9
C254
47P_0402_50V8J
@
4.7U_0805_10V4Z
0.1U_0402_16V4Z
+1.5VS
For SED
SUSP#
40 mils
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
BCCDET
<29> CLK_JET#
<29> CLK_JET
D24
+3V_WLAN
B-CAS
<38> XBCLKM
<29> CLKREQ_JET#
PJ26@ JUMP_43X79
<44> TMPTU2_SXP
<29> PCIE_PRX_WLANTX_N2
<29> PCIE_PRX_WLANTX_P2
<29> PCIE_PTX_C_WLANRX_N2
<29> PCIE_PTX_C_WLANRX_P2
WLAN/ WiFi
+3V_WLAN
R16
10_0402_5%2
1
2
<44> E51_TXD
<44> E51_RXD
E51_RXD_R
0_0402_5%
R17
53
GND1
Debug card using
GND2
C255
47P_0402_50V8J
@
4.7U_0805_10V4Z
2.75A
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
CM6
+UIM_PWR
UIM_DATA
UIM_CLK
UIM_RESET
COMMON
ISDBT_DET
ISDBT_DET <33>
RF_OFF#
RF_OFF# <32>
PLT_RST#
USB20_P10_TV 1 R126
2 TV@ 0_0402_5%
USB20_N10_TV 1
2 TV@ 0_0402_5%
R135
R72 1 3G@
PM_SMBCLK
2 0_0402_5%
R85 1 3G@
PM_SMBDATA
2 0_0402_5%
USB20_N12 <32>
USB20_P12 <32>
RM3
1 3G@
0_0402_5%
UIM_VPP
2
COMMON
1 TV@
RM7
USB--TV#2
BCIO
2
0_0402_5%
Close to J3G
1 TV@
+5VS_BCAS
USB--3G/TV#1
RM4
1 3G@
+UIM_PWR
LED_WIMAX#
CPLGP1
CPLGP1 <38>
TMPTU1_SXP <44>
RM1
UIM_RESET
B_BCRST
<38> B_BCRST
BCCDET
For isolate Intel Rainbow Peak and

Compal Debug Card.
1 TV@
+UIM_PWR
470_0402_5%
UIM_DATA
RM6
CM13
0.1U_0402_16V4Z
3G@
WiMax
DM1
RLZ20A_LL34
3G@
LED_WIMAX# <46>
100K_0402_5%
WIMAX@
1 3G@
1 TV@
RM12
1
J3GSIM
+VCC_SIM
SIM_RESET
SIM_CLK
LED_WIMAX#
1 TV@
RM11
WL_OFF# <32>
PLT_RST# <5,32,40,41,42,44,45>
USB20_N9 <32>
USB20_P9 <32>
1 3G@
RM10
BCIO
PLT_RST#
RM9
B_XBCCLK
<38> B_XBCCLK
R307
1
2
3
7
1
CM15
10P_0402_50V8J
3G@ 2
SIM_RESET
0_0402_5%
0_0402_5%
54
Add BCCDET pull down
E51_RXD_R
1K_0402_5%
0_0603_5%
1 TV@
RM8
+VCC_SIM
0_0603_5%
1 3G@
RM5
B-CAS
UIM_CLK
1 R327
BT_CTRL
BCIO <38>
USB20_P10 <32>
USB20_N10 <32>
FOX_AS0B226-S40N-7F
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND1
CM5
0.01U_0402_25V7K
GND
VPP
I/O
NC
NC
SIM_CLK
0_0402_5%
0_0402_5%
SIM_DATA
0_0402_5%
0_0402_5%
RM2
4.7K_0402_5%
@
VCC
RST
CLK
4
5
6
UIM_VPP
SIM_DATA
<29> CLK_WLAN#
<29> CLK_WLAN
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
For SED
+3V_WLAN
BT_CTRL
<29> CLKREQ_WLAN#
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
+3VS
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
+1.5VS
JWLAN
CM4
+1.5VS
J3G
+3V_WLAN
PJ27@ JUMP_43X79
+3VS
BT
on module
Enable
+3VALW
BT
on module
120 mils
0.1U_0402_16V4Z
Slot 1 Half PCIe Mini Card-WLAN/ WiMax
+3VS
Slot 2 Full PCIe Mini Card- 3G/ TV Tuner

Half PCIe Mini Card- JET
WLAN&BT Combo module circuits
MOLEX_47273-0001~D
CM16
10P_0402_50V8J
2 3G@
CM14
22P_0402_50V8J
@
+3VS
54
GND2
FOX_AS0B226-S40N-7F
+3VALW_CARD
+3VS_CARD
Imax = 0.275A
1
+3VALW
NEW@
RN4
2 CP_USB#
CN1
10U_0805_10V4Z
NEW@
CN2
0.1U_0402_16V4Z
NEW@
CN3
10U_0805_10V4Z
NEW@
UN1
12
14
2
4
+3VS
17
+3VALW
PLT_RST#
+3VS
UN2
@
G Vcc
2
2
2
1
2
G
SUSP#
RN6
10K_0402_5%
@
RCLKEN
<42,44,52> SYSON
+3VS
<28,44,47,52,54,56>
+3VS
CLKREQ#
Imax = 0.75A
1
CN4
0.1U_0402_16V4Z
NEW@
CN5
10U_0805_10V4Z
NEW@
JEXP
CN6
0.1U_0402_16V4Z
NEW@
USB20_N4_R
USB20_P4_R
CP_USB#
100K_0402_5%
+1.5VS
RN7
10K_0402_5%
@
+1.5VS_CARD
Imax = 1.35A
1
2
4
CN7
0.1U_0402_16V4Z
@
CLKREQ_NEW#
CLKREQ_NEW#
<29>
SYSON
20
SUSP#
EXP_CPPE#
10
CP_USB#
RCLKEN
18
NEW@
1.5Vin
1.5Vin
1.5Vout
1.5Vout
3.3Vin
3.3Vin
3.3Vout
3.3Vout
AUX_IN
SYSRST#
SHDN#
AUX_OUT
OC#
PERST#
STBY#
NC
CPPE#
GND
CPUSB#
Thermal_Pad
RCLKEN
TPS2231MRGPR-2 QFN
11
13
3
5
15
PM_SMBCLK
PM_SMBDATA
40mils
+1.5VS_CARD
+1.5VS_CARD
<30,40,42> EC_SWI#
+3VALW_CARD
60mils
+3VS_CARD
+3VALW_CARD
<32> EXP_CPPE#
<29> CLK_NEW#
<29> CLK_NEW
19
8
Reserve for EMI request
PERST#
R125
7
<32> USB20_P4
<32> USB20_N4
0_0402_5%
L56
CLKREQ#
EXP_CPPE#
<29> PCIE_PRX_NEWTX_N5
<29> PCIE_PRX_NEWTX_P5
1 NEW@ 2
16
21
PERST#
+3VS_CARD
20mils
USB20_P4_R
USB20_N4_R
<29> PCIE_PTX_C_NEWRX_N5
<29> PCIE_PTX_C_NEWRX_P5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
WCM-2012-900T_0805
GND
USB_DUSB_D+
CPUSB#
RSV
RSV
SMB_CLK
SMB_DATA
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLKREFCLK+
GND
PERn0
PERp0
GND
PETn0
PETp0
GND
GND
GND
GND
GND
29
30
SANTA_130801-5_NR
NC7SZ32P5X_NL_SC70-5
1 NEW@ 2
Q27
2N7002_SOT23-3
@
R124
RN8
2 CLKREQ_NEW#
0_0402_5%
Issued Date
Compal Secret Data
NEW@
CLKREQ#
0_0402_5%
200910/9
Deciphered Date
2010/01/23
Title
PCIe-WLAN/JET/3G/TV/NewCard
Size
Document Number
Rev
0.1
PHQAA LA-6831P M/B

Date:
Sheet
39
of
58
UL1
<29> PCIE_PRX_C_LANTX_P1
CL1
<29> PCIE_PRX_C_LANTX_N1
CL2
2 0.1U_0402_16V7K PCIE_PRX_LANTX_P1
2 0.1U_0402_16V7K PCIE_PRX_LANTX_N1
CLKREQ_LAN#
<5,32,39,41,42,44,45> PLT_RST#
+3V_LAN
<29> CLK_LAN
<29> CLK_LAN#
RL24 2 @
1 10K_0402_5%
CLKREQ_LAN#
RL25 2 @
1 10K_0402_5%
EC_SWI#
RTL8105E
+3VS
NC
Pin15
NC
Pin38
RTL8111E
19
20
LAN_X1
43
LAN_X2
44
ISOLATE#
REFCLK_P
REFCLK_N
ENSWREG
WOL_EN
2
0_0402_5%
CKXTAL2
Sx Enable Sx Disable
Wake up
Wake up
RL7
15K_0402_5%
WOL_EN
LOW
1
RL5
S0
RL2 2
RL1 2
1 10K_0402_5%
1 10K_0402_5%
LAN_MDI0+
LAN_MDI0LAN_MDI1+
LAN_MDI1LAN_MDI2+
LAN_MDI2LAN_MDI3+
LAN_MDI3-
1
2
4
5
7
8
10
11
8111E@
+LAN_REGOUT
1
2
2.2UH +-5% NLC252018T-2R2J-N
Layout Note: LL1 must be
within 200mil to Pin36,
CL13,CL9 must be within
200mil to LL1
13
29
41
DVDD10
DVDD10
DVDD10
ISOLATEB
14
15
38
AVDD33
AVDD33
AVDD33
AVDD33
ENSWREG
EVDD10
VDDREG
VDDREG
2
46
2.49K_0402_1%
24
49
AVDD10
AVDD10
AVDD10
AVDD10
RSET
GND
PGND
21
+LAN_EVDD10
3
6
9
45
+LAN_VDD10
CL17
0.1U_0402_16V4Z
Close to Pin 21
+3V_LAN
8111E@
8111E@
2
0_0603_5%
CL28
4.7U_0603_6.3V6K
8111E@ 2
+LAN_REGOUT
60 mils
LL3
0_0603_5%
8105E-SWR@
YL1
LAN_X1
+3VALW
1
@
CL482
0.01U_0402_25V7K
RL4
0_0402_5%
8111E@
8111E@
NC
RL4
0_0402_5%
8105E-SWR@
+3V_LAN
CL682
1U_0402_6.3V4Z
2 @
LAN Conn.
1
1
CL683 +
220U_6.3V_M_R16
@
2
1
2
3
LAN_MDI3LAN_MDI3+
UL1
4
5
6
LAN_MDI2LAN_MDI2+
CL684
10U_0805_10V6K
@
JLAN
3
LAN_MDI1LAN_MDI1+
7
8
9
LAN_MDI0LAN_MDI0+
10
11
12
TCT1
TD1+
TD1-
MCT1
MX1+
MX1-
TCT2
TD2+
TD2-
MCT2
MX2+
MX2-
TCT3
TD3+
TD3-
MCT3
MX3+
MX3-
TCT4
TD4+
TD4-
MCT4
MX4+
MX4-
24
23
22
21
20
19
18
17
16
15
14
13
CL39 1000P_0402_50V7K
2
1
1 8111E@ 2
8111E@
RL11
75_0402_1%
CL40 1000P_0402_50V7K
2
1
1 8111E@ 2
8111E@
RL12
75_0402_1%
CL41 1000P_0402_50V7K
2
1
1
2
RL13
75_0402_1%
CL42 1000P_0402_50V7K
2
1
1
2
RL15
75_0402_1%
Place CL34 colse

to LAN chip
RJ45_MIDI3RJ45_MIDI3+
RJ45_MIDI3-
PR4-
RJ45_MIDI3+
PR4+
RJ45_MIDI1-
RJ45_MIDI2-
RJ45_MIDI2+
RJ45_MIDI1+
RJ45_MIDI0-
RJ45_MIDI0+
PR3PR3+
PR2+
PR1PR1+
SHLD1
SHLD2
1
CL36
2
1000P_1808_3KV7K
LANGND
1
Compal Secret Data
2009/10/05
2010/01/23
Deciphered Date
A
10
SUPERWORLD_SWG150401
8111E@
Issued Date
SANTA_130451-D
@
RJ45_GND
CL34
0.1U_0402_25V4K
PR2-
RJ45_GND
1
10/100M transformer
8105E-SWR@
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
0 ohm
(Pull Down)
UL4
10/100M transformer
8105E-LDO@
1
CL19
1
CL20
1
CL21
1
CL22
1
CL23
1
CL24
1
CL25
CL29
0.1U_0402_16V4Z
8105E-SWR@
FOR EMI ISN TEST DEMAND.
0.1U_0402_16V4Z
CL29
0.1U_0402_16V4Z
2 8111E@
+3V_LAN rising time (10%~90%) need > 1ms and <100ms.
UL4
0.1U_0402_16V4Z
2
RTL8105E-VC RTL8105E-VC
RTL8111E-VB
PWM Mode
LDO Mode
RL4
0 ohm
NC
(Pull High)
RL23
RL23
0_0402_5%
8105E-LDO@
UL4
0.1U_0402_16V4Z
2
ENSWREG
PJ29
JUMP_43X79
@
+3V_LAN
8105E-VC 10/100M
8105E-SWR@
0.1U_0402_16V4Z
2
1
CL681
4.7U_0805_10V4Z
@
8105E-VC 10/100M
8105E-LDO@
0.1U_0402_16V4Z
2
AO3413_SOT23
CL27
27P_0402_50V8J
CL26
27P_0402_50V8J
2
2
3
1
@ QL51
2
@ RL432
CL28
4.7U_0603_6.3V6K
8105E-SWR@
+3V_LAN
LAN_X2
CL483
@
0.1U_0402_16V7K
S
UL1
8111E@
+LAN_VDDREG
1
8111E@ LL3
25MHZ_20PF_7A25000012
For P/N and footprint

Please place them to ISPD page
0.1U_0402_16V4Z
2
CL19, CL20,CL21 close to pin 13,29,45, respectively

CL22 close to pin 3, respectively
CL23,CL24,CL25 close to pin 6,9,41, respectively
2
0_0603_5%
CL18
1U_0402_6.3V4Z
+3V_LAN
36
REGOUT
+3VALW
CL9
0.1U_0402_16V4Z
8105E-SWR@
+LAN_VDD10
+3V_LAN
12
42
47
48
+3VALW TO +3V_LAN
47K_0402_5%
CL13
4.7U_0603_6.3V6K
8105E-SWR@
+LAN_EVDD10
1
LL2
27
39
DVDD33
DVDD33
NC/SMBCLK
NC/SMBDATA
GPO/SMBALERT
34
35
CL9
0.1U_0402_16V4Z
2 8111E@
CL13
4.7U_0603_6.3V6K
8111E@ 2
+LAN_VDD10
+LAN_VDD10
RTL8111E-GR_QFN48_6X6
8111E@
<44> WOL_EN
1
CL3
1
CL4
1
CL5
1
CL6
1
8111E@ CL7
1
8111E@ CL8
HIGH
HIGH
RL147
100K_0402_5%
@
LL1
2.2UH +-5% NLC252018T-2R2J-N
8105E-SWR@
LANWAKEB
33
+LAN_VDDREG
30
32
CL3 to CL6 close to Pin 27,39,47,48

CL7 to CL8 close to Pin 12,42
+LAN_VDD10
LL1
CKXTAL1
26
RL21 2 8111E@ 1 10K_0402_5%

RL22 1
2 1K_0402_5%
+3V_LAN
EECS/SCL
EEDI/SDA
MDIP0
MDIN0
MDIP1
MDIN1
NC/MDIP2
NC/MDIN2
NC/MDIP3
NC/MDIN3
PERSTB
28
1K ohm Pull-high
1
RL433
CLKREQB
10K ohm PD
1K_0402_5%
RL6
@
ISOLATE#
CLK_LAN
CLK_LAN#
EC_SWI#
<30,39,42> EC_SWI#
NC
1
16
0_0402_5%
25
HSIP
HSIN
31
37
40
Pin14
HSON
LED3/EEDO
LED1/EESK
LED0
23
2
RL19
PLT_RST#
+3V_LAN
HSOP
PCIE_PTX_C_LANRX_P1 17
PCIE_PTX_C_LANRX_N1 18
<29> PCIE_PTX_C_LANRX_P1
<29> PCIE_PTX_C_LANRX_N1
<29> CLKREQ_LAN#
22
Title
CL37
0.1U_0402_16V4Z
CL38
4.7U_0603_6.3V6K

PCIe-LAN-RTL8105E/8111E

Custom
Rev
0.1
PHQAA LA-6831P M/B
Date:
Sheet
E
40
of
58
+1.8VS_OUT CC3 close to pin 5
JMB389C
1
CC3
2
1
CC4
2
0.1U_0402_16V4Z
CC16 close to pin43

For internal LDO in SD3.0
1
CC2
1000P_0402_50V7K
10U_0805_10V4Z
1
CC1
0.22U_0402_6.3V4K
CC2 close to CC3

CC1 is near CC3
20mil
D3E mode
CC4 close to pin 10
+3VS
CC8
CC9
<29> PCIE_PRX_C_CRTX_N4
<29> PCIE_PRX_C_CRTX_P4
1
1
2
2
3
4
PCIE_PTX_C_CRRX_N4
PCIE_PTX_C_CRRX_P4
PCIE_PRX_CRTX_N4
PCIE_PRX_CRTX_P4
0.1U_0402_16V7K
0.1U_0402_16V7K
2
CC16
APRXN
APRXP
11
12
APTXN
APTXP
+SDV33_18
1
2.2U_0603_6.3V6K
43
39
RC3
APCLKN
APCLKP
9
8
APREXT
1
12K_0402_1% 12mil
RC4
PLT_RST#
2 100_0402_5%
1
CC13
0.1U_0402_16V4Z
1
2
CPPE#
XD_CD#
13
14
MS_CD#
SD_CD#
SDDV/MDIO4
TXIN/NC
XRSTN
XTEST
CPPE_N
CR1_CD2N
15
16
CR1_CD1N
CR1_CD0N
17
CR1_PCTLN
40 mils
+VCC_OUT
+VCC_OUT
CR_LED
RC7
RC9
21
XDW P#_SDW P#
1
10K_0402_5%
2
1K_0402_5%
APVDD
APV18
NC/TAV33
5
10
36
DV33
DV33
DV33
DV18
DV18
19
20
44
18
37
MDIO0
MDIO1
MDIO2
MDIO3
MDIO6/4
MDIO5
G/MDIO6
MDIO7
MDIO8
MDIO9
MDIO10
MDIO11
MDIO12
MDIO13
MDIO14
48
47
46
45
41
42
24
40
29
28
27
26
25
23
22
APREXT
JMB389
<5,32,39,40,42,44,45>
0_0402_5%
CPPE#
2
<28> CR_W AKE#
RC6
1
0_0402_5%
SD_CD#
2
place near pin 19,20 and 44
CLK_CR#
CLK_CR
<29> PCIE_PTX_C_CRRX_N4
<29> PCIE_PTX_C_CRRX_P4
RC31
1
+3VS
UC1
<29> CLK_CR#
<29> CLK_CR
<28> CR_CPPE#
NC/SPI_SCK
NC/SPI_CSN
NC/SPI_SO
NC/SPI_SI
30
33
34
35
APGND
NC/GND
NC/GND
NC/GND
6
31
32
38
40mil
CC5
CC6
CC7
1
1
1
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
+1.8VS_OUT
20mil
CC12
0.1U_0402_16V4Z
CC12 close to pin 36
Power On Strapping setting

XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
SDCMD_MSBS_XDW E#
SDCLK_MSCLK_XDCE#
XDW P#_SDW P#
XD_CLE
XD_SD_D4
XD_SD_D5
XD_SD_D6
XD_SD_D7
XD_RE#
XD_RB#
XD_ALE
CC10
CC11
1
2
0.22U_0402_6.3V4K
Description
Pin name
10U_0805_10V4Z
CC11 close to pin18

For intenal LDO's usage
MDIO7
CC10 close to pin37
MDIO14
High
on-board
add-in card
CR_LED
high active
CR_LED
low active
+3VS
XD_CLE
MDIO7
XD_ALE
CR1_LEDN
low
MDIO14
1
RC28
1
RC26
1
RC25
10K_0402_5%
2
1K_0402_5%
2
200K_0402_5%
XD_RB#
Vendor review to set @
JMB389-LGAZ0A_LQFP48_7X7
Add RC24 and RC17 close to UC1 for xD issue

SDCMD_MSBS_XDW E#
XDW E#
2
RC24
1
22_0402_5%
2
RC17
SDCMD_MSBS
1
22_0402_5%
5 in 1 Card Reader
B
SD_CD#
XD_CD#
JREAD
+VCC_OUT
40 mils
CC22
0.1U_0402_16V4Z
@
CC23
0.1U_0402_16V4Z
@
CC17
10U_0805_10V4Z
CR_LEDCON#
2
RC8
CR_LEDCON#
CC18
0.1U_0402_16V4Z
XD_CD#
XD_RB#
XD_RE#
XD_CE#
XD_CLE
XD_ALE
XDW E#
XDW P#_SDW P#
33
34
1
2
3
4
5
6
7
XD-VCC
XD-CD-SW
XD-R/B
XD-RE
XD-CE
XD-CLE
XD-ALE
XD-WE
XD-WP
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
XD_SD_D4
XD_SD_D5
XD_SD_D6
XD_SD_D7
8
9
26
27
28
30
31
32
XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7
14
15
17
21
19
20
18
16
MS_CLK
MS_CD#
SDCMD_MSBS
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
SD-VCC
SD-CLK
SD-CMD
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-WP-SW
SD-CD-SW
23
24
12
25
29
10
11
35
36
SD_CLK
SDCMD_MSBS
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
XDW P#_SDW P#
SD_CD#
4in1-GND
4in1-GND
4in1-GND
4in1-GND
13
22
37
38
<46>
1
0_0402_5%
MS-VCC
MS-SCLK
MS-INS
MS-BS
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3
+VCC_OUT
SDCLK_MSCLK_XDCE#
SD_CLK
RC12 1
2 22_0402_5%
MS_CLK
RC13 1
2 22_0402_5%
XD_CE#
Reserved for EMI,close to UC1.42
@
RC14
SD_CLK
MS_CLK
XD_CE#
100_0402_5%
100P_0402_50V8J
@
@
RC16
CC21
1
2
1
2
TAITW _R015-211-LM-A_NR
100_0402_5%
100P_0402_50V8J
@
CC20
1
2
100P_0402_50V8J
A
CR_LED
2
2
G
@
CC19
1
2
100_0402_5%
@
RC15
1
2
Reserved for EMI,close to JREAD
Confirm sinking 16mA
RC10
4.7K_0402_5%
@
Compal Secret Data
QC1
2N7002_SOT23-3
@
2 22_0402_5%
+VCC_OUT
RC11 1
200910/9
Issued Date
Deciphered Date
2010/01/23
5
Title

PCIe-CardReader JMB389

Custom
Date:
Rev
0.1
PHQAA LA-6831P M/B
Sheet
1
41
of
58
+1.5V to +1.05V Transfer

1
Close to U102.D7
+1.5V
+1.05V
UT2
U3RXDP1_R
1
U3RXDN1_R
USB20_DN1_L
USB20_DP1_L
+3VALW
+3VA
2 RT4
0_0402_5%
WCM-2012-121T_0805
3
4
3
U3TXDP1
1
LT1 @
1
USB30@
2 RT6
0_0402_5%
2 RT5
0_0402_5%
WCM-2012-121T_0805
3
4
3
4
1
U3RXDN1_R_L
U3TXDN1
+USB_VCCB
U3TXDP1_L
USB30@ 1
DT2
U3RXDN1_R_L
U3RXDP1_R_L
U3TXDN1_L
U3TXDP1_L
1
LT2 @
1
USB30@
2 RT7
0_0402_5%
1
2
3
4
RR+
TT+
8
7
6
5
VCC
GND
DD+
USB20_DN1_L
USB20_DP1_L
LXES4XBAA6-027_MSOP8
@
U3TXDN1_L
Follow Vendor recommend.

2
+1.05VR
U3RXDP1_R_L
USB30@ 1
+1.05V
+3VALW
PJDLC05C_SOT23-3
1
CT9
RT3
32.4K_0402_1%
Vout=0.8(1+10K/32.4K)
1.042 ~ 1.0469 ~ 1.0519V
Spec: 0.9975 ~ 1.05
~ 1.1025
8P_0402_50V8K
CT8
GND
APL5930KAI-TRG_SO8
1
RT2
10K_0402_1%
0.01U_0402_16V7K~N
CT7
0.1U_0402_16V7K~N
CT6
EN
DT1
1
CT3
10U_0603_6.3V6M
8
SYSON
<39,44,52> SYSON
+3VA
8P_0402_50V8K
CT5
USB30_POK
3
4
VIN
VOUT
VIN
VOUT
VCNTL
POK
FB
Close to U102.P13
+3VA
0.01U_0402_16V7K~N
CT4
5
9
6
7
1A
0.1U_0402_16V7K~N
+5VALW
CT2
10U_0603_6.3V6M
CT1
1U_0603_10V6K~N
+1.5V
+5VALW
D2
D1
F2
F1
+3V:200mA
PETXP
PETXN
+1.05V:800mA
U3TXDN2
U2DM2
U2DP2
U3RXDP2
U3RXDN2
USB20_DP1_L
0.1U_0402_16V4Z
1
USB20_DN1_L
CT26
CT31
CT27
220U_6.3V_M_R15
CT28
2
1000P_0402_50V7K
RT10
+USB_VCCB
B6
USB30PWRON
OCL1#
A6
N8
@
RT11 10_0402_5% 2
RT19 10_0402_5% 2
USB30@
USB_CHG_EN
USB_OC#1
JUSB20
USB20_DN1_L
USB20_DP1_L
P8
B8
1
2
3
4
VCC
DD+
GND
@
5
6
7
8
GND
GND
GND
GND
P-TWO_CU304G-A0G1G-P
A8
2
+3VALW
@ WCM-2012-900T_0805
1
2
USB30@ 0_0402_5%
P13
D7
U3TXDP2
PERXP
PERXN
W=80mils
4.7U_0805_10V4Z
U2AVDD10
U3AVDO33
H11
K11
K12
L8
VDD10
VDD10
VDD10
VDD10
E11
E12
E3
E4
H3
H4
L5
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
C8
C9
D8
D9
VDD10
VDD10
VDD10
VDD10
C4
C5
C6
C7
D5
VDD10
VDD10
VDD10
VDD10
VDD10
N4
N5
N6
P3
VDD33
VDD33
VDD33
VDD33
L13
L14
VDD33
VDD33
L9
L10
PECLKP
PECLKN
0_0402_5%
2
USB20_GND
1
USB30@
LT4
PCIE_PRX_USBTX_P6
PCIE_PRX_USBTX_N6
<29> PCIE_PTX_C_USBRX_P6
<29> PCIE_PTX_C_USBRX_N6
VDD33
VDD33
F3
G3
G4
D10
F13
F14
VDD33
VDD33
VDD33
CT29 2
CT30 2
<29> PCIE_PRX_C_USBTX_P6
<29> PCIE_PRX_C_USBTX_N6
RT9
USB20_DP1_R
B2
B1
USB30@
1 0.1U_0402_16V7K
1 0.1U_0402_16V7K
USB30@
+3VA
USB20_DN1_R
<BOM Structure>
UT1
<29> CLK_USB30
<29> CLK_USB30#
+USB_VCCB
+1.05VR
VDD33
VDD33
VDD33
CT25
0.1U_0402_16V7K~N
RT8
0_0805_5%
+3VALW
1
2
BLM18AG601SN1D_2P
10U_0805_6.3V6M
0.1U_0402_16V7K~N
CT24
0.1U_0402_16V7K~N
CT23
0.1U_0402_16V7K~N
CT22
0.1U_0402_16V7K~N
CT21
0.1U_0402_16V7K~N
CT20
0.1U_0402_16V7K~N
CT19
0.1U_0402_16V7K~N
0.1U_0402_16V7K~N
CT18
CT17
CT16
0.1U_0402_16V7K~N
0.1U_0402_16V7K~N
USB30@
RT12 10_0402_5% 2
+3VALW
+3VALW
USB30@
<33> USB30_SMI#
RT15
RT16
RT17
H2
K1
K2
2 10K_0402_5%
100_0402_1%
2
J2
10K_0402_5%
2
J1
H1
USB30_SMI#_R
P4
USB30_WAKE#
1
@1
@
1
RT18 10_0402_5% 2
USB30_POK
USB30_POK
P5
PERSTB
PEWAKEB
PECREQB
OCI2B
OCI1B
AUXDET
PSEL
SMI
SMIB
PPON2
PPON1
PONRSTB
U3TXDP1
M2
N2
N1
M1
K13
K14
J13
SPISCK
SPISCB
SPISI
SPISO
U3TXDN1
U2DM1
U2DP1
U3RXDP1
GND
GND
GND
U3RXDN1
H14
J14
OCI2#
OCL1#
1 RT13
2 10K_0402_5%
RT14
0_0805_5%
USB20@
+3VALW
JUSB30
USB30PWRON
USB30PWRON
U3TXDP1_L
<44>
+USB_VCCB
B10
U3TX_C_DP1 CT32
A10
N10
U3TX_C_DN1 CT33
U2D_DN1_R
P10
B12
U2D_DP1_R
U3RXDP1_R
1 0.1U_0402_16V4Z
USB30@
1 0.1U_0402_16V4Z
USB30@
9
1
8
3
7
2
6
4
5
U3TXDN1_L
USB20_DP1_L
U3TXDP1
USB20_DN1_L
U3RXDP1_R_L
U3TXDN1
U3RXDN1_R_L
A12
U3RXDN1_R
P12
N12
RT22
SSTX+
VBUS
SSTXD+
GND
DSSRX+
GND
SSRX-
10
11
GND
GND
SANTA_371394-1
@
RT21
1M_0402_5%
USB30@
USB30_GND
0.01U_0402_16V7K
2
2
CT35
CT36
USB30@
USB30@
1
SPI_CLK_USB
SPI_CS_USB#
SPI_SI_USB
SPI_SO_USB
G14
H13
<5,32,39,40,41,44,45>
PLT_RST#
<30,39,40> EC_SWI#
<29> CLKREQ_USB30#
RT1
4.7K_0402_5%
CT15
0.1U_0402_16V7K~N
CT14
0.1U_0402_16V7K~N
0.1U_0402_16V7K~N
CT13
CT12
0.1U_0402_16V7K~N
CT11
CT10
LT3
1
0.1U_0402_16V4Z
C14
RREF
U2AVSS
GND
U2PVSS
2
@
RT31
1
0_0402_5%
CT38
12P_0402_50V8J
CT37
12P_0402_50V8J
RT301
2
0_0402_5%
24MHZ 12PF +-20PPM X5H024000DC1H
RT291
2
0_0402_5%
YT1
2
P6
RT281
2
0_0402_5%
RT26
100_0402_5%
CLK_48M_USB
N14
M14
+3VALW
<29> 48MCLK_USB30
CSEL
CSEL=0
CSEL=1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
21.6K_0402_1%
N11
D6
USB20@
10_0402_5% 2 RT23
USB20@
10_0402_5% 2 RT24
<32> USB20_N3
<32> USB20_P3
24MHz
XTAL
48MHz Clock
U2D_DN1
U2D_DP1
U2D_DN1_R 10_0402_5% 2 RT25

USB30@
U2D_DP1_R 10_0402_5% 2 RT27
USB30@
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
P14
P11
P9
P7
P2
P1
N13
N9
N7
N3
M13
M12
M11
M10
M9
M8
M7
M6
M5
M4
M3
L12
L11
L7
L6
+5VALW
USB Sleep & Charge

Auto-Mode
+USB_VCCB
OCP: 2A
W=80mils
U4
1
1
USB_OC#1
13
U2D_DN1
U2D_DP1
2
3
<44> USB_CHG_EN
USB_CHG_EN
4
5
<32> SLP_CHG_M4
<32> SLP_CHG_M3
<44> SLP_CHG
SLP_CHG_M4
SLP_CHG_M3
SLP_CHG
6
7
8
<32,44> USB_OC#1
C390
07/08/2010
Need EC to set these signals to high active
SLP_CHG, USB_CHG_EN
0.1U_0402_16V4Z
IN
FAULT#
OUT
NC
DM_OUT DM_IN
DP_OUT DP_IN
ILIM_SEL
DSC
CTL1
CTL2
CTL3
ILIM1
ILIM0
12
9
USB20_DN1_R
USB20_DP1_R
11
10
15
16
R101
1
24K_0402_1%
GND
GPAD
14
17
TPS2541RTER_QFN16_3X3
C12
C13
D3
D4
D11
D12
D13
D14
E1
E2
E13
E14
F4
F6
F7
F8
F9
F11
F12
G1
G2
G6
G7
G8
G9
G11
G12
G13
H6
H7
H8
H9
H12
J3
J4
J6
J7
J8
J9
J11
J12
K3
K4
L1
L2
L3
L4
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Place as close as possibile to

UU102.N14 and UU102.M14
A1
A2
A3
A4
A5
A7
A9
A11
A13
A14
B3
B4
B5
B7
B9
B11
B13
B14
C1
C2
C3
C10
C11
U3AVSS
XT1
XT2
+3VALW
SLP_CHG_M4
SLP_CHG_M3
SLP_CHG
X(1)
Dedicated Charging Port, Auto-detect
Mode
X(1)
Dedicated Charging Port, BC Specification 1.1 Only (Mode 3)
X(1)
Dedicated Charging Port, Apple Only (Mode 4)
Standard Downstream Port, USB 2.0 Mode
Charging Downstream Port, BC Specification 1.1
UPD720200AF1-XXX-A_FBGA176
UT4
SPI_CS_USB#
SPI_SO_USB
1
2
3
4
CS#
SO
WP#
GND
35mA
VCC
HOLD#
SCLK
SI
1 RT34
2
0_0402_5%
8
7
6
5
CT39
2
10.1U_0402_16V7K~N
1 RT35
1 RT36
210K_0402_5%
20_0402_5%
Close to UU37.6
SPI_CLK_USB
SPI_SI_USB
MX25L5121EMC-20G SOP 8P
0.1U_0402_16V7K~N
SPI_CLK_USB
CT40
10K_0402_5%
RT33
2
RT32
2
1
1K_0402_5%
Compal Secret Data
Issued Date
200910/9
Deciphered Date
2010/01/23
Title
Size
Document Number
Custom
Date:

PCIe-USB3.0 UPD720200A
Rev
0.1
PHQAA LA-6831P M/B
Sheet
1
42
of
58
CA57
place close to chip
CA1
CA10 1
0_0402_5%
4.7U_0805_10V4Z
<25> INT_MIC_DATA
<44> EC_MUTE#
For EMI
CA22
CA11
0.01U_0402_25V7K
@
1
CA12
SPKR+
CA25
@ 10U_0805_10V4Z
2
2 0.1U_0603_50V7K
CA50 1
2 0.1U_0603_50V7K
1
10_0603_5%
38
AVDD2
25
AVDD1
39
46
PVDD2
PVDD1
45
44
SPKR+
SPKR-
21
22
MIC1_L
MIC1_R
HP_OUT_L
HP_OUT_R
32
33
16
17
MIC2_L
MIC2_R
EC_MUTE#
PD#
12
SENSE A
18
SENSE B
36
35
CBP
CBN
SPK_R1
75_0402_1%
75_0402_1%
HP_L <37>
DA6
10
AZ_SYNC_HD
BCLK
AZ_BITCLK_HD
SDATA_OUT
SDATA_IN
AZ_SDOUT_HD
AZ_SDIN0_HD_R
AZ_SYNC_HD
<28>
AZ_BITCLK_HD
<28>
47
48
MONO_OUT
20
MIC2_VREFO
29
MIC1_VREFO_R
LDO_CAP
30
28
VREF
27
AC_VREF
1
33_0402_5%
AZ_SDIN0_HD
MIC1_VREFO_L
JDREF
19
43
42
49
7
PVSS2
PVSS1
DVSS2
DVSS1
CPVEE
34
CPVEE
1
CA14
AVSS1
AVSS2
26
37
Ext.MIC/LINE IN JACK
Function
PORT-B (PIN 21, 22)
Ext. MIC
MIC1_LINE1_R_L
10K
PORT-C (PIN 23, 24)
PORT-F (PIN 16, 17)
2
1
1K_0402_5%
RA32
CA17
2
2
0.1U_0402_16V4Z
CA16
2.2U_0603_6.3V6K
@
+MIC1_VREFO_R
MIC1_R <37>
MIC1_L <37>
RA29 1
2
2.2K_0402_5%
+MIC1_VREFO_L
B
MIC_SENSE
AGND
1 4.7K_0402_5%
+3VL
place close to chip

MIC_SENSE
20K
RA33
2 RA31
1
1K_0402_5% 2.2K_0402_5%
2
1
MIC1_LINE1_R_R
1 20K_0402_1%
2
2.2U_0603_6.3V4Z
CA18
0.1U_0402_16V4Z
RA28
RA22 2
20K
PORT-E (PIN 14, 15)
QA1A
Headphone out
39.2K
MONO_IN
0.1U_0402_16V4Z
2N7002DW -T/R7_SOT363-6
PORT-I (PIN 32, 33)
(PIN 48)
CA13
1
2
Change to AGND for

high frequency noise issue
place close to chip
DGND
5.1K
3
PESD5V0U2BT_SOT23-3
RA42
100K_0402_5%
@
Codec Signals
SPK_R2
RA12
10K_0402_5%
CA23 10U_0805_10V4Z
1
2
+MIC1_VREFO_R
31
CA27
1U_0402_6.3V4Z
@
RA8
1
2
47K_0402_5%
<28>
CA29
1
1
2 @
RA17
10P_0402_50V8J
AZ_BITCLK_HD 2
10_0402_5%
AC_JDREF2 RA9
AZ_SDOUT_HD <28>
2
RA6
For EMI
EAPD
SPDIFO
ACES_85204-0400N
@
2
2
1
2
3
4
RA7
1
2
47K_0402_5%
PCI Beep
HP_R <37>
1
2
3
4
Beep sound
EC Beep
RA5
SPK_L1
SPK_L2
SPK_R1
SPK_R2
ALC269Q-VB5-GR _QFN48_7X7
39.2K
10K
close to chip
<44> EC_BEEP#
RA4
SYNC
PCBEEP
13
CA26
RA16 @ 10U_0805_10V4Z
2
2
1
0_0603_5%
SPKR-
<28> PCH_SPKR
GPIO1/DMIC_CLK
+5VALW
EC_MUTE#
Impedance
JSPK
SPK_L2
2 0.1U_0603_50V7K
CA49 1
SPK_OUT_R+
SPK_OUT_R-
RESET#
CA6
3
PESD5V0U2BT_SOT23-3
100K_0402_5%
2
1
CA48 1
LINE2_L
LINE2_R
11
2
RA10
1
20K_0402_1%
+3VALW
RA43
RA34
100K_0402_5%
@
100K_0402_5%
<44> SM_SENSE#
SENSE_A
2 0.1U_0603_50V7K
SPKL-
QA1B
2N7002DW -T/R7_SOT363-6
<37> NBA_PLUG
RA21
39.2K_0402_1%
200910/9
Issued Date
PORT-H (PIN 20)
Deciphered Date
2010/01/23
4
Compal Secret Data
BACK_SENSE <37>
CA47 1
CA5
14
15
GPIO0/DMIC_DATA
1
2
INT_MIC_CLK_R
CA15
FBMA-10-100505-301T
2.2U_0603_6.3V4Z
CAM@
1
+MIC1_VREFO_L
CA28
27P_0402_50V8J
@
2
CA4
2
2
2
2
place
10U_0805_10V4Z 0.1U_0402_16V4Z
SPKL+
SPKL-
RA41
<25> INT_MIC_CLK
CA3
40
41
MONO_IN
2
100P_0402_50V8J
UA1
SPK_OUT_L+
SPK_OUT_L-
INT_MIC_CLK_R
For EMI
SENSE B
2
2
10U_0805_10V4Z
RA3
10U_0805_10V4Z 0.1U_0402_16V4Z 2
1
+5VALW
0_0603_5%
LINE1_L
LINE1_R
INT_MIC_DATA
SENSE_A
0.1U_0402_16V4Z
+5VALW
1
1
CA59
CA58
@
@
2
10U_0805_10V4Z
23
24
AZ_RST_HD#
<28> AZ_RST_HD#
RA44
100K_0402_5%
@
CA9
1U_0402_6.3V4Z
RA37
4.7U_0805_10V4Z
CA21
2
1
0_0402_5% MIC1_LINE1_R_L
@
MIC1_LINE1_R_R
2
1
SENSE A
2
1
0_0603_5%
CA60
@
@
CA24
1U_0402_6.3V4Z
@
1U_0402_6.3V4Z
1
2
RA38
0_0402_5%
1
RA30
0_0402_5%
@
MIC1_LINE1_R_R
Sense Pin
CA20
RA14 @ 10U_0805_10V4Z
2
2
1
0_0603_5%
RA15
2
1
0_0603_5%
1
0_0402_5%
RA39
DA7
68 mA
DVDD
0_0402_5%
SPK_L1
CA19
@ 10U_0805_10V4Z
2
RA35
Ext. Mic/LINE IN
2
RA18
CA7
10U_0805_10V4Z
2
2
MIC1_LINE1_R_L
RA13
2
1
0_0603_5%
2
10U_0805_10V4Z
place close to chip
+PVDD2
1
0.1U_0402_16V4Z
CA61
+AVDD
2
DVDD_IO
RA36
SPKL+
RA11
35 mA
1
CA8
2
10U_0805_10V4Z
+3VS_DVDD
0.1U_0402_16V4Z
2
1
FBMH1608HM601-T
+3VS
10U_0805_10V4Z
2
2
RA1
placement near Audio Codec
+5VALW
CA43
CA2
D
0.1U_0402_16V4Z +DVDD_IO
2
1
FBMH1608HM601-T
+3VS
JA1
JUMP_43X39
@
0.1U_0402_16V4Z
1
1
CA44
CA56
RA20
RA2
2
1
0_0603_5%
600 mA0.1U_0402_16V4Z
+PVDD1
Speaker Connector
Title
HDA-ALC269/HP/MIC
Size
Document Number
Rev
0.1
PHQAA LA-6831P M/B

Date:
Sheet
1
43
of
58
+3VL
R737
0_0402_5%
0.1U_0402_16V4Z
1000P_0402_50V7K
U19
1
R377
10_0402_5%
@
<32> CLK_PCI_EC
<5,32,39,40,41,42,45> PLT_RST#
+3VL
R378
47K_0402_5%
2
2
<33> EC_SCI#
<45> HDPLOCK
ECRST#
GATEA20
KB_RST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
1
2
3
4
5
7
8
10
CLK_PCI_EC
PLT_RST#
ECRST#
EC_SCI#
HDPLOCK
12
13
37
20
38
0.1U_0402_16V4Z
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
77
78
79
80
+3VL
R380
KSO1
KSO2
47K_0402_5%
R382
47K_0402_5%
to avoid EC entry ENE test mode
KSI[0..7]
<28,45,46> KSI[0..7]
KSO[0..17]
<28,45,46> KSO[0..17]
RP7
+3VL
+3VS
GATEA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LPC_FRAME#/LFRAME#
LPC_AD3/LAD3
LPC_AD2/LAD2
LPC_AD1/LAD1
LPC_AD0/LAD0
PWM0/GPIO0F
BEEP#/PWM1/GPIO10
FANPWM0/GPIO12
ACOFF/FANPWM1/GPIO13
PWM Output
1
2
3
4
8
7
6
5
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
<27,49>
<27,49>
<14,29,45,46>
<14,29,45,46>
2.2K_0804_8P4R_5%
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
BATT_TEMP/AD0/GPI38
BATT_OVP/AD1/GPI39
ADP_I/AD2/GPI3A
AD3/GPI3B
AD Input
AD4/GPI42
AD5/GPI43
LPC & MISC
CLK_PCI_EC/PCICLK
PCIRST#/GPIO05
EC_RST#/ECRST#
EC_SCI#/GPIO0E
CLKRUN#/GPIO1D
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49
PS2
EC_MUTE#/PSCLK1/GPIO4A
USB_EN#/PSDAT1/GPIO4B
CAP_INT#/PSCLK2/GPIO4C
Interface
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F
<33> EC_SMI#
<42> USB_CHG_EN
<46> ESB_CK
<46> ESB_DAT
<30> PCH_SUSPWRDN
<25> INVT_PWM
<5> FAN_SPEED1
<42> USB30PWRON
<39> E51_TXD
<39> E51_RXD
<46> ON/OFFBTN#
<46> PWR_SUSP_LED#
<45> NUM_LED#
@
PLT_RST#
1U_0402_6.3V6K
C819
C820
S 2N7002_SOT23
Q41
2
G
SUSP#
180P_0402_50V8J
SPI Flash ROM
GPIO
<30> CLK_EC
R565
122
123
11
24
35
94
113
GND
GND
GND
GND
GND
Close to EC
CRY1
2 CRY2
0_0402_5%
SPIDI/MISO
SPIDO/MOSI
SPICLK/GPIO58
SPICS#
GPIO40
H_PECI/GPIO41
FSTCHG/GPIO50
BATT_CHG_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
PWR_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
PM_SLP_S3#/GPIO04
EC_RSMRST#/GPXIOA03
PM_SLP_S5#/GPIO07
EC_LID_OUT#/GPXIOA04
EC_SMI#/GPIO08
EC_ON/GPXIOA05
GPIO0A
EC_SWI#/GPXIOA06
GPIO0B
ICH_PWROK/GPXIOA07
GPIO
GPIO0C
BKOFF#/GPXIOA08
GPO RF_OFF#/GPXIOA09
SUS_PWR_DN_ACK/GPIO0D
INVT_PWM/PWM2/GPIO11
GPXIOA10
FAN_SPEED1/FANFB0/GPIO14
GPXIOA11
FANFB1/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
PM_SLP_S4#/GPXIOD01
ON_OFF/GPIO18
ENBKL/GPXIOD02
SUSP_LED#/GPIO19
EAPD/GPXIOD03
GPI EC_THERM#/GPXIOD04
NUM_LED#/GPIO1A
SUSP#/GPXIOD05
PBTN_OUT#/GPXIOD06
EC_PME#/GPXIOD07
XCLK1
XCLK0
V18R
KB_LED
EC_BEEP#
SM_SENSE#
ACOFF
63
64
65
66
75
76
BATT_TEMPA
TMPTU1_SXP
ADP_I
ADP_V
TMPTU2_SXP
HDPACT
68
70
71
72
ACIN_D
EC_MUTE#
USB_EN#
CAP_INT#
H_PROCHOT#_EC
TP_CLK
TP_DATA
97
98
99
109
VGATE
WOL_EN
PWRME_CTRL#
LID_SW#
119
120
126
128
EC_SI_SPI_SO
EC_SO_SPI_SI
SPI_CLK
SPI_CS#
73
74
89
90
91
92
93
95
121
127
CIR_IN
EC_PECI
R461 1
FSTCHG
BATT_FULL_LED#
CAPS_LED#
BATT_CHG_LOW_LED#
PWR_ON_LED#
SYSON
VR_ON
ACIN_D
100
101
102
103
104
105
106
107
108
PCH_RSMRST#
EC_LID_OUT#
EC_ON
TP_LED
PM_PWROK
BKOFF#
HDPINT
CAP_RST#
SA_PGOOD
110
112
114
115
116
117
118
CEC_INT#
EC_ENBKL
USB_OC#1
SLP_CHG
SUSP#
PBTN_OUT#
USB_OC#0
124
EC_MUTE# <43>
USB_EN# <37>
CAP_INT# <46>
TP_CLK <46>
TP_DATA <46>
CAP_INT#
100K_0402_5%
VGATE <5,30,55>
WOL_EN <40>
PWRME_CTRL# <28>
LID_SW# <45>
4.7K_0402_5%
+5VS
TP_CLK
R379
TP_DATA
1
R381
EC_SI_SPI_SO <45>
EC_SO_SPI_SI <45>
SPI_CLK <45>
SPI_CS# <45>
4.7K_0402_5%
4.7K_0402_5%
+3VALW
LID_SW#
2
47K_0402_5%
2 43_0402_1%
H_PECI <5,33>
FSTCHG <50>
BATT_FULL_LED# <46>
CAPS_LED# <45>
BATT_CHG_LOW_LED# <46>
PWR_ON_LED# <46>
SYSON <39,42,52>
VR_ON <55>
SYSON
R5
PCH_RSMRST# <30>
EC_LID_OUT# <29>
EC_ON <28,46,51>
TP_LED <46>
PM_PWROK <5,30>
BKOFF# <25>
HDPINT <45>
CAP_RST# <46>
SA_PGOOD <53>
R341
4.7K_0402_5%
330K_0402_5%
+3VL
R383
2
D21
ACIN_D
ACIN <30,46,50>
CEC_INT# <27>
EC_ENBKL <25>
USB_OC#1 <32,42>
SLP_CHG <42>
SUSP# <28,39,47,52,54,56>
PBTN_OUT# <5,30>
USB_OC#0 <32,37>
+3VALW
SLP_CHG
R1428
10K_0402_5%
+EC_V18R
C448
4.7U_0805_10V4Z
KB930QF-A1_LQFP128_14X14
SLP_CHG
R439 2
1 10K_0402_5%
SUSP#
R423 2
1 10K_0402_5%
VR_ON
R462 2
1 10K_0402_5%
CIR
+5VL
0.1U_0402_16V4Z
SLP_S5#
R748
10K_0402_5%
IN2
R389
CRY1
CRY2
4
OSC
OSC
@
C450
3
4
Vout
VCC
GND
A
GND
Compal Secret Data

200910/9
Issued Date
Deciphered Date
2010/01/23
4
IRM-V538/TR1
CIR@
32.768KHZ_12.5PF_Q13MC14610002
+5VL_CIR
1 CIR@ 2
R750
100_0805_5%
C783
4.7U_0805_10V4Z
CIR@
18P_0402_50V8J
USB30PWRON
2
100K_0402_5%
NC
NC
E51_TXD
2
100K_0402_5%
Y4
U45
CIR_IN
18P_0402_50V8J
@
C449
2
10K_0402_5%
R53
+5VL
R492
1
R758
+3VL
CEC_INT#
10M_0402_5%
@
R342
2
10K_0402_5%
10K_0402_5%
H_PROCHOT#_EC
<30> PM_SLP_S4#
IN1
+3VS
<30> PM_SLP_S5#
R757
TMPTU2_SXP
EN_DFAN1 <5>
IREF <50>
CHGVADJ <50>
83
84
85
86
87
88
100P_0402_50V8J
R754
TMPTU1_SXP
C818
C518
47P_0402_50V8J
TV tuner
temperature
+3VALW
U44
<5>
100P_0402_50V8J
C446
BATT_TEMPA <49>
TMPTU1_SXP <39>
ADP_I <50>
ADP_V <50>
TMPTU2_SXP <39>
HDPACT <45>
EN_DFAN1
IREF
CHGVADJ
C445
KB_LED <45>
EC_BEEP# <43>
SM_SENSE# <43>
ACOFF <48,50>
SPI Device I/F
EC_SMB_CK1/SCL0/GPIO44
EC_SMB_DA1/SDA0/GPIO45
EC_SMB_CK2/SCL1/GPIO46
EC_SMB_DA2/SDA1/GPIO47
6
14
15
16
17
18
19
25
28
29
30
31
32
34
36
21
23
26
27
R172
SDICS#/GPXIOA00
WOL_EN/SDICLK/GPXIOA01
ME_EN/SDIMOSI/GPXIOA02
LID_SW#/GPXIOD00
SM Bus
PM_SLP_S3#
SLP_S5#
EC_SMI#
USB_CHG_EN
ESB_CK
ESB_DAT
PCH_SUSPWRDN
INVT_PWM
FAN_SPEED1
USB30PWRON
E51_TXD
E51_RXD
ON/OFFBTN#
PWR_SUSP_LED#
NUM_LED#
<30> PM_SLP_S3#
DAC_BRIG/DA0/GPO3C
EN_DFAN1/DA1/GPO3D
IREF/DA2/GPO3E
DA3/GPO3F
DA Output
C444
H_PROCHOT#_EC
AGND
69
C443
22P_0402_50V8J
@
H_PROCHOT#
BATT_TEMPA
<33> GATEA20
<33> KB_RST#
<28,45> SERIRQ
<28,45> LPC_FRAME#
<28,45> LPC_AD3
<28,45> LPC_AD2
<28,45> LPC_AD1
<28,45> LPC_AD0
0.1U_0402_16V4Z
VCC
VCC
VCC
VCC
VCC
VCC
CLK_PCI_EC
C441
1000P_0402_50V7K
<55> VR_HOT#
C442
2
C440
2
C439
1
C438
67
0.1U_0402_16V4Z
For EMI
0.1U_0402_16V4Z
1
C437
AVCC
9
22
33
96
111
125
0.1U_0402_16V4Z
C436
+3VL
Title
LPC-EC-KB930
Size
Document Number
Rev
0.1
PHQAA LA-6831P M/B

Date:
Sheet
1
44
of
58
SPI Flash (256KB)
Lid SW
Place the PAD under DDR DIMM.
LPC Debug Port
+3VS
H7
+3VL
PLT_RST# <5,32,39,40,41,42,44>
LPC_AD2 <28,44>
LPC_AD0 <28,44>
10
CLK_PCI_DDR
20mils
U22
HOLD
<44> SPI_CS#
SPI_CS#
SPI_CLK
<44> SPI_CLK
<44> EC_SO_SPI_SI
EC_SO_SPI_SI
VSS
+3VALW
2
1
EC_SI_SPI_SO
VDD
EC_SI_SPI_SO <44>
MX25L2005CMI-12G SO8
LID_SW # <44>
C453
0.1U_0402_16V4Z
<28,44> LPC_FRAME#
1
C452
10P_0402_50V8J
<32>
DEBUG_PAD
R393
22_0402_5%
@
<28,44> LPC_AD1
VOUT
2
0_0402_5%
<28,44> LPC_AD3
U21
APX9132ATI-TRL_SOT23-3
1
R392
<28,44> SERIRQ
VCC
GND
8
2
C451
0.1U_0402_16V4Z
SPI_CLK
1 R394
2
10_0402_5%
2
1
C454
2
10P_0402_50V8J
C457
22P_0402_50V8J
1 @
For EMI
For EMI
1
2
3
4
GND
GND
Q38
KBL@
AO3413_SOT23-3
D
+5VS_LED
1
C836
0.1U_0402_16V4Z
2 KBL@
1
3
2
G
<44> KB_LED
Close to JKB
Q52
2N7002_SOT23-3
KBL@
KSO16
KSO17
KSO1
KSO0
KSO4
KEYBOARD CONN.
KSO3
KSO5
KSO[0..17]
KSI[0..7]
<28,44,46>
KSO14
KSO[0..17] <28,44,46>
KSO6
KSO7
JKB
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
ACES_88170-3400
@
JKB34
KSO16
1
2
R372 300_0402_5%
+3VS
KSO13
KSO8
KSO17
KSO9
KSO2
KSO1
KSO0
KSO4
KSO3
KSO5
KSO14
KSO6
KSO7
KSO13
KSO8
KSO9
KSO10
KSO11
KSO12
KSO15
KSI7
KSI2
KSI3
KSI4
KSI0
KSI5
KSI6
KSI1
JKB4
2
1
CAPS_LED# R376 300_0402_5%
NUM_LED#
KSO10
KSO11
KSO12
KSO15
KSI7
KSI2
KSI3
KSI4
KSI0
KSI5
KSI6
KSI1
+3VS
CAPS_LED# <44>
NUM_LED# <44>
CAPS_LED#
NUM_LED#
1
C401
1
C402
1
C404
1
C405
1
C406
1
C407
1
C408
1
C409
1
C410
1
C411
1
C412
1
C413
1
C415
1
C416
1
C417
1
C418
1
C419
1
C420
1
C421
1
C422
1
C423
1
C424
1
C425
1
C427
1
C429
1
C431
1
C433
1
C435
SELF_TEST
+3VS_HDP
0_0603_5%
+5VS
DG1
1
KSO2
KSI[0..7]
RG2 @
+3VS
For EMI
D
2
12
+5VS_LED
ACES_85201-0405N
@
R587
10K_0402_5%
KBL@
1
2
3
4
5
6
+3VS_HDP
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
CG12
1U_0402_6.3V4Z
GSENSOR@
UG3
GSENSOR@
+3VS_HDP
+3VS_HDP
2
2
GSENSOR@
CG13
1U_0402_6.3V4Z
VOUT 5
1 GSENSOR@
VIN
GND
SHDN#
BP
G9191-330T1U_SOT23-5
CG14
2
1
Vdd1
Vdd2
4
6
8
ST
PD
FS
Rev
GSENSOR@
Voutx
Vouty
Voutz
3
5
7
NC1
NC2
NC3
NC4
NC5
10
11
14
15
16
GND1
GND2
1
13
VOUTXCG1
VOUTYCG2
VOUTZCG3
GSENSOR@
0.033U_0402_16V7K
1
2
0.033U_0402_16V7K
1
2
0.033U_0402_16V7K
1
2GSENSOR@
GSENSOR@
Reserve for 2nd Source

+3VS_HDP
CG9 0.1U_0402_16V4Z UG4
@
2
1VOUTX2
CG10 0.1U_0402_16V4Z XOUT
@
2
1VOUTY3
CG11
0.1U_0402_16V4ZYOUT
@
2
1VOUTZ4 ZOUT
TSH35TR_LGA16
Place UG1 and UG4

on TOP Layer
9
+3VS_HDP
@
0.22U_0402_10V4Z
SELF_TEST
7
10
13
VDD
0G-DET
SLEEP#
G-SELECT
ST
NC
NC
NC
NC
NC
1
8
11
12
14
VSS
MMA7360LR2_LGA14
UG5
<14,29,44,46> EC_SMB_CK2
P1_6/CLK0/SSI01
11
P1_5/RXD0/CNTR01/INT11#
12
P1_4/TXD0
13
P1_3/KI3#/AN11/TZOUT
14
P3_5/SSCK/SCL/CMP1_2
HDPACT <44>
+5VS
UG1
G-Sensor
JBLG
SELF_TEST
+3VS_HDP
HDPINT
1
4.7K_0402_5%
RESET#
RG4 2
GSENSOR@
1GXOUT
4.7K_0402_5%
XOUT/P4_7
1GXIN
4.7K_0402_5%
RG6
2
1 4.7K_0402_5%
GSENSOR@
RG7
2
1 1K_0402_5%
GSENSOR@
1
CG7
0.1U_0402_16V4Z
GSENSOR@ 2
VSS/AVSS
XIN/P4_6
P4_2/VREF
16
VOUTX
VOUTY
VCC/AVCC
17
MODE
18
P4_5/INT0#/RXD1
P3_3/TCIN/INT3#/SSI00/CMP1_0
19
P3_4/SCS#/SDA/CMP1_1
20
1
P1_7/CNTR00/INT10#
CG8
GSENSOR@
0.1U_0402_16V4Z
R5F211B4D34SP
2
200910/9
Deciphered Date
HDPLOCK <44>
VOUTZ
15
10
RG9
47K_0402_5%
GSENSOR@
P1_2/KI2#/AN10/CMP0_2
RG10 47K_0402_5%
2
1
GSENSOR@
+3VS_HDP
CG6
0.1U_0402_16V4Z
GSENSOR@
EC_SMB_DA2 <14,29,44,46>
GSENSOR@
Compal Secret Data
Issued Date
P3_7/CNTR0#/SSO/TXD1
RG3 2
GSENSOR@
RG5 2
GSENSOR@
<44> HDPINT
Keyboard LED
2010/01/23
Title
SPI ROM/LID/Debug/KB/G-Sen
Size
Document Number
Rev
0.1
PHQAA LA-6831P M/B

Date:
Sheet
45
of
58
+3VL
Caps Sensor/Light Sensor Conn.
R395
For debug
JCS
ON/OFFBTN# <44>
TOP side
C458
0.1U_0402_25V6
@
SW3
1
<14,29,44,45> EC_SMB_CK2
<14,29,44,45> EC_SMB_DA2
R396
10K_0402_5%
For EMI request
1
2
3
4
5
6
7
8
9
10
11
12
Touchpad & Light Pipe Connector
@
SW1
1
2
3
4
5
6
7
8
9
10
GND
GND
SW_L
JTPL
+5VS
<44> TP_CLK
<44> TP_DATA
2
390_0402_5%
ACES_85201-0405N
@
+5VALW
ESB_DAZ
@
1
100_0402_5%
100P_0402_50V8J
ESB_CKZ
@
1
D83
ON/OFFBTN#
R428
2
R427
2
<28,44,45> KSI6
<44,45> KSO0
C260 @
2
1
R22
@
D
1
2
3
4
5
6
7
8
9
10
GND
GND
Q7B
SW4
SW_R
4
SMT1-05_4P
P-TWO_161021-10021
<44> TP_LED
C261 @
2
SMT1-05_4P
2N7002DW-T/R7_SOT363-6
ON/OFFBTN#
TP_LED#
KSI6
KSO0
For EMI
PWR_ON_LED#
1
2
3
4
5
6
7
8
9
10
11
12
SW_L
SW_R
6
5
SMT1-05-A_4P
JPOWER
1
1
2
2
3
3
4
4
5
G1
6
G2
1
2
P-TWO_161021-10021
BTM side
<28,44,51> EC_ON
ESB_DAZ
ESB_CKZ
CAP_INT#
CAP_RST#
<44> ESB_DAT
<44> ESB_CK
<44> CAP_INT#
<44> CAP_RST#
Q7A
2N7002DW-T/R7_SOT363-6
+5VALW
+3VL
FBMA-11-100505-301T_0402 +3VS
L13 1
2
L14 1
2
FBMA-11-100505-301T_0402
51_ON# <48>
ON/OFFBTN#
100K_0402_5%
6
5
Power Button
6
5
PWR_ON_LED# 3
100_0402_5%
100P_0402_50V8J
PJSOT05C_SOT23-3
Screw Hole
WIMAX_LED_GND#
H3
H4
H_2P9x3P9
@
H_2P9x3P9
@
1
3
H16
H_4P7
@
H17
H_3P3
@
H_3P3
@
H_3P3
@
H23
H_4P2x4P7
@
H22
H_4P2x4P7
@
LOGO_LED#
H21
H_4P2
@
H15
H20
HT-SV116BP_WHITE
1
2
2
R774
120_0402_5%
4
Q9B
CPU
D22
H_3P0
@
MINI CARD -- 3G
+5VS
H14
H_3P0
@
VGA
LOGO_LED <33>
Q9A
2N7002DW-T/R7_SOT363-6
H13
H_3P0
@
H_2P7N
@
Logo LED
2
6
H12
H_3P0
@
H26
H_2P7x3P2N
@
HDD_LED#
2 R404
1
10K_0402_5%
1
H1
H_2P9
@
+5VS
H11
H_3P0
@
1
Q156A
2N7002DW-T/R7_SOT363-6
WIMAX@
H2
SATA_LED# <28>
H10
H_3P0
@
Q156B 2N7002DW-T/R7_SOT363-6
WIMAX@
HDD LED
H9
H_3P0
@
2N7002_SOT23-3
R819
2
1
10K_0402_5%
WIMAX@
H8
H_3P0
@
+5VS
H6
H_3P0
@
LED_WIMAX# <39>
2
G
1
Q32
DC_IN
R506
WIMAX_LED_GND# 1
2
0_0402_5%
WiMAX LED
ACIN <30,44,50>
H5
DC-IN LED
2N7002DW-T/R7_SOT363-6
Q6B
2N7002DW-T/R7_SOT363-6
@
1
2
R50
0_0402_5%
1
2
2
R776
120_0402_5%
HT-SV116BP_WHITE
MINI CARD -- WLAN

D20
H18
H19
H_3P3
@
H_3P3
@
PCB Fedical Mark PAD
JLED
+5VALW
+5VS
<33> WL_BT_LED#
<44> PWR_ON_LED#
<44> PWR_SUSP_LED#
<41> CR_LEDCON#
<44> BATT_FULL_LED#
<44> BATT_CHG_LOW_LED#
WIMAX_LED_GND#
WL_BT_LED#
DC_IN
PWR_ON_LED#
PWR_SUSP_LED#
HDD_LED#
CR_LEDCON#
BATT_FULL_LED#
BATT_CHG_LOW_LED#
1
2
3
4
5
6
7
8
9
10
11
12
1
2
3
4
5
6
7
8
9
10
11
12
FD4
@
ISPD
UV1
GND
GND
FD3
@
LED/B Connector
FD2
@
FD1
@
13
14
N12PGSR3@
UV1
N12MGER1@
U2
Q65R3@
N12P-GS-A1
N12M-GE-B-B1
PCH
UV1
UV1
U2
N12PGER1@
N12MGER3@
ZZZ
PCB LA-6831P
Q67R1@
PJP1
45@
ACES_85201-1205N
N12P-GE-A1
UV1
N12M-GE-B-B1
PCH
N12PGER3@
U2
N12P-GE-A1
Issued Date
200910/9

2010/01/23
Deciphered Date
5
PCH
Compal Secret Data
PJP1
Q67R3@
Title
PWR/Cap./TP/LED/LP/LS/Screw
Size
Document Number
Rev
0.1
PHQAA LA-6831P M/B

Date:
Sheet
1
46
of
58
+3VALW
+3VS
+5VALW TO +5VS
+1.5V to +1.5VS
Vgs=10V,Id=9A,Rds=18.5mohm
+5VALW
Vgs=10V,Id=9A,Rds=18.5mohm
+1.8VS
+1.5V
+5VS
+1.5VS
3 1
SUSP
2
5
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
S
Q12B
+3VALW
+5VALW
+0.75VS
+1.05VS_VCCP
For S3 CPU Power Saving

R425
100K_0402_5%
R422
100K_0402_5%
<54>
R421
22_0805_5%
R468
470_0805_5%
Q44A
2N7002DW-T/R7_SOT363-6
SUSP
<5,9,54> SUSP
Q44B
2N7002DW-T/R7_SOT363-6
0.75VR_EN
2
100K_0402_5%
Q6A
Q189
SUSP
2
G
2N7002_SOT23-3
1
R158
<53,54> VCCPPWRGD
0.75VR_EN#
<28,39,44,52,54,56>
SUSP#
S
2N7002DW-T/R7_SOT363-6
Q13B
2N7002DW-T/R7_SOT363-6
DIS@
Q12A
Q190
SUSP
2
G
2N7002_SOT23-3
R414
820K_0402_5%
C469
C470
R408
2
2
1 R411
2
+VSB
220K_0402_5%
470_0805_5%
2
1U_0402_6.3V4Z
FDS6676AS_SO8
R470
470_0805_5%
C464
C821
0.1U_0402_25V6
Q11B
4.7U_0805_10V4Z
Q11A
0.1U_0402_16V4Z
0.1U_0402_16V4Z
470_0805_5%
3 1
SUSP
2
5
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
R413
200K_0402_5%
@
C822
1
2
3
4
S
S
S
G
R430
Q13A
820K_0402_5%
DIS@
DIS@
2 VGA_PWROK#
2N7002DW-T/R7_SOT363-6
C468
+VSB
C463
D
D
D
D
2
G
Q60
2N7002_SOT23-3
C481
DIS@
C473
DIS@
0.1U_0402_25V6
4.7U_0805_10V4Z
FDS6676AS_SO8
R429
DIS@
C467
R407
DIS@
1 R431
2
+VSB
220K_0402_5%
1 R410
2
47K_0402_5%
8
7
6
5
SUSP
2
1U_0402_6.3V4Z
C475
4.7U_0805_10V4Z
DIS@
470_0805_5%
S
S
S
G
3 1
D
D
D
D
C478
DIS@
1
2
3
4
Q31
For EMI
DIS@
Vgs=10V,Id=14.5A,Rds=6mohm
Vgs=10V,Id=14.5A,Rds=6mohm
Q43
Q43
C473
FDS6676AS_SO8
4.7U_0805_10V4Z
OPT@
OPT@
C481
C478
0.1U_0402_25V6
1U_0402_6.3V4Z
OPT@
OPT@
R430
C475
820K_0402_5%
4.7U_0805_10V4Z
OPT@
OPT@
R431
R146
220K_0402_5%
100K_0402_5%
OPT@
OPT@
R429
Q188
470_0805_5%
2N7002_SOT23-3
OPT@
OPT@
Q13
2N7002DW-T/R7_SOT363-6
OPT@
+VRAM_1.5VS
8
7
6
5
1U_0402_6.3V4Z
Q10B
+1.5V to +VRAM_1.5VS
+1.5V
1
2
3
4
SI4800BDY_SO8
Q10A
SUSP
2
5
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
C461
S
S
S
G
R412
330K_0402_5%
+VSB
3 1
C466
0.022U_0402_25V7K
4.7U_0805_10V4Z
C465
R406
D
D
D
D
1 R409
2
47K_0402_5%
Q30
8
7
6
5
0.01U_0402_25V7K
2
1U_0402_6.3V4Z
SI4800BDY_SO8
1
4.7U_0805_10V4Z
4.7U_0805_10V4Z
C460
1
2
3
4
S
S
S
G
C459
D
D
D
D
470_0805_5%
Q29
8
7
6
5
4.7U_0805_10V4Z
+5VS
4.7U_0805_10V4Z
1
C462
+3VALW TO +3VS
+5VALW
+3VS to +3VS_DGPU
+5VS_ODD
+3VS
ODD_EN#
3
2N7002DW-T/R7_SOT363-6
+5VS
+5VS
1
5
DGPU_PWR_EN#
2
G
Issued Date
C680
1U_0402_6.3V4Z
Compal Secret Data

200910/9
Deciphered Date
2010/01/23
C
2
2
Q55
2N7002_SOT23-3
OPT@
AO3413_SOT23
C217
0.01U_0402_25V7K
Q206B
2N7002DW-T/R7_SOT363-6
OPT@
C686
1U_0402_6.3V4Z
OPT@
PJ28
JUMP_43X79
@
+5VS_ODD
2
3 1
5
2N7002DW-T/R7_SOT363-6
OPT@
Q45
2
C679
4.7U_0805_10V4Z
@
R459
470_0805_5%
OPT@
2N7002_SOT23-3
Q51
+VGA_CORE
R458
470_0805_5%
OPT@
Q207B
Q207A
DGPU_PWR_EN#
2
2N7002DW-T/R7_SOT363-6
OPT@
+1.05VS_DGPU
+3VS_DGPU
1
C493
0.01U_0402_25V7K
OPT@
C685
4.7U_0603_6.3V6K
@
R460
470_0805_5%
OPT@
S
AO3416_SOT23-3
OPT@
R440
2
1
1
2
2
G
47K_0402_5%
Q56
<33> ODD_EN#
PJ33
JUMP_43X118
@
+1.05VS_DGPU
R434
47K_0402_5%
OPT@
Vgs=4.5V,Id=3A,Rds<22mohm
C471
0.1U_0402_16V7K
2
R441
10K_0402_5%
C684
1U_0402_6.3V4Z
2 OPT@
+3VS
1
1
2
+3VS_DGPU
1
2
AO3413_SOT23
OPT@
C492
0.01U_0402_25V7K
C683
4.7U_0805_10V4Z
@
Q53A
R104
0_0805_5%
DIS@
Q206A
OPT@
OPT@
1
2
2N7002DW-T/R7_SOT363-6
+5VALW
+1.05VS_VCCP
Q54
2
47K_0402_5%
OPT@
R426
C491
0.1U_0402_16V7K
OPT@
<13,32,56> DGPU_PWR_EN
Short PJ33 for Discrete SKUs
DGPU_PWR_EN#
6 1
R457
470_0805_5%
R433
100K_0402_5%
OPT@
+1.05VS_VCCP to +1.05VS_DGPU
+5VS TO +5VS_ODD
+3VALW
100K_0402_5%
Q188
2N7002_SOT23-3
DIS@
2
G
VGA_PWROK
<13,32,33,56>
R146
1 DIS@
2
Title
DC-DC INTERFACE
Size
Document Number
Rev
0.1
PHQAA LA-6831P M/B

Date:
Sheet

E
47
of
58
PreCHG
PF1
DC_IN_S2
VIN
B+
1
PR4
PR3
PR6
100K_0402_5%
100K_0402_5%
PR5
1
2
1K_1206_5%
1
2
1K_1206_5%
PC4
100P_0402_50V8J
1
2
2
SINGA_2DW -0005-B03
PC3
1000P_0402_50V7K
PC2
100P_0402_50V8J
LL4148_LL34-2
PR2
PC1
1000P_0402_50V7K
1K_1206_5%
10A_125V_451010MRL
DC_IN_S1 1
@ PJP1
PQ1
TP0610K-T1-E3_SOT23-3
PD1
PR1
DC301001M80
VIN
PL1
SMB3025500YA_2P
1
2
1K_1206_5%
PR7
1 2
100K_0402_5%
VIN
PD2
2
1
<51> +5VALW P
PD3
3
RB715F_SOT323-3
PR8
68_1206_5%
N1
VS
RLS4148_LL34-2
PD4
BATT+
DTC115EUA_SC70-3
PR9
68_1206_5%
2
PQ4
TP0610K-T1-E3_SOT23-3
PQ3
DTC115EUA_SC70-3
RLS4148_LL34-2
PQ2
3
<44,50> ACOFF
PR10
100K_0402_1%
1
PC5
0.1U_0603_25V7K
PC6
0.22U_0603_25V7K
RTC Battery
PR11
1
<46> 51_ON#
22K_0402_1%
@
2
PBJ1
PR13
PR12
1
560_0603_5%
@
+3VALW P
@ PJ76
PJ332
1 1
+3VALW
+0.75VSP
JUMP_43X118
2
1
+0.75VS
(1A,40mils ,Via NO.= 2)

+1.5VP
+RTCBATT
560_0603_5%
MAXEL_ML1220T10
JUMP_43X118
JUMP_43X79

OCP=8.6A
@ PJ152
1 1
@ PJ153
1 1
SP093MX0000
+1.5V
JUMP_43X118
+5VALW P
PJ352
+5VALW
+VCCSAP
JUMP_43X118
3
@ PJ452
2
1 1
(16A,640mils ,Via NO.= 32)

+VCCSA
JUMP_43X118

OCP=7.9A
@ PJ402
2
JUMP_43X118
@ PJ182
+1.8VSP
@ PJ333
+1.8VS
+3VLP
@ PJ403
1
+3VL
JUMP_43X118
JUMP_43X39
(1.65A,70mils ,Via NO.= 4)

OCP=4.2A
(100mA,40mils ,Via NO.= 2)
+1.05VS_VCCPP
+1.05VS_VCCP
JUMP_43X118
(17A,680mils ,Via NO.=34)
@ PJ2
+VSBP
+VSB
@ PJ502
1 1
JUMP_43X118
JUMP_43X39
(120mA,40mils ,Via NO.= 1)

+GFX_COREP
@ PJ503
1 1
+GFX_CORE
JUMP_43X118
(33A,1320mils ,Via NO.=66)

OCP=40A
@ PJ602
2
1 1
ACIN
JUMP_43X118
+VGA_COREP
@ PJ603
2
1 1
Precharge detector
Min.
typ.
Max.
H-->L 14.42V 14.74V 15.23V
L-->H 15.39V 15.88V 16.39V
+VGA_CORE
JUMP_43X118
(30A,1200mils ,Via NO.=60)
Issued Date
Compal Secret Data
2009/11/13
Deciphered Date
2009/04/28
A
Title
DCIN/VIN DECTOR
Size
Date:
Document Number
NHQAA LA-6831P M/B

Sheet
48
of
Rev
0.1
58
VMB
@ PJP2
2
15A_65V_451015MRL
BATT+
+3VLP
SUYIN_200045MR009G171ZR
PC8
0.01U_0402_25V7K
PC7
1000P_0402_50V7K
PR14
1K_0402_1%
PH1 under CPU botten side :

CPU thermal protection at 95 degree C
Recovery at 56 degree C
BATT_P3
BATT_P4
BATT_P5
EC_SMDA
EC_SMCA
1
PC9
0.1U_0603_25V7K
PR15
19.6K_0402_1%
+3VLP
PR16
6.49K_0402_1%
2
1
PR18
8.66K_0402_1%
VL
1
1
@ PD6
PJSOT24C_SOT23-3
@ PD5
2
PJSOT24C_SOT23-3
3
GND
GND
GND
GND
BATT_S1
1
2
3
4
5
6
7
8
9
10
11
12
13
PL2
SMB3025500YA_2P
1
2
PF2
1
2
3
4
5
6
7
8
9
BATT_TEMPA <44>
<51> VS_ON
VCC TMSNS1
GND RHYST1
OT1 TMSNS2
OT2 RHYST2
PH1
100K_0402_1%_NCP15W F104F03RC
2
PR21
100_0402_1%
1
PR20
100_0402_1%
PU1
PR19
1K_0402_1%
G718TM1U_SOT23-8
EC_SMB_DA1 <27,44>
EC_SMB_CK1 <27,44>
PQ5
TP0610K-T1-E3_SOT23-3
3
B+
+VSBP
1
PR25
100K_0402_1%
PR24
1
2
1
2
VL
PC10
0.22U_0603_25V7K
2
1
PR23
100K_0402_1%
PC11 @
0.1U_0603_25V7K
22K_0402_1%
PR26
1
<30,51> POK
PQ6
SSM3K7002FU_SC70-3
2
G
@ PC12
.1U_0402_16V7K
0_0402_5%
Issued Date
Compal Secret Data
2009/11/13
Deciphered Date
2009/04/28
A
Title
BATTERY CONN / OTP

Size
Document Number
Rev
0.1
NHQAA LA-6831P M/B

Date:
Sheet
D
49
of
58
CELLS
CSOP
21
ICOMP
CSIN
20
PR2312
PHASE
LX_CHG
VREF
UGATE
17
DH_CHG
6251aclim
10
VDDP
15
6251VDDP
VADJ
LGATE
14
DL_CHG
GND
PGND
13
ACLIM
11
12
BST_CHG 1
2
0_0603_5%
5
6
7
8
0.1U_0603_25V7K
PD202
RB751V-40_SOD323-2
1
2 6251VDD
PR233
PC221
4.7U_0603_6.3V6M
BATT+
4
@ PR206
4.7_1206_5%
3
0.02_1206_1%
16
BOOT
CHLIM
PR235
1
2
PQ202
AO4466_SO8
PC205
BST_CHGA 2
1
75K_0402_1%
PR223
20K_0402_1%
PL202
10UH_MSCDRI-104A-100M-E_4.6A_20%
CHG
1
2
4
1
PR222
1
PC216
2
3
6251VREF
1
1
PR205
PR221
120K_0402_1%
2
2_0402_5%
@ PC206
680P_0603_50V7K
6251VREF
PQ216
2N7002W -T/R7_SOT323-3
3
2
1
ICM
18
PQ201
AO4466_SO8
2
G
19
.1U_0402_16V7K
1
PQ213
DTC115EUA_SC70-3
ACOFF
2
CSIP
VCOMP
ACPRN
CSOP
1 20_0402_5%
PR220
154K_0402_1%
2
1
BATT_ON
5
6
7
8
PC215
1
2
<44> IREF
<44,48> ACOFF
6
PR219
1
2
47K_0402_1%
<44> ADP_I
4
PR211
47K_0402_5%
1
2
CSON
PC219
0.047U_0402_16V7K
1
2
PR230
20_0402_5%
PC220
0.1U_0603_25V7K
1
PR232
6800P_0402_25V7K
10K_0402_1%
0.01U_0402_25V7K
PACIN
0.01U_0402_25V7K
PR229 20_0402_5%
1
2
PC204
10U_1206_25V6M
2
1
CSON
ACPRN <51>
PC222
2200P_0402_25V7K
EN
22
5
G
PR218
PR238
100K_0402_1%
23
PC214
1
2
PC203
10U_1206_25V6M
2
1
ACSET ACPRN
6251_EN
PC213
1
2
PQ212B
DMN66D0LDW -7_SOT363-6
PQ215
DTC115EUA_SC70-3
100K_0402_1%
PQ212A
PR228
14.3K_0402_1%
0.1U_0603_25V7K
ACSETIN
DCIN 2
VIN
1 1
24
DCIN
47K_0402_1%
PR237
10K_0402_1%
PC218
VDD
PR236
1 1
PU200
PC217
1000P_0402_25V8J
2
1
PR227
10_1206_5%
2
G
1
2
6251VDD
1
PD201
RB751V-40_SOD323-2
PR217
PR213
150K_0402_1%
PR226
191K_0402_1%
PR216
10K_0402_1%
2
1
PC212
2.2U_0603_6.3V6K
ACSETIN
<44> FSTCHG
PQ211
DTC115EUA_SC70-3
PreCHG
1
PR212
200K_0402_1%
AO4407A_SO8
8
7
6
5
1
2
3
PC202
10U_1206_25V6M
2
1
VIN
CSIN
@ JUMP_43X118
PC211
5600P_0402_25V7K
BATT_ON
4
1
2
PC210
0.1U_0603_25V7K
2
1
PQ210
DTA144EUA_SC70-3
CSIP
1
PR210
200K_0402_1%
PQ207
CHG_B+
PJ201
2
AO4407A_SO8
8
7
6
5
B+
PR215
0.015_1206_1%
4
PQ208
1
2
3
3
2
1
8
7
6
5
PC233
4.7U_0805_25V6-K
2
1
1
2
3
P3
PQ204
AO4407A_SO8
1
2
3
PC232
4.7U_0805_25V6-K
2
1
P2
PQ203
AO4407A_SO8
8
7
6
5
VIN
PC231
4.7U_0805_25V6-K
2
1
PC209
10U_1206_25V6M
2
1
PC208
10U_1206_25V6M
2
1
PC207
10U_1206_25V6M
2
1
4.7_0603_5%
G5209S31U_SSOP24
PR224
1
<44> CHGVADJ
15.4K_0402_1%
PR225
31.6K_0402_1%
VIN
PR240
47K_0402_1%
1
ACIN <30,44,46>
PR246
309K_0402_1%
PR247
10K_0402_1%
1
2
PACIN
ADP_V <44>
PR242
10K_0402_1%
PR241
10K_0402_1%
1
2
6251VDD
PQ214
DTC115EUA_SC70-3
PR248
Vaclim=1.08V(65W)
PR68=75k
Vin Detector
CP= 92%*Iada; CP=3.147A
CC=0.25A~3A
CP mode
Iada=0~3.42A(65W)
CP= 92%*Iada; CP=3.63A
Vaclim=0.736V(75W)
PR68=24k PR70=20k
Iada=0~4.737A(90W)
Vaclim=0.736V(90W)
PR68=53.6k PR70=20k
Iada=0~6.316A(120W)
Vaclim=0.736V(120W)
PR68=8.25k PR70=26.7k
A
IREF=1.016*Icharge
IREF=0.254V~3.048V
PR45=0.02
Iada=0~3.947A(75W)
VCHLIM need over 95mV
PR49=0.02
PR49=0.015
PR49=0.015
PC223
.1U_0402_16V7K
47K_0402_1%
PR243
14.3K_0402_1%
ACPRN
High 18.089V
Low 17.44V
CHGVADJ=(Vcell-4)*9.445
Vcell
4V
CHGVADJ
0V
Issued Date
4.2V
1.882V
4.35V
3.2935V
B
Compal Secret Data
2010/01/25
Deciphered Date
2009/04/28
C
Title
CHARGER
Custom
Date:
Rev
0.1
NHQAA LA-6831P M/B

D
Sheet
50
of
58
2VREF_8205
PC363
1U_0603_10V6K
+3VLP
PR365
19.1K_0402_1%
1
2
PR337
150K_0402_1%
1
2
RT8205_B+
PR357
150K_0402_1%
1
2
B+
PR363
20K_0402_1%
1
2
ENTRIP1
PJ331
@ JUMP_43X118
2 2
1 1
PR364
30K_0402_1%
1
2
ENTRIP2
RT8205_B+
PR362
13K_0402_1%
1
2
LG_3V
12
LGATE2
LGATE1
19
LG_5V
PL352
4.7UH_SIL1045R-4R7PF_6.3A_30%
1
2
3
2
1
PQ352
S IC UP6182CQAG VQFN 24P PW M
+
PC356 @
680P_0603_50V7K
VL
RT8205_B+
Ipeak=3.98A
Imax=2.8A
F=300KHz
Total Capacitor ??uF,
ESR ??mohm
PQ360B
PC364
4.7U_0805_10V6K
PR361
AO4712L_SO8
+5VALWP
NC
VIN
AO4466L_SO8
PR356 @
4.7_1206_5%
18
17
16
13
3
2
1
PHASE1
LX_5V
5
6
7
8
PHASE2
20
PC355
2 0.1U_0603_25V7K
PC352
220U_6.3V_M
1
ENTRIP1
FB1
21
2
S
REF
UGATE1
VREG5
UGATE2
11
1
D
5
G
10
LX_3V
1
2
FB2
UG_3V
PR355
BST_5V 1
2
0_0603_5%
UG_5V
ENTRIP2
ENTRIP1
TONSEL
22
GND
23
BOOT1
PC362
1U_0402_6.3V6K
PQ360A
6
ENTRIP2
PGOOD
BOOT2
2VREF_8205
B+
POK <30,49>
VREG3
EN
AO4712L_SO8
Ipeak=6.97A
Imax=4.88A
F=375KHz
ESR ??mohm
24
100K_0402_5%
2
1
@ PC336
680P_0603_50V7K
4
VO1
PR360
499K_0402_1%
1
2
PQ351
C
BST_3V
1
2
3
220U_6.3V_M
VO2
@ PR336
4.7_1206_5%
1
PC332
PQ332
SKIPSEL
+3VALWP
8
7
6
5
PL332
4.7UH_SIL1045R-4R7PF_6.3A_30%
1
2
PR335
1
2
0_0603_5%
P PAD
15
1
2
3
PC335
0.1U_0603_25V7K
1
25
14
4.7U_0805_10V6K
PC361
2
1
8
7
6
5
PQ331
AO4466L_SO8
PU330
5
6
7
8
PC366
10U_1206_25V6M
1
PC360
10U_1206_25V6M
PC365
0.1U_0603_25V7K
PR370
VL
1
1
100K_0402_1%
<49> VS_ON
PR371
<28,44,46> EC_ON
2009/11/13
Issued Date
DTC115EUA_SC70-3
Compal Secret Data
PQ363
PQ361
DTC115EUA_SC70-3
PR373
2.2U_0603_10V6K
200K_0402_1%
<BOM Structure>
PC370
PQ362 D
2
G
S
<50> ACPRN
A
2N7002W -T/R7_SOT323-3
PR372
2
42.2K_0402_1%
1
2
100K_0402_1%
VS
Deciphered Date
2009/04/28
4
Title
3VALWP/5VALWP
Size
Document Number
Rev
NHQAA LA-6831P M/B

Date:
Sheet
1
51
of
0.1
58
PJ151
@ JUMP_43X118
2 2
1 1
OUT
LX
12
LX_1.5V
VCC
ILIM
11
VDD
10
3
4
5
FB
PGOOD
VFB=0.75V
PR157
1
2
10K_0402_1%
DL
+5VALW
DL_1.5V
PGND
PC162
4.7U_0805_10V6K
3
2
1
G5603RU1U_TQFN14_3P5X3P5
AGND
7
PC161
4.7U_0603_6.3V6K
PR162
PC163
4.7U_0805_25V6-K
2
1
PL152
1.8UH_SIL104R-1R8PF_9.5A_30%
2
0.1U_0603_25V7K
@ PC165
680P_0402_50V7K
+1.5VP
BST
TP
14
1
EN_SKIP
DH_1.5V
100_0603_5%
13
TON
PC155
1
2
BST_1.5V-1
DH
0_0603_5%
@ PR156
4.7_1206_5%
1
+ PC152
220U_6.3V_M
2
1
PR161
PU150
15
1
2
+5VALW
PC160 @
.1U_0402_16V7K
B+
Ipeak=19.6A
Imax=13.72A
F=294KHz
ESR ??mohm
@ PC156
680P_0603_50V7K
2
BST_1.5V
0_0402_5%
PR155
PQ152
SI7170DP-T1-GE3_POWERPAK8-5
3
2
1
PR160
<39,42,44> SYSON
PQ151
TPCA8030-H_SOP-ADV8-5
5
PR164
255K_0402_1%
1
2
PC164
4.7U_0805_25V6-K
2
1
1.5_B+
10K_0402_1%
PR163
10K_0402_1%
PU180
SY8033BDBC_DFN10_3X3
PL182
1UH_FMJ-0630T-1R0 HF_11A_20%
1
2
PR186
2
NC
NC
PC186
2 EN_1.8V
PR181
0_0402_5%
@ PR182
499K_0402_1%
0.1U_0402_10V7K
PR183
20K_0402_1%
FB_1.8V
PR184
10K_0402_1%
PC185@
TP
SUSP#
11
<28,39,44,47,54,56>
FB=0.6Volt
FB
PC183
22U_0805_6.3VAM
EN
LX
PC184
22U_0805_6.3VAM
Ipeak=1.308A
ILIM = 4A
F=1MHz
ESR ??mohm
+1.8VSP
SVIN
LX_1.8V
PC182
22U_0805_6.3VAM
PVIN
LX
JUMP_43X39
PVIN
10
PC187
68P_0402_50V8J
2
1
4.7_1206_5%
+5VALW
680P_0603_50V7K
PG
@ PJ181
Issued Date
Compal Secret Data
2010/01/25
Deciphered Date
2009/04/28
A
Title
+1.5VP/+1.8VSP
Custom
Date:
Rev
0.1
NHQAA LA-6831P M/B

D
Sheet
52
of
58
PR460
+3VS
1
2
10K_0402_1%
VDD
PGOOD
<44> SA_PGOOD
DL
11
10
PR457
1
2
10K_0402_1%
<BOM Structure>
PC466
0.1U_0402_25V6
2
1
PC465
2200P_0402_50V7K
2
1
@ PR456
+5VALW
1
4.7_1206_5%
+ PC452
390U_2.5V_M
PC462
4.7U_0805_10V6K
+VCCSAP
0.1U_0603_25V7K
1
LX_VCCSAP
ILIM
FB
DH_VCCSAP
12
2
@ PC456
DL_VCCSAP
14
15
BST
TP
LX
VCC
PC461
4.7U_0805_10V6K
OUT
13
680P_0603_50V7K
PR463
0_0603_5%
PQ452
AO4712_SO8
PR471
DH
4
FB
TON
PL452
1.8U_D104C-919AS-1R8N_9.5A_30%
1
2
PC455
1
2
BST_VCCSAP-1
5
6
7
8
VOUT
PGND
PR461
100_0402_1%
1
2
EN_SKIP
PU450
AGND
@ PC460
.1U_0402_16V7K
+5VALW
2.2_0603_5%
1
0_0402_5%
PQ451
AO4466_SO8
PR455
1
Ipeak=6A
Imax=4.2A
F=276K
Toatal Capacitor ??u
ESR=??mohm
3
2
1
BST_VCCSAP
B+
3
2
1
2
2
255K_0402_1%
<47,54> VCCPPWRGD
PC464
4.7U_0805_25V6-K
PC463
4.7U_0805_25V6-K
5
6
7
8
PR462
1
PJ451
@ JUMP_43X118
2
1
2
1
VCCSAP_B+
@ PR472
10K_0402_1%
VCCSA_SENSE
<9>
PR464
10_0402_5%
2
1
PR465
680_0402_1%
1
2
PQ454
2
PR473
0_0402_5%
1
2
VCCSAP_VID1
<9>
@ PR470
100K_0402_1%
PMBT2222A_SOT23-3
2
2
G
S
PQ453
SSM3K7002FU_SC70-3
PR468
10K_0402_1%
PC470
.1U_0402_16V7K
PR469
10K_0402_1%
1
2
PR467
5.1K_0402_1%
+3VS
PR466
9.09K_0402_1%
VID1
+VCCSAP
0.8V
0.9V
Issued Date
Compal Secret Data
2010/01/25
Deciphered Date
2009/04/28
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Title
+VCCSAP/+1.0VSDGPUP
Size
C
Date:
Document Number
Rev
0.1
NHQAA LA-6831P M/B

Sheet
1
53
of
58
@ PJ75
JUMP_43X79
+1.5V
PU75
3
4
VCNTL
GND
NC
VREF
NC
VOUT
NC
TP
VIN
+3VALW
PC264
PR280
1K_0402_1%
<5,9,47> SUSP
@ PR282
0_0402_5%
1
2
PC261
4.7U_0805_6.3V6K
1U_0603_10V6K
+0.75VSP
PC263
.1U_0402_16V7K
2
1
1
2
PR281
1K_0402_1%
PC262
10U_0805_6.3V6M
For shortage changed
PR410
0_0402_5%
1
2
PC415
4.7U_0805_25V6-K
PC414
4.7U_0805_25V6-K
2
1
PC413
4.7U_0805_25V6-K
2
1
3
2
1
4
PC412
4.7U_0805_10V6K
9
DL_1.05VS_VCCP
DL
PR415
<47,53> VCCPPW RGD
+3VALW
10K_0402_1%
PC402
390U_2.5V_M
@ PR416
10K_0402_1%
PR420
0_0603_5%
PGOOD
PQ402
FB
13.7K_0402_1%
VDD
10
VFB=0.75V
@ PR406
4.7_1206_5%
+5VALW
@ PC406
680P_0603_50V7K
LX_1.05VS_VCCP
PR407
1
2
+1.05VS_VCCPP
11
1 2
12
ILIM
LX
VCC
OUT
PL402
1UH_FDUE1040D-1R0M-P3_21.3A_20%
3
2
1
BST
DH_1.05VS_VCCP
PC405
0.1U_0603_25V7K
1
2
14
15
TP
13
TON
PR405
0_0603_5%
BST_1.05VS_VCCP
1
2
DH
PGND
PR411
100_0603_1%
1
2
EN_SKIP
PU400
AGND
PC410
@
.1U_0402_16V7K
PC411
4.7U_0603_6.3V6K
B+
<28,39,44,47,52,56> SUSP#
+5VALW
PQ401
PR414
255K_0402_1%
1
2
PL401
HCB4532KF-800T90_1812
1
2
1.05VS_B+
PQ260
SSM3K7002FU_SC70-3
2
G
PC260
.1U_0402_16V7K
PR279
0_0402_5%
1
2
<47> 0.75VR_EN#
UP7711U8 PSOP 8P
PR421
10_0402_5%
2
1
VCCIO_SENSE
<8>
PR412
4.02K_0402_1%
1
2
PR413
10K_0402_1%
Compal Secret Data
2010/01/25
Issued Date
Deciphered Date
2009/04/28
5
Title
+1.05VS_VCCP/+0.75VSP
Size
Document Number
Custom
Date:
Rev
0.1
NHQAA LA-6831P M/B
Sheet
1
54
of
58
5
UGATE2
ISEN1
GFX@ PC565
4.7U_0805_25V6-K
2
1
2
1
GFX@ PR575
590_0402_1%
ISNG
GFX@ PC502
390U_2.5V_M
1
GFX@ PR570
10K_0402_1%
2
ISPG
@ PC572
470P_0402_50V7K
GFX@ PC564
4.7U_0805_25V6-K
2
1
GFX@ PC563
4.7U_0805_25V6-K
2
1
2
1
PR506
4.7_1206_5%
2
1
@ PC506
680P_0603_50V7K
PC586
4.7U_0805_25V6-K
2
1
680P_0603_50V7K 4.7_1206_5%
ISEN2
PR584
VSUM-
1
B
PL503
0.36UH_PCMC104T-R36MN1R17_30A_20%
+CPU_CORE
ISEN3
ISEN1
10K_0402_1%
PR594
10K_0402_1%
3
2
1
680P_0603_50V7K 4.7_1206_5%
1
PR526
@ PC526
2
1
PQ506
5
4
PR591
3.65K_0402_1%
@ PC574
68U_25V_M_R0.36
PC569
100U_25V_M
PC566
68U_25V_M_R0.36
PC568
68U_25V_M_R0.36
PC585
4.7U_0805_25V6-K
2
1
PC584
4.7U_0805_25V6-K
2
1
PC583
4.7U_0805_25V6-K
2
1
PR589
PR585
VSUM+
PC515
0.22U_0603_10V7K
BOOT2 2
1 2
1
PR515
0_0603_5%
LGATE2
3
2
1
PQ504
PC525
0.22U_0603_10V7K
BOOT1 2
1 2
1
PR525
0_0603_5%
LGATE1
4
PL504
0.36UH_PCMC104T-R36MN1R17_30A_20%
4
1
PHASE1
3
2
1
10K_0402_1%
PHASE2
PQ508
3
2
1
PQ503
5
UGATE1
PR587
CPU_B+
VSUM-
CPU_B+
GFX@ PQ501
3
2
1
5
3
2
1
PR557
2.61K_0402_1%
1 2
11K_0402_1%
@ PC552
@ PR555
330P_0402_50V7K 100_0402_1%
2
1
2
1
10K_0402_1%
PC582
4.7U_0805_25V6-K
2
1
1000P_0402_50V7K
2
1
PR586
ISEN3
PH503
10K_0402_1%_ERTJ0EG103FA
3
2
1
<8> VSSSENSE
+CPU_CORE
1_0402_5%
10K_0402_1%
680P_0603_50V7K 4.7_1206_5%
PC546
<8> VCCSENSE
PQ505
330P_0402_50V7K
2
1
1
PC545
PR554
698_0402_1%
2
1
PC544 0.22U_0402_6.3V6K
LGATE3
PC553
2
1
150P_0402_50V8J 316K_0402_1%
PR556
470P_0402_50V7K
PR551
2
1
3.83K_0402_1%
PR549
PC562 0.22U_0402_6.3V6K
2
1
@ PC551
2
1
PC543
1
VSUM+
0.022U_0402_16V7K
499_0402_1%
PC549
0.22U_0603_10V7K
0.33U_0402_10V6K
499K_0402_1%
+5VALW
PL505
0.36UH_PCMC104T-R36MN1R17_30A_20%
PC535
0.22U_0603_10V7K
BOOT3 2
1 2
1
PR535
0_0603_5%
PQ512
+5VALW
1_0603_5%
@ PC550
2
1
VSUM-
330P_0402_50V7K
3
2
1
3
2
1
DC@ PR560
7.87K_0402_1%
1
2
@ PR576 0_0402_5%
PHASE3
2
1
PC567 0.22U_0402_6.3V6K
2
1
PC547
PC542
PR548
CPU_B+
UGATE3
CPU_B+
PC587
4.7U_0805_25V6-K
2
1
BOOT1
@ PC573
0.01U_0402_16V7K
PR562
0_0603_5%
PQ514
@ PC536
PR536
2
1
2
1
UGATE1
25
Connect to +5V can disable

GFX portion
PC581
4.7U_0805_25V6-K
2
1
PHASE1
26
B+
+GFX_COREP
GFX@ PH504 10K_0402_1%_ERTJ0EG103FA

1
2 1
2
1
2
GFX@ PR572
7.5K_0402_1%
GFX@ PC570
.1U_0402_16V7K
1
2
GFX@ PR573
11K_0402_1%
1
2
1
2
@ PR574
GFX@ PC571
100_0402_1%
.1U_0402_16V7K
+5VALW
PQ510
@ PC516
PR516
2
1
2
1
27
Connect to +5V can disable

PWM3
PC588
4.7U_0805_25V6-K
2
1
28
LGATE1
29
LGATE3
@ PR561
0_0402_5%
1
2
30
PHASE3
3
2
1
VDDP+
UGATE3
31
1U_0603_10V6K
PC548
2
1
ISEN1
ISEN2
@ PC540
2
1
22P_0402_50V8J
LGATE
BOOT3
PL501
HCB4532KF-800T90_1812
ISL6208ACRZ-T_QFN8_3X3
PC554
2.2U_0603_10V6K
2
1
LGATE2
PR558
GND
32
0_0603_5%
For Turbo mode , PH502 must be

changed 470K (b value = 4700)
PC541
33P_0402_50V8J
@ PR547
PHASE
PGND
33
PR559
2
B
PWM
PC580
4.7U_0805_25V6-K
2
1
PHASE2
UGATE
34
ISEN3
1000P_0402_50V7K
PC539
1
@ PR545
27.4K_0402_1%
PR546
UGATE2
BOOT
FCCM
PU500
35
VCC
GFX@ PL502
0.36UH_PCMC104T-R36MN1R17_30A_20%
4
1
3
2
1
PROG1
VIN
23
VDD
BOOT1
BOOT2
PR569
0_0603_5%
1
2
LGG
PHG
UGG
BOOTG
PROG2
ISNG
ISPG
RTNG
NTCG
ISUMP
22
13
470KB_0402_5%_ERTJ0EV474J
2
21
VW
UG1
36
PU501
37
38
39
40
41
42
43
44
45
46
47
VSENG
FBG
GND
COMPG
PH1
NTC
3.83K_0402_1%
8.06K_0402_1%
PR568
0_0603_5%
1
2
PR577
0_0603_5%
1
2
LGATEG
UGATEG
BOOTG
NTCG
PHASEG
VR_HOT#
470P_0402_50V7K
@ PH502
1
@ PR544
LGATEG
.1U_0402_16V7K
43P_0402_50V8J
1
2
@ PR543
499_0402_1%
PR505
0_0603_5%
VDD+
+1.05VS_VCCPP
PC537
<44> VR_HOT#
VSSP1
ISUMN
12
IMON
RTN
11
LG1
20
10
PWM3
PGOOD
19
<5,30,44> VGATE
ISNG
ISPG
1.91K_0402_1%
VR_ON
VSEN
18
VDDP
ISL95831CRZ-T_TQFN48_6X6
ISEN1
SCLK
17
PR540
0_0402_5%
LG2
ISEN2
PC561
0.033U_0603_16V7
2
1
PR542
19.1K_0402_1%
2
1
VSSP2
ALERT#
16
SDA
ISEN3/ FB2
SVID_SCLK
PH2
15
VSSSENSE
<44> VR_ON
48
49
4
PGOODG
FB
SVID_SDA
SVID_ALERT#
BOOT2
UG2
COMP
PC538
@
PR567
16.5K_0402_1%
IMONG
14
2
1
PR541
BOOTG 2
<8> VR_SVID_CLK
GFX@ PC558
1000P_0402_50V7K
VWG
GFX@ PC505
0.22U_0603_10V7K
1 2
1
VSS_AXG_SENSE <9>
+1.05VS_VCCPP
<8> VR_SVID_ALRT#
+3VS
+5VALW
<8> VR_SVID_DAT
PHASEG
GFX@ PR534
2.55K_0402_1%
PC560
.1U_0402_16V7K
2
1
PR537
130_0402_1%
VSS_AXG_SENSE
GFX@ PR533
475K_0402_1%
GFX@ PC534
0.047U_0603_16V7K
PR539
18.2K_0402_1%
2
1
GFX@ PC533
150P_0402_50V8J
VCC_AXG_SENSE <9>
24
GFX@ PC532
680P_0402_50V7K
1
1
PR538
54.9_0402_1%
PC559
1U_0603_10V6K
GFX@ PR532
422_0402_1%
2
1 2
UGATEG
GFX@ PC556
330P_0402_50V7K
1
2
GFX@ PQ502
@ PR564 27.4K_0402_1%
1
2
PQ507
3.83K_0402_1%
470KB_0402_5%_ERTJ0EV474J
1
GFX@ PC557
330P_0402_50V7K
2
1
GFX@ PC531
39P_0402_50V7K
2
1
CPU_B+
@ PH501
2
@ PR531
499K_0402_1%
1
2
GFX@ PC530
1000P_0402_50V7K
@ PR563
2
1 @ PC555 470P_0402_50V7K NTCG
GFX@ PR571
1_0402_5%
GFX@ PR530
8.06K_0402_1%
+CPU_CORE
PR580
ISEN2
PR581
10K_0402_1%
VSUM+
ISEN1
PR588
PR582
ISEN3
10K_0402_1%
3.65K_0402_1%
VSUM-
10K_0402_1%
PR583
1_0402_5%
VSUM+
PR590
PR592
PR593
VSUM-
2
1_0402_5%
10K_0402_1%
3.65K_0402_1%
ISEN2
Issued Date
Compal Secret Data
2010/01/25
2009/04/28
Deciphered Date
3
Title
CPU_CORE/GFX
Custom
Date:
Rev
0.1
NHQAA LA-6831P M/B
Sheet
1
55
of
58
DH_VCORE
PR605 2.2_0603_1%
1
2
1
2
BST_VCORE
PC605
0.1U_0603_25V7K
PR620
1.5K_0402_1%
<13,32,33,47> VGA_PW ROK
+5VALW
PR621 3K_0402_1%
15
BOOT
14
2 PC628
3
2
1
16
UG
PVCC
1
2
PR631
10_0402_5%
1
2
@ PC631
10U_1206_25VAK
1
2
PC630
10U_1206_25VAK
VDD_SENSE <14>
@PC627
@
PC627
0.01U_0402_25V7K
PR632
4.75K_0402_1%
@ PC626
2200P_0402_25V7K
1000P_0402_50V7K
@ PC632
2
1
FSW=1/(75E-12*57.6K)=231.48KHz
PC602
390U_2.5V_M
+
0_0402_5%
3
2
1
10
5
4
3.9K_0402_1%
VO
PR607
PR630
1
FSET
@ PR624
49.9K_0402_1%
@ PC625
22P_0402_50V8J
ISEN_VCORE
1 2
11
ISEN
CE@
57.6K_0402_1%
PR625
2
1
FB
NC
6
PC624
.1U_0402_16V7K
EN
@PR606
@
PR606
4.7_1206_5%
@ PC606
680P_0603_50V7K
12
+VGA_COREP
0.56U_PCMC104T-R56MN_25A_20%
1
2
CE@ PQ604
TPCA8028-H_SOP-ADVANCE8-5
PGND
DL_VCORE
13
3
2
1
LG
PQ602
TPCA8028-H_SOP-ADVANCE8-5
VCC
APW 7138NITRL_SSOP16
,32,47> DGPU_PW R_EN
68K_0402_1%
2
PR627
4.7_0603_5%
Ipeak=24A
Imax=16.8A
F=231.5kHZ
Total capacitor
1050u
ESR=3.1m ohm
PL602
20K_0402_1%
2
APOP@ PR623
1
26268_VCC
2.2U_0603_6.3V6K
PC623
2.2U_0603_6.3V6K
2
1
AM@ PR622
1
VIN
PHASE
6268_VCC
PGOOD
GND
PU600
PR626
0_0603_5%
PQ601
4.7U_0805_25V6-K
PC622
2
1
6268_VCC
10U_1206_25VAK
PC621
2
1
LX_VCORE
10U_1206_25VAK
PC620
2
1
PL601
HCB4532KF-800T90_1812
8,39,44,47,52,54> SUSP#
2 B+_core
B+
+3VS_DGPU
N11E-GE1_LP
Imax=16.09A
Ipeak=18.19A
Iocp=20.72A
Imax=16.8A
Ipeak=24A
Iocp=29.17A
Imax=16.8A
Ipeak=24A
Iocp=32.14A
1
1
N11P-GE1
N11P-GE2
N11E-GE1-LP
0.80V
0.80V
0.80V
0.85V
0.85V
0.85V
PR260=4.75K
PR262=14K
PR261=56.2K
PR263=40.2K
PR260=4.75K
PR262=14K
PR261=56.2K
PR263=63.4K
Issued Date
2009/01/23
Deciphered Date
2010/01/23
4
Compal Secret Data
GPU_VID1 <13>
PR260=4.75K
PR262=14K
PR261=56.2K
PR263=29.4K
0.9V
0.925V
@ PR644
22K_0402_1%
PR260=4.75K
PR262=14K
PR261=56.2K
PR263=19.6K
0.95V
PR643
3K_0402_1%
1
2
2
G
PC634
.1U_0402_16V7K
PR260=4.75K
PR262=14K
PR261=56.2K
PR263=16.2K
1V
1.03V
PR642
100K_0402_1%
0.85V
PQ606
SSM3K7002FU_SC70-3
0.85V
+3VS_DGPU
GPU_VID0 <13>
@ PR636
22K_0402_1%
N11M-GE2
N11M-GE1
PC633
.1U_0402_16V7K
GPU_VID1
PR635
3K_0402_1%
1
2
VFB(0.6)=Vout*Rbottom/(Rtop+Rbottom)
GPU_VID0
PQ605
D SSM3K7002FU_SC70-3
2
G
S
PR255=7.15K
PR634
100K_0402_1%
PR255=7.15K
PQ50=unpop
AP2OP@ PR640
40.2K_0402_1%
1
2
PR255=5.36K
PQ50=unpop
PR641
14K_0402_1%
PR633
56.2K_0402_1%
N11P-GE1/GE2
N11M-GE1/GE2
Title

+VGA_COREP
Size
Document Number
Custom
Date:
Rev
1.0
NHQAA LA-6831P M/B
Sheet
1
56
of
58
HW PIR (Product Improve Record)

NWQAA LA-6062P SCHEMATIC CHANGE LIST
REVISION CHANGE: 0.1 TO 0.2
GERBER-OUT DATE: 2009/12/30
NO
DATE
PAGE MODIFICATION LIST
PURPOSE
-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
Compal Secret Data
200910/9
Issued Date
Deciphered Date
2010/01/23
5
Title
HW-PIR
Size
Document Number
Custom
Rev
0.1
NHQAA LA-6831P M/B
Date:
Sheet
1
57
of
57
NO
DATE
PAGE
MODIFICATION LIST
PURPOSE
---------------------------------------------------------------------------------------------------------------------------------------1
2010/04/20
P36-P45
Release
Issued Date
Compal Secret Data
2009/11/13
Deciphered Date
2009/04/28
Title
Power PIR
Size
Document Number
Rev
0.1
NHQAA LA-6831P M/B

Date:
Sheet
57
of
58

402b6 Compal Phqaa La-6831p Toshiba Satellite p750

Transféré par

Informations du document

Description originale:

Copyright

Formats disponibles

Partager ce document

Partager ou intégrer le document

Options de partage

Avez-vous trouvé ce document utile ?

Ce contenu est-il inapproprié ?

Droits d'auteur :

Formats disponibles

402b6 Compal Phqaa La-6831p Toshiba Satellite p750

Transféré par

Droits d'auteur :

Formats disponibles

A

LA-6831P REV 0.1 Schematic

Compal Electronics, Inc.

Compal Secret Data

PHQAA LA-6831P M/B

PCI-Express 16X 5GHz

VGA Thermal Sensor

Memory BUS(DDRIII) 200pin DDRIII-SO-DIMM X2

1.5V DDRIII 1066/1333/1600 MT/s

NVIDIA N12P-GS/GE, 128bit with 1GB/2GB

USB port 0,1

TP& Light Pipe/B

DC/DC Interface CKT.

Power Circuit DC/DC

Power On/Off CKT.

Audio & USB/B

MDC 1.5 Conn

Compal Electronics, Inc.

Compal Secret Data

PHQAA LA-6831P M/B

Monday, August 02, 2010

DESIGN CURRENT 0.1A

DESIGN CURRENT 0.1A

DESIGN CURRENT 0.5A

DESIGN CURRENT 400mA

DESIGN CURRENT 300mA

DESIGN CURRENT 1.6A

DESIGN CURRENT 330mA

DESIGN CURRENT 1.5A

DESIGN CURRENT 0.5A

DESIGN CURRENT 48A

DESIGN CURRENT 28A

Ipeak=18A, Imax=12.6A, Iocp min=19.8

DESIGN CURRENT 18A

Ipeak=7A, Imax=4.9A, Iocp min=7.7

Ipeak=15A, Imax=10.5A, Iocp min=16.5

DESIGN CURRENT 15A

Compal Electronics, Inc.

Compal Secret Data

PHQAA LA-6831P M/B

Monday, August 02, 2010

BTO Option Table

S5 S4/ Battery only

S5 S4/AC & Battery

Camera & Mic

Camera & Mic

Camera & Mic

SLP_S3# SLP_S4# SLP_S5#

Compal Electronics, Inc.

Compal Secret Data

N11P & N11E

PCH SM Bus Address

MINI PCI-E SLOT

PHQAA LA-6831P M/B

Monday, August 02, 2010

Stuff R41 and R42 if do not support eDP

DDR3 Compensation Signals

Routed as a single daisy chain

Close to CPU side

JTAG & BPM

PU/PD for JTAG signals

Buffered Reset to CPU

FAN Control Circuit