42lb7df SB

Internal Use Only
website:http://biz.LGservice.com
LCD TV SERVICE MANUAL

CHASSIS : LJ81A
MODEL : 42LB7DF
CAUTION
42LB7DF-SB
BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
CONTENTS
CONTENTS .............................................................................................. 2 PRODUCT SAFETY ..................................................................................3 SPECIFICATION ........................................................................................6 ADJUSTMENT INSTRUCTION ...............................................................12 TROUBLE SHOOTING ............................................................................20 BLOCK DIAGRAM...................................................................................48 EXPLODED VIEW .................................................................................. 54 SVC. SHEET ...............................................................................................
Copyright2007 LG Electronics. Inc. All right reserved. Only for training and service purposes
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LGE Internal Use Only
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Replacement Parts List. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks. It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation. If any fuse (or Fusible Resistor) in this TV receiver is blown, replace it with the specified. When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1W), keep the resistor 10mm away from PCB. Keep wires away from high voltage or high temperature parts.
Leakage Current Hot Check (See below Figure) Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check. Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to 0.5mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.
Leakage Current Hot Check circuit
AC Volt-meter
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed metallic parts of the cabinet, such as antennas, terminals, etc., to be sure the set is safe to operate without damage of electrical shock.
Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1M and 5.2M. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.
To Instrument's exposed METALLIC PARTS
0.15uF
Good Earth Ground such as WATER PIPE, CONDUIT etc.
1.5 Kohm/10W
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SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service manual and its supplements and addenda, read and follow the SAFETY PRECAUTIONS on page 3 of this publication. NOTE: If unforeseen circumstances create conflict between the following servicing precautions and any of the safety precautions on page 3 of this publication, always follow the safety precautions. Remember: Safety First. General Servicing Precautions 1. Always unplug the receiver AC power cord from the AC power source before; a. Removing or reinstalling any component, circuit board module or any other receiver assembly. b. Disconnecting or reconnecting any receiver electrical plug or other electrical connection. c. Connecting a test substitute in parallel with an electrolytic capacitor in the receiver. CAUTION: A wrong part substitution or incorrect polarity installation of electrolytic capacitors may result in an explosion hazard. 2. Test high voltage only by measuring it with an appropriate high voltage meter or other voltage measuring device (DVM, FETVOM, etc) equipped with a suitable high voltage probe. Do not test high voltage by "drawing an arc". 3. Do not spray chemicals on or near this receiver or any of its assemblies. 4. Unless specified otherwise in this service manual, clean electrical contacts only by applying the following mixture to the contacts with a pipe cleaner, cotton-tipped stick or comparable non-abrasive applicator; 10% (by volume) Acetone and 90% (by volume) isopropyl alcohol (90%-99% strength) CAUTION: This is a flammable mixture. Unless specified otherwise in this service manual, lubrication of contacts in not required. 5. Do not defeat any plug/socket B+ voltage interlocks with which receivers covered by this service manual might be equipped. 6. Do not apply AC power to this instrument and/or any of its electrical assemblies unless all solid-state device heat sinks are correctly installed. 7. Always connect the test receiver ground lead to the receiver chassis ground before connecting the test receiver positive lead. Always remove the test receiver ground lead last. 8. Use with this receiver only the test fixtures specified in this service manual. CAUTION: Do not connect the test fixture ground strap to any heat sink in this receiver. Electrostatically Sensitive (ES) Devices Some semiconductor (solid-state) devices can be damaged easily by static electricity. Such components commonly are called Electrostatically Sensitive (ES) Devices. Examples of typical ES devices are integrated circuits and some field-effect transistors and semiconductor "chip" components. The following techniques should be used to help reduce the incidence of component damage caused by static by static electricity. 1. Immediately before handling any semiconductor component or semiconductor-equipped assembly, drain off any electrostatic charge on your body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging wrist strap device, which should be removed to prevent potential shock reasons prior to applying power to the
unit under test. 2. After removing an electrical assembly equipped with ES devices, place the assembly on a conductive surface such as aluminum foil, to prevent electrostatic charge buildup or exposure of the assembly. 3. Use only a grounded-tip soldering iron to solder or unsolder ES devices. 4. Use only an anti-static type solder removal device. Some solder removal devices not classified as "anti-static" can generate electrical charges sufficient to damage ES devices. 5. Do not use freon-propelled chemicals. These can generate electrical charges sufficient to damage ES devices. 6. Do not remove a replacement ES device from its protective package until immediately before you are ready to install it. (Most replacement ES devices are packaged with leads electrically shorted together by conductive foam, aluminum foil or comparable conductive material). 7. Immediately before removing the protective material from the leads of a replacement ES device, touch the protective material to the chassis or circuit assembly into which the device will be installed. CAUTION: Be sure no power is applied to the chassis or circuit, and observe all other safety precautions. 8. Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion such as the brushing together of your clothes fabric or the lifting of your foot from a carpeted floor can generate static electricity sufficient to damage an ES device.) General Soldering Guidelines 1. Use a grounded-tip, low-wattage soldering iron and appropriate tip size and shape that will maintain tip temperature within the range or 500F to 600F. 2. Use an appropriate gauge of RMA resin-core solder composed of 60 parts tin/40 parts lead. 3. Keep the soldering iron tip clean and well tinned. 4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25cm) brush with a metal handle. Do not use freon-propelled spray-on cleaners. 5. Use the following unsoldering technique a. Allow the soldering iron tip to reach normal temperature. (500F to 600F) b. Heat the component lead until the solder melts. c. Quickly draw the melted solder with an anti-static, suctiontype solder removal device or with solder braid. CAUTION: Work quickly to avoid overheating the circuitboard printed foil. 6. Use the following soldering technique. a. Allow the soldering iron tip to reach a normal temperature (500F to 600F) b. First, hold the soldering iron tip and solder the strand against the component lead until the solder melts. c. Quickly move the soldering iron tip to the junction of the component lead and the printed circuit foil, and hold it there only until the solder flows onto and around both the component lead and the foil. CAUTION: Work quickly to avoid overheating the circuit board printed foil. d. Closely inspect the solder area and remove any excess or splashed solder with a small wire-bristle brush.
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IC Remove/Replacement Some chassis circuit boards have slotted holes (oblong) through which the IC leads are inserted and then bent flat against the circuit foil. When holes are the slotted type, the following technique should be used to remove and replace the IC. When working with boards using the familiar round hole, use the standard technique as outlined in paragraphs 5 and 6 above. Removal 1. Desolder and straighten each IC lead in one operation by gently prying up on the lead with the soldering iron tip as the solder melts. 2. Draw away the melted solder with an anti-static suction-type solder removal device (or with solder braid) before removing the IC. Replacement 1. Carefully insert the replacement IC in the circuit board. 2. Carefully bend each IC lead against the circuit foil pad and solder it. 3. Clean the soldered areas with a small wire-bristle brush. (It is not necessary to reapply acrylic coating to the areas). "Small-Signal" Discrete Transistor Removal/Replacement 1. Remove the defective transistor by clipping its leads as close as possible to the component body. 2. Bend into a "U" shape the end of each of three leads remaining on the circuit board. 3. Bend into a "U" shape the replacement transistor leads. 4. Connect the replacement transistor leads to the corresponding leads extending from the circuit board and crimp the "U" with long nose pliers to insure metal to metal contact then solder each connection. Power Output, Transistor Device Removal/Replacement 1. Heat and remove all solder from around the transistor leads. 2. Remove the heat sink mounting screw (if so equipped). 3. Carefully remove the transistor from the heat sink of the circuit board. 4. Insert new transistor in the circuit board. 5. Solder each transistor lead, and clip off excess lead. 6. Replace heat sink. Diode Removal/Replacement 1. Remove defective diode by clipping its leads as close as possible to diode body. 2. Bend the two remaining leads perpendicular y to the circuit board. 3. Observing diode polarity, wrap each lead of the new diode around the corresponding lead on the circuit board. 4. Securely crimp each connection and solder it. 5. Inspect (on the circuit board copper side) the solder joints of the two "original" leads. If they are not shiny, reheat them and if necessary, apply additional solder. Fuse and Conventional Resistor Removal/Replacement 1. Clip each fuse or resistor lead at top of the circuit board hollow stake. 2. Securely crimp the leads of replacement component around notch at stake top. 3. Solder the connections. CAUTION: Maintain original spacing between the replaced component and adjacent components and the circuit board to prevent excessive component temperatures.
Circuit Board Foil Repair Excessive heat applied to the copper foil of any printed circuit board will weaken the adhesive that bonds the foil to the circuit board causing the foil to separate from or "lift-off" the board. The following guidelines and procedures should be followed whenever this condition is encountered. At IC Connections To repair a defective copper pattern at IC connections use the following procedure to install a jumper wire on the copper pattern side of the circuit board. (Use this technique only on IC connections). 1. Carefully remove the damaged copper pattern with a sharp knife. (Remove only as much copper as absolutely necessary). 2. carefully scratch away the solder resist and acrylic coating (if used) from the end of the remaining copper pattern. 3. Bend a small "U" in one end of a small gauge jumper wire and carefully crimp it around the IC pin. Solder the IC connection. 4. Route the jumper wire along the path of the out-away copper pattern and let it overlap the previously scraped end of the good copper pattern. Solder the overlapped area and clip off any excess jumper wire. At Other Connections Use the following technique to repair the defective copper pattern at connections other than IC Pins. This technique involves the installation of a jumper wire on the component side of the circuit board. 1. Remove the defective copper pattern with a sharp knife. Remove at least 1/4 inch of copper, to ensure that a hazardous condition will not exist if the jumper wire opens. 2. Trace along the copper pattern from both sides of the pattern break and locate the nearest component that is directly connected to the affected copper pattern. 3. Connect insulated 20-gauge jumper wire from the lead of the nearest component on one side of the pattern break to the lead of the nearest component on the other side. Carefully crimp and solder the connections. CAUTION: Be sure the insulated jumper wire is dressed so the it does not touch components or sharp edges.
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SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range
This specification is applied to LJ81A chassis.
Chassis Model Name LJ81A 42LB7DF-SB Market Central and South AMEROCA Brand LG Remark
3. Test method
3.1 Performance : LGE TV test method followed 3.2 Demanded other specification Safety : UL, CSA, IEC Specification EMC : FCC, ICES, IEC
Model Name Market Central and Appliance Safety : IEC/EN60065
2. Requirement for Test

Testing for standard of each part must be followed in below condition. (1) Temperature : 20 5C, CST : 40 5C (2) Humidity : 65% 10% (3) Power : Standard input voltage (100-240V~, 50/60Hz) *Standard Voltage of each products is marked by models. (4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with SBOM. (5) The receiver must be operated for about 20 minutes prior to the adjustment.
42LB7DF-SB
South AMEROCA EMC : CISPR13
4. General Specification(TV)
No 1 2 Model Receiving System Available Channel Specification 1) SBTVD / NTSC / PAL-M / PAL-N 1) VHF : 02~13 2) UHF : 14~69 3) DTV : 02-69 4) CATV : 01~135 3 Input Voltage Market 4 Screen Size 1) AC 100 ~ 240V 50/60Hz Central and South AMERICA 42 inch Wide (1366 x 768) 42 inch Wide (1920 x 1080) 5 6 7 8 Aspect Ratio Tuning System Module Operating Environment 16:9 FS LC420WU6-SLA1 1) Temp : 0 ~ 40 deg 2) Humidity : ~ 80 % 9 Storage Environment 1) Temp : -20 ~ 60 deg 2) Humidity : ~ 85 % FULL HD 42LB7DF-SB HD FULL HD Option Remark
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5. Chroma & Brightness

No 1 2 3 Item White brightness (Center 1-point/Full white Pattern) Brightness uniformity Color coordinate RED GREEN BLUE WHITE 4 5 Color coordinate uniformity Contrast ratio Color Temperature Cool Standard Warm Color Distortion, DG Color Distortion, DP Color S/N, AM/FM Color Killer Sensitivity 43.0 -80 700:1 7000:1 Typ. -1000 1000:1 10000:1 11000 9300 6500 10.0 10.0 % deg dB dBm Typ. +1000 X Y X Y X Y X Y 80 Typ-0.03 0.638 0.340 0.279 0.611 0.146 0.062 0.272 0.278 N/A NORMAL DCR <Test Condition> HDMI Input, 85% Full white pattern Typ+0.03 % Typ. +0.03 Full white Min 400 Typ 500 Max Unit cd/m
2
Remark 42LB7DF-SB
6. Component Video Input (Y, CB/PB, CR/PR)

No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Resolution 720*480 720*480 720*480 720*480 1280*720 1280*720 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 H-freq(kHz) 15.73 15.73 31.47 31.47 45.00 44.96 33.75 33.72 67.500 67.432 27.000 26.97 33.75 33.71 56.25 28.125 V-freq(kHz) 60 59.94 60 59.94 60.00 59.94 60.00 59.94 60 59.939 24.000 23.94 30.000 29.97 50.000 25.000 Pixel clock 13.5135 13.5 27.027 27.0 74.25 74.176 74.25 74.176 148.50 148.352 74.25 74.176 74.25 74.176 148.5 74.25 Proposed SDTV ,DVD 480I SDTV ,DVD 480I SDTV 480P SDTV 480P HDTV 720P HDTV 720P HDTV 1080I HDTV 1080I HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P
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7. RGB Input (PC)

No PC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 640*350 720*400 640*480 640*480 640*480 800*600 800*600 800*600 800*600 1024*768 1024*768 1024*768 1280*768 1280*768 1360*768 1280*1024 1280*1024 1600*1200 1920*1080 31.468 31.469 31.469 37.861 37.500 35.156 37.879 48.077 46.875 48.363 56.476 60.023 47.776 60.289 47.712 63.981 79.976 75.00 67.5 70.09 70.08 59.94 72.80 75.00 56.25 60.31 72.18 75.00 60.00 70.06 75.02 59.870 74.893 60.015 60.020 75.025 60.00 60 25.17 28.32 25.17 31.50 31.50 36.00 40.00 50.00 49.50 65.00 75.00 78.75 79.5 102.25 85.50 108.00 135 162 148.5 EGA DOS VESA(VGA) VESA(VGA) VESA(VGA) VESA(SVGA) VESA(SVGA) VESA(SVGA) VESA(SVGA) VESA(XGA) VESA(XGA) VESA(XGA) CVT(WXGA) CVT(WXGA) VESA (WXGA) VESA (SXGA) VESA (SXGA) VESA (UXGA) HDTV 1080P Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed DDC X O O O O O O O O O O O O O O O O O O
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8. HDMI Input (PC/DTV)

No PC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 640*350 720*400 640*480 640*480 640*480 800*600 800*600 800*600 800*600 1024*768 1024*768 1024*768 1280*768 1360*768 1280*1024 1280*1024 1600*1200 1920*1080 DTV 720*480 720*480 1280*720 1280*720 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 31.47 31.47 45.00 44.96 33.75 33.72 67.500 67.432 27.000 26.97 33.75 33.71 56.25 28.125 60 59.94 60.00 59.94 60.00 59.94 60 59.939 24.000 23.94 30.000 29.97 50.000 25.000 27.027 27.00 74.25 74.176 74.25 74.176 148.50 148.352 74.25 74.176 74.25 74.176 148.5 74.25 SDTV 480P SDTV 480P HDTV 720P HDTV 720P HDTV 1080I HDTV 1080I HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P 31.468 31.469 31.469 37.861 37.500 35.156 37.879 48.077 46.875 48.363 56.476 60.023 47.776 47.712 63.981 79.976 75.00 67.5 70.09 70.08 59.94 72.80 75.00 56.25 60.31 72.18 75.00 60.00 70.06 75.02 59.870 60.015 60.020 75.025 60.00 60 25.17 28.32 25.17 31.50 31.50 36.00 40.00 50.00 49.50 65.00 75.00 78.75 79.5 85.50 108.00 135 162 148.5 EGA DOS VESA(VGA) VESA(VGA) VESA(VGA) VESA(SVGA) VESA(SVGA) VESA(SVGA) VESA(SVGA) VESA(XGA) VESA(XGA) VESA(XGA) CVT(WXGA) VESA (WXGA) VESA (SXGA) VESA (SXGA) VESA (UXGA) HDTV 1080P Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed DDC X O O O O O O O O O O O O O O O O O
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9. General specifications (module)

No 1 2 3 4 5 6 7 8 9 10 11 Item Active Screen Size Outline Dimension Pixel Pitch Pixel Format Color Depth Luminance ,White Viewing Angle (CR>10) Power Consumption Weight Display Operating Mode Surface Treatment 1067.31 (diagonal) 983(H)x576(V)x47.3(D) 0.4845 x 0.4845 1920(H)x1080(V) RGB stripe arrangement 8bit 16.7 500 (center 1 point typ) R/L 178(Typ),U/D 178(Typ) 168.36 11(Typ), 12(Max) Transmissive mode ,normally black Hard coating (3H) Mbit cd/m2 degree Watt kg Value Unit mm mm um Remark 42.02 inches
10. Electro Optical Characteristic Specifications (module standard)

No 1 2 3 4 5 Contrast Ratio Item CR CR with DCR Surface Luminance, White Luminance Variation Response Time Color coordinate Gray to Gray Rise+decay RED GREEN BLUE WHITE 6 Viewing Angle (CR>10) X axis right(=0) X axis left(=180) Yaxis up (=90) Z axis down(=270) 7 Gray Scale Without DCR With DCR X Y X Y X Y X Y 89 89 89 89 2.2 Typ -0.03 5 10 TBD TBD TBD TBD TBD TBD TBD TBD degree 400 500 1.3 8 14 Typ +0.03 Full Pattern msec Cd/m2 Full white ( white/5P) Min 800 Typ 1000 Max Unit Remark
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12. Customer Menu Setup (Shipment Condition)

No 1 2 3 4 5 Input Mode Volume Level Mute Aspect Ratio Video EZ Picture Color temperature XD Advanced Reset 6 Audio Audio Language EZ SoundRite EZ Sound Balance Treble Bass Front Surround TV Speaker 7 Timer Auto clock Manual Clock Off Timer On Timer Auto Off 8 Option Aspect Ratio Caption/Text Caption Option Language ISM Method SET ID 9 Lock Lock System Set password Block channel Movie Rating TV Rating-Children TV Rating-General Audio Block 10 Channel Memory Off Off Normal 0 50 50 Off On Off Off Off Off Off 16:9 Off Off English Normal 1 Off On None Off Off Off Off none ( Default : 0000 ) Item TV02CH 20 Off 16:9 Daylight (Disable) Auto Cinema: Off Can be access only EZ picture is setting user mode Condition Remark
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ADJUSTMENT INSTRUCTION
1. Application Range
This spec sheet is applied all of the 'LJ81A' Chassis.
4.PCB Assembly Adjustment

4-1. CPLD DOWNLOAD
- JTAG MODE
2. Specification
(1) Because this is not a hot chassis, it is not necessary to use an isolation transformer. However, the use of isolation transformer will help protect test instrument. (2) Adjustment must be done in the correct order. (3) The adjustment must be performed in the circumstance of 255C of temperature and 6510% of relative humidity if there is no specific designation. (4) The input voltage of the receiver must keep 100-220V~, 50/60Hz. (5) The receiver must be operated for about 5 minutes prior to the adjustment. O After RGB 100% Full White pattern(06CH) then process Heat-run(or 8.Test patter condition of EZ-Adjust status). O Enter into HEAT-RUN MODE 1) Press the POWER ON KEY on R/C for adjustment. 2) Press ADJ button of Service remocon. Select 10.Test pattern and, after select White using navigation button, and then you can see 100% Full White pattern. 3) In this status you can maintain Heat-Run useless any pattern generator. * Notice! If you maintain one picture over 20minute(Especially sharp distinction black with white pattern-13Ch, or Cross hatch pattern09Ch) then it can appear image stick near black level.
(1) <<PRINT PORT>> PIN MAP Component 2 3 8 11 13 15 18 to 25 JTAG Mode Signal Name TCK TMS TDI TDO VCC GND
3. Adjustment items
3-1. PCB Assembly adjustment
O O O
CPLD DOWNLOAD Adjust 480i Comp1 Adjust 1080p Comp1 / RGB - If it necessary, it can adjustment at Manufacture Line. - You can see set adjustment status at 9.ADJUST CHECK of the In-start menu.
3-2. Set Assembly Adjustment

O
EDID(The Extended Display Identification Data) / DDC(Display Data Channel) download O Color Temperature(White Balance) Adjustment O Make sure RS-232C control O Selection Factory output option
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(2) <<10P WAFER>> PIN MAP

Dimenstions are shown in inches. The spacing between pin centers is 0.1 inch.
0.425 Typ.
Color Strip
(3) Circuit Board Header Connection - The ByteBlasterMV 10-pin female plug connects to a 10pin male header on the circuit board. The 10-pin male header has two rows of five pins, which are connected to the devices programming or configuration pins. - The ByteBlasterMV cable receives power and downloads data via the male header. Fig.1 shows the dimensions of a typical 10-pin male header.
Dimensions are shown in incles. Top View 0.100 Side View 0.100 0.025 Sq.
0.250 Typ.
0.100 Sq. 0.700 Typ.
0.025 Sq.
0.235
1) Table 2. Identifies the 10-pin female plugs pin names for the corresponding download mode.
Table2. ByteBlasterMV Female Plug;s Pin Names & Download Models Pin PS Mode Singal Name 1 2 3 DCLK GND CONF_DONE Description Clock singnal Signal ground Configuration control 4 5 VCC nCONFIG Power supply Configuration control 6 7 nSTATUS No connect Configuration status 8 9 10 DATA0 GND No connect Data to device Signal ground TDI GND No connect Data to device Signal ground VCC TMS Power supply JTAG state machine control No connect No connect JTAG Mode Singal Name TCK GND TDO Description Clock singnal Signal ground Data to device Table 3. ByteBlasterMV Cable Absolute Maximum Ratings Symbol Vcc VI Parameter Supply voltage DC input voltage Conditions Min Max Unit 7.0 7.0 V V
(Fig.1) 10-Pin Male Header Dimensions 1) Table 3. Through 5 summarize the absolute maximum ratings, recommended operating conditions, and DC operating conditions for the ByteBlasterMV cable.
With respect ot ground -0.5 With respect ot ground -0.5
Table 4. ByteBlasterMV Calbe Recommended Operating Conditions Symbol Vcc Parameter Supply voltage 5.0-V Operation Supply voltage 3.3-V Operation Conditions Min Max Unit 4.5 3.0 5.5 3.6 V V
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(4) Real-Time ISP with the Quartus II Software. 1) The programming file formats generated by the Quartus II software that support these two features are the Programmer Object File(.pof) that is used with the Quartus II programmer, and the Jam File(.jam) and Jam Byte-Code File(.jbc) that are used with either the Quartus II programmer or other programming tools. 2) Ensure that you enable this feature before programming a MAX II device through the Quartus II programmer. You can enable the real-time ISP feature by selecting the Enable real-time ISP to allow background programming(for MAX II devices) option from the Quartus II programmer window. Refer Fig.2.
(Fig.2) Real-Time ISP Option in the Quartus II Programmer Window 3) You can also enable the real-time ISP feature in the Quartus II software through the following steps: 1. Choose Options(Tool menu). 2. Choose Programmer under the Category section.
(5) MAX II Device Handbook, Volume1. - To configure or program one or more devices with the ByteBlasterMV cable and the Quartus II programmer. 1) Compile a project. The Quartus II compiler generates a .sof file to configure APEX II, APEX 20K, Mercury, and Excalibur devices. To program an EPC configuration device, a .pof or JAM STAPL format file should be used. 2) Attach the ByteBlasterMV cable to a parallel port on a PC and insert the 10-pin female plug into the prototype system containing the target device. The board must supply power to the ByteBlasterMV cable. - For the Windows Nt operating system, a driver must be installed before using the ByteBlasterMV cable, go to the ByteBlasterMV and MasterBlaster Installation section in the Quartus II. 3) Open the Quartus II programmer by selecting Open Programmer from the (Processing Menu). Choose Setup... in the Programming Hardware section. Specify the ByteBlasterMV cable and the appropriate LPT port. Please see Changing Setup under the ByteBlasterMV cable in the Quartus II software Help menu for more information. 4) Select either passive serial or JTAG programming mode and then add the files and/or devices you want to program or configure using the add file.. or add device... buttons to create a chain description file(.cdf). - The programmer has two programming modes passive serial and JTAG, In passive mode, you select which SOFs to include in the device chain. In JTAG mode, you add specific devices and configuration devices to the device chain, in addition to POFs and SOFs, and you have several programming options for each configuration device in the chain. In JTAG mode, you can verify an EPC configuration devices contents against its programming file data, check that a device is blank, examine a programmed device and save its data to file, or use its data to program or verify another configuration device. 5) Choose the start button in the Quartus II software to program or configure the device(s). The ByteBlasterMV cable downloads the data from the SOF and/or POF file(s) into the device(s).
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4-2. Using RS-232C

Orher Command Set response d 00 OK00x Inter the Adjustment ad 00 00 Mode Change the Source kb 00 04 Start Adjustment Return the Response kb 00 06 ad 00 10 OKx(Success condition) NGx(Failed condition) Read Adjustment data (main) ad 00 20 (sub) ad 00 21 Confirm Adjustment ad 00 99 (main) 000000000000000000000000007c007b006dx (Sub) 000000070000000000000000007c00830077x NG 03 00x (Failed condition) NG 03 01x (Failed condition) NG 03 02x (Failed condition) OK 03 03x (Success condition) End of Adjustment ad 00 90 d 00 OK90x b 00 00 OK04x(Adjust 480i comp1) b 00 OK06x(Adjust 1080p comp1/RGB)
<Fig.3> Adjustment pattern : 480i/1080p 60Hz Pattern
5-4. Adjustment method 480i Comp1, Adjust 1080p Comp1/RGB

(1) ADC 480i Component1 adjustment. - Check connection of Component1 - MSPG-925FA -> Model : 209, Pattern : 65 1) Set Component 480i mode and 100% Horizontal Color Bar Pattern(HozTV31Bar), then set TV set to Component1 mode and its screen to NORMAL 2) After get the signal, wait more a second and enter the Ez-Adjust with press ADJ key of Service remocon. After then select 3.ADC 480i Comp1 with navigator button and press Enter. It is automatically adjustment. 3) You can see ADC Component1 Success message after Adjustment success. 4) Error Messages: When its adjustment is not correct, ADC Component1 480i Fail message displayed. If component is not connection Component1 Not Connected, its format is not 480i then Not Valid Format, its signal dont out then Check Signal Status message displayed. These messages will be displayed just a second. (2) ADC 1080p Component1 / RGB adjustment - Check connection both of Component1 and RGB - MSPG-925FA -> Model: 225, Pattern:65 1) Set Component 1080p mode and 100% Horizontal Color Bar Pattern(HozTV31Bar), then set TV set to Component1 mode and its screen to NORMAL 2) If adjustment is correctly finished, ADC Component1 Success message will be displayed. But adjustment is not correctly finished, ADC Component1 1080p Fail message will be displayed. 3) After adjustment Component1 mode, move to RGB-DTV mode automatically and RGB adjustment start. After RGB Adjustment successfully finished, ADC RGB 1080P Success message will be displayed. 4) If Adjustment doesnt success, check conditions all of the adjustment condition and adjustment again. See Error Messages sentence. 5) After adjustment finished, press ADJ key and exit from Adjustment mode.
* See ADC Adjstment RS-232C Protocol_Ver1.0 O Necessary items before Adjustmment items - Pattern Generator : MSPG-925FA - Adjust 480i Comp1 (MSPG-925A : model-209, pattern-65) - Adjust 1080p Comp1/RGB (MSPG-925FA : Model-225, pattern-65) * If you want more information then see the below Adjsutment method(Factory Adjustment)
O
Adjustment sequence - ad 00 00 : Enter the ADC Adjustment mode. - kb 00 04 : Change the mode to Component(No actions) - ad 00 10 : Adjust 480i Comp1. (Change the mode and adjustment action) - kb 00 06 : Change to RGB-DTV mode(No action) - ad 00 10 : Adjust 1080p Comp1/RGB. (Change the mode and adjustment action) - ad 00 90 : End of the adjustment.
* Factory Adjustment
5. Auto Adjust Component 480i/1080p RGB 1080p

5-2. Summary
- Adjustment component 480i/1080i and RGB 1080p is Gain and Black level setting at Analog to Digital converter, and compensate the RGB deviation
5-3. Using in strument

- Adjustment remocon, 801GF(802B, 802F, 802R) or MSPG925FA pattern generator.(It can output 480i/1080i horizontal 100% color bar pattern signal, and its output level must setting 0.7V0.1V p-p correctly) * You must make it sure its resolution and pattern cause every instrument can have different setting.
- 15 -
6. EDID (The Extended Display Identification Data)/ DDC (Display Data Channel) Download.
6-1. Summary
(1) It is established in VESA, for communication between PC and Monitor without order from user for building user condition. It helps to make easily use realize Plug and Play function. (2) For EDID data write, we use DDC2B protocol.
(2) HDMI-2 EDID table
6-2. Write HDMI EDID data

(1) Using instruments 1) Jig.(PC Serial to D-Sub connection) for PC, DDC adjustment. 2) S/W for DDC recording (EDID data write and read) 3) D-sub jack 4) Additional HDMI cable connection Jig. (2) Preparing and setting. 1) Set instruments and Jig. Like pic.5), then turn on PC and Jig. 2) Operate DDC write S/W (EDID write & read) 3) It will operate in the DOS mode.
LCD TV SET (or Digital Board)
<Fig.4> For write EDID data, setting Jig and another instruments
6-3. EDID data (Model name = LG TV)

(4) Analog(RGB) EDID table
* See Working Guide if you want more information about EDID communication.
- 16 -
7. Adjustment Color Temperature (White Balance)

7-1. Using Instrucments
(1) Color Analyzer: CA-210 (CH 9) - Using LCD color temperature, Color Analyzer (CA-210) must use CH 9, which Matrix compensated (White, Red, Green, Blue compensation) with CS-2100. See the Coordination bellowed one. (2) Auto-adjustment Equipment (It needs when Autoadjustment - It is availed communicate with RS-232C : Baud rate: 115200) (3) Video Signal Generator MSPG-925F 720p, 216Gray (Model: 217, Pattern 78)
RS-232C Command(Commonly apply)

Meaning Start white balance adjustment Start Gain adjustment(Internal white pattern) End Gain adjustment Start Offset adjustment (Internal white pattern) End Offset adjustment End white Balance adjustment (Internal pattern disappear)
RS-232C Command [CMD wb wb wb wb wb wb ID 00 00 00 00 00 00 DATA] 00 10 1f 20 2f ff
7-2. Connection Diagram(Auto Adjusment)

(1) Using Inner Pattern
- Wb 00 00 Start Auto-adjustment of white balance - Wb 00 10 Start Gain adjustment (Inner pattern) - Jb 00 c0 - - Wb 00 1f End of Adjustment * If it needs, offset adjustment(wb 00 20-Start, wb 00 2f-End) - Wb 00 ff End of white balance adjustment (Inner pattern disappear) * Notice! Adjustment Mapping information. RS-232C COMMAND CENTER Min (DEFAULT) Cool 00 00 00 184 187 192 64 64 64 Mid 192 183 161 64 64 64 Warm 192 159 95 64 64 64 192 192 192 127 127 127 Max
Full White Pattern (Inner pattern)
Color Analyer
RS-232C
[CMD ID DATA] Cool Mid ja jb jc Warm jd je jf
(2) Using HDMI input

Color Analyer
R Gain G Gain B Gain

MSPG-925FS Video ideo Signal Generator Model : 217 Pattern : 78
jg jh ji
216Gray White Pattern (HDMI Pattern)
R Cut G Cut B Cut
RS-232C Baud Rate : 1 115200 15200
<Fig. 5> Connection diagram for Adjusment White balance
7-2. White Balance Adjusment

(1) If you cant adjust with inner pattern, then you can adjust it using HDMI pattern. You can select option at Ez-Adjust Menu - 7. White Balance there items NONE, INNER, HDMI. It is normally setting at inner basically. If you cant adjust using inner pattern you can select HDMI item, and you can adjust. (2) In manual Adjust case, if you press ADJ button of service remocon, and enter Ez-Adjust Menu - 7. White Balance, then automatically inner pattern operates. (In case of Inner originally Inner will be selected. 1) Connect all cables and equipments like Pic.5) 2) Set Baud Rate of RS-232C to 115200. It may set 115200 orignally. 3) Connect RS-232C cable to set 4) Connect HDMI cable to set 5) Select LA75A Chassis at Adjustment equipment, and adjust.
- When Color temperature (White balance) Adjustment. (Automatically) 1) Press Power only key of service remocon and operatie automatically adjustment. 2) Set BaudRate to 115200. - You must start wb 00 00 and finish it wb 00 ff. - If it needs, then adjustment Offset.
- 17 -
7-3. White Balance Adjusment (Manual adjustment)

(1) Test Equipment: CA-210 1) Using LCD color temperature, Color Analyzer (CA-210) must use CH 9, which Matrix compensated (White, Red, Green, Blue compensation) with CS-2100. See the Coordination bellowed one. (2) Manual adjustment sequence is like bellowed one. 1) Turn to Ez-Adjust mode with press ADJ button of service remocon. 2) Select 10.Test Pattern with CH+/- button and press enter. Then set will go on Heat-run mode. Over 30 minutes set let on Heat-run mode. 3) Let CA-210 to zero calibration and must has gap more 10cm from center of LCD module when adjustment. 4) Press ADJ button of service remocon and select 7.White-Balance in Ez-Adjust then press G button of navigation key. (When press G button then set will go to full white mode) 5) Adjust at three mode (Cool, Medium, Warm) 6) If Medium and Warm mode. - Let R-Gain to 192 and R, G, B-Cut to 64 and then control G, B gain adjustment High Light adjustment. 7) With volume button (+/-) you can adjust. 8) After all adjustment finished, with Enter ( A key) turn to Ez-Adjust mode. Then with ADJ button, exit from adjustment mode. (3) Using CS-1000 Equipment. Color Temperature COOL MEDIUM WARM Remark T=11000K, uv=0.000, X=0.276, Y=0.283 T= 9300K, uv=0.000, X=0.285, Y=0.293 T= 6500K, uv=0.000, X=0.313, Y=0.329
8. GND and ESD Testing

8-1. Prepare GND and ESD Testing
- Check the connection between set and power cord.
8-2. Operate GND and ESD auto-test

(1) Fully connectd(Between set and power cord) set enter the Auto-test sequence. (2) Connect D-Jack AV jack test equipment. (3) Turn on Auto-controller(GWS103-4) (4) Start Auto GND test. (5) If its result is NG, then notice with buzzer. (6) If its result is OK, then automatically it turns to ESD Test. (7) Operate ESD test (8) If its result is NG, then notice with buzzer. (9) If its result is OK, then process next steps. Notice it with Good lamp and STOPER Down.
8-3. Check Items

(1) TEst Voltage 1) GND : 1.5KV/min at 100mA 2) Signal : 3KV/min at 100mA (2) Test time : just 1 second. (3) Test point 1) GND test: Test between Power cord GND and Signal cable metal GND. 2) ESD test: Test between Power cord GND and Live and neutral. (4) Leakage current: Set to 0.5mA(rms)
(4) Using CS-210 Equipment.(9CH) - Contrast value : 216Gray Color temperature Color analyzer Color coordinate X COOL MEDIUM WARM CA-210 CA-210 CA-210 0.2760.002 0.2850.002 0.3130.002 Y 0.2830.002 0.2930.002 0.3290.002
7-4. Test of RS-232C control

- Press In-Start button of Service Remocon then set the 4.Baud Rate to 115200. Then check RS-232C control.
7-5. Selection of Country option

- Selection of country option is allowed only North American model (Not allowed Korean model). It is selection of Country about Rating and Time Zone. (1) Models: All models which use LA75A Chassis (See the first page.) (2) Press In-Start button of Service Remocon, then enter the Option Menu with PIP CH- Button. (3) Select one of these three (USA, CANADA, MEXICO) defends on its market using Vol. +/- button.
- 18 -
9. Default Service option
10. Default Service option

No 1 Input Mode 2 Volume Level 3 Mute 4 Aspect Ratio 5 Picture Picture Mode User1 Contrast Bright Sharpness Back Light Item TV02CH 10 Off 16:9 Vivid 100 100 50 70 70 0 Medium Condition
9-1. ADC-Set
(1) R-Gain adjustment Value (default 128) (2) G-Gain adjustment Value (default 128) (3) B-Gain adjustment Value (default 128) (4) R-Offset adjustment Value (default 64 ) (5) G-Offset adjustment Value (default 64 ) (6) B-Offset adjustment Value (default 64 )
Color Tint Color Temperature Picture Reset 6 Audio Sound Mode Auto Volume Clear Voice
Standard Off Off Off 0 On Auto Off
9-2. White balance. Value

CENTER(DEFAULT) Max Cool R Gain G Gain B Gain R Cut G Cut B Cut 184 189 192 64 64 64 Mid 192 184 161 64 64 64 Warm 192 150 84 64 64 64 192 192 192 127 127 127
7 Time
Front Surrround Balance TV Speaker Clock Off Timer / On Timer Sleep Timer / Auto Off
8 Option Language(Menu/Audio) Portugues SimpLink On Off Off 1 RF : 2,3,4,5,6,7,8,9,10,11, 12,13,14,30,51,63 CATV : 15,16,17
9-3. Temperature Threshold

(1) Threshold Down Low (2) Threshold Up Low (3) Threshold Down High (4) Threshold Down High 20 23 70 75
Key Lock Caption Set ID 9 Channel Memory
- 19 -
NVRAM
I2C
24C16
NIM TUNER
KIA7029 74LVC14APW
RF TC90512 Reset 64Bit I/F Serial TP IB0 WXGA(768P) Parse2 RSBUF XCBUF RMX0 DVI
TMDS341A (3x1,S/W)
1. Power-Up Boot Fail
Switch PKT HD/SD Video Encoder
Analog /Digital Tuner
DDR1(128MB) DDR1(128MB) (16Mx16x4) (16Mx16x4) MTV416 (Micom)

Local KEY
1-1. Block Diagram of Troubleshooting
CVBS SIF
Digital out
COMP 1 COMP 2 AV1 AV2 RGB-PC

MC33078
Audio SW NTP3000 (Digital AMP)
HSX Serial TP USB2.0

RX/TX DM1/DP1 DVI
(MPEG4 Decoder) 12bit YC 4:2:2
X-tal(54M)
RS232
4:2:2 20bit YC
EPM240F
DDR1 (64MB)
AV1
CVBS/Y/C
CVBS/Y/C
AV2
Y/Cb/Cr R/G/B
COMP1
Video Front End
Full HD(1080P)
MNT out (Audio Only)

74HC04
COMP2
HD-DVI Dual HDMI Rx
TROUBLESHOOTING
- 20 -
RGB-PC
BCM3553
Audio DSP
HDMI 1/2/3
I2S L/R
MCLK CS5340
20bits TMDS_RX+-
SPDIF Out (Coaxial) SPDIF Out PCI/ EBI
Flash (32MB)
BCM7412
TEA6420
L/R
(AMP)
I2S
1-2. Troubleshooting
Check P800, P801 All Voltage Level (19V, 12V, 6V, 3.3V) Replace Power board
Check Power connector OK ? Y
Y N N Replace IC804 / L805 & Recheck
Check IC804 #2 Pin / L805 Voltage Level 3.3V
Copyright2007 LG Electronics. Inc. All right reserved. Only for training and service purposes N N Replace IC803 or L807 & Recheck Check Micom IC407 Redownload or replace N N Replace IC802 or IC805 & Recheck
Check IC803 #5 Pin / L807 Voltage Level 2.6V
TROUBLESHOOTING
- 21 N Replace X200 N Maybe BCM3553 has troubles.
Check C830, C853, C856 Voltage Level 1.2V
Check X200 Clock 54MHz
Check R154 Clock 33MHz
Replace IC101 Flash Memory
2. No OSD
NVRAM
I2C
24C16
NIM TUNER
KIA7029 74LVC14APW
TMDS341A (3x1,S/W)

Local KEY
CVBS SIF
Digital out

MC33078

RX/TX DM1/DP1 DVI
X-tal(54M)
RS232
4:2:2 20bit YC
EPM240F
DDR1 (64MB)
AV1
CVBS/Y/C
CVBS/Y/C
AV2
Y/Cb/Cr R/G/B
COMP1
Video Front End
Full HD(1080P)

74HC04
COMP2
HD-DVI Dual HDMI Rx
TROUBLESHOOTING
- 22 -
RGB-PC
BCM3553
Audio DSP
HDMI 1/2/3
I2S L/R
MCLK CS5340
20bits TMDS_RX+-
Flash (32MB)
BCM7412
TEA6420
L/R
(AMP)
I2S

Check D901 Pin #1 Voltage Level 12V Replace Power board
Check Power connector Y
Y N Replace L901
Check L901 Voltage Level 12V
Check P903 #33(TXAC-) , #32(TXAC+) , #17(TXBC-) , #16(TXBC+) N Maybe BCM3553 has problems
TROUBLESHOOTING
- 23 N Replace Cable
Check LVDS Cable
Check PDP/LCD Module Control board
NVRAM
I2C
24C16
NIM TUNER
KIA7029 74LVC14APW
3. Digital TV Video
RF TC90512 Reset 64Bit I/F Serial TP IB0 WXGA(768P) PKT
Switch

Local KEY
Digital out
CVBS SIF Parse2 RSBUF XCBUF RMX0 DVI

TMDS341A (3x1,S/W)

MC33078
Audio SW

RX/TX DM1/DP1 DVI
NTP3000 (Digital AMP)
X-tal(54M)
RS232
EPM240F
4:2:2 20bit YC
DDR1 (64MB)
AV1
CVBS/Y/C
CVBS/Y/C
HD/SD Video Encoder Full HD(1080P)
AV2
Y/Cb/Cr R/G/B
COMP1
Video Front End

74HC04
COMP2
HD-DVI Dual HDMI Rx
TROUBLESHOOTING
- 24 -
RGB-PC
BCM3553
Audio DSP
HDMI 1/2/3
I2S L/R
MCLK CS5340
20bits TMDS_RX+-
Flash (32MB)
BCM7412
TEA6420
L/R
(AMP)
I2S
Check RF Cable
3. Digital TV Video
Y Check BCM7412 Input Clock R107 (27MHz) Replace it N
Check Tuner 5V Power IC810 #3 Pin Replace IC810 Y
Y Maybe BCM3553(IC100) has problems
red Bad Tuner. Replace Tuner.
Copyright2007 LG Electronics. Inc. All right reserved. Only for training and service purposes Maybe Tuner(TU800) has problems Maybe BCM3553(IC100) has problems
Check D805 color
None
Check TP Clock, Data, Sync R925 (38.1MHz), R804, R803
TROUBLESHOOTING
- 25 Maybe BCM7412(IC1000) has problems Redownload PLD file or replace
Check BCM3553 Output TP Clock, Data, Sync R153, R155, R152
Check BCM7412 Clock,Hsync, Vsync R1088 ( Typ. 74.25MHz), R1087, R1086
Check PLD Clock, Hsync, Vsync R1102 ( Typ. 74.25MHz), R1100, R1101
NVRAM
I2C
24C16
NIM TUNER
KIA7029 74LVC14APW
4. Analog TV Video
TMDS341A (3x1,S/W)
DDR1(128MB) DDR1(128MB) (16Mx16x4) (16Mx16x4) MTV416 (Micom )

Local KEY
CVBS SIF
Digital out

MC33078
TP RX/TX DM1/DP1 DVI
(MPEG4 Decoder)
12bit YC 4:2:2
X-tal(54M)
RS232
4:2:2 20bit YC
EPM240F
DDR1 (64MB)
AV1
CVBS/Y/C
CVBS/Y/C
AV2
Y/Cb/Cr R/G/B
COMP1
Video Front End
Full HD(1080P)

74HC04
COMP2
HD-DVI Dual HDMI Rx
TROUBLESHOOTING
- 26 -
RGB-PC
BCM3553
Audio DSP
HDMI 1/2/3
I2S L/R
MCLK CS5340
20bits TMDS_RX+-
Flash (32MB)
BCM7412
TEA6420
L/R
(AMP)
I2S
USB2.0
HSX Serial
4. Analog TV Video
Check RF Cable Y N Replace it
Check Tuner 5V Power IC810 #3 Pin Y
Copyright2007 LG Electronics. Inc. All right reserved. Only for training and service purposes N Maybe Tuner(TU800) has problems Y N Replace IC808 or check L800 5V power
Check CVBS signal TU800 #17 Pin
TROUBLESHOOTING
- 27 Y N Replace it Y
Check CVBS signal IC808 #8 Pin
Check CVBS signal C658
Maybe BCM3553(IC100) has problems
NVRAM
I2C
24C16
NIM TUNER
KIA7029 74LVC14APW
TMDS341A (3x1,S/W)
5. Component Video

Local KEY
CVBS SIF
Digital out

MC33078

RX/TX DM1/DP1 DVI
X-tal(54M)
RS232
4:2:2 20bit YC
EPM240F
DDR1 (64MB)
AV1
CVBS/Y/C
CVBS/Y/C
AV2
Y/Cb/Cr R/G/B
COMP1
Video Front End
Full HD(1080P)

74HC04
COMP2
HD-DVI Dual HDMI Rx
TROUBLESHOOTING
- 28 -
RGB-PC
BCM3553
Audio DSP
HDMI 1/2/3
I2S L/R
MCLK CS5340
20bits TMDS_RX+-
Flash (32MB)
BCM7412
TEA6420
L/R
(AMP)
I2S
5. Component Video
Check signal format Is it supported? Y
Check Component Cable Y N Replace connector
Copyright2007 LG Electronics. Inc. All right reserved. Only for training and service purposes Y N Replace it.
Check J700 / J702
TROUBLESHOOTING
- 29 Y N Replace it Y
Check signal L700, L701. L702 / L704, L705, L706
Check signal C638, C639, C640 / C628, C629, C630
6. RGB Video
NVRAM
I2C
24C16
NIM TUNER
KIA7029 74LVC14APW
RF TC90512 Reset 64Bit I/F Serial TP IB0 WXGA(768P) PKT
Switch

Local KEY
6.1 Block Diagram of Troubleshooting
Digital out
CVBS SIF Parse2 RSBUF XCBUF RMX0 DVI

TMDS341A (3x1,S/W)

MC33078

RX/TX DM1/DP1 DVI
X-tal(54M)
RS232
4:2:2 20bit YC
EPM240F
DDR1 (64MB)
AV1
CVBS/Y/C
CVBS/Y/C
HD/SD Video Encoder Full HD(1080P)
AV2
Y/Cb/Cr R/G/B
COMP1
Video Front End

74HC04
COMP2
HD-DVI Dual HDMI Rx
TROUBLESHOOTING
- 30 -
RGB-PC
BCM3553
Audio DSP
HDMI 1/2/3
I2S L/R
MCLK CS5340
20bits TMDS_RX+-
Flash (32MB)
BCM7412
TEA6420
L/R
(AMP)
I2S
6. RGB Video
Check signal format Is it supported?
6.2 Troubleshooting
Check RGB Cable
Y N Replace connector
Check P701
Copyright2007 LG Electronics. Inc. All right reserved. Only for training and service purposes N Replace it. N Replace it
Check signal,Hsync , Vsync C745, C746, C747, R839, R843
TROUBLESHOOTING
- 31 N N Replace it
Check signal R727, R714, R729
Check L708 Voltage Level 9V
Replace L708 / Q701 / Q702 / Q703
Check Signal C635, C636, C637
7. AV Video
NVRAM
I2C
24C16
NIM TUNER
KIA7029 74LVC14APW
TMDS341A (3x1,S/W)

Local KEY
CVBS SIF
Digital out

MC33078

RX/TX DM1/DP1 DVI
X-tal(54M)
RS232
4:2:2 20bit YC
EPM240F
DDR1 (64MB)
AV1
CVBS/Y/C
CVBS/Y/C
AV2
Y/Cb/Cr R/G/B
COMP1
Video Front End
Full HD(1080P)

74HC04
COMP2
HD-DVI Dual HDMI Rx
TROUBLESHOOTING
- 32 -
RGB-PC
BCM3553
Audio DSP
HDMI 1/2/3
I2S L/R
MCLK CS5340
20bits TMDS_RX+-
Flash (32MB)
BCM7412
TEA6420
L/R
(AMP)
I2S
7. AV Video
Check signal format Is it supported? Y
Check AV Cable / S-Video Cable Y N
Copyright2007 LG Electronics. Inc. All right reserved. Only for training and service purposes Replace connector Y N Replace it. Y N
Check J701 (Rear) Check P700 & Cable (Side)
TROUBLESHOOTING
- 33 Y
Check signal R755 (Composite), R814 / R815 (S-Video) (Rear) R855 (Composite), R856 / R857 (S-Video) (Side)
Check signal C651 (Composite), C648 / C649 (S-Video) (Rear) C652 (Composite), C659 / C660 (S-Video) (Rear)
Replace it
NVRAM
I2C
24C16
8. HDMI Video
NIM TUNER
KIA7029 74LVC14APW
TMDS341A (3x1,S/W)

Local KEY
CVBS SIF
Digital out

MC33078

RX/TX DM1/DP1 DVI
X-tal(54M)
RS232
4:2:2 20bit YC
EPM240F
DDR1 (64MB)
AV1
CVBS/Y/C
CVBS/Y/C
AV2
Y/Cb/Cr R/G/B
COMP1
Video Front End
Full HD(1080P)

74HC04
COMP2
HD-DVI Dual HDMI Rx
TROUBLESHOOTING
- 34 -
RGB-PC
BCM3553
Audio DSP
HDMI 1/2/3
I2S L/R
MCLK CS5340
20bits TMDS_RX+-
Flash (32MB)
BCM7412
TEA6420
L/R
(AMP)
I2S
8. HDMI Video
Check signal format Is it supported?
Check HDMI Cable
Y N Replace connector
Check J600 / J601 / J602
Copyright2007 LG Electronics. Inc. All right reserved. Only for training and service purposes N Replace it N Replace it
Check IC809 #2 Pin Voltage Level 3.3V
TROUBLESHOOTING
- 35 N Replace it orredownload N Replace it N Replace it
Check L607 Voltage Level 3.3V
Check EDID NVRAM (IC602, 603, 604) Power & I2C Signal (#5, #6)
Check HDCP Key NVRAM (IC102) Power & I2C Signal (#5, #6)
Check IC601 Clock Signal #26, #27
NVRAM
I2C
24C16
NIM TUNER
KIA7029 74LVC14APW
9. All Source Audio
RF TC90512 Reset 64Bit I/F IB0 WXGA(768P) Parse2 RSBUF XCBUF RMX0 DVI
TMDS341A (3x1,S/W)

Local KEY
Serial TP CVBS SIF
Digital out

MC33078
(MPEG4 Decoder)
12bit YC 4:2:2
X-tal(54M)
RS232
EPM240F
4:2:2 20bit YC
DDR1 (64MB)
AV1
CVBS/Y/C
CVBS/Y/C
AV2
Y/Cb/Cr R/G/B
COMP1
Video Front End
Full HD(1080P)

74HC04
COMP2
HD-DVI Dual HDMI Rx
TROUBLESHOOTING
- 36 -
RGB-PC
BCM3553
Audio DSP
HDMI 1/2/3
I2S L/R
MCLK CS5340
20bits TMDS_RX+-
Flash (32MB)
BCM7412
TEA6420
L/R
(AMP)
I2S
USB2.0
HSX Serial
Make sure you can t hear any audio Y N Replace it.
9. All Source Video

Check BCM3553 I2S Output R627, R628, R629 Y N Replace L
Check IC501 Power 19V, 3.3V, 1.8V L500, L501, L502, L503 Y
Copyright2007 LG Electronics. Inc. All right reserved. Only for training and service purposes Check Signal L504, L505 N Replace it. Y N Replace it
TROUBLESHOOTING
- 37 Y N Check Connector P500 Y N Check speaker Y
Check Signal L508, L509, L510, L511
Replace connector
Replace speaker
Maybe NTP3000 has problems. Replace it
NVRAM
I2C
24C16
NIM TUNER
KIA7029 74LVC14APW
10. Digital TV Audio
TMDS341A (3x1,S/W)

Local KEY
CVBS SIF
Digital out

MC33078

RX/TX DM1/DP1 DVI
X-tal(54M)
RS232
4:2:2 20bit YC
EPM240F
DDR1 (64MB)
AV1
CVBS/Y/C
CVBS/Y/C
AV2
Y/Cb/Cr R/G/B
COMP1
Video Front End
Full HD(1080P)

74HC04
COMP2
HD-DVI Dual HDMI Rx
TROUBLESHOOTING
- 38 -
RGB-PC
BCM3553
Audio DSP
HDMI 1/2/3
I2S L/R
MCLK CS5340
20bits TMDS_RX+-
Flash (32MB)
BCM7412
TEA6420
L/R
(AMP)
I2S
TROUBLESHOOTING
10. Digital TV Audio
Follow procedure All source audio trouble shooting
Check video output
Maybe BCM3553 internal audio DSP has problems. Replace it
Follow procedure digital TV video trouble shooting
- 39 -
NVRAM
I2C
24C16
NIM TUNER
KIA7029 74LVC14APW
11. Analog TV Audio
RF TC90512 Reset 64Bit I/F IB0 WXGA(768P) Parse2 RSBUF XCBUF RMX0 DVI
TMDS341A (3x1,S/W)

Local KEY
Serial TP CVBS SIF
Digital out

MC33078

RX/TX DM1/DP1 DVI
X-tal(54M)
RS232
4:2:2 20bit YC
EPM240F
DDR1 (64MB)
AV1
CVBS/Y/C
CVBS/Y/C
AV2
Y/Cb/Cr R/G/B
COMP1
Video Front End
Full HD(1080P)

74HC04
COMP2
HD-DVI Dual HDMI Rx
TROUBLESHOOTING
- 40 -
RGB-PC
BCM3553
Audio DSP
HDMI 1/2/3
I2S L/R
MCLK CS5340
20bits TMDS_RX+-
Flash (32MB)
BCM7412
TEA6420
L/R
(AMP)
I2S
Check video output
Follow procedure analog TV video trouble shooting
11. Analog TV Video
Check L801 voltage level 5V
N Replace it
Check SIF signal C801 / C806 / Q800 N Replace it
Copyright2007 LG Electronics. Inc. All right reserved. Only for training and service purposes N Replace it
Check SIF signal R726 / C665
TROUBLESHOOTING
- 41 N
Maybe BCM3553 audio block has problems. Replace it
NVRAM
I2C
24C16
NIM TUNER
KIA7029 74LVC14APW
TMDS341A (3x1,S/W)
12. Component / RGB / AV Audio

Local KEY
CVBS SIF
Digital out

MC33078
(MPEG4 Decoder)
12bit YC 4:2:2
X-tal(54M)
RS232
4:2:2 20bit YC
EPM240F
DDR1 (64MB)
AV1
CVBS/Y/C
CVBS/Y/C
AV2
Y/Cb/Cr R/G/B
COMP1
Video Front End
Full HD(1080P)

74HC04
COMP2
HD-DVI Dual HDMI Rx
TROUBLESHOOTING
- 42 -
RGB-PC
BCM3553
Audio DSP
HDMI 1/2/3
I2S L/R
MCLK CS5340
20bits TMDS_RX+-
Flash (32MB)
BCM7412
TEA6420
L/R
(AMP)
I2S
USB2.0
HSX Serial
Check video output Check signal C554 / R569 / R581 / C562 N Replace it or IC503 Y N Replace connector Check IC502 power L514 voltage level 3.3V & L515 voltage level 5V N Y N Replace it
Follow procedure external input video trouble shooting
12. Component / RGB / AV Audio
Check Connector J700 / J702 (Component) J703 (RGB) J701 / P700 & cable (AV Rear, AV Side)
Copyright2007 LG Electronics. Inc. All right reserved. Only for training and service purposes N Replace it Y N Check IC502 power L514 voltage level 3.3V & L515 voltage level 5V Replace it Check I2S signal R548 / R549 / R550 N Replace it Y N Replace it or IC502
Check signal C734 / R746 / C735 / R752 (Component1) C736 / R829 / C737 / R833 (Component2) C733 / R837 / C732 / R838 (RGB) C701 / R816 / C700 / R817 (AV Rear) C729 / R858 / C728 / R859 (AV Side)
TROUBLESHOOTING
- 43 Check Audio clock R134 N Replace it or IC500 Y Maybe BCM3553 has problems N Replace it
Check IC500 power L512 voltage level 9V
Replace it
Check signal R532 / R533 / C555 / R568 / C563 / R582
Check IC503 power L513 voltage level 9V
NVRAM
I2C
24C16
13. HDMI Audiol
NIM TUNER
KIA7029 74LVC14APW
TMDS341A (3x1,S/W)

Local KEY
13-1 Block Diagram of Troubleshooting
CVBS SIF
Digital out

MC33078
(MPEG4 Decoder)
12bit YC 4:2:2
X-tal(54M)
RS232
4:2:2 20bit YC
EPM240F
DDR1 (64MB)
AV1
CVBS/Y/C
CVBS/Y/C
AV2
Y/Cb/Cr R/G/B
COMP1
Video Front End
Full HD(1080P)

74HC04
COMP2
HD-DVI Dual HDMI Rx
TROUBLESHOOTING
- 44 -
RGB-PC
BCM3553
Audio DSP
HDMI 1/2/3
I2S L/R
MCLK CS5340
20bits TMDS_RX+-
Flash (32MB)
BCM7412
TEA6420
L/R
(AMP)
I2S
USB2.0
HSX Serial
13. HDMI Audio
Check video output Y N Replace it orredownload
Follow procedure HDMI video trouble shooting
Check EDID NVRAM (IC602, 603, 604) Power & I2C Signal (#5, #6) Y
Copyright2007 LG Electronics. Inc. All right reserved. Only for training and service purposes N Maybe BCM3553 audio block has problems. Replace it
TROUBLESHOOTING
- 45 -
14. USB
NVRAM
I2C
24C16
NIM TUNER
KIA7029 74LVC14APW
TMDS341A (3x1,S/W)

Local KEY
CVBS SIF
Digital out

MC33078
(MPEG4 Decoder)
12bit YC 4:2:2
X-tal(54M)
RS232
4:2:2 20bit YC
EPM240F
DDR1 (64MB)
AV1
CVBS/Y/C
CVBS/Y/C
AV2
Y/Cb/Cr R/G/B
COMP1
Video Front End
Full HD(1080P)

74HC04
COMP2
HD-DVI Dual HDMI Rx
TROUBLESHOOTING
- 46 -
RGB-PC
BCM3553
Audio DSP
HDMI 1/2/3
I2S L/R
MCLK CS5340
20bits TMDS_RX+-
Flash (32MB)
BCM7412
TEA6420
L/R
(AMP)
I2S
USB2.0
HSX Serial
14. USB
Check USB 2.0 Cable Y
Check USB Device If device is 2.5 inch HDD, check power adaptor Y N Replace it
Check P201 Y
Copyright2007 LG Electronics. Inc. All right reserved. Only for training and service purposes N Replace it or IC202 Y
Check L205 voltage level 5V
TROUBLESHOOTING
- 47 -
Maybe BCM3553 has problems
Exception
- USB power could be disabled by inrushing current
- In this case, remove the device and try to reboot the TV (AC power off/on)
NVRAM
I2C
24C16
NIM TUNER
KIA7029 74LVC14APW
TMDS341A (3x1,S/W)

Local KEY
CVBS SIF
Digital out

MC33078
Audio SW

RX/TX DM1/DP1 DVI
NTP3000 (Digital AMP)
X-tal(54M)
RS232
4:2:2 20bit YC
EPM240F
DDR1 (64MB)
AV1
CVBS/Y/C
CVBS/Y/C
AV2
Y/Cb/Cr R/G/B
COMP1
Video Front End
Full HD(1080P)

74HC04
COMP2
HD-DVI Dual HDMI Rx
BLOCK DIAGRAM
- 48 -
RGB-PC
BCM3553
Audio DSP
HDMI 1/2/3
I2S L/R
MCLK CS5340
20bits TMDS_RX+-
Flash (32MB)
BCM7412
TEA6420
L/R
(AMP)
I2S
Reset Design I2C Design

Active High BCM7412 NIM TUNER (0xC2, 0x30) Active Low BCM3553 Audio Switch (0x9A) 3.3V HDCP Key EEPROM (0xA8) NVRAM (0xA6) Audio AMP (0x54) CH 1 5V CH 0 3.3V
Active Low
Power-on Reset
Not Gate
Flash BCM3553 CH 2 Tuner CH 3 Micom (0x50) 3.3V
PLD
BLOCK DIAGRAM
- 49 BCM3553 BCM7412 BCM7412
Clock Design
Main Clock
54M Crystal
33MHz
27MHz Clock is Recovered From The STC Values
BCM3553
VCXO 27M
Power-Up Sequence
BCM3553
- A Controlled power-up sequence is necessary to establish the two core voltages before the pad voltage is applied
BLOCK DIAGRAM
- 50 D3.3V, D1.2V.jpg
BCM7412
- Recommends the following power-up sequence: 1.2V -> 2.5V -> 3.3V - Recommends no more than 5ms between different supplies All Voltages should regulate at their nominal output voltages no later than 10ms
So, Power-up is Controlled by Micom
- These 3 voltages should ramp up within 20ms total in any order, no sequence required, supplying - 1.2V/2.6V/3.3V simultaneously is meet our requirement too.
Power-Up Sequence
1) Power Sequence measurement waveform
D1.2_BCM
D2.6_BCM
D3.3_BCM
BCM_Reset
BLOCK DIAGRAM
- 51 -
2) Result
- Initially 1.2V, 2.6V, 3.3V ramp up in 10ms.(Spec. : within 20ms)
- Actually Reset time is approximately 100ms(considering the variation of R, C) after power on.(Spec. : after 75ms)
GPIO Structure
Direction Input Input Input Input Output Output Output Input Input Input Input Reserved Input Input Output Output Output Reserved Reserved Reserved Reserved Input Input Input S-Video 2 Auto Detect RGB Auto Detect Board Revision 2 RF Switch Control HDMI Source 1 Select HDMI Source 0 Select Composite 1 Auto Detect Composite 2 Auto Detect Board Revision 1 Board Revision 0 Component 2 Auto Detect Component 1 Auto Detect HDMI 2 Hot Plug Detect HDMI 1 Hot Plug Detect HDMI 0 Hot Plug Detect HDMI 2 Power Detect HDMI 1 Power Detect HDMI 0 Power Detect S-Video 1 Auto Detect Description
GPIO
Signal Name
S-VIDEO1_SW
HDMI_POWER_0
HDMI_POWER_1
HDMI_POWER_2
HDMI_HPD_0
10
HDMI_HPD_1
11
HDMI_HPD_2
14
COMP1_SW
15
COMP2_SW
16
REV_SEL0
BLOCK DIAGRAM
- 52 -
17
REV_SEL1
23
24
COMPOSITE2_SW
26
COMPOSITE1_SW
29
HDMI_SEL_0
30
HDMI_SEL_1
31
RF_SWITCH_CTRL
38
39
40
41
55
S-VIDEO2_SW
56
RGB_SW
62
REV_SEL2
MEMO
- 53 -
EXPLODED VIEW
520
400
814
810
530
540
815
813
816
817
811
550
910
200
120
812
300
121
120
- 54 -
500
510
900
+19.0 V +19.0 V
R541 3 .3
BCM PO , USB
C534 470p F R545 10 C535 470p F R551 10 L504 DA-8580
R560 4.7K
A1.2V
IC100 BCM355 3
D3.3 V
A10
READ Y 10K R206
A2.6V
HB-1M1608-102J T L204 L207 HB-1M1608-102J T 1K R217 1K R213 1K R216
PWM_MOD/AMP
GND_ 1 GND_ 2 GND_ 3 GND_ 4 GND_ 5 GND_ 6 GND_ 7 GND_ 8 GND_ 9 GND_1 0 GND_1 1 GND_1 2 GND_1 3 GND_1 4 GND_1 5 GND_1 6 GND_1 7 GND_1 8 GND_1 9 GND_2 0 GND_2 1 GND_2 2 GND_2 3 GND_2 4 GND_2 5 GND_2 6 GND_2 7 GND_2 8 GND_2 9 GND_3 0 GND_3 1 GND_3 2 GND_3 3 GND_3 4 GND_3 5 GND_3 6 GND_3 7 GND_3 8 GND_3 9 GND_4 0 GND_4 1 GND_4 2 GND_4 3 GND_4 4 GND_4 5 GND_4 6 GND_4 7 GND_4 8 GND_4 9 GND_5 0 GND_5 1 GND_5 2 GND_5 3 GND_5 4 GND_5 5 GND_5 6 GND_5 7 GND_5 8 GND_5 9 GND_6 0 GND_6 1 GND_6 2 GND_6 3 GND_6 4 GND_6 5 GND_6 6 GND_6 7 GND_6 8 GND_6 9 GND_7 0 GND_7 1 GND_7 2 GND_7 3 GND_7 4 GND_7 5 GND_7 6 GND_7 7 GND_7 8 GND_7 9 GND_8 0 GND_8 1 GND_8 2 GND_8 3 GND_8 4 GND_8 5 GND_8 6 GND_8 7 GND_8 8 GND_8 9 GND_9 0 GND_9 1 GND_9 2 GND_9 3 GND_9 4 GND_9 5 GND_9 6 GND_9 7 GND_9 8 GND_9 9 GND_10 0 GND_10 1 GND_10 2 GND_10 3 GND_10 4 GND_10 5 GND_10 6 GND_10 7
GND_10 8 GND_10 9 GND_11 0 GND_11 1 GND_11 2 GND_11 3 GND_11 4 GND_11 5 GND_11 6 GND_11 7 GND_11 8 GND_11 9 GND_12 0 GND_12 1 GND_12 2 GND_12 3 GND_12 4 GND_12 5 GND_12 6 GND_12 7 GND_12 8 GND_12 9 GND_13 0 GND_13 1 GND_13 2 GND_13 3 GND_13 4 GND_13 5 GND_13 6 GND_13 7 GND_13 8 GND_13 9 GND_14 0 GND_14 1 GND_14 2 GND_14 3 GND_14 4 GND_14 5 GND_14 6 GND_14 7 GND_14 8 GND_14 9 GND_15 0 GND_15 1 GND_15 2 GND_15 3 GND_15 4 GND_15 5 GND_15 6 GND_15 7 GND_15 8 GND_15 9 GND_16 0 GND_16 1 GND_16 2 GND_16 3 GND_16 4 GND_16 5 GND_16 6 GND_16 7 GND_16 8 GND_16 9 GND_17 0 GND_17 1 GND_17 2 GND_17 3 GND_17 4 GND_17 5 GND_17 6 GND_17 7 GND_17 8 GND_17 9 GND_18 0 GND_18 1 GND_18 2 GND_18 3 GND_18 4 GND_18 5 GND_18 6 GND_18 7 GND_18 8 GND_18 9 GND_19 0 GND_19 1 GND_19 2 GND_19 3 GND_19 4 GND_19 5 GND_19 6 GND_19 7 GND_19 8 GND_19 9 GND_20 0 GND_20 1 GND_20 2 GND_20 3 GND_20 4 GND_20 5 GND_20 6 GND_20 7 GND_20 8 GND_20 9 GND_21 0 GND_21 1 GND_21 2 GND_21 3 GND_21 4
W18 W19 W20 W21 W26 W34 Y8 Y9 Y14 Y15 Y16 Y17 Y18 Y19 Y20 Y21 Y26 AA8 AA9 AA14 AA15 AA16 AA17 AA18 AA19 AA20 AA21 AB1 AB6 AB8 AB14 AB15 AB16 AB17 AB18 AB19 AB20 AB21 AB34 AC3 AC4 AC5 AC14 AC15 AC16 AC17 AC18 AC19 AC20 AC21 AC26 AD2 AD3 AD26 AD27 AD28 AE7 AE8 AE27 AE28 AE29 AE34 AF7 AF9 AF15 AF16 AF17 AF18 AF19 AF20 AF21 AF22 AF23 AF31 AF32 AG9 AG10 AG11 AG12 AG13 AG14 AG15 AG16 AG17 AG18 AG19 AG20 AG21 AG22 AG24 AG25 AG26 AG29 AG31 AH15 AH25 AH26 AH27 AH30 AJ13 AK28 AK30 AL20 AN30 AN33 AN34 AP10
C517 C513 330u F 0 . 1 uF
LEFT
HB-1M1608-102J T L508 1F C539 0 . 1 uF C543 0 . 4 7 uF C547 0 . 0 1 uF R564 3 .3 L509 HB-1M1608-102J T JP50 6 R562 3 .3 JP50 5
D3.3 V
P20 0 SMW250-0 4
IC504 TC74VHC04F T C575 0 . 1 uF
+5.0V
P20 2 YFDW254-14 S
A13 A16 A19 A22 A25
C520 0 . 0 1 uF
RIGHT
B4 BCM3553_J TAG_TRS Tb
1 3 5 7 9 11 13
2 4 6 8 10 12 14 M12 M13 M14 M15 M16 VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8 VDDC_9 VDDC_1 0 VDDC_1 1 VDDC_1 2 VDDC_1 3 VDDC_1 4 VDDC_1 5 VDDC_1 6 VDDC_1 7 VDDC_1 8 VDDC_1 9 VDDC_2 0 VDDC_2 1 VDDC_2 2 VDDC_2 3 VDDC_2 4 VDDC_2 5 VDDC_2 6 VDDC_2 7 VDDC_2 8 VDDC_2 9 VDDC_3 0 VDDC_3 1 VDDC_3 2 VDDC_3 3 VDDC_3 4 VDDC_3 5 VDDC_3 6 VDDC_3 7 VDDC_3 8 VDDC_3 9 VDDC_4 0 VDDC_4 1 VDDC_4 2 VDDC_4 3 VDDC_4 4 VDDC_4 5 VDDC_4 6 VDDC_4 7 VDDC_4 8 VDDC_4 9 VDDC_5 0 VDDC_5 1 VDDC_5 2 VDDC_5 3 VDDC_5 4 VDDC_5 5 VDDC_5 6 VDDC_5 7 VDDC_5 8 VDDC_5 9 VDDC_6 0 VDDC_6 1 VDDC_6 2 VDDC_6 3 VDDC_6 4 VDDO_1 VDDO_2 VDDO_3 VDDO_4 VDDO_5 VDDO_6 VDDO_7 VDDO_8 VDDO_9 VDDO_1 0 VDDO_1 1 VDDO_1 2 VDDO_1 3 VDDO_1 4 VDDO_1 5 VDDO_1 6 VDDO_1 7 VDDO_1 8 VDDO_1 9 VDDO_2 0 VDDO_2 1 VDDO_2 2 VDDO_2 3 VDDO_2 4 VDDO_2 5 VDDO_2 6 VDDP_ 1 VDDP_ 2 VDDP_ 3 VDDP_ 4 VDDP_ 5 AGC_ VDDO1 D1.2V
D3.3 V
L502 HB-1M1608-102J T C507 0 . 1 uF
JP20 3 1 JP20 0
R202 1.5K
R201 1.5K
C514 0 . 1 uF
0 . 1 uF C518
1S
C200 4 . 7 uF
IC100 BCM355 3
T3 U4 U2 V2 V4 V3 U3 U5 U6 V5 T2 V6 V7 R2 R3 AB2 AA7 AB3 AA6 AA3 AA2 AA5 AA4 W5 W2 W4 W3 Y3 W6 Y2 Y4 R4 R7 P2 P5 N2 P4 P6
B4 B4 B4 B4 4:A7
BCM3553_JTAG_TD I BCM3553_J TAG_TDO BCM3553_JTAG_TM S BCM3553_JTAG_TC K JTAG_RESET b

R207
IC100 BCM355 3
A28 A31 A32 B30 B31 C4 C8 C29 D3 D10 D34 E9 E27 F7 F8 F24 F27 H8 H10 H11 H12 H13 H14 H15 H16 H17 H18 H19 H20 H21 H22 H23 H24 H25 H26 J9 J 10 L5 L7 L26 M8 M26 M34 N1 N8 N34 P8 P14 P15 P16 P17 P18 P19 P20 P21 R8 R14 R15 R16 R17 R18 R19 R20 R21 R26 T1 T8 T14 T15 T16 T17 T18 T19 T20 T21 T26 T34 U8 U14 U15 U16 U17 U18 U19 U20 U21 V8 V14 V15 V16 V17 V18 V19 V20 V21 W1 W8 W14 W15 W16 W17
2S R543 10 +19.0V 470p F C531 C522 1uF C532 470p F R544 10 C509 C537 470p F R553 10 L506 DA-8580 470p F C536 R552 10
2F
R558 4.7K
JP50 7
JP20 2 4 E3 E3 A1.2V
AH31 AH33 AH34 AG32 AF30 AF29 AH29 N29 N28 P27 AF28 AG28 AM13 AL12 AL13
CLK54_AVSS CLK54_XTAL_N CLK54_XTAL_P CLK54_MONITOR VCXO_AGND 1 VCXO_AVDD1P2 BYP_XTAL_EN BYP_C PU _CLK BYP_SYS 175_CL K BYP_SYS 216_CL K BYP_DS_CL K BYP_SYS9_C LK USB_AVSS 1 USB_AVDD1P 2 USB_AVDD1P2PL L USB_AVDD2P 5 USB_AVDD3P 3 USB_RRE F USB_AVDD2P5RE F USB_DM 1 USB_DP 1 USB_DM 2 USB_DP 2 USB_MONCD R US B_MONP LLCDR USB_PWRFLT_ 1 USB_PWRFLT_ 2 US B_P WRON_ 1 US B_P WRON_ 2 RE S ET_ OUT RESE T NMI TMODE_ 0 TMODE_ 1 TMODE_ 2 TMODE_ 3 EJTAG_TC K EJTAG_TD I EJTAG_TD O EJ TAG_TMS EJTAG_C E EJTAG_TRS T PLL_MIPS_AVDD1P 2 PLL_MIPS _AGND VCXO_PLL_AUD_TESTOU T PLL_DS_TESTOU T PLL_OB_TESTOU T PLL_VAFE_AVDD1P2 PLL_VAFE_AVSS PLL_VAFE_TESTOUT DDR1_VDDO2P5_ 1 DDR1_VDDO2P5_ 2 DDR1_VDDO2P5_ 3 DDR1_VDDO2P5_ 4 DDR1_VDDO2P5_ 5 DDR1_VDDO2P5_ 6 DDR1_VDDO2P5_ 7 DDR1_VDDO2P5_ 8 DDR1_VDDO2P5_ 9 DDR1_VDDO2P5_1 0 DDR1_VDDO2P5_1 1 DDR1_VDDO2P5_1 2
DDR1_ADDR0 4 DDR1_ADDR0 5 DDR1_ADDR0 6 DDR1_ADDR0 7 DDR1_ADDR0 8 DDR1_ADDR0 9 DDR1_ADDR1 0 DDR1_ADDR1 1 DDR1_ADDR1 2 DDR1_BA 0 DDR1_BA 1 DDR1_DATA00 DDR1_DATA01 DDR1_DATA02 DDR1_DATA03 DDR1_DATA04 DDR1_DATA05 DDR1_DATA06 DDR1_DATA07 DDR1_DATA08 DDR1_DATA09 DDR1_DATA10 DDR1_DATA11 DDR1_DATA12 DDR1_DATA13 DDR1_DATA14 DDR1_DATA15 DDR1_DATA16 DDR1_DATA17 DDR1_DATA18 DDR1_DATA19 DDR1_DATA20 DDR1_DATA21 DDR1_DATA22 DDR1_DATA23 DDR1_DATA24 DDR1_DATA25 DDR1_DATA26 DDR1_DATA27 DDR1_DATA28 DDR1_DATA29 DDR1_DATA30 DDR1_DATA31 DDR1_DM 0 DDR1_DM 1 DDR1_DM 2 DDR1_ DQS 0 DDR1_ DQS 1 DDR1_ DQS 2 DDR1_ DQS 3 DDR1_RA S DDR1_CA S DDR1_ WE EXT_DDR1_C LK DDR1_CL K0 DDR1_CLK0 B DDR1_CK E DDR1_CSB 0 DDR1_VREF 0 DDR1_VREF 1 DDR1_BVDD1P2_ 0 DDR1_BVDD1P2_ 1 DDR1_BVSS_ 0 DDR1_BVSS_ 1 DDR1_PLL_AIO
1K
C512 22000p F
C515 22000p F
C540 0 . 1 uF
C545 0 . 0 1 uF
H2;6:AJ1 5 BCM3553_SPDIF_OU T
1A 1Y 2A 2Y 3A
1 2 3 4 5 6 7
14 VCC 13 6A 12 6Y 11 5A 10 5Y U_CAN 3 9 8 4A 4Y JP50 0 C576 R522 0 . 1 uF 120 C577 100p F R523 75 R524 110 C578 100p F JP50 1
J 5 01 PPJ204-0 6
2 JP20 1 3 C201 0 . 1 uF C202 0 . 1 uF 54MHz_XTAL_N 54MHz_XTAL_P L201 HB-1M1608-102J T C204
M32 M31 AH32 AG30
BSC_S_SC L BSC_S_SD A CLK54_AVDD1P2 CLK54_AVDD2P5
DDR1_ADDR0 0 DDR1_ADDR0 1 DDR1_ADDR0 2 DDR1_ADDR0 3
O_SPRIN G
M CLK : 12.288MHz
JP50 8
MICOM_RESE T
4:H3;G1
ZD501 5.6B
CONT ACT
TOP View
D2.6V
M17 M18 M19 M20 M21 M22 M23 C268 1000p F C269 0 . 0 1 uF C270 0 . 1 uF C279 10uF C272 33uF N12 N13 N14 N15 N16 N17 N18 N19
1 HB-1M1608-102J T L510
R561 4.7K
3Y SMAW250-0 4 P50 0 GND
1:H3;D2
BCM3553_AUD_MCL K
1uF
53 51 50 56 55 54 52 49 48 47 46 45 44 43
C548 0 . 0 1 uF R565 3 .3 L511
0 . 1 uF C203 A1.2V
4 . 7 uF
+1.8V C500 100p F HB-1M1608-102J T L500 1 2 3 4 5 3.3K R531 1000p F C501 0 . 1 uF C503 6 C505 10uF 7 8 9 10 11 12 +1.8V L501 13 14
42 41 40 39 38 37 IC501 NTP3000 A 36 35 34 33 32 31 30 29
16 17 18 19 21 22 23 25 26 27 15 20 24 28
C525 1uF
1S
1F
C541 0 . 1 uF
C544 0 . 4 7 uF
2S C524 22000p F +19.0V R546 10 470p F C533 C538 470p F R554 10
2F C542 0 . 1 uF
R559 4.7K
A2.6V
A3.3V
C546 0 . 0 1 uF R563 3 .3
HB-1M1608-102J T
C o a x i a l Out
0. 1uF 0. 1uF 4 . 7 uF
L200 HB-1M1608-102J T
AJ15 AK13 AK15

C278
D3.3 V
R211 22
12pF C229
N20 N21 N22 N23 P12
C277
C205
C206
AK14
C231
C526 0 . 1 uF
+9V
AM14 C228 0 . 1 uF AJ14 AH14 AP13 AM12 AN13 AN12 K34 AD8 1K R209 K29 AF2
R208 604
R214 120
0. 1uF
0. 1uF
IIC CH4 0x54
C207 100p F
R203 3.9K
1 E6 USB_DM 1 E6 USB_DP
AP14 AN14 AL14
C528 0 . 1 uF
C273 OP T READY 54MHz_XTAL_P L206 1008LS-272XJL C 54MHz_XTAL_N B2 B2
C261 1000p F
C262 0 . 0 1 uF
C263 0 . 1 uF
C264 4 . 7 uF
C265 1000p F
C266 0 . 0 1 uF
C267 0 . 1 uF
P13 P22 P23 R12 R13 R22 R23 T12 T13 T22 T23 U12 U13
D3.3 V
B_P WRFLT1 C6 US
HB-1M1608-102J T C506 10uF
L513
A6
HB-1M1608-102J T +19.0V R501 3 .3 C523 C527 22000p F 330u F 6:AJ17 6:AJ17 6:AJ17 1:A2;1:H1;4:E6;9:E 4 1:A2;1:H1;4:E6;9:E 4 C529 0 . 1 uF
1K R200
USB_P WRON 1
C504 0 . 1 uF
X200 54MHz
D3.3 V
READY R205 C232 33pF
1 : D 6 ; 4 : B 6 ; 8 : A 3 ; 11 : O 1 1SYS_RESET b
12pF C230
BCM3553_I2S_DATA_OU T BCM3553_I2S_LRCLK_OU T BCM3553_I2 S _S CLK_OUT SDA2_3.3 V SCL2_3.3 V

R534 100 C508 33pF
1uF C521 R536 R537
C530 0 . 0 1 uF
I C503 MC33078DR2 G
OUTPUT 1 1 8 VCC
R204
1K
C55 9 0.1uF
C56 1 100u F C56 2 22u F

E1 E1 BCM3553_JTAG_TC K BCM3553_JTAG_TD I BCM3553_J TAG_TDO BCM3553_JTAG_TM S BCM3553_J TAG_TRS Tb A1.2V L202
AF1 AE6 AE5 AG3 AF3 AG2 AF4 AF6 AF5 N31 N30 M33 AH28 AJ28 AJ29 AH17 AH18 AH19 P1 U1
P3 M6 M3 L2 M4 M2 M5 N4 N3 Y6 Y5 N5 N6 Y7 W7 P7 N7 T7 R5 R6 M7 T5 T4 U7 T6 AC2 L1 AB5 L4
C227 C218 C225 C219 C220 C222
R212 22
C252 4 . 7 uF
C253 1000p F
C254 0 . 0 1 uF
C255 0 . 1 uF
C256 4 . 7 uF
C257 1000p F
C258 0 . 0 1 uF
C259 0 . 1 uF
C280 10uF
U22 U23 V12 V13 V22 V23 W12 W13 W22 W23 Y12 Y13 Y22 Y23
22 22
INPUT1-
+1.8V
G2
C55 4 MC33078_L_OU T C55 3 0.01u F 22u F
R56 9 150
INPUT1+
OUTPUT 2
R58 1 150 C56 0 47p F R57 4 4.7K R57 9 6.8K R58 0 270 R58 2 10 K
MC33078_R_OU T C56 4 0.01u F G2
E1 E1 E1
INPUT2-
4:F1 MUTE1
L503 HB-1M1608-102J T
R57 0 6.8K
R518 270
C55 6 47p F R57 2 4.7K
D1.2V
VEE
INPUT2+
TEA6420_R_OU T C56 3 22u F A1
HB-1M1608-102J T 0 . 1 uF C208 L203 HB-1M1608-102J T 0 . 1 uF C210 C211 4 . 7 uF C209 4 . 7 uF
C516 0 . 1 uF
C519 10uF
A2
TEA6420_L_OU T
C55 5 22u F
R56 8 10 K
PLL_MAIN_MIPS_RPTR_TESTOU T DDR1_DM 3
C233 0 . 1 uF
C234 4 . 7 uF
C235 1000p F
C236 0 . 0 1 uF
C237 0 . 1 uF
C275 10uF
C276 10uF
C240 33uF
C241 33uF
AA12 AA13 AA22 AA23 AB12 AB13 AB22
R57 3 4.7K
+9V
C55 7 0.1uF
C55 8 0.1uF
R57 5 4.7K
D1.2V
D1.2V
AB23 AC12 AC13
L512
HB-1M1608-102J T
D2.6V
Y1 AC1 AB7
AUDIO SWITCH
+3.3V
+5.0V
A1.2V
OP AMP
HB-1M1608-102J T L515
C212 0 . 1 uF
C213 0 . 0 1 uF
C214 1000p F
C215 0 . 1 uF
C216 0 . 0 1 uF
C217 1000p F
N9 P9 R9 T9 U9 V9 W9
D3.3 V
C242 1000p F C243 0 . 0 1 uF C244 0 . 1 uF C245 4 . 7 uF C246 1000p F C247 0 . 0 1 uF C248 0 . 1 uF C249 4 . 7 uF C250 1000p F C251 0 . 0 1 uF
AC22 AC23 G34 J 26 K9 K26 L8 L9 M9 N26 P26 U26 V26 V34
C221 1uF
C549 100u F
IC500
L3 K1
4 . 7 uF
0 . 1 uF
4 . 7 uF
0 . 1 uF
470p F
GND
28
SD A
22
R539
SDA1_5 V SCL1_5 V
1:H1 1:H1
16V 0 . 1 uF C565 16V 0 . 1 uF C566 C567 1uF 0 . 1 uF C568
C550 22uF
C569 1uF
CAPACITANCE
27
SC L
22
R540
D3.3 V
R57 8 1K
JP50 2 J 5 00
1
C502 0 . 0 1 uF
VS
R555 10K
26
ADDR
L1
7:C6 7:G6 7:B2
AV_L_IN_ 1
L2
25
R1
IC502 CS5340-CZZ R
M0 M1
D3.3 V
1K
470p F
1uF
C223
HB-1M1608-102J T L514
AB4
AA26 AA34 AB9 Make this trace 12 m li L205 FB-MH3216-HM501N T

UB01123-4HHS-4F P201 1
AV_R_IN_1 AV_R_IN_2
7:C6
M CLK : 12.288MHz 1 16
IC202 TPS2052BDRG 4
R210
F i b er O p t i c
AV_L_IN_ 2
L3
24
R2
GND
AB26 AC9 AD9 USB_POWER_OUT_ 1 C6 AE9 AE26 AF12 AF13 C224 0 . 0 1 uF 25V C274 10uF D2.6V AF14 AF24 AF25 AF26
7:G7
MCLK
COMP_L_IN_ 1
NC1
23
R3
COMP_R_IN_ 1 7:B2
BCM3553_AUD_MCL K 1:H3;A6
VL
15
FILT + 0 . 1 uF C570 C572 1uF
BCM3553_SPDIF_OU T G7;6:AJ1 5 C55 2 0.1uF
JP50 4 VCC JP50 3
+5.0V
GND
OC 1
US B_P WRFLT1 B3
B DOWN S TREAM US
TEA6420 D ADDR 0x9 A
22
NC4
14
REF_GN D
ZD50 0 OP T
VINPUT
IN
OUT1
USB_POWER_OUT_ 1 F6
USB_DM 1
C3
NC2
21
NC3
CS5340_I2S_DATA_OU T 6:AJ17
22
13
FI X _POL E
R54 8
SDOU T
VA
EN1
B3 USB_P WRON 1 C238 0 . 1 uF C226 0 . 1 uF
7:D3 7:F6 F4 J4
COMP_L_IN_ 2
L5
20
COMP_R_IN_ 2 7:D3
VD 6 11 VQ
C571 0 . 1 uF
RGB_L_I N
R532 100 LOUT1
10
19
R5
1uF C573
RGB_R_I N
7:F6 CS5340_I2S_SC LK_OUT 6:AJ18 CS 534 0_I2S_ LRCLK_OUT 6:AJ17 R54 9 R55 0 22 22
SCL K 7 10 AINL
SPDIF OU T
MC33078_L_OU T F4 4:H3;A6
EN2
OC 2
L4
R4
GND
12
AINR
OUT2
C239 0 . 1 uF
C260 0 . 1 uF
USB_DP 1
C3
Make this trace 12 m li
MC33078_R_OU T
J4
N27 AF10 AF11 AF27 AG27 AJ32
TEA6420_L_OU T
R533 100 ROUT1
11
18
ROUT4
TEA6420_R_OU T
LOUT2
12
17
LOUT4
LRCK
RS T
MICOM_RESE T
13
16
ROUT3
=========== ========== CUTTING PIN LIST =========== ==========

ROUT2 14 15 LOUT3
AUDIO AD C
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPORTANT FOR PRO TECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .
AUDI 0
D2 D3 D3;10:BA16 EBI_ADDR24 EBI_ADDR23/PCI_DEVSEL b A23 EBI_ADDR16/PCI_CBE0 A22 EBI_ADDR/PCI_AD[17-31 ] EBI_ADDR/PCI_AD[31 ] EBI_ADDR/PCI_AD[30 ] A15 A14 A13 A12 A11 A10 A9 A8 A19 D2 D2
R157 100
A 1 , A 2 , A 5 , A 8 , A 11 , A 1 4 , A 1 7 , A 2 0 , A 2 3 , A 2 6 , A 2 9 , A 3 4 , E 3 , E 3 4 , F 1 , H 3 4 , J1 , K 1 0 , K 11 , K 1 2 , K 1 3 , K 1 4 , K 1 5 , K 1 6 , K 1 7 , K 1 8 , K 1 9 , K 2 0 , K 2 1 , K 2 2 , K 2 3 , K 2 4 , K 2 5 , L 1 0 , L 11 , L 1 2 , L 1 3 , L 1 4 , L 1 5 , L 1 6 , L 1 7 , L 1 8 , L 1 9 , L 2 0 , L 2 1 , L 2 2 , L 2 3 , L 2 4 , L 2 5 , L ,34 M1, M10, M11, M24, M25 , N 1 0 , N 11 , N 2 4 , N 2 5 , P 1 0 , P 11 , P 2 4 , P 2 5 , P 3 ,4 R1, R1 0, R11 , R2 4 , R2 5, T 1 0 , T 11 , T 2 4 , T 2 5 , U 1 0 , U 11 , U 2 4 , U 25 , U 3 4, V 1 , V 1 0 , V 11 , V 2 4 , V 2 5, W10, W11, W24, W25 , Y 1 0 , Y 11 , Y 2 4 , Y 2 5 , Y 3 4, AA1, AA10, AA11, AA24, AA25 , AB10, AB11, AB24, AB25, A C10, A C11, A C24, A C25, A C34, AD1, AD10, AD11, AD12, AD13, AD14, AD15, AD16, AD17, AD18, AD19, AD20, AD21, AD22, AD23, AD24, AD25 , A E 1 0 , A E 11 , A E 1 2 , A E 1 3 , A E 1 4 , A E 1 5 , A E 1 6 , A E 1 7 , A E 1 8 , A E 1 9 , A E 2 0 , A E 2 1 , A E 2 2 , A E 2 3 , A E 2 4 , A E 2 5 , AF34, AG1, A J34, AK1, A P 1 , A P 6 , A P 9 , A P 1 2 , A P 1 5 , A P 1 8 , A P 2 1 , A P 2 4 , A P 2 7 , A P 3 0 , A4 P3
BCM7411_DVI_OUT2[3 ]
BCM7411_DVI_OUT2[4 ] B2_VCCIO2_ 2 C1105 0 . 1 uF B2_GNDIO_ 5 G5 B2_IO_7 7 B8 D6
A2.6V
IC100 BCM355 3
H7 E1 K8 J6 G4 E2 F3 L6 K5
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
NC5 EBI_ADDR25 NC4 A16 R151 BYTE 1K VSS 2 DQ15/A_1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 VCC DQ11 DQ3 DQ10 DQ2 DQ9 DQ1 DQ8 DQ0 OE EBI_DATA/PCI_AD[11 ] EBI_DATA/PCI_AD[3 ] EBI_DATA/PCI_AD[10] EBI_DATA/PCI_AD[2 ] EBI_DATA/PCI_AD[9 ] EBI_DATA/PCI_AD[1 ] EBI_DATA/PCI_AD[8 ] EBI_DATA/PCI_AD[0 ] C124 0 . 1 uF EBI_DATA/PCI_AD[15] EBI_DATA/PCI_AD[7 ] EBI_DATA/PCI_AD[14] EBI_DATA/PCI_AD[6 ] EBI_DATA/PCI_AD[13] EBI_DATA/PCI_AD[5 ] EBI_DATA/PCI_AD[12] EBI_DATA/PCI_AD[4 ] EBI_ADDR17/PCI_CBE 1 D3;10:BA15 EBI_DATA/PCI_AD[0-15] E5;10:BA15 D2
AK34 A1.2V L102 HB-1M1608-102J T C100 C101 0 . 1 uF 0 . 1 uF AM30 AL30 AK29 AM31 AL29 C103 0 . 1 uF C102 4 . 7 uF AN31 AP31 AP32 AP33 A33 B33 C31 33 22 22 BCM Recommen d R153 R155 R152 C30 D30 B32 H28 H29 G29 E28 B34 C32 K28 K27 J 29 J 28 J 27 D32 C34 F32 H27 F34 F33 H31 F30 E30 E33 E32 H30 G28 AL26 C107 0 . 1 uF C104 4 . 7 uF A1.2V L100 HB-1M1608-102J T C105 0 . 1 uF AM28 AL27 AJ26 AK27 C108 0 . 0 1 uF AK26 AJ27 AP26 C106 0 . 1 uF
560
OB_AG C OB_ADCAV 1P 2 OB_ADCAV 2P 5 OB_AVSS_ 1 OB_AVSS_ 2 OB_PLLAVDD1P2 OB_I_N OB_I_P OB_IFVCO_ N OB_IFVCO_P PKT0_CL K PKT0_DATA PKT0_SYN C HSX_CL K HSX_DATA HSX_SYN C CHIP2POD_CR X CHIP2POD_DR X POD2CHIP_MCLK I POD2CHIP_MDI 0 POD2CHIP_MDI 1 POD2CHIP_MDI 2 POD2CHIP_MDI 3 POD2CHIP_MDI 4 POD2CHIP_MDI 5 POD2CHIP_MDI 6 POD2CHIP_MDI 7 POD2CHIP_MISTR T POD2CHIP_MIVAL CHIP2POD_MCLK O CHIP2POD_MDO 0 CHIP2POD_MDO 1 CHIP2POD_MDO 2 CHIP2POD_MDO 3 CHIP2POD_MDO 4 CHIP2POD_MDO 5 CHIP2POD_MDO 6 CHIP2POD_MDO 7 CHIP2POD_MOSTR T CHIP3POD_MOVA L VDAC_B GVDD2P 5 VDAC_AVDD3P3_1 VDAC_AVDD3P3_2 VDAC_AVSS1 VDAC_AVSS2 VDAC_AVSS3 VDAC_AVDD1P2 VDAC_DRE G VDAC_RBIAS VDAC_0 VDAC_1 VDAC_2 VDAC_3 HD_DVI_0 HD_DVI_1 HD_DVI_2 HD_DVI_3 HD_DVI_4 HD_DVI_5 HD_DVI_6 HD_DVI_7 HD_DVI_8 HD_DVI_9 HD_DVI_10 HD_DVI_11 HD_DVI_12 HD_DVI_13 HD_DVI_14 HD_DVI_CLK_N HD_DVI_CLK_P HD_DVI_DE HD_DVI_HSYNC HD_DVI_VSYNC
DVO_0_ 0 DVO_0_ 1 DVO_0_ 2 DVO_0_ 3 DVO_0_ 4 DVO_0_ 5 DVO_0_ 6 DVO_0_ 7 DVO_0_ 8 DVO_0_ 9 DVO_0_1 0 DVO_0_1 1 DVO_0_1 2 DVO_0_1 3 DVO_0_1 4 DVO_0_1 5 DVO_0_1 6 DVO_0_1 7 DVO_0_1 8 DVO_0_1 9 DVO_0_2 0 DVO_0_2 1 DVO_0_2 2 DVO_0_2 3 DVO_0_2 4 DVO_0_2 5 DVO_0_2 6 DVO_0_2 7 DVO_0_2 8 DVO_0_2 9 DVO_0_CL K_NEG DVO_0_CL K_PO S DVO_0_D E DVO_0_ HSYNC DVO_0_ VSYNC LVDS_TX_0_DATA_0_N LVDS_TX_0_DATA_0_P LVDS_TX_0_DATA_1_N LVDS_TX_0_DATA_1_P LVDS_TX_0_DATA_2_N LVDS_TX_0_DATA_2_P LVDS_TX_0_DATA_3_N LVDS_TX_0_DATA_3_P LVDS_TX_0_DATA_4_N LVDS_TX_0_DATA_4_P LVDS_TX_1_DATA_0_N LVDS_TX_1_DATA_0_P LVDS_TX_1_DATA_1_N LVDS_TX_1_DATA_1_P LVDS_TX_1_DATA_2_N LVDS_TX_1_DATA_2_P LVDS_TX_1_DATA_3_N LVDS_TX_1_DATA_3_P LVDS_TX_1_DATA_4_N LVDS_TX_1_DATA_4_P LVDS_TX_0_CLK_N LVDS_TX_0_CLK_P LVDS_TX_1_CLK_N LVDS_TX_1_CLK_P LVDS_TX_AVSS_1 LVDS_TX_AVSS_2 LVDS_TX_AVSS_3 LVDS_TX_AVSS_4 LVDS_TX_AVSS_5 LVDS_TX_AVDD2P5_1 LVDS_TX_AVDD2P5_2 LVDS_P LL_AVDDC1P2 LVDS_TX_AVDD C1 P 2
E4;10:BA10
EBI_ADDR/PCI_AD[28 ]
R150 1K
D3.3 V
H2 H6 H5 K7 G1 H3 G2 J5 G3 F2 H4 J7 J8 H1 K6 K2 K3 J2 K4 J3 J4 G8 G7 F4 D2 D1 B7 C7 D7 E7 B6 C6 B5 C5 D5 E5 A4 B4 D4 E4 A3 B3 B2 B1 F6 F5 D6 E6 C3 C2 A6 D8 H9 G6 C1 A7 E8 G5 G9 HB-1M1608-102J T C110 C111 0 . 1 uF 0 . 1 uF C112 0 . 1 uF C113 0 . 1 uF C125 4 . 7 uF L101 D3;10:BA15 D3;10:BA15 EBI_ADDR19/PCI_CBE3 D2 EBI_ADDR20/PCI_PA R
EBI_ADDR/PCI_AD[27 ] EBI_ADDR/PCI_AD[26 ] EBI_ADDR/PCI_AD[25 ]
8:A3 8:A3 8:A3 10:V28 10:V28 10:V28
TU2BCM3553 _SCLK TU2BCM3553_SDAT A TU2BCM3553_SYN C HSX_CL K HSX_DATA HSX_SYN C
A20 EBI_ADDR21/PCI_IRDY b WE D1;10:BA16 2 : B 3 ; 4 : B 6 ; 8 : A 3 ; 11 : O 1 1 EBI_WE1 b RESE T SYS_RESET b A21 EBI_ADDR22/PCI_STOP b WP/AC C RY/BY A18 A17 EBI_ADDR18/PCI_CBE2 EBI_ADDR/PCI_AD[24 ] EBI_ADDR/PCI_AD[23 ] EBI_ADDR/PCI_AD[22 ] EBI_ADDR/PCI_AD[21 ] EBI_ADDR/PCI_AD[20 ] EBI_ADDR/PCI_AD[19 ] EBI_ADDR/PCI_AD[18 ] LVDS_TX_OUT_TA0LVDS_TX_OUT_TA0+ LVDS_TX_OUT_TA1LVDS_TX_OUT_TA1+ LVDS_TX_OUT_TA2LVDS_TX_OUT_TA2+ LVDS_TX_OUT_TA3LVDS_TX_OUT_TA3+ LVDS_TX_OUT_TA4LVDS_TX_OUT_TA4+ LVDS_TX_OUT_TB0LVDS_TX_OUT_TB0 + LVDS_TX_OUT_TB1LVDS_TX_OUT_TB1 + LVDS_TX_OUT_TB2LVDS_TX_OUT_TB2 + LVDS_TX_OUT_TB3LVDS_TX_OUT_TB3 + LVDS_TX_OUT_TB4LVDS_TX_OUT_TB4 + LVDS_TX_OUT_TACLVDS_TX_OUT_TAC+ LVDS_TX_OUT_TBC LVDS_ TX_OUT_TBC+ 9 : A 3 ; 9 : E5 9 : A 3 ; 9 : E5 9 : A 3 ; 9 : E4 9 : A 3 ; 9 : E4 9 : A 3 ; 9 : E5 9 : A 3 ; 9 : E5 9 : A 4 ; 9 : E4 9 : A 4 ; 9 : E4 9 : A 4 ; 9 : E4 9 : A 4 ; 9 : E4 9:A4 9:A4 9:A5 9:A5 9:A4 9:A4 9:A5 9:A5 9:A5 9:A5 9 : A 3 ; 9 : E4 9 : A 3 ; 9 : E4 9:A4 9:A4 NC2 A7 A6 A5 A4 A3 A2 A1 NC1
D3.3 V
BCM7411_DVI_OUT[15 ] BCM7411_DVI_OUT[14 ] BCM7411_DVI_OUT[13 ] BCM7411_DVI_OUT[2 ] BCM7411_DVI_OUT[1 ] BCM7411_DVI_OUT[0 ] 0 . 1 uF
B2_VCCIO2_ 3
C1103
B2_IO_10 0
B2_GNDIO_ 6
B2_IO_8 9
B2_IO_8 7
B2_IO_8 5
R1101
33
B2_IO_8 3
1:A3 BCM7411_DVI_VSYNC 2
D3.3 V
B2_IO_8 1
B2_IO_9 8
B2_IO_9 6
B2_IO_9 5
B2_IO_9 4
B2_IO_9 1
B2_IO_9 0
B2_IO_8 8
B2_IO_8 6
B2_IO_8 4
B2_IO_8 2
B2_IO_9 9
B2_IO_9 7
F7
B2
B4
B5
B6
B7
C3
C4
C5
C6
B3
A3
G7
A4
A5
A6
A7
C7
A8
B2_IO_8 0
A1
EBI_RDb VSS 1 CE EBI_CS0 b A0 NC3 VIO
D1;10:BA17
A2
A9
B2_IO_7 6
A1.2V
IC101 S29GL256N10TFI02 0
D3.3 V
Boot STRAP & FLASH
BCM7411_DVI_OUT[3 ]
D2
B1_IO_1 B1_IO_2 B1_IO_3 B1_IO_4 B1_IO_5 B1_IO_6 B1_IO_7 C1100 0 . 1 uF B1_VCCIO1_ 1 B1_GNDIO_ 1 GNDINT_1 B1_IO_11 /GCLK0 C1101 0 . 1 uF VCCINT_1 B1_IO_13 /GCLK1 B1_IO_1 4 B1_IO_1 5 B1_IO_1 6 B1_IO_1 7 B1_IO_1 8 B1_IO_1 9 B1_IO_2 0 CPLD_TM S CPLD_TD I CPLD_TC K CPLD_TD O B1_TMS B1_TDI B1_TC K B1_TD O B1_IO_2 5
C2 B1 C1 D3 D2 D1 E3 E4 D5 E6 E2 E7 E1 F2 F3 F1 G1 H1 G2 G3 J1 H2 H3 J2 G4 K2 K3 K4 K7 K8 K9 E5 H8 H5 H6 J3 J4 J5 J6 K10 K1 K5 K6 G6 H4 D7 H7 J7 J8
A10 B9 C8 C9 B10 D8 D9
B2_IO_7 5 B2_IO_7 4 B2_IO_7 3 B2_IO_7 2 B2_IO_7 1 B2_IO_7 0 B2_IO_6 9 B2_IO_6 8 B2_IO_6 7 B2_IO_6 6 B2_IO_6 5 GNDINT_2 B2_IO_63 /GCLK3 VCCINT_2 B2_IO_61 /GCLK2 B2_IO_6 0 B2_GNDIO_ 4 B2_VCCIO2_ 1 B2_IO_5 7 B2_IO_5 6 B2_IO_5 5 B2_IO_5 4 B2_IO_5 3 B2_IO_5 2 B2_IO_5 1 C1107 0 . 1 uF C1106 0 . 1 uF 33
BCM7411_DVI_OUT2[6 ] BCM7411_DVI_OUT2[7 ] BCM7411_DVI_OUT2[8 ] BCM7411_DVI_OUT2[9 ] BCM7411_DVI_OUT2[10 ] BCM7411_DVI_OUT2[11 ] BCM7411_DVI_OUT2[12 ]
A3.3V A2.6V
D3.3 V
BCM7411_DVI_OUT[4 ] BCM7411_DVI_OUT[5 ] BCM7411_DVI_OUT[16 ] BCM7411_DVI_OUT[6 ] BCM7411_DVI_OUT[7 ]
CPL D Progr am I /F
R1106 10K R1107 10K
D3.3 V
1K 1K 1K 1K 1K
BCM7411_DVI_OUT[17 ]
R122
R121
R123
R125
R124
C123 0 . 1 uF
I C1107 EPM240F100C5 N
C10 D10 E8 E9 F5 E10 F4 F8 F9 F6 D4 F10 G10 G9 G8 H10 J 10 H9 J9
BCM7411_DVI_OUT2[13 ] BCM7411_DVI_OUT2[14 ] BCM7411_DVI_OUT2[15 ] BCM7411_DVI_OUT2[16 ] R1102 1:A4 BCM7411_DVI_CLK2 I15 CPLD_TC K
P1100 GIL-G-06-S3T 2 JP110 0 1 JP110 1
G7;10:BA1 5 EBI_DATA/PCI_AD[0-15] EBI_DATA/PCI_AD[0 ] EBI_DATA/PCI_AD[1 ] EBI_DATA/PCI_AD[2 ] EBI_DATA/PCI_AD[3 ] EBI_DATA/PCI_AD[4 ] EBI_DATA/PCI_AD[5 ] EBI_DATA/PCI_AD[6 ] EBI_DATA/PCI_AD[7 ] EBI_DATA/PCI_AD[8 ] EBI_DATA/PCI_AD[9 ] EBI_DATA/PCI_AD[10] AC32 AC33 AB31 AB32 AB33 AA31 AA32 Y30 Y31 Y33 Y32
IC100 BCM355 3
AJ9 AH10 AJ10 AH11 AM8 F29 D31 G27 C33
1K 1K 1K
BCM7411_DVI_CL K 10:BB24 BCM7411_DVI_OUT[12 ] BCM7411_DVI_OUT[18 ] BCM7411_DVI_OUT[8 ]

BCM7411_DVI_OUT2[15 ] BCM7411_DVI_OUT2[16 ] BCM7411_DVI_OUT2[17 ] BCM7411_DVI_OUT2[18 ] BCM7411_DVI_OUT2[19 ] S-VIDEO1_S W 7:C7 HDMI_POWER_ 0 HDMI_POWER_ 1 HDMI_POWER_ 2 HDMI_HPD_0 HDMI_HPD_1 HDMI_HPD_2 6:G29 6:G11 6:G20 6:G28;6:AG2 9 6:G9;6:AG2 6 6:G19;6:AG2 3
I15
CPLD_TD O JP110 2
PCI_AD00 PCI_AD01 PCI_AD02 PCI_AD03 PCI_AD04 PCI_AD05 PCI_AD06 PCI_AD07 PCI_AD08 PCI_AD09 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 PCI_CBE0 0 PCI_CBE0 1 PCI_CBE0 2 PCI_CBE0 3 PCI_CLK_IN PCI_CLK_OU T PCI_DEVSE L PCI_FRAM E PCI_GNT0 PCI_GNT1 PCI_GNT2 PCI_INT_A0 PCI_INT_A1 PCI_INT_A2 PCI_IRDY PCI_PAR PCI_P ERR PCI_RE Q0 PCI_RE Q1 PCI_RE Q2 PCI_RS T PCI_S ERR PCI_STOP PCI_TRD Y PCI_VIO_0 PCI_VIO_1 PCI_VIO_2 EBI_ADDR24 EBI_ADDR25 EBI_CS 0 EBI_CS 1 EBI_CS 2 EBI_CS 3 EBI_CS 4 EBI_DS EBI_RD EBI_RW EBI_TA2 EBI_TA EBI_TS EBI_TSIZE0 EBI_TSIZE1 EBI_WE0 EBI_WE1 NAND_P B
GPIO_0 0 GPIO_0 1 GPIO_0 2 GPIO_0 3 GPIO_0 4 GPIO_0 5 GPIO_0 6 GPIO_0 7 GPIO_0 8 GPIO_0 9 GPIO_1 0 GPIO_1 1 GPIO_1 2 GPIO_1 3 GPIO_1 4 GPIO_1 5 GPIO_1 6 GPIO_1 7 GPIO_1 8 GPIO_1 9 GPIO_2 0 GPIO_2 1 GPIO_2 2 GPIO_2 3 GPIO_2 4 GPIO_2 5 GPIO_2 6 GPIO_2 7 GPIO_2 8 GPIO_2 9 GPIO_3 0 GPIO_3 1 GPIO_3 2 GPIO_3 3 GPIO_3 4 GPIO_3 5 GPIO_3 6 GPIO_3 7 GPIO_3 8 GPIO_3 9 GPIO_4 0 GPIO_4 1 GPIO_4 2 GPIO_4 3 GPIO_4 4 GPIO_4 5 GPIO_4 6 GPIO_4 7 GPIO_4 8 GPIO_4 9 GPIO_5 0 GPIO_5 1 GPIO_5 2 GPIO_5 3 GPIO_5 4 GPIO_5 5 GPIO_5 6 GPIO_5 7 GPIO_5 8 GPIO_5 9 GPIO_6 0 GPIO_6 1 GPIO_6 2 GPIO_6 3 SGPIO_0 0 SGPIO_0 1 SGPIO_0 2 SGPIO_0 3 SGPIO_0 4 SGPIO_0 5 SGPIO_0 6 SGPIO_0 7
BCM7411_DVI_OUT[9 ] BCM7411_DVI_OUT[10 ] BCM7411_DVI_HSYN C 10:BB24 BCM7411_DVI_OUT[19 ] AB16 AB15 AB17 BCM7411_DVI_OUT[11 ] AB16
C109 0 . 1 uF
R111
AM27 AN27 AN26 AM26 AM25
I15 BCM7411_DVI_OUT2[18 ] BCM7411_DVI_OUT2[19 ] BCM7411_DVI_OUT2[20 ] BCM7411_DVI_OUT2[21 ] BCM7411_DVI_OUT2[22 ] BCM7411_DVI_OUT2[23 ] BCM7411_DVI_OUT2[24 ] I15
CPLD_TM S JP110 3
4 JP110 4 CPLD_TD I C1109 0 . 1 uF R1103 10K C1108 100p F 5 JP110 5 6
BCM7411_DVI_OUT2[0 ] BCM7411_DVI_OUT2[1 ] BCM7411_DVI_OUT2[2 ] BCM7411_DVI_OUT2[3 ] BCM7411_DVI_OUT2[4 ] BCM7411_DVI_OUT2[5 ] BCM7411_DVI_OUT2[6 ] BCM7411_DVI_OUT2[7 ] BCM7411_DVI_OUT2[8 ] BCM7411_DVI_OUT2[9 ] BCM7411_DVI_OUT2[10 ] BCM7411_DVI_OUT2[11 ] BCM7411_DVI_OUT2[12 ] BCM7411_DVI_OUT2[13 ] BCM7411_DVI_OUT2[14 ] BCM7411_DVI_OUT2[0-14 ] 11:K7 BCM7411_DVI_CLK2 11:U17 11:O11 11:N11 11:N22 BCM7411_DVI_DE 2 BCM7411_DVI_HSYNC 2 BCM7411_DVI_VSYNC 2
AM5 AN4 AP4 AL6 AM6 AP5 AN5 AL7 AL8 AN6 AM7 AK9 AN7 AK8 AH9 AJ11 AK10 AH12 AK11 AH13
F28 E31 F31 AL9 AP7 L31 J 33 AD7 AC8 AP8 AN8 AM9 AL10 AN9 K32 K30 M27 K31 L29 J 34 G30 G32 G31 E29 L30 AG33 AG34 L33 M30 L32 K33 AP25 AN25 AM10 AL24 AL11 AN10 M28 M29 AF33 AE32 AC6 AE1 AC7 AD4 AE2 G33 D33 J 30 J 32 J 31 H33 H32
4.7K R138
R108
A2.6V A1.2V
D7;10:BA10 EBI_ADDR/PCI_AD[17-31 ]
EBI_DATA/PCI_AD[11 ] AA27 EBI_DATA/PCI_AD[12] AA28 EBI_DATA/PCI_AD[13] AA30 EBI_DATA/PCI_AD[14] AA29 EBI_DATA/PCI_AD[15] EBI_ADDR/PCI_AD[17 ] EBI_ADDR/PCI_AD[18 ] EBI_ADDR/PCI_AD[19 ] EBI_ADDR/PCI_AD[20 ] EBI_ADDR/PCI_AD[21 ] EBI_ADDR/PCI_AD[22 ] EBI_ADDR/PCI_AD[23 ] EBI_ADDR/PCI_AD[24 ] EBI_ADDR/PCI_AD[25 ] EBI_ADDR/PCI_AD[26 ] EBI_ADDR/PCI_AD[27 ]
1K 1K 1K 1K 1K 1K 1K 1K 1K 1K 1K 1K 1K
R102
R103
B1_IO_2 6
B1_IO_2 7
B1_IO_2 8
B1_IO_3 2
B1_IO_3 3
B1_IO_3 5
B1_IO_3 7
B1_IO_3 8
B1_IO_3 9
B1_IO_3 4
B1_IO_3 6
B1_IO_4 1
B1_IO_4 6
B1_IO_4 8
B1_IO_4 9
B1_IO_2 9
B1_IO_4 0
B1_IO_43/DEV_CLR n
B1_IO_42/DEV_O E
B1_VCCIO1_ 2
B1_VCCIO1_ 3
B1_GNDIO_ 2
B1_GNDIO_ 3
B1_IO_4 7
B1_IO_5 0
BCM7411_DVI_OUT2[20 ] BCM7411_DVI_OUT2[21 ]
10:BA22
BCM7411_DVI_OUT[0-19 ]
GN D
GN D
Y27 U32 U33 U31 T32 T33 T31 W29 W30 V28 V30 V29 U27 U28 U29 U30 T27 AA33 Y28 V32 V27 R30
COMP1_S W COMP2_S W REV_SEL 0 REV_SEL 1
7:A3 7:C3 J2 J2 BCM7411_DVI_OUT2[22 ] BCM7411_DVI_OUT2[23 ] BCM7411_DVI_OUT2[24 ] BCM7411_DVI_OUT2[25 ] BCM7411_DVI_OUT2[26 ]
0 . 1 uF
COMPOSITE2_S W COMPOSITE1_S W BCMPWM_VBR_ A BCMPWM_VBR_ B HDMI_SEL_0 HDMI_SEL_1 RF_SWITCH_CTR L
7:C6 8:G6 8:G6 6:W19 6:W19 8:A5
EBI_ADDR/PCI_AD[28 ] EBI_ADDR/PCI_AD[29 ] EBI_ADDR/PCI_AD[30 ] EBI_ADDR/PCI_AD[31 ]
BCM7411_DVI_OUT2[15-29 ]
BCM7411_DVI_VSYN C
R113
R159
R115
R110
R112
R114
R116
R117
R161
R118
R109
R158
R162
C1102
SYS_RESET b 1:D6;2:B3;4:B6;8:A 3
C1104 1:A4 BCM7411_DVI_DE 2 BCM7411_DVI_OUT2[27 ]
7:G6
D7;10:BA16 G7;10:BA1 5 D6;10:BA15 D6;10:BA15
EBI_ADDR16/PCI_CBE0 EBI_ADDR17/PCI_CBE1 EBI_ADDR18/PCI_CBE2 EBI_ADDR19/PCI_CBE3 33 BCM3553_CLK_OUT EBI_ADDR23/PCI_DEVSEL b
33
R107
BCM7411_ 27M_CLK 10:AF4
D3.3 V
10:BA17 D7
R32 R154 W33 V33 P33 N33 T29
10:BB24
BCM7411_DVI_OUT2[27 ] 33 R134 BCM3553_ AUD_MCLK 5 : A 6 ; 5 : D2 BCM7411_DVI_OUT2[28 ] BCM7411_DVI_OUT2[29 ]
C122 0 . 1 uF
IC102 CAT24C08WIGT
R148 1K
R27 R31 10:BA16 D7 D7 WP

470 470 1K 1K 1K 1K 1K 1K
A0
VCC
BCM7411_INTb EBI_ADDR21/PCI_IRDY b EBI_ADDR20/PCI_PA R
R29 V31 Y29 W28 R28 R34 T28 T30 W27 W31 W32 BCM Recommen d +5.0V P29 P28 P30 R33
BCM7411_DVI_OUT2[15-29 ] BCM_R X 4:A4 BCM_TX 4:A4
11:K7
A1
A2
SC L
22
R100 SCL2_3.3 V R101 SDA2_3.3 V H1;4:E6;5:A5;9:E 4 D6 EBI_ADDR22/PCI_STOP b

R163 R165 R160 R164 R166 R169 R119 R170
D3.3 V
R127 R126 1K 1K H4 H4 H2
Board Configurtio n
BCM7411_DVI_OUT2[0-29 ] 1 : A 4 ; 1 : I2
REV_SEL 0 REV_SEL 1 REV_SEL 2
READ Y R105 100 READ Y R106 100 R104 100
H1;4:E6;5:A5;9:E 4
VSS
SD A
22
S-VIDEO2_S W RGB_S W REV_SEL 2
7:G6 7 : J3 J2
D7 G7 F6
EBI_ADDR24 EBI_ADDR25 EBI_CS0 b C126 0 . 1 uF
+5.0V
4.7K R140 4.7K R141 4.7K R139 4.7K R142 4.7K R137
D3.3 V
P32 AD31 AE33 AD32 AC30 AD34 AC29 AB28 AB27 AB29 AB30 N32 AD33 AC31 AC27 AC28 P31
L28 L27 AD29 AD30 AE31 AE30 AD6 AD5 AE4 AE3
HDMI_HDCP KEY MEMOR Y

10:BA17 F6;10:BA17 EBI_CS1 b EBI_RDb EBI_TAb
READ Y
READ Y
SCL0_3.3 V SDA0_3.3 V SCL1_5 V SDA1_5 V SCL2_3.3 V SDA2_3.3 V SCL3_3.3 V SDA3_3.3 V
8:A3 8:A3 5:C3 5:C3 A2;4:E6;5:A5;9:E 4 A2;4:E6;5:A5;9:E 4 4 : F 1 ; 9 : A6 4 : F 1 ; 9 : A6
READ Y
D3.3 V
1:A3 BCM7411_DVI_HSYNC 2
R1100
D3.3 V
0 . 1 uF
33
CPLD/BCM7411 PWR
4.7K R143 C121
C115
C116
C114
C117
C118
D6;10:BA16
EBI_WE1 b
C119
C120
10:BA16
READY READY READY READY
READY READY READY READY
4.7K R144
D2.6V
D2.6V
JP72 5
JP72 4
C300 100u F
C301 0 . 1 uF
C302 0 . 0 1 uF
C303 0.047u F
C304 2700p F
C311 470p F
C306 100u F
C307 0 . 1 uF
E7 DDR0_M_Data[0-63 ] C308 0 . 0 1 uF C309 0.047u F C310 2700p F C317 470p F A6 DDR_DATA[0-63] I7 DDR0_M_Data[0-63 ] DDR0_VT T A1;A4;D5;D2;I2 F7 R300 33 DDR0_DQ[0-63 ] R381 33 DDR0_DQ[0-63 ] DDR0_DQ[0-63 ] F7 R336 33 DDR0_DQ[0 ] DDR0_DQ[2 ] DDR0_DQ[7 ] DDR0_DQ[5 ] DDR0_DQ[4 ] R338 33 DDR0_DQ[15 ] DDR0_DQ[14 ] DDR0_DQ[12 ] DDR0_DQ[9 ] DDR0_DQ[11 ] DDR0_DQ[16 ] DDR0_DQ[18 ] DDR0_DQ[23 ] DDR0_DQ[21 ] DDR0_DQ[20 ] R345 33 DDR0_M_Data[31 ] DDR0_M_Data[30 ] DDR0_M_Data[28 ] DDR0_M_Data[25 ] DDR0_M_Data[27 ] DDR0_M_Data[32 ] DDR0_M_Data[34 ] F2 DDR0_ DQM_6 DDR0_CLK1 b D 2 ; H 5 ; I2 DDR0_CL K1 D 2 ; H 5 ; I3 DDR0_ADDR[0-12] DDR_DATA[53] A12 A11 A9 A8 A7 A6 A5 A4 VSS_ 1 DDR0_ ADDR[12] DDR0_ ADDR[11] DDR0_ADDR[9] DDR0_ADDR[8] DDR0_ADDR[7] DDR0_ADDR[6] DDR0_ADDR[5] DDR0_ADDR[4] DDR_DATA[52] DDR_DATA[59] DDR_DATA[57] DDR_DATA[60] DDR_DATA[62] DDR_DATA[1 ] DDR_DATA[3 ] DDR_DATA[6 ] R321 33 DDR_DATA[13] DDR_DATA[8 ] DDR_DATA[10] R323 33 DDR0_M_Data[13 ] DDR0_M_Data [8] DDR0_M_Data[10 ] DDR0_M_Data[17 ] DDR0_M_Data[19 ] DDR0_M_Data[22 ] R325 33 DDR_DATA[32] DDR_DATA[29] DDR_DATA[24] DDR_DATA[33] DDR_DATA[34] DDR_DATA[26] DDR_DATA[33] DDR_DATA[35] DDR_DATA[38] DDR_DATA[35] DDR_DATA[39] DDR_DATA[45] DDR_DATA[40] DDR_DATA[38] DDR_DATA[37] DDR_DATA[42] DDR_DATA[49] DDR_DATA[51] VDDQ_4 DQ8 NC_7 VSSQ_ 3 UDQ S DDR0_ DQS 4 H5 NC_6 VREF VSS_ 2 UDM /CK DDR0_CLK1 b D 5 ; H 5 ; I2 C K DDR0_CL K1 CKE NC_5 A12 A11 A9 A8 A7 A6 A5 A4 VSS_ 1 R372 33 R378 33 C337 R380 33 B2 DDR0_ DQM_5 0 . 0 1 uF C357 2 . 2 uF DDR0_ ADDR[12] DDR0_ ADDR[11] DDR0_ADDR[9] DDR0_ADDR[8] DDR0_ADDR[7] DDR0_ADDR[6] DDR0_ADDR[5] DDR0_ADDR[4] R373 75 DDR0_VT T R379 75 DDR0_VT T V_SENS E DDR0_RE F VREF 3 6 A VCC C358 100u F A2;A5;B5;B2;H5 C359 1uF R374 33 H6 DDR0_ DQM5 A2;A5;B5;B2;H5 A2;A5;B5;B2;H5 A2;A5;B5;B2;H5 DDR0_CSB b DDR0_RAS b DDR0_WE b DDR0_CAS b DDR0_ADDR[5] DDR0_ADDR[6] DDR0_ADDR[7] DDR0_ADDR[8] R414 75 R413 75 0 . 0 1 uF C396 H6 DDR0_ DQM1 A2 DDR0_ DQM_1 H6 DDR0_ DQM6 D6 DDR0_ DQM_6 GN D D 5 ; H 5 ; I3 B 5 ; B 2 ; D 5 ; H 5 ; I1 DDR0_CK E DDR0_ADDR[0-12] A1;A4;D5;H7;I2 R369 33 H6 DDR0_ DQM0 R370 75 R376 75 C318 0 . 1 uF C331 470p F DDR0_ DQM_4 F1 DDR0_VT T DDR0_RE F DDR_DATA[61] DDR_DATA[56] DDR_DATA[58] R335 33 DDR0_M_Data[61 ] DDR0_M_Data[56 ] DDR0_M_Data[58 ] DDR_DATA[36] DDR_DATA[54] R333 33 DDR0_M_Data[54 ] DDR0_M_Data[51 ] DDR0_M_Data[49 ] DDR0_M_Data[58 ] DDR0_M_Data[56 ] DDR0_M_Data[61 ] R329 33 R330 33 R327 33 DDR0_M_Data[29 ] DDR0_M_Data[24 ] DDR0_M_Data[26 ] DDR0_M_Data[33 ] DDR0_M_Data[35 ] DDR0_M_Data[38 ] DDR0_M_Data[22 ] DDR0_M_Data[19 ] DDR0_M_Data[17 ] DDR0_M_Data[26 ] DDR0_M_Data[24 ] DDR0_M_Data[29 ] R318 33 DDR_DATA[63] R316 33 DDR0_M_Data[52 ] DDR0_M_Data[59 ] DDR0_M_Data[57 ] DDR0_M_Data[60 ] DDR0_M_Data[62 ] DDR0_M_Data [1] DDR0_M_Data [3] DDR0_M_Data [6] DDR0_M_Data[63 ] DDR0_M_Data[62 ] DDR0_M_Data[60 ] DDR0_M_Data[57 ] DDR0_M_Data[59 ] DDR0_M_Data[63 ] DDR_DATA[55] DDR_DATA[50] DDR_DATA[48] R314 33 DDR0_M_Data[53 ] DDR0_M_Data[55 ] DDR0_M_Data[50 ] DDR0_M_Data[48 ] DDR_DATA[36] DDR_DATA[43] DDR_DATA[41] DDR_DATA[44] DDR_DATA[46] R312 33 R310 33 DDR0_M_Data[39 ] DDR0_M_Data[36 ] DDR0_M_Data[43 ] DDR0_M_Data[41 ] DDR0_M_Data[44 ] DDR0_M_Data[46 ] DDR0_M_Data[47 ] DDR0_M_Data[46 ] DDR0_M_Data[44 ] DDR0_M_Data[41 ] DDR0_M_Data[43 ] DDR0_M_Data[48 ] DDR0_M_Data[50 ] DDR0_M_Data[55 ] DDR0_M_Data[53 ] DDR0_M_Data[52 ] DDR0_M_Data[37 ] DDR0_M_Data[36 ] DDR0_DQ[31 ] DDR0_DQ[30 ] DDR0_DQ[28 ] DDR0_DQ[25 ] DDR0_DQ[27 ] DDR0_DQ[32 ] DDR0_DQ[34 ] DDR0_DQ[39 ] DDR0_DQ[37 ] DDR0_DQ[36 ] R351 33 DDR0_DQ[47 ] DDR0_DQ[46 ] DDR0_DQ[44 ] DDR0_DQ[41 ] DDR0_DQ[43 ] DDR0_DQ[48 ] DDR0_DQ[50 ] DDR0_DQ[55 ] DDR0_DQ[53 ] DDR0_DQ[52 ] R357 33 DDR0_DQ[63 ] DDR0_DQ[62 ] DDR0_DQ[60 ] DDR0_DQ[57 ] DDR0_DQ[59 ] R359 33 R354 33 R353 33 R348 33 R346 33 R342 33 R340 33 DDR0_DQ[0 ] DDR0_DQ[1 ] DDR0_DQ[2 ] DDR0_DQ[3 ] DDR0_DQ[4 ] DDR0_DQ[5 ] DDR0_DQ[6 ] DDR0_DQ[7 ] DDR0_DQ[8 ] B9 F10 C10 E10 E12 B10 G10 D11 F13 DDR0_DATA00 DDR0_DATA01 DDR0_DATA02 DDR0_DATA03 DDR0_DATA04 DDR0_DATA05 DDR0_DATA06 DDR0_DATA07 DDR0_DATA08 DDR0_DATA09 DDR0_DATA10 DDR0_DATA11 DDR0_DATA12 DDR0_DATA13 DDR0_DATA14 DDR0_DATA15 DDR0_DATA16 DDR0_DATA17 DDR0_DATA18 DDR0_DATA19 DDR0_DATA20 DDR0_DATA21 DDR0_DATA22 DDR0_DATA23 DDR0_DATA24 DDR0_DATA25 DDR0_DATA26 DDR0_DATA27 DDR0_DATA28 DDR0_DATA29 DDR0_DATA30 DDR0_DATA31 DDR0_DATA32 DDR0_DATA33 DDR0_DATA34 DDR0_DATA35 DDR0_DATA36 DDR0_DATA37 DDR0_DATA38 DDR0_DATA39 DDR0_DATA40 DDR0_DATA41 DDR0_DATA42 DDR0_DATA43 DDR0_DATA44 DDR0_DATA45 DDR0_DATA46 DDR0_DATA47 DDR0_DATA48 DDR0_DATA49 DDR0_DATA50 DDR0_DATA51 DDR0_DATA52 DDR0_DATA53 DDR0_DATA54 DDR0_DATA55 DDR0_DATA56 DDR0_DATA57 DDR0_DATA58 DDR0_DATA59 DDR0_DATA60 DDR0_DATA61 DDR0_DATA62 DDR0_DATA63 DDR0_ADDR0 0 DDR0_ADDR0 1 DDR0_ADDR0 2 DDR0_ADDR0 3 DDR0_ADDR0 4 DDR0_ADDR0 5 DDR0_ADDR0 6 DDR0_ADDR0 7 DDR0_ADDR0 8 DDR0_ADDR0 9 DDR0_ADDR1 0 DDR0_ADDR1 1 DDR0_ADDR1 2 DDR0_BA 0 DDR0_BA 1 DDR0_DM 0 DDR0_DM 1 DDR0_DM 2 DDR0_DM 3 DDR0_DM 4 DDR0_DM 5 DDR0_DM 6 DDR0_DM 7 DDR0_ DQS 0 DDR0_ DQS 1 DDR0_ DQS 2 DDR0_ DQS 3 DDR0_ DQS 4 DDR0_ DQS 5 DDR0_ DQS 6 DDR0_ DQS 7 DDR0_RA S DDR0_CA S DDR0_ WE EXT_DDR0_C LK DDR0_CL K0 DDR0_CLK0 B DDR0_CL K1 DDR0_CLK1 B DDR0_CK E DDR0_CSB 0 DDR0_VREF 0 DDR0_VREF 1 DDR0_BVDD1P2_ 0 DDR0_BVDD1P2_ 1 DDR0_BVSS_ 0 DDR0_BVSS_ 1 DDR0_PLL_AIO DDR0_VDDO2P5_ 1 DDR0_VDDO2P5_ 2 DDR0_VDDO2P5_ 3 DDR0_VDDO2P5_ 4 DDR0_VDDO2P5_ 5 DDR0_VDDO2P5_ 6 DDR0_VDDO2P5_ 7 DDR0_VDDO2P5_ 8 DDR0_VDDO2P5_ 9 DDR0_VDDO2P5_1 0 DDR0_VDDO2P5_1 1 DDR0_VDDO2P5_1 2 DDR0_VDDO2P5_1 3 DDR0_VDDO2P5_1 4 DDR0_VDDO2P5_1 5 DDR0_VDDO2P5_1 6 DDR0_VDDO2P5_1 7 DDR0_VDDO2P5_1 8 DDR0_VDDO2P5_1 9 DDR0_VDDO2P5_2 0 DDR0_VDDO2P5_2 1 DDR0_VDDO2P5_2 2 DDR0_VDDO2P5_2 3 DDR0_VDDO2P5_2 4 C19 D18 B18 B17 D17 C17 C18 G18 E18 G17 B19 F17 E17 C20 D19 F11 G11 F15 G15 E22 F22 F26 D26 E11 R320 F12 R322 G14 R324 F16 R326 G21 R328 G22 R331 E25 R332 E26 R334 E19 G19 G20 G26 C13 D13 D23 C23 F18 F19 B8 B29 D9 D28 C9 D29 A30 A9 A12 A15 A18 A21 A24 A27 F9 J 11 J 12 J 13 J 14 J 15 J 16 J 17 J 18 J 19 J 20 J 21 J 22 J 23 J 24 J 25 G24 C346 0 . 1 uF C347 C348 0 . 0 1 uF 1000p F DDR0_M_Data[42 ] DDR0_M_Data[40 ] DDR0_M_Data[45 ] DDR0_M_Data[54 ] DDR0_M_Data[51 ] C349 0 . 1 uF C350 0 . 0 1 uF C351 1000p F DDR0_M_Data[49 ] R404 75 C343 0 . 1 uF C344 0 . 0 1 uF C345 1000p F C338 C339 33uF 10uF C340 0 . 1 uF C341 0 . 0 1 uF C342 1000p F DDR0_M_Data[26 ] DDR0_M_Data[24 ] DDR0_M_Data[29 ] DDR0_M_Data[38 ] DDR0_M_Data[35 ] DDR0_M_Data[33 ] R402 75 R401 75 470p F D2.6V DDR0_M_Data[10 ] DDR0_M_Data [8] DDR0_M_Data[13 ] DDR0_M_Data[22 ] DDR0_M_Data[19 ] DDR0_M_Data[17 ] C391 R434 75 470p F 470p F R399 75 C375 C390 4 . 7 uF 0 . 1 uF 4 . 7 uF 1uF 470p F C360 470p F C398 C332 C397 C333 C334 C335 0 . 1 uF C356 1uF R352 R355 R356 R358 R360 33 33 33 33 33 33 DDR0_ADDR1 0 DDR0_BA_ 0 DDR0_BA_ 1 DDR0_ DQM0 DDR0_ DQM1 DDR0_ DQM2 DDR0_ DQM3 DDR0_ DQM4 DDR0_ DQM5 DDR0_ DQM6 DDR0_ DQM7 33 33 33 33 33 33 33 33 R385 33 R337 33 R339 33 R341 33 R343 33 R344 33 R347 33 R349 33 R350 33 DDR0_CSB b DDR0_RAS b DDR0_CAS b DDR0_WE b DDR0_CL K0DDR0_RE F DDR0_CLK0 b DDR0_CL K1 DDR0_CLK1 b DDR0_CK E DDR0_M_Data[63 ] A1.2V DDR0_M_Data[62 ] DDR0_M_Data[60 ] DDR0_M_Data[57 ] DDR0_M_Data[59 ] DDR0_M_Data [6] DDR0_M_Data [3] DDR0_M_Data [1] R398 75 1000p F C373 470p F L302 DDR0_M_Data[52 ] R396 75 1000p F C372 C388 470p F DDR0_ DQS 0 DDR0_ DQS 1 DDR0_ DQS 2 DDR0_ DQS 3 DDR0_ DQS 4 DDR0_ DQS 5 DDR0_ DQS 6 DDR0_ DQS 7 DDR0_M_Data[47 ] DDR0_M_Data[46 ] DDR0_M_Data[44 ] DDR0_M_Data[41 ] DDR0_M_Data[43 ] DDR0_M_Data[48 ] DDR0_M_Data[50 ] DDR0_M_Data[55 ] DDR0_M_Data[53 ] R395 75 1000p F C371 0 . 0 1 uF C386 1000p F C370 0 . 0 1 uF C385 R394 75 R305 R306 R309 R311 R313 R315 R317 R319 75 75 75 75 75 75 75 75 DDR0_M_Data[30 ] DDR0_M_Data[28 ] DDR0_M_Data[25 ] DDR0_M_Data[27 ] DDR0_M_Data[32 ] DDR0_M_Data[34 ] DDR0_M_Data[39 ] DDR0_M_Data[37 ] DDR0_M_Data[36 ] R393 75 1000p F C368 0 . 0 1 uF C383 R392 75 DDR0_M_Data[31 ] R391 75 R384 R383 R382 33 DDR0_ ADDR[1] DDR0_ ADDR[2] DDR0_ ADDR[3] DDR0_ ADDR[4] DDR0_ ADDR[5] DDR0_ ADDR[6] DDR0_ ADDR[7] DDR0_ ADDR[8] DDR0_ ADDR[9] DDR0_ ADDR[11] DDR0_ ADDR[12] DDR0_VT T DDR0_M_Data[20 ] 75 R390 0 . 1 uF C366 0 . 0 1 uF C381 33 DDR0_M_Data[16 ] DDR0_M_Data[18 ] DDR0_M_Data[23 ] DDR0_M_Data[21 ] R389 0 . 1 uF C365 0 . 0 1 uF C380 75 DDR0_BA_ 0 H6 H6 H6 DDR0_ ADDR[10] DDR0_ ADDR[0] DDR0_BA 0 DDR0_BA 1 DDR0_BA_ 1 DDR0_ADDR1 0 DDR0_M_Data [0] DDR0_M_Data [2] DDR0_M_Data [7] DDR0_M_Data [5] DDR0_M_Data [4] R387 75 DDR0_M_Data[15 ] DDR0_M_Data[14 ] DDR0_M_Data[12 ] DDR0_M_Data [9] DDR0_M_Data[11 ] R388 0 . 1 uF C364 0 . 0 1 uF C379 75 0 . 1 uF C363 0 . 0 1 uF C378 0 . 1 uF C362 0 . 0 1 uF C377 0 . 1 uF C361 0 . 0 1 uF C376 DDR0_ADDR[0-12] DDR0_VT T
JP72 6
J 7 04 PPJ200-0 7
L703 HH-1M2012-12 1
+9 V 6:AM4 MNT_L_OUT C73 0 0.1uF

READ Y
JP73 2
J701
R386 75
5B 0 R814
PMJ029-0 1
ZD716 75 R818
D2.6V
IC301 HY5DU56 162 2FTP-D 43 -C

VDD_1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 VSS_ 3 DQ15 VSSQ_ 5 DQ14 DQ13
D2.6V D2.6V
IC302 HY5DU561622 FTP-D 43-C

VDD_1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 VSS_ 3 DQ15
DDR_DATA[5 ] D2.6V DDR_DATA[7 ] DDR_DATA[2 ] DDR_DATA[0 ] DDR_DATA[15] DDR_DATA[48] DDR_DATA[4 ] DDR_DATA[49] DDR_DATA[50] DDR_DATA[11 ] DDR_DATA[9 ] DDR_DATA[12] DDR_DATA[14] DDR_DATA[51] DDR_DATA[55] DDR_DATA[21] DDR_DATA[23] DDR_DATA[18] DDR_DATA[16] DDR_DATA[54] DDR_DATA[53] DDR_DATA[20] DDR_DATA[52] DDR_DATA[27] DDR_DATA[25] DDR_DATA[28] DDR_DATA[30] DDR_DATA[37] DDR0_ DQS 6 H5 DDR_DATA[39] DDR_DATA[34] DDR_DATA[32] C314 0 . 1 uF C325 470p F DDR_DATA[47] DDR0_RE F DDR_DATA[31]
DDR0_M_Data [5] DDR0_M_Data [7] DDR0_M_Data [2] DDR0_M_Data [0] DDR0_M_Data[15 ] DDR0_M_Data [0] DDR0_M_Data [2] DDR0_M_Data [7] DDR0_M_Data [4] DDR0_M_Data[11 ] DDR0_M_Data [5] DDR0_M_Data [4]
S-VIDEO1_ C
6:Y12
2B 4A 3A
C731 100u F READ Y
READ Y
JP73 5 14 R875 READ Y 13 JP73 6 12 C729
6 7A 7B 7C 7D 8 2A 3A 4A 2B 5B 2C
0 . 1 uF C367 0 . 0 1 uF C382
[S-VHS]GROUND_TE R [S-VHS]C_LUG_L 1 [S-VHS]C_LUG_L 2 [S-VHS]C_LUG_L 3 [S-VHS]C_LUG_L 4 [S-VHS]0_SPRIN G
IC100 BCM355 3
4:C3
D_EYE
GN D
DDR_DATA[27]
DQ0 VDDQ_1
DDR_DATA[16]
DDR_DATA[59]
DQ0 VDDQ_1
R301 33
S-VIDEO1_ L
ZD718 75 R819
6:Y12
2A
6:AM4 MNT_R_OU T
VSSQ_ 5 DQ14 DQ13 VDDQ_5 DQ12 DQ11 VSSQ_ 4 DQ10 DQ9 VDDQ_4 DQ8 NC_7 VSSQ_ 3 UDQ S NC_6 VREF VSS_ 2 UDM /CK C K CKE NC_5 B 5 ; B 2 ; D 2 ; H 5 ; I1 DDR0_CK E
0 R815
DDR_DATA[26] DDR_DATA[25]
DQ1 DQ2 VSSQ_ 1
JP73 1
DQ1 DQ2 VSSQ_ 1
5:C2
AV_R_IN_2
C727 100p F
R862 470K
R302 33
DDR0_M_Data [9] DDR0_M_Data[12 ] DDR0_M_Data[14 ] DDR0_M_Data[21 ] DDR0_M_Data[15 ] DDR0_M_Data[14 ] DDR0_M_Data[12 ] DDR0_M_Data [9] DDR0_M_Data[11 ] DDR0_M_Data[16 ] DDR0_M_Data[18 ] DDR0_M_Data[23 ] DDR0_M_Data[20 ] DDR0_M_Data[27 ] DDR0_M_Data[21 ] DDR0_M_Data[20 ]
S-VIDEO1_S W
R755 0
ZD735 75 R820
1:H5 6:Y10
GN D
5.6K R858
1uF
JP73 7 ZD744 ZD725
11
VDDQ_5 DQ12 DQ11 VSSQ_ 4 DQ10 DQ9 VDDQ_4 DQ8 NC_7 VSSQ_ 3 UDQ S NC_6 VREF VSS_ 2 UDM DDR0_ DQM_2 /CK C K CKE NC_5 A12 A11 A9 A8 A7 A6 A5 A4 VSS_ 1 DDR0_ ADDR[12] DDR0_ ADDR[11] DDR0_ADDR[9] DDR0_ADDR[8] DDR0_ADDR[7] DDR0_ADDR[6] DDR0_ADDR[5] DDR0_ADDR[4] DDR0_BA 0 DDR0_BA 1 DDR0_CL K0 DDR0_CK E DDR0_CLK0 b DDR0_WE b DDR0_CAS b DDR0_RAS b DDR0_CSB b C312 0 . 1 uF C315 470p F F2 DDR0_ DQM_7 H6 DDR0_ DQS 2 DDR0_RE F H5 DDR0_ DQS 7 DDR_DATA[20] DDR_DATA[63] DDR_DATA[22] DDR_DATA[21] DDR_DATA[61] DDR_DATA[62] DDR_DATA[19] DDR_DATA[23] DDR_DATA[56] DDR_DATA[60]
10
DQ3 DQ4 VDDQ_2
DQ3 DQ4 VDDQ_2 DQ5 DQ6 VSSQ_ 2 DQ7 NC_1 VDDQ_3 LDQS NC_2 VDD_2 NC_3 LDM /WE /CAS /RAS /CS NC_4 BA0 BA1
ZD717
DDR0_M_Data[18 ] DDR0_M_Data[16 ] DDR0_M_Data[31 ]
ZD706
DQ5 DQ6 VSSQ_ 2
ZD703
R304 33
DDR0_DQ[9 ] C12 DDR0_DQ[10 ] E13 DDR0_DQ[11 ] B12 DDR0_DQ[12 ] D12 DDR0_DQ[13 ] G12 DDR0_DQ[14 ] B11 DDR0_DQ[15 ] C11 DDR0_DQ[16 ] B13 DDR0_DQ[17 ] G13 DDR0_DQ[18 ] D14 DDR0_DQ[19 ] E14 DDR0_DQ[20 ] E15 DDR0_DQ[21 ] B14 DDR0_DQ[22 ] F14 DDR0_DQ[23 ] C14 DDR0_DQ[24 ] E16 DDR0_DQ[25 ] B16 DDR0_DQ[26 ] G16 DDR0_DQ[27 ] C16 DDR0_DQ[28 ] C15 DDR0_DQ[29 ] D16 DDR0_DQ[30 ] B15 DDR0_DQ[31 ] D15 DDR0_DQ[32 ] B20 DDR0_DQ[33 ] F20 DDR0_DQ[34 ] D20 DDR0_DQ[35 ] F21 DDR0_DQ[36 ] C21 DDR0_DQ[37 ] B21 DDR0_DQ[38 ] E21 DDR0_DQ[39 ] E20 DDR0_DQ[40 ] F23 DDR0_DQ[41 ] D22 DDR0_DQ[42 ] G23 DDR0_DQ[43 ] B23 DDR0_DQ[44 ] C22 DDR0_DQ[45 ] E23 DDR0_DQ[46 ] B22 DDR0_DQ[47 ] D21 DDR0_DQ[48 ] B24 DDR0_DQ[49 ] E24 DDR0_DQ[50 ] C24 DDR0_DQ[51 ] G25 DDR0_DQ[52 ] C25 DDR0_DQ[53 ] D24 DDR0_DQ[54 ] F25 DDR0_DQ[55 ] B25 DDR0_DQ[56 ] D27 DDR0_DQ[57 ] B27 DDR0_DQ[58 ] C28 DDR0_DQ[59 ] B28 DDR0_DQ[60 ] C26 DDR0_DQ[61 ] C27 DDR0_DQ[62 ] D25 DDR0_DQ[63 ] B26
JP73 3
[YL]0_SPRING [YL]CONTAC T [WH]1P_CAN [WH]C_LUG_L
PEJ024-0 1 3 6A E_SP RING T_TERMINAL1 B_TERMINAL1 R_SP RING T_SP RING B_TERMINAL2 T_TERMINAL2 SHIELD_PLATE
C726 100p F
5.6K R859
R863 470K
R303 33
DDR0_M_Data[23 ]
[Y L]1P_CA N
COMPOSITE1_I N
J703
C728 5:A2
AV_L_IN_ 2
1uF
GN D ZD745 ZD724 GN D JP73 9 7 JP73 8 9
0 6:Y10 COMPOSITE2_I N C733 C740 27pF 50V

R851 75
GN D
COMPOSITE1_S W
C701
R855
DDR_DATA[31]
DQ7 NC_1 VDDQ_3
R805 470K
R307 33
DDR0_M_Data[25 ] DDR0_M_Data[28 ] DDR0_M_Data[30 ] DDR0_M_Data[37 ]
AV_L_IN_ 1
ZD739 ZD705 1uF C700 1uF
1:H3 5:A2
7A 4 5
RGB_R_I N
1uF C720 100p F R835 470K
5:C2 COMPOSITE2_S W 1:H4
[RD]1P_CA N [RD]0_SPRIN G [RD]CONTACT
5.6K R816
C702 100p F GN D
5.6K R837
JP74 0
JP74 1 ZD746 ZD747 ZD748
3C 4C
R749 470K
H5 DDR0_ DQS 3 D7 DDR_DATA[0-63]
LDQS NC_2 VDD_2 NC_3 LDM
AV_R_IN_1
ZD740 ZD704 GN D
R308 33
DDR0_M_Data[39 ] DDR0_M_Data[34 ] DDR0_M_Data[32 ] DDR0_M_Data[47 ]
5:C2
7B 6B 8
5.6K R817
C703 100p F
C732
RGB_L_I N
C719 100p F
JP73 4
5:A2
1:H2
S-VIDEO2_S W S-VIDEO2_ C
R852
4 R856 0 C738 27pF 50V R857 0

75 R853 75
1uF R836 470K
5.6K R838
ZD726
ZD731
ZD730 3 JP74 2
6:Y11
GN D
E1 A 2 ; B 5 ; B 2 ; H 5 ; I1 A 2 ; B 5 ; B 2 ; H 5 ; I1 A 2 ; B 5 ; B 2 ; H 5 ; I1 A 2 ; B 5 ; B 2 ; H 5 ; I2
DDR0_ DQM_3 DDR0_WE b DDR0_CAS b DDR0_RAS b DDR0_CSB b
/WE /CAS /RAS /CS NC_4 BA0
1000p F C369
0 . 0 1 uF C384
6:Y11
S-VIDEO2_ L
C739 27pF 50V
1 ZD749 ZD750 R700 ZD727 ZD728 0 3216 GN D JP74 3 JP74 4 SMW200-1 4 C716 0 . 0 1 uF
JP72 7
JP72 8
JP72 9
JP73 0
GN D
P70 0
6:Y14
DDR0_BA 0 DDR0_BA 1
6:Y15
6:Y14
A 2 ; B 5 ; B 2 ; H 7 ; I1 A 2 ; B 5 ; B 2 ; H 7 ; I1
BA1 A10/AP A0 A1 A2
GN D
DDR0_ ADDR[10] A10/AP DDR0_ADDR[0] DDR0_ADDR[1] DDR0_ADDR[2] DDR0_ADDR[3] A0 A1 A2 A3 VDD_3
RGB_ G
RGB_ R
COMP1_P b
R397 75
C389
DDR0_ ADDR[10]
DDR0_ADDR[1]
DDR0_ADDR[0]
DDR0_ADDR[2]
DDR0_ADDR[3]
A3 VDD_3
COMP1_Pr
B 5 ; B 2 ; D 5 ; D 2 ; I1
COMP1_ Y
COMP2_P b
COMP2_ Y
6:Y13
6:Y13
C374 470p F
C387 470p F
6:Y13
6:Y13
6:Y12
6:Y12
COMP2_Pr
R794 75
R798 75
R750 75
R823 75
C710
R827 75
C712
R832 75
C714
RGB_ B
DDR0_ADDR[0-12] A1;D5;D2;H7;I2
DDR0_M_Data [6] DDR0_M_Data [3] DDR0_M_Data [1] DDR0_M_Data[10 ] DDR0_M_Data [8] DDR0_M_Data[13 ]
DDR0_DQ[6 ] DDR0_DQ[3 ] DDR0_DQ[1 ] DDR0_DQ[10 ] DDR0_DQ[8 ] DDR0_DQ[13 ] R362 33 R363 33 DDR0_DQ[22 ] DDR0_DQ[19 ] DDR0_DQ[17 ] DDR0_DQ[26 ] DDR0_DQ[24 ] DDR0_DQ[29 ] R364 33 R365 33 DDR0_DQ[38 ] DDR0_DQ[35 ] DDR0_DQ[33 ] DDR0_DQ[42 ] DDR0_DQ[40 ] DDR0_DQ[45 ] R366 33 R367 33 DDR0_DQ[54 ] DDR0_DQ[51 ] DDR0_DQ[49 ] DDR0_DQ[58 ] DDR0_DQ[56 ] DDR0_DQ[61 ]
R361 33
+9 V
L708 120OH M
IC701 AT24C02BN-10SU-1. 8
A0 VCC
4.7K R867
+5.0V +5.0V
4.7K R868
L704 FI-A2012-271KJ T
L705 FI-A2012-271KJ T
L706 FI-A2012-271KJ T
C704
C706
C708
D2.6V
L700 FI-A2012-271KJ T
27pF
C713
C715
DDR_DATA[22]
27pF
27pF
D2.6V
DDR_DATA[19] D2.6V
L702 FI-A2012-271KJ T
D2.6V
L701 FI-A2012-271KJ T
IC303 HY5DU56 162 2FTP-D 43 -C

VDD_1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 VSS_ 3 DQ15 VSSQ_ 5 DQ14 DQ13 VDDQ_5 DQ12 DQ11 VSSQ_ 4 DQ10 DQ9 VDDQ_4 DQ8 NC_7 VSSQ_ 3 UDQ S NC_6
IC304 HY5DU561622 FTP-D 43 -C

VDD_1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 VSS_ 3 DQ15 VSSQ_ 5 DQ14 DQ13 VDDQ_5 DQ12 DQ11 VSSQ_ 4 DQ10 DQ9
DDR_DATA[17]
27pF
27pF
27pF
C711
16V 0 . 1 uF C744
C743 0 . 1 uF 16V
C742 10uF 16V

R730 15K R715 15K R710 15K
JP74 5 A1 2 7 WP
C724 0 . 1 uF R873 1K
C705
C709
DDR_DATA[11 ]
DQ0 VDDQ_1
DDR_DATA[0 ]
DDR_DATA[43]
DQ0 VDDQ_1
C707
27pF
27pF
27pF
GND
TP18 8
A2 C
C B E Q703 2SC3875 S R727 22

TP18 7
SCL
22
R860 C
C
TP18 9
Q70 0
B 4:H2;6:A B28;6:A B24;6:A B21
RGB_H S
R731 6.8K
R707 6.8K
R712 6.8K
TP19 1
TP19 0
TP18 6
R728 1K
5:C2 COMP_R_IN_ 1
5:A2 COMP_L_IN_ 1
DDR_DATA[12]
DQ4 VDDQ_2
DDR_DATA[7 ]
DDR_DATA[44]
DQ4 VDDQ_2
DDR0_M_Data[45 ] DDR0_M_Data[40 ] DDR0_M_Data[42 ] DDR0_M_Data[49 ] DDR0_M_Data[51 ] DDR0_M_Data[54 ]
DDR0_M_Data[38 ] DDR0_M_Data[35 ] DDR0_M_Data[33 ] DDR0_M_Data[42 ] DDR0_M_Data[40 ] DDR0_M_Data[45 ]
R403 75
1:H4 COMP1_S W
DDR_DATA[8 ]
DQ3
DDR_DATA[3 ]
DDR_DATA[40]
DQ3
1:H4 COMP2_S W
R725 1K
R717 1K
VSSQ_ 1
5:A2 COMP_L_IN_ 2
5:C2 COMP_R_IN_ 2
VSSQ_ 1
6:Y14
6:Y14
DDR_DATA[9 ]
DQ2
DDR_DATA[2 ]
DDR_DATA[41]
DQ2
RGB_V S
27pF
DDR_DATA[10]
DQ1
DDR_DATA[1 ]
DDR_DATA[42]
DQ1
B E
27pF
27pF
Q701 2SC3875 S R714 22
Q702 2SC3875 S R729 E 22
GN D
SD A
22
R861
GND
E
/W_PROTEC T
KRC102 S
GND GND
GND
GND
GND GND GND

ZD729
DQ5 DQ6 VSSQ_ 2
DDR_DATA[6 ] DDR_DATA[5 ]
DQ5 DQ6 VSSQ_ 2
RGB_S W
ZD719
R854
1:H2
5. 6K R829
5. 6K R752
5. 6K R746
DDR_DATA[15]
DQ7 NC_1 VDDQ_3 LDQS
DDR_DATA[4 ]
R847
10K
NC_1 VDDQ_3 H6 DDR0_ DQS 0 DDR0_RE F H5 DDR0_ DQS 5 LDQS NC_2 VDD_2 C316 0 . 1 uF C313 470p F F1 DDR0_ DQM_5 NC_3 LDM /WE /CAS /RAS /CS NC_4 DDR0_BA 0 DDR0_BA 1 BA0 BA1
1uF
C737
C734
1uF
1uF
R747 470K
DQS 1 H6 DDR0_
R834 470K
NC_2 VDD_2 NC_3 LDM
R753 470K
DDR0_M_Data[61 ]
DDR0_VT T
R830 470K
DDR0_M_Data[56 ]
C736
DDR0_M_Data[58 ]
C735
R405 75
1uF
READ Y C741 0 . 0 1 uF 50V
READ Y R721 82
22 R839
C717 22pF 22 R843
10K
DDR_DATA[47]
DQ7
READ Y R720 82
READ Y R702 82
READ Y C748 0 . 0 1 uF 50V
5. 6K R833
READ Y R722 82
READ Y R705 82
READ Y R723 82
ZD720
C718 22pF
GND
JP72 0 JP72 2 JP71 4
DDC_SC L
C745 10uF 16V
4:D3 4:D3
VREF VSS_ 2 UDM /CK C K CKE NC_5 A12 A11 A9 A8 A7 A6 A5 A4 VSS_ 1 DDR0_CL K0 DDR0_CK E DDR0_ ADDR[12] DDR0_ ADDR[11] DDR0_ADDR[9] DDR0_ADDR[8] DDR0_ADDR[7] DDR0_ADDR[6] DDR0_ADDR[5] DDR0_ADDR[4]
ZD737
ZD702
ZD700
ZD701 5.1V ZD732
ZD707
DDR0_CL K1 D5;D2;H5 DDR0_VT T R408 DDR0_VT T DDR0_ADDR[0-12] A1;A4;D5;D2;H7 DDR0_CLK1 b D5;D2;H5 R411 DDR0_CL K0 B5;B2;H5 R412 75 R407 75 DDR0_ ADDR[12] NC 1 8 VTT DDR0_ ADDR[11] DDR0_ADDR[9] PVC C DDR0_ADDR[4] DDR0_ADDR[3] DDR0_ADDR[2] DDR0_ADDR[1] R410 75 0 . 0 1 uF C395 R409 75 0 . 0 1 uF C394 0 . 0 1 uF C393 DDR0_CLK0 b B5;B2;H5 D2.6V 75 75 0 . 0 1 uF C392
ZD734
R368 33
R406
ZD738
75
ZD733 5.1V
JP70 8 ZD710
R844 0
75 R840
DDC_SD A
JP71 6 ZD741 ZD721 JP71 9 JP71 7
/RAS /CS NC_4 BA0
DDR0_RAS b DDR0_CSB b
JP70 1
[GN]O_SPRIN G [GN]CONTACT [GN]1P_CA N [BL]1P_CAN
ZD708 ZD709
[RD]O_SP RING [RD]CONTACT [RD]1P_CAN 1 [RD]1P_CAN 2 [WH]C_LUG_L [RD]C_LUG_L
JP71 1
[RD]O_SP RING [RD]CONTACT [RD]1P_CAN 2 [WH]C_LUG_L
C746 10uF 16V
JP70 3 JP70 4
JP70 7 [BL]1P_CAN ZD711
[GN]O_SPRIN G
[GN]CONTACT
[RD]1P_CAN 1
[BL]C_LUG_L
R371
33
A 5 ; B 5 ; B 2 ; H 7 ; I1 A 5 ; B 5 ; B 2 ; H 7 ; I1
B2 DDR0_ DQM_0
BA1 A10/AP A0 A1 A2
220u F
PPJ209-0 2
2E
5C
2C
2B
5B
2D
PPJ209-0 2
2E
2B
5C
2C
5B
2D
5D
2A
4A
3A
3E
4E
5D
2A
4A
3A
3E
4E
DDR0_BA 1
C747 10uF 16V
DDR0_BA 0
H6 DDR0_ DQM7
R375 33
R377 33
B6 DDR0_ DQM_7
JP71 3
C352
C336 10uF
JP70 6
75 R841
IC305 SC2595ST R
[WH]1P_CAN
[WH]1P_CAN
[GN]1P_CA N
JP70 5
[BL]C_LUG_L
[RD]C_LUG_L
DQM_1 E2 DDR0_ A 5 ; B 5 ; B 2 ; H 5 ; I1 DDR0_WE b A 5 ; B 5 ; B 2 ; H 5 ; I1 DDR0_CAS b A 5 ; B 5 ; B 2 ; H 5 ; I1 DDR0_RAS b A 5 ; B 5 ; B 2 ; H 5 ; I2 DDR0_CSB b
ZD715
JP71 0
ZD712
/CAS
DDR0_CAS b
JP70 0
JP70 2
ZD713
/WE
ZD714
DDR0_ DQM_0 E2 DDR0_WE b DDR0_CLK0 b
ZD736 5.1V
JP70 9
JP71 5 R845 0 ZD742 ZD722 JP72 1 JP71 8
JP71 2
JP72 3
DDR0_ ADDR[10] A10/AP DDR0_ADDR[0] DDR0_ADDR[1] DDR0_ADDR[2] DDR0_ADDR[3] A0 A1 A2 A3 VDD_3
R846 0
A 03- 7071- 094 11 12 13 14
75 R842
ZD743
P701
15
DDR0_ ADDR[10]
A3 DDR0_ADDR[1] DDR0_ADDR[0] DDR0_ADDR[2] DDR0_ADDR[3] VDD_3
VDDQ
ZD723
10
16
GND
H6 DDR0_ DQM3
A5 DDR0_ DQM_3
J700
J702
D2.6V DDR0_ADDR[0-12]
D2.6V
H6 DDR0_ DQM2
B5 DDR0_ DQM_2
H6 DDR0_ DQM4
D2 DDR0_ DQM_4 A2;A5;B5;B2;H7
DDR0_BA 0 DDR0_BA 1 DDR0_ ADDR[10] DDR0_ADDR[0] R415
A4;D5;D2;H7;I2
C320 100u F
C321 0 . 1 uF
C322 0 . 0 1 uF
C323 0.047u F
C324 2700p F
C305 470p F
C326 100u F
C327 0 . 1 uF
A2;A5;B5;B2;H7 C328 0 . 0 1 uF C329 0.047u F C330 2700p F C319 470p F
75
B5;B2;D5;D2;H 5
DDR0_CK E
DDR
NVRAM
+5.0V ST_5 V L407 READ Y
INPUT CONNECTOR
RESE T
D3.3 V D3.3 V D3.3 V D3.3 V D3.3 V
LVDS OUTPUT(Full HD)

+5.0V ST_5 V
ONLY FOR PD P
R513 READ Y R514 4.7K READ Y C READ Y Q40 4 R520 2SC3875 S 470 READ Y C E READ Y R521 Q40 5 B 470 2SC3875 S READ Y C E B Q40 6 2SC3875 S READ Y E R516 4.7K READ Y READ Y R519 470
D3.3 V
L406 READ Y R506 READ Y R502 100 K READ Y C INV_ON/OFF_3. 3 H3 RL_ON_3.3 H3 B Q40 1 2SC3875 S READ Y E B READ Y R510 470 C Q40 2 2SC3875 S READ Y E C B READ Y R511 470 R508 100 K READ Y R512 4.7K READ Y READ Y R509 470 B
1 : H 1 ; 4 : F1
H 6 ; 8 : I6
R936 SCL3_3.3 V R947 DISP _EN SDA3_3.3 V
22 22
READY READY READY 52
4:H3;E3 1 : H 1 ; 4 : F1
R433 10K
2 : E1
R447
JT AG_RESET b
R431 680
SW40 0 SKHMPWE01 0 IC400 KIA7029AF R430 330 I 1 2 3 O
IC401
1K 1K R444 R400
IC403
AT24C512W-10SI-2. 7
A0 1 8 VCC C417 0 . 1 uF
R507 100 K READ Y
INV_ON/OF F
H 6 ; 8 : I6
R937 22
RL_O N
H6;8:H7
3 7 " 4 7 " F Ul l H D : A s se mbl e 42" FUll HD(WCG) : NOT Assembl e
D3.3 V
L900 ONLY FOR LCD R939 4.7K LCD C901 0 . 1 uF R940 READY READY R903 4.7K
R945
1K 51 50 49 48 47 46
READY
LVDS OUTPUT(WXGA)
R933 47K
1K
+12.0V
74L VC14AP W
1A 1 14 VCC
LIVE_ON
D3.3 V
C900 0 . 1 uF
Q901 SI4925BD Y
A1 G C401 10uF 1Y 2 13 6A C402 0 . 1 uF NC 2A 3 12 6Y GN D 2Y 4 11 5A
WP
VBR_A
SC L
R435 22 R436 22
LIVE_ON_3.3 H3 1:A2;1:H1;5:A5;9:E 4 SCL2_3.3 V
Q40 3 2SC3875 S READ Y E
S1
D1_2
L901 WXGA_LCD_12 V A2;E3
GND GND
4 :F5 ; E5 VBR_B_EX T 8:H6 VBR_B_FH D LCD R943 R941 READY R942 0 0 READY 0
WXGA_WAFER
P900 FOR PANEL POWER SEQUENCE T1 TIMIN G
R972 47K
G1
D1_1
8:H6
SD A
1:A2;1:H1;5:A5;9:E 4 SDA2_3.3 V
R503 R504
0 0 0
GN D INV_ON/OFF RL_ON LIVE_ON
J 7 ; 8 : I6
GN D
4.7K R934 READY 4:C3;E4 AI_ON/OFF
R935 0
45 44 43 42 1:B5;A3 41 LVDS_TX_OUT_TA0LVDS_TX_OUT_TA0+ R953 4 :F5 ; B5 VBR_B_EX T READY D 8 : H 6 ; 8 : I6VBR_B_H WXGA 0 WXGA R951 0 R952 0 1:B5;A3 40 39 38 37 36 35 34 1:B5;A3 1:B5;A3 LVDS_TX_OUT_TA2LVDS_TX_OUT_TA2+ READY R949 0 R950 READY 0 WXGA_LCD R967 R968 0 0 GND This Point Must be checke .d
FI-X30SSL-H F
S2
D2_2
C902 0 . 1 uF 50V
C904 47uF 25V
G2
D2_1
3Y b SYS_RESET 1 1 : D 6 ; 2 : B 3 ; 8 : A 3 ; 11 : O 1 GN D
4A
2 E 3 4 5 6 7 8 9
2SC3875 S
C907 8200p F 50V
SYS_RESE T 10:AC4
10
9 : B 5 ; 9 : E5
3A
5Y
J 7 ; 8 : I6 J7 ; 8 :H 7
R505
GND
C 1 4:H3 LVDS_PANEL_CTR L R932 1KB Q900
FOR PAN EL PO WER S EQUENCE T1 TIMING 0.1U/16V --> 0.1U/50 V 47U/16V --> 47U/25 V
LCD Module Onl y
GND
4Y C418 0 . 1 uF C419 10uF
VBR_B_EX T
8:H6
1:B4 1:B5 1:B5 1:B5 1:B5
LVDS_TX_OUT_TB4 + LVDS_TX_OUT_TB4LVDS_TX_OUT_TB3 + LVDS_TX_OUT_TB3LVDS_TX_OUT_TB1 + LVDS_TX_OUT_TB1-
WXGA_LCD
5V_MNT
GND
FOR PANEL POWER SEQUENCE T1 TIMIN G
D403
GND
6.8K R471
LED_R
LED_G
IC404 Ser i a l
IC402
ADM3232E AR NZ
A2
A1
+3.3V
D e t e c t + 3 . 3 V f o r P o w e r S e q u e n c e ( B C M 1 . 2 V, 2 . 6 V, 3 .)3 V
1:B5
3.3VST_MICO M
KDS18 4
P o rt
B2
B1
A Z1117H-3.3 INPUT C405 10uF 3 2 OUTPU T 1 ADJ/GN D
3.3K R474
R475
1K
ST_5 V
1:B4 1:B4
LVDS_TX_OUT_TBC+ LVDS_TX_OUT_TBC -
33 32 31
1:B4;A3 1:B4;A3
LVDS_TX_OUT_TACLVDS_TX_OUT_TAC+
10 11 12
GND
R478 6.8K
1:B5 1:B5
LVDS_TX_OUT_TB2 + LVDS_TX_OUT_TB2LVDS_TX_OUT_TB0 +
GND C40 6 22u F

D404
30 29 28
1:B5;A3 1:B5;A3
LVDS_TX_OUT_TA1LVDS_TX_OUT_TA1+
13 14 15
3.3VST_MICO M
C424 10uF
C425 0 . 1 uF
1:B5
3.3VST_MICO M
6.8K R473
P400
C408 0 . 1 uF JP40 7 JP40 6
1
D3.3 V
R938
1K
R944 1K
GND
GND
1:B5
LVDS_TX_OUT_TB0READY
27 26 25
1:B5;A4 1:B5;A4
LVDS_TX_OUT_TA3LVDS_TX_OUT_TA3+
16 17 18
16
A2
A1
C407 0 . 1 uF C420 0 . 1 uF C404 0 . 1 uF C403 0 . 1 uF
C1+
VCC
6:L26
GND
HDMI_CEC
GND
R482 1K
1:B5;E4 1:B5;E4
LVDS_TX_OUT_TA4+ LVDS_TX_OUT_TA4LVDS_TX_OUT_TA3+ LVDS_TX_OUT_TA3LVDS_TX_OUT_TA1+ LVDS_TX_OUT_TA1-
V+
15
G N D
RxD TxD
6 2
KDS18 4 R483 R484 1K 1K 1K
24 23 22 21 20 19 18
1:B5;A4 1:B5;A4
LVDS_TX_OUT_TA4LVDS_TX_OUT_TA4+ SCL2_3.3 V AI_ON/OFF SDA2_3.3 V READY 0
19 20
+12.0 V
C1-
14
T1OU T
7 3
3.3VST_MICO M
1:B5;E4 1:B5;E4 1:B5;E4 1:B5;E4
D3.3 V
R969 R923 10 WXGA_LPL C906 100pF WXGA WXGA_LCD R963 100 R964 100 READY WXGA_LCD 0 WXGA_LCD R966 R965 0 0
21 22 23 24 25 26 2 27 28 29 30 31 GND 32 33 3 1
C2+
13
R1IN
8 4
C2-
12
R1OU T
R452 10K
1:H2 BCM_R X 1:H2 BCM_T X
C409 220p F
C410
10
IC405
JP40 8 KIA7029AF
R466
R481
READY
R970
DAC B/D Powe r
P1.4/DA 3
P1.3/DA 2
P1.2/DA 1
P1.1/DA 0
V-
T2OU T
10
T2IN
C
R2OU T
C A2
R448 47K
11
T1IN
220p F
D401 SDC1 5 A1 A2 D402 SDC1 5 A1
C B
P 5 .0
P 5 .1
VDD
R2IN
P 5 .2
P 5 .3
C3 UCOM_R X
A02-0915-10 1
Q40 0 2SC3875 S
P1.0/ET 2
P4.2/AD 2
33K
ST_5 V
I C428 0 . 1 uF
1 2
C426 0 . 1 uF
1:B4;E4 1:B4;E4
LVDS_TX_OUT_TAC+ LVDS_TX_OUT_TAC-
17 16 15
R971 4:H3;A6 DISP _EN READY A2;I 6 WXGA_LCD_12 V
READY
R439 4. 7K
36
35
44
43
42
41
40
39
38
37
34
PDP : LCD :
R462
1K
E C429 0 . 1 uF
GND
1:B5;E5 LVDS_TX_OUT_TA2+ LVDS_TX_OUT_TA2LVDS_TX_OUT_TA0+ LVDS_TX_OUT_TA0-
GND
R440
14 13 12 11 10 R946 22 9 8 7
GND GND
M i c o m Op t i o n 3 Pi n - H i g h
HSYNC/P1. 5 VSYNC/P1. 6
33 32 31 30 29 28 27 26 MTV416GM F 25 24 23
P 5. 4 P 5. 5 P 5. 6 P5.7 /CL KO2 P7.0/HBLANK P4.1/AD 1 P7.1/VBLANK P7.2/HCLAMP P 6. 7 P 6. 6 P 6. 5

GND 3.3VST_MICO M
R500 R498 1K R496 1K
1K
1:B5;E5
L VDS_P ANEL_CTR L 9:G5 DISP_E N INV_ON/OFF_3. 3 RL_ON_3. 3 AC_DE T

33K R499
1K 9 : A 6 ; 9 : E3 H7 H7 8:I6
1:B5;E5 1:B5;E5
9 : A 5 ; 9 : E4 8:H6
AI_ON/OF F PO D
R437 R438 READ Y
0 0
R441 OP T
Micom Option 3 Pin _ Lo w
2 P1.7/SOG I 3 RS T 4 5 6 P4.3/AD 3
GIL- G-03-S3T2 P90 1
ST_5 V
7 : J2
DDC_SC L ST_5 V
7:G7
R455
22
HSCL1/P3.0/RX D HSDA1/P3.1 /TXD
IC407
D_EYE
GND
R443 4.7K 7 : J2
DDC_SD A
R449 220
R457 R458 R459 READ Y
22 4.7K 0
P40 1 SMW200-1 2
HH-1M 2012-12 1 L400
B2
IR
READY R418
A4 UCOM_R X JP40 0 L401 KEY2 1 JP40 1 GN D 2 JP40 2 KEY1 3 C411 0 . 1 uF JP40 3 L403 IR 5 C412 0 . 1 uF L402
7 P 3 . 2 / I N T0 8 P 3 . 3 / I N T1 9
LIVE_ON_3. 3 MICOM_RESE T
H7
3.3VST_MICO M
E 3 ; I6
1K
6 5
5 : A 6 ; 5 : G1
WXGA_LCD_12 V
4 3 2
GND
READY R419
/W_PROTEC T
6:AB28;6:AB24;6:AB21;7:I 3
100
KEY2
H2
ISDA/P3.4/T 0 10 ISCL/P7. 5 11
C437 0 . 1 uF
68K R492
1 FHD FI-R51S-H F P903
12 HSCL2/P7. 3 13 X2 14
VSS 16 P4.0/AD 0 17
18
20
3.3VST_MICO M KEY1
H2
R453
C43 1
15
19
21
22
R463 15K
GN D
P 6 .1
P 6 .3
GN D
R450 R451
1K 1K
X1
0.1uF
P6.0 /CL KO1
HSDA2/P7.4
P 6 .2
P 6 .4
4.7K
IR
C3
R485
R491
GND
READY R487
GN D
R489
JP40 9 5V_S T 7 C413 0 . 1 uF GN D 8 JP40 4 LED R 9 JP40 5 LED G 10 GN D 11 GN D 12
GND
C414 0 . 1 uF R422 4.7K
4.7K
1K
GND
3.3VST_MICO M
1K
4.7K
R416 100 R417 100
B3
KEY2
B2
3.3VST_MICO M GND
L404
GND
IC406
A0
R423 4.7K R469 22 R470 22 X400 24MHz C433 22pF C434 22pF GN D
KEY1
LED_R
L405
F5
AT24C16AN-10SI-2. 7 LED_G
F5
C435 0 . 1 uF
C436 0 . 1 uF
R464
C415 0 . 1 uF
C416 0 . 1 uF C432 0 . 1 uF
VCC
WP
A1
POWER_CTL_2.6V_1.2 V 8 : E 1 ; 8 :G3 ; 8 :H 1
POWER_CTL_3.3 V
1K
100 R488
LCD
SC L R445 22
SCL3_3.3 V
6:AO22
SDA3_3.3 V
1 : H 1 ; 9 : A6
1 : H 1 ; 9 : A6
MUTE2
MUTE1
A2
GND
5:A4
GND
8:A7
SD A
GN D
GND GND
R446 22
GND
GND
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S SPECIAL FEATURES IMPOR TANT FOR PRO TECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .
MICOM, TTL
7411_ DDRM_A[0-12] DDR_VTT_741 2 R104 5 7411_ DDRM_A[0] 7411_ DDRM_A[1] DDR_VTT_741 2 7411_ DDRM_DQ[0-31] S27 7411_DDR_DQ[0-31 ] X16 C102 6 C103 8 R102 1 7411_DDR_DQ[0] 7411_DDR_DQ[1] 7411_DDR_DQ[2] 7411_DDR_DQ[3] 22 R102 2 7411_DDR_DQ[4] 7411_DDR_DQ[5] 7411_DDR_DQ[6] 7411_DDR_DQ[7] 22 R102 3 7411_DDR_DQ[8] 7411_DDR_DQ[9] 7411_DDR_DQ[10 ] 7411_DDR_DQ[11 ] C103 6 100 R101 6 7411_ DDRM_DQ[12] 7411_ DDRM_DQ[13] C101 5 0 . 0 1 uF 7411_ DDRM_DQ[14] 7411_ DDRM_DQ[15] C101 6 C101 7 C108 7 C101 8 C101 9 0 . 0 1 uF 0 . 0 1 uF 4 . 7 uF 0 . 0 1 uF 0 . 0 1 uF 100 R101 8 7411_ DDRM_DQ[20] 7411_ DDRM_DQ[21] 7411_ DDRM_DQ[22] 7411_ DDRM_DQ[23] C102 0 C102 1 0 . 0 1 uF 0 . 0 1 uF 100 R101 9 7411_ DDRM_DQ[24] 7411_ DDRM_DQ[25] 7411_ DDRM_DQ[26] 7411_ DDRM_DQ[27] C102 2 C102 3 0 . 0 1 uF 0 . 0 1 uF 100 R102 0 7411_ DDRM_DQ[28] 7411_ DDRM_DQ[29] 7411_ DDRM_DQ[30] 7411_ DDRM_DQ[31] 22 7411_ DDRM_DQ[20] 7411_ DDRM_DQ[21] 7411_ DDRM_DQ[22] 7411_ DDRM_DQ[23] 22 7411_ DDRM_DQ[24] 7411_ DDRM_DQ[25] 7411_ DDRM_DQ[26] 7411_ DDRM_DQ[27] 22 7411_ DDRM_DQ[28] 7411_ DDRM_DQ[29] 7411_ DDRM_DQ[30] 7411_ DDRM_DQ[31] R102 6 7411_DDR_DQ[20 ] 7411_DDR_DQ[21 ] 7411_DDR_DQ[22 ] 7411_DDR_DQ[23 ] R102 7 7411_DDR_DQ[24 ] 7411_DDR_DQ[25 ] 7411_DDR_DQ[26 ] 7411_DDR_DQ[27 ] R102 8 7411_DDR_DQ[28 ] 7411_DDR_DQ[29 ] 7411_DDR_DQ[30 ] 7411_DDR_DQ[31 ] P20;Q 7 7411_ DDRM_C KE P20;Q 7 P20;Q 7 7411_ DDRM_CLK 7411_ DDRM_CLK R104 9 22 R105 0 22 R105 1 22 H9 H7 Q7 Q9 C104 8 H20;H7 H20;H7 H20;H7 C105 0 0 . 0 1 uF R104 2 R104 3 0 . 0 1 uF R104 4 100 100 100 7411_DDRM_RA S 7411_DDRM_CA S 7411_DDRM_ WE 22 C104 6 100 R101 7 7411_ DDRM_DQ[16] 7411_ DDRM_DQ[17] 7411_ DDRM_DQ[18] 7411_ DDRM_DQ[19] 7411_ DDRM_DQ[12] 7411_ DDRM_DQ[13] 7411_ DDRM_DQ[14] 7411_ DDRM_DQ[15] 22 7411_ DDRM_DQ[16] 7411_ DDRM_DQ[17] 7411_ DDRM_DQ[18] 7411_ DDRM_DQ[19] 22 R102 4 7411_DDR_DQ[12 ] 7411_DDR_DQ[13 ] 7411_DDR_DQ[14 ] 7411_DDR_DQ[15 ] C104 0 R102 5 7411_DDR_DQ[16 ] 7411_DDR_DQ[17 ] 7411_DDR_DQ[18 ] 7411_DDR_DQ[19 ] H22 H20 P20 P22 C108 8 C104 3 4 . 7 uF 0 . 0 1 uF R103 8 R103 9 0 . 0 1 uF R104 0 R104 1 100 100 7411_DDRM_DQS 2 100 100 7411_DDRM_DM 2 7411_DDRM_DM 3 7411_DDRM_DQS 3 R105 8 22 C104 2 0 . 0 1 uF R103 4 R103 5 0 . 0 1 uF R103 6 R103 7 100 100 7411_DDRM_DQS 0 100 100 7411_DDRM_DM 0 7411_DDRM_DM 1 7411_DDRM_DQS 1 R105 7 22 R105 6 H19;H6 H19;H6 H18;H5 C103 7 0 . 0 1 uF R103 1 R103 2 0 . 0 1 uF R103 3 100 100 100 7411_DDRM_C S 7411_DDRM_BA 0 7411_DDRM_BA 1 22 R105 5 C103 9 0 . 1 uF R103 0 C103 2 C103 4 0 . 0 1 uF 0 . 0 1 uF 100 R104 7 7411_ DDRM_A[8] 7411_ DDRM_A[9] 7411_DDRM_A[11 ] 7411_DDRM_A[12 ] 7411_DDRM_A[10 ] 100 7411_ DDRM_A[8] 22 7411_ DDRM_A[9] 7411_DDRM_A[11 ] 7411_DDRM_A[12 ] 7411_DDRM_A[10 ] C102 8 C102 9 0 . 0 1 uF 0 . 1 uF 0 . 0 1 uF 0 . 0 1 uF 100 7411_ DDRM_A[2] 7411_ DDRM_A[3] R104 6 7411_ DDRM_A[4] 7411_ DDRM_A[5] 7411_ DDRM_A[6] 7411_ DDRM_A[7] 7411_ DDRM_A[0] 22 7411_ DDRM_A[1] 7411_ DDRM_A[2] 7411_ DDRM_A[3] R105 3 7411_ DDRM_A[4] 22 7411_ DDRM_A[5] 7411_ DDRM_A[6] 7411_ DDRM_A[7] R105 4
F14
7411_DDR_A[0-12 ]
X24
DDR_VTT_741 2
R105 2 7411_ DDR_A[0] 7411_ DDR_A[1] 7411_ DDR_A[2] 7411_ DDR_A[3] 7411_ DDR_A[4] 7411_ DDR_A[5] 7411_ DDR_A[6] 7411_ DDR_A[7] 7411_ DDR_A[8] 7411_ DDR_A[9] 7411_DDR_A[11 ] 7411_DDR_A[12 ] 7411_DDR_A[10 ] C107 7 0 . 0 1 uF 7411_DDR_C S 7411_DDR_BA 0 7411_DDR_BA 1 Y20 Y22 Y22 7411_DDR_DQS[0 ] 7411_DDR_DQS[1 ] 7411_DDR_DQS[2 ] 7411_DDR_DQS[3 ] +1.2V 7411_ DDR_DM[0] 7411_ DDR_DM[1] 7411_ DDR_DM[2] 7411_ DDR_DM[3] 7411_DDR_DM[0-3 ] X20 +1.2V D2.6V 7411_DDR_DQS[0-3 ] X19 C107 0 2 . 2 uF DDR_VREF_741 2 VREF 4 5 VDDQ C106 2 1uF V_SENS E GN D 2 7 PVC C C100 3 220u F C100 4 10uF
IC100 3 SC2595ST R
NC VTT
D2.6V
D3.3 V
IC801
PQ05DZ1 U IC804 A Z1117H-3.3 VIN 1 3 VOUT INPUT 3 2 1 ADJ/GND
D3.3V
11
13
7411_DDRM_DQ[1 ] C100 6 C100 1 C100 8 C100 9 0 . 0 1 uF 0 . 1 uF 0 . 0 1 uF 0 . 0 1 uF 100 7411_DDRM_DQ[2 ] 7411_DDRM_DQ[3 ] R101 4 7411_DDRM_DQ[4 ] 7411_DDRM_DQ[5 ] 7411_DDRM_DQ[6 ] 7411_DDRM_DQ[7 ] C101 0 C101 3 C100 0 C109 1 0 . 0 1 uF 0 . 0 1 uF 0 . 1 uF 0 . 0 1 uF 100 R101 5 7411_DDRM_DQ[8 ] 7411_DDRM_DQ[9 ] 7411_ DDRM_DQ[10] 7411_ DDRM_DQ[11]
7411_DDRM_DQ[1 ] 7411_DDRM_DQ[2 ] 7411_DDRM_DQ[3 ] 7411_DDRM_DQ[4 ] 7411_DDRM_DQ[5 ] 7411_DDRM_DQ[6 ] 7411_DDRM_DQ[7 ] 7411_DDRM_DQ[8 ] 7411_DDRM_DQ[9 ] 7411_ DDRM_DQ[10] 7411_ DDRM_DQ[11]
IC100 4
JP100 0
ADM3232E AR NZ
L805 HH-1M2012-12 1 HH-1M2012-12 1 L814 JP80 1 JP80 0 JP80 2
1
VCC
JP80 7 JP80 8
JP80 9
JP81 1
JP81 3
A VCC C100 7 100u F C109 4 0 . 1 uF C109 2 0 . 1 uF C109 5 0 . 1 uF C109 3
C1+
RxD C109 7 0 . 1 uF
16
JP100 1 2 JP100 2
L815
C802 0 . 3 3 uF
NC
4 5
VC C826 47uF 1K R902 A 1[ RD] A 2[ GN]
L817
15
HH-1M2012-12 1
HH-1M2012-12 1
0 . 1 uF V+
C1-
GN D
C816 0 . 1 uF
C831 0 . 1 uF
14
T1OU T
TxD
C84 3 22u F
C845 220u F
JP80 4
HU-1M5750-40 1
L816
C809 10uF
OUTPU T
C81 5 22u F
JP80 3 JP80 5 1 HH-1M2012-12 JP80 6 JP81 0 L818 JP81 2 JP81 4 HH-1M2012-12 1
JP81 5 JP81 6
GND
330uF C812
C2+
13
R1IN
12
220p F
V-
11
T1IN
GIL- G-03-S3T2 P100 0
4 : H 6 ; 4 : J7
C2-
R1OU T
LIVE_ON
C109 8 AH4 BCM7411_RX A 220p F AH4 BCM7411_TX A AI 4 BCM7411_TX B AI 4 BCM7411_RX B
C109 9
L819
GN D
1 C842 100u F
C100 5
0 . 0 1 uF
7411_DDRM_DQ[0 ]
12
10
100
R101 3 7411_DDRM_DQ[0 ]
10
22
SMW250-1 3
100
A3.3V
SMW250-1 0
C102 4
0 . 0 1 uF
P l a c e R e s i s t o r s a d j a c e n t t o 7 4 11 ( B O T T O ) M
Se r i a l Po r t ( 7 4 1 2 )
+6.0V
P80 0
P80 1
T2OU T
10
T2IN
C846 0 . 1 uF D802
C862 100u F
C813 10uF
READ Y R824 0
R2IN
R2OU T
POWER_CTL_3.3 V
JP100 3 1 RxD
+12.0 V
GND
+6.0V +19.0 V
R826 0
GND
+3.3V
100u F C861 C839 0 . 1 uF
D3.3 V
L1001 L1002 L1000
0 . 1 uF C106 7 0 . 1 uF C107 1 0 . 1 uF C107 3 0 . 1 uF C107 5 TxD
JP100 4 2 JP100 5 3
C841 1uF
GND
PO D
INV_ON/OF F
4:C3
C106 4 0 . 1 uF
7411_DDR_RA S 7411_DDR_CA S 7411_DDR_W E
C106 5 0 . 1 uF
C106 6 0 . 1 uF
Y18 Y18 Y18
0 . 1 uF C106 8
0 . 1 uF C107 2
0 . 1 uF C107 4
0 . 1 uF C107 6
C108 0 4 . 7 uF
0 . 1 uF C107 8
0 . 1 uF C108 3
0 . 1 uF C108 5
C108 6 10uF
GIL- G-03-S3T2 P100 1
GND
BCMPWM_VBR_ B R920 6.8K
GND
4: F5
7411_DDR_C LK 7411_DDR_CK E
Y21 Y21
0 . 1 uF C108 4
0 . 1 uF C108 9
0 . 1 uF C109 0
BCMPWM_VBR_ A
PQ05DZ1 U
R107 5 10K 1K
R107 6 10K
R921 6.8K C865 10uF C866 10uF R909 22 READ Y R910 22 READ Y R911 22 READ Y R912 R913 22 22 READ Y READ Y
R107 4
+5.0V TU_+5.0 V
INPUT 3
IC809 A Z1117H-3.3 1 2 ADJ/GND
+3.3 V_HDMI
VIN
VOUT
R914 22 READ Y LCD PDP
D3.3 V
L803
E5 E9 E10 E11 E12 E16 H8 H9 H10 H11 H12 H13 J5 J8 J13 J16 K5 K8 K13 K16 L5 L8 L13 L16 M5 M8 M13 M16 N8 N9 N10 N11 N12 N13 T5 T9 T10 T11 T12 T16 P19 P18 N5 N16 P5 P16 R5 R1 6 T6 T7 T8 T13 T14 T15 E6 E7 E8 E13 E14 E15 F5 F16 G5 G1 6 H5 H16 K19 K18 N19 N18 L4 K2 K1 L2 L3 L1 M3 M2 N2 N3 N1 M1 N4 P3 P4 P2
C821 0 . 3 3 uF
4 5
VBR_A For LCD_HD/LCD_FHD_42_4 7
NC
VC
R824 X O
R826 O X
VBR_B_FH D LCD_FHD_42_4 7
C828 47uF
VBR_B_H D For LCD_H D
D2.6V
VBR_B_H D
VIDO_CLKI_B NC_ 7 VIDO_EXT_VSYNC_ B VIDO_FIELD_B NC_1 4 NC_1 3
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 VDD_13 VDD_14 VDD_15 VDD_16 VDD_17 VDD_18 VDD_19 VDD_20 VDD_21 VDD_22 VDD_23 VDD_24 VDD_25 VDD_26 VDD_27 VDD_28 VDD_29 VDD_30 VDD_31 VDD_32 VDD_33 VDD_34 VDD_35 VDD_36 VDD_37 VDD_38 VDD_39 VDD_40
VSS_PLL_ 1
VSS_PLL_ 2
VSS_PLL_ 3
VDD25_ 1 VDD25_ 2 VDD25_ 3 VDD25_ 4 VDD25_ 5 VDD25_ 6 VDD25_ 7 VDD25_ 8 VDD25_ 9 VDD25_1 0 VDD25_1 1 VDD25_1 2
VDD_PLL_1
VDD_PLL_2
VDD_PLL_3
VDD33_ 1 VDD33_ 2 VDD33_ 3 VDD33_ 4 VDD33_ 5 VDD33_ 6 VDD33_ 7 VDD33_ 8 VDD33_ 9 VDD33_1 0 VDD33_1 1 VDD33_1 2
R106 0
UMX-NT-076 S W
4 : F 6 ; H6
NC_ 6 NC_ 2 NC_ 1 NC_ 4 NC_ 5 NC_ 3 NC_ 9 NC_ 8 NC_1 1 NC_1 2
GN D I 6 ; 9: E5
For V66 8
TU801
R809 1K
VBR_A For V66 8
10K
C811 10uF
OUTPU T
C82 5 22u F
VBR_B_FH D For LCD_FHD_3 7
F ul l H D 3 7 " " Full HD 42"47" HD 32", 37", 42" V668
4:H3
Y21
C101 1 47uF
C107 9 10uF
4 : H 6 ; 4 : J7
7411_DDR_C LK
C105 7 0 . 1 uF
C105 9 0 . 1 uF
C106 0 0 . 1 uF
C106 1 0 . 1 uF
C106 3 0 . 1 uF
C106 9 10uF
+6.0V
IC800
+5.0V
4 : H 6 ; 4 : J7
C105 3 0 . 1 uF
C105 4 0 . 1 uF
C105 5 0 . 1 uF
C105 6 0 . 1 uF
C105 8 0 . 1 uF
C1144 220p F
C1143 220p F
ST_5 V
RL_O N
+6.0V
AC_DE T
M u st b e p l a c e d o n t h e tp o
5V_MNT
C840 0 . 1 uF
GND
R913 On l y be st u f f ed R 9 11 , R 9 1 2 b e s t u f d fe R 9 0 9 , R 9 1 2 b e s t u fd fe R 9 1 0 , R 9 1 4 b r s t u fd fe
H6;9:B5
C101 2 2700p F
C102 5 2700p F
C103 0 0 . 0 1 uF
C103 3 0.047u F
0 . 1 uF C104 1
1:A7 1:A6 1:A6
HSX_CL K HSX_DATA R100 0 HSX_SYN C 1K
E18 G2 0 G1 9 F17 G1 7 G1 8 J20 H20 H19 F18 H17 H18 U18 V17 U16
7411_ DDR_A[0] 7411_ DDR_A[1] 7411_ DDR_A[2]
CSI_AFULL_ A CSI_CLK_ A CSI_DA T A_A CSI_ERROR_ A CSI_SYNC_ A CSI_VALID_A CSI_AFULL_ B CSI_C LK_B CSI_DA T A_B CSI_ERROR_ B CSI_SYNC_ B CSI_VALID_B AUDI_CLK AUDI_DA TA AUDI_LEFT DDR_AD_ 2 DDR_AD_ 3 DDR_AD_ 4 DDR_AD_ 5 DDR_AD_ 6 DDR_AD_ 7 DDR_AD_ 8 DDR_AD_ 9 DDR_AD_1 0 DDR_AD_1 1 DDR_AD_1 2 DDR_AD_1 3 DDR_AD_1 4 DDR_AD_1 5 DDR_BA0 DDR_BA1 DDR_C K DDR_CK_ N DDR_CKE_ N DDR_CS_ N DDR_MSK_ 0 DDR_MSK_ 1 DDR_MSK_ 2 DDR_MSK_ 3 DDR_DQS_ 0 DDR_DQS_ 1 DDR_DQS_ 2 DDR_DQS_ 3 DDR_CAS_ N DDR_RAS_ N DDR_WE_ N DDR_REF_ 0 DDR_REF_ 1 DDR_DQ_ 0 DDR_DQ_ 1 DDR_DQ_ 2 DDR_DQ_ 3 DDR_DQ_ 4 DDR_DQ_ 5 DDR_DQ_ 6 DDR_DQ_ 7 DDR_DQ_ 8 DDR_DQ_ 9 DDR_DQ_1 0 DDR_DQ_1 1 DDR_DQ_1 2 DDR_DQ_1 3 DDR_DQ_1 4 DDR_DQ_1 5 DDR_DQ_1 6 DDR_DQ_1 7 DDR_DQ_1 8 DDR_DQ_1 9 DDR_DQ_2 0 DDR_DQ_2 1 DDR_DQ_2 2 DDR_DQ_2 3 DDR_DQ_2 4 DDR_DQ_2 5 DDR_DQ_2 6 DDR_DQ_2 7 DDR_DQ_2 8 DDR_DQ_2 9 DDR_DQ_3 0 DDR_DQ_3 1
1:H3 B+
RF_SWITCH_CTR L
M u s t b e s e p a r a t e l y f i l t e rd e
IC100 1 HY5DU281622FTP5
7411_ DDRM_DQ[0-31] VDD_1 7411_DDRM_DQ[0 ] DQ0 VDDQ_1 7411_DDRM_DQ[1 ] 7411_DDRM_DQ[2 ] DQ1 DQ2 VSSQ_ 1 7411_DDRM_DQ[3 ] 7411_DDRM_DQ[4 ] DQ3 DQ4 VDDQ_2 7411_DDRM_DQ[5 ] 7411_DDRM_DQ[6 ] DQ5 DQ6 VSSQ_ 2 7411_DDRM_DQ[7 ] DQ7 NC_1 VDDQ_3 LDQS R36 7411_DDRM_DQS 0 NC_2 VDD_2 NC LDM R36 H7;R33 H7;R34 H7;R34 H6;R37 7411_DDRM_DM 0 /WE 7411_DDRM_ WE /CAS 7411_DDRM_CA S /RAS 7411_DDRM_RA S /CS 7411_DDRM_C S NC_3 BA0 H6;R37 H5;R36 7411_DDRM_BA 0 BA1 7411_DDRM_BA 1 7411_DDRM_A[10 ] 7411_ DDRM_A[0] 7411_ DDRM_A[1] 7411_ DDRM_A[2] 7411_ DDRM_A[3] A10/AP A0 A1 A2 A3 VDD_3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 VSS_ 3 DQ15 VSSQ_ 5 DQ14 DQ13 VDDQ_5 DQ12 DQ11 VSSQ_ 4 DQ10 DQ9 VDDQ_4 DQ8 NC_7 VSSQ_ 3 UDQ S NC_6 VREF VSS_ 2 UDM /CK C K CKE NC_5 NC_4 A11 A9 A8 A7 A6 A5 A4 VSS_ 1 7411_DDRM_A[12 ] 7411_DDRM_A[11 ] 7411_ DDRM_A[9] 7411_ DDRM_A[8] 7411_ DDRM_A[7] 7411_ DDRM_A[6] 7411_ DDRM_A[5] 7411_ DDRM_A[4] C105 1 0.047u F C105 2 470p F DDR_VREF_741 2 U34 U34 U33 Z37 7411_DDR_DQS[0-3 ] R102 9 240 7411_ DDRM_CLK 7411_ DDRM_C KE Q7;R3 3 Q7;R3 2 Pl a c e R esi st o r s ad j a c en t to DDR pin 45,46 at the DDR c h i p f u r t h e s t f r o m t h e 7 4 1.1 7411_DDRM_DM 1 7411_ DDRM_CLK 7411_DDRM_DQS 1 R35 C104 4 470p F C104 5 0.047u F C108 1 22uF U37 U36 U33 U32 U32 R35 Q7;R3 2 Z36 7411_DDR_DM[0-3 ] U37 7411_DDRM_DQ[8 ] DDR_VREF_741 2 7411_ DDRM_DQ[10] 7411_DDRM_DQ[9 ] 7411_ DDRM_DQ[12] V41 7411_ DDRM_DQ[11] 7411_DDR_A[0-12 ] 7411_ DDRM_DQ[14] 7411_ DDRM_DQ[13] 7411_ DDRM_DQ[15] G40
R100 1 R100 2 R100 3 R100 4 R100 5 R100 6 R100 7 R100 8
1K 1K 1K 1K 1K 1K 1K 1K
3
AUDO_CLK_A AUDO_DA T A_ A AUDO_FS256_ A AUDO_LEFT_ A AUDO_CLK_B AUDO_DA T A_ B AUDO_FS256_ B AUDO_LEFT_ B AUDO_SPDI F VIDO_VBLANK_A_ N VIDO_HBLANK_A_N VIDO_FIELD_A VIDO_EXT_VSYNC_ A VIDO_CLKO_A VIDO_CLKI_A U20 V20 U19 V19 R2 0 T20 R1 9 T19 W20 J1 J2 K4 F4 H4 K3 H3 J3 H2 G1 F1 F2 E1 F3 E2 D1 G3 G4 G2 C1 D2 E3 E4 D3 C2 B1 A3 A4 C9 C1 5 A8 A9 A16 A17 B9 A10 A13 B16 D9 D10 A5 B8 B10 C1 2 A2 D5 B3 B4 C4 C5 D6 B5 D7 C6 B6 A6 D8 C7 B7 C8 D11 C1 0 A11 B11 D12 C1 1 A12 B12 B13 D13 C1 3 A14 D14 B14 C1 4 B15
EBI_DATA/PCI_AD[0 ] EBI_DATA/PCI_AD[1 ] EBI_DATA/PCI_AD[2 ] EBI_DATA/PCI_AD[3 ] EBI_DATA/PCI_AD[4 ] EBI_DATA/PCI_AD[5 ] EBI_DATA/PCI_AD[6 ] EBI_DATA/PCI_AD[7 ] EBI_DATA/PCI_AD[8 ] EBI_DATA/PCI_AD[9 ] EBI_DATA/PCI_AD[10] EBI_DATA/PCI_AD[11 ] EBI_DATA/PCI_AD[12] EBI_DATA/PCI_AD[13] EBI_DATA/PCI_AD[14] EBI_DATA/PCI_AD[15] EBI_ADDR/PCI_AD[17 ] EBI_ADDR/PCI_AD[18 ] R108 6 R108 7 R107 7 R107 8 R108 8 R107 9 33 33 10K 10K 33 10K BCM7411_DVI_OUT[0 ] BCM7411_DVI_OUT[1 ] BCM7411_DVI_OUT[2 ] BCM7411_DVI_OUT[3 ] BCM7411_DVI_OUT[4 ] BCM7411_DVI_OUT[5 ] BCM7411_DVI_OUT[6 ] BCM7411_DVI_OUT[7 ] BCM7411_DVI_OUT[8 ] BCM7411_DVI_OUT[9 ] BCM7411_DVI_OUT[10 ] BCM7411_DVI_OUT[11 ] BCM7411_DVI_OUT[12 ] BCM7411_DVI_OUT[13 ] BCM7411_DVI_OUT[14 ] BCM7411_DVI_OUT[15 ] BCM7411_DVI_OUT[16 ] BCM7411_DVI_OUT[17 ] BCM7411_DVI_OUT[18 ] BCM7411_DVI_OUT[19 ] R108 0 R108 1 R108 2 R108 3 R108 4 R108 5 10K 1K 10K 10K 10K 10K BCM7411_DVI_OUT[0-19 ] 11:D14 BCM7411_DVI_CL K 11:H17 BCM7411_DVI_VSYN C BCM7411_DVI_HSYN C 11:K11 11:H16
GN D C822 0 . 1 uF
C823 47uF
4 SHIELD
+6.0V
IC810
PQ05DZ1 U VIN 1 3 VOUT
TU_+5.0 V
+3.3V
IC807 AZ1117H-1.8TRE1(EH13A ) INPUT 3 2 1 ADJ/GND
+1.8V
4 : F 6 ; H6
H6;9:B5
H6;9:E5
7411_ DDR_A[3] 7411_ DDR_A[4] 7411_ DDR_A[5] 7411_ DDR_A[6] 7411_ DDR_A[7] 7411_ DDR_A[8] 7411_ DDR_A[9] 7411_DDR_A[10 ] 7411_DDR_A[11 ] 7411_DDR_A[12 ]
U7 V8 U8 V9 U11 V11 U12 V12 V13 U14 V7 V14 U15 R4 V6 U6 U10 V10 V15 U5
D3.3 V
+12.0 V
I C849 0 . 3 3 uF C859 0 . 1 uF
IC806 KA7809ERT M 1 2 G C847 0 . 1 uF 3 O
+9 V
TU_+5.0 V
C844 L802 0 . 3 3 uF
NC
4 5
VC C857 47uF C858 0 . 1 uF C832 10uF
OUTPU T
7411_DDR_BA 0 7411_DDR_BA 1 7411_DDR_C LK 7411_DDR_C LK 7411_DDR_CK E 7411_DDR_C S 7411_ DDR_DM[0] 7411_ DDR_DM[1] 7411_ DDR_DM[2] 7411_ DDR_DM[3] 7411_DDR_DQS[0 ] 7411_DDR_DQS[1 ] 7411_DDR_DQS[2 ] 7411_DDR_DQS[3 ] 7411_DDR_CA S 7411_DDR_RA S 7411_DDR_W E
W3 Y3 W13 W14 V2 W4 Y13 Y15 V4 V5 T4 R1 Y19
IC100 0 BCM7412KP B1G
VIDO_DA T A_A_0/VIDO_DVI_DA T A_ 0 VIDO_DA T A_A_1/VIDO_DVI_DA T A_ 1 VIDO_DA T A_A_2/VIDO_DVI_DA T A_ 2 VIDO_DA T A_A_3/VIDO_DVI_DA T A_ 3 VIDO_DA T A_A_4/VIDO_DVI_DA T A_ 4 VIDO_DA T A_A_5/VIDO_DVI_DA T A_ 5 VIDO_DA T A_A_6/VIDO_DVI_DA T A_ 6 VIDO_DA T A_A_7/VIDO_DVI_DA T A_ 7 VIDO_DA T A_A_8/VIDO_DVI_DA T A_ 8 VIDO_DA T A_A_9/VIDO_DVI_DA T A_ 9 VIDO_DA T A_A_10/VIDO_DVI_DA T A_1 0 VIDO_DA T A_A_1 1/VIDO_DVI_DA T A_1 1 VIDO_DA T A_A_12/VIDO_DVI_ENA VIDO_DA T A_A_1 3 VIDO_DA T A_A_1 4 VIDO_DA T A_A_1 5 VIDO_DA T A_A_1 6 VIDO_DA T A_A_1 7 VIDO_DA T A_A_1 8 VIDO_DA T A_A_1 9 H_IF_SE L PCI_ENABL E PCI_S TOP_ N PCI_REQ_ N PCI_PERR_ N P CI_IRDY_N PCI_GNT_ N P CI_CLK/H_CLK PCI_DEVSEL_N/H_CS_ N PCI_FRAME_N/H_RD_ N PCI_IDSEL/H_AS_ N PCI_INTA/H_INT_N PCI_P AR/H_WR_ N PCI_TRDY_N/H_WAIT_ N PCI_CBE_ 0 PCI_CBE_ 1 PCI_CBE_ 2 PCI_CBE_ 3 P CI_AD_0/ H_DATA_0 P CI_AD_1/ H_DATA_1 P CI_AD_2/ H_DATA_2 P CI_AD_3/ H_DATA_3 P CI_AD_4/ H_DATA_4 P CI_AD_5/ H_DATA_5 P CI_AD_6/ H_DATA_6 P CI_AD_7/ H_DATA_7 P CI_AD_8/ H_DATA_8 P CI_AD_9/ H_DATA_9 P CI_AD_10/ H_DATA_1 0 P CI_AD_11/ H_DATA_1 1 P CI_AD_12/ H_DATA_1 2 P CI_AD_13/ H_DATA_1 3 P CI_AD_14/ H_DATA_1 4 P CI_AD_15/ H_DATA_1 5 PCI_AD_16/H_ADDR_ 0 PCI_AD_17/H_ADDR_ 1 PCI_AD_18/H_ADDR_ 2 PCI_AD_19/H_ADDR_ 3 PCI_AD_20 /UNUS ED PCI_AD_21 /UNUS ED PCI_AD_22 /UNUS ED PCI_AD_23 /UNUS ED PCI_AD_24 /UNUS ED PCI_AD_25 /UNUS ED PCI_AD_26 /UNUS ED PCI_AD_27 /UNUS ED PCI_AD_28 /UNUS ED PCI_AD_29 /UNUS ED PCI_AD_30 /UNUS ED PCI_AD_31 /UNUS ED
C864 0 . 0 1 uF
C804 C803 0 . 1 uF 4 . 7 uF
C805 47uF
GN D
C85 1 22u F
+2.5V
L809 D2.6V C869 0 . 1 uF
A2.6V
TU80 0 V A1G5BR200 3
D3.3 V
1 2 3 4
BCM355 3_CLK_OUT EBI_CS1 b EBI_RDb 1:D2 1 : D 1 ; 1 : F6 1:D3 1 : D 6 ; 1 : D1 1:D1 1 : D 7 ; 1 : D3 1 : D 3 ; 1 : G7 1 : D 6 ; 1 : D3 1 : D 6 ; 1 : D3 1:D3
C808 4 . 7 uF
D3.3 V
L810
+3.3V
IC803
SC1566I5M-2.5TR T L807 HH-1M2012-12 1 R907 5.6K VIN 1 5 VO
BB B1 B2 B3 B4 RESE T SD A SC L RSEDR F S BYTE GN D SPBVAL SRD T SRC K AFT SIF VIDEO 22 33 0 R893 12K R808 470 R800 R804 R925 0 R802 22 R803 22 22 R900 R899 1 : D 6 ; 2 : B 3 ; 4 : B 6 ; 11 : O 1 1 L811 C810 4 . 7 uF C871 0 . 1 uF +1.2V A1[RD] A2[GN] C D805 SAM233 3 R828 330
TU_+5.0 V
INPUT
IC811 AZ1117H-2.5TR/E 1
+2.5V
C834 OUTPU T
EN
2 3
ADJ
5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 NC SHIELD
R908 4.7K
7411_DDR_DQ[0] 7411_DDR_DQ[1] 7411_DDR_DQ[2] 7411_DDR_DQ[3] J 40 7411_DDR_DQ[0-31 ] 7411_DDR_DQ[4] 7411_DDR_DQ[5] 7411_DDR_DQ[6] 7411_DDR_DQ[7] 7411_DDR_DQ[8] D2.6V 7411_DDR_DQ[9] 7411_DDR_DQ[10 ] 7411_DDR_DQ[11 ] 7411_DDR_DQ[12 ] 7411_DDR_DQ[13 ] 7411_DDR_DQ[14 ] 7411_DDR_DQ[15 ] 7411_DDR_DQ[16 ] 7411_DDR_DQ[17 ]
C100 2 2700p F
C101 4 2700p F
C102 7 0 . 0 1 uF
C103 1 0.047u F
C103 5 0 . 1 uF
R41
7411_ DDRM_A[0-12]
IC100 2 HY5DU281622FTP5
VDD_1 7411_ DDRM_DQ[16] DQ0 VDDQ_1 7411_ DDRM_DQ[17] 7411_ DDRM_DQ[18] DQ1 DQ2 VSSQ_ 1 7411_ DDRM_DQ[19] 7411_ DDRM_DQ[20] DQ3 DQ4 VDDQ_2 7411_ DDRM_DQ[21] 7411_ DDRM_DQ[22] DQ5 DQ6 VSSQ_ 2 7411_ DDRM_DQ[23] DQ7 NC_1 VDDQ_3 LDQS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 VSS_ 3 DQ15 VSSQ_ 5 DQ14 DQ13 VDDQ_5 DQ12 DQ11 VSSQ_ 4 DQ10 DQ9 VDDQ_4 DQ8 NC_7 VSSQ_ 3 DDR_VREF_741 2 UDQ S 7411_DDRM_DQS 3 NC_6 VREF VSS_ 2 UDM C104 7 470p F 7411_DDRM_DM 3 /CK C K CKE NC_5 NC_4 A11 A9 A8 A7 A6 A5 A4 VSS_ 1 7411_DDRM_A[12 ] 7411_DDRM_A[11 ] R104 8 240 7411_ DDRM_CLK 7411_ DDRM_C KE P20;R3 3 P20;R3 2 7411_ DDRM_CLK R34 P20;R3 2 C104 9 0.047u F C108 2 22uF R34 7411_ DDRM_DQ[24] R101 1 R101 2 R105 9 7411_ DDRM_DQ[26] 7411_ DDRM_DQ[25] R100 9 R101 0 7411_ DDRM_DQ[28] 7411_ DDRM_DQ[27] 7411_ DDRM_DQ[30] 7411_ DDRM_DQ[29] 7411_ DDRM_DQ[31]
7411_DDR_DQ[18 ] 7411_DDR_DQ[19 ] 7411_DDR_DQ[20 ] 7411_DDR_DQ[21 ] 7411_DDR_DQ[22 ] 7411_DDR_DQ[23 ] 7411_DDR_DQ[24 ] 7411_DDR_DQ[25 ] 7411_DDR_DQ[26 ] 7411_DDR_DQ[27 ] 7411_DDR_DQ[28 ] 7411_DDR_DQ[29 ] 7411_DDR_DQ[30 ]
D3.3 V
7411_DDR_DQ[31 ]
U3 V1 U2 U1 T3 T2 T1 R3 Y8 W8 W7 Y6 W6 Y5 Y4 W5 Y12 W12 W11 Y11 W10 Y10 W9 Y9 W18 Y18 W17 Y17 V16 W16 W15 Y16 K17 J19 L17 K20 J17 J18
SYS_RESET b
1:H2
C807 4 . 7 uF
3 1
4 . 7 uF
C836 0 . 1 uF
C837 4 . 7 uF
C838 0 . 1 uF
C854 4 . 7 uF
C873 0 . 1 uF R825 1K
BCM7411_INT b EBI_WE1 b EBI_TAb EBI_ADDR16/PCI_CBE 0 EBI_ADDR17/PCI_CBE 1 EBI_ADDR18/PCI_CBE 2 EBI_ADDR19/PCI_CBE 3 EBI_DATA/PCI_AD[0-15]
SDA0_3.3 V
1:H2
SAM233 3 D806 C A1[RD] A2[GN]
D3.3 V
C814 10uF
ADJ/GND
SCL0_3.3 V TU2BCM3553_SYN C
C81 7 22u F
POWER_CTL_2.6V_1.2 V
GN D
TU_+5.0 V TU2BCM3553_SDA T A TU2BCM3553_SCL K

L801
R895 T OP Y READ
C806 0 . 0 1 uF
+1.2V
D1.2V D803 KDS22 6 A AC D804 MBRS34 0 C835 0 . 2 2 uF +3.3V
A1.2V
SIF
E 2SA1504 S Q800 C
6:X8
C801 0 . 0 1 uF
D800 KDS22 6 A C AC
C820 0 . 2 2 uF
+3.3V
TU_+5.0 V
R894 10K L800
L804 3.3uH D801 MBRS34 0
L806 3.3uH
L808 HH-1M2012-12 1
EBI_ADDR/PCI_AD[17-18 ]
1K 1K 1K 1K 10K
PLL_BYP_ENA_ A PLL_BYP_ENA_ B
DDR_TEST_CL K
CLK_200_TE S T CLK_400_TE S T
SP_TEST_CL K
TES T TEST_S E TEST_MOD E
UART_RX_ A UART_TX_A
UART_RX_ B UART_TX_B
READ Y
JT AG_TC K J TAG_TDI JT AG_TD O JT AG_TMS JT AG_TRST_ N JT AG_DB G
IC802 SC4519STR T
R919 4.7K
IC805 SC4519STR T
R812 22 C829 47uF C830 33uF BST SYNC
40V
DBG_EN A
SPI_CL K SPI_CS_ N SPI_D I SPI_D O SPI_IRD Y
R35
7411_DDRM_DQS 2 NC_2 VDD_2 NC LDM
IC808
FMS6400CS1 X
16V
YI N 1 8 YOUT
C818 0 . 1 uF
40V
BST
SYNC
R917 22
C852 47uF
C853 33uF
C855 0 . 1 uF
C856 68uF
VCX0_A VCX0_B
GPIO_ 0 GPIO_ 1 GPIO_ 2 GPIO_ 3 GPIO_ 4 GPIO_ 5 GPIO_ 6 GPIO_ 7
RESE T
CLK NC_1 0
VSS_15
VSS_17
VSS_20
VSS_24
VSS_26
VSS_28
VSS_29
VSS_31
VSS_34
VSS_38
VSS_40
VSS_42
VSS_43
VSS_10
VSS_12
VSS_13
VSS_14
VSS_16
VSS_18
VSS_21
VSS_22
VSS_25
VSS_30
VSS_32
VSS_33
VSS_35
VSS_36
VSS_37
VSS_39
VSS_41
VSS_44
VSS_45
VSS_19
VSS_23
VSS_27
VSS_46
VSS_11
VSS_47
VSS_ 1
VSS_ 3
VSS_ 5
VSS_ 6
VSS_ 4
VSS_ 7
VSS_ 8
VSS_ 2
VSS_ 9
R897 18 R807 56
IN
R1 7 T17 P17
P20
A1 A7 A15 A20 B2 B19 C3 C1 8 D4 D17 H1 J4 J9 J10 J11 J12 K9 K10 K11 K12 L9 L10 L11 L12 L20 M4 M9 M10 M11 M12 N17 N20 P1 U4 U9 U13 U17 V3 V18 W1 W2 W19 Y1 Y2 Y7 Y14 Y20
F20 F19
R35 H20;R3 3 H20;R3 4 H20;R3 4 H19;R3 7
7411_DDRM_DM 2 /WE 7411_DDRM_ WE /CAS 7411_DDRM_CA S /RAS 7411_DDRM_RA S /CS 7411_DDRM_C S NC_3 BA0
READ Y
R801 82
T18 R1 8
E17
L19 M20
L18 M19
A18 B17 C1 6 D15 A19 B18 C1 7 D16
E20 E19
R2
M18 M17
B20 C1 9 D20 C2 0 D19
D18
C800 0 . 1 uF
TU_CVBS 6:Y10
C819 4 . 7 uF GN D S W
COM P
IN
COM P
ASE L
VCC
GN D
CVOU T
READ Y 0 R904
FB
C833 4 . 7 uF C827 0.015u F
S W
FB
GN D
EN C824 560p F
GN D R813 1K
EN C848 560p F
C850 0.015u F
CIN
C OU T
R918 1K
H19;R3 7 H18;R3 6
7411_DDRM_BA 0 BA1 7411_DDRM_BA 1 7411_DDRM_A[10 ] 7411_ DDRM_A[0] 7411_ DDRM_A[1] 7411_ DDRM_A[2] 7411_ DDRM_A[3] A10/AP A0 A1 A2 A3 VDD_3
1K
1K
1K
1K
1K
1K
1K
1K
1K
1K
7411_ DDRM_A[9] 7411_ DDRM_A[8]
R107 1
R106 1
R106 2
R106 3
R106 4
R106 6
R106 7
R106 8
R106 9
R106 5
R107 0
R107 2
D3.3 V
C867 0 . 1 uF
0
Y READ R905 0
R81 1 6.8K
R91 6 6.8K
1K
7411_ DDRM_A[7] 7411_ DDRM_A[6] 7411_ DDRM_A[5] 7411_ DDRM_A[4]
1K
R107 3 10K
R806 READ Y
4:G1;G3;H 1 PO WER_CTL_2.6 V_1.2 V
WER_CTL_2.6 V_1.2 V 4:G1;E1;G 3 PO
BCM7411_27M_ CLK
BCM7411_RX B
T 4:B6 SYS_RESE
BCM7411_TX B
BCM7411_RX A
BCM7411_TX A
MPEG4
+9 V
+5.0V
BA37
BA37
BA36
1:H3
BA36
TUNER, POWER
R664
1K
HDMI_HPD_ 0 1:H4
10V VR601
IC602 AT24C02BN-10SU-1. 8
A0 VCC
1:H4;G2 8 HDMI_POWER_ 0 JP60 6
+5.0V
R641 1K
R690 2K BCM_L_OU T
A1
A2
H7 E8;AI24
E8;AI23
GN D 22 19 18 17 16 15 14 13 SDA_HDMI_0 SCL_HDMI_0 R602 1K
HDMI_POWER_ 0
1:H4;AG29
3.3VST_MICO M
Q60 3 KRC102 S 4:H2;A B24;A B21;7:I3 B /W_PROTEC T
C 1 8
BCM_L_OUT 1 0 . 0 1 uF C623 1200p F C621
B C
10V VR607
H5
H5
H6
H6
H6
H4
H4
A1
+3.3V_HDMI
SDA_HDMI_1 HB-1M1608-102J T
GN D +5.0V A2 3 6 SC L ST_5 V
GN D
GN D 22
4.7K R620
4.7K R623
WP
C618 0 . 1 uF
SCL_HDMI_1
TMDS1_RXC +
TMDS1_RX2 +
TMDS1_RX1 +
TMDS1_RX0 +
TMDS1_RXC -
TMDS1_RX2 -
TMDS1_RX1 -
D603 MMBD301 LT1G
TMDS1_RX0 -
GN D N24;AI26 N23;AI27
R605 68K
F26;N2 3 SCL_HDMI_0 F27;N2 4 SDA_HDMI_0
R614
+9 V
R642 1K R691 2K T BCM_R_OU AJ15 R683 470 R685 3.6K R640 200 B 0 . 0 1 uF C622 C624 1200p F C E 2SA1504 S Q60 7
L607
D B S Q600 BSS8 3
GN D
SD A
R615
22
L602
R665
HDMI_POWER_ 1 JP60 7 IC603 AT24C02BN-10SU-1. 8 1:H4;G9 C615 0 . 1 uF
+5.0V
0 . 0 1 uF
0 . 0 1 uF
C603
C606
A2
A1
HDMI_CEC
4 : E4
1K
10V VR604
SCL2R638 22
HPD 2R635 22
12 11 10
TMDS0_RXC - N23
KDS18 4 D601
BCM_R_OU T1
GND_ 7
VCC_8
VCC_7
TMDS0_RXC + TMDS0_RX0 -
N23
C604 0 . 0 1 uF
A0 Q60 4 KRC102 S 4:H2;A B28;A B21;7:I3 B /W_PROTEC T C A1
VCC C619 0 . 1 uF
SDA2
HPD 3
4.7K R621
4.7K R624
9 8
N22
VDD
A24
A22
A23
A21
B24
B23
B22
B21
GN D
WP
64
62
61
55
59
57
56
54
53
63
60
58
52
51 50
49
GN D E 48 47 46 45 44 A14 B14 VCC_ 6 A13 B13 GND_ 6 A12 B12 VCC_ 5 A11 B11 SCL1 SDA1 HPD 1 EQ S2 R632 R634 22 22 0 . 0 1 uF C610 0 . 0 1 uF C609 + H13 TMDS2_RX2 TMDS2_RX2 - H13 TMDS2_RX1 + H14 TMDS2_RX1 - H14 TMDS2_RX0 + H15 TMDS2_RX0 - H15 TMDS2_RXC + H16 TMDS2_RXC - H16 SCL_HDMI_2 SDA_HDMI_2 +3.3V_HDMI E17;AI21 E17;AI20 /W_PROTECT 4:H2;A B28;A B24;7:I3 B E GN D GN D +5.0V 4 5 SD A A2 3 6 SC L
GN D 22
TMDS0_RX0 + 7 TMDS0_RX1 6 5 TMDS0_RX1 + 4 TMDS0_RX2 3 2 TMDS0_RX2 + 1 20 21
N22 N22 F27;AI26 F26;AI27 H25 N22 N21 H24 H24 N21 H24 H23 H23 H22 TMDS0_RX1 TMDS0_RX1 + TMDS0_RX2 TMDS0_RX2 + TMDS0_RX0 TMDS0_RX0 + H25 SDA_HDMI_0 SCL_HDMI_0 TMDS0_RXC TMDS0_RXC +
R616
E8;T26 SCL_HDMI_1
C Q60 9 2SC3875 S E B R770 2K
R630 R631
22 22
SDA3 SCL3 GND_ 1 B31 A31 C600 0 . 0 1 uF VCC_ 1 B32 A32 GND_ 2 B33 A33 C601 0 . 0 1 uF VCC_ 2 B34 A34 GND_ 3 3.9K VSADJ
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
R617
22
R666
E8;T26 SDA_HDMI_1
HDMI_POWER_ 2 JP60 8 1:H4;G1 9 C616 0 . 1 uF +5.0V
IC601 TMDS351P A G
43 42 41 40 39 38 37 36 35 34 33
1K
GND
BCM_R _OU T2
A1
A T24C02B N-10SU-1.8
A2
IC604
A0 Q60 5 KRC102S C A1
VCC C620 0 . 1 uF
Q61 0 2SC3875 S E
KDS18 4 D602
C R772 2K MUTE2
4.7K R622
4.7K R625
WP
GND
E17;W21 SCL_HDMI_2 +5.0V
R613
J 6 02 DC1R019W DH
GN D
A2
17
18
22
24
25
27
28
29
30
20
23
26
19
21
31
32
1K
R606
SC L
GND
GN D 22
GND GND
R618
Z4
Z3
Z2
Y4
Y3
Y2
Y1
Z1
S1
VCC_3
VCC_4
SCL_SINK
GND_ 4
GND_ 5
RE ADY
GN D
GN D
R608
SD A
R619
22
E17;W21 SDA_HDMI_2
SDA_SIN K
HPD_SIN K
HDMI_HPD_ 2
1:H4
R637 200
Q61 1 KRA102S
C694 0 . 1 uF
R604 R603
0 0
R744 5 .1 C B 8 Q60 2SC3875 S E
HDMI_SEL_1 HDMI_SEL_0
1:H3 1:H3 GN D
10V VR600
GN D 22 19 18 17 R601 1K HDMI_POWER_ 2 1:H4;AG23
0 . 0 1 uF C605
0 . 0 1 uF C607
+3.3 V_HDMI
10V VR606
4.7K R610
4.7K R611
ZD600 3.3V
IC100 BCM355 3
AK33 AJ33 AH24 AJ24 AK24 AK25 AL25 AJ25 AP28 C675 AN28 AM29 AL28 AN29 C674 AP29 AP11 AK12 AJ12 AM11 C672 AN11 C695 AP3 AL5 AL3 AL2 AL1 AK4 AL4 AM1 AM2 AN1 AN2 AM3 AM4 AP2 AN3 AK6 AJ7 AK5 AG8 AJ8 AG7 AJ4 AK3 AG4 AF8 AG6 AG5 AH6 AH2 AH1 AH3 AH4 AJ1 AJ2 AJ3 AK2 AH7 AJ5 AH5 AJ6 AH8 AK7 C612 0 . 1 uF C614 10uF C679 0 . 1 uF C681 0 . 1 uF C684 0 . 1 uF R738 499 C676 0 . 1 uF C613 10uF C678 0 . 1 uF C680 0 . 1 uF C683 0 . 1 uF 22 22 R633 R636 DDC_SC L_BC M V17 DDC_SDA_BC M V17 0 . 1 uF 0 . 1 uF C682 0 . 1 uF R626 0 . 1 uF 22 22 22 22 R627 R628 R629 0 . 1 uF BCM_L_OUT 1 AK28
C690 100u F
K7
BCM_L_OUT 2
M12 C693 C692 0 . 0 1 uF 1uF
C611 0 . 1 uF
KDS18 4 D600
AJ16
R682 470
R684 3.6K
R639 200
E 2SA1504 S Q60 6
GN D
R745
HB-1M1608-102J T L601 7: F7 MNT_L_OUT 7: F7 MNT_R_ OUT
DS_AGCT_CTL DS_AGCI_CTL EDSAFE_AVSS_ 1 EDSAFE_AVSS_ 2 EDSAFE_AVSS_ 3 EDSAFE_AVSS_ 4 EDSAFE_DVDD1P2 EDSAFE_AVDD2P5_ 1 EDSAFE_AVDD2P5_ 2 EDSAFE_AVDD2P5_ 3 EDSAFE_IF_ P EDSAFE_IF_ N PLL_DS_AVDD1P2 PLL_DS_AGND SD_ R SD_ G SD_ B RGB_HSYNC RGB_VSYNC SD _INCM_R GB SD_Y1 SD_PR1 SD_PB1 SD _INCM_C OMP 1 SD_Y2 SD_PR2 SD_PB2 SD _INCM_C OMP 2 SD_L1 SD_C 1 SD_INCM_LC 1 SD_L2 SD_C 2 SD_INCM_LC 2 SD_L3 SD_C 3 SD_INCM_LC 3 SD_CVBS1 SD_CVBS2 SD_CVBS3 SD_CVBS4 SD_CVBS5 SD _INCM_C VBS1 SD _INCM_C VBS2 SD _INCM_C VBS3 SD _INCM_C VBS4 SD _INCM_C VBS5 SD_SIF1 SD_SIF2 SD_INCM_SIF1 SD_INCM_SIF2 SD_V1_AVS S SD_V2_AVS S SD_V3_AVS S SD_V4_AVS S SD_V5_AVS S SD_V6_AVS S SD_CLKTST SD_V1_AVDD2P5 SD_V2_AVDD2P5 SD_V3_AVDD2P5 SD_V4_AVDD2P5 SD_V5_AVDD2P5 SD_V6_AVDD2P5 SD_V1_AVDD1P2 SD_V2_AVDD1P2 SD_V3_AVDD1P2 SD_V4_AVDD1P2 SD_V5_AVDD1P2 SD_V6_AVDD1P2
I2S_CLK_IN I2S_DATA_IN I2S_LR_IN I2S_CLK_OU T I2S_DATA_OUT I2S_LR_OU T AUD_LEFT_ N AUD_LEFT_ P AUD_VDDO2P5 AUD_VSS O AUD_RIGHT_ N AUD_RIGHT_ P AUD_SPDI F SPDIF_AVDD2P5 SPDIF_AVSS SPDIF_IN_ N SPD I F_IN_P HDMI_RX_0_CEC_RES HDMI_RX_0_CEC_DAT HDMI_RX_0_HTPLG_I N HDMI_RX_0_HTPLG_OU T HDMI_RX_0_DDC_SCL HDMI_RX_0_ DDC_ SD A HDMI_RX_0_RESREF HDMI_R X_0_CLK_N HDMI_RX_0_CL K_P HDMI_RX_0_DATA0_N HDMI_RX_0_DATA0_P HDMI_RX_0_DATA1_N HDMI_RX_0_DATA1_P HDMI_RX_0_DATA2_N HDMI_RX_0_DATA2_P HDMI_RX_0_VDD3P3 HDMI_RX_0_VDD1P2 HDMI_RX_0_VDD2P5 HDMI_RX_0_ PLL_AVDD 1P2 HDMI_RX_0_AVSS HDMI_RX_0_PLL_AVSS HDMI_RX_1_CEC_RES HDMI_RX_1_CEC_DAT HDMI_RX_1_HTPLG_I N HDMI_RX_1_HTPLG_OU T HDMI_RX_1_DDC_SCL HDMI_RX_1_ DDC_ SD A HDMI_RX_1_RESREF HDMI_R X_1_CL K_N HDMI_RX_1_CL K_P HDMI_RX_1_DATA0_N HDMI_RX_1_DATA0_P HDMI_RX_1_DATA1_N HDMI_RX_1_DATA1_P HDMI_RX_1_DATA2_N HDMI_RX_1_DATA2_P HDMI_RX_1_VDD3P3 HDMI_RX_1_VDD1P2 HDMI_RX_1_VDD2P5 HDMI_RX_1_ PLL_AVDD 1P2 HDMI_RX_1_AVSS HDMI_RX_1_PLL_AVSS
CS5340_I2 S_SCLK_OUT CS5340_I2S_DATA_OU T CS5340_I2S_LRCLK_OU T T BCM3553_I2S_SCLK_OU BCM3553_I2S_DATA_OU T BCM3553_I2S_ L RCLK_OUT
5:D2 5:D2 5:D1 5:A5 5:A5 5:A5
TMDS_RX2+_BC M
TMDS_RX1+_BC M
TMDS_RXC+_BC M
TMDS_RX0+_BC M
TMDS_R XC-_BC M
TMDS_R X2-_BC M
TMDS_R X1-_BC M
TMDS_R X0-_BC M
16 15 14 13
SDA_HDMI_2 W21;AI2 0 SCL_HDMI_2 W21;AI2 1
DDC_SDA_BC M DDC_SC L_BC M
AJ13 AJ13 A1.2V
AJ30 AK32 AL34 AK31 AJ31 0 . 1 uF C666 AL32 AL33 AL31 AM33 0 . 1 uF C655 C656 4 . 7 uF L605 C664 0 . 1 uF C668 4 . 7 uF AM34 AM32 AN32 AK16 AN15 AM15 AH16 AJ16 AL15 C638 C639 C640 C628 C629 C630 C648 C649 C659 C660 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF AM21 AL21 AN21 AM20 AN22 AL22 AP22 AM22 AL17 AL16 AP16 AN18 AM18 AM17 AL19 R718 1.5M C658 C651 C652 0 . 1 uF 0 . 1 uF 0 . 1 uF AP19 AN19 AN16 AN17 AM19 AP20 AN24 AM16
A2.6V
10V VR605
AJ11
AJ11
AJ12
AJ12
AJ12
AJ12
AJ12
AJ13
12 11 10
TMDS2_RXC -
W22
A2.6V
BCM_R _OU T1 AK26 BCM3553_SPDIF_OU T 5 : G 7 ; 5 : H2
W22 W22 +5.0V
9 8
GN D TMDS2_RX0 +
7 TMDS2_RX1 6 5 TMDS2_RX1 + 4 TMDS2_RX2 3 2 1 20 21 TMDS2_RX2 +
W22 W23 HB-1M1608-102J T L606 W23 W23 R651 1K C

TP60 2 TP60 7
7 : E4 RGB_ R 7: F4 RGB_ G 0 . 1 uF C626 34 R693 R647 30K

TP60 8
C635 C636 C637
0 . 1 uF 0 . 1 uF 0 . 1 uF
7: F4 RGB_ B 7:G3 RGB_H S S 7:G3 RGB_V 1.5M R695 34 R694 0 . 1 uF C627 Y 7:A4 COMP1_ 7:B4 COMP1_Pr b 7:A4 COMP1_P Y 7:C4 COMP2_ 7:D4 COMP2_Pr b 7:C4 COMP2_P
A2.6V
W24 R644
TP60 6
E Q613 B C
TP61 3
1.5M R696
2SA1504 S
BCM_L_OU T AO29
B E
TP60 9
Q602 2SC3875 S
499 R737 TMDS_R XC-_BC M S18 TMDS_RXC+_BC M S18 TMDS_ RX0-_BCM S18 TMDS_RX0+_BC M S18 TMDS_ RX1-_BCM R18 TMDS_RX1+_BC M R18 TMDS_ RX2-_BCM R18 TMDS_RX2+_BC M Q18 A1.2V
C617 3 . 3 uF 50V
0
TP61 2
R656 BCM_L_OUT 2 0 C633 0 . 1 uF R701 34 1.5M R706
R653 1.5K C662 3 . 3 uF 50V
J 6 01 DC1R019W DH
R648 15K
L 7:C7 S-VIDEO1_ C 7:C7 S-VIDEO1_ 7:G5 7:G6 S-VIDEO2_ L S-VIDEO2_ C
GND
1:H4 HDMI_HPD_ 1
R652 470
A3.3V
R654 0 READ Y +5.0V 34 R703
0 . 1 uF
C641 1.5M R708
34 R713
0 . 1 uF C647
10V VR602
GN D 22 19 18 17 16 15 14 13 12 11 10 9 8 GN D SDA_HDMI_1 SCL_HDMI_1 T26;AI23 T26;AI24
10V VR608
R600 1K
1:H4;AG26 HDMI_POWER_ 1 HB-1M1608-102J T L604 GN D

TP60 4
GN D
TU_CVBS 8:C2 N 7:C6 COMPOSITE1_I N 7:G6 COMPOSITE2_I
A2.6V
AP17 C642 0 . 1 uF 1.5M R709 8:C2 Q612 B Q601 2SC3875 S

TP61 0
AL18 AN20 R726 10 S IF C665 0 . 1 uF AM24 AN23 AL23 AP23 AM23 R607 1.5M AH22 AH20 AH23 AH21 AK23 AJ17 1.5M R724 C646 C632 C625 0 . 1 uF READ Y 1.5M R699 C644 C643 C631 C634 C671 C667 C663 C661 C657 C654 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF C602 4 . 7 uF READ Y AG23 L603 AJ18 AJ22 AJ19 AJ23 AJ21 AJ20 AK20 AK21 AK17 AK19 AK22 AK18
R612 30K
TP60 3 TP60 0
R645 1K C
34 R704 E 2SA1504 S C
TP61 1
A1.2V
BCM_R_OU T C608 3 . 3 uF 50V
R609 0
TP60 1
B E
TP60 5
C645 34 R711
0 . 1 uF 1.5M R716
R655 0 BCM_R_ OUT2 C650 3 . 3 uF 50V
A3.3V
HB-1M1608-102J T L600
10V VR603
TMDS1_RXC -
T26
R649 1.5K R646 470
S26 S26
R643 15K
A2.6V
C653 34 R719 0 . 1 uF
A1.2V
TMDS1_RX0 + 7 TMDS1_RX1 6 5 TMDS1_RX1 + 4 TMDS1_RX2 3 2 1 20 21 TMDS1_RX2 +
S26 R26
R650 0 READ Y R692 34
GN D R26 R26
R743 1.5K BCM_L_OUT 2 S12;AN2 4 R740 1.5K BCM_R_ OUT2 Q7;AN22
R26
J 6 00 DC1R019W DH GN D
VIDEO EXT. INPUT

470K R742
470K R739
C643, C602 R EADY F o r P C N o i s e S o l u t in o
22
PRINTED CIRCUIT BOARD
MAIN (TOP)
MAIN (BOTTOM)
SIDE A/V (TOP)
SIDE A/V (BOTTOM)
CONTROL B/D(TOP)
IR/LED(TOP)
CONTROL B/D(BOTTOM)
IR/LED(BOTTOM)
P/NO : MFL41546701
Dec., 2007 Printed in Korea

42lb7df SB

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Internal Use Only

LCD TV SERVICE MANUAL

LGE Internal Use Only

Leakage Current Hot Check circuit

Leakage Current Cold Check(Antenna Cold Check)

To Instrument's exposed METALLIC PARTS

Good Earth Ground such as WATER PIPE, CONDUIT etc.

LGE Internal Use Only

LGE Internal Use Only

LGE Internal Use Only

2. Requirement for Test

South AMEROCA EMC : CISPR13

LGE Internal Use Only

5. Chroma & Brightness

6. Component Video Input (Y, CB/PB, CR/PR)

LGE Internal Use Only

7. RGB Input (PC)

LGE Internal Use Only

8. HDMI Input (PC/DTV)

LGE Internal Use Only

9. General specifications (module)

10. Electro Optical Characteristic Specifications (module standard)

LGE Internal Use Only

12. Customer Menu Setup (Shipment Condition)

LGE Internal Use Only

4.PCB Assembly Adjustment

3-2. Set Assembly Adjustment

LGE Internal Use Only

(2) <<10P WAFER>> PIN MAP

0.100 Sq. 0.700 Typ.

With respect ot ground -0.5 With respect ot ground -0.5

LGE Internal Use Only

LGE Internal Use Only

4-2. Using RS-232C

<Fig.3> Adjustment pattern : 480i/1080p 60Hz Pattern

5-4. Adjustment method 480i Comp1, Adjust 1080p Comp1/RGB

5. Auto Adjust Component 480i/1080p RGB 1080p

5-3. Using in strument

LGE Internal Use Only

(2) HDMI-2 EDID table

6-2. Write HDMI EDID data

(3) HDMI-3 EDID table

LCD TV SET (or Digital Board)

6-3. EDID data (Model name = LG TV)

(4) Analog(RGB) EDID table

LGE Internal Use Only

7. Adjustment Color Temperature (White Balance)

RS-232C Command(Commonly apply)

RS-232C Command [CMD wb wb wb wb wb wb ID 00 00 00 00 00 00 DATA] 00 10 1f 20 2f ff

7-2. Connection Diagram(Auto Adjusment)

Full White Pattern (Inner pattern)

[CMD ID DATA] Cool Mid ja jb jc Warm jd je jf

(2) Using HDMI input

R Gain G Gain B Gain

216Gray White Pattern (HDMI Pattern)

R Cut G Cut B Cut

RS-232C Baud Rate : 1 115200 15200

<Fig. 5> Connection diagram for Adjusment White balance

7-2. White Balance Adjusment

LGE Internal Use Only

7-3. White Balance Adjusment (Manual adjustment)

8. GND and ESD Testing