Experiment-2

Object:
To design and simulate CMOS inverter

Software Used:
Tina V 7

Theory:
NAND gate can be constructed by basic inverter in the same as NMOS technology. The only difference is that each NMOS driver requires it own PMOs. In this the NMIOS transistor is connected in series and PMOS in parallel as shown in figure. The series NMOs provides conducting path between the output mode and the ground, if both input voltages are at high logic. For high input PMOS are in cut off state which are connected in parallel.For other valueof input voltage level either zero or both of the PMOS transistor will be turned ON and NMOS transistor will be cut off and conduction path is created between the output node and supply voltage VDD.

Sr.No.
1. 2. 3. 4. 5.

Vin
Vin<VT,On Vin=VIL Vin<VT,ON Vin<VT,ON Vin>VT,OP+VT,
OP

V out
VOH VOH VTH VOL VOL

NMOS
Cut off Saturation Saturation Linear Linear

PMOS
Linear Linear Saturation Saturation Cut off

CMOS CIRCUIT AND WAVEFORM:

V1 5 T1 Noname

Vout

Vin

T2 Noname

CIRCUIT

1.00

Vin

-1.00 4.80

Vout

4.30 0.00 10.00m 20.00m 30.00m Time (s) 40.00m 50.00m

INPUT AND OUTPUT WAVEFORM

Procedure:
1. Select semiconductor from component bar: - Select PMOS depletion type transistor and drag it to appropriate position on the schematic window. - Select NMOS depletion type transistor and drag it to appropriate position on the schematic window. 2. Select Basic from component bar: -Click on voltage generator icon. -Set the signal to square wave. -Select ground icon and place it below voltage generator. -Select ground icon and place at the source of NMOS transistor. -Select battery and connect it to the drain of PMOS transistor. -Place ground at the negative terminal of battery. 3. Select Meter from component bar: -Place a voltage pin and place between the drain of PMOS and NMOS. -Label it as VOUT. 4. SelectT from tool bar: -Name the circuit as CMOS INVERTER. 5. Select VIEW from tool bar: - Choose ERC(Electrical Rules Check).

RESULT:

CMOS inverter is successfully designed and simulated.