8:1 mux library ieee; use ieee.std_logic_1164.

all; entity mux is port( i0: in STD_logic ; i1: in STD_logic ;

i2: in STD_logic ; i3: in STD_logic ; i4: in STD_logic ; i5: in STD_logic ; i6: in STD_logic ; i7: in STD_logic ; x: in STD_logic ; y: in STD_logic ; z: in STD_logic ; o: out STD_logic ); end mux;

--}} End of automatically maintained section

architecture groupb4 of mux is

begin

o<=((not x)and(not y)and(not z)) or ((not x)and(not y)and z) or ((not x)and y and(not z)) or ((not x)and y and z) or (x and(not y)and(not z)) or (x and(not y)and z)

or (x and y and(not z)) or (x and y and z);

end groupb4;