Scheme Toshiba Satelite l500 (La 5322p)

A
NSWAA/NTWAA
Liverpool 10G
Sunderland 10G
LA-5322P REV 1.0 Schematic

Intel Arrandale /IBEX PEAK
2009-12-22 Rev 1.0
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2009/01/23
Issued Date
Deciphered Date
2010/01/23
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Schematic, LA5322P M/B

Size
B
Date:
Document Number
Rev
D
401717
Monday, January 25, 2010
Sheet
E
of
58
Compal Confidential
Fan Control
APL5607
Intel Arrandale
Model Name : NSWAA/NTWAA

File Name : LA-5322P
Clock Generator
ADM1032ARMZ-2
page 6
PCIE-Express 16X 2.5GHz
VGA Thermal Sensor
SLG8SP587VTR
page 21
page 22
Memory BUS(DDRIII) 200pin DDRIII-SO-DIMM X2
rPGA-988
Dual Channel
page 5,6,7,8,9,10
page 11,12
BANK 0, 1, 2, 3
1.5V DDRIII 800/1066 MT/s
VGA (DDR3)
ATI M92XTX,64bit with 256M/512MB
DMI X4
USB/B
BT conn
USB port 0,1
USB port 5
page 34
2.5GHz
ATI M96 Pro,128bit with 512MB/1GB
(Reserve)
3G
page 13,14,15,16,17,18,19,20,21
page 35
RTS5159E
USB port 10
3IN1
USB port 12
page 36
USB
Int. Camera
USB port 11
page 40
page 22
5V 480MHz
2
LCD Conn.
page 22
CRT
PCIeMini Card
WiMax
page 23
USB
HDMI Conn.
USB port 13
page 36
5V 480MHz
PCIeMini Card
WLAN
PCIe 1x
page 24
1.5V 2.5GHz(250MB/s)
PCIe port 1
page 36
Intel Ibex Peak

SATA port 1
(Reserve)
Express Card
5V 3GHz(300MB/s)
USB port 8
PCIe port 0
RJ45
page 36
PCIe 1x
PCIe port 2
SATA port 4
BGA-951
1.5V 2.5GHz(250MB/s)
RTL8103EL-VB 10/100M
page 37
page 34
5V 480MHz
(Reserve)
Express Card
3
SATA HDD0
USB
5V 3GHz(300MB/s)
PCIe 1x
page 37
SATA ODD
page 34
3
SATA port 5
1.5V 2.5GHz(250MB/s)
5V 3GHz(300MB/s)
page 25,26,27,28,29,30,31,32,33
eSATA
USB port 3
Power/B
USB/B
3.3V 33 MHz
LPC BUS
5V 480MHz
HD Audio
RTC CKT.
page 35
USB port 3
page 34
3.3V/1.5V 24MHz
HDA Codec
MDC 1.5 Conn

page 28
SPI ROM
page 25
Debug Port
ENE KB926 D3
page 42
page 35
page 41
AMP.
ALC272
TPA6017
page 38
page 39
DC/DC Interface CKT.
page 34
page 44
4
USB
page 34
Touch Pad
ODD/B for 17"
page 34
page 35
Power Circuit DC/DC

page 45~54
Int.KBD
Int.
MIC CONN
page 39
EC ROM
page 35
page 42
2009/01/23
Deciphered Date
2010/01/23
B
HP CONN
page 39
SPK CONN
page 39
Compal Secret Data
Issued Date
MIC CONN
page 39
Title

Size
Document Number
Rev
D
401717
Date:
Sheet
E
of
58
NSWAA
NTWAA
Liverpool Intel Arrandale (Discrete)

Sunderland Intel Arrandale (Discrete)
B+
Ipeak=5A, Imax=3.5A, Iocp min=7.9
DESIGN CURRENT 5A
+5VALW
DESIGN CURRENT 4A
+5VS
SUSP
N-CHANNEL
SI4800
D
TPS51125RGER
DESIGN CURRENT 5A
+3VALW
DESIGN CURRENT 5A
+3VS
SUSP
N-CHANNEL
SI4800
VGA_ENVDD
P-CHANNEL
AO-3413
DESIGN CURRENT 1.5A
+LCD_VDD
WOL_EN#
P-CHANNEL
AO-3413
DESIGN CURRENT 330mA
BT_PWR#
P-CHANNEL
AO-3413
+BT_VCC
C
PCIE_OK
P-CHANNEL
AO-3413
+3V_LAN
+3VS_DELAY
DESIGN CURRENT 48A
+CPU_CORE
DESIGN CURRENT 26A
+VGA_CORE
DESIGN CURRENT 18A
+VTT
VR_ON
ISL62883
SUSP#
APW7138
VTTP_EN#
APW7138
B
SYSON
DESIGN CURRENT 15A
+1.5V
DESIGN CURRENT 12A
+1.5VS
DESIGN CURRENT 1.5A
+0.75VS
DESIGN CURRENT 2A
+1.1VS
DESIGN CURRENT 8A
+1.8VS
DESIGN CURRENT 7A
+1.05VS
APW7138
SUSP
N-CHANNEL
SI4856
SUSP
PCIE_OK
SUSP#
G2992F1U
APL5913
TPS51117RGYR
SUSP#
TPS51117RGYR
Compal Secret Data
2009/01/23
Issued Date
Deciphered Date
2010/01/23
5
Title

Size
Document Number
Rev
D
401717
Date:
Sheet
1
of
58
( O MEANS ON
Voltage Rails
+RTCVCC
X MEANS OFF )
BTO Option Table
+5VALW
+B
power
plane
+5VS
+1.5V
+3VALW
+3VS
+VSB
+1.5VS
+VGA_CORE
Function
Bluetooth
description
(B)
explain
Bluetooth
BTO
BT@
+CPU_CORE
RJ11
Express Card
MIC
HDMI
(E)
(Y)
New Card
MDC
MDC@
M1/M3
Panel
NEW@
MIC
HDMI
16"
17"
M1
M3
MIC@
HDMI@
16@
17@
M1@
M3@
+VTT
+1.05VS
Function
+1.8VS
+1.1VS
State
+0.75VS
S0
S1
S3
S5 S4/ Battery only
S5 S4/AC & Battery

don't exist
S5 S4/AC
EC SM Bus1 address
Power
Device
Address
+3VALW EC KB926 D3
+3VALW Smart Battery
0001 011x b
Mini Card
GPU
VRAM
description
explain
WIRELESS
BTO
WLAN@
STATE
256M
512M
2PCS@
4PCS@ 8PCS@
SIGNAL
Full ON
1G
M92 XTX
M96 Pro
M92XTX@
M96PRO@
SLP_S3# SLP_S4# SLP_S5#

HIGH
HIGH
HIGH
S1(Power On Suspend)
HIGH
HIGH
HIGH
S3 (Suspend to RAM)
LOW
HIGH
HIGH
S4 (Suspend to Disk)
LOW
LOW
HIGH
S5 (Soft OFF)
LOW
LOW
LOW
G3
LOW
LOW
LOW
EC SM Bus2 address
Power
Device
+3VS
EC KB926 D3
Address
+3VS
VGA THM Sensor

ADM1032ARMZ
1001 110x b
+3VS
PCH
0100 110x b
PCH SM Bus address
Power
Device
+3VALW
PCH
Address
+3VS
Clock Generator
1101 001x b
+3VS
DDR DIMM0
1001 000x b
+3VS
DDR DIMM1
1001 010x b
+3VS
Express
+3VS
WLAN/Wimax/3G
Compal Secret Data
2009/01/23
Issued Date
Deciphered Date
2010/01/23
A
Title

Size Document Number
Custom
Rev
D
401717
Date:
Sheet
E
of
58
JCPUB
AN26
PROCHOT#
H_CPURST#
AK15
30 H_THERMTRIP#
13,29,36,37,41,42
2
0_0402_5%
PLT_RST#
1
R36
H_CPURST#
2
1K_0402_5%
AP26
1
R43
H_PMSYNCH
2
0_0402_5%
AL15
PM_SYNC
AN14
VCCPWRGOOD_1
1 H_PWRGOOD1_R
R25
2
0_0402_5%
H_PWRGOOD
30 H_PWRGOOD
2
DRAMPWROK
27 DRAMPWROK
2
0_0402_5%
1 H_PWRGOOD0_R
R24
AN27
2
0_0402_5%
1 DRAMPWROK_R
R69
AK13
SM_DRAMPWROK
VTTPWROK_CPU
AM15
VTTPWRGOOD
TAPPWRGD
AM26
TAPPWRGOOD
AL14
RSTIN#
R28
1.1K_0402_1%
RESET_OBS#
VCCPWRGOOD_0
DRAMPWROK
R29
3K_0402_1%
29 BUF_PLT_RST#
1.5K_0402_1%
R30
R31
750_0402_1%
R29 @
750_0402_1%
PWR MANAGEMENT
PMSYNCH
+1.5V_CPU
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
PM_EXT_TS#[0]
PM_EXT_TS#[1]
F6
AL1 SM_RCOMP_0
AM1 SM_RCOMP_1
AN1 SM_RCOMP_2
AN15 PM_EXTTS#0
AP15 PM_EXTTS#_R
PRDY#
PREQ#
AT28
AP27
XDP_PRDY#
XDP_PREQ#
TCK
TMS
TRST#
AN28
AP28
AT27
XDP_TCK
XDP_TMS
XDP_TRST#
TDI
TDO
TDI_M
TDO_M
AT29
AR27
AR29
AP29
XDP_TDI_R
XDP_TDO_R
XDP_TDI_M
XDP_TDO_M
DBR#
AN25
R6 1
R7 1
R8 1
2
R12
1
0_0402_5%
DDR3 Compensation Signals

Layout Note:Please these
resistors near Processor
PM_EXTTS#0
AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23
+VTT
2
@ C389
2
R312
1
1K_0402_5%
1
@ C132
XDP_PREQ#
1
@ C93
XDP_TCK
1
@ C95
XDP_TMS
1
@ C96
XDP_TRST#
1
@ C130
XDP_TDI
1
@ C97
XDP_TDO
1
@ C131
XDP_DBRESET#
1
@ C149
1000P_0402_50V7K
XDP_PREQ#
XDP_PRDY#
1
1000P_0402_50V7K
XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
VTTPWROK_CPU
@ R32
H_PWRGOOD 1
XDP_BPM#6
XDP_BPM#7
1K_0402_5%
H_PWRGOOD_R
2
5
IN1
IN2
O
3
TAPPWRGD
U10 @
1
@ R35
2 TAPPWRGD_R
0_0402_5%
R33
2
0.1U_0402_10V6K
2
0.1U_0402_10V6K
2
0.1U_0402_10V6K
2
0.1U_0402_10V6K
2
0.1U_0402_10V6K
2
0.1U_0402_10V6K
2
0.1U_0402_10V6K
2
0.1U_0402_10V6K
DRAMPWROK
@
1.5K_0402_1%
PAD
PAD
T1
T2
XDP_TCK
SN74AHC1G08DCKR_SC70-5
XDP_TDI
XDP_TDO_M
1 @
R21
2
0_0402_5%
XDP_TDO
1 @
R26
2
0_0402_5%
1
R27
2
0_0402_5%
JTAG MAPPING
Scan Chain
(Default)
STUFF -> R20, R23, R27

NO STUFF -> R21, R26
CPU Only
STUFF -> R20, R21

NO STUFF -> R23, R26, R27
GMCH Only
STUFF -> R26, R27

NO STUFF -> R20, R21, R23
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
GND0
OBSFN_A0
OBSFN_A1
GND2
OBSDATA_A0
OBSDATA_A1
GND4
OBSDATA_A2
OBSDATA_A3
GND6
OBSFN_B0
OBSFN_B1
GND8
OBSDATA_B0
OBSDATA_B1
GND10
OBSDATA_B2
OBSDATA_B3
GND12
PWRGOOD/HOOK0
HOOK1
VCC_OBS_AB
HOOK2
HOOK3
GND14
SDA
SCL
TCK1
TCK0
GND16
GND1
OBSFN_C0
OBSFN_C1
GND3
OBSDATA_C0
OBSDATA_C1
GND5
OBSDATA_C2
OBSDATA_C3
GND7
OBSFN_D0
OBSFN_D1
GND9
OBSDATA_D0
OBSDATA_D1
GND11
OBSDATA_D2
OBSDATA_D3
GND13
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND15
TD0
TRST#
TDI
TMS
GND17
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
+VTT
CLK_CPU_XDP
CLK_CPU_XDP#
XDP_RST#_R
XDP_DBRESET#
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
1
R14
2
51_0402_5% 1
C2 @
R11
0.1U_0402_10V6K
51_0402_5% 2
1
R52
Issued Date
Compal Secret Data
2009/01/23
2010/01/23
Deciphered Date
5
2
0_0402_5%
JXDP
SAMTE_BSH-030-01-L-D-A
@
2
0_0402_5%
1
R20
XDP Connector
+VTT
1
0.1U_0402_10V6K
27 PM_PBTN_OUT#
VTTPWROK
XDP_TDI_R
+3VS
XDP_PRDY#
2
C1
+3VALW
44,49 VTTPWROK
1 10K_0402_5%
R23
0_0402_5%
XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_BPM#6
XDP_BPM#7
1
PMEG2010AEH_SOD123
1
2
@ D54
Routed as a single daisy chain
R22 @
1K_0402_5%
1
R53
PM_EXTTS#_R R13
XDP_TDI_M
2
0_0402_5%
1 10K_0402_5%
@ C384
XDP_DBRESET# 27
+VTT
R15
XDP_TDO_R
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
C301 @
0.047U_0402_16V7K
12/22: Modify for M96 and M96 Pro select
PM_EXTTS# 11,12
DRAMPWROK
C301 M96@
10K_0402_5%
2 100_0402_1%
2 24.9_0402_1%
2 130_0402_1%
Close to JCPU
SM_DRAMRST# 11,12
Q41 @
BSS138_NL_SOT23-3
RST_GATE 11,30
SM_DRAMRST#_CPU
EMI reverse, close to JCPU
@ R123
100K_0402_5%
Unused by Clarksfield rPGA989
IC,AUB_CFD_rPGA,R0P9
@
VTTPWROK_CPU
2
SM_DRAMRST#
1
R37
XDP_RST#_R
27
THERMTRIP#
A18
A17
PECI
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
SM_DRAMRST#_CPU
CLK_PEG 26
CLK_PEG# 26
41,53 H_PROCHOT#
2
68_0402_5%
2H_PROCHOT#_D
0_0402_5%
E16
D16
AT15
1
R9
1
R40
PEG_CLK
PEG_CLK#
1
0_0402_5%
CATERR#
AR30
AT30
2
R19
CLK_CPU_BCLK 30
CLK_CPU_BCLK# 30
CLK_CPU_XDP_R 1
CLK_CPU_XDP
2
CLK_CPU_XDP#_R 1 R41 @ 2 0_0402_5% CLK_CPU_XDP#
R42 @
0_0402_5%
AK14
CLOCKS
SKTOCC#
CATERR#
DDR3
MISC
AH24
BCLK_ITP
BCLK_ITP#
JTAG & BPM
TP_SKTOCC#
PECI
+VTT
COMP0
A16
B16
30
R10
68_0402_5%
@
COMP1
BCLK
BCLK#
+VTT
T41
2
49.9_0402_1%
COMP2
THERMAL
1
R18
COMP3
PAD
+VTT
D
H_COMP3 AT23
2
20_0402_1%
H_COMP2 AT24
2
20_0402_1%
H_COMP1 G16
2
49.9_0402_1%
H_COMP0 AT26
2
49.9_0402_1%
MISC
1
R1
1
R2
1
R4
1
R3
Title

Custom
Rev
D
401717
Date:
Sheet

1
of
58
+5VS
FAN Control
Circuit
1SS355_SOD323-2
1
1A
D1
@
JFAN
+FAN1
C3
10U_0805_10V4Z
41
EN_DFAN1
10mil
EN
VIN
VOUT
VSET
GND
GND
GND
GND
C4
@ 1000P_0402_50V7K
1
DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]
27
27
27
27
DMI_PTX_CRX_P0
DMI_PTX_CRX_P1
DMI_PTX_CRX_P2
DMI_PTX_CRX_P3
B24
D23
B23
A22
DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]
27
27
27
27
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
D24
G24
F23
H23
DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]
27
27
27
27
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
D25
F24
E23
G23
DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]
FDI_TX#[0]
FDI_TX#[1]
FDI_TX#[2]
FDI_TX#[3]
FDI_TX#[4]
FDI_TX#[5]
FDI_TX#[6]
FDI_TX#[7]
D22
C21
D20
C18
G22
E20
F20
G19
FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
FDI_TX[3]
FDI_TX[4]
FDI_TX[5]
FDI_TX[6]
FDI_TX[7]
2
R686
1
1K_0402_5%
F17
E17
FDI_FSYNC[0]
FDI_FSYNC[1]
2
R688
1
1K_0402_5%
C17
FDI_INT
F18
D17
FDI_LSYNC[0]
FDI_LSYNC[1]
Intel(R) FDI
E22
D21
D19
D18
G21
E19
F21
G18
PCI EXPRESS -- GRAPHICS
A24
C23
B22
A21
DMI
DMI_PTX_CRX_N0
DMI_PTX_CRX_N1
DMI_PTX_CRX_N2
DMI_PTX_CRX_N3
PEG_COMP 1
R38
GND
GND
BAS16_SOT23-3
R34
APL5607KI-TRG_SO8
C5
10U_0805_10V4Z
10K_0402_5%
1
+3VS
FAN_SPEED1 41
2
C6
0.01U_0402_16V7K
1 @
JCPUA
27
27
27
27
4
5
ACES_85204-0300N
@
+FAN1
D2
@
8
7
6
5
1
2
3
U1
1
2
3
4
1
2
3
2
49.9_0402_1%
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS
B26
A26
B27
A25
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31
PEG_RBIAS 1
2
R39
750_0402_1%
PCIE_GTX_C_CRX_N0
PCIE_GTX_C_CRX_N1
PCIE_GTX_C_CRX_N2
PCIE_GTX_C_CRX_N3
PCIE_GTX_C_CRX_N4
PCIE_GTX_C_CRX_N5
PCIE_GTX_C_CRX_N6
PCIE_GTX_C_CRX_N7
PCIE_GTX_C_CRX_N8
PCIE_GTX_C_CRX_N9
PCIE_GTX_C_CRX_N10
PCIE_GTX_C_CRX_N11
PCIE_GTX_C_CRX_N12
PCIE_GTX_C_CRX_N13
PCIE_GTX_C_CRX_N14
PCIE_GTX_C_CRX_N15
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30
PCIE_GTX_C_CRX_P0
PCIE_GTX_C_CRX_P1
PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_P3
PCIE_GTX_C_CRX_P4
PCIE_GTX_C_CRX_P5
PCIE_GTX_C_CRX_P6
PCIE_GTX_C_CRX_P7
PCIE_GTX_C_CRX_P8
PCIE_GTX_C_CRX_P9
PCIE_GTX_C_CRX_P10
PCIE_GTX_C_CRX_P11
PCIE_GTX_C_CRX_P12
PCIE_GTX_C_CRX_P13
PCIE_GTX_C_CRX_P14
PCIE_GTX_C_CRX_P15
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26
PCIE_CTX_GRX_N0
PCIE_CTX_GRX_N1
PCIE_CTX_GRX_N2
PCIE_CTX_GRX_N3
PCIE_CTX_GRX_N4
PCIE_CTX_GRX_N5
PCIE_CTX_GRX_N6
PCIE_CTX_GRX_N7
PCIE_CTX_GRX_N8
PCIE_CTX_GRX_N9
PCIE_CTX_GRX_N10
PCIE_CTX_GRX_N11
PCIE_CTX_GRX_N12
PCIE_CTX_GRX_N13
PCIE_CTX_GRX_N14
PCIE_CTX_GRX_N15
C39
C40
C41
C42
C43
C44
C45
C46
C47
C48
C49
C50
C51
C52
C53
C54
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_CTX_C_GRX_N0
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_N13
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_N15
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25
PCIE_CTX_GRX_P0
PCIE_CTX_GRX_P1
PCIE_CTX_GRX_P2
PCIE_CTX_GRX_P3
PCIE_CTX_GRX_P4
PCIE_CTX_GRX_P5
PCIE_CTX_GRX_P6
PCIE_CTX_GRX_P7
PCIE_CTX_GRX_P8
PCIE_CTX_GRX_P9
PCIE_CTX_GRX_P10
PCIE_CTX_GRX_P11
PCIE_CTX_GRX_P12
PCIE_CTX_GRX_P13
PCIE_CTX_GRX_P14
PCIE_CTX_GRX_P15
C55
C56
C57
C58
C59
C60
C61
C62
C63
C64
C65
C66
C67
C68
C69
C70
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_P14
PCIE_CTX_C_GRX_P15
PCIE_GTX_C_CRX_N[0..15]
13
PCIE_GTX_C_CRX_P[0..15]
13
PCIE_CTX_C_GRX_N[0..15]
13
PCIE_CTX_C_GRX_P[0..15]
13
@
Compal Secret Data
2009/01/23
Issued Date
Deciphered Date
2010/01/23
5
Title

Size
B
Date:
Document Number
Rev
D
401717
Sheet
1
of
58
JCPUC
JCPUD
12 DDR_B_D[0..63]
A10
C10
C7
A7
B10
D10
E10
A8
D8
F10
E6
F7
E9
B7
E7
C6
H10
G8
K7
J8
G7
G10
J7
J10
L7
M6
M8
L9
L6
K8
N8
P9
AH5
AF5
AK6
AK7
AF6
AG5
AJ7
AJ6
AJ10
AJ9
AL10
AK12
AK8
AL7
AK11
AL8
AN8
AM10
AR11
AL11
AM9
AN9
AT11
AP12
AM12
AN12
AM13
AT14
AT12
AL13
AR14
AP14
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
AC3
AB2
U7
SA_BS[0]
SA_BS[1]
SA_BS[2]
11 DDR_A_CAS#
11 DDR_A_RAS#
11 DDR_A_WE#
AE1
AB3
AE9
SA_CAS#
SA_RAS#
SA_WE#
AA6
AA7
P7
DDRA_CLK0 11
DDRA_CLK0# 11
DDRA_CKE0 11
SA_CK[1]
SA_CK#[1]
SA_CKE[1]
Y6
Y5
P6
DDRA_CLK1 11
DDRA_CLK1# 11
DDRA_CKE1 11
SA_CS#[0]
SA_CS#[1]
AE2
AE8
DDRA_SCS0# 11
DDRA_SCS1# 11
SA_ODT[0]
SA_ODT[1]
AD8
AF9
DDRA_ODT0 11
DDRA_ODT1 11

DDR_A_DM[0..7]
SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]
DDR SYSTEM MEMORY A
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
SA_CK[0]
SA_CK#[0]
SA_CKE[0]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
B9
D7
H7
M7
AG6
AM7
AN10
AN13
11
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
C9 DDR_A_DQS#0
DDR_A_DQS#1
F8
DDR_A_DQS#2
J9
N9 DDR_A_DQS#3
AH7 DDR_A_DQS#4
AK9 DDR_A_DQS#5
AP11 DDR_A_DQS#6
AT13 DDR_A_DQS#7
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
C8
F9
H9
M9
AH8
AK10
AN11
AR13
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
DDR_A_DQS#[0..7]
DDR_A_DQS[0..7]
DDR_A_MA[0..15]
11
11
11
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5
F3
G4
H6
G2
J6
J3
G1
G5
J2
J1
J5
K2
L3
M1
K5
K4
M4
N5
AF3
AG1
AJ3
AK1
AG4
AG3
AJ4
AH4
AK3
AK4
AM6
AN2
AK5
AK2
AM4
AM3
AP3
AN5
AT4
AN6
AN4
AN3
AT5
AT6
AN7
AP6
AP8
AT9
AT7
AP9
AR10
AT10
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
AB1
W5
R7
SB_BS[0]
SB_BS[1]
SB_BS[2]
12 DDR_B_CAS#
12 DDR_B_RAS#
12 DDR_B_WE#
AC5
Y7
AC6
SB_CAS#
SB_RAS#
SB_WE#
12
12
12
SB_CK[0]
SB_CK#[0]
SB_CKE[0]
W8
W9
M3
DDRB_CLK0 12
DDRB_CLK0# 12
DDRB_CKE0 12
SB_CK[1]
SB_CK#[1]
SB_CKE[1]
V7
V6
M2
DDRB_CLK1 12
DDRB_CLK1# 12
DDRB_CKE1 12
SB_CS#[0]
SB_CS#[1]
AB8
AD6
DDRB_SCS0# 12
DDRB_SCS1# 12
SB_ODT[0]
SB_ODT[1]
AC7
AD1
DDRB_ODT0 12
DDRB_ODT1 12
SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]
D4
E1
H3
K1
AH1
AL2
AR4
AT8
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
DDR_B_DM[0..7]
12

C
DDR SYSTEM MEMORY - B
11 DDR_A_D[0..63]
11
11
11
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
D5
F4
J4
L4
AH2
AL4
AR5
AR8
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
C5
E3
H4
M5
AG2
AL5
AP5
AR7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
DDR_B_DQS#[0..7]
DDR_B_DQS[0..7]
12
12
DDR_B_MA[0..15]
12
@
A
@
Compal Secret Data
2009/01/23
Issued Date
Deciphered Date
2010/01/23
5
Title

Size
B
Date:
Document Number
Rev
D
401717
Sheet
1
of
58
(Place these capacitors under CPU socket Edge, top layer)
(Place these capacitors between inductor and socket on Bottom)
+VTT
+CPU_CORE
AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
D
VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44
10U_0805_10V4K
@
C80 1
@
C82 1
@
C84 1
2 330U_D2E_2.5VM_R6M
C81 1
2 10U_0805_10V4K
AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
2 330U_D2E_2.5VM_R6M
C83 1
2 10U_0805_10V4K
VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8
VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32
2 330U_D2E_2.5VM_R6M
C85 1
2 10U_0805_10V4K
C89 1
2 10U_0805_10V4K
C87 1
2 22U_0805_6.3V6M
C88 1
2 10U_0805_10V4K
C91 1
2 22U_0805_6.3V6M
C90 1
2 10U_0805_10V4K
C92 1
2 10U_0805_10V4K
C94 1
2 10U_0805_10V4K@
1
C71
10U_0805_10V4K
C74
1
C75
10U_0805_10V4K
10U_0805_10V4K
1
+
C73
1
C76
1
C77
10U_0805_10V4K
1
C78
C79
10U_0805_10V4K
+CPU_CORE
1
+
C72
(Place these capacitors under CPU socket, top layer)
+VTT
C144
390U_2.5V_M_R10
10U_0805_10V4K
Co-layout with C80, C82
2
C159
390U_2.5V_M_R10
10U_0805_10V4K
1
C98
10U_0805_10V4K
1
C99
1
C100
10U_0805_10V4K
10U_0805_10V4K
1
C101
1
C102
10U_0805_10V4K
1
C103
C104
2
10U_0805_10V4K
(Place these capacitors on CPU cavity, Bottom Layer)
5/25: Add for power team request.
+CPU_CORE
+CPU_CORE
22U_0805_6.3V6M
22U_0805_6.3V6M
C158
@
C150
@
C128
22U_0805_6.3V6M
1
C127
22U_0805_6.3V6M
C120
C118
C119
C117
C129
C105
C106
2
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1
22U_0805_6.3V6M
C107
C108
C109
C110
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C111
C112
2
PSI#
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
PROC_DPRSLPVR
AN33
H_PSI#
AK35
AK33
AK34
AL35
AL33
AM33
AM35
AM34 H_DPRSLPVR_R 1
R62
CPU_VID0 53
CPU_VID1 53
CPU_VID2 53
CPU_VID3 53
CPU_VID4 53
CPU_VID5 53
CPU_VID6 53
H_DPRSLPVR 53
2
0_0402_5%
CRB default setting:

VID[6:0]=[0100111]
53
VTT Rail
G15
C113
22U_0805_6.3V6M
1
C114
C115
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C116
22U_0805_6.3V6M
TOP side (under inductor)
Auburndale +1.1VS_VTT=1.05V
Clarksfield +1.1VS_VTT=1.1V
H_VTTSELECT 49
22U_0805_6.3V6M
+CPU_CORE
+CPU_CORE
1
VTT_SELECT
H_VTTSELECT = low, 1.1V
C148
H_VTTSELECT = high, 1.05V
330U_D2_2.5VY_R9M
2
C121
330U_D2_2.5VY_R9M
1
C124
330U_D2_2.5VY_R9M
2
+
2
330U_D2_2.5VY_R9M
1
+
C122
C123
@
330U_D2_2.5VY_R9M
2
+
2
330U_D2_2.5VY_R9M
1
+
C125
C126
@
@
330U_D2_2.5VY_R9M
2
1
+
C218
560U_2.5V_M
@
Co-layout with C126

ISENSE
VCC_SENSE
VSS_SENSE
VTT_SENSE
VSS_SENSE_VTT
AN35
AJ34
AJ35
9/11: Add for power team request.
IMVP_IMON 53
VCCSENSE_R R65
VSSSENSE_R R66
B15
A15
1
1
2 0_0402_5%
2 0_0402_5%
VTT_SENSE 49
VSS_SENSE_VTT 49
1
R64
VCCSENSE
VSSSENSE
R67
2
100_0402_1%
+CPU_CORE
VCCSENSE 53
VSSSENSE 53
2
100_0402_1%
near CPU
Issued Date
Compal Secret Data
@
+CPU_CORE
POWER
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100
1.1V RAIL POWER
Auburndale:18A
CPU CORE SUPPLY
Clarksfield: 21A
Auburndale:48A
CPU VIDS
AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26
Clarksfield: 65A
SENSE LINES
Material Note (+VTT):

330uF/ 6mohm, number are 3,
power x1, HW x2
JCPUF
+CPU_CORE
2009/01/23
2010/01/23
Deciphered Date
4
Title

Custom
Rev
D
401717
Date:
Sheet
1
of
58
+1.5V_CPU
+1.5V
Q33 @
10U_0805_10V4K
FDS6676AS_SO8
C179 @
1
2
3
4
@ R424
470_0805_5%
D
D
D
D
8
7
6
5
@
1 R418
2
220K_0402_5%
@ Q46B
@
C472
R417 @
820K_0402_5%
Q46A @
2
2
0.1U_0402_25V6
SUSP
SUSP
44,52
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
SUSP
+VSB
3 1
S
S
S
G
22U_0805_6.3V6M
C142
Clarksfield: 21A
22U_0805_6.3V6M
PJ30
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
JUMP_43X79
PJ31 @
22U_0805_6.3V6M
2
1
1
C133
1
C134
1
C135
1
C136
1
C137
1
C138
C140
Reserve for EMI request
C139
330U_D2E_2.5VM_R9M
Co-layout with C140
@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+1.5V
JUMP_43X79
+1.5V_CPU
+1.5V
+1.5V_CPU
22U_0805_6.3V6M
1
C216
390U_2.5V_M_R10
+VTT
VTT0_59
VTT0_60
VTT0_61
VTT0_62
P10
N10
L10
K10
VTT1_63
VTT1_64
VTT1_65
VTT1_66
VTT1_67
VTT1_68
J22
J20
J18
H21
H20
H19
(Place these capacitors under CPU socket Edge, top layer)

1
C143
B
10U_0805_10V4K
+VTT
1.1V
C145
22U_0805_6.3V6M

+1.8VS
1.8V
VTT1_48
VTT1_49
VTT1_50
VTT1_51
VTT1_52
VTT1_53
VTT1_54
VTT1_55
VTT1_56
VTT1_57
VTT1_58
PEG & DMI
22U_0805_6.3V6M
C147
K26
J27
J26
J25
H27
G28
G27
G26
F26
E26
E25
2 0.1U_0402_16V4Z
1 1K_0402_5%
Auburndale:18A
2 0.1U_0402_16V4Z
C180 1
C257
0.1U_0402_16V4Z
Auburndale:3A
22U_0805_6.3V6M
+VTT
C146
R687 2
2 0.1U_0402_16V4Z
C185 1
AR25
AT25
AM24
2 0.1U_0402_16V4Z
C186 1
C258
0.1U_0402_16V4Z
GFX_VR_EN
GFX_DPRSLPVR
GFX_IMON
C205 1
C256
0.1U_0402_16V4Z
AM22
AP22
AN22
AP23
AM23
AP24
AN24
DDR3
GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]
- 1.5V RAILS
Clarksfield: 5A
FDI
C141
VTT1_45
VTT1_46
VTT1_47
AR22
AT22
+1.5V_CPU
+VTT
J24
J23
H25
VAXG_SENSE
VSSAXG_SENSE
C160
0.1U_0402_16V4Z
SENSE
LINES
GRAPHICS
GRAPHICS VIDs
R86
0_0402_5%
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
POWER
JCPUG
AT21
AT19
AT18
AT16
AR21
AR19
AR18
AR16
AP21
AP19
AP18
AP16
AN21
AN19
AN18
AN16
AM21
AM19
AM18
AM16
AL21
AL19
AL18
AL16
AK21
AK19
AK18
AK16
AJ21
AJ19
AJ18
AJ16
AH21
AH19
AH18
AH16
VCCPLL1
VCCPLL2
VCCPLL3
Clarksfield: 0.6A
Auburndale:0.6A
L26
L27
M26
+1.8VS_H_PLL 1U_0402_6.3V4Z
C151
1U_0402_6.3V4Z
4.7U_0603_6.3V6K
1
C152
2
R71
1
0_0805_5%
1
C153
C154
C155
2 22U_0805_6.3V6M
2.2U_0603_6.3V4Z
@
A
Compal Secret Data
2009/01/23
Issued Date
Deciphered Date
2010/01/23
5
Title

Size
B
Date:
Document Number
Rev
D
401717
Sheet
1
of
58
JCPUI
JCPUH
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS
NCTF
K27
K9
K6
K3
J32
J30
J21
J19
H35
H32
H28
H26
H24
H22
H18
H15
H13
H11
H8
H5
H2
G34
G31
G20
G9
G6
G3
F30
F27
F25
F22
F19
F16
E35
E32
E29
E24
E21
E18
E13
E11
E8
E5
E2
D33
D30
D26
D9
D6
D3
C34
C32
C29
C28
C24
C22
C20
C19
C16
B31
B25
B21
B18
B17
B13
B11
B8
B6
B4
A29
A27
A23
A9
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
AT35
AT1
AR34
B34
B2
B1
A35
H_NCTF1
H_NCTF2
H_NCTF6
H_NCTF7
PAD T4
PAD T5
PAD T6
PAD T7
@
AT20
AT17
AR31
AR28
AR26
AR24
AR23
AR20
AR17
AR15
AR12
AR9
AR6
AR3
AP20
AP17
AP13
AP10
AP7
AP4
AP2
AN34
AN31
AN23
AN20
AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11
AM8
AM5
AM2
AL34
AL31
AL23
AL20
AL17
AL12
AL9
AL6
AL3
AK29
AK27
AK25
AK20
AK17
AJ31
AJ23
AJ20
AJ17
AJ14
AJ11
AJ8
AJ5
AJ2
AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13
AH9
AH6
AH3
AG10
AF8
AF4
AF2
AE35
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
JCPUE
VSS
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30
AP25
AL25
AL24
AL22
AJ33
AG9
M27
L28
J17
H17
G25
G17
E31
E30
+VREF_DQA_M3
+VREF_DQB_M3
WW41 Recommend not pull down

PCIE2.0 Jitter is over on ES1
3.01K_0402_1% 1 @ R74
3.01K_0402_1% 1 @ R75
3.01K_0402_1% 1 @ R76
2
2
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
AM30
AM28
AP31
AL32
AL30
AM31
AN29
AM32
AK32
AK31
AK28
AJ28
AN30
AN32
AJ32
AJ29
AJ30
AK30
H16
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
RSVD_TP_86
RSVD32
RSVD33
AJ13
AJ12
RSVD34
RSVD35
AH25
AK26
RSVD36
RSVD_NCTF_37
AL26
AR2
RSVD38
RSVD39
AJ26
AJ27
RSVD_NCTF_40
RSVD_NCTF_41
AP1
AT2
RSVD_NCTF_42
RSVD_NCTF_43
AT3
AR1
RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53
RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57
RSVD58
AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32
Reserve via for test

@
0_0402_5%
1 R114
2
1
2
R111
0_0402_5%
@
CFG0 - PCI-Express Configuration Select

*1:Single PEG
0:Bifurcation enabled
B19
A19
RSVD15
RSVD16
A20
B20
RSVD17
RSVD18
U9
T9
RSVD19
RSVD20
AC9
AB9
RSVD21
RSVD22
C1
A3
CFG3 - PCI-Express Static Lane Reversal

*1 :Normal Operation
0 :Lane Numbers Reversed
15 -> 0, 14 -> 1, ...
RSVD_NCTF_23
RSVD_NCTF_24
J29
J28
RSVD26
RSVD27
A34
A33
RSVD_NCTF_28
RSVD_NCTF_29
C35
B35
RSVD_NCTF_30
RSVD_NCTF_31
RSVD_TP_59
RSVD_TP_60
KEY
RSVD62
RSVD63
RSVD64
RSVD65
E15
F15
A2
@
D15
0_0402_5%
C15
2
AJ15 1 R116
2
AH15 1
R115
0_0402_5%
@
RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75
AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3
RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85
V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9
VSS
CFG4 - Display Port Presence

*1:Disabled; No Physical Display Port
attached to Embedded Display Port
0:Enabled; An external Display Port
device is connected to the Embedded
Display Port
@
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9 (SA_DIMM_VREF)
RSVD10(SB_DIMM_VREF)
RSVD11
RSVD12
RSVD13
RSVD14
RESERVED
AP34
@
*:Default
A
Compal Secret Data
2009/01/23
Issued Date
Deciphered Date
2010/01/23
5
Title

Custom
Rev
D
401717
Date:
Sheet
1
10
of
58
+1.5V
DDR3 SO-DIMM A
Standard Type
JDDRL
DDR_A_MA12
DDR_A_MA9
DDRA_CLK0
DDRA_CLK0#
DDR_A_BS0
7
7
DDR_A_WE#
DDR_A_CAS#
DDR_A_MA10
DDR_A_MA13
7
DDRA_SCS1#
DDR_A_D32
DDR_A_D33
B
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D35
DDR_A_D40
DDR_A_D41
DDR_A_DM5
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
DDR_A_DM7
1
1
C182
2
R91
10K_0402_5%
2
1
C181
2.2U_0603_6.3V4Z
+3VS
0.1U_0402_16V4Z
DDR_A_D58
DDR_A_D59
R90 1
2
10K_0402_5%
+0.75VS
BOSS1
BOSS2
206
208
DDR_A_MA15
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
R95
R83 @
1K_0402_1%
RST_GATE
2 M3@
1
0_0402_5%
+VREF_DQB_M3
M3@
R121
100K_0402_5%
DDR_A_MA2
DDR_A_MA0
DDRA_CLK1 7
DDRA_CLK1# 7
1
2
1
1
R92
R81
1K_0402_1%
+1.5V
@
R84
1K_0402_1%
Q39 @
2N7002_SOT23-3
DDR_A_MA6
DDR_A_MA4
R79
1K_0402_1%
GND1
GND2
205
207
M3@
R122
100K_0402_5%
DDRA_CKE1 7
2 M1@
0_0402_5%
+VREF_DQB
2 M1@
0_0402_5%
1
R93
R126 @
1K_0402_1%
7
7
+VREF_DQA_M3
+V_DDR3_DIMM_REF
+VREF_DQA
DDR_A_MA3
DDR_A_MA1
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
DDR_A_D30
DDR_A_D31
DDR_A_MA8
DDR_A_MA5
CKE1
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
S0#
ODT0
VDD
ODT1
NC
VDD
VREF_CA
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
EVENT#
SDA
SCL
VTT
Q40 @
2N7002_SOT23-3
DDR_A_BS2
CKE0
VDD
NC
BA2
VDD
A12/BC#
A9
VDD
A8
A5
VDD
A3
A1
VDD
CK0
CK0#
VDD
A10/AP
BA0
VDD
WE#
CAS#
VDD
A13
S1#
VDD
TEST
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SA0
VDDSPD
SA1
VTT
R82 @
1K_0402_1%
DDR_A_DQS#3
DDR_A_DQS3
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
DDR_A_D28
DDR_A_D29
DDRA_CKE0
+1.5V
2 M3@
1
R94
0_0402_5%
+1.5V
DDR_A_D22
DDR_A_D23
DDR_A_D26
DDR_A_D27
DDR_A_DM2
DDR_A_DM3
DDR_A_D20
DDR_A_D21
RST_GATE 5,30
DDR_A_D24
DDR_A_D25
SM_DRAMRST# 5,12
DDR_A_D14
DDR_A_D15
DDR_A_D18
DDR_A_D19
DDR_A_DM1
DDR_A_DQS#2
DDR_A_DQS2
7 DDR_A_MA[0..15]
R80 @
1K_0402_1%
DDR_A_D12
DDR_A_D13
DDR_A_D16
DDR_A_D17
7 DDR_A_DM[0..7]
DDR_A_D10
DDR_A_D11
7 DDR_A_D[0..63]
+1.5V
DDR_A_D6
DDR_A_D7
DDR_A_DQS#1
DDR_A_DQS1
close to JDDRL.1
DDR_A_DQS#0
DDR_A_DQS0
7 DDR_A_DQS[0..7]
7 DDR_A_DQS#[0..7]
DDR_A_D8
DDR_A_D9
DDR_A_D4
DDR_A_D5
DDR_A_D2
DDR_A_D3
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
DDR_A_DM0
VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
RESET#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
VREF_DQ
VSS
DQ0
DQ1
VSS
DM0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
VSS
DQ26
DQ27
VSS
DDR_A_D0
DDR_A_D1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
DDR_A_BS1 7
DDR_A_RAS# 7
DDRA_SCS0# 7
DDRA_ODT0 7
+V_DDR3_DIMM_REF
DDRA_ODT1 7
R89
1
0_0402_5%
+DDR_VREF_CA_DIMMA
DDR_A_D36
DDR_A_D37
DDR_A_DM4
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45
C161
2.2U_0603_6.3V4Z
C157
2.2U_0603_6.3V4Z
C156
0.1U_0402_16V4Z
+VREF_DQA
Layout Note:
Place near JDDRL
C163 1
+1.5V
C166 1
2 10U_0805_6.3V6M
C168 1
2 10U_0805_6.3V6M
C171 1
2 10U_0805_6.3V6M
C174 1
2 10U_0805_6.3V6M
C176 1
2 10U_0805_6.3V6M
C178 1
2 10U_0805_6.3V6M
Reserve for cost down

+1.5V
DDR_A_DM6
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
C217
390U_2.5V_M_R10
+0.75VS
2 330U_B2_2.5VM_R15M
close to JDDRL.126
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
Layout Note:
Place near JDDRL1.203 and 204
+1.5V
@
DDR_A_DQS#5
DDR_A_DQS5
Layout Note: Place these 4 Caps near

Command and Control signals of DIMMA
+1.5V
C162
0.1U_0402_16V4Z
C164 1
2 0.1U_0402_16V4Z
C167 1
2 0.1U_0402_16V4Z
C170 1
2 0.1U_0402_16V4Z
C173 1
2 0.1U_0402_16V4Z
C165 1
2 10U_0805_6.3V6M
C169 2
1 1U_0402_6.3V4Z
C172 2
1 1U_0402_6.3V4Z
C175 2
1 1U_0402_6.3V4Z
C177 2
1 1U_0402_6.3V4Z
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
PM_EXTTS# 5,12
PM_SMBDATA 12,22,26,36
PM_SMBCLK 12,22,26,36
+0.75VS
Compal Secret Data
2009/01/23
Issued Date
Deciphered Date
2010/01/23
FOX_AS0A626-U2SN-7F_204P
@
4
Title

Custom
Rev
D
401717
Date:
Sheet
1
11
of
58
+1.5V
+1.5V
DDR_B_DM0
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11
close to JDDRH.1
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
DDR_B_DM3
DDR_B_D26
DDR_B_D27
DDRB_CKE0
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
7
7
DDRB_CLK0
DDRB_CLK0#
DDR_B_MA10
DDR_B_BS0
7
7
DDR_B_WE#
DDR_B_CAS#
DDR_B_MA13
DDRB_SCS1#
DDR_B_D32
DDR_B_D33
3
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_DM5
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57
DDR_B_DM7
DDR_B_D58
DDR_B_D59
R98 1
2
10K_0402_5%
+3VS
2.2U_0603_6.3V4Z
1
1 R99
2
10K_0402_5%
C207
C208
2
2
0.1U_0402_16V4Z
+0.75VS
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
CKE0
VDD
NC
BA2
VDD
A12/BC#
A9
VDD
A8
A5
VDD
A3
A1
VDD
CK0
CK0#
VDD
A10/AP
BA0
VDD
WE#
CAS#
VDD
A13
S1#
VDD
TEST
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SA0
VDDSPD
SA1
VTT
205
207
GND1
GND2
VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
RESET#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
CKE1
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
S0#
ODT0
VDD
ODT1
NC
VDD
VREF_CA
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
EVENT#
SDA
SCL
VTT
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
BOSS1
BOSS2
206
208
DDR_B_D4
DDR_B_D5
7 DDR_B_DQS[0..7]
DDR_B_D6
DDR_B_D7
7 DDR_B_D[0..63]
DDR_B_D12
DDR_B_D13
7 DDR_B_DM[0..7]
1
7 DDR_B_MA[0..15]
DDR_B_DM1
SM_DRAMRST# 5,11
DDR_B_D14
DDR_B_D15
DDR_B_D20
DDR_B_D21
DDR_B_DM2
DDR_B_D22
DDR_B_D23
DDR_B_D28
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D30
DDR_B_D31
DDRB_CKE1 7
DDR_B_MA15
DDR_B_MA14
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
DDRB_CLK1 7
DDRB_CLK1# 7
DDR_B_BS1 7
DDR_B_RAS# 7
DDRB_SCS0# 7
DDRB_ODT0 7
DDRB_ODT1 7
DDR_B_D36
DDR_B_D37
DDR_B_DM4
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45
+V_DDR3_DIMM_REF
R97
1
+DDR_VREF_CA_DIMMB
2 0_0402_5%
Layout Note:
Place near JDDRH
DDR_B_D46
DDR_B_D47
Layout Note: Place these 4 Caps near

Command and Control signals of DIMMB
Layout Note:
Place near JDDRH.203 and 204
+1.5V
+1.5V
@
C189 1
close to JDDRH.126
DDR_B_D52
DDR_B_D53
+0.75VS
2 330U_B2_2.5VM_R15M
DDR_B_DQS#5
DDR_B_DQS5
C192 1
2 10U_0805_6.3V6M
C194 1
2 10U_0805_6.3V6M
C197 1
2 10U_0805_6.3V6M
C200 1
2 10U_0805_6.3V6M
C202 1
2 10U_0805_6.3V6M
C204 1
2 10U_0805_6.3V6M
C190 1
2 0.1U_0402_16V4Z
C193 1
2 0.1U_0402_16V4Z
C196 1
2 0.1U_0402_16V4Z
C199 1
2 0.1U_0402_16V4Z
C191 1
2 10U_0805_6.3V6M
C195 2
1 1U_0402_6.3V4Z
C198 2
1 1U_0402_6.3V4Z
C201 2
1 1U_0402_6.3V4Z
C203 2
1 1U_0402_6.3V4Z
DDR_B_DM6
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
PM_EXTTS# 5,11
PM_SMBCLK 11,22,26,36
+0.75VS
Compal Secret Data
2009/01/23
Issued Date
Deciphered Date
2010/01/23
FOX_AS0A626-UASN-7F_204P
@
A
7 DDR_B_DQS#[0..7]
DDR_B_DQS#0
DDR_B_DQS0
C188
0.1U_0402_16V4Z
VREF_DQ
VSS
DQ0
DQ1
VSS
DM0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
VSS
DQ26
DQ27
VSS
C187
2.2U_0603_6.3V4Z
C184
0.1U_0402_16V4Z
C183
2.2U_0603_6.3V4Z
DDR_B_D0
DDR_B_D1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
Standard Type
DDR3 SO-DIMM B
JDDRH
+VREF_DQB
Title

Custom
Rev
D
401717
Date:
Sheet
E
12
of
58
6 PCIE_GTX_C_CRX_P[0..15]
6 PCIE_GTX_C_CRX_N[0..15]
6 PCIE_CTX_C_GRX_P[0..15]
D
6 PCIE_CTX_C_GRX_N[0..15]
PCIE_GTX_C_CRX_P[0..15]
PCIE_GTX_C_CRX_N[0..15]
UV1A
LANE Reversal
LANE Reversal
PCIE_CTX_C_GRX_P[0..15]
D
PCIE_CTX_C_GRX_N[0..15]
PCIE_CTX_C_GRX_P15 AA38
PCIE_CTX_C_GRX_N15
Y37
PCIE_RX0P
PCIE_RX0N
PCIE_TX0P
PCIE_TX0N
Y33
Y32
PCIE_GTX_CRX_P15
PCIE_GTX_CRX_N15
C38
C22
1
1
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_CRX_P15
PCIE_GTX_C_CRX_N15
Y35
W36
PCIE_RX1P
PCIE_RX1N
PCIE_TX1P
PCIE_TX1N
W33
W32
PCIE_GTX_CRX_P14
PCIE_GTX_CRX_N14
C37
C21
1
1
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_CRX_P14
PCIE_GTX_C_CRX_N14
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_N13
W38
V37
PCIE_RX2P
PCIE_RX2N
PCIE_TX2P
PCIE_TX2N
U33
U32
PCIE_GTX_CRX_P13
PCIE_GTX_CRX_N13
C36
C20
1
1
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_CRX_P13
PCIE_GTX_C_CRX_N13
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_N12
V35
U36
PCIE_RX3P
PCIE_RX3N
PCIE_TX3P
PCIE_TX3N
U30
U29
PCIE_GTX_CRX_P12
PCIE_GTX_CRX_N12
C35
C19
1
1
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_CRX_P12
PCIE_GTX_C_CRX_N12
PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_N11
U38
T37
PCIE_RX4P
PCIE_RX4N
PCIE_TX4P
PCIE_TX4N
T33
T32
PCIE_GTX_CRX_P11
PCIE_GTX_CRX_N11
C34
C18
1
1
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_CRX_P11
PCIE_GTX_C_CRX_N11
PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_N10
T35
R36
PCIE_RX5P
PCIE_RX5N
PCIE_TX5P
PCIE_TX5N
T30
T29
PCIE_GTX_CRX_P10
PCIE_GTX_CRX_N10
C33
C17
1
1
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_CRX_P10
PCIE_GTX_C_CRX_N10
PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_N9
R38
P37
PCIE_RX6P
PCIE_RX6N
PCIE_TX6P
PCIE_TX6N
P33
P32
PCIE_GTX_CRX_P9
PCIE_GTX_CRX_N9
C32
C16
1
1
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_CRX_P9
PCIE_GTX_C_CRX_N9
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_N8
P35
N36
PCIE_RX7P
PCIE_RX7N
PCIE_TX7P
PCIE_TX7N
P30
P29
PCIE_GTX_CRX_P8
PCIE_GTX_CRX_N8
C31
C15
1
1
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_CRX_P8
PCIE_GTX_C_CRX_N8
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_N7
N38
M37
PCIE_RX8P
PCIE_RX8N
PCIE_TX8P
PCIE_TX8N
N33
N32
PCIE_GTX_CRX_P7
PCIE_GTX_CRX_N7
C30
C14
1
1
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_CRX_P7
PCIE_GTX_C_CRX_N7
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_N6
M35
L36
PCIE_RX9P
PCIE_RX9N
PCIE_TX9P
PCIE_TX9N
N30
N29
PCIE_GTX_CRX_P6
PCIE_GTX_CRX_N6
C29
C13
1
1
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_CRX_P6
PCIE_GTX_C_CRX_N6
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_N5
L38
K37
PCIE_RX10P
PCIE_RX10N
PCIE_TX10P
PCIE_TX10N
L33
L32
PCIE_GTX_CRX_P5
PCIE_GTX_CRX_N5
C28
C12
1
1
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_CRX_P5
PCIE_GTX_C_CRX_N5
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_N4
K35
J36
PCIE_RX11P
PCIE_RX11N
PCIE_TX11P
PCIE_TX11N
L30
L29
PCIE_GTX_CRX_P4
PCIE_GTX_CRX_N4
C27
C11
1
1
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_CRX_P4
PCIE_GTX_C_CRX_N4
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_N3
J38
H37
PCIE_RX12P
PCIE_RX12N
PCIE_TX12P
PCIE_TX12N
K33
K32
PCIE_GTX_CRX_P3
PCIE_GTX_CRX_N3
C26
C10
1
1
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_CRX_P3
PCIE_GTX_C_CRX_N3
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_N2
H35
G36
PCIE_RX13P
PCIE_RX13N
PCIE_TX13P
PCIE_TX13N
J33
J32
PCIE_GTX_CRX_P2
PCIE_GTX_CRX_N2
C25
C9
1
1
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_N2
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_N1
G38
F37
PCIE_RX14P
PCIE_RX14N
PCIE_TX14P
PCIE_TX14N
K30
K29
PCIE_GTX_CRX_P1
PCIE_GTX_CRX_N1
C24
C8
1
1
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_CRX_P1
PCIE_GTX_C_CRX_N1
PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_N0
F35
E37
PCIE_RX15P
PCIE_RX15N
PCIE_TX15P
PCIE_TX15N
H33
H32
PCIE_GTX_CRX_P0
PCIE_GTX_CRX_N0
C23
C7
1
1
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_CRX_P0
PCIE_GTX_C_CRX_N0
PCI EXPRESS INTERFACE
PCIE_CTX_C_GRX_P14
PCIE_CTX_C_GRX_N14
CLOCK
26 CLK_PCIE_VGA
26 CLK_PCIE_VGA#
Reserve for Park and Madison support.

@
2
1
RV54
10K_0402_5%
5,29,36,37,41,42
PLT_RST#
AB35
AA36
PCIE_REFCLKP
PCIE_REFCLKN
AJ21
AK21
AH16
NC#1
NC#2
NC_PWRGOOD
AA30
PERSTB
CALIBRATION
216-0729002 A12 M96_BGA962
PCIE_CALRP
Y30
PCIE_CALRN
Y29
RV1
RV2
1
1
2
1.27K_0402_1%
2
2K_0402_1%
+1.1VS
M96PRO@
Compal Secret Data
2009/01/23
Issued Date
Deciphered Date
2010/01/23
5
Title

Size
Document Number
Rev
D
401717
Date:
Sheet
1
13
of
58
UV1B
UV1G
MUTI GFX
DPA
AR8
AU8
AP8
AW8
AR3
AR1
AU1
AU3
AW3
AP6
AW5
AU5
AR6
AW6
AU6
AT7
AV7
AN7
AV9
AT9
AR10
AW10
AU10
AP10
AV11
AT11
AR12
AW12
AU12
AP12
21
21
21
21
VRAM_DEC
VRAM_ID0
VRAM_ID1
VRAM_ID2
DVPCNTL_MVP_0
DVPCNTL_MVP_1
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
DVPCLK
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23
DPB
DPC
DPD
+VGA_CORE
I2C
LVDS
@
RV16
10K_0402_5%
VGA_EDID_CLK
VGA_EDID_DATA
22 VGA_EDID_CLK
22 VGA_EDID_DATA
BB_EN
GPU_GPIO0
GPU_GPIO1
GPU_GPIO2
41
21
21
VGA_ENBKL
SOUT_GPIO8
SIN_GPIO9
GPU_GPIO0
GPU_GPIO1
GPU_GPIO2
GPU_GPIO11
GPU_GPIO12
GPU_GPIO13
21 GPU_GPIO11
21 GPU_GPIO12
21 GPU_GPIO13
24,30 VGA_HDMI_HPD
54 VGA_PWRSEL
22 27M_SSC
21 THERM#_VGA
VGA_PWRSEL
27M_SSC
THERM#_VGA
@
1 RV20
21 ROMSE_GPIO22
T47
BLM18PG121SN1D_0603
150mA
0.1U_0402_16V4Z
1
1
CV2
+1.1VS
BLM18PG121SN1D_0603
0.1U_0402_16V4Z
2
1
LV2
1
1
1
CV4
CV5
2
CV3
1U_0402_6.3V4Z
+1.8VS
1
CV1
2
10U_0603_6.3V6M
+DPLL_PVDD
T36
AK24
+VGA_VREF
CV6
AH13
AU26
AV25
TX2P_DPA0P
TX2M_DPA0N
AT27
AR26
TXCBP_DPB3P
TXCBM_DPB3N
AR30
AT29
VGA_HDMI_CLK+ 24
VGA_HDMI_CLK- 24
TX3P_DPB2P
TX3M_DPB2N
AV31
AU30
VGA_HDMI_TX0+ 24
VGA_HDMI_TX0- 24
TX4P_DPB1P
TX4M_DPB1N
AR32
AT31
VGA_HDMI_TX1+ 24
VGA_HDMI_TX1- 24
TX5P_DPB0P
TX5M_DPB0N
AT33
AU32
VGA_HDMI_TX2+ 24
VGA_HDMI_TX2- 24
TXCCP_DPC3P
TXCCM_DPC3N
AU14
AV13
TX0P_DPC2P
TX0M_DPC2N
AT15
AR14
TX1P_DPC1P
TX1M_DPC1N
AU16
AV15
TX2P_DPC0P
TX2M_DPC0N
AT17
AR16
TXCDP_DPD3P
TXCDM_DPD3N
AU20
AT19
TX3P_DPD2P
TX3M_DPD2N
AT21
AR20
TX4P_DPD1P
TX4M_DPD1N
AU22
AV21
TX5P_DPD0P
TX5M_DPD0N
AT23
AR22
R
RB
AD39
AD37
VGA_CRT_R 23
G
GB
AE36
AD35
VGA_CRT_G 23
B
BB
AF37
AE38
HSYNC
VSYNC
AC36
AC38
RSET
AB34
AVDD
AVSSQ
AD34
AE34
VDD1DI
VSS1DI
AC33
AC34
R2
R2B
AC30
AC31
G2
G2B
AD30
AD31
B2
B2B
AF30
AF31
C
Y
COMP
AC32
AD32
AF32
H2SYNC
V2SYNC
AD29
AC29
VDD2DI
VSS2DI
AG31
AG32
AK27
AJ27
0.1U_0402_16V4Z
DDC/AUX
PLL/CLOCK
47.5_0402_1%
2
1
RV26
AM32
AN32
DPLL_PVDD
DPLL_PVSS
+DPLL_VDDC
AN31
DPLL_VDDC
XTALIN
AV33
AU34
27M_CLK
+DPLL_PVDD
XTALIN
XTALOUT
RV28
100_0402_1%
2
CV99 @ 100P_0402_50V8J
XTALIN
1
2
2
1
RV52 @ 100_0402_5%
21 GPU_THERMAL_D+
21 GPU_THERMAL_DBLM18PG121SN1D_0603
0.1U_0402_16V4Z
2
1
LV7
1
1
1
CV21
CV20
2
10U_0603_6.3V6M
20mA
+TSVDD
CV22
1U_0402_6.3V4Z
AF29
AG29
DPLUS
DMINUS
AK32
AJ32
AJ33
TS_FDO
TSVDD
TSVSS
THERMAL
216-0729002 A12 M96_BGA962
TXCLK_UP_DPF3P
TXCLK_UN_DPF3N
AK35
AL36
VGA_TZCLK+ 22
VGA_TZCLK- 22
TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N
AJ38
AK37
VGA_TZOUT0+ 22
VGA_TZOUT0- 22
TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N
AH35
AJ36
VGA_TZOUT1+ 22
VGA_TZOUT1- 22
TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N
AG38
AH37
VGA_TZOUT2+ 22
VGA_TZOUT2- 22
TXOUT_U3P
TXOUT_U3N
AF35
AG36
TXCLK_LP_DPE3P
TXCLK_LN_DPE3N
AP34
AR34
VGA_TXCLK+ 22
VGA_TXCLK- 22
TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N
AW37
AU35
VGA_TXOUT0+ 22
VGA_TXOUT0- 22
TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N
AR37
AU39
VGA_TXOUT1+ 22
VGA_TXOUT1- 22
TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N
AP35
AR35
VGA_TXOUT2+ 22
VGA_TXOUT2- 22
TXOUT_L3P
TXOUT_L3N
AN36
AP37
VGA_CRT_R
VGA_CRT_G
1
RV12
1
RV13
VGA_CRT_B
1
RV14
150_0402_1%
150_0402_1%
2
150_0402_1%
CRT
21,23
21,23
1
2
RV19 499_0402_1%
+A1VDD
+VDD1DI
+A1VDD
HSYNC_DAC2
VSYNC_DAC2
+3VS_DELAY
+1.8VS
AF33
AA29
DDC1CLK
DDC1DATA
AM26
AN26
AUX1P
AUX1N
AM27
AL27
DDC2CLK
DDC2DATA
AM19
AL19
AUX2P
AUX2N
AN20
AM20
DDCCLK_AUX3P
DDCDATA_AUX3N
AL30
AM30
DDCCLK_AUX4P
DDCDATA_AUX4N
AL29
AM29
DDCCLK_AUX5P
DDCDATA_AUX5N
AN21
AM21
DDC6CLK
DDC6DATA
AJ30
AJ31
NC_DDCCLK_AUX7P
NC_DDCDATA_AUX7N
AK30
AK29
CV8
CV9
10U_0603_6.3V6M
2
2
0.1U_0402_16V4Z
CV10
1U_0402_6.3V4Z
1
RV23
1
CV11
2
2
0.1U_0402_16V4Z
BLM18PG121SN1D_0603
2
1
+1.8VS
LV4
45mA
+VDD1DI
AG33
R2SET
21
21
+VDD1DI
AD33
BLM18PG121SN1D_0603
2
1
+1.8VS
LV3
70mA
CV7
1U_0402_6.3V4Z
CV12
10U_0603_6.3V6M
2
715_0402_1%
VGA_HDMI_CLK 24
VGA_HDMI_DATA 24
+3VS_DELAY
HDMI
VGA_EDID_DATA
+3VS_DELAY
VGA_EDID_CLK
VGA_PWRSEL
VGA_CRT_DATA
VGA_CRT_CLK
1
RV31
1
RV32
2
4.7K_0402_5%
2
4.7K_0402_5%
1
RV35
1
RV37
2
4.7K_0402_5%
2
4.7K_0402_5%
THERM#_VGA
GPIO23_CLKREQ#
VGA_CRT_CLK 23
VGA_CRT_DATA 23
VGA_HDMI_DATA
CRT
VGA_HDMI_CLK
1
RV27
1
RV29
1
RV30
2
4.7K_0402_5%
2
4.7K_0402_5%
2
@ 10K_0402_5%
1
RV33
1
RV34
2
10K_0402_5%
2
10K_0402_5%
M96PRO@
Issued Date
Compal Secret Data

2009/01/23
Deciphered Date
2010/01/23
4
Single channel
VGA_CRT_B 23
VGA_CRT_HSYNC
VGA_CRT_VSYNC
A2VDD
A2VSSQ
LVTMDP
VGA_PWM 22
VGA_ENVDD 22
216-0729002 A12 M96_BGA962

M96PRO@
A2VDDQ
VREFG
1
CV13
RV22
249_0402_1%
2 1U_0402_6.3V4Z
+1.8VS
TX1P_DPA1P
TX1M_DPA1N
HPD1
RV21
499_0402_1%
10U_0603_6.3V6M
AT25
AR24
VARY_BL
DIGON
300mA
+DPLL_VDDC
22
TX0P_DPA2P
TX0M_DPA2N
LVDS CONTROL
1
LV1
GPIO_0
GPIO_1
GPIO_2
GPIO_3_SMBDATA
GPIO_4_SMBCLK
GPIO_5_AC_BATT
DAC1
GPIO_6
GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL_0
GPIO_16_SSIN
GPIO_17_THERMAL_INT
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21_BB_EN
GPIO_22_ROMCSB
GPIO_23_CLKREQB
JTAG_TRSTB
JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TDO
GENERICA
GENERICB
GENERICC
GENERICD
GENERICE_HPD4
DAC2
GENERICF
GENERICG
AH20
AH18
AN16
AH23
AJ23
AH17
T49
10K_0402_5%
AJ17
AK17
AJ13
AH15
AJ16
AK16
AL16
AM16
AM14
AM13
AK14
AG30
AN14
GPU_CTF AM17
10K_0402_5%
AL13
T53
BB_EN
AJ14
AK13
GPIO23_CLKREQ#
AN13
GPIO24_TRST#
AM23
AN23
T30
AK23
T31
AL24
T32
AM24
T33
AJ19
T34
AK19
T35
AJ20
T48
AK20
AJ24
AH26
AH24
AU24
AV23
SCL
SDA
GENERAL PURPOSE I/O
21
21
21
RV18 1
+1.8VS
AK26
AJ26
@
1
2
RV39
10K_0402_5%
TXCAP_DPA3P
TXCAM_DPA3N
Title

Size
Document Number
Rev
D
401717
Date:
Sheet
1
14
of
58

20mA
UV1H
DP C/D POWER
+1.8VS
@
1
RV137
2
0_0603_5%
AP20
AP21
NC_DPC_VDD18#1
NC_DPC_VDD18#2
DP A/B POWER
NC_DPA_VDD18#1
NC_DPA_VDD18#2
AN24
AP24
@
1
RV139
DPA_VDD10#1
DPA_VDD10#2
AP31
AP32
+1.1VS
DPA_VSSR#1
DPA_VSSR#2
DPA_VSSR#3
DPA_VSSR#4
DPA_VSSR#5
AN27
AP27
AP28
AW24
AW26
NC_DPB_VDD18#1
NC_DPB_VDD18#2
AP25
AP26
+DPB_VDD18
DPB_VDD10#1
DPB_VDD10#2
AN33
AP33
+DPB_VDD10
2
+1.8VS
0_0603_5%
20mA
+DPB_VDD18
AP13
AT13
+1.1VS
AN17
AP16
AP17
AW14
AW16
+1.8VS
@
1
RV138
2
0_0603_5%
+1.1VS
DPC_VDD10#1
DPC_VDD10#2
DPC_VSSR#1
DPC_VSSR#2
DPC_VSSR#3
DPC_VSSR#4
DPC_VSSR#5
AP22
AP23
NC_DPD_VDD18#1
NC_DPD_VDD18#2
AP14
AP15
DPD_VDD10#1
DPD_VDD10#2
10U_0603_6.3V6M
RV40 150_0402_1%
2
1 AW18
200mA
BLM18PG121SN1D_0603
2
1
LV12
2
+1.8VS
10U_0603_6.3V6M
CV29
+DPE_VDD18
2
CV30
1
1
1U_0402_6.3V4Z
+DPE_VDD18
CV31
0.1U_0402_16V4Z
100mA
BLM18PG121SN1D_0603
2
1
LV15
2
10U_0603_6.3V6M
+DPE_VDD10
2
CV35
CV36
1
1
1U_0402_6.3V4Z
CV38
0.1U_0402_16V4Z
+DPF_VDD18
200mA
+1.8VS
BLM18PG121SN1D_0603
2
1
LV17
2
10U_0603_6.3V6M
CV44
1
1
1U_0402_6.3V4Z
CV50
CV46
0.1U_0402_16V4Z
CV51
DPCD_CALR
DPAB_CALR
AW28
DP PLL POWER
DPA_PVDD
DPA_PVSS
AU28
AV27
DP E/F POWER
DPE_VDD18#1
DPE_VDD18#2
2
CV27
1
1
1U_0402_6.3V4Z
LV11
2
+DPB_PVDD
AN34
AP39
AR39
AU37
AW35
DPE_VSSR#1
DPE_VSSR#2
DPE_VSSR#3
DPE_VSSR#4
DPE_VSSR#5
DPC_PVDD
DPC_PVSS
AU18
AV17
+DPC_PVDD
DPD_PVDD
DPD_PVSS
AV19
AR18
+DPD_PVDD
DPE_PVDD
DPE_PVSS
AM37
AN38
+DPE_PVDD
2
RV42
1
AM39
150_0402_1%
CV33
20mA
10U_0603_6.3V6M
2
CV37
2
CV39
1
1
1U_0402_6.3V4Z
BLM18PG121SN1D_0603
2
1
LV13
+1.8VS
CV34
0.1U_0402_16V4Z
BLM18PG121SN1D_0603
2
1
LV14
+1.8VS
CV40
0.1U_0402_16V4Z
2
10U_0603_6.3V6M
DPF_VSSR#1
DPF_VSSR#2
DPF_VSSR#3
DPF_VSSR#4
DPF_VSSR#5
2
CV41
CV42
1
1
1U_0402_6.3V4Z
20mA
+DPD_PVDD
DPEF_CALR
BLM18PG121SN1D_0603
2
1
LV16
2
20mA
+DPC_PVDD
AL38
AM35
1
1U_0402_6.3V4Z
2
CV47
M96PRO@
1
CV48
+1.8VS
CV43
0.1U_0402_16V4Z
BLM18PG121SN1D_0603
2
1
LV18
+1.8VS
CV49
10U_0603_6.3V6M
0.1U_0402_16V4Z
20mA
+DPE_PVDD
1
0.1U_0402_16V4Z
1
CV53
2009/01/23
Issued Date
CV54
2
2
1U_0402_6.3V4Z
Deciphered Date
2010/01/23
4
BLM18PG121SN1D_0603
2
1
LV20
+1.8VS
CV55
10U_0603_6.3V6M
Compal Secret Data
1
1
1U_0402_6.3V4Z
216-0729002 A12 M96_BGA962
CV52
0.1U_0402_16V4Z
2
CV32
+DPB_PVDD
DPF_VDD10#1
DPF_VDD10#2
1
1
1U_0402_6.3V4Z
+1.8VS
+1.1VS
20mA
+DPA_PVDD
AV29
AR28
AK33
AK34
@
CV236
BLM18PG121SN1D_0603
2
1
LV31 @
@
CV270
0.1U_0402_16V4Z
CV26
10U_0603_6.3V6M
+DPA_PVDD
DPB_PVDD
DPB_PVSS
DPF_VDD18#1
DPF_VDD18#2
@
CV253
1
2
RV41 150_0402_1%
DPE_VDD10#1
DPE_VDD10#2
AF34
AG34
AL33
AM33
AF39
AH39
AK39
AL34
AM34
+DPF_VDD10
2
1
1
1U_0402_6.3V4Z
AN29
AP29
AP30
AW30
AW32
NC_DPF_PVDD
NC_DPF_PVSS
100mA
BLM18PG121SN1D_0603
2
1
+1.1VS
LV19
2
10U_0603_6.3V6M
+DPF_VDD10
+DPF_VDD18
2
CV45
DPB_VSSR#1
DPB_VSSR#2
DPB_VSSR#3
DPB_VSSR#4
DPB_VSSR#5
10U_0603_6.3V6M
+DPE_VDD10
+1.1VS
AH34
AJ34
DPD_VSSR#1
DPD_VSSR#2
DPD_VSSR#3
DPD_VSSR#4
DPD_VSSR#5
20mABLM18PG121SN1D_0603
2
1
2
CV28
0.1U_0402_16V4Z
AN19
AP18
AP19
AW20
AW22
Title

Size
Document Number
Rev
D
401717
Date:
Sheet
1
15
of
58
UV1E
+VRAM_1.5VS
MEM I/O
1
+
2
CV86
CV58
330U_X_2VM_R6M
@
CV59
CV63
CV67
CV89
Co-layout with CV58
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
CV56
CV60
CV64
CV68
CV70
+VRAM_1.5VS
CV73
CV90
1
CV309
390U_2.5V_M_R10
CV78
+
CV81
2
+1.5VS
CV84
+VRAM_1.5VS
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
1
1
1
1
1
1
1
1
1
CV57
CV61
CV65
CV88
CV71
CV74
CV76
CV79
CV82
CV85
AC7
AD11
AF7
AG10
AJ7
AK8
AL9
G11
G14
G17
G20
G23
G26
G29
H10
J7
J9
K11
K13
K8
L12
L16
L21
L23
L26
L7
M11
N11
P7
R11
U11
U7
Y11
Y7
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
1
1
1
1
1
1
1
1
1
PJ28
2
@ JUMP_43X79
PJ29
2
BLM18PG121SN1D_0603
2
+1.8VS
@ JUMP_43X79
CV105
CV109
CV113
CV117
2
10U_0603_6.3V6M
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
1
0.1U_0402_16V4Z
2
1U_0402_6.3V4Z
1
1
2
1
BLM18PG121SN1D_0603
+VDDR4
2
1 0.1U_0402_16V4Z
LV24
1
1
CV156
CV157
2
1U_0402_6.3V4Z
CV130
CV134
CV138
BLM18PG121SN1D_0603
0.1U_0402_16V4Z
+MPV18
2
1
+1.8VS
LV35
1
1
1
@
CV305 CV304
CV303
@
@
@
10U_0603_6.3V6M
1U_0402_6.3V4Z
2
2
2
+1.8VS
CV144
2
10U_0603_6.3V6M
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
1
1
1
+VDDR5
+VDDR4
NC for Park and Madison support.

BLM18PG121SN1D_0603
1A
2
1
+VRAM_1.5VS
BLM18PG121SN1D_0603
+SPV18
0.1U_0402_16V4Z
2
1
LV36
1
1
1
@
CV308 CV307
CV306
@
@
@
10U_0603_6.3V6M
1U_0402_6.3V4Z
2
2
2
CV162
BLM18PG121SN1D_0603
0.1U_0402_16V4Z
2
1
+1.8VS
LV27
1
1
1
CV168 CV169
CV170
10U_0603_6.3V6M
+VDDRHA
1
1U_0402_6.3V4Z
BLM18PG121SN1D_0603
+VDDRHB
2
1
LV26 2
1
CV167
1U_0402_6.3V4Z
68mA
+PCIE_PVDD
+MPV18
1U_0402_6.3V4Z
100mA
+3VS_DELAY
1
2
CV217
0.1U_0402_16V7K
1U_0402_6.3V4Z
BLM18PG121SN1D_0603
2
1
LV28
1
1
2
CV171
CV172
CV173
BLM18PG121SN1D_0603
2
1
+1.1VS
LV34 10U_0603_6.3V6M
2
2
1
@
0.1U_0402_16V4Z
CV211
0.01U_0402_25V7K
CV174
+3VS
0.1U_0402_16V4Z
1
RV136
2
G
S
VDDR3#1
VDDR3#2
VDDR3#3
VDDR3#4
AF13
AF15
AG13
AG15
AD12
AF11
AF12
AG11
VDDR5#1
VDDR5#2
VDDR5#3
VDDR5#4
VDDR4#1
VDDR4#2
VDDR4#3
VDDR4#4
MEM CLK
M20
M21
V12
U12
VDDRHA
VSSRHA
VDDRHB
VSSRHB
AB37
H7
H8
AM10
PCIE_PVDD
NC_MPV18#1
NC_MPV18#2
NC_SPV18
AN9
SPV10
AN10
SPVSS
AA13
Y13
BBP#1
BBP#2
2
0_0402_5%
2
1U_0402_6.3V4Z
CV175
CV180
0.1U_0402_16V4Z
VDDC#1
VDDC#2
VDDC#3
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8
VDDC#9
VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15
VDDC#16
VDDC#17
VDDC#18
VDDC#19
VDDC#20
VDDC#21
VDDC#22
VDDC#23
VDDC#24
VDDC#25
VDDC#26
VDDC#27
VDDC#28
VDDC#29
VDDC#30
VDDC#31
VDDC#32
VDDC#33
VDDC#34
VDDC#35
VDDC#36
VDDC#37
VDDC#38
VDDC#39
VDDC#40
VDDC#41
VDDC#42
VDDC#43
VDDC#44
VDDC#45
VDDC#46
VDDC#47
VDDC#48
VDDC#49
VDDC#50
VDDC#51
VDDC#52
VDDC#53
VDDC#54
VDDC#55
VDDC#56
VDDC#57
VDDC#58
VDDC#59
VDDC#60
VDDC#61
VDDC#62
VDDC#63
VDDC#64
VDDC#65
VDDC#66
VDDC#67
VDDC#68
VDDC#69
VDDC#70
VDDC#71
VDDC#72
VDDC#73
VDDC#74
ISOLATED VDDCI#1
CORE I/O VDDCI#2
VDDCI#3
VDDCI#4
2
100K_0402_5%
CORE
BACK BIAS
+VGA_CORE
RV53
47K_0402_5%
QV2
2N7002_SOT23-3
AF23
AF24
AG23
AG24
+PCIE_VDDR
1
LV21
CV87
CV62
CV66
G30
G31
H29
H30
J29
J30
L28
M28
N28
R28
T28
U28
AA15
AA17
AA20
AA22
AA24
AA27
AB13
AB16
AB18
AB21
AB23
AB26
AB28
AC12
AC15
AC17
AC20
AC22
AC24
AC27
AD13
AD16
AD18
AD21
AD23
AD26
AF17
AF20
AF22
AG16
AG18
AG21
AH22
M16
M18
M23
M26
N15
N17
N20
N22
N24
N27
R13
R16
R18
R21
R23
R26
T15
T17
T20
T22
T24
T27
U16
U18
U21
U23
U26
V15
V17
V20
V22
V24
V27
Y16
Y18
Y21
Y23
Y26
Y28
AH27
AH28
M15
N13
R12
T12
CV72
2A
CV91
CV92
CV83
CV93
CV94
Preserve for Park and Madison support.
2
2
414mA +SPV10
+VGA_CORE
+3VS
PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8
PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12
PLL
+SPV18
QV1
VDD_CT#1
VDD_CT#2
VDD_CT#3
VDD_CT#4
LV25
AO3413_SOT23
AF26
AF27
AG26
AG27
AA31
AA32
AA33
AA34
V28
W29
W30
Y31
CV69
I/O
60mA
+3VS_DELAY
PCIE_VDDR#1
PCIE_VDDR#2
PCIE_VDDR#3
PCIE_VDDR#4
PCIE_VDDR#5
PCIE_VDDR#6
PCIE_VDDR#7
PCIE_VDDR#8
LEVEL
TRANSLATION
+VDD_CT
170mA
+1.8VS
VDDR1#1
VDDR1#2
VDDR1#3
VDDR1#4
VDDR1#5
VDDR1#6
VDDR1#7
VDDR1#8
VDDR1#9
VDDR1#10
VDDR1#11
VDDR1#12
VDDR1#13
VDDR1#14
VDDR1#15
VDDR1#16
VDDR1#17
VDDR1#18
VDDR1#19
VDDR1#20
VDDR1#21
VDDR1#22
VDDR1#23
VDDR1#24
VDDR1#25
VDDR1#26
VDDR1#27
VDDR1#28
VDDR1#29
VDDR1#30
VDDR1#31
VDDR1#32
VDDR1#33
VDDR1#34
POWER
1U_0402_6.3V4Z
+VDD_CT
LV22
CV101
170mA
BLM18PG121SN1D_0603
+VDDR5
0.1U_0402_16V4Z
2
1
+1.8VS
LV23
1
1
CV140
CV141
C
136mA
500mA
PCIE
4A
CV95
CV97
CV100
+1.1VS
1
1
1
1
1
1
1
216-0729002 A12 M96_BGA962
PCIE_OK 52
From 1.5VP<-->1.1VSP Chip
1
1
1
1
Co-layout with CV96, CV98

+VGA_CORE
1
+
1
+
CV311
390U_2.5V_M_R10
2
+VGA_CORE
1
+
2
CV102
CV106
CV110
CV114
CV118
CV121
CV124
CV127
CV131
CV135
1
1
1
1
1
1
1
1
1
1
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
CV103
CV107
CV111
CV115
CV119
CV122
CV125
CV128
CV132
CV136
CV142
CV145
CV147
CV149
CV151
CV153
CV158
CV160
CV163
CV165
+VDDCI
1
CV176
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
+
CV98
330U_X_2VM_R6M
@
2
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV177
CV178
2
CV96
330U_X_2VM_R6M
@
CV104
CV108
CV112
CV116
CV120
CV123
CV126
CV129
CV133
CV137
CV143
CV146
CV148
CV150
CV152
CV154
CV159
CV161
CV164
CV166
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
BLM18PG121SN1D_0603
2
1
LV29
2A
+VGA_CORE
Compal Secret Data

2009/01/23
25A
Deciphered Date
2010/01/23
5
CV80
CV179
10U_0603_6.3V6M
M96PRO@
Issued Date
CV77
2
+1.8VS
BLM18PG121SN1D_0603
2
10U_0603_6.3V6M
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
CV310
390U_2.5V_M_R10
2
2
1U_0402_6.3V4Z 1U_0402_6.3V4Z
1
RV44
CV75
2
10U_0603_6.3V6M
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
Title

Size
Document Number
Rev
D
401717
Date:
Sheet

1
16
of
58
UV1F
VSS_MECH#1
VSS_MECH#2
VSS_MECH#3
A39
AW1
AW39
M96PRO@
4
RV157
0_0402_5%
T52
RV156
0_0402_5%
T46
@
RV24
10K_0402_5%
216-0729002 A12 M96_BGA962

5
GND#101
GND#102
GND#103
GND#104
GND#105
GND#106
GND#107
GND#108
GND#109
GND#110
GND#111
GND#112
GND#113
GND#114
GND#115
GND#116
GND#117
GND#118
GND#119
GND#120
GND#121
GND#122
GND#123
GND#124
GND#125
GND#126
GND#127
GND#128
GND#129
GND#130
GND#131
GND#132
GND#133
GND#134
GND#135
GND#136
GND#137
GND#138
GND#139
GND#140
GND#141
GND#142
GND#143
GND#144
GND#145
GND#146
GND#147
GND#148
GND#149
GND#150
GND#151
GND#152
GND#153
GND#154
GND#155
GND#156
GND#157
GND#158
GND#159
GND#160
GND#161
GND#162
GND#163
GND#164
GND#165
GND#166
GND#167
GND#168
GND#169
GND#170
GND#171
GND#172
GND#173
GND#174
GND#175
GND#176
GND
A3
A37
AA16
AA18
AA2
AA21
AA23
AA26
AA28
AA6
AB12
AB15
AB17
AB20
AB22
AB24
AB27
AC11
AC13
AC16
AC18
AC2
AC21
AC23
AC26
AC28
AC6
AD15
AD17
AD20
AD22
AD24
AD27
AD9
AE2
AE6
AF10
AF16
AF18
AF21
AG17
AG2
AG20
AG22
AG6
AG9
AH21
AH29
AJ10
AJ11
AJ2
AJ28
AJ6
AK11
AK31
AK7
AL11
AL14
AL17
AL2
AL20
AL21
AL23
AL26
AL32
AL6
AL8
AM11
AM31
AM9
AN11
AN2
AN30
AN6
AN8
AP11
AP7
AP9
AR5
AW34
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29
B31
B33
B7
B9
C1
C39
E35
E5
F11
F13
F15
F17
F19
F21
F23
F25
F27
F29
F31
F33
F7
F9
G2
G6
H9
J2
J27
J6
J8
K14
K7
L11
L17
L2
L22
L24
L6
M17
M22
M24
N16
N18
N2
N21
N23
N26
N6
R15
R17
R2
R20
R22
R24
R27
R6
T11
T13
T16
T18
T21
T23
T26
U15
U17
U2
U20
U22
U24
U27
U6
V11
V16
V18
V21
V23
V26
W2
W6
Y15
Y17
Y20
Y22
Y24
Y27
U13
V13
GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8
GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55
GND#56
GND#57
GND#58
GND#59
GND#60
GND#61
GND#62
GND#63
GND#64
GND#65
GND#66
GND#67
GND#68
GND#69
GND#70
GND#71
GND#72
GND#73
GND#74
GND#75
GND#76
GND#77
GND#78
GND#79
GND#80
GND#81
GND#82
GND#83
GND#84
GND#85
GND#86
GND#87
GND#88
GND#89
GND#90
GND#91
GND#92
GND#93
GND#94
GND#95
GND#96
GND#97
GND#98
GND#99
GND#100
PCIE_VSS#1
PCIE_VSS#2
PCIE_VSS#3
PCIE_VSS#4
PCIE_VSS#5
PCIE_VSS#6
PCIE_VSS#7
PCIE_VSS#8
PCIE_VSS#9
PCIE_VSS#10
PCIE_VSS#11
PCIE_VSS#12
PCIE_VSS#13
PCIE_VSS#14
PCIE_VSS#15
PCIE_VSS#16
PCIE_VSS#17
PCIE_VSS#18
PCIE_VSS#19
PCIE_VSS#20
PCIE_VSS#21
PCIE_VSS#22
PCIE_VSS#23
PCIE_VSS#24
PCIE_VSS#25
PCIE_VSS#26
PCIE_VSS#27
PCIE_VSS#28
PCIE_VSS#29
PCIE_VSS#30
PCIE_VSS#31
PCIE_VSS#32
PCIE_VSS#33
PCIE_VSS#34
PCIE_VSS#35
AB39
E39
F34
F39
G33
G34
H31
H34
H39
J31
J34
K31
K34
K39
L31
L34
M34
M39
N31
N34
P31
P34
P39
R34
T31
T34
T39
U31
U34
V34
V39
W31
W34
Y34
Y39
Compal Secret Data
Issued Date
2009/01/23
2010/01/23
Deciphered Date
3
Title

Size
Document Number
Rev
D
401717
Date:
Sheet

1
17
of
58
M92-M2 uses memory group B only

D
UV1C
UV1D
RV49
100_0402_1%
+MVREFDA
+MVREFSA
+VRAM_1.5VS
1
RV561
RV591
RV60
0.1U_0402_16V4Z
1
2
RV55
1
RV126
1
RV127
1
CV183
@
@
@
@
@
ODTA0
ODTA1
CLKA0
CLKA0B
H27
G27
CLKA0
CLKA0#
CLKA1
CLKA1B
J14
H14
CLKA1
CLKA1#
RASA0B
RASA1B
K23
K19
RASA0#
RASA1#
CASA0B
CASA1B
K20
K17
CASA0#
CASA1#
CSA0B_0
CSA0B_1
K24
K27
CSA0#_0
CSA1B_0
CSA1B_1
M13
K16
CSA1#_0
MVREFDA
MVREFSA
CKEA0
CKEA1
K21
J20
CKEA0
CKEA1
NC_MEM_CALRN0
NC_MEM_CALRN1
NC_MEM_CALRN2
WEA0B
WEA1B
K26
L15
WEA0#
WEA1#
L27
2
2243_0402_1%N12
2243_0402_1%
AG12
243_0402_1%
2
M12
2243_0402_1%M27
AH12
2243_0402_1%
243_0402_1%
L18
L20
RV46
100_0402_1%
ODTA0
ODTA1
19
19
CLKA0
CLKA0#
19
19
CLKA1
CLKA1#
19
19
RASA0#
RASA1#
19
19
+MVREFDB
1
RV48
100_0402_1%
CV182
0.1U_0402_16V4Z
CASA0#
CASA1#
19
19
CSA0#_0
19
CSA1#_0
19
CKEA0
CKEA1
19
19
WEA0#
WEA1#
19
19
Close to pin AA12

+VRAM_1.5VS
RV50
100_0402_1%
Y12
AA12
+MVREFSB
MEM_CALRP1
NC_MEM_CALRP0
NC_MEM_CALRP2
RSVD#1
RSVD#2
RSVD#3
AF28
AG28
AL31
RSVD#5
RSVD#6
H23
J19
RSVD#9
RSVD#11
T8
W8
T50
T51
RV57
100_0402_1%
TESTEN
2
0.1U_0402_16V4Z
RV64
H3
H1
T3
T5
AE4
AF5
AK6
AK5
DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7
QSB_0/RDQSB_0
QSB_1/RDQSB_1
QSB_2/RDQSB_2
QSB_3/RDQSB_3
QSB_4/RDQSB_4
QSB_5/RDQSB_5
QSB_6/RDQSB_6
QSB_7/RDQSB_7
F6
K3
P3
V5
AB5
AH1
AJ9
AM5
QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7
QSB_0B/WDQSB_0
QSB_1B/WDQSB_1
QSB_2B/WDQSB_2
QSB_3B/WDQSB_3
QSB_4B/WDQSB_4
QSB_5B/WDQSB_5
QSB_6B/WDQSB_6
QSB_7B/WDQSB_7
G7
K1
P1
W4
AC4
AH3
AJ8
AM3
QSB#0
QSB#1
QSB#2
QSB#3
QSB#4
QSB#5
QSB#6
QSB#7
MVREFDB
MVREFSB
RV61
4.7K_0402_5%
AD28
TESTEN
AK10
AL10
CLKTESTA
CLKTESTB
216-0729002 A12 M96_BGA962
DQMB#[7..0] 20
QSB#[7..0] 20
ODTB0
ODTB1
CLKB0
CLKB0B
L9
L8
CLKB0
CLKB0#
CLKB1
CLKB1B
AD8
AD7
CLKB1
CLKB1#
RASB0B
RASB1B
T10
Y10
RASB0#
RASB1#
CASB0B
CASB1B
W10
AA10
CASB0#
CASB1#
CSB0B_0
CSB0B_1
P10
L10
CSB0#_0
CSB1B_0
CSB1B_1
AD10
AC10
CSB1#_0
CKEB0
CKEB1
U10
AA11
CKEB0
CKEB1
WEB0B
WEB1B
N10
AB11
WEB0#
WEB1#
ODTB0
ODTB1
20
20
CLKB0
CLKB0#
20
20
CLKB1
CLKB1#
20
20
RASB0#
RASB1#
20
20
CASB0#
CASB1#
20
20
CSB0#_0
20
CSB1#_0
20
CKEB0
CKEB1
20
20
WEB0#
WEB1#
20
20
RV58 4.7K_0402_5%
2
1
DRAM_RST
B_BA[2..0] 20
QSB[7..0] 20
T7
W7
RV62
4.7K_0402_5%
MAB[12..0] 20
B_BA[2..0]
ODTB0
ODTB1
DRAM_RST# 19,20
@ RV63
2
+VRAM_1.5VS
AH11
1K_0402_5%
CV185
0.01U_0402_16V7K
A
4.7K_0402_5%
216-0729002 A12 M96_BGA962
M96PRO@
M96PRO@
Compal Secret Data
Issued Date
2009/01/23
2010/01/23
Deciphered Date
5
DQMB_0
DQMB_1
DQMB_2
DQMB_3
DQMB_4
DQMB_5
DQMB_6
DQMB_7
CV184
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
B_BA2
B_BA0
B_BA1
MEMORY INTERFACE B
J21
G19
+VRAM_1.5VS
RV51
100_0402_1%
ODTA0
ODTA1
Close to pin Y12

QSA#[7..0] 19
P8
T9
P9
N7
N8
N9
U9
U8
Y9
W9
AC8
AC9
AA7
AA8
Y8
AA9
+VRAM_1.5VS
QSA#0
QSA#1
QSA#2
QSA#3
QSA#4
QSA#5
QSA#6
QSA#7
QSA[7..0] 19
MAB[12..0]
MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8
MAB_9
MAB_10
MAB_11
MAB_12
MAB_13/BA2
MAB_14/BA0
MAB_15/BA1
Close to pin L20
A34
E30
E26
C20
C16
C12
J11
F8
DQMA#[7..0] 19
DQB_0
DQB_1
DQB_2
DQB_3
DQB_4
DQB_5
DQB_6
DQB_7
DQB_8
DQB_9
DQB_10
DQB_11
DQB_12
DQB_13
DQB_14
DQB_15
DQB_16
DQB_17
DQB_18
DQB_19
DQB_20
DQB_21
DQB_22
DQB_23
DQB_24
DQB_25
DQB_26
DQB_27
DQB_28
DQB_29
DQB_30
DQB_31
DQB_32
DQB_33
DQB_34
DQB_35
DQB_36
DQB_37
DQB_38
DQB_39
DQB_40
DQB_41
DQB_42
DQB_43
DQB_44
DQB_45
DQB_46
DQB_47
DQB_48
DQB_49
DQB_50
DQB_51
DQB_52
DQB_53
DQB_54
DQB_55
DQB_56
DQB_57
DQB_58
DQB_59
DQB_60
DQB_61
DQB_62
DQB_63
QSA_0B/WDQSA_0
QSA_1B/WDQSA_1
QSA_2B/WDQSA_2
QSA_3B/WDQSA_3
QSA_4B/WDQSA_4
QSA_5B/WDQSA_5
QSA_6B/WDQSA_6
QSA_7B/WDQSA_7
A_BA[2..0] 19
C5
C3
E3
E1
F1
F3
F5
G4
H5
H6
J4
K6
K5
L4
M6
M1
M3
M5
N4
P6
P5
R4
T6
T1
U4
V6
V1
V3
Y6
Y1
Y3
Y5
AA4
AB6
AB1
AB3
AD6
AD1
AD3
AD5
AF1
AF3
AF6
AG4
AH5
AH6
AJ4
AK3
AF8
AF9
AG8
AG7
AK9
AL7
AM8
AM7
AK1
AL4
AM6
AM1
AN4
AP3
AP1
AP5
0.1U_0402_16V4Z
QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7
MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63
RV47
100_0402_1%
CV181
C34
D29
D25
E20
E16
E12
J10
D7
A_BA[2..0]
MDB[0..63]
MDB[0..63]
QSA_0/RDQSA_0
QSA_1/RDQSA_1
QSA_2/RDQSA_2
QSA_3/RDQSA_3
QSA_4/RDQSA_4
QSA_5/RDQSA_5
QSA_6/RDQSA_6
QSA_7/RDQSA_7
20
+MVREFDA
DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7
MAA[12..0] 19
RV45
100_0402_1%
DQMA_0
DQMA_1
DQMA_2
DQMA_3
DQMA_4
DQMA_5
DQMA_6
DQMA_7
A32
C32
D23
E22
C14
A14
E10
D9
MAA[12..0]
+VRAM_1.5VS
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
A_BA2
A_BA0
A_BA1
Close to pin L18
G24
J23
H24
J24
H26
J26
H21
G21
H19
H20
L13
G16
J16
H16
J17
H17
DQA_0
DQA_1
DQA_2
DQA_3
DQA_4
DQA_5
DQA_6
DQA_7
DQA_8
DQA_9
DQA_10
DQA_11
DQA_12
DQA_13
DQA_14
DQA_15
DQA_16
DQA_17
DQA_18
DQA_19
DQA_20
DQA_21
DQA_22
DQA_23
DQA_24
DQA_25
DQA_26
DQA_27
DQA_28
DQA_29
DQA_30
DQA_31
DQA_32
DQA_33
DQA_34
DQA_35
DQA_36
DQA_37
DQA_38
DQA_39
DQA_40
DQA_41
DQA_42
DQA_43
DQA_44
DQA_45
DQA_46
DQA_47
DQA_48
DQA_49
DQA_50
DQA_51
DQA_52
DQA_53
DQA_54
DQA_55
DQA_56
DQA_57
DQA_58
DQA_59
DQA_60
DQA_61
DQA_62
DQA_63
MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_12
MAA_13/BA2
MAA_14/BA0
MAA_15/BA1
C37
C35
A35
E34
G32
D33
F32
E32
D31
F30
C30
A30
F28
C28
A28
E28
D27
F26
C26
A26
F24
C24
A24
E24
C22
A22
F22
D21
A20
F20
D19
E18
C18
A18
F18
D17
A16
F16
D15
E14
F14
D13
F12
A12
D11
F10
A10
C10
G13
H13
J13
H11
G10
G8
K9
K10
G9
A8
C8
E8
A6
C6
E6
A5
MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
MDA[0..63]
MDA[0..63]
MEMORY INTERFACE A
19
Title

Size
Document Number
Rev
D
401717
Date:
Sheet

1
18
of
58
CK
CK
CKE/CKE0
18
18
18
18
18
ODTA0
CSA0#_0
RASA0#
CASA0#
WEA0#
K1
L2
J3
K3
L3
ODT/ODT0
CS/CS0
RAS
CAS
WE
QSA2
QSA0
F3
C7
DQSL
DQSU
DQMA#2
DQMA#0
E7
D3
DML
DMU
QSA#2
QSA#0
T2
RESET
L8
ZQ/ZQ0
J1
L1
J9
L9
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
CK
CK
CKE/CKE0
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
ODTA0
CSA0#_0
RASA0#
CASA0#
WEA0#
K1
L2
J3
K3
L3
ODT/ODT0
CS/CS0
RAS
CAS
WE
QSA3
QSA1
F3
C7
DQSL
DQSU
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQMA#3
DQMA#1
E7
D3
DML
DMU
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
QSA#3
QSA#1
CLKA0
8PCS@
1
2
RV85
56_0402_1%
CLKA0#
8PCS@
1
2
RV86
56_0402_1%
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
DQSL
DQSU
DRAM_RST# T2
RESET
L8
ZQ/ZQ0
J1
L1
J9
L9
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
RV66
243_0402_1%
8PCS@
96-BALL
SDRAM DDR3
K4W1G1646E-HC12_FBGA96
@
CLKA1
CLKA1#
CKEA1
J7
K7
K9
CK
CK
CKE/CKE0
18
18
18
18
18
ODTA1
CSA1#_0
RASA1#
CASA1#
WEA1#
K1
L2
J3
K3
L3
ODT/ODT0
CS/CS0
RAS
CAS
WE
QSA4
QSA5
F3
C7
DQSL
DQSU
DQMA#4
DQMA#5
E7
D3
DML
DMU
QSA#4
QSA#5
RESET
L8
ZQ/ZQ0
J1
L1
J9
L9
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
8PCS@
96-BALL
SDRAM DDR3
@
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS
RV73
4.99K_0402_1%
CV186
A_BA0
A_BA1
A_BA2
M2
N8
M3
BA0
BA1
BA2
CLKA1
CLKA1#
CKEA1
J7
K7
K9
CK
CK
CKE/CKE0
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
ODTA1
CSA1#_0
RASA1#
CASA1#
WEA1#
K1
L2
J3
K3
L3
ODT/ODT0
CS/CS0
RAS
CAS
WE
QSA6
QSA7
F3
C7
DQSL
DQSU
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQMA#6
DQMA#7
E7
D3
DML
DMU
QSA#6
QSA#7
G3
B7
DQSL
DQSU
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
CV191
RV81
4.99K_0402_1%
8PCS@
0.1U_0402_16V4Z
2 8PCS@
0.1U_0402_16V4Z
2 8PCS@
Group4
Group5
+VREFD_A2
CV192
M8
H1
VREFCA
VREFDQ
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
MDA48
MDA51
MDA55
MDA54
MDA50
MDA52
MDA49
MDA53
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
MDA63
MDA58
MDA60
MDA59
MDA61
MDA56
MDA62
MDA57
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
Group6
Group7
+VRAM_1.5VS
DRAM_RST# T2
RESET
L8
ZQ/ZQ0
J1
L1
J9
L9
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
CV187
RV68
243_0402_1%
8PCS@
+VRAM_1.5VS
8PCS@
+VREFC_A3
RV75
4.99K_0402_1%
+VREFD_A3
1
CV188
RV82
4.99K_0402_1%
1
CV189
RV78
4.99K_0402_1%
0.1U_0402_16V4Z
2
RV80
4.99K_0402_1%
8PCS@
RV74
4.99K_0402_1%
RV79
4.99K_0402_1%
8PCS@
0.1U_0402_16V4Z
2 8PCS@
+VREFC_A2
1
RV77
4.99K_0402_1%
8PCS@
+VREFD_A1
1
1
+VREFC_A1
1
1
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
B2
D9
G7
K2
K8
N1
N9
R1
R9
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
96-BALL
SDRAM DDR3
@
+VRAM_1.5VS
8PCS@
RV72
4.99K_0402_1%
8PCS@
2
56_0402_1%
MDA43
MDA44
MDA40
MDA45
MDA42
MDA46
MDA41
MDA47
RV71
4.99K_0402_1%
8PCS@
RV70
4.99K_0402_1%
8PCS@
RV69
4.99K_0402_1%
8PCS@
2
56_0402_1%
D7
C3
C8
C2
A7
A2
B8
A3
DQSL
DQSU
DRAM_RST# T2
+VRAM_1.5VS
+VRAM_1.5VS
8PCS@
CV237
0.1U_0402_16V4Z
8PCS@
G3
B7
RV67
243_0402_1%
8PCS@
CLKA1# 1
RV88
BA0
BA1
BA2
+VREFC_A4
+VREFD_A4
+VRAM_1.5VS
18
18
18
CLKA1 1
RV87
M2
N8
M3
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
CV201
0.1U_0402_16V4Z
8PCS@
RV65
243_0402_1%
8PCS@
G3
B7
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A_BA0
A_BA1
A_BA2
DQSL
DQSU
J7
K7
K9
18,20 DRAM_RST#
G3
B7
CLKA0
CLKA0#
CKEA0
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
+VRAM_1.5VS
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
MDA35
MDA32
MDA38
MDA34
MDA37
MDA36
MDA39
MDA33
8PCS@
8PCS@
96-BALL
SDRAM DDR3
@
+VRAM_1.5VS
1
J7
K7
K9
BA0
BA1
BA2
B2
D9
G7
K2
K8
N1
N9
R1
R9
Group1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
E3
F7
F2
F8
H3
H8
G2
H7
8PCS@
RV76
4.99K_0402_1%
8PCS@
+VREFC_A4
+VREFD_A4
1
CV190
RV83
4.99K_0402_1%
1
CV193
RV84
4.99K_0402_1%
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
8PCS@
8PCS@
CLKA0
CLKA0#
CKEA0
M2
N8
M3
MDA15
MDA11
MDA14
MDA10
MDA13
MDA9
MDA12
MDA8
Group3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
8PCS@
0.1U_0402_16V4Z
2
18
18
18
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
A_BA0
A_BA1
A_BA2
+VRAM_1.5VS
D7
C3
C8
C2
A7
A2
B8
A3
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
UV6
VREFCA
VREFDQ
BA0
BA1
BA2
B2
D9
G7
K2
K8
N1
N9
R1
R9
Group0
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
M8
H1
M2
N8
M3
MDA0
MDA5
MDA1
MDA7
MDA3
MDA4
MDA2
MDA6
+VREFC_A3
+VREFD_A3
A_BA0
A_BA1
A_BA2
D7
C3
C8
C2
A7
A2
B8
A3
MDA25
MDA30
MDA24
MDA29
MDA26
MDA31
MDA27
MDA28
18
18
18
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
E3
F7
F2
F8
H3
H8
G2
H7
QSA#[7..0]
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
QSA[7..0]
18
Group2
VREFCA
VREFDQ
DQMA#[7..0]
18
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
M8
H1
18
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
MDA22
MDA19
MDA21
MDA18
MDA23
MDA16
MDA20
MDA17
MDA[0..63]
MAA[12..0]
E3
F7
F2
F8
H3
H8
G2
H7
18
18
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
+VREFC_A2
+VREFD_A2
UV5
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
MDA[0..63]
UV4
VREFCA
VREFDQ
UV3
+VREFC_A1 M8
+VREFD_A1 H1
8PCS@
8PCS@
8PCS@
0.1U_0402_16V4Z
2 8PCS@
+VRAM_1.5VS
+VRAM_1.5VS
1U_0402_6.3V4Z
+VRAM_1.5VS
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+VRAM_1.5VS
1U_0402_6.3V4Z
1
CV194
8PCS@
2
2
1U_0402_6.3V4Z
CV202
8PCS@
1U_0402_6.3V4Z
1
CV223
8PCS@
2
1U_0402_6.3V4Z
CV195
8PCS@
1U_0402_6.3V4Z
1
CV224
8PCS@
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CV203
8PCS@
CV204
8PCS@
2
1U_0402_6.3V4Z
CV206
8PCS@
2
2
1U_0402_6.3V4Z
CV225
8PCS@
1U_0402_6.3V4Z
1
CV196
8PCS@
2
1U_0402_6.3V4Z
CV207
8PCS@
1U_0402_6.3V4Z
1
CV208
8PCS@
2
1U_0402_6.3V4Z
CV209
8PCS@
CV212
8PCS@
2
2
1U_0402_6.3V4Z
CV210
8PCS@
CV213
8PCS@
CV197
8PCS@
2
1U_0402_6.3V4Z
CV214
8PCS@
CV226
8PCS@
2
1U_0402_6.3V4Z
CV215
8PCS@
CV216
8PCS@
2
1U_0402_6.3V4Z
1
CV233
10U_0603_6.3V
8PCS@ 2
+VRAM_1.5VS
CV228
10U_0603_6.3V
8PCS@ 2
CV229
8PCS@
10U_0603_6.3V
1
CV230
8PCS@
2
2
10U_0603_6.3V
CV218
8PCS@
2
1U_0402_6.3V4Z
10U_0603_6.3V
1
1
CV234
8PCS@
CV200
8PCS@
CV219
8PCS@
2
1U_0402_6.3V4Z
CV220
8PCS@
CV221
8PCS@
2
1U_0402_6.3V4Z
CV227
8PCS@
2
10U_0603_6.3V
CV235
8PCS@
2
10U_0603_6.3V
CV231
8PCS@
Compal Secret Data
2
10U_0603_6.3V
Issued Date
2009/01/23
2010/01/23
Deciphered Date
5
CV199
8PCS@
2
2
1U_0402_6.3V4Z
+VRAM_1.5VS
2
1U_0402_6.3V4Z
CV198
8PCS@
Title

Size
Document Number
Rev
D
401717
Date:
Sheet

1
19
of
58
UV7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
B_BA0
B_BA1
B_BA2
M2
N8
M3
BA0
BA1
BA2
CLKB0
CLKB0#
CKEB0
J7
K7
K9
CK
CK
CKE/CKE0
K1
L2
J3
K3
L3
ODT/ODT0
CS/CS0
RAS
CAS
WE
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
ODTB0
CSB0#_0
RASB0#
CASB0#
WEB0#
K1
L2
J3
K3
L3
ODT/ODT0
CS/CS0
RAS
CAS
WE
QSB3
QSB1
F3
C7
DQSL
DQSU
QSB2
QSB0
F3
C7
DQSL
DQSU
DQMB#3
DQMB#1
E7
D3
DML
DMU
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQMB#2
DQMB#0
E7
D3
DML
DMU
QSB#3
QSB#1
G3
B7
DQSL
DQSU
QSB#2
QSB#0
G3
B7
DQSL
DQSU
T2
RESET
L8
ZQ/ZQ0
DRAM_RST#
T2
RESET
L8
ZQ/ZQ0
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
96-BALL
SDRAM DDR3
@
ODTB1
CSB1#_0
RASB1#
CASB1#
WEB1#
K1
L2
J3
K3
L3
ODT/ODT0
CS/CS0
RAS
CAS
WE
QSB4
QSB5
F3
C7
DQSL
DQSU
DQMB#4
DQMB#5
E7
D3
DML
DMU
QSB#4
QSB#5
G3
B7
DQSL
DQSU
DRAM_RST#
T2
RESET
L8
ZQ/ZQ0
+VREFC_B2
1
RV103
4.99K_0402_1%
2PCS@
CV239
0.1U_0402_16V4Z
2 2PCS@
CV240
RV104
0.1U_0402_16V4Z 4.99K_0402_1%
2 2PCS@
2PCS@
2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
MDB44
MDB43
MDB47
MDB41
MDB45
MDB40
MDB46
MDB42
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
B2
D9
G7
K2
K8
N1
N9
R1
R9
B_BA0
B_BA1
B_BA2
M2
N8
M3
BA0
BA1
BA2
CLKB1
CLKB1#
CKEB1
J7
K7
K9
CK
CK
CKE/CKE0
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
ODTB1
CSB1#_0
RASB1#
CASB1#
WEB1#
K1
L2
J3
K3
L3
ODT/ODT0
CS/CS0
RAS
CAS
WE
QSB6
QSB7
F3
C7
DQSL
DQSU
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQMB#6
DQMB#7
E7
D3
DML
DMU
QSB#6
QSB#7
G3
B7
DQSL
DQSU
DRAM_RST#
T2
RESET
L8
ZQ/ZQ0
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
J1
L1
J9
L9
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
Group5
RV92
243_0402_1%
4PCS@
96-BALL
SDRAM DDR3
@
RV96
4.99K_0402_1%
2PCS@
+VREFD_B1
RV102
0.1U_0402_16V4Z 4.99K_0402_1%
2 2PCS@
2PCS@
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
+VRAM_1.5VS
RV95
4.99K_0402_1%
2PCS@
CV238
J1
L1
J9
L9
RV91
243_0402_1%
4PCS@
1
2
+VREFC_B1
1
RV101
4.99K_0402_1%
2PCS@
CV290
0.1U_0402_16V4Z
2
4PCS@
18
18
18
18
18
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
MDB52
MDB51
MDB55
MDB48
MDB53
MDB49
MDB54
MDB50
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
MDB56
MDB59
MDB63
MDB62
MDB57
MDB61
MDB58
MDB60
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
Group6
Group7
+VRAM_1.5VS
96-BALL
SDRAM DDR3
@
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS
RV94
4.99K_0402_1%
2PCS@
4PCS@
2
56_0402_1% 1
CK
CK
CKE/CKE0
+VRAM_1.5VS
RV93
4.99K_0402_1%
2PCS@
2
56_0402_1%
J7
K7
K9
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
Group4
+VRAM_1.5VS
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
+VRAM_1.5VS
4PCS@
1
RV112
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
CLKB1
CLKB1#
CKEB1
96-BALL
SDRAM DDR3
@
+VRAM_1.5VS
1
RV111
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
18
18
18
VREFCA
VREFDQ
CV278
0.1U_0402_16V4Z
2
2PCS@
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
2PCS@
1
2
RV110 56_0402_1% 1
RV90
243_0402_1%
2PCS@
CLKB0#
J1
L1
J9
L9
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
2PCS@
1
2
RV109 56_0402_1%
A1
A8
C1
C9
D2
E9
F1
H2
H9
BA0
BA1
BA2
B_BA0
B_BA1
B_BA2
J1
L1
J9
L9
2
CLKB0
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
M2
N8
M3
+VRAM_1.5VS
M8
H1
RV97
4.99K_0402_1%
4PCS@
RV98
4.99K_0402_1%
+VREFD_B2
1
+VREFC_B3
1
RV105
4.99K_0402_1%
4PCS@
CV241
0.1U_0402_16V4Z
2 2PCS@
4PCS@
ODTB0
CSB0#_0
RASB0#
CASB0#
WEB0#
B2
D9
G7
K2
K8
N1
N9
R1
R9
Group0
+VREFC_B4
+VREFD_B4
RV99
4.99K_0402_1%
4PCS@
RV100
4.99K_0402_1%
4PCS@
+VREFD_B3
1
CV242
RV106
4.99K_0402_1%
4PCS@
0.1U_0402_16V4Z
2 4PCS@
CV243
+VREFC_B4
1
RV107
4.99K_0402_1%
4PCS@
0.1U_0402_16V4Z
2 4PCS@
18
18
18
18
18
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
MDB34
MDB37
MDB32
MDB39
MDB35
MDB38
MDB33
MDB36
+VREFD_B4
CK
CK
CKE/CKE0
MDB1
MDB6
MDB0
MDB4
MDB3
MDB7
MDB2
MDB5
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
E3
F7
F2
F8
H3
H8
G2
H7
CV244
RV108
4.99K_0402_1%
4PCS@
0.1U_0402_16V4Z
2 4PCS@
CV245
0.1U_0402_16V4Z
2 4PCS@
B2
D9
G7
K2
K8
N1
N9
R1
R9
D7
C3
C8
C2
A7
A2
B8
A3
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
Group2
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
Group1
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VREFCA
VREFDQ
MDB15
MDB10
MDB12
MDB11
MDB13
MDB9
MDB14
MDB8
M8
H1
J7
K7
K9
RV89
243_0402_1%
2PCS@
CLKB1#
UV10
+VREFC_B3
+VREFD_B3
D7
C3
C8
C2
A7
A2
B8
A3
MDB22
MDB20
MDB21
MDB18
MDB19
MDB17
MDB23
MDB16
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
E3
F7
F2
F8
H3
H8
G2
H7
CLKB0
CLKB0#
CKEB0
18,19 DRAM_RST#
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
+VRAM_1.5VS
18
18
18
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
Group3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
BA0
BA1
BA2
B_BA0
B_BA1
B_BA2
VREFCA
VREFDQ
18
18
18
M8
H1
M2
N8
M3
QSB#[7..0]
CLKB1
UV9
+VREFC_B2
+VREFD_B2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
MDB26
MDB28
MDB27
MDB31
MDB25
MDB30
MDB24
MDB29
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
E3
F7
F2
F8
H3
H8
G2
H7
18
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
QSB[7..0]
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQMB#[7..0]
VREFCA
VREFDQ
18
M8
H1
MAB[12..0]
+VREFC_B1
+VREFD_B1
18
18
UV8
MDB[0..63]
MDB[0..63]
18
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV246
2PCS@
2
2
1U_0402_6.3V4Z
CV247
2PCS@
1U_0402_6.3V4Z
1
CV248
2PCS@
2
1U_0402_6.3V4Z
CV249
2PCS@
1U_0402_6.3V4Z
1
CV250
2PCS@
2
1U_0402_6.3V4Z
CV251
2PCS@
1U_0402_6.3V4Z
1
CV252
2PCS@
2
1U_0402_6.3V4Z
10U_0603_6.3V
1
1
CV281
2PCS@
CV268
2PCS@
2
1U_0402_6.3V4Z
CV269
2PCS@
CV254
2PCS@
2
1U_0402_6.3V4Z
CV255
2PCS@
1U_0402_6.3V4Z
1
CV256
2PCS@
2
1U_0402_6.3V4Z
CV257
2PCS@
1
1
CV258
2PCS@
2
1U_0402_6.3V4Z
CV271
4PCS@
2
2
1U_0402_6.3V4Z
CV259
4PCS@
CV260
4PCS@
2
1U_0402_6.3V4Z
CV261
4PCS@
1U_0402_6.3V4Z
1
CV272
4PCS@
2
2
1U_0402_6.3V4Z
CV273
4PCS@
1U_0402_6.3V4Z
1
CV282
2PCS@
2
10U_0603_6.3V
2
1U_0402_6.3V4Z
2
10U_0603_6.3V
CV312
390U_2.5V_M_R10
+
2
+
2
CV279
330U_X_2VM_R6M
@
CV263
4PCS@
1U_0402_6.3V4Z
1
CV264
4PCS@
2
1U_0402_6.3V4Z
CV286
4PCS@
CV287
4PCS@
CV265
4PCS@
1U_0402_6.3V4Z
1
CV276
4PCS@
2
1U_0402_6.3V4Z
CV266
4PCS@
CV267
4PCS@
2
1U_0402_6.3V4Z
2
10U_0603_6.3V
2009/01/23
2010/01/23
Deciphered Date
CV288
4PCS@
2
10U_0603_6.3V
Compal Secret Data
Issued Date
10U_0603_6.3V
1
5
+VRAM_1.5VS
CV285
10U_0603_6.3V
4PCS@ 2
+VRAM_1.5VS
CV275
4PCS@
2
1U_0402_6.3V4Z
+VRAM_1.5VS
CV283
2PCS@
CV262
4PCS@
Co-layout with CV279
+VRAM_1.5VS
CV280
10U_0603_6.3V
2PCS@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
Title


Custom
401717
Date:
Rev
D
Sheet
1
20
of
58
CONFIGURATION STRAPS
STRAPS
+3VS_DELAY
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET
GPU by the system BIOS
14 GPU_GPIO0
14 GPU_GPIO1
14 GPU_GPIO2
14 SOUT_GPIO8
14 SIN_GPIO9
14 ROMSE_GPIO22
GPU by VBIOS
GPIO22 = 0 (BIOS_ROM_EN = 0) GPIO22 = 1 (BIOS_ROM_EN = 1)

GPIO[13:11]
D
MEMORY SIZE
0 0 0
0 0 1
0 1 0
GPIO[13:11]
128MB
14
14
14
1 0 0
(M25P05A)
256MB
64MB
GPU_GPIO11
GPU_GPIO12
GPU_GPIO13
GPU_GPIO0
GPU_GPIO1
GPU_GPIO2
SOUT_GPIO8
SIN_GPIO9
@ RV113
@RV113
@RV114
@
RV114
RV115
@RV116
@
RV116
@RV117
@
RV117
@RV118
@
RV118
GPU_GPIO11
GPU_GPIO12
GPU_GPIO13
RV119
@RV120
@
RV120
@RV121
@
RV121
HDMI@ RV122
HDMI@ RV123
@RV124
@
RV124
@RV125
@
RV125
14,23 VGA_CRT_VSYNC
14,23 VGA_CRT_HSYNC
14 HSYNC_DAC2
14 VSYNC_DAC2
2
2
2
2
2
2
1
1
1
1
1
1
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
STRAPS
DESCRIPTION OF DEFAULT SETTINGS
RECOMMENDED SETTINGS
TX_PWRS_ENB
GPIO0
PIN
PCIE FULL TX OUTPUT SWING
2
2
2
1 10K_0402_5%
1 10K_0402_5%
1 10K_0402_5%
TX_DEEMPH_EN
GPIO1
PCIE TRANSMITTER DE-EMPHASIS ENABLED
BIF_GEN2_EN_A
GPIO2
PCIE GNE2 ENABLED
2
2
2
2
1
1
1
1
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
BIF_CLK_PM_EN
GPIO8
BIF_CLK_PM_EN
BIF_VGA DIS
GPIO9
VGA Controller ENABLED
0 (Enable)
BIOS_ROM_EN
GPIO_22_ROMCSB
Enable Extermal BIOS device
GPIO[13:11]
ROM Configurations
0 0 1
VSYNC_DAC2
IGNORE VIP DEVICE STRAPS
AUD[1] AUD[0]
0 0 No audio function
0 1 Audio for DisplayPort and HDMI if dongle is detected
1 0 Audio for DisplayPort only
1 1 Audio for both DisplayPort and HDMI
11
ROMIDCFG(2:0)
VIP_DEVICE_STRAP_ENA
AUD[1]
HSYNC
AUD[0]
VSYNC
RSVD
HSYNC_DAC2
RSVD
GENERICC
AMD RESERVED CONFIGURATION STRAPS

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
HSYNC_DAC2
GENERICC
PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED,
+1.8VS
RV131
10K_0402_5%
2
STRAPS
PIN
VRAM_ID0 14
VRAM_ID1 14
VRAM_ID2 14
VRAM_DEC 14
GPU
VRAM size
Vendor Part Number#
Compal Part Number#
VRAM_ID 2,1,0
512M 64Mx16 (x4)
HYN
H5TQ1G63BFR-12C
SA000032400
000
1G 64Mx16 (x8)
HYN
H5TQ1G63BFR-12C
SA000032400
001
256M 64Mx16 (x2)
HYN
H5TQ1G63BFR-12C
SA000032400
010
1G 64Mx16 (x8)
SAM
K4W1G1646E-HC12
SA000035700
011
M92-M2 XT
512M 64Mx16 (x4)
SAM
K4W1G1646E-HC12
SA000035700
100
M92-M2 XT
256M 64Mx16 (x2)
SAM
K4W1G1646E-HC12
SA000035700
101
M92-M2 XT
DDR3
RV135
10K_0402_5%
@
VRAM_DEC
RV134
10K_0402_5%
@
2
RV133
10K_0402_5%
@
2
RV132
10K_0402_5%
@
GPIO21_BB_EN
1
RV130
10K_0402_5%
@
RV129
10K_0402_5%
@
2
RV128
10K_0402_5%
@
GPIO_28_TDO
M96-M2
1
M92-M2 XT
VRAM_ID[2:0]
External VGA Thermal Sensor
DVPDATA
(3,2,1)
M96-M2
+3VS
1
A
CV291
0.1U_0402_16V4Z
14 GPU_THERMAL_D+
1
CV292
14 GPU_THERMAL_D-
2
2200P_0402_50V7K
UV12
1
VDD
SCLK
EC_SMB_CK2 26,41
D+
SDATA
EC_SMB_DA2 26,41
D-
ALERT#
THERM#_VGA 14
THERM#
GND
2009/01/23
Issued Date
2010/01/23
Deciphered Date
ADM1032ARMZ-2REEL_MSOP8
Compal Secret Data
Title


Custom
Date:
Rev
D
401717
Sheet
1
21
of
58
+3VS_CK505
C211
C212
2
0.1U_0402_16V4Z
C251
47P_0402_50V8J
FBMH1608HM601-T_0603
10U_0805_10V4Z
0.1U_0402_16V4Z
1
2
R101
1
1
1
+1.05VS
C219
For SED
+3VS_CK505
+1.5VS
FBMH1608HM601-T_0603
1
2
@ R120
0.1U_0402_16V4Z
For SED
C213
+1.05VS_CK505
C222
CK_PWRGD
C252
47P_0402_50V8J
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Q35B
2N7002DW-T/R7_SOT363-6
+1.5VS_CK505
C214
2
0.1U_0402_16V4Z
C221
CLK_ENABLE# 53
C220
R110
10K_0402_5%
For SED
C210
2
10U_0805_10V4Z
0.1U_0402_16V4Z
1
C209
R401
0_0603_5%
0.1U_0402_16V4Z
1
FBMH1608HM601-T_0603
1
2
R100
+3VS
For SED
For SED
Clock Generator
C215
2
0.1U_0402_16V4Z
+3VS_CK505
Silego Have Internal Pull-Up

+1.05VS_CK505
+1.05VS_CK505
+1.5VS_CK505
U5
+3VS_CK505
26
26
CLK_DOT
CLK_DOT#
14
14
40
27M_CLK
27M_SSC
CLK_48M_CR
1 R145
1 R148
2 0_0402_5%
2 0_0402_5%
CLK_DOT_R
CLK_DOT#_R
1 R391
2 33_0402_5%
1 R143
2 33_0402_5%
1
2
R390 33_0402_5%
27M_CLK_R
27M_SSC_R
CLK_48M_CR_R
CLK_SATA
CLK_SATA#
1 R149
1 R150
2 0_0402_5%
2 0_0402_5%
CLK_SATA_R
CLK_SATA#_R
26 PCH_CLK_DMI
26 PCH_CLK_DMI#
1 R151
1 R152
2 0_0402_5%
2 0_0402_5%
PCH_CLK_DMI_R
PCH_CLK_DMI#_R
26
26
H_STP_CPU#
H_STP_CPU#
+3VS_CK505
1
2
3
4
5
6
7
8
VDD_USB_48
VSS_48M
DOT_96
DOT_96#
VDD_27
27MHZ
27MHZ_SS
USB_48
SCL
SDA
REF_0/CPU_SEL
VDD_REF
XTAL_IN
XTAL_OUT
VSS_REF
CKPWRGD/PD#
32
31
30
29
28
27
26
25
9
10
11
12
13
14
15
16
VSS_27M
SATA
SATA#
VSS_SRC
SRC_1
SRC_1#
VDD_SRC_IO
CPU_STOP#
VDD_CPU
CPU_0
CPU_0#
VSS_CPU
CPU_1
CPU_1#
VDD_CPU_IO
VDD_SRC
24
23
22
21
20
19
18
17
33
TGND
PM_SMBCLK 11,12,26,36
CLK_14M_PCH 26
CPU_SEL 1
2
33_0402_5% R102
CLK_XTAL_IN
CLK_XTAL_OUT
10K_0402_5% 2
CK_PWRGD
CPU_SEL
CLK_BCLK_R
CLK_BCLK_R#
1
1
R103 2 0_0402_5%
R104 2 0_0402_5%
10K_0402_5% 2
CLK_XTAL_OUT
Routing the
Y1
CPU_0/0#
CPU_1/1#
0 (Default)
133MHz
133MHz
100MHz
100MHz
trace at
CLK_XTAL_IN
1
2
2
2
least 10mil
14.31818MHZ_20P_6X1430004201
C223
C224
22P_0402_50V8J
22P_0402_50V8J
1
1
2
3
4
39 INT_MIC_R
14 VGA_TXOUT0+
14 VGA_TXOUT014 VGA_TXOUT1+
14 VGA_TXOUT114 VGA_TXOUT2+
14 VGA_TXOUT2-
Q17
AO3413_SOT23
1
1
6 2
1
C229
0.01U_0402_25V7K
+LCD_VDD
W=60mils
VGA_ENVDD
2
47K_0402_5%
1
R109
2
S
14
0_0603_5%
W=20mils
R388 1
2
USB20_P11_R
USB20_N11_R
+5VS
W=60mils
C228
0.1U_0402_16V7K
Q1A
2N7002DW-T/R7_SOT363-6
Q1B
2N7002DW-T/R7_SOT363-6
R112
10K_0402_5%
C233
0.1U_0402_16V4Z
14
14
14
14
14
14
VGA_TZOUT0+
VGA_TZOUT0VGA_TZOUT1+
VGA_TZOUT1VGA_TZOUT2+
VGA_TZOUT2-
41
BKOFF#
C226
0.1U_0402_16V4Z
C227
4.7U_0805_10V4Z
JLVDS
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
24
23
26
25
28
27
30
29
32
31
34
33
36
35
38
37
40
39
GND GMD
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
VGA_TXCLK+ 14
VGA_TXCLK- 14
INVT_PWM_R
DAC_BRIG 41
INVT_PWM_R
VGA_TZCLK+ 14
VGA_TZCLK- 14
1
R159
2
0_0402_5%
INVT_PWM 41
@
1
R160
2
0_0402_5%
VGA_PWM 14
VGA_EDID_CLK 14
VGA_EDID_DATA 14
+3VS
+LCDVDD_R
1 R154
2 0_0402_5%
+LCD_INV
Rated Current MAX:3000mA
L2 2
1
FBMA-L11-201209-221LMA30T_0805
C234
68P_0402_50V8J
C231
680P_0402_50V7K
2
@
LVDS_SEL 30
B+
ACES_87242-4001-09
@
R113
10K_0402_5%
0_0402_5%
2
+LCD_VDD
For EMI request

1
C235
0.1U_0402_25V6
C232
0.1U_0402_16V4Z
C236
680P_0402_50V7K
@
R78
1
1.5A
2 L1
1
0_0805_5%
1
0.1U_0402_16V4Z
1
2
C225
+3VS
1 R106
CPU_SEL
+LCDVDD_R
R108
100K_0402_5%
+1.05VS
+5VS_LVDS_CAM
R107
150_0603_5%
1 R119
CLK_BCLK 26
CLK_BCLK# 26
+1.5VS_CK505
+3VS
IDT Have Internal Pull-Down
LCD/PANEL BD. Conn.
1 R105
SA00002XY00
RTM890N-631-GRT_QFN_32P _5X5
+LCD_VDD
10K_0402_5% 2
L55 @
29
USB20_N11
29
USB20_P11
USB20_N11_R
USB20_P11_R
R96
1
Issued Date
0_0402_5%
2
Compal Secret Data
WCM-2012-900T_0805
2009/01/23
Deciphered Date
2010/01/23
C
Title

Custom
Rev
D
401717
Date:

G
Sheet
of
22
H
58
D5
D4
D3
CRT CONNECTOR
+3VS
C239
L5
1
2
NBQ100505T-800Y_0402
CRT_B_L
C240
1
C241
C242
C243
DAN217_SC59
@
1
C238
CRT_G_L
DAN217_SC59
@
2.2P_0402_50V8C
R140
L4
1
2
NBQ100505T-800Y_0402
2.2P_0402_50V8C
R139
CRT_R_L
2.2P_0402_50V8C
R138
L3
1
2
NBQ100505T-800Y_0402
2.2P_0402_50V8C
VGA_CRT_B
2.2P_0402_50V8C
14
2.2P_0402_50V8C
VGA_CRT_G
2
1
150_0402_1%
14
2
1
150_0402_1%
VGA_CRT_R
2
1
150_0402_1%
14
DAN217_SC59
@
+5VS
+CRT_VCC_R
F1
D6
1
1
RB491D_SOT23-3
+CRT_VCC
30mil
2
1.1A_6V_MINISMDC110F-2
C237
@ 0.1U_0402_16V4Z
If=1A
2
+CRT_VCC
D_CRT_HSYNC
1
L6
2
10_0402_5%
HSYNC
D_CRT_VSYNC
1
L7
2
10_0402_5%
VSYNC
+CRT_VCC
1
C245
@
5
1
P
OE#
1
C246
@
HSYNC
CRT_B_L
+CRT_VCC
VSYNC
CRT_DDC_CLK
CRT_DDC_DAT
CRT_G_L
10P_0402_50V8J
U6
SN74AHCT1G125GW_SOT353-5
14,21 VGA_CRT_VSYNC
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
CRT_R_L
JCRT
1
10K_0402_5%
10P_0402_50V8J
14,21 VGA_CRT_HSYNC
2
R141
5
1
2
0.1U_0402_16V4Z
P
OE#
1
C244
U7
SN74AHCT1G125GW_SOT353-5
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
G
G
16
17
ALLTO_C10532-11505-L_15P-T
@
1
1
Q2B
14 VGA_CRT_CLK
1
C247
33P_0402_50V8K
2
@
14 VGA_CRT_DATA
+CRT_VCC
R146
4.7K_0402_5%
R147
4.7K_0402_5%
Q2A
R142
0_0402_5%
R144
0_0402_5%
+3VS
CRT_DDC_DAT
2N7002DW-T/R7_SOT363-6
CRT_DDC_CLK
2N7002DW-T/R7_SOT363-6
C249
C248
470P_0402_50V8J
33P_0402_50V8K
@
2 @
C250
470P_0402_50V8J
2 @
Compal Secret Data
2009/01/23
Issued Date
Deciphered Date
2010/01/23
A
Title

Size
Document Number
Rev
D
401717
Date:
Sheet
E
23
of
58
+5VS
D
HDMI_HPD
C259
HDMI@
0.1U_0402_16V4Z
VGA_HDMI_HPD 14,30
C265
0.1U_0402_16V4Z
HDMI@
5
P
A
R186
100K_0402_5%
HDMI@
+3VS
HDMI@
R177
100K_0402_5%
74AHCT1G125GW_SOT353-5
2
+HDMI_5V_OUT
2
1
R172 HDMI@
2.2K_0402_5%
U9
PMEG2010AEH_SOD123 HDMI@
F2 HDMI@
2
1
2
1
D53
1.1A_6V_MINISMDC110F-2
1
+5VS
OE#
C264
HDMI@
0.1U_0402_16V4Z
VGA_DVI_TXC-
2 R157
0_0402_5%
+HDMI_5V_OUT
HDMI_R_CK-
2
2
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
HDMI@
HDMI@
HDMI@
HDMI@
VGA_DVI_TXC+
VGA_DVI_TXD0+
VGA_DVI_TXD1+
VGA_DVI_TXD2+
VGA_HDMI_CLK+
VGA_HDMI_TX0+
VGA_HDMI_TX1+
VGA_HDMI_TX2+
2
G
HDMI_R_D0+
HDMI_SDATA
HDMI@ OCE2012120YZF_0805
1
2 R180
@ 0_0402_5%
VGA_HDMI_CLK 14
Q18
BSH111_SOT23-3
HDMI@
1
2 R182
0_0402_5%
Q19
BSH111_SOT23-3
HDMI@
3
VGA_HDMI_DATA 14
HDMI_R_D0-
HDMI_R_D1-
L10
1
4
VGA_DVI_TXD1+
1
4
1
2 R183
@ 0_0402_5%
VGA_DVI_TXD2+
2 R187
0_0402_5%
+5VS
@ 1
2
100K_0402_5% R207
VGA_DVI_TXD2-
1
4
JHDMI
HDMI_R_D1+
HDMI_HPD
+HDMI_5V_OUT
HDMI_SDATA
HDMI_SCLK
HDMI_R_D2+
HDMI_R_CK-
HDMI_R_CK+
HDMI_R_D0-
1
2 R188
@ 0_0402_5%
HDMI Connector
L11
Q24
2N7002_SOT23-3
HDMI@
2 R175
0_0402_5%
VGA_DVI_TXD1-
L9
VGA_DVI_TXD0-
2 HDMI@ 1 HDMI_R_CK+
499_0402_1% R195
2 HDMI@ 1 HDMI_R_CK499_0402_1% R197
2 HDMI@ 1 HDMI_R_D1499_0402_1% R198
2 HDMI@ 1 HDMI_R_D1+
499_0402_1% R202
499_0402_1% R201
2 HDMI@ 1 HDMI_R_D0499_0402_1% R203
2 HDMI@ 1 HDMI_R_D2499_0402_1% R205
499_0402_1% R206
HDMI_SCLK
VGA_DVI_TXD0+
14
14
14
14
HDMI_R_CK+
1
1
1
1
1
2 R173
@ 0_0402_5%
R184
2.2K_0402_5%
HDMI@
CV296
CV294
CV299
CV295
VGA_DVI_TXC+
R185
2.2K_0402_5%
HDMI@
VGA_DVI_TXCVGA_DVI_TXD0VGA_DVI_TXD1VGA_DVI_TXD2-
HDMI@
HDMI@
HDMI@
HDMI@
+3VS
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
2
2
2
2
1
2
R155 0_0402_5%
HDMI@
1
1
1
1
CV293
CV297
CV298
CV300
VGA_HDMI_CLKVGA_HDMI_TX0VGA_HDMI_TX1VGA_HDMI_TX2-
14
14
14
14
L8
HDMI_R_D0+
HDMI_R_D1-
HDMI_R_D2-
HDMI_R_D1+
HDMI_R_D2HDMI_R_D2+
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKGND
CK_shield GND
CK+
GND
D0GND
D0_shield
D0+
D1D1_shield
D1+
D2D2_shield
D2+
20
21
22
23
@ TYCO_1939864-1_19P
Compal Secret Data
2009/01/23
Issued Date
Deciphered Date
2010/01/23
5
Title

Size
Document Number
Rev
D
401717
Date:
Sheet
1
24
of
58
NC
OSC
NC
OSC
32.768KHZ_12.5PF_Q13MC14610002
2
C290
B13
D13
RTCX1
RTCX2
PCH_RTCRST#
C14
RTCRST#
PCH_SRTCRST#
D17
SRTCRST#
SM_INTRUDER#
2
1M_0402_5%
PCH_INTVRMEN
2
330K_0402_5%
A16
INTRUDER#
1
15P_0402_50V8J
+RTCVCC
Integrated SUS 1.05V VRM Enable
1
R285
1
R275
High - Enable Internal VRs

PCH_INTVRMEN (must be always pulled high)
A14
INTVRMEN
AZ_BITCLK
A30
HDA_BCLK
HDA_SYNC
AZ_SYNC
D29
HDA_SYNC
This signal has a weak internal pull down.

H=>On Die PLL is supplied by 1.5V
Die PLL is supplied by 1.8V
PCH_SPKR
28,38 PCH_SPKR
*L=>On
P1
AZ_RST#
HDA_SDO
This signal has a weak internal pull down.
This signal can't PU
Low = Enabled
High = Disabled
HDA_RST#
38 AZ_SDIN0_HD
G30
HDA_SDIN0
35 AZ_SDIN1_MD
F30
HDA_SDIN1
E32
HDA_SDIN2
F32
HDA_SDIN3
B29
HDA_SDO
HDA_DOCK_EN#
H32
HDA_DOCK_EN# / GPIO33
J30
HDA_DOCK_RST# / GPIO13
AZ_SDOUT
35 AZ_RST_MD#
38 AZ_RST_HD#
R291 1 MDC@ 2 33_0402_5%

R292 1
2 33_0402_5%
AZ_RST#
35 AZ_SDOUT_MD
38 AZ_SDOUT_HD
R293 1 MDC@ 2 33_0402_5%

R294 1
2 33_0402_5%
AZ_SDOUT
Internal: Pull down 20k
2
R273
JTAG_TMS
PCH_JTAG_TDI
K1
JTAG_TDI
PCH_JTAG_TDO
J2
JTAG_TDO
PCH_JTAG_RST#
J4
TRST#
PCH_SPI_CLK
BA2
SPI_CLK
PCH_SPI_CS0#
AV3
SPI_CS0#
AY3
SPI_CS1#
1PCH_SPI_MOSI
1K_0402_5%
PCH_SPI_MISO
FWH4 / LFRAME#
C34
LPC_FRAME# 41,42
LDRQ0#
LDRQ1# / GPIO23
A34
F34
SERIRQ
AB9
AY1
SPI_MOSI
AV1
SPI_MISO
1
R286
2
10K_0402_5%
SERIRQ
41,42
41,42
41,42
41,42
+3VS
SERIRQ
41,42
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
AK7
AK6
AK11
AK9
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
AH6
AH5
AH9
AH8
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
AF11
AF9
AF7
AF6
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
AH3
AH1
AF3
AF1
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
AD9
AD8
AD6
AD5
SATA_PRX_C_DTX_N4 34
SATA_PRX_C_DTX_P4 34
SATA_PTX_DRX_N4 34
SATA_PTX_DRX_P4 34
SATA ODD
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
AD3
AD1
AB3
AB1
SATA_PTX_DRX_N5 34
SATA_PTX_DRX_P5 34
eSATA
SATAICOMPO
AF16
SATAICOMPI
AF15
SATA_PTX_DRX_N1 34
SATA_PTX_DRX_P1 34
1ST HDD
Desktop Only
C
+3VS
SATAICOMP
1
R295
SATALED#
T3
SATA_LED#
SATA0GP / GPIO21
Y9
SPK_SEL
SATA1GP / GPIO19
V1
PCH_GPIO19
2
37.4_0402_1%
+1.05VS
PCH_GPIO19
R306 1
2 10K_0402_5%
SATA_LED#
R301 2
1 10K_0402_5%
SPK_SEL
R303 1
2 10K_0402_5%
SATA_LED# 43
SPK_SEL 38
IBEXPEAK-M QV20 A0_FCBGA1071

HM55R3@
+3VS
@
R643
20K_0402_5%
4MB
+RTCBATT
PCH_JTAG_TDI
+3VALW
@
R536
200_0402_5%
PCH_JTAG_TDO
@
R364
10K_0402_5%
C293
0.1U_0402_16V4Z
U13
VCC
HOLD
VSS
for EMI request
PCH_SPI_CS0#
PCH_SPI_CLK
PCH_SPI_MOSI
D13
BAS40-04_SOT23-3
PCH_SPI_CLK
+RTCVCC
@
R537
100_0402_5%
PCH_JTAG_RST#
@
R535
100_0402_5%
JTAG_TCK
K3
PCH_JTAG_TCK
2
51_0402_5%
1
R156
@
R363
200_0402_5%
@
R355
100_0402_5%
+3VALW
PCH_JTAG_TMS
+3VALW
@
R386
200_0402_5%
+3VALW
M3
PCH_JTAG_TMS
+3VS
High = Enabled
Low = Disabled (Default)
SPI_MOSI
AZ_SYNC
PCH_JTAG_TCK
SPI
35 AZ_SYNC_MD
38 AZ_SYNC_HD
R289 1 MDC@ 2 33_0402_5%

R290 1
2 33_0402_5%
ITPM Enabled
B
AZ_BITCLK
R118
1K_0402_5%
@
R287 1 MDC@ 2 33_0402_5%

R288 1
2 33_0402_5%
35 AZ_BITCLK_MD
38 AZ_BITCLK_HD
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
JTAG
41 PWRME_CTRL
D33
B33
C32
A32
SPKR
C30
Flash Descriptor Security Overide

C
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
2
1U_0402_6.3V4Z
U11A
PCH_RTCX1
PCH_RTCX2
R385
10_0402_5%
PCH_SPI_MISO
1
2PCH_SRTCRST# 1
R284 20K_0402_1%
1
C289
+CHGRTC
1
2
J2
LPC
iME Setting.
Y3
2
1U_0402_6.3V4Z
SATA
1
C288
RTC
IHDA
1
2PCH_RTCRST#
R282 20K_0402_1%
R283
10M_0402_5%
2
1
CMOS Setting, near DDR Door

JCMOS
+RTCVCC
C287
15P_0402_50V8J
2
1
C86
33P_0402_50V8J
MX25L3205DM2I-12G SO8
C291
0.1U_0402_16V4Z
2
A
06/01 change R156 from 4.7K to 51 ohm

PCH Pin
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TCK
PCH_JTAG_RST#
PCH JTAG Enable

ES1
ES2
No Install
200ohm
No Install
100ohm
200ohm
200ohm
100ohm
100ohm
200ohm
200ohm
100ohm
100ohm
51ohm
51ohm
20Kohm
20Kohm
10Kohm
10Kohm
RefDes
R358
R535
R355
R354
R536
R537
R156
R643
R353
5
PCH JTAG Disable (Default)

ES1
ES2
No Install
No Install
No Install
No Install
No Install
No Install
No Install
No Install
No Install
20Kohm
10Kohm
No Install
51ohm
51ohm
No Install
No Install
No Install
No Install
Compal Secret Data
2009/01/23
Issued Date
Deciphered Date
2010/01/23
4
Title

Size
B
Date:
Document Number
Rev
D
401717
Sheet
1
25
of
58
2 R229
2 R230
+3VALW
+3VS
1 2.2K_0402_5%
1 2.2K_0402_5%
Q3B
PCH_SMBDATA
R231
R232
Q3A
PCH_SMBCLK
4.7K_0402_5%
4.7K_0402_5%
2N7002DW-T/R7_SOT363-6
PM_SMBCLK 11,12,22,36
2N7002DW-T/R7_SOT363-6
U11B
AU30
AT30
PCIE_PTX_LANRX_N3 AU32
PCIE_PTX_LANRX_P3 AV32
PERN3
PERP3
PETN3
PETP3
NC
NewCard
36
36
CLK_NEW#
CLK_NEW
36 CLKREQ_NEW#
+3VS
1
10K_0402_5%
2
R246
CLKREQ_LAN#
1
10K_0402_5%
2
R248
CLKREQ_WLAN#
WLAN
CLK_WLAN#
CLK_WLAN
R46
1
1
R47
36 CLKREQ_WLAN#
LAN
37
37
CLK_LAN#
CLK_LAN
R48
1
1
R49
37 CLKREQ_LAN#
+3VALW
2
R244
CLKREQ_NEW#
1
10K_0402_5%
2
R245
PCH_GPIO25
1
10K_0402_5%
2
R249
PCH_GPIO26
1
10K_0402_5%
2
R250
PCH_GPIO44
1
10K_0402_5%
2
R251
PCH_GPIO56
1
10K_0402_5%
36
36
NEW@
R44
0_0402_5%
CLK_NEW#_R
1
2
CLK_NEW_R
1
2
R45
0_0402_5%
CLKREQ_NEW#
NEW@
BA32
BB32
BD32
BE32
PERN4
PERP4
PETN4
PETP4
BF33
BH33
BG32
BJ32
PERN5
PERP5
PETN5
PETP5
BA34
AW34
BC34
BD34
PERN6
PERP6
PETN6
PETP6
AT34
AU34
AU36
AV36
PERN7
PERP7
PETN7
PETP7
BG34
BJ34
BG36
BJ36
PERN8
PERP8
PETN8
PETP8
AK48
AK47
CLKOUT_PCIE0N
CLKOUT_PCIE0P
P9
CLKOUT_PCIE1N
CLKOUT_PCIE1P
0_0402_5%
CLK_LAN#_R
2
CLK_LAN_R
2
0_0402_5%
CLKREQ_LAN#
CLKOUT_PCIE2N
CLKOUT_PCIE2P
AM47
AM48
N4
AH42
AH41
PCH_GPIO25
A8
AM51
AM53
PCH_GPIO26
M9
AJ50
AJ52
PCH_GPIO44
H6
AK53
AK51
PCH_GPIO56
P13
PCIECLKRQ1# / GPIO18
PCH_SMBDATA
SML0CLK
C6
PCH_SMLCLK0
SML0DATA
G8
PCH_SMLDATA0
SML1ALERT# / GPIO74
M14
PCH_GPIO74
SML1CLK / GPIO58
E10
PCH_SMLCLK1
SML1DATA / GPIO75
G12
PCH_SMLDATA1
CL_CLK1
T13
CL_DATA1
T11
CL_RST1#
T9
PEG_A_CLKRQ# / GPIO47
H1
@
1
2
R260
10K_0402_5%
CLKREQ_PEG#
1
R243
AT1
AT3
CLKOUT_PCIE4N
CLKOUT_PCIE4P
AW24
BA24
PCH_CLK_DMI# 22
PCH_CLK_DMI 22
CLKIN_BCLK_N
CLKIN_BCLK_P
AP3
AP1
CLK_BCLK# 22
CLK_BCLK 22
CLKIN_DOT_96N
CLKIN_DOT_96P
F18
E18
CLK_DOT# 22
CLK_DOT 22
AH13
AH12
CLK_SATA# 22
CLK_SATA 22
P41
CLK_14M_PCH 22
AH51
AH53
XCLK_RCOMP
AF38
CLKOUTFLEX0 / GPIO64
T45
P43
T42
N50
EC_SMB_CK2 21,41
+3VALW
4.7K_0402_5%
4.7K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
2
2
2
2
2
1
1
1
1
1
R237
R238
R239
R240
R241
C
VGA
FROM CLK GEN FOR: 133/100/96/14.318 MHZ
@ R247
2
PCH_X1
J42
XTAL25_IN
XTAL25_OUT
2
10K_0402_5%
CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P
CLKIN_PCILOOPBACK
EC_SMB_DA2 21,41
+3VALW
CLK_PEG# 5
CLK_PEG 5
REFCLK14IN
4
2N7002DW-T/R7_SOT363-6
PCH_SMLCLK0
PCH_SMLDATA0
PCH_GPIO60
PCH_GPIO74
EC_LID_OUT#
AN4
AN2
CLKOUT_PCIE5N
CLKOUT_PCIE5P
R235 @ 4.7K_0402_5%
R236 @ 4.7K_0402_5%
2N7002DW-T/R7_SOT363-6
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P
Q4B
PCH_SMLDATA1
CLK_PCIE_VGA# 13
CLK_PCIE_VGA 13
CLKIN_DMI_N
CLKIN_DMI_P
+3VS
1 2.2K_0402_5%
1 2.2K_0402_5%
PCH_SMLCLK1
@
1
C277
CLK_PCILOOP 29
PCH_X1
PCH_X2
1M_0402_5%
1
Y2 @
1
PCH_X2
25MHz_20pF_6X250000171 @
C278
27P_0402_50V8J
2
XCLK_RCOMP 1
2
R252 90.9_0402_1%
27P_0402_50V8J
+1.05VS
C277
0_0402_5%
Note: Stuff 0 ohm if

25MHz crystal un-stuff

HM55R3@
2 R233
2 R234
+3VALW
AD43
AD45
PEG_B_CLKRQ# / GPIO56
C8
EC_LID_OUT# 41
Q4A
CLKOUT_PCIE3N
CLKOUT_PCIE3P
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
PCH_SMBCLK
PCH_GPIO60
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
H14
J14
SML0ALERT# / GPIO60
0_0402_5%
CLK_WLAN#_R AM43
2
CLK_WLAN_R
2
AM45
0_0402_5%
CLKREQ_WLAN#
U4
EC_LID_OUT#
1 0.1U_0402_16V7K
1 0.1U_0402_16V7K
SMBDATA
B9
C276 2
C273 2
PERN2
PERP2
PETN2
PETP2
SMBCLK
SMBus
1 0.1U_0402_16V7K WLAN@
1 0.1U_0402_16V7K WLAN@
AW30
BA30
PCIE_PTX_WLANRX_N2 BC30
PCIE_PTX_WLANRX_P2 BD30
SMBALERT# / GPIO11
Link
PCIE_PRX_C_LANTX_N3
PCIE_PRX_C_LANTX_P3
PCIE_PTX_C_LANRX_N3
PCIE_PTX_C_LANRX_P3
C274 2
C275 2
PERN1
PERP1
PETN1
PETP1
PCIE_PTX_NEWRX_N1
PCIE_PTX_NEWRX_P1
Controller
37
37
37
37
1 0.1U_0402_16V7K NEW@
1 0.1U_0402_16V7K NEW@
PEG
For LAN
PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
PCIE_PTX_C_WLANRX_N2
PCIE_PTX_C_WLANRX_P2
C269 2
C270 2
PCI-E*
36
36
36
36
For WLAN
PCIE_PRX_NEWTX_N1
PCIE_PRX_NEWTX_P1
PCIE_PTX_C_NEWRX_N1
PCIE_PTX_C_NEWRX_P1
From CLK BUFFER
36
36
36
36
For NewCard
BG30
BJ30
BF29
BH29
Clock Flex
CLK_14M_PCH
@
1
2
R70
100_0402_5%
C206 100P_0402_50V8J
Compal Secret Data
2009/01/23
Issued Date
Deciphered Date
2010/01/23
5
Title

Size
B
Date:
Document Number
Rev
D
401717
Sheet
1
26
of
58
PCH_SUSPWRDN
2
10K_0402_5%
PCH_LOW_BAT#
2
10K_0402_5%
IBEX_RI#
2
10K_0402_5%
2
R329
2
R322
2
R323
PM_PWROK
1
10K_0402_5%
PWROK
1
10K_0402_5%
LAN_RST#
1
10K_0402_5%
BC24
BJ22
AW20
BJ20
DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN
6
6
6
6
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
BD24
BG22
BA20
BG20
DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP
6
6
6
6
DMI_PTX_CRX_N0
DMI_PTX_CRX_N1
DMI_PTX_CRX_N2
DMI_PTX_CRX_N3
BE22
BF21
BD20
BE18
DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
6
6
6
6
DMI_PTX_CRX_P0
DMI_PTX_CRX_P1
DMI_PTX_CRX_P2
DMI_PTX_CRX_P3
BD22
BH21
BC20
BD18
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP
1
R311
+1.05VS
5 XDP_DBRESET#
41,53
T6
VGATE
M6
IN1
PWROK
B17
1
R321
LAN_RST#
2
0_0402_5%
K5
A10
D9
5 DRAMPWROK
PCH_RSMRST#
PWROK
C16
MEPWROK
LAN_RST#
DRAMPWROK
RSMRST#
41 PCH_SUSPWRDN
PCH_SUSPWRDN
@
1
2
R330
0_0402_5%
5 PM_PBTN_OUT#
1
R324
2
330K_0402_5%
D26
41,43,45
ACIN
SUS_PWR_DN_ACK / GPIO30
P5
PWRBTN#
P7
ACPRESENT / GPIO31
PCH_LOW_BAT#
A6
BATLOW# / GPIO72
CH751H-40PT_SOD323-2
IBEX_RI#
FDI_INT
BJ14
FDI_FSYNC0
BF13
FDI_FSYNC1
BH13
FDI_LSYNC0
BJ12
FDI_LSYNC1
BG14
1
R689
1
R690
2
1K_0402_5%
2
1K_0402_5%
F14
EC_SWI#
CLKRUN# / GPIO32
Y1
PM_CLKRUN#
SUS_STAT# / GPIO61
P8
SUS_STAT#
PADT38
PADT38
SUSCLK / GPIO62
F3
SUS_CLK
PADT39
PADT39
SLP_S5# / GPIO63
E4
PM_SLP_S5# 41
SLP_S4#
H7
PM_SLP_S4# 41
SLP_S3#
P12
PM_SLP_S3# 41
SLP_M#
K8
TP23
N2
EC_SWI#
EC_SWI# 36,37
2
R319
1
8.2K_0402_5%
2
R313
1
10K_0402_5%
+3VALW
+3VS
PMSYNCH
RI#
SLP_LAN# / GPIO29
BJ10
PMSYNCH 5
F6

HM55R3@
+3VALW
1
R691
M1
PCH_ACIN
PBTN_OUT#
+3VALW
BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12
WAKE#
SYS_PWROK
IN2
41
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
J12
SYS_RESET#
U12
XDP_DBRESET#
DMI_IRCOMP
VGATE
0.1U_0402_16V4Z
1
2
C230
DMI_ZCOMP
BF25
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12
1
R256
+3VS
PM_PWROK
BH25
Close to PCH
2
0_0402_5%
41
DMI_COMP
2
49.9_0402_1%
System Power Management
1
R316
1
R318
1
R320
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
FDI
+3VALW
6
6
6
6
DMI
U11C
2
1K_0402_5%
0_0402_5%
@1
2 R325
C
Q26 1
3
E
41 EC_RSMRST#
MMBT3906_SOT23-3
1
2
R328
2.2K_0402_5%
Compal Secret Data
RSMRST# circuit
D15B
BAV99DW-7_SOT363
2
1
R327
4.7K_0402_5%
D15A
BAV99DW-7_SOT363
+3VALW
A
PCH_RSMRST#
1
R326
10K_0402_5%
2009/01/23
Issued Date
Deciphered Date
2010/01/23
5
Title

Size
B
Date:
Document Number
Rev
D
401717
Sheet
1
27
of
58
U11D
2 R266
1CRT_IREF
1K_0402_1%
L_BKLTCTL
AB48
Y45
L_DDC_CLK
L_DDC_DATA
AB46
V48
L_CTRL_CLK
L_CTRL_DATA
AP39
AP41
LVD_IBG
LVD_VBG
AT43
AT42
LVD_VREFH
LVD_VREFL
AV53
AV51
LVDSA_CLK#
LVDSA_CLK
BB47
BA52
AY48
AV47
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
BB48
BA50
AY49
AV48
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
AP48
AP47
LVDSB_CLK#
LVDSB_CLK
AY53
AT49
AU52
AT53
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
AY51
AT48
AU50
AT51
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
AA52
AB53
AD53
CRT_BLUE
CRT_GREEN
CRT_RED
LVDS
CRT_DDC_CLK
CRT_DDC_DATA
Y53
Y51
CRT_HSYNC
CRT_VSYNC
PCH Strap Pin
BJ46
BG46
SDVO_STALLN
SDVO_STALLP
BJ48
BG48
SDVO_INTN
SDVO_INTP
BF45
BH45
DAC_IREF
CRT_IRTN
T51
T53
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
BG44
BJ44
AU38
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38
DDPC_CTRLCLK
DDPC_CTRLDATA
Y49
AB49
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
BE44
BD44
AV40
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36
DDPD_CTRLCLK
DDPD_CTRLDATA
V51
V53
AD48
AB51
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_CTRLCLK
SDVO_CTRLDATA
Digital Display Interface
L_BKLTEN
L_VDD_EN
U50
U52
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
BC46
BD46
AT38
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36
CRT
T48
T47
Y48

HM55R3@

During Reset: Low
Initial: Low
+3VS

During Reset: HZ
Initial: Low
Check list: 10k PU

@
PCH_SPKR
1
2
R269
1K_0402_5%
1 R270
1K_0402_5% 2
1 R271
Check list: 4.7k PD
2
R272
1
1K_0402_5%
PCH_SPKR
Check list: 8.2k PU
Low= Disable
High= Enable
PCH_SPKR 25,38
Internal: Pull up 20k

During Reset: High
Initial: High
1K_0402_5% 2
+1.8VS_PCH_NAND
NO REBOOT Strap
PCI_GNT#0
PCI_GNT#1
PCI_GNT#0 29
PCI_GNT#1 29

During Reset: High
Initial: High
PCI_GNT#3
PCI_GNT#3 29

During Reset: High
Initial: High
Boot BIOS Strap

PCI_GNT#1 PCI_GNT#0
0
1
0
1
0
0
1
1
Danbury Technology Enabled

NV_ALE
2
R267
1
1K_0402_5%
NV_ALE
NV_ALE 29
2
R268
NV_CLE
1
1K_0402_5%
NV_CLE 29
Boot BIOS Loaction
DMI Termination Voltage

During Reset: Low
Initial: Low
LPC (Default)
Reserved (NAND)
PCI
SPI
High = Enabled
Low = Disabled (Default)
NV_CLE
Low= Set to Vss (Default)

High= Set to Vcc
A16 Swap Override Strap

PCI_GNT#3
Low= A16 swap override Enable

High= A16 swap override Disable
Compal Secret Data
2009/01/23
Issued Date
Deciphered Date
2010/01/23
5
Title

Custom
Rev
D
401717
Date:
Sheet
1
28
of
58
U11E
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
J50
G42
H47
G34
C/BE0#
C/BE1#
C/BE2#
C/BE3#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
G38
H51
B37
A44
PIRQA#
PIRQB#
PIRQC#
PIRQD#
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
F51
A46
B45
M53
REQ0#
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54
F48
K45
F36
H53
GNT0#
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55
B41
K53
A36
A48
PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5
8.2K_0804_8P4R_5%
RP3
1
2
3
4
PCI_STOP#
PCI_PIRQE#
PCI_PIRQC#
PCI_PIRQG#
8
7
6
5
8.2K_0804_8P4R_5%
GNT2#: Not pull low, internal pull up 20K
28
28
PCI_GNT#0
PCI_GNT#1
28
PCI_GNT#3
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
+3VS
RP4
1
2
3
4
8
7
6
5
TP_PCI_RST#
T37 PAD
PCI_REQ#3
PCI_PIRQF#
PCI_PIRQB#
PCI_REQ#0
8.2K_0804_8P4R_5%
+3VS
8
7
6
5
8.2K_0804_8P4R_5%
PCI_DEVSEL#
PCI_PERR#
PCI_SERR#
PCI_PLOCK#
5,13,36,37,41,42
42 CLK_PCI_DDR
41 CLK_PCI_EC
26 CLK_PCILOOP
PCIRST#
E44
E50
SERR#
PERR#
PCI_IRDY#
PCI_DEVSEL#
PCI_FRAME#
A42
H44
F46
C46
IRDY#
PAR
DEVSEL#
FRAME#
PCI_PLOCK#
D49
PLOCK#
PCI_STOP#
PCI_TRDY#
PLT_RST#
2
1 CLK_SIO
22_0402_5%
R280
2
1 CLK_EC
22_0402_5%
R281
2
1 CLK_PCH
22_0402_5% R279
D41
C48
STOP#
TRDY#
M7
PME#
D5
PLTRST#
N52
P53
P46
P51
P48
BD3
AY6
NV_ALE
NV_CLE
@
1
R253
NV_ALE 28
NV_CLE 28
2
0_0402_5%
+3VS
PCI_SERR#
PCI_PERR#
RP5
1
2
3
4
K6
NV_ALE
NV_CLE
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4
AU2
NV_RB#
AV7
NV_WR#0_RE#
NV_WR#1_RE#
AY8
AY5
NV_WE#_CK0
NV_WE#_CK1
AV11
BF5
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24
USBRBIAS#
B25
USBRBIAS
D25
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
N16
J16
F16
L16
E14
G16
F12
T15
@
1
2
R276
32.4_0402_1%
U8
NV_RCOMP
5 BUF_PLT_RST#
IN1
IN2
USB20_N0
USB20_P0
USB20_N1
USB20_P1
2
R278
USB-RIGHT1
eSATA-USB
USB20_N5 35
USB20_P5 35
BT
USB20_N8 36
USB20_P8 36
NewCard
1
22.6_0402_1%
USB_OC#0
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
EXP_CPPE#
R129
100K_0402_5%
@
USB-RIGHT2
USB20_N3 34
USB20_P3 34
USB20_N10
USB20_P10
USB20_N11
USB20_P11
USB20_N12
USB20_P12
USB20_N13
USB20_P13
USBBIAS
34
34
34
34
PLT_RST#
PCI_PIRQH#
PCI_TRDY#
PCI_FRAME#
PCI_PIRQA#
8
7
6
5
AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6
RP2
1
2
3
4
NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15
8.2K_0804_8P4R_5%
NV_DQS0
NV_DQS1
AV9
BG8
PCI_REQ#1
PCI_REQ#2
PCI_PIRQD#
PCI_IRDY#
8
7
6
5
AY9
BD1
AP15
BD8
RP1
1
2
3
4
NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3
USB
+3VS
PCI
NVRAM
H40
N34
C44
A38
C36
J34
A40
D45
E36
H48
E40
C40
M48
M45
F53
M40
M43
J36
K48
F40
C42
K46
M51
J52
K51
L34
F42
J40
G46
F44
M47
H36
40
40
22
22
36
36
36
36
Card reader(3 in 1)
Int. Camera
3G
WiMax(WLAN)
+3VALW
USB_OC#5
2
10K_0402_5%
USB_OC#6
2
10K_0402_5%
Within 500 mils
USB_OC#0 34,41
1
RN1
1
RN2
RP6
USB_OC#0
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#3 34,41
EXP_CPPE# 36
4
3
2
1
5
6
7
8
10K_0804_8P4R_5%

HM55R3@
Change to 47 ohm?
A
Compal Secret Data
2009/01/23
Issued Date
Deciphered Date
2010/01/23
5
Title

Size
B
Date:
Document Number
Rev
D
401717
Sheet
1
29
of
58
U11F
Not pull down
TACH1 / GPIO1
PCH_GPIO6
D37
TACH2 / GPIO6
CLKOUT_PCIE6N
CLKOUT_PCIE6P
AH45
AH46
AF48
AF47
CLKOUT_PCIE7N
CLKOUT_PCIE7P
GPIO15
a Strong pull up may be needed
for GPIO Functionality
PCH_GPIO12
K9
LAN_PHY_PWR_CTRL / GPIO12
A20GATE
PCH_GPIO15
T7
GPIO15

During Reset: Low
Initial: Low
PCH_GPIO16
AA2
SATA4GP / GPIO16
CLKOUT_BCLK0_N / CLKOUT_PCIE8N
AM3
PCH_GPIO17
F38
TACH0 / GPIO17
CLKOUT_BCLK0_P / CLKOUT_PCIE8P
AM1
EC_SCI#
EC_SCI#
J32
TACH3 / GPIO7
41
EC_SMI#
EC_SMI#
F10
GPIO8
35
35
PCH_GPIO27
1
1K_0402_5%
PCH_GPIO28
BT_PWR#
H10
GPIO24
AB12
GPIO27
V13
GPIO28
M11
STP_PCI# / GPIO34
V6
BT_RST#
1
2 PCH_GPIO1
10K_0402_5% R214
BT_DET#
1
2
8.2K_0402_5% R215
1
2 PCH_GPIO36
10K_0402_5% R217
1
2 PCH_GPIO6
10K_0402_5% R218
1
2 PCH_GPIO17
10K_0402_5% R220
1
2 PCH_GPIO16
10K_0402_5% R221
1
2 PCH_GPIO37
10K_0402_5% R254
1
2 PCH_GPIO38
10K_0402_5% R255
1
2 THM_ALT#
10K_0402_5% R259
PCH_GPIO48
1
2
10K_0402_5% R257
1
2 PCH_GPIO39
10K_0402_5% R216
EC_SCI#
1
2
10K_0402_5% R224
22
LVDS_SEL
5,11
RST_GATE
41
THM_ALT#
RCIN#
PROCPWRGD
BE10
THRMTRIP#
BD10
TP1
BA22
SATA3GP / GPIO37
TP2
AW22
V3
SLOAD / GPIO38
TP3
BB22
P3
SDATAOUT0 / GPIO39
TP4
AY45
LVDS_SEL
H3
TP5
AY46
RST_GATE
F1
TP6
AV43
SATA2GP / GPIO36
AB6
SDATAOUT1 / GPIO48
TP7
AV45
THM_ALT#
AA4
SATA5GP / GPIO49
TP8
AF13
GPIO57
TP9
M18
TP10
N18
TP11
AJ24
TP12
AK41
TP13
AK42
TP14
M32
TP15
N32
TP16
M30
TP17
N30
TP18
H12
12/22: Modify for M96 and M96 Pro select
+3VS
CLK_CPU_BCLK# 5
CLK_CPU_BCLK 5
1
R117
2
0_0402_5%
TP19
AA23
NC_1
AB45
NC_2
AB38
NC_3
AB42
NC_4
AB41
NC_5
T39
INIT3_3V#
TP24

HM55R3@
PECI
KB_RST# 41
H_PWRGOOD 5
THRMTRIP_PCH#
1
R212
2
56_0402_1%
H_THERMTRIP# 5
1
R210
2
+VTT
56_0402_1%
C
PCH_GPIO48
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
1
10K_0402_5%
GATEA20 41
SATACLKREQ# / GPIO35
PCH_GPIO39
+3VALW
GATEA20
KB_RST#
PCH_GPIO38
A4
A49
A5
A50
A52
A53
B2
B4
B52
B53
BE1
BE53
BF1
BF53
BH1
BH2
BH52
BH53
BJ1
BJ2
BJ4
BJ49
BJ5
BJ50
BJ52
BJ53
D1
D2
D53
E1
E53
@
2
R209
R208
10K_0402_5%
T1
AB13
F8
KB_RST#
PCH_PECI
PCH_GPIO37
PCH_GPIO57
+3VS
BG10
AB7
EC_SMI#
1
2
R225
10K_0402_5%
1
2 PCH_GPIO57
R226
10K_0402_5%
1
2 PCH_GPIO15
R227
1K_0402_5%
1
2 PCH_GPIO28
R242
10K_0402_5%
1
2 LVDS_SEL
R222
10K_0402_5%
1
2 RST_GATE
M96PRO@ R223
10K_0402_5%
1
2 PCH_GPIO12
10K_0402_5% R219
PECI
U2
PCH_GPIO36
C
+3VS
SCLOCK / GPIO22
CPU
2
R274
Y7
RSVD
High = Enabled (Default)

Low = Disabled
BT_DET#
NCTF
On-Die PLL VR
BT_DET#
GPIO
41
35
PCH_GPIO27
C38
MISC

During Reset: High
Initial: High
BMBUSY# / GPIO0
PCH_GPIO1
14,24 VGA_HDMI_HPD
GPIO8
Y3
P6
C10
Not pull low

internal pull up
During Reset: High
Initial: High
@ 2 BT_RST#
1
10K_0402_5% R228
A
@
EC_SMI#
1
2
R258
1K_0402_5%
Compal Secret Data
2009/01/23
Issued Date
Deciphered Date
2010/01/23
5
Title

Size
B
Date:
Document Number
Rev
D
401717
Sheet
1
30
of
58
+1.05VS
C294
1U_0402_6.3V4Z
VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
BJ24
VCCAPLLEXP
VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]
VCCIO[50]
VCCIO[51]
VCCIO[52]
VCCIO[53]
VCCIO[54]
VCCIO[55]
AN35
VCC3_3[1]
+PCH_FDI_VRM
AT22
VCCVRM[1]
BJ18
VCCFDIPLL
+1.05VS
AM23
1
0.1U_0402_16V4Z
1
0_0402_5%
VSSA_DAC[2]
AF51
VCCIO[1]
C296
0.01U_0402_25V4Z
1
C297
0.1U_0402_16V4Z
1
BLM18PG181SN1D_0603
C298
10U_0805_10V4Z
3062mA
AH38
AH39
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
AP43
AP45
AT46
AT45
VCC3_3[2]
AB34
VCC3_3[3]
AB35
VCC3_3[4]
AD35
+3VS
2
0.1U_0402_16V4Z
C303
1
close to AB34
196mA VCCVRM[2]
AT24
VCCDMI[1]
AT16
VCCDMI[2]
AU16
61mA
37mA
+PCH_DMI_VRM
VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]
1
R333
+PCH_VRM
2
0_0402_5%
+1.5VS
+VTT
+PCH_VCCDMI
156mA
375mA
close to AE50
+PCH_VRM
FDI
2
R340
AF53
375mA
+PCH_VRM
VSSA_DAC[1]
+3VS_VCCADAC
VCCALVDS
HVCMOS
AN20
AN22
AN23
AN24
AN26
AN28
BJ26
BJ28
AT26
AT28
AU26
AU28
AV26
AV28
AW26
AW28
BA26
BA28
BB26
BB28
BC26
BC28
BD26
BD28
BE26
BE28
BG26
BG28
BH27
40mA
LVDS
VCCIO[24]
AN30
AN31
+3VS
2
C310
AK24
DMI
2
10U_0805_10V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
AE52
VSSA_LVDS
PCI E*
1
C304
1
C305
1
C306
1
C307
1
C308
VCCADAC[2]
> 1mA
NAND / SPI
+1.05VS
AE50
69mA
59mA
+3VS
VCCADAC[1]
1432mA
+1.05VS
L12
CRT
C295
10U_0805_10V4Z
POWER
U11G
AB24
AB26
AB28
AD26
AD28
AF26
AF28
AF30
AF31
AH26
AH28
AH30
AH31
AJ30
AJ31
VCC CORE
AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15
1
R335
@
2
1
R334
0_0402_5%
2
0_0603_5%
C309
1U_0402_6.3V4Z
2
R336
+1.8VS
1
0_0402_5%
close to AT16
+1.8VS_PCH_NAND
+1.8VS
1
R338
2
C311
0.1U_0402_16V4Z
1
close to Ak13
1
R339
2
0_0603_5%
+3VS
@
2
0_0603_5%
B
+3VS
85mA
VCCME3_3[1]
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]
AM8
AM9
AP11
AP9
2
C313
close to AM8

HM55R3@
0.1U_0402_16V4Z
Compal Secret Data
2009/01/23
Issued Date
Deciphered Date
2010/01/23
5
Title

Size
B
Date:
Document Number
Rev
D
401717
Sheet
1
31
of
58
POWER
1
C323
22U_0805_6.3V6M
+1.05VS
+1.05VS_PCHDPLL_A
R347
0_0603_5%
@
2
2
L18 1
2
10UH_LB2012T100MR_20%
C329
1U_0402_6.3V4Z
C332
1U_0402_6.3V4Z
AF43
VCCME[4]
AF41
VCCME[5]
+1.05VS
1
C334
1U_0402_6.3V4Z
163mA
1849mA
AF42
VCCME[6]
V39
VCCME[7]
V41
VCCME[8]
V42
VCCME[9]
Y39
VCCME[10]
Y41
VCCME[11]
Y42
VCCME[12]
V9
DCPRTC
196mA
VCCVRM[3]
68mA
BB51
BB53
VCCADPLLA[1]
VCCADPLLA[2]
69mA
+1.05VS_PCHDPLL_B
BD51
BD53
VCCADPLLB[1]
VCCADPLLB[2]
1U_0402_6.3V4Z
1
1
AH23
AJ35
AH35
VCCIO[21]
VCCIO[22]
VCCIO[23]
AF34
VCCIO[2]
C331 +
220U_B2_2.5VM_R15
VCCME[3]
AU24
+PCH_VRM
1
C324
1U_0402_6.3V4Z
+VCCRTCEXT
2
0.1U_0402_16V4Z
C328 +
220U_B2_2.5VM_R15
AD41
L17 1
2
10UH_LB2012T100MR_20%
VCCME[2]
1
C327
VCCME[1]
AD39
C335
2
C336
2
2
1U_0402_6.3V4Z
AH34
VCCIO[3]
AF32
VCCIO[4]
1
C338
+VCCSST
2
0.1U_0402_16V4Z
V12
DCPSST
1
C341
2 +V1.1A_INT_VCCSUS Y22
0.1U_0402_16V4Z
DCPSUS
VCCSUS3_3[28]
U23
VCCIO[56]
V23
+1.05VS
V5REF_SUS
F24
+PCH_VCC5REFSUS
> 1mA
> 1mA
375mA
V5REF
K49
VCC3_3[8]
J38
VCC3_3[9]
L38
VCC3_3[10]
M36
VCC3_3[11]
N36
VCC3_3[12]
P36
VCC3_3[13]
U35
VCC3_3[14]
AD13
3062mA
31mA
VCCSATAPLL[1]
VCCSATAPLL[2]
+3VALW
C321
0.1U_0402_16V4Z
C325
0.1U_0402_16V4Z
+3VALW +5VALW
D16
R344
100_0402_1%
+3VS
2
C326
1
0.1U_0402_16V4Z
D17
+PCH_VCC5REF
+PCH_VCC5REF
R346
C
100_0402_1%
+3VS
+5VS
1
C447
22U_0805_6.3V6M
AD38
1U_0402_6.3V4Z
Near V39
1
DCPSUSBYP
1
C318
1U_0402_6.3V4Z
320mA
VCCLAN[2]
Y20
V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26
C316
If two VccME rails can be

combined, only total 2 x 22 F and
2 x 1 F caps are necessary
1
C322
22U_0805_6.3V6M
AF24
VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]
1
C391
22U_0805_6.3V6M
VCCLAN[1]
VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]
3062mA
+1.05VS
AF23
52mA
+1.05VS
V24
V26
Y24
Y26
Near AD38
VCCACLK[2]
USB
1 +TP_PCH_VCCDSW
0.1U_0402_16V4Z
2
C320
VCCACLK[1]
AP53
PCI/GPIO/LPC
VccLAN may be grounded if Intel LAN is disabled
AP51
U11J
Clock and Miscellaneous
C330
1U_0402_6.3V4Z
C333
0.1U_0402_16V4Z
+3VS
2
C337
1
0.1U_0402_16V4Z
AK3
AK1
+1.05VS
2
0.1U_0402_16V4Z
VCCSUS3_3[29]
U19
VCCSUS3_3[30]
U20
VCCSUS3_3[31]
U22
VCCSUS3_3[32]
+3VS
1
C344
2
0.1U_0402_16V4Z
+VTT
1
C345
1
C346
1
C347
2
4.7U_0603_6.3V6K
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1
C351
2
0.1U_0402_16V4Z
1
C348
2
1U_0402_6.3V4Z
375mA
V15
VCC3_3[5]
V16
VCC3_3[6]
Y16
VCC3_3[7]
VCCIO[9]
196mA VCCVRM[4]
AT20
VCCIO[10]
AH19
VCCIO[11]
AD20
VCCIO[12]
AF22
VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]
AD19
AF20
AF19
AH20
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
AB19
AB20
AB22
AD22
SATA
1
C343
163mA
P18
PCI/GPIO/LPC
+3VALW
3062mA
> 1mA
AT18
V_CPU_IO[1]
AU18
V_CPU_IO[2]
CPU
AH22
1849mA
VCCRTC
1
C349
2mA
HDA
A12
RTC
+RTCVCC
6mA

HM55R3@
VCCME[13]
VCCME[14]
VCCME[15]
VCCME[16]
VCCSUSHDA
+PCH_VRM
+1.05VS
1
+1.05VS
AA34 +PCH_VCCME1
Y34 +PCH_VCCME2
Y35 +PCH_VCCME3
AA35 +PCH_VCCME4
R351
R352
R353
R354
L30
+3VALW
1
2
0.1U_0402_16V4Z
C342
1U_0402_6.3V4Z
1
1
1
1
2
2
2
2
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
VCCSUSHDA can be
either 1.5V or 3.3V
1U_0402_6.3V4Z
Compal Secret Data
2009/01/23
Issued Date
Deciphered Date
2010/01/23
5
C350
Title

Custom
Rev
D
401717
Date:
Sheet
1
32
of
58
U11I
AY7
B11
B15
B19
B23
B31
B35
B39
B43
B47
B7
BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49
BB5
BC10
BC14
BC18
BC2
BC22
BC32
BC36
BC40
BC44
BC52
BH9
BD48
BD49
BD5
BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50
BE6
BE8
BF3
BF49
BF51
BG18
BG24
BG4
BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47
BH7
C12
C50
D51
E12
E16
E20
E24
E30
E34
E38
E42
E46
E48
E6
E8
F49
F5
G10
G14
G18
G2
G22
G32
G36
G40
G44
G52
AF39
H16
H20
H30
H34
H38
H42
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]
H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14
U11H
AB16
VSS[0]
AA19
AA20
AA22
AM19
AA24
AA26
AA28
AA30
AA31
AA32
AB11
AB15
AB23
AB30
AB31
AB32
AB39
AB43
AB47
AB5
AB8
AC2
AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49
AD7
AE2
AE4
AF12
Y13
AH49
AU4
AF35
AP13
AN34
AF45
AF46
AF49
AF5
AF8
AG2
AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47
AH7
AJ19
AJ2
AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34
AT5
AJ4
AK12
AM41
AN19
AK26
AK22
AK23
AK28
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

HM55R3@
Compal Secret Data
HM55R3@
2009/01/23
Issued Date
Deciphered Date
2010/01/23
5
AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47
Title

Custom
Rev
D
401717
Date:
Sheet
1
33
of
58
SATA HDD Conn.

+5VS
C356
10U_0805_10V4Z
C357
0.1U_0402_16V4Z
C358
0.1U_0402_16V4Z
C359
0.1U_0402_16V4Z
10U_0805_10V4Z
C363
10U_0805_10V4Z
@
C364
0.1U_0402_16V4Z
@
C366
0.1U_0402_16V4Z
@
GND
A+
AGND
BB+
GND
GND
GND
1
C355
0.1U_0402_16V4Z
V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12
1
2
3
4
5
6
7
GND
A+
AGND
BB+
GND
SATA_PTX_C_DRX_P1
SATA_PTX_C_DRX_N1
C369 1
C367 1
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
SATA_PTX_DRX_P1 25
SATA_PTX_DRX_N1 25
SATA_PRX_DTX_N1
SATA_PRX_DTX_P1
C368 1
C370 1
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
1
2
3
4
USB_EN#
W=60mils
1.4A
U14
+5VALW
C360
0.1U_0402_16V4Z
GND
IN
IN
EN#
+USB_VCCA
OUT
OUT
OUT
FLG
15
14
GND
GND
DP
+5V
+5V
MD
GND
GND
+5VS
SANTA_19A202-1_22P
@
this is temp. footprint
USB_OC#0 29,41
G528_SO8
for 17" expansion using
C362
4.7U_0805_10V4Z
2 @
+5VS
1
2
3
4
5
6
7
SATA_PTX_C_DRX_P4_ODD
SATA_PTX_C_DRX_N4_ODD
JODDB
8
9
10
11
12
13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
2
3
4
5
6
7
8
9
10
11
12
GND
GND
SATA_PRX_DTX_N4_ODD
SATA_PRX_DTX_P4_ODD
+5VS
SANTA_206401-1_RV
@
+3VS
For EMI request

1
1000P_0402_50V7K
2
C361
8
7
6
5
JODD
JHDD
24
23
C354
@
10U_0805_10V4Z 1U_0402_6.3V4Z
2
2
for 16" use
1 C365
0.1U_0402_16V4Z
@
2
C353
41
+3VS rail reserve for SSD
C352
SSD HDD need 400mA for 3V(PHISON)
+3VS
USB Board
Place components closely ODD CONN.
1.1A
2
D
SATA ODD Conn

+5VS
Place closely JHDD SATA CONN.
1.2A
+USB_VCCA
SATA_PRX_DTX_P4
SATA_PRX_DTX_N4
2 16@
2 16@
0.01U_0402_25V7K
0.01U_0402_25V7K
SATA_PRX_DTX_N4_ODD
SATA_PRX_DTX_P4_ODD
C373 1
C374 1
2 16@
2 16@
0.01U_0402_25V7K
0.01U_0402_25V7K
SATA_PRX_DTX_P4
SATA_PRX_DTX_N4
C375 1
C376 1
2 17@
2 17@
0.01U_0402_25V7K
0.01U_0402_25V7K
SATA_PTX_C_DRX_N4
SATA_PTX_C_DRX_P4
C377 1
C378 1
2 17@
2 17@
0.01U_0402_25V7K
0.01U_0402_25V7K
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SATA_PTX_C_DRX_N4
SATA_PTX_C_DRX_P4
USB20_N0_R
USB20_P0_R
E&T_6905-E12N-00R
@
SATA_PTX_C_DRX_P4_ODD C371 1
SATA_PTX_C_DRX_N4_ODD C372 1
JUSBB
W=60mils
USB20_N1_R
USB20_P1_R
1
2
3
4
5
6
7
8
9
10
11
12
GND
GND
E&T_6905-E12N-00R
@
SATA_PTX_DRX_N4 25
SATA_PTX_DRX_P4 25

@ R73
1
0_0402_5%
2
L53
eSATA/USB
W=60mils
1.4A
USB_EN#
C379
+USB_VCCB
GND
IN
IN
EN#
OUT
OUT
OUT
FLG
29
USB20_P3
USB20_P0_R
USB20_N0_R
@ R87
1
C381
0_0402_5%
2
0_0402_5%
2
@ R77
1
eSATA/USB Conn
0_0402_5%
2
L54
JESATA
PJDLC05_SOT23-3
USB20_N3_R
USB20_P3_R
25 SATA_PTX_DRX_P5
25 SATA_PTX_DRX_N5
C385 1
C386 1
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
SATA_PTX_C_DRX_P5
SATA_PTX_C_DRX_N5
25 SATA_PRX_C_DTX_N5
25 SATA_PRX_C_DTX_P5
C387 1
C388 1
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
SATA_PRX_DTX_N5
SATA_PRX_DTX_P5
L52
C383
4.7U_0805_10V4Z
@
USB20_N3
WCM-2012-900T_0805
D18 @
USB_OC#3 29,41
C382
1000P_0402_50V7K
29
0.1U_0402_16V4Z
For EMI request
USB20_N0
+
C380
@ R72
1
29
8
7
6
5
G528_SO8
1000P_0402_50V7K
W=60mils
U15
1
2
3
4
USB20_P0
+USB_VCCB
220U_6.3V_M_R15
+5VALW
29
1
2
3
4
VBUS
DD+
GND
5
6
7
8
9
10
11
GND
A+
AGND
BB+
GND
USB
29
USB20_N1
29
USB20_P1
USB20_N1_R
USB20_P1_R
WCM-2012-900T_0805
ESATA
SHIELD
SHIELD
SHIELD
SHIELD
@ R88
1
12
13
14
15
0_0402_5%
2
FOX_3Q318111
@
USB20_N3_R
USB20_P3_R
WCM-2012-900T_0805
@ R85
1
Compal Secret Data
0_0402_5%
2
2009/01/23
Issued Date
Deciphered Date
2010/01/23
5
Title

Size
Document Number
Rev
D
401717
Date:
Sheet
1
34
of
58
BlueTooth Interface
+3VS
MDC 1.5 Conn.
+3VS
+3VALW
GND2
GND1
JMDC
36 WLAN_BT_DATA
1
R367 @
+3VS
2
4.7K_0402_5%
2
+BT_VCC
(MAX=200mA)
1
C398
4.7U_0805_10V4Z
BT@
C399
0.1U_0402_16V4Z
BT@
25 AZ_SYNC_MD
AZ_SDIN1_MD_R
25 AZ_RST_MD#
GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK
2
4
6
8
10
12
+3VALW
AZ_BITCLK_MD 25
R368
10_0402_5%
@
ACES_87213-1000G
@
1 AZ_SDIN1_MD_R
33_0402_5% MDC@
2
R369
25 AZ_SDIN1_MD
BT@R370
BT@R370
4.7K_0402_5%
ACES_88018-124G
@
Connector for MDC Rev1.5

2
C400
10P_0402_50V8J
@
C397
0.1U_0402_16V4Z
BT@
1
3
5
7
9
11
25 AZ_SDOUT_MD
BT@ 2
1
R365
0_0402_5%
10
9
8
7
6
5
4
3
2
1
10
9
8
7
6
5
4
3
2
1
GND
GND
GND
GND
GND
GND
+BT_VCC
29
USB20_P5
29
USB20_N5
36 WLAN_BT_CLK
30
BT_DET#
1 BT@
2BT_RESET#
R366
0_0402_5%
BT_RST#
12
11
Q28 BT@
AO3413_SOT23
13
14
15
16
17
18
30
JBT
1
2
R362
47K_0402_5% 1
BT@
C390
0.01U_0402_25V7K
BT@
2
BT_PWR#
C392
C393
C394
C395
0.1U_0402_16V4Z
1000P_0402_50V7K
0.1U_0402_16V4Z
4.7U_0805_10V4Z
2 MDC@
2 MDC@
2 MDC@
2 MDC@
Bluetooth Connector
30
D
C396
0.1U_0402_16V7K
BT@
R361
100K_0402_5%
BT@
For EMI
please close to JKB1
KEYBOARD
KEYBOARD
CONN. for 16" CONN. for 17"
KSI[0..7]
KSO[0..17]
KSI[0..7]
41
KSO[0..17] 41
JKB1
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
KSO16
JKB2
JKB34
KSO16
KSO17
KSO2
KSO1
KSO0
KSO4
KSO3
KSO5
KSO14
KSO6
KSO7
KSO13
KSO8
KSO9
KSO10
KSO11
KSO12
KSO15
KSI7
KSI2
KSI3
KSI4
KSI0
KSI5
KSI6
KSI1
JKB4
CAPS_LED#
NUM_LED#
ACES_88170-3400
@
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
JKB34
KSO16
1
2
R372 300_0402_5%
+3VS
KSO17
KSO2
KSO1
KSO0
KSO4
KSO3
KSO5
KSO14
KSO6
KSO7
KSO13
KSO8
KSO9
KSO10
KSO11
KSO12
KSO15
KSI7
KSI2
KSI3
KSI4
KSI0
KSI5
KSI6
KSI1
JKB4
2
1
CAPS_LED# R376 300_0402_5%
NUM_LED#
+3VS
CAPS_LED# 41
NUM_LED# 41
ACES_88170-3400
@
1
C401
KSO17
1
C402
KSO2
1
C404
KSO1
1
C405
KSO0
1
C406
KSO4
1
C407
KSO3
1
C408
KSO5
1
C409
KSO14
1
C410
KSO6
1
C411
KSO7
1
C412
KSO13
1
C413
KSO8
1
C415
KSO9
1
C416
KSO10
1
C417
KSO11
1
C418
KSO12
1
C419
KSO15
1
C420
KSI7
1
C421
KSI2
1
C422
KSI3
1
C423
KSI4
1
C424
KSI0
1
C425
KSI5
1
C427
KSI6
1
C429
KSI1
1
C431
CAPS_LED#
1
C433
NUM_LED#
1
C435
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
Touch/B Connector
JTOUCH
1
2
3
4
+5VS
41
41
TP_CLK
TP_DATA
1
2
3 GND
4 GND
5
6
ACES_85201-04051
@
2
1
3
D19
@
PJDLC05_SOT23-3
SW/B Connector
JPOWER
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
9 9
10 10
GND 11
GND 12
ON/OFFBTN#_R 43
KSO0
41 EC_PLAYBTN#
KSI1
41 EC_MUTEBTN#
KSI3
41 EC_FRDBTN#
KSI5
41 EC_REVBTN#
KSI2
41
ON/OFFBTN#_R
C426 1
2@ 220P_0402_50V7K
KSI1
C428 1
2@ 220P_0402_50V7K
KSI3
C430 1
2@ 220P_0402_50V7K
KSI5
C432 1
2@ 220P_0402_50V7K
KSI2
C434 1
2@ 220P_0402_50V7K
A
ACES_85201-1005N
@
For EMI
Compal Secret Data
2009/01/23
Issued Date
Deciphered Date
2010/01/23
5
Title

Size
Document Number
Rev
D
401717
Date:
Sheet
1
35
of
58
2
0.01U_0402_25V4Z
CM3
WLAN@
2
4.7U_0805_10V4Z
C253
47P_0402_50V8J
WLAN@
JUMP_43X79
@
+1.5VS
JWLAN
WLAN/ WiFi
+3V_WLAN
1
1R16
R17
E51_TXD
E51_RXD
2
0_0402_5%
2
0_0402_5%
Debug card using
GND1
GND2
54
XMIT_OFF#
PLT_RST#
CM9
WLAN@
2
4.7U_0805_10V4Z
C254
47P_0402_50V8J
WLAN@
+3VS
XMIT_OFF# 41
PLT_RST# 5,13,29,37,41,42
GND1
GND2
54
3G
+UIM_PWR
FOX_AS0B226-S40N-7F
@
PM_SMBCLK 11,12,22,26
USB20_N13 29
USB20_P13 29
WiMax
RN5
2 PLT_RST#
100K_0402_5%
1
2
3
UIM_RESET
UIM_CLK
DM1
RLZ20A_LL34
3G@
CM13
0.1U_0402_16V4Z
2
3G@
VCC
RST
CLK
NC
CM15
10P_0402_50V8J
3G@ 2
CM16
10P_0402_50V8J
2 3G@
DM2
DAN217_SC59
@
GND
VPP
I/O
4
5
6
NC
UIM_VPP
UIM_DATA
1
CM14
22P_0402_50V8J
2 @
MOLEX_47273-0001~D
@
DM3
DAN217_SC59
@
DM4
DAN217_SC59
@
+UIM_PWR
+3VS_CARD
Imax = 0.275A
1
CN1
10U_0805_10V4Z
NEW@
CN2
0.1U_0402_16V4Z
NEW@
UN1
2EXP_CPPE#
10K_0402_5%
12
14
+1.5VS
1 NEW@ 2 CP_USB#
100K_0402_5%
share with USB OC PIN

need always pull high
2
4
+3VS
17
+3VALW
PLT_RST#
41,51
+3VS
CN3
10U_0805_10V4Z
NEW@
1
UN2
@
Q5A
2N7002DW-T/R7_SOT363-6
G Vcc
2
2
CLKREQ#
38,41,44,47,50,52,54
1.5Vin
1.5Vin
3.3Vin
3.3Vin
AUX_IN
1.5Vout
1.5Vout
11
13
3.3Vout
3.3Vout
3
5
AUX_OUT
SYSRST#
OC#
20
SUSP#
STBY#
NC
10
CPPE#
GND
EXP_CPPE#
RN7
10K_0402_5%
@
RN6
10K_0402_5%
@
+3VS
NEW@
SYSON
+3VS
RCLKEN
+1.5VS_CARD
Imax = 1.35A
JEXP
Imax = 0.75A
1
CN4
0.1U_0402_16V4Z
NEW@
CN5
10U_0805_10V4Z
NEW@
USB20_N8_R
USB20_P8_R
CN6
0.1U_0402_16V4Z
NEW@
CP_USB#
PM_SMBCLK
PM_SMBDATA
+3VALW
RN3
CN7
0.1U_0402_16V4Z
@
CP_USB#
RCLKEN
SHDN#
CPUSB#
18
RCLKEN
PERST#
Thermal_Pad
15
60mils
CLKREQ_NEW#
+1.5VS_CARD
+1.5VS_CARD
27,37 EC_SWI#
+3VALW_CARD
40mils
+3VS_CARD
+3VALW_CARD
PERST#
EXP_CPPE#
CLKREQ#
EXP_CPPE#
R125 0_0402_5%
1
2
7
21
CLKREQ_NEW# 26
26 PCIE_PRX_NEWTX_N1
26 PCIE_PRX_NEWTX_P1
16
26 PCIE_PTX_C_NEWRX_N1
26 PCIE_PTX_C_NEWRX_P1
NEW@
L56 @
29
USB20_P8
29
USB20_N8
NC7SZ32P5X_NL_SC70-5
USB20_P8_R
USB20_N8_R
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
GND
USB_DUSB_D+
CPUSB#
RSV
RSV
SMB_CLK
SMB_DATA
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLKREFCLK+
GND
GND
PERn0
GND
PERp0
GND
GND
PETn0
GND
PETp0
GND
27
28
GND
GND
31
32
29
30
SANTA_132862-2_26P
@
this is temp. footprint
WCM-2012-900T_0805
R124 0_0402_5% NEW@
1
2
another at page44
29
26 CLK_NEW#
26 CLK_NEW
19
8
PERST#
+3VS_CARD
40mils
TPS2231MRGPR-2 QFN
RM2
4.7K_0402_5%
@
J3GSIM
+UIM_PWR
+UIM_PWR
+3VALW_CARD
RN4
53
USB20_N12 29
USB20_P12 29
53
CM8
WLAN@
2
2
0.01U_0402_25V4Z
C255
47P_0402_50V8J
3G@
PM_SMBCLK
PM_SMBDATA
FOX_AS0B226-S40N-7F
@
41
41
CM7
WLAN@
2
2
4.7U_0805_10V4Z
26 PCIE_PTX_C_WLANRX_N2
26 PCIE_PTX_C_WLANRX_P2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
3G_OFF# 41
PLT_RST#
26 PCIE_PRX_WLANTX_N2
26 PCIE_PRX_WLANTX_P2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
CLK_WLAN#
CLK_WLAN
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
26
26
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
35 WLAN_BT_DATA
35 WLAN_BT_CLK
26 CLKREQ_WLAN#
For SED
0.1U_0402_16V4Z
1
+3V_WLAN
+1.5VS
CM4
0.01U_0402_25V4Z
3G@
+UIM_PWR
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP
CM2
WLAN@
For SED
90 MIL
0.1U_0402_16V4Z
1
1
1
CM5
CM6
3G@
3G@
CM1
WLAN@
Short PJ27 for Wimax

Short PJ26 for WLAN
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
PJ26
+3VS
0.1U_0402_16V4Z
1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
JUMP_43X79
@
+3V_WLAN
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
For SED
1
+3VALW
+3VS
J3G
+3V_WLAN
PJ27
+3VS
PCIe Mini Card-3G
PCIe Mini Card-WLAN/WiMax
CLKREQ#
1
RN8
2 CLKREQ_NEW#
0_0402_5%
NEW@
Issued Date
Compal Secret Data
2009/01/23
Deciphered Date
2010/01/23
Title

Size
Document Number
Rev
D
401717
Date:
Sheet
36
of
58
+LAN_VDD12
Close to Pin10,13,30,36,45
2
1
Place Close to Chip

CL6 1
2 0.1U_0402_16V7K
PCIE_PRX_LANTX_P3
20
HSOP
26 PCIE_PRX_C_LANTX_N3
CL7 1
2 0.1U_0402_16V7K
PCIE_PRX_LANTX_N3
21
HSON
26 PCIE_PTX_C_LANRX_P3
15
HSIP
26 PCIE_PTX_C_LANRX_N3
16
HSIN
17
18
REFCLK_P
REFCLK_M
1
RL3
26
26
EC_SWI#
2
100K_0402_5%
CLK_LAN
CLK_LAN#
1
R153
26 CLKREQ_LAN#
5,13,29,36,41,42
2
0_0402_5%
PLT_RST#
LED3/EEDO
LED2/EEDI/AUX
LED1/EESK
EECS
33
34
35
32
LED0
38
MDIP0
MDIN0
MDIP1
MDIN1
NC
NC
NC
NC
2
3
5
6
8
9
11
12
RTL8103EL-GR
25
CLKREQB
27
PERSTB
46
RSET
26
28
LANWAKEB
ISOLATEB
+3VS
2 2.49K_0402_1%
NC
LAN_DO
PAD T40
LAN_DI
1
2
LAN_SK_LAN_LINK# RL1
3.6K_0402_5%
LAN_CS
2
1
RL2
1K_0402_5%
LAN_ACTIVITY#
27,36 EC_SWI#
ISOLATEB
LAN_X1
LAN_X2
ISOLATEB
RL6
15K_0402_5%
YL1
LAN_X1 2
1LAN_X2
25MHz_20pF_6X25000017
1
27P_0402_50V8J
2
CL15
0.1U_0402_16V4Z
CL16
27P_0402_50V8J
41
42
CKXTAL1
CKXTAL2
23
24
NC
NC
7
14
31
47
GND
GND
GND
GND
22
GNDTX
+3V_LAN
CL3
0.1U_0402_16V4Z
CL4
0.1U_0402_16V4Z
CL5
1
0.1U_0402_16V4Z
Close to Pin1,37,29
+3V_LAN
LAN_MDI0+
LAN_MDI0LAN_MDI1+
LAN_MDI1-
CL8
0.1U_0402_16V4Z
CL9
0.1U_0402_16V4Z
CL10
0.1U_0402_16V4Z
Close to Pin48
RL4 1
RL5
1K_0402_1%
0.1U_0402_16V4Z
CL2
UL1
26 PCIE_PRX_C_LANTX_P3
+3V_LAN
CL1
VCTRL12A
48
VDDTX
DVDD12
DVDD12
DVDD12
DVDD12
19
30
36
13
10
NC
39
NC
VCTRL12D
44
45
+VCTRL12
+VCTRL12
+EVDD12
+LAN_VDD12
Close to Pin19
+EVDD12
CL11
CL12
10U_0805_10V4Z
0.1U_0402_16V4Z
2 @
1
VDD33
VDD33
29
37
AVDD33
NC
NC
1
40
43
+LAN_VDD12
+3V_LAN
CL13
1U_0402_6.3V4Z
CL14
0.1U_0402_16V4Z
RTL8103EL-GR_LQFP48_7X7
For EMI request

41,44
@
1
2
R161
0_0402_5%
WOL_EN#
LAN_ACTIVITY#
2
RL7
2
CL18
2
CL21
1
1
0.01U_0402_16V7K
0.01U_0402_16V7K
Place these components

colsed to UL2
LAN_MDI1+
LAN_MDI1-
TX+
TXCT
NC
NC
CT
RX+
RX-
16
15
14
13
12
11
10
9
RJ45_MIDI0+
RJ45_MIDI0-
2 1000P_0402_50V7K 1
2
1
1000P_0402_50V7K
2 75_0402_1%
2
75_0402_1%
PR2-
PR3-
PR3+
RJ45_MIDI1+
PR2+
RJ45_MIDI0-
PR1-
RJ45_MIDI0+
PR1+
RJ45_GND
RL10
LAN_SK_LAN_LINK#
2
RL11
2
CL22
NS681680
1
150_0402_1%
1
68P_0402_50V8J
10
9
RJ45_GND
1
CL23
2
RL12
Deciphered Date
2010/01/23
A
13
Green LEDGreen LED+
LANGND
Compal Secret Data

2009/01/23
14
SHLD1
2 1000P_1808_3KV7K
Issued Date
SHLD2
1
150_0402_1%
TYCO_2068888-1_12P-T
@
For EMI request

+3V_LAN
PR4-
RL9
CL19 1
1
CL20
RJ45_MIDI1+
RJ45_MIDI1-
Yellow LED+
PR4+
UL2
TD+
TDCT
NC
NC
CT
RD+
RD-
Yellow LED-
7
RJ45_MIDI1-
1
2
3
4
5
6
7
8
JLAN
1
12
150_0402_1%
2
1
11
RL8
150_0402_1%
8
+3V_LAN
LAN_MDI0+
LAN_MDI0-
LAN Conn.
CL17 68P_0402_50V8J
2
1
ISOLATEB
Title
CL24
0.1U_0402_16V4Z
CL25
4
4.7U_0603_6.3V6K


Custom
401717
Date:
Rev
D
Sheet
E
37
of
58
+3VS_DVDD
Codec
30mil
10U_0805_10V4Z
1
CA2
2
1
0_0603_5%
Audio regulator
+3VS
+5VS
CA1
RA1
+AVDD
RA3
2
1
2
100P_0402_50V8J
CA7
Ext. Mic
39
1
CA52
MIC2_L
2
100P_0402_50V8J
MIC@
39
MIC2_R
39
MIC1_C_L
39
MIC1_C_R
CA51
1
1
CA54
CA53
1
1
CA12
100P_0402_50V8J
2
MIC@
2
100P_0402_50V8J
100P_0402_50V8J
2
MONO_IN
2
100P_0402_50V8J
LOUT1_L
AMP_SPK_L 39
LOUT1_R
36
AMP_SPK_R 39
16
MIC2_L
LOUT2_L
39
17
MIC2_R
LOUT2_R
41
23
LINE1_L
SPDIFO1
48
24
LINE1_R
SPDIFO2
45
21
MIC1_L
HPOUT_L
33
1 RA4
22
MIC1_R
HPOUT_R
32
1 RA5
MONO_OUT
37
DMIC_CLK1/2
46
25 AZ_SDOUT_HD
SDATA_OUT
DMIC_CLK3/4
44
SDATA_IN
LINE2_VREFO
20
LINE1_VREFO
18
MIC1_VREFO
28
MIC2_VREFO
19
CPVEE
31
2
RA6
1 AZ_SDIN0_HD_R
33_0402_5%
25 AZ_RST_HD#
11
RESET#
25 AZ_SYNC_HD
10
SYNC
SPK_SEL
3
13
SENSE_B
2
1
RA11 0_0402_5%
34
EAPD#
47
43
IF test OK, link direct
4
7
GPIO0/DMIC_DATA1/2
GPIO1/DMIC_DATA3/4
VREF
27
JDREF
40
CBN
30
CBP
29
SENSE A
SENSE B
EAPD
AVSS1
AVSS2
2
1
SUSP#
VIN
GND
SHDN#
VOUT
BP
CA11
2
1
CA10
1U_0402_6.3V4Z
1 @
0.22U_0402_10V4Z
@
APL5151-475BC-TRL_SOT23-5
@
HP_L
39
HP_R
39
EC Beep
1U_0402_6.3V4Z
1
2
CA46
10mil
10mil
41
AC_JDREF
1
2
CA15
2.2U_0603_6.3V4Z
26
42
EC_BEEP#
PCI Beep
+MIC1_VREFO
+MIC2_VREFO
1U_0402_6.3V4Z
1
2
1
2
CA14
2.2U_0603_6.3V4Z CA45 MIC@
AC_VREF
CA16
CA17
CA58
NC
DVSS
DVSS
2
63.4_0402_1%
2
63.4_0402_1%
UA1
Beep sound
BITCLK
SENSE_A
MUTE#
DVDD
LINE2-R
BEEP_IN
CA9
1U_0402_6.3V4Z
@
35
25 AZ_BITCLK_HD
25
39
38
25
LINE2-L
15
12
4.75V
CA56
100P_0402_50V8J
36,41,44,47,50,52,54
14
25 AZ_SDIN0_HD
+VDDA
25,28 PCH_SPKR
RA7
1
2
47K_0402_5%
CA13
1
2
RA8
1
2
47K_0402_5%
MONO_IN
0.1U_0402_16V4Z
Int. Mic
For EMI request
DVDD_IO
For EMI request
AVDD2
AVDD1
UA2
CA8
2
0.1U_0402_16V4Z
For EMI request
+5VALW
1
RA12
10K_0402_5%
CA18
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z
10U_0805_10V4Z
1
100P_0402_50V8J
2
2
10U_0805_10V4Z
PJ22
JUMP_43X39
@
CA57
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
40mil
10U_0805_10V4Z
0.1U_0402_16V4Z
1
1
CA6
100P_0402_50V8J
10U_0805_10V4Z
1
1
CA4
CA5
1 RA9
2
20K_0402_1%
CA55
+VDDA
2
1
0_0603_5%
CA3
For EMI request
ALC272-GR_LQFP48_7X7
B
CA19 @ 100P_0402_50V8J
AZ_BITCLK_HD
1
2
2
1
RA13 @ 100_0402_5%
CA20 @ 100P_0402_50V8J
1
2 AZ_RST_HD#
DGND
AGND
GPIO0-->SPK_SEL
2
1
+3VS
RA15 4.7K_0402_5%
@
HIGH:HARMAN
LOW:NO-BRAND
For EMI request
Sense Pin
CA47 1
2 0.1U_0603_50V7K
CA48 1
2 0.1U_0603_50V7K
CA49 1
2 0.1U_0603_50V7K
CA50 1
2 0.1U_0603_50V7K
1
RA18
Impedance
SENSE A
Codec Signals
39.2K
PORT-A (PIN 39, 41)
20K
PORT-B (PIN 21, 22)
10K
PORT-C (PIN 23, 24)
5.1K
PORT-D (PIN 35, 36)
39.2K
PORT-E (PIN 14, 15)
20K
PORT-F (PIN 16, 17)
10K
PORT-H (PIN 37)
5.1K
PORT-I (PIN 32, 33)
2
0_0603_5%
Function
place close to chip

Ext. MIC
39
MIC_SENSE
39
NBA_PLUG
SPK out
1 RA19
2
20K_0402_1%
1
RA20
SENSE_A
2
5.1K_0402_1%
SENSE_B
1 RA21
2
20K_0402_1%
MIC@
SENSE B
Int. MIC
2009/01/23
Issued Date
Headphone out
4
Compal Secret Data
Deciphered Date
2010/01/23
3
Title

Size
Document Number
Rev
D
401717
Date:
Sheet
1
38
of
58
Ext. Mic
+5VS
0.1U_0402_16V4Z
38
MIC1_C_L
38
MIC1_C_R
4.7U_0805_10V4Z
CA21
2
1
4.7U_0805_10V4Z
RA23
2 RA22
1
1
2
1K_0402_5% 4.7K_0402_5%
DA1
MIC1_L
2
1
CA23
10U_0805_10V4Z
1
CA24
Int. Mic
CA25
10 dB
0.033U_0402_25V7K
CA31
LINE_C_OUTL
AMP_SPK_L
CA32
0.033U_0402_25V7K
19
SPKR+
ROUT-
14
SPKR-
LOUT+
SPKL+
LOUT-
RA33
100K_0402_5%
@
RA32
100K_0402_5%
Speaker Connector
@ DA4 PJDLC05_SOT23-3
2
NC
12
BYPASS
10
Keep 10 mil width

AMP_BYPASS
SHUTDOWN
GAIN0 GAIN1 Av(db)Rin(ohm)
SPKL-
GND5
GND1
GND2
GND3
GND4
MUTE#
1
CA29
MIC@
LIN+
C=0.033U,R=70K,F=68Hz
18
LIN-
1U_0402_6.3V4Z
ROUT+
RIN-
1U_0402_6.3V4Z
2
3
F=1/2RC --> -3db

38
16
15
6
GAIN1
setting 68Hz
90K
10
70K
0 15.6
45K
1 21.6
25K
SPKL+
SPKLSPKR+
SPKR-
LA2 1
LA3 1
LA4 1
LA5 1
2
2
2
2
JSPK
FBMA-L11-160808-800LMT_0603
FBMA-L11-160808-800LMT_0603
FBMA-L11-160808-800LMT_0603
FBMA-L11-160808-800LMT_0603
SPK_L1
SPK_L2
SPK_R1
SPK_R2
1
2
3
4
1
2
3
4
ACES_85204-0400N
@
@ DA5 PJDLC05_SOT23-3
3
1
2
CA33
0.47U_0603_10V7K
21
20
13
11
1
TPA6017A2_TSSOP20
HeadPhone/LINE Out JACK

JLINE
5
38
NBA_PLUG
38
HP_R
38
HP_L
LA6 1
2 HP_R_L
KC FBM-L11-160808-121LMT 0603
LA7 1
2 HP_L_L
KC FBM-L11-160808-121LMT 0603
3
1
2
CA35
SW_XRE094_3P
2
10K_0402_5%
UA4
1
3
1
RA38
2
10K_0402_5%
1
CA37
0.01U_0402_16V7K
A
G
NC
P
DIP
1
RA37
CA36
0.1U_0402_16V4Z
74LVC1G14GW_SOT353-5
COM
For EMI request
+3VS
2
A
0.1U_0402_16V4Z
2
+3VS
RA36
10K_0402_5%
FOX_JA6333L-B3T0-7F
@
CA34
0.1U_0402_16V4Z
@
DA6 @
PJDLC05_SOT23-3
RA34
100K_0402_5%
1
5
RA35
10K_0402_5%
DIP
SW1
3
6
2
1
1
+3VS
Volume Control
+3VS
38
0.033U_0402_25V7K
17
MIC2_R
DA3 @
PSOT24C_SOT23
GAIN0
RIN+
MIC2_L
38
LINE_C_OUTR
CA27
RA31
100K_0402_5%
0.033U_0402_25V7K
38
RA27 MIC@
1K_0402_5%
2
1
CA26
AMP_SPK_R
RA29
100K_0402_5%
@
VDD
PVDD1
PVDD2
Rin =70Kohm
38
+5VS
MIC@
CA28
2
1
+MIC1_VREFO
2 MIC@ 1
+MIC2_VREFO
4.7K_0402_5%
RA26
1 @
2
INT_MIC_R 22
RA28
0_0402_5%
JMIC
INT_MIC
1 1 NC1 3
1
2
2 2 NC2 4
CA30
reserve for test
2
1
1K_0402_5% 220P_0402_50V7K
ACES_85204-0200N
close to JMIC
RA30 MIC@
@
MIC@
2
0.1U_0402_16V4Z
UA3
RA25 1
2
1
2
4.7K_0402_5% DA2
MIC1_R
2
1
1K_0402_5%
RA24
CA22
+MIC1_VREFO
TPA6017 Medium Range Amplifier
CA38
0.01U_0402_16V7K
Ext.MIC/LINE IN JACK
UA5
1
2
3
4
5
6
7
CD1#
D1
CP1
SD1#
Q1
Q1#
GND
VCC
CD2#
D2
CP2
SD2#
Q2
Q2#
14
13
12
11
10
09
08
38
MIC1_R
MIC1_L
74LCX74MTC_TSSOP14
MIC_SENSE
LA8 1
2 MIC1_L_R
KC FBM-L11-160808-121LMT 0603
LA9 1
2 MIC1_L_L
KC FBM-L11-160808-121LMT 0603
3
6
2
1
CA39
1 CA40
1
1
0.1U_0402_16V4Z
CA41
CA42
@
120P_0402_50V8K @
2
2
@ 2
3
1
2
ENCODER_DIR 41
ENCODER_PULSE 41
0.1U_0402_16V4Z
JEXMIC
DA7 @
PJDLC05_SOT23-3
FOX_JA6333L-B3T0-7F
@
120P_0402_50V8K
For EMI request
Issued Date
Compal Secret Data
2009/01/23
Deciphered Date
2010/01/23
Title

Size
Document Number
Rev
D
401717
Date:
Sheet
39
of
58
RC3
2
+3VS_CR
RC1
+3VS
CC2
0_0603_5%
2
CC3
2
CC1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
2
1
3
7
9
11
33
AV_PLL
NC
NC
CARD_3V3
D3V3
D3V3
XTLI
8
44
45
47
48
3V3_IN
RST#
MODE_SEL
XTLO
XTLI
CR_LED#
4
5
14
DM
DP
GPIO0
+VCC_3IN1
+3VS_CR
1U_0402_6.3V4Z
+3VS_CR
CC5
+3VS_CR
29
29
USB20_N10
USB20_P10
RST#_R
MODE SEL
RC5
100K_0402_5%
RC4
2
RST#
0_0402_5%
RST#_R
1
CC6
1U_0402_6.3V4Z
2
C
RREF
12
32
DGND
DGND
6
46
AGND
AGND
+3VS
MODE SEL
RC8
120_0402_5%
RC10
6.19K_0402_1%
VREG
MS_D4
NC
10
22
30
CC4
1U_0402_6.3V4Z
2
XD_CLE_SP19
XD_CE#_SP18
XD_ALE_SP17
SD_DAT2/XD_RE#_SP16
SD_DAT3/XD_WE#_SP15
XD_RDY_SP14
SD_DAT4/XD_WP#/MS_D7_SP13
SD_DAT5/XD_D0/MS_D6_SP12
SD_CLK/XD_D1/MS_CLK_SP11
MS_INS#_SP9
XD_D5_SP5
XD_D4/SD_DAT1_SP4
SD_CD#_SP3
SD_WP_SP2
XD_CD#_SP1
EEDI
43
42
41
40
39
38
37
35
34
31
29
28
27
26
25
23
21
20
19
18
XTAL_CTR
MS_D5
13
24
EEDO
EECS
EESK
SD_CMD
15
16
17
36
SD_DATA2
SD_DATA3
SD_MS_CLK
MS_DATA3_SD_DATA6
MSCD#
MS_DATA2_SD_DATA7
SD_MS_DATA0
MS_DATA1
MSBS
SD_DATA1
SDCD#
SDWP#
RC6
2 22_0402_5%
SDCLK
RC7
2 22_0402_5%
MSCLK
confirm all pin define with connector spec.

SDCMD
SDWP#
SD_DATA1
SD_MS_DATA0
RTS5159-GR_LQFP48_7X7
RC11
0_0402_5%
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
MSBS
SDCLK
MS_DATA1
SD_MS_DATA0
CR_LED#
+VCC_3IN1
CC8
1U_0402_6.3V4Z
3 in 1 Card Reader
XTAL_CTR
JREAD
Vf=2.0V(typ),2.4V(max)
DC1
HT-110UYG-CT_YEL/GRN
RC9
0_0402_5%
1
1
CC7
0.1U_0402_16V4Z
@
0_0402_5%
1
UC1
MS_DATA2_SD_DATA7
CC9
0.1U_0402_16V4Z
MSCD#
MS_DATA3_SD_DATA6
SDCMD
MSCLK
SD_DATA3
SD_DATA2
SDCD#
48Mhz
SD-WP
SD-DAT1
SD-DAT0
SD-GND
MS-GND
MS-BS
SD-CLK
MS-DAT1
MS-DAT0
SD-VCC
MS-DAT2
SD-GND
MS-INS
MS-DAT3
SD-CMD
MS-SCLK
MS-VCC
SD-DAT3
MS-GND
SD-DAT2 GND1
SD-CD
GND2
22
23
TAITW_R009-125-LR_RV
22 CLK_48M_CR
1
2
RC12 0_0402_5%
@ CC14
+3VS_CR
XTLI
10P_0402_50V8J
1
2 XTAL_CTR
RC13 0_0402_5%
USB AUTO DE-LINK MS FORMATTER
NC
YES
NC
47P
YES
NC
NC
NC
680P
Description
Recommended
YES
MSCLK
Compatible with RTS5158E

YES
LED ON
10K 180P
10K 680P
SDCLK
1
@ RC14
2
10_0402_5%
@ CC11
10P_0402_50V8J
1
@ RC15
2
10_0402_5%
@ CC13
10P_0402_50V8J
LED ON
YES
Compal Secret Data
2009/01/23
Issued Date
Deciphered Date
2010/01/23
5
Title


Custom
Date:
Rev
D
401717
Sheet
1
40
of
58
+3VALW
+3VALW
0.1U_0402_16V4Z
C438
C439
2
2
0.1U_0402_16V4Z
C440
1
1
1000P_0402_50V7K
U19
0.1U_0402_16V4Z
VCC
VCC
VCC
VCC
VCC
VCC
for EMI request
C442
1
2
C441
1000P_0402_50V7K
67
C437
CLK_PCI_EC
AVCC
C436
0.1U_0402_16V4Z
1
2
9
22
33
96
111
125
0.1U_0402_16V4Z
1
1
R377
@ 10_0402_5%
2
1
CLK_PCI_EC 12
13
ECRST#
37
20
38
29 CLK_PCI_EC
5,13,29,36,37,42 PLT_RST#
+3VALW
R378
47K_0402_5%
2
1
2
C444
30
EC_SCI#
43 WL_BT_LED#
ECRST#
1
0.1U_0402_16V4Z
35
KSO[0..17]
SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47
6
14
15
16
17
18
19
25
28
29
30
31
32
34
36
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A
KSI[0..7]
KSO[0..17]
RP7
1
2
3
4
+3VALW
+3VS
8
7
6
5
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
2.2K_0804_8P4R_5%
46
46
21,26
21,26
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
27 PM_SLP_S3#
27 PM_SLP_S5#
30
EC_SMI#
27 PCH_SUSPWRDN
1
R402 @
2
0_0402_5%
49
VTTP_EN
30
THM_ALT#
6 FAN_SPEED1
R337
R342
100K_0402_5%
1
2
100K_0402_5%
1
2
VTTP_EN
36
E51_TXD
36
E51_RXD
43 ON/OFFBTN#
43 PWR_SUSP_LED#
35 NUM_LED#
63
64
65
66
75
76
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F
68
70
71
72
PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F
83
84
85
86
87
88
PS2 Interface
CRY1
CRY2
122
123
2CRY2
ADP_I
ADP_V
2
100P_0402_50V8J
2
100P_0402_50V8J
USB_EN# 34
ENCODER_DIR 39
ENCODER_PULSE 39
TP_CLK 35
TP_DATA 35
TP_CLK
TP_DATA
VGATE
EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11
100
101
102
103
104
105
106
107
108
EC_RSMRST# 27
EC_LID_OUT# 26
EC_ON
43
PWRME_CTRL 25
PM_PWROK 27
BKOFF# 22
XMIT_OFF# 36
3G_OFF# 36
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7
110
112
114
115
116
117
118
PM_SLP_S4# 27
VGA_ENBKL 14
USB_OC#3 29,34
V18R
124
+5VS
TP_CLK
1
4.7K_0402_5%
TP_DATA
1
4.7K_0402_5%
2
R379
2
R381
+3VALW
VGATE
27,53
WOL_EN# 37,44
LID_SW#
LID_SW#
2
47K_0402_5%
42
EC_SI_SPI_SO 42
EC_SO_SPI_SI 42
SPI_CLK 42
SPI_CS# 42
ACIN_D
SYSON
FSTCHG 47
BATT_FULL_LED# 43
CAPS_LED# 35
BATT_CHG_LOW_LED# 43
PWR_ON_LED# 43
SYSON
36,51
VR_ON
53
1
R5
1
R383
2
4.7K_0402_5%
+3VALW
1
R341
2
330K_0402_5%
D21
ACIN_D
ACIN
27,43,45
B
SUSP#
36,38,44,47,50,52,54
PBTN_OUT# 27
USB_OC#0 29,34
+EC_V18R
C448
4.7U_0805_10V4Z
KB926QFD3_LQFP128_14X14
18P_0402_50V8J
C450
Y4
Compal Secret Data
32.768KHZ_12.5PF_Q13MC14610002
2009/01/23
Issued Date
Deciphered Date
2010/01/23
5
H_PROCHOT# 5,53
DAC_BRIG 22
EN_DFAN1 6
IREF
47
CHGVADJ 47
CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
GPI
2
0_0402_5%
BATT_TEMPA
1
C445
ACIN_D
1
C446
47
47
73
74
89
90
91
92
93
95
121
127
11
24
35
94
113
4
OSC
OSC
NC
NC
3
18P_0402_50V8J
BATT_TEMPA 46
119
120
126
128
GPIO
SM Bus
47
SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#
SPI Flash ROM
1
R403 @
1
1
1
C449
BATT_TEMPA
SPI Device Interface
XCLK1
XCLK0
@ 10M_0402_5%
ACOFF
97
98
99
109
GND
GND
GND
GND
GND
CRY1
INVT_PWM 22
EC_BEEP# 38
SDICS#/GPXOA00
SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0
E51_TXD
R389
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43
DA Output
77
78
79
80
to avoid EC entry ENE test mode
KSI[0..7]
PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
35
AD
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49
KSO2
21
23
26
27
PWM Output
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
KSO1
2
47K_0402_5%
2
47K_0402_5%
INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
+3VALW
1
R380
1
R382
GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC & MISC
AGND
C443
@ 22P_0402_50V8J
1
2
3
4
5
7
8
10
30
GATEA20
30 KB_RST#
25,42 SERIRQ
25,42 LPC_FRAME#
25,42 LPC_AD3
25,42 LPC_AD2
25,42 LPC_AD1
25,42 LPC_AD0
69
Title

Size
Document Number
Rev
D
401717
Date:
Sheet
1
41
of
58
SPI Flash (256KB)
Lid SW
Socket: SP07000F500 & SP07000H900
+3VALW
It's for 16" using
20mils
U22
HOLD
41 SPI_CS#
41
SPI_CLK
41 EC_SO_SPI_SI
VSS
C453
0.1U_0402_16V4Z
2 16@
LID_SW#
41
EC_SI_SPI_SO 41
+3VALW
25,41
C452
10P_0402_50V8J
16@ 2
SERIRQ
25,41
It's for 17" using
MX25L2005CMI-12G SO8
PLT_RST# 5,13,29,36,37,41
LPC_AD3
LPC_AD2 25,41
LPC_AD1
LPC_AD0 25,41
10
CLK_PCI_DDR
25,41
H7
+3VS
VCC
VOUT
1
2
R392 0_0402_5%
25,41 LPC_FRAME#
U23 17@
APX9132ATI-TRL_SOT23-3
@ DEBUG_PAD
VDD
VOUT
R393
22_0402_5%
LID_SW#
29
GND
VDD
SPI_CLK
1 R394
2
10_0402_5%
1
C454
2
10P_0402_50V8J
C456
10P_0402_50V8J
17@ 2
C451
GND
U21 16@
APX9132ATI-TRL_SOT23-3
+3VALW
0.1U_0402_16V4Z
LPC Debug Port

Please place the PAD under DDR DIMM.
C455
0.1U_0402_16V4Z
2 17@
reserve for EMI, close to U22
C457
22P_0402_50V8J
reserve for EMI
Issued Date
Compal Secret Data
2009/01/23
Deciphered Date
2010/01/23
Title

Size
Document Number
Rev
D
401717
Date:
Sheet
42
of
58
Power Button
ISPD
+3VALW
ON/OFFBTN#_R
R395
35
ZZZ
UV1
UV1
PCB SKU LA-5322P
M92-XTX
M92XTX@
M96
M96@
PJP1
U11
PJP1
NSWAA45@
HM55
HM55R1@
H15
100K_0402_5%
SW2
6
5
2
SW3
C458
0.1U_0402_25V6
@
1
R51
2
0_0402_5%
41
DC-IN
16
another at page 44
EC_ON
For EMI request
GPU
45
Q6A
2N7002DW-T/R7_SOT363-6
51_ON#
CHN202UPT SC-70
PCB
ON/OFFBTN# 41
4
SMT1-05-A_4P
BTM side
1
3
ON/OFFBTN#
ON/OFFBTN#_R
TOP side
D28
R396
10K_0402_5%
PJP1
6
5
SMT1-05-A_4P
debug phase using
DC-IN
17
PJP1
NTWAA45@
Q35A
2N7002DW-T/R7_SOT363-6
H16
H17
H18
2
120_0402_5%
H_3P0
@
H_3P0
@
H14
H_3P0
@
H_3P0
@
H25
H26
H_3P0
@
H_3P0
@
H_3P0
@
PWR_ON_LED# 41
H_3P0
@
H_3P0
@
PWR_SUSP_LED# 41
H_3P0
@
1
H19
HT-210UD/UYG_AMB/GRN
H34
H_3P0
@
Dummy
H23
H_4P1X3P1N
@
H_3P1N
@
H35
H33
H27
BATT_FULL_LED# 41
H28
H29
H_3P0N
@
H_3P0
@
H32
H_3P7
@
H_3P7
@
H_3P7
@
WL&BT LED
CPU
HT-210UD/UYG_AMB/GRN
H_3P7
@
B
H31
H30
H36
3G
H37
H_3P7
@
H20
H_3P7
@
H21
H38
MINI CARD
H_3P2
@
H39
H_3P7
@
H_3P2
@
WL_BT_LED# 41
MDC
D25
2
2
1
120_0402_5%
HT-110UD_1204_AMBER
WLAN@
WLAN@
1
R400
+3VS
H13
BATT_CHG_LOW_LED# 41
H_3P0
@
H24
1
R398
+3VALW
D24
2
120_0402_5%
H_3P0
@
H12
D23
Vf=1.9V(typ),2.4V(max) for amber

Vf=2.0V(typ),2.4V(max) for green
If=30mA(max)
1
R399
H_3P0
@
H11
BATT CHARGE/FULL LED
+3VALW
H_3P0
@
H10
1
6
H9
POWER/SUSPEND LED
D22
2
2
1
120_0402_5%
1
R397
27,41,45
+3VALW
ACIN
Vf=2.0V(typ),2.4V(max)
If=30mA(max)
DC-IN LED
H8
Screw Hole
C
H_3P7
@
H22
FD5
2N7002DW-T/R7_SOT363-6
@
1
R50
FD6
@
FD7
@
FD8
@
2
0_0402_5%
Compal Secret Data
2009/01/23
Issued Date
Deciphered Date
2010/01/23
5
H_3P0
@
PCB Fedical Mark PAD
1
Q9A
2N7002DW-T/R7_SOT363-6
4
Q9B
H_3P0
@
H_3P0
@
D27
2
2
1
120_0402_5%
+3VS
A
2 R404
1
10K_0402_5%
+3VS
HDD LED
1
R405
SATA_LED# 25
VGA
Title

Size
Document Number
Rev
D
401717
Date:
Sheet
1
43
of
58
+5VALW TO +5VS
+3VALW TO +3VS
+3VALW
+3VS
+1.5V to +1.5VS
+5VALW
Vgs=-0V,Id=9A,Rds=18.5mohm
+5VS
+1.5V
4.7U_0805_10V4Z
+1.5VS
4.7U_0805_10V4Z
FDS6676AS
C469
2
2
R408
R414
820K_0402_5%
1 R411
2
+VSB
220K_0402_5%
470_0805_5%
2
1U_0402_6.3V4Z
FDS6676AS_SO8
1
3 1
C464
Q12A
Q12B
SUSP 5
2
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
Q11B
SUSP 5
2
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
1
2
3
4
3 1
Q11A
C463
S
S
S
G
R413
200K_0402_5%
@
470_0805_5%
2
C468
D
D
D
D
+VSB
Q31
8
7
6
5
C467
1U_0402_6.3V4Z
1 R410
2
47K_0402_5%
R407
C470
Q10B
0.1U_0402_25V6
SI4800BDY_SO8
Q10A
SUSP
2
5
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
1
2
3
4
4.7U_0805_10V4Z
S
S
S
G
Vgs=10V,Id=14.5A,Rds=6mohm
R412
330K_0402_5%
+VSB
D
D
D
D
C462
C466
0.022U_0402_25V7K
4.7U_0805_10V4Z
C465
1 R409
2
47K_0402_5%
8
7
6
5
1U_0402_6.3V4Z
SI4800BDY_SO8
R406
C461
0.01U_0402_25V7K
4.7U_0805_10V4Z
1
2
3
4
S
S
S
G
Q30
3 1
D
D
D
D
C460
8
7
6
5
C459
1
4.7U_0805_10V4Z
470_0805_5%
Q29
+3VALW TO +3V_LAN
+3VALW
+3VALW
+3VALW
1
@ Q44B
2N7002DW-T/R7_SOT363-6
2
1
R158
5,49 VTTPWROK
1
C476
4.7U_0805_10V4Z
1
C477
1U_0402_6.3V4Z
0.75VR_EN
2
100K_0402_5%
@ Q44A
2N7002DW-T/R7_SOT363-6
SUSP
0.75VR_EN# 52
+3V_LAN
5
4
R425 @
100K_0402_5%
PJ24
JUMP_43X79
@
C474
0.01U_0402_25V7K
2
47K_0402_5%
Q32
AO3413_SOT23
1
R416
WOL_EN#
37,41
C471
0.1U_0402_16V7K
R415
100K_0402_5%
Vgs=-4.5V,Id=3A,Rds<97mohm

+5VALW
+0.75VS
+3VS
R422
100K_0402_5%
SUSP
SUSP
9,52
R421
47_0805_5%
C473
0.1U_0402_16V7K
@
Q6B
2N7002DW-T/R7_SOT363-6
Q5B
2N7002DW-T/R7_SOT363-6
SUSP
36,38,41,47,50,52,54
another at page43
SUSP#
R423
10K_0402_5%
Compal Secret Data
2009/01/23
Issued Date
Deciphered Date
2010/01/23
A
Title

Size
Document Number
Rev
D
401717
Date:
Sheet
E
44
of
58
VS
VIN
1
N1
PR3
5.6K_0402_5%
PC6
.1U_0402_16V7K
27,41,43
PACIN
LM393DG_SO8
PACIN
47
ACIN
PU1A
PD1
GLZ4.3B_LL34-2
PR7
10K_0402_1%
1
PR8
10K_0402_1%
RTCVREF
Vin Detector
3.3V
VIN
PC5
0.068U_0402_10V6K
PR6
20K_0402_1%
PR5
22K_0402_1%
1
2
PC4
100P_0402_50V8J
PR4
10K_0402_1%
1
2
PR2
84.5K_0402_1%
1
2
1
2
@ PC68
680P_0402_50V7K
@ SINGA_2DW-0005-B03
PC2
100P_0402_50V8J
PC3
1000P_0402_50V7K
PC1
1000P_0402_50V7K
+
1
DC_IN_S2
10A_125V_451010MRL
DC_IN_S1
PJP1
PF1
DC301001M80
PR1
1M_0402_1%
1
2
VIN
PL1
SMB3025500YA_2P
1
2
High 18.384 17.901 17.430

Low 17.728 17.257 16.976
PD3
RLS4148_LL34-2
PR10
68_1206_5%
2
PR11
200_0603_5%
1
2
CHGRTCP
N1
VS
PD4
2
VIN
N3
RLS4148_LL34-2
2
2
PR15
22K_0402_1%
B+
PR14
1K_1206_5%
RTC Battery
PR16
1K_1206_5%
RTCVREF
LM393DG_SO8
@ JUMP_43X118
+3VALW
(5A,200mils ,Via NO.= 10)
+1.5VP
+VTTP
+VSB
PJ14
+VTT
2
1
Precharge detector
15.97V/14.84V FOR
ADAPTOR

PJ11
2
+5VALWP
+1.1VS
+1.05VS
PQ3
DTC115EUA_SC70-3
@ JUMP_43X79
1
(7.0A,280mils ,Via NO.=14)
@ JUMP_43X118
+0.75VS
@ JUMP_43X79
+1.05VSP
OCP(min)=20.64A
2
+1.1VSP
@ JUMP_43X118
PJ10
2
PACIN
PJ13
PR27
47K_0402_1%
PQ2
2
2
1
SSM3K7002FU_SC70-3
G
(18A,720mils ,Via NO.=36)
(120mA,40mils ,Via NO.= 1)
+0.75VSP
@ JUMP_43X118
PJ8
PJ5
2
@ JUMP_43X39
+1.5V
OCP(min)=18.14A
+5VALW
PJ7
2
PC11
1000P_0402_50V7K
OCP(min)=7.9A
2
PR24
499K_0402_1%
PR26
191K_0402_1%
@ JUMP_43X118
+VSBP
@ PR25
@PR25
66.5K_0402_1%
(15A,600mils ,Via NO.= 30)
PJ4
2
RTCVREF
@ JUMP_43X118
OCP(min)=7.7A
2
PC12
1000P_0402_50V7K
PR23
10K_0402_1%
PJ2
@ JUMP_43X118
+5VALWP
PC13
1000P_0402_50V7K
+3VALWP
PJ9
2
PJ1
ACON
47
PU1B
7
SP093MX0000
1U_0805_25V4Z
EN0
48
PD5
RB715F_SOT323-3
@ MAXEL_ML1220T10
PC10
PC9
10U_0805_10V4Z
PR18
499K_0402_1%
N2
PR20
2.2M_0402_5%
2
1
IN
GND
+RTCBATT
VL
OUT
+RTCBATT
PR19
100K_0402_1%
1
2
PBJ1
2
3.3V
G920AT24U_SOT89-3
PU2
+CHGRTC
PR22
560_0603_5%
1
2
PR17
200_0603_5%
PR21
560_0603_5%
1
2
51_ON#
43
PC8
0.1U_0603_25V7K
PC7
0.22U_0603_25V7K
PR13
100K_0402_1%
PR12
1K_1206_5%
PR9
PQ1
68_1206_5%
TP0610K-T1-E3_SOT23-3
2
BATT+
PD2
RLS4148_LL34-2
OCP(min)=8.4A
4
@ JUMP_43X79
PJ16
(1.5A,60mils ,Via NO.= 4)

+VGA_COREP
+VGA_CORE
@ JUMP_43X118
PJ15
+1.8VSP
@ JUMP_43X79

OCP(min)=4.9A
A
+1.8VS
(26A,1040mils ,Via NO.=52)

OCP(min)=20.14A(M92)
Issued Date
OCP(min)=28.65A(M96)
Compal Secret Data
2009/01/23
Deciphered Date
2010/01/23
B
Title

Size
Document Number
Rev
D
401717
Date:
Sheet

D
45
of
58
PH1 under CPU botten side :

CPU thermal protection at 92 degree C
Recovery at 56 degree C
VMB
For 16"
PF2
15A_65V_451015MRL
1
2
PJP2
1
3
PQ4
SSM3K7002FU_SC70-3
ENTRIP2
48
PD6
RLS4148_LL34-2
LM393DG_SO8
PQ5
SSM3K7002FU_SC70-3
2
G
VL
PR38
100K_0402_1%
PR40
100K_0402_1%
2
PR35
100_0402_1%
BATT_TEMPA 41
PR34
100_0402_1%
PU3A
PR39
1K_0402_1%
@ SUYIN_200045MR009G171ZR
2
G
1
2
1
2
PR37
15.8K_0402_1%
+3VALWP
PC17
0.22U_0805_16V7K
1
3
PR36
6.49K_0402_1%
2
1
PC18
1000P_0402_50V7K
GND
GND
GND
GND
10
11
12
13
TM_REF1
@PD14
@
PD14
2
PJSOT24C_SOT23-3
3
BATT_S1
BATT_P3
BATT_P4
BATT_P5
EC_SMDA
EC_SMCA
PR33
12.4K_0402_1%
1
2
@ PD15
@PD15
PJSOT24C_SOT23-3
PJP3
1
2
3
4
5
6
7
8
9
PR31
47K_0402_1%
1
2
100K_0402_1%_TSM0B104F4251RZ
PR30
47K_0402_1%
1
PC16
0.1U_0603_25V7K
PH1
PC15
0.01U_0402_25V7K
PC14
1000P_0402_50V7K
PR32
1K_0402_1%
@ SUYIN_200045MR009G171ZR
1
2
3
4
5
6
7
8
9
48
BATT+
+3VALWP
2
PR29
47K_0402_1%
2
PR28
1K_0402_1%
BATT_P3
BATT_P4
BATT_P5
EC_SMDA
EC_SMCA
For 17"
ENTRIP1
BATT_S1
GND
GND
GND
GND
1
2
3
4
5
6
7
8
9
VL
VL
10
11
12
13
1
2
3
4
5
6
7
8
9
VL
PL2
SMB3025500YA_2P
1
2
EC_SMB_DA1 41
EC_SMB_CK1 41
PH2 near main Battery CONN :

BAT. thermal protection at 90 degree C
Recovery at 55 degree C
VL
8
5
6
PR46
16.9K_0402_1%
PU3B
O
PC21
0.22U_0805_16V7K
LM393DG_SO8
PD7
RLS4148_LL34-2
2
1
PR48
0_0402_5%
2
PQ7
SSM3K7002FU_SC70-3
2
G
@ PC22
.1U_0402_16V7K
1
POK
TM_REF1
PR47
100K_0402_1%
48
2
PR44
12.1K_0402_1%
1
2
1
1
2
2
1
2
100K_0402_1%_TSM0B104F4251RZ
PR42
47K_0402_1%
1
2
PR45
22K_0402_1%
1
2
PR41
47K_0402_1%
PH2
VL
PC19
0.22U_1206_25V7K
2
1
PR43
100K_0402_1%
+VSBP
1
PC20
0.1U_0603_25V7K
B+
VL
2
PQ6
TP0610K-T1-E3_SOT23-3
Issued Date
Compal Secret Data
2009/01/23
Deciphered Date
2010/01/23
A
Title

Size
Document Number
Rev
D
401717
Date:
Sheet

D
46
of
58
B+
PHASE
18
VREF
UGATE
17
CHLIM
BOOT
16
10
ACLIM
VDDP
15
11
VADJ
LGATE
14
GND
PGND
13
4.7U_1206_25V6K
PC25
4
4.7U_1206_25V6K
2
1
PC24
1
1
PR64
2.2_0603_1%
5
6
7
8
LX_CHG
PR72
20K_0402_1%
12
DL_CHG
26251VDD
PD12
RB751V-40TE17_SOD323-2
6251VDDP
PQ21
6251aclim
PC39
0.1U_0603_25V7K
BST_CHGA 2
1
3
2
1
PR70
53.6K_0402_1%
6251VREF 1
2
DH_CHG
PR69
0_0603_5%
BST_CHG 1
PL3
10U_LF919AS-100M-P3_4.5A_20%
CHG
1
2
PR73
4.7_0603_5%
PC43
4.7U_0805_6.3V6K
PR66
0.02_2512_1%
4
BATT+
PC41
10U_1206_25V6M
2
1
ICM
19
PQ19
AO4466_SO8
2 PACIN
G
PQ18
SSM3K7002FU_SC70-3
CSIP
PC40
10U_1206_25V6M
2
1
VCOMP
20
CSIN
ICOMP
PC32
0.1U_0603_25V7K
21
PD11
2
PR220
4.7_1206_5%
CSOP
CSON
AO4466_SO8
CELLS
PR60
20_0603_5%
1
2
PC31
0.047U_0603_16V7K
1
2
PR61
20_0603_5%
2
1
PR62
PC35
20_0603_5%
0.1U_0603_25V7K
1
2
ACOFF
PR57
200K_0402_1%
1
2 VIN
5
6
7
8
22
3
2
1
CSON
EN
1SS355_SOD323-2
PQ17
DTC115EUA_SC70-3
VIN
PD9
1SS355_SOD323-2
23
PC30
0.1U_0603_25V7K
2
1
6251VREF
4.7U_1206_25V6K
2
1
470P_0402_50V7K
2
1
PC23
3
ACSET ACPRN
PC169
680P_0603_50V8J
DCIN
24
PR71
120K_0402_1%
DCIN
IREF
SUSP# 36,38,41,44,50,52,54
PR68
41
154K_0402_1%
2
1
1
1
@PC37
@
PC37 100P_0402_50V8J
1
2
PC38
.1U_0402_16V7K
ADP_I
VDD
41
PU5
1
PR65 47K_0402_1%
7
2
2
1
1
ACOFF
2 1
0.01U_0402_25V7K
PC42
0.01U_0402_25V7K
2
1
ACOFF
6.81K_0402_1%
2
PR55
10K_0402_1%
RB715F_SOT323-3
41
PR63
6800P_0402_25V7K
2
PR52
47K_0402_1%
1
2
FSTCHG
1
3
PC36
1
2
PR67
22K_0402_5%
PACIN 1
2
PQ22
DTC115EUA_SC70-3
PC28
2.2U_0603_6.3V6K
2
1
1
2
PC34
1
PQ20
SSM3K7002FU_SC70-3
6251_EN
AO4407A_SO8 PQ11
1
8
2
7
3
6
5
PD8
@ PC33
@PC33
680P_0402_50V7K
1
2
2
G
ACON
PR58
100K_0402_1%
PC29
.1U_0402_16V7K
PR59
150K_0402_1%
FSTCHG
PQ14
DTC115EUA_SC70-3
PR54
100K_0402_1%
2
1
41
PACIN
CSIN
DCIN
6251VDD
PR56
10K_0402_1%
2
1
CSON
45
@ JUMP_43X118
PR53
100K_0402_1%
PQ15
DTC115EUA_SC70-3
PQ16
SSM3K7002FU_SC70-3
P3
PD10
1SS355_SOD323-2
1
2
2
G
CHG_B+
PQ12 TP0610K-T1-E3_SOT23-3
PR196 10_0603_5%
3
1
1
2
AO4407A_SO8 PQ10
1
8
2
7
3
6
5
PJ17
2
PC182
2
1
45
PR49 0.015_2512_1%
4
0.1U_0603_25V7K
2
1
CSIP
PC26
5600P_0402_25V7K
PC27
0.1U_0603_25V7K
2
PR51
47K_0402_1%
8
7
6
5
PR50
200K_0402_1%
PQ13
DTA144EUA_SC70-3
AO4407A_SO8
PQ9
1
2
3
B+
P3
AO4407A_SO8
1
2
3
8
7
6
5
PC144
P2
PQ8
VIN
@PC188
@
PC188
0.1U_0603_25V7K
1
2
ISL6251AHAZ-T_QSOP24
Iada=0~3.42A(65W)
CP= 92%*Iada; CP=3.147A
41 CHGVADJ
PR75
31.6K_0402_1%
VIN
PR74
15.4K_0402_1%
1
2
1
Iada=0~4.737A(90W) CP= 92%*Iada; CP=4.36A
CP mode
PR70=53.6k
Vaclim=1.08V(65W)
PR70=75k
PR49=0.015
PR76
309K_0402_1%
PR77
47K_0402_1%
IREF=1.016*Icharge
Vcell
IREF=0.254V~3.048V
4V
VCHLIM need over 95mV
4.2V
1.882V
4.35V
3.2935V
CELL number
41
PC44
.1U_0402_16V7K
CHGVADJ=(Vcell-4)/0.10627
CC=0.25A~3A
CELLS
ADP_V
@PD13
@
PD13
GLZ4.3B_LL34-2
PR98 10K_0402_1%
1
2
PR49=0.02
Vaclim=0.736V(90W)
VDD
GND
Float
CHGVADJ
0V
Issued Date
Compal Secret Data
2009/01/23
Deciphered Date
2010/01/23
A
Title

Size
Document Number
Rev
D
401717
Date:

D
Sheet
47
of
58
PC45
1U_0603_10V6K
2VREF_51125
B++
PR78
13K_0402_1%
1
2
PR79
30K_0402_1%
1
2
PR80
20K_0402_1%
1
2
PR81
19.1K_0402_1%
1
2
B++
2
G
3
2
1
2
B++
2VREF_51125
PC57
4.7U_0805_10V6K
@ PR90
0_0402_5%
VL
1
3
2
1
TPS51125RGER_QFN24_4X4
1
+
+5VALWP
PC54
220U_6.3V_M
5
6
7
8
PQ26
AO4712_SO8
VCLK
18
17
16
PL5
4.7U_LF919AS-4R7M-P3_5.2A_20%
1
2
LG_5V
46
PR87
4.7_1206_5%
19
PQ24
AO4466_SO8
PC56
680P_0603_50V8J
DRVL1
5
6
7
8
DRVL2
POK
PC49
10U_1206_25V6M
12
EN0
23
LX_5V
13
24
20
45
VO1
PGOOD
PC48
2200P_0402_50V7K
ENTRIP1
1
ENTRIP1
LL1
PR89
100K_0402_5%
1
2
LL2
PR88
499K_0402_1%
1
2
PC87
1U_0402_6.3V6K
VFB1
11
PQ28
SSM3K7002FU_SC70-3
VREF
LX_3V
VREG5
21
VIN
22
DRVH1
2
G
46
VBST1
DRVH2
2
1
PC58
0.1U_0603_25V7K
D
PQ27
SSM3K7002FU_SC70-3
VL
ENTRIP2
46
ENTRIP1
VFB2
VBST2
10
GND
8
7
6
5
TONSEL
UG_3V
SKIPSEL
BST_3V
PC52
PR85
.1U_0402_16V7K
BST_5V 1
2 1
2
0_0603_5%
UG_5V
EN0
B+
ENTRIP2
VREG3
LG_3V
VO2
PQ25
AO4712_SO8
1
2
3
PR86
4.7_1206_5%
2
1
PC51
.1U_0402_16V7K
PC55
680P_0603_50V8J
2
1
PC53
220U_6.3V_M
Ipeak=5A
Imax=3.5A
F=305kHZ
Total capacitor
220u
ESR=15m ohm
PR84
2 1
2
0_0603_5%
PR83
150K_0402_1%
2
15
1
2
3
+3VALWP
P PAD
PL4
4.7U_LF919AS-4R7M-P3_5.2A_20%
1
2
ENTRIP2
25
14
PU6
PQ23
AO4466_SO8
PC50
4.7U_0805_10V6K
PC183
PR82
150K_0402_1%
1
2
8
7
6
5
+3VLP
PC47
10U_1206_25V6M
JUMP_43X118
PC46 2200P_0402_50V7K
B+
0.1U_0603_25V7K
2
1
PJ18
Ipeak=5A
Imax=3.5A
F=245kHZ
Total capacitor
220u
ESR=15m ohm
1
PC59
0.01U_0402_16V7K
PR92
100K_0402_1%
PQ29
SSM3K7002FU_SC70-3
2
G
1
1
PR93
49.9K_0402_1%
VS
PR91
100K_0402_1%
Compal Secret Data
2009/01/23
Issued Date
Deciphered Date
2010/01/23
5
Title

Size
Document Number
Rev
D
401717
Date:
Sheet
1
48
of
58
PL6
HCB4532KF-800T90_1812
+VTTP_VCC
VCC
1
2
PR97
4.7_0603_5%
1
2
+VTTP_VCC
BST_+VTTP
BOOT
15
PR96
0_0402_5%
PQ30
PC65
2.2U_0603_6.3V6K
4
PVCC
14
LG
13
PGND
12
PC64
2.2U_0603_6.3V6K
DL_+VTTP
PL7
1.0UH_PCMC104T-1R0MN_20A_20%
1
2
2
1
2
.1U_0402_16V7K
@ PC229
2
1
100K_0402_5%
@ PR290
@ PR292
10K_0402_5%
2
PMBT2222A_SOT23-3
@ PQ55
1
+
PR100
4.7_1206_5%
2
PC70
680P_0603_50V8J
3
2
1
10
PR108
4.42K_0402_1%
2+VTTP
PR107
0_0402_5%
2
PR109
10_0402_5%
2
PR110
10_0402_5%
1
3
PQ31
VO
FSET
9
2
PR106
3.32K_0402_1%
@ PQ56
2N7002W-T/R7_SOT323-3
180K_0402_1%
@ PR291
1
1
0.01U_0402_16V7K
@ PC228
8 H_VTTSELECT
2
G
100K_0402_5%
@ PR294
2
@ PR105
40.2K_0402_1%
@ PR293
4.7K_0402_5%
1
2
2
PR99
4.99K_0402_1%
+VTTP
Material Note:
330uF/ 6mohm, number are 3,
power x1, HW x2
+3VS
+3VS
SE_+VTTP 1
2
1
@ PC71
0.01U_0402_16V7K
FB_+VTTP
FB
NC
6
11
+VTTP
PR104
57.6K_0402_1%
2
1
PC72
33P_0402_50V8J
H_VTTVID1= Low, 1.1V

H_VTTVID1= High, 1.05V
ISEN
PR103
33.2K_0402_1%
2
1
2
1
PC73
2200P_0603_50V7K
PR102
0_0402_5%
2
1
PC69
.1U_0402_16V7K
41 VTTP_EN
EN
TPCA8028-H_SOP-ADVANCE8-5
APW7138NITRL_SSOP16
Ipeak=18A
Imax=12.6A
F=231.5kHZ
Total capacitor 990u
ESR=2.25m ohm
TPCA8030-H_SOP-ADV8-5
UG
PC67
330U_D2E_2.5VM_R9M
+5VALW
PC63
0.1U_0603_25V7K
3
2
1
VIN
PHASE
3
+VTTP_VCC
PGOOD
8
GND
PU7
PR101 2K_0402_1%
16
DH_+VTTP
2
1
PR95 2.2_0603_1%
1
2
DH_+VTTP
PR94
6.81K_0402_1%
5,44
VTTPWROK
LX_+VTTP
2
1
PC62
4.7U_0805_25V6-K
2
1
PC61
4.7U_0805_25V6-K
PC85
2200P_0402_50V7K
2
1
PC60
4.7U_0805_25V6-K
+VTTP_B+
1
2
PC189
0.1U_0603_25V7K
B+
PC186
0.1U_0603_25V7K
2
1
VTT_SENSE 8
PJ23
+VTTP
VSS_SENSE_VTT 8
+1.05VS
@ JUMP_43X79
(7.0A,280mils ,Via NO.=14)
Compal Secret Data
Issued Date
2009/01/23
Deciphered Date
2010/01/23
A
Title

Size
Document Number
Rev
D
401717
Date:
Sheet
D
49
of
58
PJ19
DRVL
1
TPS51117RGYR_QFN14_3.5x3.5
2
@PC82
@PC82
4.7U_0805_10V6K
PC83
2200P_0402_50V7K
PC184
0.1U_0603_25V7K
1
2
@ PR114
4.7_1206_5%
@ PQ33
@PQ33
FDS6670AS_NL_SO8
4 G
DL_1.05V
B+
3
2
1
5
6
7
8
+5VALW
15
TP
PGND
8
@ PC81
@PC81
47P_0402_50V8J
1
2
GND
@PC79
@
PC79
4.7U_0603_6.3V6K
+1.05VSP
1
+
2
@ PC78
220U_6.3V_M
PGOOD
V5DRV
10
LX_1.05V
1
2
@PR116
@
PR116
10K_0402_1%
12
11
VFB
LL
TRIP
0.1U_0603_25V7K
@ PC80
680P_0603_50V8J
DH_1.05V
13
D
D
D
D
V5FILT
DRVH
S
S
S
VOUT
VBST
14
TON
Ipeak=7A
Imax=4.9A
F=315kHZ
ESR=5m ohm
@PL8
@
PL8
1.8UH_SIL104R-1R8PF_9.5A_30%
1
2
PC77
3
2
1
@PR115
@
PR115
100_0603_1%
1
2
@
1
+5VALW
@PU8
@
PU8
EN_PSV
@PC76
@PC76
.1U_0402_16V7K
@ JUMP_43X118
@ PR113 2.2_0603_1%
@PR113
BST_1.05V1
2
1
SUSP#
@PR111
@
PR111
255K_0402_1%
1
2
@ PR112
@PR112
0_0402_5%
1
2
2
@ PC75
4.7U_1206_25V6K
1
@PQ32
@
PQ32
AO4466_SO8
5
6
7
8
@ PC74
4.7U_1206_25V6K
1.05V_B+
@PR117
@
PR117
4.02K_0402_1%
1
2
@ PR118
@PR118
10K_0402_1%
PJ21
10
TP
PC86
2200P_0402_50V7K
1
2
1
2
PC187
0.1U_0603_25V7K
1
2
3
2
1
+5VALW
PR250
9.1K_0402_1%
PQ54
AO4712_SO8
DL_1.8VSP
4
1
PGND
DRVL
TPS51117RGYR_QFN14_3.5x3.5
2
PGOOD
@ PC178
47P_0402_50V8J
1
2
GND
PC177
4.7U_0603_6.3V6K
LX_1.8VSP
1
PC179
4.7U_0805_10V6K
+1.8VSP
1
+
2
PC181
220U_6.3V_M
V5DRV
TRIP
11
12
0.1U_0603_25V7K
PR251
4.7_1206_5%
LL
DH_1.8VSP
VFB
14
15
V5FILT
13
VOUT
DRVH
PC180
680P_0603_50V8J
VBST
TON
B+
PL17
4.7U_LF919AS-4R7M-P3_5.2A_20%
1
2
PC176
BST_1.8VSP
5
6
7
8
PR249
100_0603_1%
1
2
@ JUMP_43X118
+5VALW
PU9
EN_PSV
PC175
.1U_0402_16V7K
4
PR248 2.2_0603_1%
1
2
36,38,41,44,47,52,54 SUSP#
PR247
30K_0402_5%
1
2
3
2
1
2
PC174
4.7U_1206_25V6K
1
2
5
6
7
8
PQ53
AO4466_SO8
PR246
255K_0402_1%
1
2
PC173
4.7U_1206_25V6K
1.8VSP_B+
Ipeak=4A
Imax=2.8A
F=315kHZ
ESR=15m ohm
PR252
14K_0402_1%
1
2
4
PR253
10K_0402_1%
Issued Date
Compal Secret Data
2009/01/23
Deciphered Date
2010/01/23
A
Title

Size
Document Number
Rev
D
401717
Date:
Sheet

D
50
of
58
4.7U_0805_25V6-K
PC90
2
1
DH_1.5V
PR122
10K_0402_1%
BST_1.5V
PR123
0_0603_5%
PC91
0.1U_0603_25V7K
D
+5VALW
15
16
PQ34
BOOT
PR125
4.7_0603_5%
PVCC
14
2 PC92
2.2U_0603_6.3V6K
10
3
2
1
@PC99
@
PC99
0.01U_0402_25V7K
PR131
4.87K_0402_1%
PC100
2200P_0402_25V7K
PC95
220U_6.3V_M
VO
PR127
4.7K_0402_1%
3
2
1
FB
7
NC
6
2
PR129
49.9K_0402_1%
PC98
22P_0402_50V8J
PC97
.1U_0402_16V7K
0_0402_5%
ISEN_1.5V
PC94
10U_1206_25VAK
11
ISEN
EN
FSET
@ PR126
4.7_1206_5%
1 2
12
PGND
+1.5VP
0.9UH_MMD-10DZ-R90M-D1_25A_20%
1
2
APW7138NITRL_SSOP16
1210u
DL_1.5V
PC96
680P_0603_50V8J
13
PQ36
LG
VCC
57.6K_0402_1%
PR130
2
1
SYSON
PL10
PR128
36,41
Ipeak=15A
Imax=10.5A
F=231.5kHZ
Total capacitor
ESR=2.73m ohm
21.5V_VCC
3
2
1
VIN
UG
PHASE
1.5V_VCC
PGOOD
PC93
2.2U_0603_6.3V6K
2
1
GND
PU10
PR124
0_0603_5%
@ PQ35
1.5V_VCC
LX_1.5V
10U_1206_25VAK
PC89
2
1
PC185
PL9
HCB4532KF-800T90_1812
10U_1206_25VAK
PC88
2
1
PC84 2200P_0402_50V7K
2
1
2 B+_1.5V
0.1U_0603_25V7K
2
1
B+
PR132
3.24K_0402_1%
Compal Secret Data
Issued Date
2009/01/23
Deciphered Date
2010/01/23
5
Title


Custom
Date:
Rev
D
401717
Sheet
1
51
of
58
+1.5V
PJ25
@ JUMP_43X79
1
VCNTL
GND
NC
VREF
NC
VOUT
NC
TP
+5VALW
VIN
10U_0805_10V4Z
PC102
1
@
PR133
1K_0402_1%
9,44 SUSP
PR134
0_0402_5%
1
2
PU11
4.7U_0805_6.3V6K
PC101
2
1
PC103
1U_0603_10V6K
2
1
PC104
0.1U_0402_10V7K
1
2
+0.75VSP
PR136
1K_0402_1%
@ PC106
.1U_0402_16V7K
2
G
1
44 0.75VR_EN#
@ PR135
0_0402_5%
1
2
PQ37
2N7002KW_SOT323-3
G2992F1U_SO8
PC105
10U_0805_6.3V6M
+1.5V
PJ20
@ JUMP_43X79
PC107
1U_0603_6.3V6M
PU12
1
PR139
2.61K_0402_1%
16
1
2
PR140
4.7K_0402_5%
1
2
+3VS
PC111
22U_0805_6.3V6M
APL5930KAI-TRG_SO8
PR138
1K_0402_1%
PC110
22U_0805_6.3V6M
PC112
.1U_0402_16V7K
FB
+1.1VSP
EN
POK
3
4
8
7
VOUT
VOUT
PC109
0.01U_0402_25V7K
SUSP#
VCNTL
VIN
VIN
36,38,41,44,47,50,54
PR137
10K_0402_5%
1
2
6
5
9
GND
PC108
4.7U_0805_6.3V6K
+5VALW
PCIE_OK
Compal Secret Data
Issued Date
2009/01/23
Deciphered Date
2010/01/23
A
Title

Size
Document Number
Rev
D
401717
Date:
Sheet

D
52
of
58
CPU_VID4
CPU_VID5
CPU_VID6
1 PR231 1K_0402_1%
CPU_VID1
1 @ PR232 1K_0402_1%
1 PR233 1K_0402_1%
CPU_VID2
1 @ PR234 1K_0402_1%
CPU_VID3
1@ PR235 1K_0402_1%
CPU_VID3
1@ PR237 1K_0402_1%
CPU_VID4
CPU_VID5
1 PR239 1K_0402_1%
CPU_VID5
1 @ PR240 1K_0402_1%
CPU_VID6
1@ PR241 1K_0402_1%
CPU_VID6
H_DPRSLPVR 2
1 PR243 1K_0402_1%
H_DPRSLPVR 2
PR238 1K_0402_1%
PR242 1K_0402_1%
PQ39
PR145 0_0402_5%
1 @ PR244 1K_0402_1%
H_PSI#
PR146 0_0402_5%
2 @
1
+
2
B+
PR245 1K_0402_1%
PR147 0_0402_5%
VR_ON
+VTT
PC117
0.22U_0603_25V7K
1
2
PR148 2.2_0603_1%
BOOT2_2
1
2
BOOT2
PL12
0.36UH_PCMC104T-R36MN1R17_30A_20%
UGATE2
PR150 0_0402_5%
PHASE2
3
2
1
3
2
1
PR157
1.91K_0402_1%
2
PR161
1
8
H_PSI#
PR162
1
2
147K_0402_1%
LGATE
1
V2N
1
2
PC140
10U_1206_25V6M
2
1
3
2
1
PC141
PR188 2.2_0603_1%
0.22U_0603_25V7K
1
2 BOOT1_1 1
2
PC139
10U_1206_25V6M
PC138
470P_0603_50V8J
2
1
Layout Note:
Place near Phase1 Choke
3
2
1
PR194
1_0402_5%
@ PR198
0_0402_5%
1
V2N
@ PR200
0_0402_5%
1
V3N
2009/01/23
Issued Date
ISEN1
Deciphered Date

2010/01/23
Title
6
VSUM-
VSUM+
Compal Secret Data
+CPU_CORE
V1N
1
1
2
PR193
10K_0402_5%
PR192
3.65K_0805_1%
2
1
3
2
1
LGATE1
PR191
4.7_1206_5%
@ PQ47
PQ46
PHASE1
PH4
10K_0603_1%_TSM1A103F34D1RZ
PL14
0.36UH_PCMC104T-R36MN1R17_30A_20%
2
1
VSUM-
PQ45
UGATE1
VSUM-
@ PR170
1_0402_5%
+CPU_B+
@ PR202
100_0402_1%
@ PR173
3.65K_0805_1%
2
1
PR169
4.7_1206_5%
2
1
2
PC129
680P_0603_50V8J
3
2
1
3
2
1
@ PR179
0_0402_5%
1
1
2
2
PR189
2.61K_0402_1%
2
1
+CPU_CORE
V3N
@ PR175
0_0402_5%
1
2V1N
PC142
0.047U_0402_16V7K
2
1
82.5_0402_1%
21
@ PR174
10K_0402_5%
PC149
680P_0603_50V8J
1
@ PC150
1200P_0402_50V7K
ISEN3
VSSSENSE
PR195
1.2K_0402_1%
1
2
VSUM+
PC136
0.22U_0603_25V7K
PC135
1U_0603_10V6K
2
1
2
2
1
2
@ PR201 10_0402_5%
1
2
PC148
330P_0402_50V7K
0_0402_5%
2
PC147
1000P_0402_50V7K
PR199
1
PC146
1
PC145
330P_0402_50V7K
0.01U_0402_25V7K
1
PR187
2
2
0_0402_5%
PR185
8.25K_0402_1%
0_0402_5%
2
IMVP_IMON
PC137
0.22U_0603_25V7K
1_0402_5%
2
+5VALW
1
PR184
PR177
1
8
VSUM+
PR153
10K_0402_5%
@ PL13
0.36UH_PCMC104T-R36MN1R17_30A_20%
GND
@ PC120
10U_1206_25V6M
2
1
LGATE_CPU3
PWM PHASE
@ PC125
10U_1206_25V6M
2
1
PHASE_CPU3
PQ43
11
12
13
14
15
16
17
18
19
20
@
@ PC121
0.1U_0603_25V7K
2
1
5
UGATE_CPU3
3
2
1
40
39
38
37
36
35
34
33
32
31
BOOST_CPU31
BOOT1
0_0402_5%
PR190
VSSSENSE
1
8
0_0402_5%
2
+CPU_B+
1
2
0_0402_5%
1
2
PR183
0_0402_5%
2
@ PR186 10_0402_5%
@ PQ44
ISEN1
VCCSENSE
BOOT
FCCM UGATE
0_0402_5%
2
PC143
0.22U_0603_10V7K
2
1
ISEN2
Layout Note:
PH3 place near
Phase1 L-MOS
PR168
1
PR197
11K_0402_1%
2
1
PR182
@ PC123
0.22U_0603_25V7K
PC151
.1U_0402_16V7K
ISEN3
PC134 0.22U_0402_6.3V6K
PC132
PR181
150P_0402_50V8J 412K_0402_1%
VCC
PR180
1
@ PR221
+CPU_CORE
AGND
PR178
2.43K_0402_1%
1
2
V3N
@ ISL6208CRZ-T_QFN8
PC130
2
41
@ PQ42
@ PR165
0_0603_5%
390P_0402_50V7K
PGOOD
PSI#
RBIAS
VR_TT#
NTC
VW
COMP
FB
ISEN3
ISEN2
PC133 0.22U_0402_6.3V6K
2
1
1
2
PR171
8.06K_0402_1%
1
2
PC127
1000P_0402_50V7K
PR172
249K_0402_1%
1
2
PR176
562_0402_1%
1
2
1
2
PC131
10P_0402_50V8J
PC126
22P_0402_50V8J
V1N
@ PR158
0_0402_5%
1
ISEN2
PU13
1
2
3
4
5
6
7
8
9
10
PR164
0_0402_5%
30
29
28
27
26
25
24
23
22
21
H_PROCHOT#_R
BOOT2
UGATE2
PHASE2
VSSP2
LGATE2
VCCP
PWM3
LGATE1
VSSP1
PHASE1
@ PC122
1U_0603_10V6K
56P_0402_50V8
2
@ PH3
470KB_0402_5%_ERTJ0EV474J
PR154
1_0402_5%
@ PR156
0_0402_5%
1
VSUM-
+5VALW
0_0402_5%
PC128
1U_0603_10V6K
2
1
PR166
4.02K_0402_1%
2
2
+CPU_B+
+5VALW
PC119
1U_0603_10V6K
1
2
CLK_EN#
DPRSLPVR
VR_ON
VID6
VID5
VID4
VID3
VID2
VID1
VID0
68_0402_5%
1
2
PC170 0.22U_0402_6.3V6K
2
1
PR163
VSUM-
@ PC124
1
2
PU14
5,41 H_PROCHOT#
+CPU_CORE
V2N
ISL62883HRZ-T_QFN40_5X5~D
+VTT
@ PR167
1
0_0402_5%
2
ISEN1
VSEN
RTN
ISUMISUM+
VDD
VIN
IMON
BOOT1
UGATE1
PR151
4.7_1206_5%
@ PR160 1K_0402_1%
1
2
+VTT
VSUM+
PR159
0_0402_5%
1
VGATE
27,41
2
1
PR152
3.65K_0805_1%
2
1
LGATE2
CLK_ENABLE#
PR155
1.91K_0402_1%
1
PC118
680P_0603_50V8J
@ PQ40
+3VS
PQ41
22 CLK_ENABLE#
8 H_DPRSLPVR
PR149 0_0402_5%
41
PL11
HCB4532KF-800T90_1812
1
2
PR236 1K_0402_1%
CPU_VID4
@ PC190
0.1U_0603_25V7K
2
1
1
PR144 0_0402_5%
CPU_VID2
+CPU_B+
PC171
220U_25V_M
CPU_VID3
CPU_VID1
PC172
100U_25V_M
CPU_VID2
PR143 0_0402_5%
1 @ PR230 1K_0402_1%
PR142 0_0402_5%
CPU_VID1
CPU_VID0
PC116
10U_1206_25V6M
2
1
CPU_VID0
1 PR229 1K_0402_1%
3
2
1
PC115
10U_1206_25V6M
PR141 0_0402_5%
H
CPU_VID0
PC113
2200P_0402_50V7K
2
1
PC114
470P_0603_50V8J
2
1
Size
C
Date:
2
Document Number
Rev
D
401717
Sheet
53
1
of
58
2 B+_core
B+
4.7U_0805_25V6-K
PC154
2
1
6268_VCC
DH_VCORE
PR203
10K_0402_1%
PR204 2.2_0603_1%
1
2
1
2
BST_VCORE
PC155
0.1U_0603_25V7K
10U_1206_25VAK
PC153
2
1
LX_VCORE
10U_1206_25VAK
PC152
2
1
PL15
HCB4532KF-800T90_1812
+5VALW
15
16
PQ48
26268_VCC
BOOT
PR206
4.7_0603_5%
PVCC
14
2 PC156
3
2
1
VIN
UG
PHASE
6268_VCC
PGOOD
8
GND
PU15
PR205
0_0603_5%
PC157
2.2U_0603_6.3V6K
2
1
2.2U_0603_6.3V6K
PL16
1
2
PC161
10U_1206_25VAK
1
2
PC158
10U_1206_25VAK
PC160
330U_D2E_2.5VM_R9M
3
2
1
PR211
10_0402_5% +VGA_CORE
1
2
@PC164
@
PC164
0.01U_0402_25V7K
1000P_0402_50V7K
@ PC166
2
1
0_0402_5%
10
3
2
1
PR210
1
5
2
PR209
7.15K_0402_1%
VO
FSET
9
FB
7
NC
6
2
PR212
49.9K_0402_1%
ISEN_VCORE 1
11
PR214
4.75K_0402_1%
PC163
22P_0402_50V8J
EN
PC162
.1U_0402_16V7K
0_0402_5%
57.6K_0402_1%
PR213
2
1
2
1
SUSP#
@PR207
@
PR207
4.7_1206_5%
1 2
ISEN
APW7138NITRL_SSOP16
12
+VGA_COREP
0.56U_PCMC104T-R56MN_25A_20%
1
2
@ PC159
680P_0603_50V8J
PGND
DL_VCORE
PQ50
13
LG
VCC
PQ49
PR208
8,41,44,47,50,52
PC165
2200P_0402_25V7K
High
0.98 V
0.98 V
Low
1.1 V
1.2 V
resistor setting
PR214 = 4.75K
PR218 =7.5K
PR215 =23.7K
PR214 = 4.75K
PR218 = 7.5K
PR215 = 13K
Imax=18.23A
Ipeak=26.05A
Iocp=28.65A
Imax=12.81A
Ipeak=18.30A
Iocp=20.14A
PR209=7.15K
PQ50=unpop
PR209=5.36K
PQ50=unpop
2
1
1
1
1 1
1
2
G
Core Voltage Level
M92
PC168
0.01U_0402_25V7K
Core Voltage Level
M96
SSM3K7002FU_SC70-3
PQ52
VGA_PWSELECT
M92
PC167
.1U_0402_16V7K
M96
FSW=1/(75E-12*57.6K)=231.48KHz
2
G
PR216
10K_0402_1%
PR217
15K_0402_1%
1
2
7.5K_0402_1%
VFB(0.6)=Vout*Rbottom/(Rtop+Rbottom)
PR218
SSM3K7002FU_SC70-3
PQ51
+5VALW
PR215
23.7K_0402_1%
2
VGA_PWRSEL 14
PR219
0_0402_5%
Compal Secret Data
Issued Date
2009/01/23
Deciphered Date
2010/01/23
5
Title


Custom
Date:
Rev
D
401717
Sheet
1
54
of
58
PIR (Product Improve Record)

NSWAA LA-5322P SCHEMATIC CHANGE LIST
REVISION CHANGE: 0.1 TO 0.2
NO DATE
PAGE
MODIFICATION LIST
PURPOSE
-------------------------------------------------------------------------------------------------------------------------------------------------------3/25
31,32
DEL L14,C302,L15,C312,L16,C314,C315,L19,C339,C340
DG1.5: these pins have internal VRM

NO DATE
PAGE
MODIFICATION LIST
PURPOSE
-------------------------------------------------------------------------------------------------------------------------------------------------------6/29
11
Add R92,R93
To support M1 mode
6/29
27
Change R324 from 10K to 330K
To solve ACIN LED issue
7/02
30
Change BT_PWR# from GPIO0 to GPIO34, add
For common design with NSKAA
VGA_HDMI_HPD on GPIO0.
7/02
35
DEL JCAM (R431,R432,C403,R371,R373,R374,R375,L20)
7/02
22
DEL R387
CAM cable combine with LVDS

Remove +5VALW power to camera
7/02
40
DEL YC1,CC10,CC12
Remove 12MHz crystal to cardreader
7/02
40
DEL RC2
Remove +3VALW to cardreader
7/02
15~18
Add LV31,CV253,CV236,CV270,LV35,LV36,CV303,CV304,
Reserve for support Park/Madsion
CV305,CV306,CV307,CV308,LV34,RV157,RV156,RV24,RV56
RV59,RV60,RV126,RV127
7/03
22
Add R120,R401
7/03
22,30
Add R154
Reserve +1.5VS to clk gen for low power clk gen test
Reserve LVDS_SEL on PCH GPIO45
7/03
30,41
Connect PCH GPIO33 to EC pin 103 as PWRME_CTRL
To reflash ME BIOS
7/17
43
Add R50 on SATA_LED#
7/17
29
DEL R277,D12, Connect USB_OC#3_D to USB_OC#3
Change 3G_OFF# from EC pin 103 to pin 107

Reserve for cost down plan
7/17
27,41,43
DEL R384, D14. Add R331
Modify ACIN circuit
7/17
22,43
Change Q7,Q34 to Dual Q35
For cost down
7/20
5,9,11,
Add Q41,R19,R123,R22,D54,U10,R33,R52,Q33,R424,R417,
Reserve S3 power reduction circuit
30,44
C179,Q46,C472,R417,R418,C205,C186,C185,C180,PJ30,PJ31,
R80,Q44,R425,R158,Q39,Q40,R94,R95,R122,R121
Add RST_GATE on PCH GPIO46

7/27
41
Add R5
To solve SYSON glitch issue
7/27
30,41
Connect PCH GPIO49 to EC pin25 as THM_ALT#
Reserve for test
7/27
8,9,11,
Add C144,C159,C218,C216,C217,CV309,CV310,CV311,CV312
For cost down
16,20
7/30
9,44
Add C160,C256,C257,C258,C473,C475
For EMI request
7/30
25,42
Change U13 to 8MB, U22 to 1MB
For SW and EC request
Compal Secret Data
2009/01/23
Issued Date
Deciphered Date
2010/01/23
5
Title

Custom
Rev
D
401717
Date:
Sheet
1
55
of
58
PIR (Product Improve Record)

D
NO DATE
PAGE
MODIFICATION LIST
PURPOSE
-------------------------------------------------------------------------------------------------------------------------------------------------------8/19
14,22
9/1
Add R159,R160 for VGA BKL control
Reserve for deep green test
Change +3VL to +3VALW, DEL PJ12
9/1
25,42
Change EC ROM to 256KB and PCH ROM to 4MB
For PVT test
9/1
34
Add L52,R72,R85,L53,R73,R87,L54,R77,R88
For EMI request
9/9
37
Connect WOL_EN# to LAN IC
For PVT test

NO DATE
PAGE
MODIFICATION LIST
PURPOSE
--------------------------------------------------------------------------------------------------------------------------------------------------------
9/30
25
Change C287,C290 from 18p to 15p
To fine tune RTC timing
9/30
Change R22 from 10k to 1k
Modify S3 circuit
10/28
Reserve C301,C384,C389
Reserve for S3 power saving circuit
Compal Secret Data
2009/01/23
Issued Date
Deciphered Date
2010/01/23
5
Title

Custom
Rev
D
401717
Date:
Sheet
1
56
of
58
NO DATE
PAGE
MODIFICATION LIST
PURPOSE
------------------------------------------------------------------------------------------------------------EVT
P47-PWR_CHARGER
Change PR65 100 to 47k
For CPU throtting setting (2009/05/20)
EVT
P48-PWR_3VALWP/5VALWP
Change PR81 19.6k to 19.1k
modify +5VALWP voltage to 5.14V (2009/05/20)
EVT
P49-PWR_+1.1V_VTTP
Add PR290 100K, PR291 180K, PR292 10K,

PR293 4.7K, PR294 100K, PC228 0.01U,
PC229 0.1U, PQ55,PQ56
Add switching circuit for H_VTTSELECT function (2009/05/20)
EVT
P49-PWR_+1.1V_VTTP
Change PR94 10K to 3.4K
Set VTTPWROK voltage level to 1.1V
(2009/05/20)
Add PR101 1K
EVT
P53-PWR_CPU_CORE
Remove PR186,PR201 10 Ohm
Modify CPU_CORE circuit
(2009/05/27)
EVT
P46-PWR_BATTERY CONN / OTP
Change PH1,PH2 0603 sizt to 0402 size
For cost down
EVT
P50-PWR_1.05VSP/1.8VSP
Change PR115,PR249 422Ohm to 100 Ohm
avoid 2nd source RT8209B can no power on
(2009/05/27)
(2009/06/05)
Change PC79,PC177 1U to 4.7U

EVT
Change PU12 APL5913 to APL5930
For cost down
EVT
P45-PWR_DCIN/DECTOR
Remove DC301000F00
Remove DC IN JACK((2009/06/05))
(2009/06/05)
EVT
P54-PWR_VGA_COREP
Change PR210 10 Ohm to 0 Ohm
Change VGA_CORE sense
from HW
terminal to PWR (2009/06/05)
Change PR211 0 Ohm to 10 Ohm

EVT
P54-PWR_VGA_COREP
Change PL16 0.36U to 0.56U
Change CPU_CORE CHOKE to 0.56U(2009/06/05)
EVT
Change PR116 14.7k to 10k
Set 1.05V OCP to 8.54A(2009/06/05)
Set 1.8V OCP to 4.93A(2009/06/05)
EVT
P51-PWR_1.5VP
Set 1.5V OCP to 17A(2009/06/05)
EVT
P49-PWR_+VTTP
Change VTT OCP to 19.7A(2009/06/05)
DVT
Add PC175 0.1U
For power sequence(2009/07/07)
Change PR247 0 to 30k

DVT
P49-PWR_+VTTP
Set OCP(2009/07/07)
DVT
P51-PWR_1.5VP
Set OCP(2009/07/07)
DVT
P45-PWR_CPU_CORE
PC133, PC134 SE083224Z80 to SE124224K80
PC133, PC134 tolerance Y5V to X5R(2009/0/07)
DVT
Change PC79, PC177 SE00000MAN0 to SE107475K80
Change part number(2009/07/07)
DVT
Add PC87 1U_0402_6.3V6K
Avoid pre-charge can not finish(2009/07/07)
DVT
Add PC45 0.22U to 1U
Prevent +3VALW/+5VALW cant boot up (2009/07/07)
DVT
P45-PWR_CPU_CORE
Change PR229~PR245 and PR160 10k to 1k
Change VID, PSI# and DPRSLPVR select resistor from 10k to 1k (2009/07/17)
DVT
P45-PWR_CPU_CORE
Change PR157 10k to 1.91k
Change PGOOD pull high resistor 10k to 1.91k(2009/07/17)
DVT
P45-PWR_CPU_CORE
Remove PH3, PC124, PR167
Modify circuit for CPU_CORE(2009/07/17)
Change PC133, PC134, PC170 pin 2 from GND to VSUMChange PR152, PR192 0402 size to 0805 size
DVT
Change +3VLP to +3VALWP
Remove +3VLP power rail (2009/07/17)
Compal Secret Data
Issued Date
2009/01/23
Deciphered Date
2010/01/23
Title

Size
Document Number
Rev
D
401717
Date:
Sheet
57
of
58
NO DATE
PAGE
MODIFICATION LIST
PURPOSE
------------------------------------------------------------------------------------------------------------DVT
P47-PWR_CHARGER
Reserve PC188 0.1U
Reserve for EMI solution (2009/07/23)
DVT
P49-PWR_+VTTP
Reserve PC189 0.1U
DVT
P49-PWR_+VTTP
Change PR95 0 ohm to 2.2 ohm
Add boot strap resistor (2009/07/23)
DVT
P49-PWR_+VTTP
Add PR100 4.7 ohm, PC70 680P
Add snubber (2009/07/23)
DVT
P49-PWR_+VTTP
Change PR94 3.4k to 1.5k, PR101 1k to 3k
For HW solution(S3 power reduction ) (2009/07/23)
DVT
P49-PWR_+VTTP
Add PJ23
For power test(2009/07/23)
DVT
Add 0.75VR_EN control signal
For HW solution(S3 power reduction ) (2009/07/23)
DVT
P53-PWR_CPU_CORE
Add PR151, PR191 4.7 ohm, PC118, PC149 680P
DVT
P53-PWR_CPU_CORE
Change PR148, PR188 0 ohm to 2.2 ohm
Add boot strap resistor (2009/07/23)
DVT
P53-PWR_CPU_CORE
Add PC190 0.1U
DVT
P45-PWR_CPU_CORE
Remove PQ40, PQ47
For design change(2009/07/28)
DVT
Change PC101 10U to 4.7U
For design change(2009/07/28)
DVT
Change PC106 SE076104KM8 to SE076104K80
Change to COMPAL PN(2009/08/03)
DVT
P45-PWR_CPU_CORE
Change PC151 SE076104KM8 to SE076104K80
Change to COMPAL PN(2009/08/03)
DVT
Change PC53, PC54, PC78, PC95, PC181

SF22001M200 to SF000001H00
SF22001M200 is forbids to use (2009/08/03)
P45-PWR_CPU_CORE
Change Ri for load line (2009/08/03)
DVT
P45-PWR_CPU_CORE
Remove PR202 100 ohm, PC150 1200P
Modify CPU_CORE circuit (2009/08/03)
DVT
P49-PWR_+VTTP
Change PU7 ISL6268 to APW7138
For cost down (2009/08/03)
DVT
Remove PC71 0.01U
For APW7138 solution (2009/08/03)

DVT
P51-PWR_1.5VP

Remove PC99 0.01U
DVT
P54-PWR_VGA_COREP
Remove PC164 0.01U
DVT
P51-PWR_1.5VP
Change PL9 SM01000DJ00 to SM010018210
Use same PN bead (2009/08/03)
DVT
P53-PWR_CPU_CORE
Change PL11 SM010020720 to SM010018210
DVT
P54-PWR_VGA_COREP
Change PL15 SM01000DJ00 to SM010018210
DVT
Set OTP (2009/08/03)

DVT
P47-PWR_CHARGER
Add PR220 4.7 ohm, PC169 680P
Add charger snubber(RF solution) (2009/08/03)
Add PC144 0.1U, PC182 470P
Add charger snubber(RF solution) (2009/08/03)
DVT
P45-PWR_CPU_CORE
Add PC113 2200P, PC114 470P, PC138 470P
RF solution (2009/08/03)
PVT
P42-PWR_+VTTP
Change PL7 0.47U to 1U
Design change (2009/09/04)
PVT
P42-PWR_+VTTP
Remove PC66, PC68 10U
Design change (2009/09/04)
PVT
P47-PWR_CHARGER
Change PR70 8.25k to 53.6k, PR72 26.7k to 20k
Set 90W CP (2009/09/04)
PVT
P45-PWR_DCIN/DECTOR
Add PC68 680P
For EMI solution (2009/09/14)
PVT
Add PD14, PD15
Reserve for EMI(ESD diode) (2009/09/14)
PVT
P42-PWR_+VTTP
Remove PR290, PR291, PR292, PR293, PR105,

PC228, PC229, PQ55, PQ56
Remove VTTP voltage switch circuit(arrandale only) (2009/09/14)
PVT
P47-PWR_CHARGER
Change PR64 PN SD013220B80 to SD014220B80
Use same PN (2009/09/14)
PVT
P49-PWR_+VTTP
Use same PN (2009/09/14)
PVT
Change PR113, PR248 0 ohm to 2.2 ohm
Add boot trap resistor (2009/09/14)
Add PR114, PR251 4.7 ohm, PC80, PC180 680P

Use same PN (2009/09/14)
PVT
P45-PWR_CPU_CORE
Change PR148, PR188 PN SD013220B80 to SD014220B80
PVT
P54-PWR_VGA_COREP
Use same PN (2009/09/14)
PVT
Avoid FB trace noise (2009/09/18)
Change PR118, PR253 20.5k to 10k

Change PR252 28.7k to 14k
PREMP
P45-PWR_DCIN/DECTOR
Change PC7 SE041224K80 to SE000005Z80
Change CAP size from 1206 to 0603 (2009/10/09)
PREMP
Modify OTP setting (2009/10/09)
PREMP
P44-PWR_CPU_CORE
Change PL12, PL14 SH000005680 to SH12036BM00
Use 5% tolerance DCR choke
PREMP
P51-PWR_1.5VP
Adjust voltage divided resistor
PREMP
P49-PWR_+VTTP
Adjust VTTPWROK voltage 3.3V to 1.05V
(2009/10/09)
(2009/10/27)
(2009/10/27)
Change PR101 3k to 10.5k

PREMP
Remove 1.05V component
Cost down
MP
P49-PWR_+VTTP
Modify resistor for
(2009/11/3)
VTTPWROK voltage
(2009/11/26)
PR101 10.5k to 2k
Compal Secret Data
Issued Date
2008/10/23
Deciphered Date
2009/10/23
Title

Size
Document Number
Rev
D
401717
Date:
Sheet
58
of
58

Scheme Toshiba Satelite l500 (La 5322p)

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Scheme Toshiba Satelite l500 (La 5322p)

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Formats disponibles

A

LA-5322P REV 1.0 Schematic

Compal Electronics, Inc.

Compal Secret Data

Schematic, LA5322P M/B

Model Name : NSWAA/NTWAA

PCIE-Express 16X 2.5GHz

VGA Thermal Sensor

Memory BUS(DDRIII) 200pin DDRIII-SO-DIMM X2

1.5V DDRIII 800/1066 MT/s

USB port 0,1

ATI M96 Pro,128bit with 512MB/1GB

Intel Ibex Peak

MDC 1.5 Conn

DC/DC Interface CKT.

ODD/B for 17"

Power Circuit DC/DC

Compal Electronics, Inc.

Compal Secret Data

Schematic, LA5322P M/B

Monday, January 25, 2010

Liverpool Intel Arrandale (Discrete)

DESIGN CURRENT 1.5A

DESIGN CURRENT 330mA

DESIGN CURRENT 180mA

DESIGN CURRENT 100mA

DESIGN CURRENT 48A

DESIGN CURRENT 26A

DESIGN CURRENT 18A

Ipeak=18A, Imax=12.6A, Iocp min=20.64

DESIGN CURRENT 15A

DESIGN CURRENT 12A

DESIGN CURRENT 1.5A

Ipeak=4A, Imax=2.8A, Iocp min=4.98

Ipeak=7A, Imax=4.9A, Iocp min=8.54

Ipeak=15A, Imax=10.5A, Iocp min=18.14

Compal Electronics, Inc.

Compal Secret Data

Schematic, LA5322P M/B

Monday, January 25, 2010

BTO Option Table

S5 S4/ Battery only

S5 S4/AC & Battery

SLP_S3# SLP_S4# SLP_S5#

VGA THM Sensor

PCH SM Bus address

Compal Electronics, Inc.

Compal Secret Data

Schematic, LA5322P M/B

Monday, January 25, 2010

DDR3 Compensation Signals

STUFF -> R20, R23, R27

STUFF -> R20, R21

STUFF -> R26, R27

Compal Electronics, Inc.

Compal Secret Data

Routed as a single daisy chain

12/22: Modify for M96 and M96 Pro select

EMI reverse, close to JCPU

Unused by Clarksfield rPGA989

JTAG & BPM

Schematic, LA5322P M/B

Monday, January 25, 2010