PIC16F627A/628A/648A

Pin Diagrams
PDIP, SOIC

RA2/AN2/VREF RA3/AN3/CMP1 RA4/T0CKI/CMP2 RA5/MCLR/VPP VSS RB0/INT RB1/RX/DT RB2/TX/CK RB3/CCP1

1 PIC16F627A/628A/648A 2 3 4 5 6 7 8 9 27A/628A/648A

18 17 16 15 14 13 12 11 10

RA1/AN1 RA0/AN0 RA7/OSC1/CLKIN RA6/OSC2/CLKOUT VDD RB7/T1OSI/PGD RB6/T1OSO/T1CKI/PGC RB5 RB4/PGM

RA1/AN1 RA0/AN0 RA7/OSC1/CLKIN RA6/OSC2/CLKOUT VDD VDD RB7/T1OSI/PGD RB6/T1OSO/T1CKI/PGC RB5 RB4/PGM

SSOP

28-Pin QFN

RA4/T0CKI/CMP2 RA3/AN3/CMP1 RA2/AN2/VREF RA5/MCLR/VPP

PIC16F627A/628A/648A

RA2/AN2/VREF RA3/AN3/CMP1 RA4/T0CKI/CMP2 RA5/MCLR/VPP VSS VSS RB0/INT RB1/RX/DT RB2/TX/CK RB3/CCP1

RB1/RX/DT RB2/TX/CK RB3/CCP1

8 9 10 NC 11 12 RB4/PGM 13 RB5 NC 14

1 21 NC 2 20 VSS 3 19 NC 4 PIC16F627A/628A 18 NC PIC16F648A VSS 17 5 NC 6 16 RB0/INT 7 15

28 27 26 25 NC 24 23 22 NC

20 19 18 17 16 15 14 13 12 11

RA1/AN1 RA0/AN0

RA7/OSC1/CLKIN RA6/OSC2/CLKOUT VDD VDD RB7/T1OSI/PGD RB6/T1OSO/T1CKI/PGC

1 2 3 4 5 6 7 8 9 10

DS40044F-page 2

2007 Microchip Technology Inc.

PIC16F627A/628A/648A
FIGURE 3-1: BLOCK DIAGRAM
13 Program Counter Flash Program Memory 8-Level Stack (13-bit) Program Bus 14 Instruction Reg Direct Addr 7 Data Bus 8

RAM File Registers PORTA RA0/AN0 RA1/AN1 RA2/AN2/VREF RA3/AN3/CMP1 RA4/T0CK1/CMP2 RA5/MCLR/VPP RA6/OSC2/CLKOUT RA7/OSC1/CLKIN

RAM Addr (1)

Addr MUX 8 Indirect Addr

FSR Reg Status Reg 8 3 PORTB

Power-up Timer Instruction Decode & Control Timing Generation OSC1/CLKIN OSC2/CLKOUT Oscillator Start-up Timer Power-on Reset Watchdog Timer Brown-out Reset Low-Voltage Programming 8

MUX

ALU

W Reg

RB0/INT RB1/RX/DT RB2/TX/CK RB3/CCP1 RB4/PGM RB5 RB6/T1OSO/T1CKI/PGC RB7/T1OSI/PGD

MCLR

VDD, VSS

Comparator

Timer0

Timer1

Timer2

VREF

CCP1

USART

Data EEPROM

Note

1:

Higher order bits are from the Status register.

DS40044F-page 10

2007 Microchip Technology Inc.