Analog Signal Processing UO eo ume a tc tac Mls) sleet Te coolio Pr ere B elt ele eM ieee alg Dee MUN Ue Roe eg Cie ee eR as Bee ea ea ea St ee Rene Analog Signal Processing presents an original, five-step, design- Cee ented eM ener tee ec eee ee tet rem eee enc prescribe a “bottom-up” approach, Professors Pallas-Areny and Nee ts ean develop possible solutions using available ICs. focusing on cir- Ceca ee eu Cd See ee oe ea Ces eM Reet eu re ere aaa oe Peg oa te ac Ce Ra a a Ca co actual implementations—and more than 130 skill-building chap- ee ea el are at eg RC) Ree eet meee ut a ae ken oc eee Re a a ee We RCo AL ea oa St Rau A gee a Ne ee a a See nce eer enema ee ance ak oe Corea read WILEY-INTERSCIENCE John Wiley & Sons, ine. ‘Scientife, Technical, and Medical Division Ch Rad eke ene ee cANALOG SIGNAL PROCESSING RAMON PALLAS-ARENY Universitat Politécnica de Catalunya JOHN G. WEBSTER University of Wisconsin-Madison ® A Wiley-Interscience Publication JOHN WILEY & SONS, INC New York * Chichester + Weinheim + Brisbane + Singapore * Torontotue npet ae ‘This book is printed on acid tre paper. Copyright 1999 by John Wiley & Sons. Al rights reserve Published simultaneously in Canada Maen te thon amopsingeonbing mnine oer seropr ht Clearance Center, 222 Rosewood Drive, Danvers. Ber ete an 9m a her for permission should be Oia stn oo SH Rus oe Pier perma hl he ‘Areny and John G, Webster. 2 wy teres publication tae PATS a: pe T tlner mega ei Sigal sci L weber Johns ID TL Te ranean 19 Git aal CONTENTS. Preface siti 1 Signals and Signal Processing 1 1.1 Signals, Information, Interference, and Noise, 1 12 Signal Classification, 2 1.2.1 Analog and Digital Signals, 2 1.2.2 Single-Ended, Differential, and Floating Signals, 4 1.2.3 Low-Impedance and High-Impedance Signals, 12 1.3 Dynamic Range and Signal-to-Noise Ratio, 14 1.4 Functions in Analog Signal Processing, 16 1.4.1 Linear and Nonlinear Functions, 16 1.4.2 Amplitude and Level Matching, 19 1.4.3 Impedance Adaptation, Buffering, 20 1.4.4 Domain Conversions, 23 14.5 Filtering, 25 1.4.6 Linearization, 26 1.47 Interference Compensation, 26 1.4.8 Level Comparison and Threshold Detection, 26 1.49 Terminal Matching, 27 1.5 Errors in Analog Signal Processing, 29 LS. Errors and Their Class 1.5.2 Systematic Errors, 32 1.5.3 Random Errors, 32 LS.4 Static Errors, 33 1.5.5 Dynamic Errors, 33 1.6 Problems, 39 References, 40 2. Voltage Amplification a2 21 Ideal Voltage Amplifiers, 42 2.2 Practical Voltage Amplifiers, 45 2.2.1 Figures of Merit of Fully Differential Amplifiers, 45 2.2.2 Effects of Finite Input Impedances, 47 2.2.3 Error Modeling for Voltage Amplifiers, $3 . 2.24 Differential Versus Single-Ended Amplifiers, 37CONTENTS 2.3 Building Blocks for Voltage Amplifiers, 57 23.1 Voltage-Feedback Operational Amplifiers, 57 2.3.2 Current-Feedback Operational Amplifiers, 65 233 Difference Amplifiers, 68 2.34 Instrumentation Amplifiers, 69 2.3.5 Switched Capacitors, 72 2:36 Voltage Buffers, 73 24 de Amplifiers, 74 24.1 Single-Ended de Amplifiers, 74 2.4.2 Differential-Input de Amplifiers, 87 2.4.3 Fully Differential de Amplifiers, 93 25 ae Amplifiers, 97 2.5.1 Single-Ended ac Amplifiers, 100 2.5.2 Differential-Input ac Amplifiers, 104 2.5.3 Fully Differential ac Amplifiers, 107 2.6 Composite Amplifiers, 109 2.6.1 Cascaded Amplifiers, 109 26.2 Feedback Composite Amplifiers, 111 2.63 Paralleled Amplifiers, 113 2.7 Programmable-Gain Amplifiers, 113 2.8 Problems, 117 References, 121 3. Current-to-Voltage and Voltage-to-Current Conversion 122 3.1 Ideal Current-to-Voltgage Converters, 122 3.2 Practical Current-to-Voltage Converters, 124 3.2.1 Figures of Merit of Fully Differential Current- to-Voltage Converters, 124 3.2.2 Error Modeling for Current-to-Voltage Converters, 126 3.3 Building Blocks for Current-to-Voltage Converters, 128 3.3.1 Current Integrators, 128 3.3.2 Integrated Transimpedance Amplifiers, 130 34 Current-to-Voltage Converter Amplifiers, 130 3.4.1 Transimpedance Amplifiers, 130 3.4.2 Charge Amplifiers, 142 3.5 Ideal Voltage-to-Current Converters, 148 3.6 Practical Voltage-to-Current Converters, 150 3.6.1 Figures of Merit of Fully Differential Voltage-to-Current Converters, 150 3.6.2 Error Modeling for Voltage-to-Current Converters, 150 3.7 Operational Transconductance Amplifiers, 152 bean mri idctiatalatsitocietisainse SEE a CONTENTS — vil 38 Voltage-to-Current Converter Circuits, 154 3.8.1 de Current Sources and Sinks, 154 3.8.2 Transconductance Amplifiers, 159 3.8.3 Voltage-to-(4 mA to 20mA) Converters, 165 3.9 Other Components and Circuits for Processing Currents, 167 3.9.1 Current Mirrors, 167 3.9.2 Current Amplifiers, 168 3.9.3 Current Conveyors, 172 3.9.4 Bidirectional Current Sources, 173 3.10 Problems, 174 References, 179 4 Linear Analog Functions 181 4.1 Addition, 181 4.1.1 Single-Ended Voltage Addition, 181 4.1.2 Differential Voltage Addition, 187 4.1.3 Level Shifting, 190 42 Subtraction, 193 4.2.1 Single-Ended Voltage Subtraction, 193 4.2.2 Differential Voltage Subtraction, 194 4.3 Differentiation, 195 4.3.1 Single-Ended Differentiator, 196 4.3.2 Difference Differentiator, 201 44 Integration, 203 44.1 Single-Ended Integrator, 203 4.4.2 Difference Integrator, 210 4.5 Impedance Transformation and Conversion, 214 4.5.1 Negative Impedance Conversion, 214 4.5.2 Impedance Gyration, 219 4.5.3 Capacitance Multiplication, 222 4.6 Problems, 225 References, 228 5 ac/de Signal Conversion 29 $1 Description of ac Signals, 229 5.2 Signal Rectification, 231 5.2.1 Half-Wave Rectification, 231 5.2.2 Full-Wave Rectification: Absolute-Value Circuits, 234 5.3 Peak and Valley Detection, 245 5.3.1 Peak Detection, 245vill CONTENTS, 5.3.2 Valley Detection, 248 5.4 rms-to-de Conversion, 249 5.4.1 Thermal rms-to-de Conversion, 249 5.42 Direct Computation rms-to-de Conversion, 251 5.4.3 Implicit Computation rms-to-de Conversion, 253 5.5 Amplitude Demodulation, 255 5.5.1 Envelope Detection, 257 5.5.2 Coherent Demodulation, 259 56 Problems, 270 References, 273 6 Other Nonlinear Analog Functions 6.1 Voltage Comparison, 274 6.1.1 Voltage Comparators, 274 6.1.2 Schmitt Triggers, 285 6.13 Window Comparators, 287 6.2 Voltage Limiting (Clipping), 288 6.3 Logarithmic Amplifiers, 293 6.3.1 Transdiode Logarithmic Amplifiers, 296 6.3.2 Log Ratio Amplifiers, 301 6.4 Exponential (Antilog) Amplifiers, 302 6.5 Analog Multipliers, 304 6.5.1 Multiplier Error Specifications, 304 6.5.2 Transconductance Multipliers, 304 6.5.3 Log-Antilog Multiplier, 311 6.5.4 Additional Multiplier Circuits, 312 66 Analog Dividers, 315 6.6.1 Analog Division by Feedback, 315 66.2 Log-Antilog Dividers, 317 6.7 Problems, 318 References, 321 7 Analog Signal Filtering 7.1 Introduction to Filtering and Filter Design, 322 7.1.1 Filter Specification, 322 7.1.2 Frequency Response, 326 7.1.3 Transformation Rules, 330 7.1.4 Normalization and Scaling Laws, 331 7.1.5 Transient Response, 331 7.1.6 Differential Filters, 333 7.1.7 Filter Sensitivity, 338 m4 322 8 Analog Signal Swi CONTENTS — ix 7.2 Components for Filter Implementation, 338 7.2.1 Passive Components, 339 7.2.2 Operational Amplifiers, 342 1.2.3 Switched Capacitors, 343 7.3 Low-Pass Filters, 145 7.3.1 RC Low-Pass Filters, 345 7.3.2 LC Low-Pass Filters, 347 7.3.3 Active Low-Pass Filters, 148 74 High-Pass Filters, 352 74.1 RC High-Pass Filters, 352 7.4.2 LC High-Pass Filters, 352 7.4.3 Active High-Pass Filters, 354 7.5 Bandpass Filters, 357 7.5.1 Passive Bandpass Filters, 357 7.5.2 Active Bandpass Filters, 359 7.6 Band-Reject (Notch) Filters, 361 7.6.1 Passive Band-Reject Filters, 361 7.6.2 Active Band-Reject Filters, 362 7.7 All-Pass Filters, 365 7.8 Nonlinear Analog Filters, 369 7.9 Input Filters and Circuit Protection, 372 7.9.1 Single-Ended Inputs, 372 7.9.2 Differential Inputs, 374 7.10 Problems, 376 References, 377 ing, Multiplexing, and Sampling 379 8.1 Introduction to Signal Acquisition, 379 8.2 Analog Switches, 382 8.2.1 The Ideal Analog Switch, 382 8.2.2 Practical Analog Switches, 383 8.2.3 de Model and Errors for Analog Switches, 385 8.24 ac Model and Errors for Analog Switches, 389 8.2.5 Switching and Control Models for Analog Switches, 393 8.3 Analog Multiplexers, 393 8.3.1 Basic Structure and Models, 393 8.3.2 de Model and Errors for Analog Multiplexers, 396 8.3.3 ac Model and Errors for Analog Multiplexers, 400 8.3.4 Switching and Control Models for Analog Multiplexers, 405 83.5 Input Channel Extension, 406 8.4 Crosspoint Switch Arrays, 4119 10 CONTENTS 8.5 Sample-and-Hold Amplifiers, 412 8.5.1 The Need for Sample-and-Hold Amplifiers, 412 8.5.2 The Basic Sample-and-Hold Circuit, 414 8,5.3 Errors in Sample-and-Hold Amplifiers, 415 8.6 Problems, 422 References, 424 Error Analysis and Reduction 9.1 Error Sources in Analog Signal Processing, 425 9.1.1 Sources of Systematic Errors, 426 9.1.2 Sources of Random Errors, 431 9.2 Error Budget and Calculation, 432 9.3 Error Reduction by Internal Calibration, 439 9.3.1 Single-Point Calibration, 439 9.3.2 Two-Point Calibration, 441 9.3.3 Three-Point Calibration, 444 9.3.4 n-Point Calibration, 448 9.4 Offset Reduction Techniques, 450 9.4.1 Autozero Techniques, 451 9.4.2 The Recirculation Method, 452 9.5 Gain-Error Reduction Techniques, 453 9.6 Problems, 455 References, 456 Interference and its Reduction 10.1 Interference Coupling in Electronic Circuits, 457 10.1.1 Conductive Coupling, 458 10.1.2 Capacitive Coupling, 463 10.1.3 Inductive Coupling, 472 10.2 Grounding for Interference Reduction, 476 10.2.1 Safety Ground, 476 10.2.2 Signal Grounding, 477 10.2.3 Partition Grounding, 479 10.3 Shielding of Conductors and Circuits, 480 10.3.1 The Electric Shield Concept, 481 10.3.2 Circuit Guards, 482 10.3.3 Electric Shield Grounding, 484 10.3.4 Magnetic Shielding, 489 10.4 Signal Isolation. Isolation Amplifiers, 493 CONTENTS xi 10.5 Problems. 496 References, 497 11 Noise, Drift, and Their Reduction 499 TLL Noise Fundamentals, 499 ILIA Noise Description, 499 111.2 Thermal Noise, 503 ILL Shot Noise, 505 IL14 Low-Frequency Noise, $07 ILLS Noise Bandwidth, 509 11.1.6 Noise Calculations, S13 11.2 Noise in Electronic Components and Circuits, $19 11.2.1 Equivalent Input Noise, $20 11.2.2 Optimal Source Resistance and N 11.2.3 Noise in Operational Amplifiers, $27 11.2.4 Noise in Instrumentation Amplifiers, 544 11.2.5 Noise in Resistors, 546 11.2.6 Noise in Transimpedance Amplifiers, $49 11.2.7 Noise in Charge Amplifiers, 551 11.28 Noise in Differentiators, 554 11.2.9 Noise in Integrators, 556 11.3. Drift in Electronic Components, $58 114 Environmental Noise (Pseudonoise), 559 H.4.1 Thermal Pseudonoise, 560 11.4.2 Chemical Pseudonoise, 562 “ 11.4.3 Mechanical Pseudonoise, 562 ILS Problems, $63 S64 425 Matching, $25 References, APPENDIX A: Web Sites of Interest in Analog Signal Processing 566 APPENDIX B: Standard EIA Ri 570 INDIcities tia ti PREFACE Digital electronics has opened many new application areas for electronics. This hhas increased the need for processing analog signals because our world, as we perceive it is essentially analog and the signals coming from it are analog. This book deals with processing (continuous) instrumentation signals using integrated circuits (ICs) as building blocks, Instrumentation signals have information embedded in their amplitudes and shapes and are often broadband and low-frequency. We must consider noise and interference in order to achieve desired accuracy. Analog signal processing deals with adapting the amplitude, level, bandwidth, and impedance of signals: ensuring compatibility between single. ended, differential, or floating signals, and amplifiers with different front-ends; converting signals from one analog domain to another: voltage to current, current (0 voltage, and ac to’de; performing operations such as addition, comparison, and synchronous detection; channel multiplexing so that several signals share a common resource, such as an analog-to-digital converter (ADC); and minimizing interference and reducing noise. Analog signal processing is faster than digital signal processing. It is less flexible and may need more expensive components, but it is not necessarily more complex. Furthermore, analog processing is unavoidable in any digital system interfaced to an analog signal: for bandwidth limiting intended to Prevent aliasing before analog-to-digital conversion, and to match the Ly FIGURE 1.7 General structure of a system that obtains a digital code D from a measurand x. has a sensitivity 5, se You a4) Xmax — Sra and a resolution 4, factor. The conditioner and analog processor (if present) are described by their transfer characteristic, which is the relationship between their output signal and the respective input signal. The slope of that characteristic for some cir- cuits is called gain. Each electronic circuit or subsystem accepts a specific range cof input signals, input range, and is able to detect a given minimal variation in ‘Those signals, which is called resolution. Active circuits, for example, have the amplitude of their output signals limited by the supply voltage levels (voltages “saturate” when approaching the power supply “rails"), and this limits the corresponding levels of the input signals. Circuit speed is limited by stray capacitance because changing the voltage across a capacitor requires a finite current, i = Cdv/dr, and the current available in electronic circuits is unavoid- ably limited. On the other hand, random voltage fluctuations or interference prevent the detection of small signal increments, thus limiting the resolution ‘The ADC has a limited input voltage range Vj, and is unable to react to voltage increments smaller than its quantization interval q. Hence, its dynamic range is DR =Vi,/q. Because Vi, = (2" ~ I)q = 2"q, we have DR = 2". For this reason, the dynamic range for an ADC is normally expressed by giving the number of bits n. This agrees with the number of output codes available (2") and the output resolution, which is one least significant bit (LSB); therefore, the output dynamic range is DR = 2"/1 = 2" ‘The dynamic range for any stage must be calculated by using corresponding Quantities in the numerator and the denominator. That is, both must be peak, peak-to-peak, mean or root-mean-square (rms) values of a voltage, current, of (for random signals) power. Noise limits the resolution, and it can be expressed by peak-to-peak or rms values. The dynamic range is normally expressed in decibels, which for a voltage or current is, limited by its mechanical design, electric noise or other a5) Resolution16 SIGNALS AND SIGNAL PROCESSING where Ig is logarithm to the base 10, For an ADC, DR = 201g = 201¢2"~ 6n AB as) All the circuits processing a given signal must have a dynamic range equal to or farger than that required for the application. Otherwise the signal is dis- torted and the information is lost. The matching of amplitudes and signal levels is one of the most important functions in analog signal processing (Section 142) Figure 1.8a shows the correct condition for the measurement and signal ranges: the input range and extreme signal levels of any stage must be equal to or larger than the output range and the extreme signal levels for the previous stage, and the sensor noise limits the resolution. Figure 1.86 describes the correct condition for the dynamic range for the system in Figure 1.7; Any stage should have a dynamic range equal to or larger than that of the previous stage. In some instances, however, it may happen that the ADC available has a quantization noise that is larger than the noise level of the signal conditioner. Notice that Figure 1.86 Shows a difference in logarithms, which is equivalent to the logarithm of a dimensionless ratio, otherwise the logarithm of a quantity is ‘meaningless. ‘A common parameter to describe random signals is their power (Section 11.1.1). For these signals, the signal-to-noise ratio (SNR) replaces the dynamic range. The SNR in decibels is calculated by Signal power an SNR (4B) = 108 Noe power 14 FUNCTIONS IN ANALOG SIGNAL PROCESSING 1.4.1 Linear and Nonlinear Functions ‘Any operation performed on an analog signal can be described by mathe- matical model and can be either linear or nonlinear. Mathematically, a func- tion is said to be linear if it has the following two properties ({3}, Section 3.1): Homogeneity: f(ax) = af(x) ce) and Addition: f(xy +2) = SO) + SO) as where a is a constant. In terms of circuits the homogeneity property means that the output of a linear circuit is proportional to its input. The additive property 14 FUNCTIONS IN ANALOG SIGNAL PROCESSING 17. 2019. mar ~ Yann) 2019 [or one tnep 201g ax 2010 Ym 2010 vr «ONG o FIGURE 1.8 Measurement and signal range (a) and dynami pours is ignal range (a) and dynamic range (b) for the system ‘means that the superposition principle holds: if an input s\(0) yields an out 0 an an input yea out pl) then an ipl) 40) ll Produce an output api(1) + bp2(1), provided the output signal range is not exceeded, An additional property of many linear circuits is that their response is time-invariant: it does not depend on the time at which the signal is Processed. If an input s(7) yields an output p(t), then the response to an input s(¢~ fp) will be p(1~ 19). A linear function can be the result of successive nonlinear functions, In any case, any system performing a linear function, that is, any linear system, is linear nly for a fic linear only fora spec range of amplitude and re quency for the input signal. " " and18 SIGNALS AND SIGNAL PROCESSING ‘Any linear, time-invariant system which is physically realizable and stable can be described by a transmittance or transfer function, H(), Figure 19a, which is a complex quantity specified by its modulus (or absolute value) and phase (or argument) ({6}, Section 3.8). If the system was initially at rest (zero initial condition), the Fourier transform of the output signal P() is given by PN =H (1.10) where S{/) is the Fourier transform of the input signal. From here it follows that linear systems do not modify the frequency of sinusoidal waveforms, but they can modify their amplitude and phase. The transfer function for the cascade connection of two linear systems is the product of their respective transfer functions, Figure 1.96. Ideally, measurement signals should not undergo any shape distortion. For an input s(2), the ideal system output is p(@) = ks(0), k being a constant. From (1.10) it follows that the ideal transfer function is H/) = k20°, ie., IH) = k and arg H = 0°. This means that all the frequency components of the input signal have their amplitude modified by the same proportion and that they do not experience any delay. Such a transfer function cannot be realized in prac- ti a many measurement sytemsit is acceptable for thei signals to be delayed, though no shape distortion is accepted. Therefore, an acceptable output signal is p(t) = ks(1 ~ 4). In the frequency domain, Pip) = ke SYN) aay wn) st) | al in (PO o q ao cu { Hin La Hin { Hn) o FIGURE 1.9 (a) Linear system described by its transfer function. (6) Transfer function of eascade-connected linear systems. 14 FUNCTIONS IN ANALOG SIGNAL PROCESSING 19) and, from here, the acceptable transfer function is Hf) = k/~2afty a2 ‘meaning that each input frequency component should undergo the same pro- portional amplitude change and a delay proportional to its frequency (propor- tionality constant, fg). Transfer functions fulfilling (1.12) can be realized only in a finite frequency range. Linear systems whose frequency response does not fulfill (1.12) ate said to produce linear distortion. In signal conditioning, and in sensors too, particularly for very low- frequency-signals, a function is considered to be linear, in a broader sense, when its transfer characteristic is a straight line. The superposition principle for a truly linear system requires that line to go through the origin (0,0), but in ‘many cases it is judged that it is enough that the transfer characteristic has constant slope. The transfer characteristic is then described by the equation for a straight line rather than by a transfer function as in (1.10) Nonlinear transfer characteristics are described cither by explicit mathemat- ical functions or graphically by a curve, whose slope is not constant. Nonlinear functions are of interest in many applications (Chapters 5 and 6) but nonli- nearity is considered an error source in linear circuits, 2 Amplitude and Level Matching Section 1.3 shows that in a system like that in Figure 1.7, the input dynamic range of any stage must be equal to or larger than the output dynamic range of the preceding stage. Further, the output range of any stage must be equal to or smaller than the input range of the following stage, and the signal levels must be the same. Range matching is achieved by amplification, and level matching is achieved by level shifting. Both are linear functions, sometimes called span and. zero matching, respectively. The transfer function for an ideal amplifier is (1.12), so that amplifiers can be described as circuits that multiply a signal by a constant Example 1.4 A temperature in the range from —40°C to +55°C is to be ‘measured with a resolution of 0.1°C, giving a digital output by means of a sensor whose sensitivity is 1mV/°C and an ADC whose input range is 0 V to 10 V. What are the required dynamic range (DR) for the ADC and the gain and DR for the amplifier? Are there any other conditions or analog functions required? ‘The desired dynamic range for the temperature will be [55 — (40°C DR = 2019 IB = $9.55dB20 SIGNALS AND SIGNAL PROCESSING and therefore all the stages must have a minimum DR of 60 dB. For the ADC, from (1.6) this means = 10. In order to calculate the gain required, first we must calculate the output voltage range for the sensor. From (1.4), nat ~ Yinin = SUinae — Xin) = (1 mV / °CM(SS — (40)}°C = 95 mV and therefore the gain must be G = (10 —0/0.095 = 108. From Figure 1.84, the output noise level for the sensor must be lower than (0.1°CX1 mV/°C) = 0.1 mY. The amplifier output noise must be lower than the quantization noise for the ADC, which is g/2 = 10V/2"' = 4.9 mV. In addition, if an input of ~40°C yields a (~40°CX1 mV/°C) = ~40mV sensor output, which would result in a (~40mV)(105) = ~4.2V amplifier out- put, then we need a level shifting of 44.2 V in order to obtain 0 V for ~40°C at the ADC input, which would also result in an ADC input of (455°C mV /°CK108) + 4.2V = 9.97SV for + 55°C. It is important to notice that in order for the ADC to achieve the desired resolution of 0.1°C without using any processor after the sensor, the ADC should have an input resolution of (0.1°CXImV/°C)=0.1mV. For an ADC input range of 10 V, this resolution would require 2 = Ve/q = 10V/0.1 mV = 10%, and m = 16.66, that is, 17 b in practice (or 18 b if 17 b units are not available). ‘Sometimes a limiting function is included (o protect susceptible circuits, such as ADCs, whose input range is limited. This nonlinear function (Section 6.2) limits the maximal or minimal signal level, or both: 1.4.3 Impedance Adaptation. Buffering The description of a linear circuit by its transfer function assumes that the circuit behavior is undisturbed when it is connected to other circuits. In ‘order to guarantee that there is no disturbance when two circuits are con- nected, the input impedance for the receiving circuit (or “load”) must be adapted to the output impedance of the “source” circuit Figure 1.102 shows the case where the output of the source circuit, described by its Thévenin equivalent, consists of a single-ended voltage. The load is described by its input impedance Z;. The voltage across the load will be (13) where A= Z,/(Z;+Z,) is the attenuation, a function of frequency because impedances depend on frequency. The desired condition is ¥; = Ve, which requires Z, > Zy. Impedance adaptation for voltage signals requires the input impedance to be larger than the output impedance of the voltage signal. 14 FUNCTIONS IN ANALOG SIGNAL PROCESSING 21 Zz ©) “| z Source }—4 A. A 4 Load "24, 1H) 2, Zz © FIGURE 1.10 (a) Voltage signal connected to a receiver with input imped : . iver with input impedance Z,. (4) Added “connecting stage” to take into account the attenuation produced by unadapted impedances. c) Current signal connected (o a receiver with input impedance Z, ‘The function of providing an input impedance much ta impedance much larger than the output impedance for the preceding stage is called buffering. For narrowband signals, Z;and Z, will be almost frequency-independent, so that we can write |Z;| = kiZoi, k a constant, and from (1.13) Wil = Wolo —e a= Kol= AIK Farner yer =r (4) where the attenuation 4 is now a constant, Note that ifthe output impedance, in addition to the output voltage (x), is a function of a measurand x, Z,(x), then the detected voltage is a nonlinear function of even for narrowband. signals. For broadband signals, Z; will decrease for large frequencies because of sey capacitance, and Za may not be constant either. The effec of unadapted impedances can be considered by assuming a “connection stage” as show Figure 1.106. * an22 SIGNALS AND SIGNAL PROCESSING Example 1.5 A grounded signal generator whose output resistance is 600 2 is connected to an oscilloscope whose input impedance is 1 M@ in parallel with 20 pF, using 2 m of a coaxial cable whose capacitance is 75 pF/m. If a maximal 0.1% amplitude attenuation is accepted, what is the maximal signal frequency? Figure E14 sketches the connection. The voltage at the oscilloscope input will be Ze % +R, where Ze is the equivalent impedance, k 2 aR and Re = 1MQ, C. = 20pF + 2(75 pF) = 170pF. We find Wil Re 1 Wol” Re Ro Ji+ (RARE with R, = 6009. By substituting and solving the last equation we obtain S$ 44206 He. 10.001 = 0.999 If the voltage to be processed is differential, then the required conditions for impedance adaptation involve differential and common-mode impedances. ‘They are derived in Section 2.2.2. When the signal of interest is a current, Figure 1.10c, the condition for impedance adaptation can be derived from the analysis of the current across the load impedance h=bgte (1.15) FIGURE E14 Equivalent circuit for the connection of a signal generator to an oscil- loscope using a coaxial cable. 14 FUNCTIONS IN ANALOG SIGNAL PROCESSING 23 which shows that now the input impedance must be very small as compared to the output impedance for the current source. Both very low and very high input impedances can be achieved by impedance transformation (Section 4.5), 1.44 Domain Conversions ‘A data domain is a physical quantity representing the information. The most common analog domains are voltage and current; frequency, pulse width and phase are time domains also considered to be “analog.” Here we are concerned with voltages and currents, both de and ae. The need for converting signals from one domain to another domain stems from the nature of signal sources and receivers, and from the convenience for some operations. Some sensors, such as thermocouples, Hall-effect sensors, linear variable differential transformers (LYDTs), and ac tachometers, offer 4 voltage output. Other sensors, such as photodiodes, photomultiplier tubes, and piezoelectric sensors offer a current output, Resistance variation sensors (strain gages, resistive temperature detectors (RTDs), thermistors) are placed in voltage dividers or sensor bridges providing voltage or current outputs, either de or ac. Reactance variation sensors (capacitive and inductive sensors) provide ac voltage outputs On the other hand, signal receivers require specific inputs: most ADCs accept only input de voltages and a 4 mA to 20 mA telemetry current loop requires a de current. Furthermore, some operations are easiet to perform on currents, and others on voltages. Figure I.1a shows a voltage divider whose output voltage is Is aes Figure 1.116 shows the equivalent current divider whose output current is > hy kT z But in order for J, to be considered a current source, the equivalent output impedance (RIA) must be very high. This means that R must be very high and AR even higher. On the other hand, the equivalent condition for a voltage divider is to have a low output impedance. This implies that R must be very low which is easier to achieve than a very high KR for the current divider Currents, however, are easier to add or subtract than voltages. From Kirchhof?s Current Law (KCL), the algebraic sum of the currents entering a node is zero at every instant. This means that current leaving one node equals the sum of all currents entering that node. Also, from Kirchhoff's Voltage Law (KVL), the algebraic sum of all the voltages around a loop is zero at every instant. By considering the appropriate polarity, a given voltage drop in a loop24 SIGNALS AND SIGNAL PROCESSING mR o FIGURE 1.11 (2) Voltage divider; (4) current divider. can be considered the sum of other voltage drops in the same loop. But the reference voltage for each voltage drop in the loop will be different, and this makes it difficult to use KVL to implement sums and other operations. Signal integration is also easier to implement for current signals: if a known capacitor C is charged by a current signal J, the charge Q stored after a time T will develop a voltage V = Q/C across the capacitor, where Q is the time integral of f during T. ‘The need arises, therefore, for converting voltages to currents, currents to voltages, ac quantities to de quantities, and also for amplifying voltages and currents. Table 1.1 lists some common names for (active) components and Circuits used to perform these operations. For components, the generic term amplifier is used. The terms transimpedance and transconductance indicate that the respective slopes of the transfer characteristics are not dimensionless, as in voltage or current amplifiers, but have a physical dimension whose units are ohms and siemens. In active circuit synthesis, the generic term source is, preferred to amplifier. The input and output for any of the devices and ci in Table 1.1 can be single ended or differential, floating, or grounded, and current sources can be either sources or sinks, or both. In accto-de signal conversion the parameter converted can be the peak or valley value, the root-mean-square value or the average value after rectifica tion. Chapter 5 deals with the corresponding ac-dc signal converters. 14 FUNCTIONS IN ANALOG SIGNAL PROCESSING 28 ‘Common Terminology for Components and Circuits for Signal TABLE 1 Amplification and Domain Conversion Voltage Voltage amplifier Transconductance amplifier Voltage buffer Transadmittance amplifier Voltage-controlled Voltage-controlled current voltage source (VCVS) source (VECS) Current Norton amplifier Current mirror Current integrator Current conveyor Transimpedance amplifier Current amplifier, current pump Current-comtrolled voltage Current-controlled current, source (CCVS) souree (CCCS) 145° Filtering Analog signal filtering (Chapter 7) discriminates signals based on one of their parameters: amplitude, frequency, phase or duration, for example, Most filters are linear, and discriminate signals based on their frequency. Such filters are used for bandwidth matching, interference removal and bandwidth reduction. Bandwidth matching is necessary when sampling signals ((6], Section 7.3): if the ‘bandwidth of the sampled signal is larger than or equal to twice the frequency of the sampling signal, then alias frequencies result at the sampler output. Therefore, low-pass or bandpass filtering is required before sampling any sig. nal, Bandwidth reduction is effective for noise reduction (Section 11.1) Amplitude and slew-rate filtering are nonlinear filtering techniques (Section 7.8) useful for interference and noise rejection. An interesting question in analog signal filtering is, where does the rejected signal “go”? The answer is different for passive and active filters. Filters made of passive components (passive filters) are not just signal filters but power filters too, because the impedance they pose to the source circuit depends on the frequency of the signal, When they offer a high input impedance, very little Power is taken from a voltage signal source; when they offer a low input impedance, more power is taken from a voltage signal source; in any case, any input power to the filter not delivered at the filter output heats up resis. tances in the filter. For filters with active components (active filters) a model such as that in Figure 1.9a is incomplete because it does not take into account the connections between the circuit and the de power supplies. Output signal Power comes from these supplies, not from the input signal: input signals modulate power transferred from the power supplies to the output; an input signal is rejected when it is not “allowed” to modulate that power.26 SIGNALS AND 1.4.6. Linearization A linear response, in the broader sense, is most convenient because to calculate the input leading to the observed output for a linear system requires us only to subtract the zero output and divide by the sensitivity. Undesired nonlinear relations can arise from the measurement principle. Some obstruction flow- ‘meters, for example, consist of placing a perforated obstruction plate inside a pipe and measuring the drop in pressure Ap across that plate ({l]. Section 1.7.3), The relationship between flow velocity v and drop in pressure is ? = kAp. Calculating » requires a so-called flow linearization (kan). It may also happen that the sensor itself is nonlinear, as in thermistors, magnetoresistors, or thermocouples working in a broad temperature range. In addition, a linear sensor can result in a nonlinear output when placed in a voltage divider or Wheatstone bridge. Linearization techniques for specific sensors oF signal conditioning circuits are described in [1] 1.4.7. Interference Compensation An interference resulting in an unwanted signal u(t) added to the signal of interest s(7) can be canceled if the system can be designed to yield two output signals s(#) and —s(2), each with the added interference. The result of subtract ing both signals will be 290) 16) do = 10) + uk) ~[-910) = 0) ‘This result shows the implicit advantage of differential signals: any interference common to both signal lines (voltages or currents) will be canceled at the receiver end. Also, the output polarity for some signal sources depends on the polarity for their power supply, which makes it easy to obtain ~s(1). OF course, the interference can also be eliminated by filtering if it has any char- acteristic which differentiates it from the desired signal, such as its frequency, bbut this is not always the case. Section 10.1 analyzes how interference couples into circuits Analogously, interference resulting in an unwanted signal 1) multiply- ing the signal of interest (2) can be canceled if the system can be designed so that the value for u() is obtained. Dividing the contaminated signal by the interference yields the desired, clean signal. This method is applied in resistive sensors placed in voltage dividers or Wheatstone bridges (IJ Section 3.4.4) 1.4.8 Level Comparing and Threshold Detection Level comparing is a nonlinear function yielding a binary signal whose value depends on which one of two signals is the larger. Threshold detection is also a nonlinear function yielding a binary output whose value changes when the 4 FUNCTIONS IN ANALOG SIGNAL PROCESSING — 27 input signal reaches a set level. It this decision level 18 OV, the circuit is a polarity detector. Threshold detection can be considered a particular case of level comparing when one of the signals is instead a constant voltage. Section 6.1, analyzes circuits that implement these functions. Figure 1.12a shows the transfer characteristic for a positive voltage thresh- ‘old detector whose threshold is ¥,. Figure 1.126 illustrates a major problem with this function: a transient superimposed on the input voltage will result on ‘an anticipated or even false transition. The problem is worse for signals with a fiat slope. Figure |.12c shows the transfer characteristic for a positive threshold detector with hysteresis: the up transition takes place when the input voltage is higher than /44 and the down transition takes place when the input voltage is Tower than Vg. Transients whose amplitude is smaller than Vy, ~My will not yield any false or erratic transitions, Figure 1.12d, Therefore, the wider the hysteresis window. the larger the noise immunity but also the longer the delay 1g before yielding a correct transition. In an alarm system, for example, the risk of false alarms must be traded off against having.a signal running for a long time very close to its maximal allowable level 1.49 Terminal Matching Terminal matching is a very important yet often forgotten or unrecognized function in analog signal processing. Section 1.2 introduced several signal lasses according to their terminals. When the connection of these signals to an ensuing circuit is considered, it is easy to realize that single-ended floating signals offer the most flexibility: their low terminal L can be grounded at the receiver end if necessary and it can even be inverted with their high terminal, H. Differential floating signals also allow us to ground their common terminal at the receiver but they require two additional uncommitted terminals. All the remaining signals described in Section 1.2 pose more stringent conditions for the receiver input. Consequently, the necessity for matching signal source tetminals to receiver terminals often arises. Differential grounded signals to be connected, for example, to a grounded circuit require a differential input. If the final receiver has a grounded input terminal, then a differential to single-ended converter ‘must be used (Figure 1.13). This converter should ideally be insensitive to the common-mode signal v.. Conversely, if a single-ended voltage is to be sent through a differential transmission line, a single-ended to differ- ential voltage converter is required The convenience of using differential circuits will be better appreciated after considering the different ways interference can enter a circuit (Section 10.1). However, in anticipation of this very important result, the processing of differ. ential signals will be highlighted throughout this book.Py SIGNALS AND SIGNAL PROCESSING vet = o < ey <8 FIGURE 1.12 (a) Threshold comparing; (b fase trigger problems because of noise. (c Hysteresis in threshold comparing to (d) reduce noise triggering problems. 1.5 ERRORS IN ANALOG SIGNAL PROCESSING 29 Zz, Ditferential Ye to single-ended Load 2. converter FIGURE 1.13 Matching a differential signal to a single-ended grounded load requires ‘a differential to single-ended converter. 1.5 ERRORS IN ANALOG SIGNAL PROCESSING Whatever the operation performed on any analog signal, the actusll result, if examined closely enough, will always be different from the desired result. This, {sa necessary consequence of the limited performance of any artificial device. Itis ‘not an unsurmountable problem by itself. Engineering is not concerned with designing perfect devices (which is of course impossible) but with designing devices and systems good enough for the intended application, This leads to therelevant point of stating the performance criteria for analog signal processing. ‘The accuracy of a system is the quality indicating the degree of coincidence between the system's actual output and its ideal output, The existence or not of a discrepancy depends on the desired resolution: if only gross changes are noticed, even two rather different signals can look similar. When defining any analog signal-processing problem, we must state the required resolution and accuracy, together with the bandwidth, Finally, and most important, we must consider the allowed cost, because in engineering practice cost is a very relevant parameter, 18.1 Errors and Their Classification Any discrepancy between a system's actual output and its ideal output is called aan error. There are many error sources and different ways by which errors influence a system's output. Thus, a first step to manage errors is to classify them. When designing a system, the resulting errors must be estimated in order to know whether the desired accuracy will be achieved or not. The analysis and reduction of error sources are dealt with in Chapter 9. The absolute error e is the difference between the actual value and the ideal value for a quantity, Actual value ~ Ideal value aay30 SIGNALS AND SIGNAL PROCESSING Often, only the amplitude, not the sign, of the error is of interest. The relative error € is the quotient between the absolute error and the ideal value, Ideal value (118) The difference between the actual value and the ideal value can also be described by the quotient between the absolute error e and a reference value, for example the ideal full-scale (FS) value. For a full-scale output we will have ers = Absolute errors have the same physical dimension as the quantity considered. Relative errors are expressed as a percentage value Example 1.6 The actual gain for a given amplifier is G = 110, whereas its theoretical or ideal gain is G; = 100. Calculate the absolute and relative er- rors. Consider the same errors when the gain is expressed in decibels. The absolute error will be e= 110 — 100 = 10 and the relative error e_ 0 iti = 0% Expressed in decibels, the theoretical gain is 20 Ig 100 = 40 dB and the actual gain 20 Ig 110 = 40.8 dB. Therefore, ¢ = 40.84B ~ 404B = 0.8dB Note that this is not the decibels (20 Ig 10 = 204B), sme as expressing the absolute error (e = 10) in For complex quantities, such as impedance or transfer functions, itis pos- sible to define three different errors ({7}, Section 6.1): the vector error, which is the difference between the actual and the ideal vectors: the magnitude error, which is the difference between the actual and the ideal amplitude (modulus) of these vectors; and the phase error, which is the difference between the phase angle (argument) of these vectors. Each of these errors can be expressed as an. absolute or a relative error. Errors whose magnitude is independent of the actual system input are termed additive, zero, or offset errors. Errors whose magnitude is proportional to the actual system input are termed multiplicative, gain, or slope errors. Errors that depend on the actual system input but are not proportional to it are generically designed as nonlinear errors. Figure 1.14 shows the rationale for these names for a linear system, in the broader sense. A zero error, Figure 1S ERRORS IN ANALOG SIGNAL PROCESSING 31 Output Actual Error (ea! 4 Input o ‘Output ‘Actual Error ey Ideal 6 Output ‘Actual Error Ideal J ____, Input © Output 4 put @ FIGURE 1.14 (a) Zero error. (6) Gain error for a system with zero error. (@) Nonlinearity error. (d) Overall erro.32. SIGNALS AND SIGNAL PROCESSING \.14a, results in the actual transfer characteristic (a straight line for a linear system) to shift parallel to itself: the error magnitude (hatched area) is inde- pendent of the actual input. In the absence of zero error, a gain error rotates, the transfer characteristic by a certain angle a by pivoting around its ideal (and actual) zero output, Figure 1.146: the error magnitude is proportionally larger for larger inputs, A nonlinearity error, Figure 1.14c, results in a transfer char- acteristic that is no longer a straight line. The error for any real system will be a combination of zero, gain, and nonlinear errors, Figure 1.14d. Other erteria for classifying errors refer to their nature as systematic or random and to their influence on slow or fast inputs 1.5.2 Systematic Errors A systematic error is any error that, when applying the same input to the system in the same conditions, remains constant in magnitude and sign, or varies according to a definite law when working conditions change in a con- trolled way. In electronic devices, temperature and power supply are relevant conditions affecting the system's response Systematic errors can be detected by applying very-well-known input signals ‘or a series of input values to the system, This process is termed system cali- bration; it allows us to detect systematic errors and, hence, permits us to correct them. It must be recognized, however, that time is an unavoidable varying condition, and, very often, not only system performance degrades because of ‘component aging, but system response changes from time to time. To correct even minor systematic errors, therefore, the system must be calibrated very often. 3 Random Errors Random errors ate those errors that remain after the (known) causes of sys- tematic errors have been eliminated, Random errors appear when the same input is repeatedly applied to a system: the output will seldom be the same if ‘measured with a resolution high enough. Rather, a set of values spreading over ‘a more or less broad range will result. These values usually follow a Gaussian (or normal) distribution, which permits us to manage random errors, Ifonly Gaussian-distributed random errors are present, the arithmetic mean. of random errors for a large number of readings will be zero. This allows us to calculate the actual system output by taking the average of a (preferably large) set of output readings. Indeed, this is the way the true or ideal value for any ‘quantity is defined, when measured by the best methods available; it turns out, therefore, that the true value for any quantity is just a matter of agreement between standards laboratories. Also, for a given system working under speci- fied environmental conditions, random errors do not exceed a fixed value, This allows us to discard spurious outputs. LS ERRORS IN ANALOG SIGNAL PROCESSING 33 Random errors result from the contribution of several independent factors to the system output, none of which dominates over the other. Consequently, it is important to avoid interference (Chapter 10) that may notably influence the system and even drive it out of specifications. Chapter 9 analyzes several com- mon and less common causes of random errors. 15.4 Static Errors Static errors are those errors which happen when the system input signal has very low frequency, say less than 0.01 Hz. These errors can be zer0, gain, of nonlinearity errors, and systematic or random errors. In analog signal proces- sing, zero errors are termed offset errors and have a systematic component (the offset error at a given moment and under given conditions) and a random component, for example time drifts and also thermal drifts and drifts produced by power supply fluctuations. The estimation of the overall error by direct addition of the different errors ‘would often lead to very pessimistic predictions and to very expensive systems. Chapter 9 shows how the random nature of several error sources can be con- sidered in order to achieve a realistic yet prudent error estimate, 15.8 Dynamic Errors The dynamic error is the difference between the actual system output and the ideal output when the static error is zero. It describes the different behavior of the system for the same input amplitude depending on whether this amplitude is almost constant (static response) or changes with time (dynamic response). ‘The difference in behavior is due to the presence in the system of energy- storage elements. For electronic systems, these elements are mostly capacitors and inductors, and stray capacitance and inductance. ‘When a fast signal, say one with frequency components larger than 0.01 Hz, is applied to a system, the output response can be separated into two stages: transient response and steady-state response ({8], Chapter 7). The transient stage lasts from the moment the input has been applied to the moment when the output reaches its final value. Errors in the transient stage are termed transient errors. The steady-state stage starts when the transient response has out. Errors in the steady-state stage are termed steady-state errors. Both transient and steady-state errors are dynamic errors. Dynamic errors can be additive, multiplicative, and nonlinear errors (for example, harmonic distortion produced by slew rate limiting and clipping). They depend on the time-variation or waveform of the input signal. Error criteria are difficult to define for complex signals, even if they are periodic. To simplify matters, for transient signals (step, ramp), transient errors are considered, and for periodic signals (particularly sine waves), steady-state errors are considered. Furthermore, many systems can be characterized by a34 SIGNALS AND SIGNAL PROCESSING low-pass first-order (single-memory) response; here, the transient and steady state error for only such systems will be derived. The response of a low-pass first-order system with time constant r to an iput step of amplitude V, is ({5], Section 6.2) wo (y~ Ve" +h, (1.19) where Vo is the output value at = 0 (just before applying the input step). A plot of this response and the corresponding transient error is shown in Figure 1.15. The absolute transient error will be Wn) - VW, = (Ko Ket (1.20) and the corresponding relative error is Vo Gr This equation shows that the error decreases with time but only for f+ 0 will the error be zero and x(t) ~ V,. However, the system receiving the output signal has a limited resolution, so that there is no need to wait for a very long time; it will be enough to wait until the output signal is close enough to the ideal output. Hence, ifa relative error ¢ is accepted and Vo = 0, from (1.21) the time interval f, before reading the output must be jew (21) tine (1.22) A reasonable criterion to decide the relative error allowable in a system with an ADC is to consider the maximal quantization error. Table 1.2 gives the number of time constants that must elapse before achieving a specified relative error. As a rule of thumb, at least 10 time constants must elapse to get an accurate output. Transient signals arise for example in systems switched under digital control (Chapter 8). Example 1.7 A constant voltage from a source with a 600 2 output impe- dance is to be connected to a 12 b digitizer whose input impedance is 1 nF in parallel with a very high resistance, The error accepted equals the maxi- mal quantization error. If the full-scale voltage is applied and turning on the source is modeled as applying a step voltage, what time period must elapse before taking a voltage sample? 1.3 ERRORS IN ANALOG SIGNAL PROCESSING 35 ‘error Transient ! 0.63 v, + 0.37 Vy my 0.37 (V,~ V,) ” FIGURE 118 (0) Step respons of fistorder low-pass systems (A the el absolute transient error. ass cytes (the ine ‘The maximal quantization error is an absolute error whose value is g/2.q being the quantization interval. The full-scale input is 24. Therefore, the maximal relative error accepted is WN yan 2g T=?36 SIGNALS AND SIGNAL PROCESSING TABLE 1.2 Time t, After Which the Relative Transient Error for a Step Input to 8 Low- Pass First-Order System with Time Constant + Will Be Smaller Than a Given € € A « & 0 46 10 92 a 55 ze 97 0” 69 aga nn ae) 69 a ns a 16 Fel Bo ae) 83 Fd 153. a) 90, By applying (1.22), t= tin = 0.7en +1) For m= 12 and t = (6002\(100 nF), we obtain f, = 5.5 4s. If the input voltage had been smaller than the full-scale voltage, the same error criterion would have resulted in a mote relaxed specification (larger «) and the waiting time could be shorter. ‘The transfer function for a low-pass first-order system is A "7 +h an= (1.23) where Go is the low-frequency response (gain, in general) and fz is the so-called corner frequency for the system, which characterizes its dynamic response (nf. = 1/1). Figure 1.16 shows the amplitude and phase response for such a system. For a zero dynamic error it should be G(f) = Go. However, Figure 1.16a shows that even signals with frequencies well below f- will have their amplitude attenuated as compared to very-low-frequency signals. The relative amplitude error will be _1G\=IGo} «a Tool (1.24) where [Go| = Gp and (1.28) LS ERRORS IN ANALOG SIGNAL PROCESSING 37 iol 076, ' , o FIGURE 1.16 Amplitude (a) and phase (6) response of a first-order low-pass circuit ‘Therefore, if the maximal relative magnitude error accepted at frequencies lower than f is ¢, then the corner frequency must be high enough so that (1.26) which leads to (1.27)38 SIGNALS AND SIGNAL PROCESSING whenever € < 1. Table 1.3 gives the value for f. with respect to f, for different values of ¢. As a rule of thumb, the comer frequency for a low-pass first-order system processing a signal must be from 50 to 100 times the maximal frequency ‘component to be accurately processed. This condition is indeed very stringent for broadband signals. Example L8 A given low-pass first-order system has a gain of | at de and 2 20 dB attenuation at 60 Hz. Calculate its comer frequency and the maxi- ‘mal working frequency suffering an amplitude error smaller than 0.1%. ‘A 20 dB attenuation means that the gain at 60 Hz is 201g G(60) = -204B G(60) = From (1.25), 201g0.1 = 201g Solving for the comer frequency, Hz. Now, (1.27) can be rewritten as LafN% 6Hz and € = 0.001 gives f, = 0.27 Hz, TABLE 1.3 Comer Frequency f. for a Low-Pass First-Order System When the Maximal Amplitude Error Accepted for Frequencies Below fis ¢ Se Lull 7 7 na 9 24 IB 26 362 2 ns 455 14s 6 16 PROBLEMS 39 1.6 PROBLEMS L.A Calculate the maximal quantization noise for an ADC whose input range is from —SV to +5V and has @ 126 resolution. For an input range of 0 V to 5 V, calculate the maximal quantization noise. 1.2, The de bridge in Figure P1.2 includes four resistive sensors with opposite variations and is driven by a split power supply. Draw the equivalent Circuit and classify its output signal according to its terminals, vb) Ra Riteny s-t SoH Le ve { at oni T aut FIGURE P1.2_ A Wheatstone bridge with four sensors improves sensitivity and bal- ance. 1.3 Anac bridge with four sensors placed like those in Figure El.2is excited by a transformer that has a grounded central tab in its secondary wind- ing. Draw the equivalent circuit and classify the output signal as single ‘ended or differential, floating or grounded, balanced or unbalanced. 1.4 The de bridge in Figure PI.4 includes two resistive sensors with opposite variation in adjacent arms, Draw the Thévenin equivalent circuit and classify its output signal according to its terminals. [Rat yy FIGURE P14 Sensors with opposite variation and placed in adjacent arms of the same branch of a Wheatstone bridge compensate for power supply and temperature variations, 1S Draw the equivalent circuit for a system designed to measure an unknown impedance Z, consisting of a grounded current source, whose amplitude is J, driving Z,, and a voltmeter connected to Z, by leads separated from those of the current source. Assume that lead and16 17 18 19 1.10 SIGNALS AND SIGNAL PROCESSING contact impedances are not negligible but otherwise the current source and voltage meter are ideal. Classify the signal at the voltmeter input as single-ended or differential, floating or grounded, balanced or unba- lanced. Draw the equivalent cieuit for a photodiode biased by a reverse voltage provided by a grounded voltage source and classify the output signal according to its terminals. ‘A temperature is to be measured in the range from 0°C to 100°C with a 0.5°C resolution by a sensor whose sensitivity is ~2.2485mV/°C and whose output voltage at 25°C is 0.6 V. If the desired output voltage is from 0.54 V to 4.46 V, determine the dynamic range and the gain for the analog processor, and any other analog functions required. ‘The amplitude range for the human brachial arterial pressure is smaller than 50 mmHg to 200 mmtg. If a measurement resolution of 3 mmHg. is desired, calculate the dynamic range required for a system able to measure that pressure, If a sensor with a 0 psi to 5 psi is available that offers a 100 mY full-scale output, calculate the required gain for the ensuing analog processor if the ADC available has a 0 V to 1 V input range. (Units: | mmHg = 133 Pa; 1 psi = 6895 Pa.) A grounded signal generator with 600 @ output resistance is connected to an oscilloscope using a voltage probe whose equivalent input impe- dance is 10 M@ in parallel with 15 pF. If a maximal 0.1% amplitude attenuation is accepted, calculate the maximal signal frequency allowed. The transfer function for a high-pass first-order system with corner frequency fe is GU) = Goif Uf +f.) where Gy is the gain at very high frequencies, Ifa sine waveform of frequency 1 KHz is to be pro- cessed without disturbing its amplitude by more than 0.1%, what is the maximal value for ’ REFERENCES a eB 8) 4 5 R. Pallis-Areny and J. G. Webster. Sensors and Signal Conditioning. New York: John Wiley & Sons, 1991 J, Fraden, Handbook of Modern Sensors, Physics, Design, and Applications, 2nd fed. Woodbury, NY: American Institute of Physics, 1997 ‘A.D. Khazan, Transducers and their Elements. Englewood Cliffs, NJ: PTR Prentice-Hall, 1994. E, 0. Docbelin. Measurement Systems: Application and Design, ath ed. New York: McGraw-Hill, 1990. R. E. Thomas and A. J. Rosa, Circuits and Signals: an Introduction to Linear and Interface Circuits. New York: John Wiley & Sons, 1984, REFERENCES 41 [6] A.V. Oppenheim and A. S. Willsky. Signals and Systems, 2nd ed. Upper Saddle River, NJ: Prentice-Hall, 1997, (7) 4. Dosti. Operational Amplifers, 2nd ed, Boston: Buterworth-Heinemann, 1993. [8] B. J. Kuo. Automatic Control Systeme, Tth ed, Englewood Cliffs, NJ: Prentice- Hall, 1995,2 VOLTAGE AMPLIFICATION Many sensors or their conditioners yield output voltage signals. Further, many integrated circuits for analog signal processing are devised to process voltages and most ADCs accept only voltages at their input. As a result, voltage ampli- fication is the most common operation performed on analog signals. Voltage amplification is studied here by first analyzing the function and then ‘considering the integrated circuits available to implement it. Later on, some possible implementations are analyzed, and zero and gain errors for the most ‘common are discussed. The general case of fully differential amplifiers (differ ential-input and differential-output amplifiers) is first considered. Differential amplifiers (dfferential-input but single-ended-output amplifiers) and single ended amplifiers, can be considered as particular cases of the fully differential amplifier. 21 IDEAL VOLTAGE AMPLIFIERS In an ideal voltage amplifier, an input voltage signal modulates power from power supplies and provides an output voltage in the same mode (differential ‘or common) as the input, without any distortion in amplitude or phase. No energy is transferred from signal source to the amplifier, or from the amplifier to the next stage, thus implying an amplifier with infinite input impedance and a zero output impedance. The performance is immune to environmental fac- tors, such as temperature, time, or power supply fluctuations. ‘A fully differential amplifier can be described by four transfer functions ot ‘gains,” as shown in Figure 2.14, where we assume that power supplies do not 21 IDEAL VOLTAGE AMPLIFIERS 43, wo FIGURE21_ (0) Transterfnctins fora ly lirent! voltage ample. Foran ideal amplifier these reduce to two. ° on affect the amplifier behavior and, hence, their connections are not indicated. (To simplify the notation, the dependence of transfer functions and signal transforms on « (cw = 2nf, f being the frequency) is assumed but not indicated. Signal transforms are indicated by capital letters.) From the input terminal Voltages 14 and ny. the corresponding differential and common-mode iny voltages are defined by mu Q.la) (2.16) ‘The output terminal voltages Yay and vy are defined from the cores differential and common mode voltages by comssponding (22a) (2.2b) The differential-mode gain is (the transform of) the differential out e ransform of) the differential output voltage divided by (the transform of) the differenti ° . (23a)4 VOLTAGE AMPLIFICATION The common-mode gain is the common-mode output voltage divided by the common-mode input voltage, (2.36) ‘The differential-to-common mode gain is the common-mode output voltage divided by the differential-mode input voltage, Geo = 4 230) and the common-to-differential mode gain is the differential-mode output vol- tage divided by the common-mode input voltage, 234) Goce By applying the superposition principle, the output voltages for a linear ampli- fier will be Von = Goon + Goce (24a) Voc = Geo Vin + Gee Vi (4b) In an ideal voltage amplifier, all the gains are linear (independent of input voltage amplitudes) and frequency-independent. In addition, the differential. mode output voltage must depend only on the differential input voltage, and the common-mode output voltage must depend only on the common-mode input voltage. Therefore, for an ideal voltage amplifier Gye = Gen = 0, so that there are only two nonzero transfer functions, Gop and Gcc, Figure 2.15, whose quotient is termed discrimination ratio, eo) For a differential amplifier with a single-ended output, va. =0 V, and only two gains are defined: Gop =Gp and Gpe=Ge. For a single-ended ampli- fier, my, = vo =0¥. and there is only one gain, Gpp = G. For a single- ended to differential converter, uj, =0 V, and there are two gains: Gpp = Gp and Gen, 2.2 PRACTICAL VOLTAGE AMPLIFIERS 48 2.2, PRACTICAL VOLTAGE AMPLIFIERS. 2.2.1 Figures of Merit of Fully Differential Amplifiers In a practical voltage amplifier there will be some conversion from differential- ‘mode input voltage to common-mode output voltage and from common-mode input voltage to differential-mode output voltage. The common-made rejection ratio is defined us f Mand baer arte » ork ca % eo Gpe and it can be expressed as a ratio or in decibels where C (dB) = 201g C° (ratio). Note that C is not a transfer function but a quotient of transfer functions and therefore its phase characteristic may look odd when compared to that of an ordinary transfer function. The corresponding ratio for the conversion from differential to common- mode voltage can be termed the exclusion rario (differential signal “excluded” from the differential output), Gen Gop an Ideally C= co and E = 0. Because the information is in the differential-mode voltage, Cis a very important figure of merit, is less important than C if the ensuing stage also has a differential input because that stage will reject the common-mode voltage. For a practical amplifier therefore, v olin + Goce = Gpo( in +H 5 Vin + G G (¥ +45) (28a) Geo in + Gee Vie fice(Vic + Vip ED) (2.86) For a differential amplifier, 2.8a) describes the single-ended voltage output. Equation (2.8a) shows that if nc is independent of rip, there is an additive error, not necessarily in phase with rp, because Cis a complex quantity whose Phase can be different from zero. If rc is related t0 rip, for example if both depend on the same physical quantity, then the common-mode voltage may fesult in a gain error or even a nonlinearity error. Example 2.1 Calculate the figures of merit of a fully differential voltage amplifier consisting of two parallel (noncoupled) single-ended stages (Figure E20,46 VOLTAGE AMPLIFICATION wa D>, bom ae 104 Dy bom LJ FIGURE E21 Fully differential amplifier formed from two parallel uncoupled single- ended amplifiers with gains Gy and G3. The voltages at the output terminals are Von = Gl Vu = GN, From here itis straightforward to calculate the differential and common-mode output voltages, Yoo = Vou — Vou = GiVin — GV Vou + Vou _ G.Vin + GV Veg If these voltages are expressed as functions of the differential and common- ‘mode input voltages, 2.1a) and (2.16), we have )-a(r) tars) (0B) ‘Therefore, the four transfer functions that describe the amplifier are Vin + ViclGs - G2) GQ+G, Yoo a 4G; + Viet 22, PRACTICAL VOLTAGE AMPLIFIERS 47 “The figures of merit are finally, al ‘The results in the preceding example do not depend on the particular trans- fer function for each amplifier. Therefore, we conclude that for noncoupled stages: 1. The discrimination factor is always D \ 2. In order to have an ideal behavior, G, 3. E=1/(40), so that the larger the ratio of C, the smaller E will be. Reference [I] gives C for several common circuits. Practical voltage amplifiers also have finite input impedances, limited band- width and zero and gain errors. Their output impedance is not zero, but it is, low enough, so it is usually neglected, 2.2.2. Effects of Finite Input Impedances If the input impedances of a voltage amplifier are finite, they must be con- sidered. Figure 2.2 shows the differential-mode and common-mode input impedances of a voltage amplifier connected to a differential voltage source with unbalanced source output impedances Zand Z,. The amplifier input impedances are shown external to it so that the amplifier “block” can now be considered to have infinite input impedances. Note that because of the finite input impedances, the differential and common-mode voltages at the amplifier input, tip and rjc, will be different from the differential and common-mode source voltages, ty and tc First, consider Zip to be infinite. The equivalent circuit for the impedance network of Figure 2.2 is drawn in Figure 2.3(a). The circuit consists of two separated voltage dividers whose respective transfer functions are (29a) (2.96)FIGURE 2.2. The effect of finite input impedances can be analyzed by considering an impedance network preceding the amplifier. o e 1 vay, Goo Foes Goo Soc Goo Soot Geo Gee fous es % “ FIGURE 23 (a) Equivalent circuit for the impedance network in Figure 2.2 when Zp is very large. (b) Transfer function for the impedance network in (a). 22. PRACTICAL VOLTAGE AMPLIFIERS 49) ‘The transfer functions for this impedance block can be calculated from the results in Example 2,1 to yield G46 Gop; = BES zz) 2.108) Ge = AAG ) 2.105) 2 G-G ‘ (2.10¢) Goc = G = G (2.104) ‘where the subscript “i” stands for “input” (impedance block), Figure 2.35. The corresponding figures of merit are D; = 1, £, = 1)(4C) and Goo _ GitGs _ZAE+ZI+Ze+%) yyy Goa "HG, =G) Zz BLZ)— : Impedance mismatches can be better described by average (Zea. Zo,) and difference (AZc, 4Z,) impedance values, Zonta (2.128) (2.12) (2.138) 2.136) The substitution of these equations into (2.11) gives On Spinecc aaa) Emm ae OM Zon Which shows that mismatches in either the source output impedance or the amplifier common-mode input impedance result in a conversion from common-mode signal into differential signal at the amplifier input; this differ- ential signal will subsequently be amplified. The conversion ratio decreases When the average common-mode input impedance Zc, is much larger than the average signal impedance Zs,50 VOLTAGE AMPLIFICATION ‘Voltages at the amplifier output can be obtained by first calculating its input voltages, Vin = GoniVa + Goai¥e (2.158) Voc = Geo¥a + Geoke (2.156) By substituting into (2.4a) and (2.4b), Veo = Gpo(Gonils + Goei Ve) + GoclGenils + Goo¥e) Voc = Gev(GoviVa + Goa Ve) + Gee(GeniVs + Geai¥o) By rearranging these equations we obtain Von = ValGov Gopi + GocGcni) + Ve(GonGoci + GocGeci) —_(2.16a) Vor = ValGevGom + GeeGeo) + VelGeoGoei + GecGea) (2.16b) We are interested only in the differential output voltage. From (2.6), the overall or effective common-mode rejection ratio (Cz of CMRR,) will be the gain for vg divided by that for v. in (2.16a), Gv Gopi + GoeGeni - 2.17 = GooG oa + GvcGees ern From (2.10a) to (210d), Gpp; = Geey and Goce = 4Gep;, so that (2.17) can be feweitlen a8 (2.18) THOTT AG + Cy where C, is the common-mode rejection ratio for the amplifier alone and C; is that in (2.11). If C, Cy > 1, we can approximate tot came chaca 2.19) Note that in this equation factors C are expressed as normal ratios, not in decibels. Because C; and C, are complex quantities, it may happen that C =C, thus resulting in C, = 00, That is, the impedance imbalance can compen- sate for the limited common-mode rejection ratio of the amplifier. If Zp in Figure 2.2 is now considered to be finite, the analysis can be performed with the help of Figure 24. By applying the superposition principle, first we assume vy =0. Figure 24a, and then re =0. When ty =0, the ‘Thévenin equivalent circuit is that in Figure 2.4(6). The differential voltage 22. PRACTICAL VOLTAGE AMPLIFIERS St ro OU 2 ve + 2 we Zt z ZpkilZ, b w FIGURE 2.4 (a) Common-mode voltage and (c)differential-mode voltage connected {0 an amplifier with finite input impedances; (b) and (d) respective equivalent circuits.52 VOLTAGE AMPLIFICATION produced by 1, will be Cnn Vide = Yin — +Zp where Z, = ZlZey Zy = ZiIZé and the subscript “oc” stands for “open circuit.” When x, = 0, Figure 24e, the Thévenin equivalent circuit is that in Figure 2.4d. The differential voltage produced by 1 will be y, V y, 2p Wn Vads=Vnn~ Vee 757 5% By comparing the last two equations we see that the open-circuit differential and common-mode voltages are multiplied by the same factor. This means that Gpp/Goc: will be the same as that when Zp was assumed to be infinite, Therefore, C, will not depend on Zp. In summary, finite input impedances for differential amplifiers result in: 1. A. signal attenuation if Zp is not large enough compared to ZollZc + ZZ 2, An effective CMRR, which according to (2.19) and (2.14) will normally be smaller than the CMRR for the amplifer alone (C,) if either its input common-mode impedances or the source output impedances are mis- ‘matched. This mismatch effect is worse when the input common-mode impedance is not very high compared to the source output impedance. ‘Thus, impedance adaptation for differential signals requires a large input differential impedance and large and matched common-mode input impe- dances. Both conditions are difficult to meet at high frequencies because of stray capacitance. Example 2.2. The INA 10SAM differential amplifier has resistive input im- pedances of $0 k@ both in differential mode and in common mode, and CMRR = 80 dB minimum at de with zero source impedance. Calculate the effective CMRR at de in a worst-case condition when the amplifier is con- nected to a differential signal source whose output resistance is 1002 + 5 at each terminal, For the amplifier we have C, = 108° = 10000, The impedances involved are all resistances, Reg = SOKS, Rg, = 1008. Because of the source resistance mismatch, we have AR, = 10, and from (2.14), 50 x 10° 100 G= =5x10 (07100 22 PRACTICAL VOLTAGE AMPLIFIERS $3 Therefore, we find the effective CMRR by applying (2.19), 108 which yields C, = 104/3 = 70.54B, A 10% mismatch in the source resistance can result in up to a 9.5 dB reduction in the effective CMRR. 22.3 Error Modeling for Voltage Amplifiers Equation (2.8a) included only the error in the output differential voltage because of the limited CMRR for the amplifier. If input impedances are also considered, then in (2,8a) the effective common-mode rejection ratio C, must be substituted for C (C,). In practice, however. other errors arise Figure 2.5 models some error sources for a generic amplifier. The signal of interest is the differential voltage. When the input terminals of any voltage amplifier are short-circuited and grounded. the output voltage is not zero (or the desired output), It has instead a value which increases proportionally to the gain. We say that there isa zero error. This is described by a voltage source Vig (input offset) placed in series with one input terminal, so that the output offset will be Fog = Gop Vn. Vin drifts with time and temperature and depends on ‘common-mode and power supply voltages. If the measurement bandwidth for the output signal is large enough, fast voltage fluctuations can be observed, which are termed noise (Chapter 1). If the input terminals are kept short-circuited but a resistor is connected from them to ground, the output zero error changes even when keeping the same gain and also when the gain changes. This is modeled in Figure 2.5 by FIGURE 2.5 Some error sources for a generic voltage amplifier54 VOLTAGE AMPLIFICATION current sources Jp and fy. These sources describe bias or leakage currents for each input terminal and therefore they can flow in or out of the ampli- fier input. ‘The existence of J, and J, implies that the impedances seen by those current sources (Z, and Z, in Figure 2.5) cannot be pure capacitances because they would be continuously charged or discharged by those currents, thus leading to 4 positive or negative voltage build-up and to amplifier saturation; further- more, the resistance between signal ground and amplifier ground must be finite and low enough to provide a de path for the return of fp and fq, The drop in voltage across that impedance will be an additional common-mode voltage. If ‘one of these two conditions is not fulfilled, de paths for each bias current must be designed on purpose. In amplifiers whose transfer function depends on external components, such as operational amplifiers (Sections 2.3.1 and 2.3.2), bias paths can be provided by resistors which determine the transfer function. Normally, fy Jy; their average is termed input bias current, (2.20a) and their difference is termed input offiet current, (2.206) Input bias currents also change with temperature but no fixed relationship exists between offset voltage drift and input current drift In Figure 2.5, the input zero error (IZE) will be 1 Biocp— yy 4 (U0 26 = Hg Steer 19 + (82) ar AL at e2n + Ipoh + (SBR, — SER) T ~ Te where AV;,/AT is the specified thermal drift for Vio, T is the actual amplifier temperature and To i the temperature at which Vis specified; AVig/A¥ is the time drift for Vig and Av isthe effective time interval since the amplifier was turmed on, Section 9.2 shows that if AVig/ At is specified, say, per month, and the time interval is # months, then the effective time interval is i months; /,/AT and Af,/AT are the thermal dif of input currents; and Ry and Ry are the resistive components for Z, and Z, (when described by a model con- sisting of a resistance in parallel with a capacitance or in series with an induc- tance), assuming these are the only bias paths for the amplife. 22. PRACTICAL VOLTAGE AMPLIFIERS $8 If the source impedance mismatch is described by (2.13a) and (2.13b), from (2.21) we obtain IZE = Vig + ay, ay, 2 (T — To) + (Aee)ar ar a 2.2 ah FUyORo + lhoRoa + 5p BRAT ~ To) + boRoa + MART ~ Te) For those amplifiers having /., much smaller than /y, matching the resistance seen by each input current reduces the input zero error. For any amplifier, ‘matching the external impedance seen from each input terminal reduces inter ference. ‘The actual amplifier temperature T is not the current ambient temperature T, but the internal temperature reached by the amplifier in order to be able to transfer the internally generated heat (o its environment. That heat transfer is mostly through convection and depends on the thermal resistance 0 (°C/W) between physical interfaces. If the power dissipated by the amplifier is Py, its temperature will be T= T+ Pally + Oy + Ons) 23 where Oe, Gy and Oy ate, respectively, the thermal resistances between the internal chip and amplifier case (which depends on the package type), between the case and the heat sink, if used, and between the heat sink and the environ- ‘ment. For signal amplifiers, Py includes the quiescent power and the power supplied to the load impedance (which is the input impedance of the following stage) and feedback networks Offset voltages and input currents for most amplifiers are specified as initial values, implying that they are measured very shortly after turning the power supply on, that is, while the amplifier i still warming up. Therefore, these error sources are not measured at the working amplifier temperature, but at the ambient temperature Example 2.3 A given amplifier (INA LIOAG) has a thermal resistance 4, = 100°C/W and, at 25°C, has a typical quiescent current of £3 mA When supplied at -£15 V and its output voltage is 0 V. Calculate its actual temperature when the ambient temperature is 7, = 30°C and no current is drawn from its output. Equation (2.23) reduces now to T=T,+ PAO56 VOLTAGE AMPLIFICATION and the quiescent power dissipated is Pa = Wo Weel + Weed Therefore, T= W°C+ (2x 15 x3 x 107 W) x 100°C/W = 39°C The actual offset voltage and input currents will therefore be those correspond- ing to 39°C, that is, 14°C above 25°C. Ifa narrowband voltage signal is applied to the amplifier in Figure 2.5 and the common-mode voltage is zero, the differential output voltage, after sub- tracting the output zero error, divided by the applied voltage will give the actual differential gain G, at the working frequency. This gain will most prob- ably not exactly agree with the designed gain G (= Gp) for the amplifier. The reasons are tolerances and drift for components which determine G. For ampli- fiers whose gain does not basically depend on external components, manufac- turers specify the error in G (usually asa relative error, ég) and also the thermal coefficient (or drift), AG/AT, at a given temperature To. These gain errors ‘mean that the slope for the voltage transfer characteristic is not well known, but it will be somewhere between G and G+ Geg. In addition, the actual gain may depend on the value for the input voltage. This results in a nonlinearity error, usually described by a maximal value specified as a voltage eyig. This is equivalent to saying that the actual transfer characteristic isa thick line, Figure 1.14d, so that from an output voltage itis rot possible to unambiguously determine the input voltage even when the actual average slope (gain) is known Finally, if power supplies do not provide a well-regulated voltage, their fluctuations are reflected at the amplifier output and can be described as an additional zero error. Manufacturers specify the power supply rejection ratio (PSRR) for slow voltage changes. Some data sheets specify the power supply fluctuation to input voltage error ratio in decibels, whereas others specify the input voltage error to power supply fluctuation ratio in microvoltsjvolt. The PSRR may not be the same for each power supply line (PSRR,, PSRR_). Because the PSRR decreases for increasing frequencies, decoupling filters must bbe added to the amplifier power supply ports when there is a strong interfer- ence coupled to the supply lines (Section 10.1) By considering a worst-case situation where all error sources add arith- metically, the output voltage can be described by Aen | Ven GARR, * PSRR; * PSRR +IZE+E, Gu Sea(n + ) 228) 23, BUILDING. LOCKS FOR VOLTAGE AMPLIFIERS 57 where AV, and AV, are the power supply fluctuations and Ey is the equiva- Jent input noise voltage (Section 11.2.1). We assume that input impedances are large enough to have Vip = Vy, Vic = Ve, and that there is no harmonic dis- tortion, saturation or other nonlinear effects. For sinusoidal or narrowband signals whose frequency is close to the band- width limit for the amplifier, the dynamic error in G (Section 1.5.5) must also be considered: it can be included in ¢¢ For broadband signals, itis not possible to include the dynamic error in (2.24); therefore, for high accuracy, the ampli fier must have a bandwidth well beyond the signal bandwidth (Section 1.5.5) 2.2.4 Differential Versus Single-Ended Amplifiers Single-ended amplifiers are simpler to describe than differential and fully dif- ferential amplifiers because their basic behavior can be described by just one transfer function and one input impedance. Differential amplifiers are described by three input impedances and two transfer functions: fully differ- ential amplifiers require two more transfer functions. However, differential and fully differential amplifiers are not only convenient but also necessary in some instances. Differential amplifiers are required in differential-to-single-ended converters (Figure 1.13), to process differential signals (Figure 1.4) and also to reject ‘common-mode signals from single-ended sources (Figure 1.3). Single-ended amplifiers do not reject common-mode voltages; therefore, the CMRR of dif- ferential amplifiers is indeed a useful feature, not just another parameter to consider, Fully differential amplifiers are necessary when in addition to a differential input, a differential output is also required, for example when the following stage also has a differential input; such is the case for some multiplexers and ADCs. Moreover. a differential output is also beneficial because it rejects interference that equally affects both signal terminals. 23° BUILDING BLOCKS FOR VOLTAGE AMPLIFIERS A generic amplifier such as that in Figure 2.5, or simpler amplifiers with single- ended input or output, can be implemented by using a variety of commercial integrated circuits (ICs). The decision about which one is better depends not only on performance but, most often, on cost. This section describes the basic technical features of several families of common ICs used to build voltage amplifiers 23.1 Voltage-Feedback Operational Amplifiers Voltage-feedback operational amplifiers (op amps or VFAs) are voltage ampli- fiers with differential input and, usually, single-ended output (Gey = Gee = 0)58 VOLTAGE AMPLIFICATION (Figure 2.6). Their name suggests that they are useful for performing opera- tions on signals. Reference [2] describes the internal structure of op amps and many circuits based on op amps (and other analog building blocks). In 3] there is a detailed mathematical analysis of circuits based on op amps, including all their error sources. As for any differential amplifier, the voltage output for an op amp is Vo = AaVa+ AV 228) where V.= (Vp + Va)/2 isthe (transform of the) common-mode input voltage, Vg Vp— Vq is the (transform of the) differential input voltage, y= Gp = Gop and Ae= Ge = Gpe. , Op amps have a very large differential de voltage gain (10° to 107 for low- Frequency models), usually decreasing by 20 dB/decade from a frequency fay Which can be as low as 0.1 Hz (OPA77) or as high as 200 kHz (OPA620). This FIGURE 2.6 (a) Symbol and (6) equivalent circuit for a voltage-feedback operational amplifier. a 2.3, BUILDING BLOCKS FOR VOLTAGE AMPLIFIERS 59 frequency behavior can be modeled by a single-pole frequency response Aas Ag = ith +h Gop 2.26) where Ago is the differential de gain and fz = Agyf, is termed the gain- bandwidth product (GBP) ot unity-gain bandwidth for the op amp (\Ag(f;)1 = 1). The undesited Gpc gain (4,) is not specified. Instead, IC data books give the amplitude (but not the phase) for the CMRR as a function of frequency, so that we can calculate |Gpcl = Gpp/|CMRR|. Sometimes, manufacturers spe- cify the CMRR as a normal ratio (not in decibels) using the reciprocal of (2.6). The op amp input impedances strongly depend on IC technology. Input resistances range from 1 M& to | PQ and are larger for models with FET and CMOS inputs than for models with BIT inputs. Those resistances are shunted by capacitances from 2 pF to 10 pF, to which sockets and circuit layout may add 2 pF to 5 pF parasitic. The output resistance is lower than 100 $2 in general Offset voltage and input currents and their respective temperature coelfi- cients also depend on IC technology. The usual range of Vig is from 1 mV to 1 WY, with drifts as low as 0.01 4.V/°C. The usual range of fy is from 10 nA to 1 pA but there are models with f, as low as 10 fA. Op amps with BJT inputs hhave larger input currents but lower offset voltage and drifts. Op amps with FET inputs have lower input currents but larger drifts (Jy doubles for each 10°C increment) and larger offset voltage and drifts. Input currents, and hence impedance, also depend on the common-mode voltage and power supplies Nevertheless, these are second-order effects. The CMRR is very high at de (80 dB to 130 dB) and decreases from a frequency normally higher than f,. This CMRR applies only for low or med- ium common-mode voltages, v,; large values for u, yield a nonlinear behavior that cannot be described by a transfer function. The acceptable values for 1 depend on op amp technology. The PSRR is from 80 dB to 110 dB at de and decreases from frequencies that can be different for each supply voltage. Op amps with low Vig must have high CMRR and PSRR, otherwise their low Vig ‘would be useless because of interference due to common-mode voltages and power supply ripple. Nonlinear distortion in op amps mainly arises because of slew rate limita- tions, output voltage or current saturation and gain (44) nonlinearity. The slew Fate (SR) has a broad range depending on models: from 0.1 V/s to 1000 V/us and more. The largest slew rate for a sine waveform is at zero crossings, where the slope is 2n/¥,. Vp being its peak amplitude. In order to avoid distortion, we must have 22/V, < SR. Output saturation is produced when the output Voltage gets close to any of the power supply voltages and when the output current exceeds a specified current (usually 10 mA to 40 mA, depending on models). CMOS and low-supply voltage op amps have an output dynamic6 VOLTAGE AMPLIFICATION range relatively larger than that of common op amps. Gain nonlinearity is ‘overcome by feedback (next section) 2.3.1.1 Remedial Properties of Negative Feedback The most remarkable characteristic of op amps is that their de gain is so high that a very small in- put voltage would saturate their output. Moreover, this gain changes from Unit to unit, depends on supply currents, is a nonlinear function of the input voltage, and has a large temperature coefficient. Therefore, op amps. by themselves are almost useless. However, using external feedback renders them extremely useful and versatile. Figure 2.7a shows an op amp with an external impedance Z2 connected from its output to the negative (or inverting) input and an external voltage connected to the same input by an impedance Z. If, because of the high input impedance, we assume that the current entering the op amp is negligible, KCL applied to the inverting node gives Vit Va Va=Vo Zi @ e2n In Figure 2.74 we have v, = 0 V. If we assume that vy is very small because of the large op amp gain, then 1, © 0 V and (2.25) reduces to =AWMs (2.28) By solving for V4 in (2.27), substituting into (2.28) and rearranging, we obtain Z +heg tea 0.29) This equation can be directly obtained from the block diagram in Figure 2.7, and shows that a fraction 2.20 242s on of the output voltage has been fed back to the negative input of the amplifier. Consequently, these op amps are termed voltage-feedback op amps. The ratio B is termed the feedback factor. Figure 2.76 also shows that the circuit in Figure 2.7a can be easily analyzed by using superposition and voltage dividers ((4}, Section 2.1) first» is considered (with v, = 0) and then v, is considered (with 1; = 0). The only requirement for this approach to be acceptable is that the op amp internal impedance at the inverting input be very high. 23. BUILDING BLOCKS FOR VOLTAGE AMPLIFIERS 61 @ 2, EA 2, ze A FIGURE 2.7 (a) Operational amplifier with voltage feedback; (6) equivalent block diagram, By solving for Vin (2.29) and rearranging, we finally obtain 2:12, Ve=- \ oe TE AB ae Which, provided 4yB > 1, ean be simplified to Zs han (2b) ‘This equation shows that the output voltage depends only on Z; and Z3. not ‘on dq. Negative feedback provides a remedial action: the closed-loop voltage ‘gain is now ~Z,/Z;, where Z, and Z can be, in principle, any pair of im- pedances, provided there is always a de path for input bias currents Other benefits from negative feedback are that the differential input im- Pedance of the op amp increases by I+ 4yB and the output impedance ‘decreases by the same factor ([2}, Section 6.3). The common-mode input impe- dance remains the same because it is outside the feedback loop. The assump- tion leading to (2.27) that no current enters the op amp is validated. The product 4yB is termed the loop gain because itis the gain around the Feedback loop: 44 is the open-loop gain and fiis the gain of the feedback path62 VOLTAGE AMPLIFICATION AaB is very relevant in describing the circuit: the larger its value, the closer to ideal the circuit behavior will be. At low frequencies, the condition Ay > 1 will be easily fulfilled for moderate values for ~Z/Z; (implying not too small ). But at high frequencies, Ag will decrease, (2.27), and (2.31a) will not sim- plify into (2.310). At f > fy, (2.26) can be approximated by f Ag Ag 2.32 a> Aa ) which substituted into (2.31a) leads to 2.33) where fc; = Agu/B=/rB. Ifthe external impedances are resistors, Z; = Ry, Z2 Ry then the de gain is Gy = —Ro/ Ri, fg = Ago/(1 + Ro/ Ri) = fr/l + Re/ Ri) and from (2.33), Gy Gn= 2.34) ‘The gain roll-off for the op amp results in a decreased gain for the circuit at frequencies approaching fc. It must be remembered that neither Ago nor f, are accurately known. Therefore, fe cannot be accurately known either. The value for fe is reduced for a large Gy. Hence, there is a gain-band- width trade-off. Figure 2.8 plots (2.34) and describes this compromise: the =3 4B frequency is fo; the low-frequency gain is Go and the gain amplitude at high Frequency is frif. the same as that for the op amp alone, (2.26). From 201gl4gl = 201gL4a6l + 20!8(1/1A) ‘we infer that in Figure 2.8, where gains ate in decibels, the difference between the op amp (open-loop) gain amplitude and 1/\Al is the loop gain amplitude [4yA|. Note that as the frequency increases, the loop gain decreases, and the circuit gain amplitude |G()} response departs from the ideal response Gq, Moreover, the larger the frequency, the more the op amp behavior depends on its internal parameters rather than on the external feedback network. 23, BUILDING BLOCKS FOR VOLTAGE AMPLIFIERS 63 at Vaal Vd VAt61 lah gf 4 la § FIGURE 2.8 Amplitude (4B) for the gain of circuit in Figure 2.7a when Z; Example 24 A circuit like that in Figure 2.7a is built using an OPO7 whose fr =0.6 MHz (typ.) and fr=0.4 MHz (min). Calculate the frequency at which the gain is 1% below the de gain Go when Gp =—10 and when Gy = -100. ‘The circuit gain is given by (2.34). From Table 1.3 we know that for a low-pass first-order system, the comer frequency must be seven times the maximal fre- ‘quency of interest for a 1% error. Therefore, for typical values, fe Sr 0.6MHz i) TG +1)” Gl +) When Gy = ~10, fax < 7800 Hz and when Gy = ~100, fngy < 850 Hz. For the minimal fr, the corresponding limits would be 5200 Hz and 566 Hz. An increase of the gain by 10 reduces the bandwidth by more than 9 231.2 Op Amps with Positive and Negative Feedback \n Figure 2.94, a fraction of the output voltage is fed back to the op amp negative input and another fraction is fed back into the positive (noninverting) input. By apply- ing the voltage-divider method, as in Figure 2.75, we obtain the block dia- ‘gram in Figure 2.95 where the common-mode gain for the op amp has been included because at its input, ve # 0 V. At low frequencies, however, Ae will64 VOLTAGE AMPLIFICATION @ v, 4 75 eZ, “ FIGURE 2.9 (a) Positive and negative feedback around an op amp: (6) equivalent block diagram. be much smaller than Ay and can be disregarded. The output voltage will then be Zr ZAh A gti) v2 “lez, rz, ERE By solving for V,, we obtain Zs 2 aa Vig ty. “4 ) ZitZy 472s 235) 2.3. BUILDING BLOCKS FOR VOLTAGE AMPLIFIERS 65 ‘We now define the negative and positive feedback factors, 241 OB Sz, (2.36a) Z Tae (2.366) the net feedback factor B= Bq ~ Bp. and the feedforward ratios for the input voltages, 3m) (2376) Finally, (2.35) can be written as 5 = Wate Hef 2.38) T ltaiy whose form is similar to (2.31a). Therefore, the same conclusions apply for the circuit with only negative feedback: the larger the loop gain AyA, the closer to ideal the circuit behavior will be. Simultaneous negative and positive feedback leads to a new fact: if the net feedback factor is negative (B < 0)—more positive than negative feedback— then in the denominator of (2.35) 448 = 1 may occur and the output voltage would rise to infinity. This means that, depending on other factors, the circuit will either saturate or oscillate, To prevent this, we require 8 > 0 for the entire frequency band, that is Zz 2s ZAR Bre a ‘When using feedback networks with reactive components and also because of stray capacitance, this inequality may not hold at high frequencies. 23.2 Current-Feedback Operational Amplifiers Current-feedback operational amplifiers (CFAs) can also perform analog operations on signals, but they are not differential. Figure 2.10a shows that CFAs use the same symbol that VFAs, but their basic structure, described in Figure 2.106, is rather different. The input stage of a CFA is a voltage buffer. Hence, the input impedance is high (1 M& to 10 M shunted by 1 pF to 2 pF) at the noninverting terminal66 VOLTAGE AMPLIFICATION o FIGURE 2.10 Current-feedback operational amplifiers (CFAs). (a) Symbol; (8) basic internal structure and low (10 8 to $0 9) at the inverting terminal. The output current of this buffer i, is mirrored by a current source which produces a drop in voltage across a large transimpedance Z (160 k®2 to 2 M@ shunted by about 2 pF). This voltage, once buffered, provides the output signal. Z can be modeled by fa "I +h zy (2.40) whose form is similar to (2.26) for VFAs, but now f, is in the range of hundreds of kilohertz or more. CFAs must be used with external feedback too, for example as in Figure 2.11a, Because of the input buffer, assuming its output impedance is negligible, 2. BUILDING BLOCKS FOR VOLTAGE AMPLIFIERS 67 4 (RUA FIGURE 2.11 Amplifier based on (a) a current-feedback operational amplifier (CFA); @) equivalent block diagram. o ‘we have v, = v,. Applying KCL to the negative input results in Qa) The output voltage will be IZ (2.41b) By substituting /, and rearranging we arrive at Yo yf(hg a[-R+ (qe x 0.4) ie 2.116, This helps to % which can be represented by the block diagram in describe the actual circuit behavior: the curtent produced by the output voltage across R, is compared with the current produced by the input voltage across the parallel combination of Ry and Ra; the difference current in yields the output voltage across Zr. Therefore, whereas the VFA compares two voltages and negative feedback tends to force their difference v4 to zero, the CFA compares two currents and negative feedback makes their difference ix tend {0 zero. This leads to the “current feedback” term.68 VOLTAGE AMPLIFICATION Solving for V in (2.42) we finally obtain 1+ Ry/Ry Tt Za Woh, (43a) 1+ If (2.40) is substituted into this equation and Ry < Zo, we can approximate Li Ra/Ri_ 1+ Ra/R yp toTh Zo/Re 4 (2.436) + where fe = Zafa/Rq is the closed-loop bandwidth. Therefore, the limited band. width for Zz results in a limited bandwidth for the circuit. However, this bandwidth depends on Rp but not on Rj. This means that R, can be designed to set the bandwidth (although approximately, because Zr is not accurately known), and R, can be selected for the desired gain. This is an advantage with respect to VFAs where a larger gain unavoidably results in a smaller band- ‘width (Example 2.4). Another advantage of CFAs over common VFAs is their larger slew rate: 1000 V/us to 6000 V/s are usual Ina real CFA, (2.41) is only approximate because there is @ drop in voltage across the finite output resistance Ri of the input buffer. In (2.43), instead of Zr/Ro, we obtain: Zr/{Ry + Ra(l + Ro/Ri)]- This implies a reduced band- width for larger gains [5]. but not as severe as in VFAs where the bandwidth is nearly inversely proportional to gain (see Problem 2.8). CFAS are less versatile than VFAs because the use of reactive (capacitive) feedback elements can result in oscillation [5]. Care must be taken in avoiding stray capacitance shunting R2 and Ry in Figure 2.114. In addition, offset vol- tage and drifts, input currents, and noise are larger for CFAs than for VFAs. CFAs lack a CMRR because they are not differential In summary, CFAS are faster than VFAs but far less accurate, Nevertheless, in circuits using two CFAs, it is possible to make the circuit behavior depend on the difference between parameters rather than on their absolute values. This results in a substantial error reduction [6] 2.3.3 Difference Amplifiers Using feedback around op amps moves the accuracy requirements from the op amp to the feedback network. Furthermore, the transfer function of many circuits based on op amps depends on the ratio and matching between resistor pairs rather than on their absolute value. This makes it advantageous to have closed-loop amplifiers including both the op amp and matched resistors on the same die because they will stay matched over temperature. We call these ICs, difference amplifiers (DAs) to distinguish them from the differential amplifiers built from an op amp and discrete resistors. nce acnhereeinigall 23 BU DING BLOCKS FOR VOLTAGE AMPLIFIERS 69 Figure 2.12 shows a DA consisting of an op amp and four on-chip metal film resistors matched so that RoR ROR (2.44) With the “sense” and “reference” terminals connected as shown, the amplifier displays a single-pole low-pass response, Ve= (V2 Mi) Gop (2.45) where fr=hf,. There are models with fr = 1 MHz, and k can be 1 or 10 (INA105, INA106, AMP03). The CMRR is about 100 dB at de and low fre- ‘quencies. Other differential-to-single-ended amplifiers are the INAII7 and the AD#26. ‘Although far less versatile than op amps, integrated DAs with uncommitted sense and reference terminals can be used in several applications other than differential amplifiers. A major shortcoming is their low input impedance, both differential and common mode. Error sources for difference amplifiers are those common (0 voltage amplifiers (Section 2.2.3) but the effects of input bias currents are included in their offset voltage because these currents flow through internal resistors. 2.3.4 Instrumentation Amplifiers Instrumentation amplifiers (IAs) are closed-loop amplifiers with differential input and single-ended output. They offer a high input impedance, both differ- ential and common mode, and a low output impedance. Unlike op amps, however. the transfer function of an 1A does not depend on external (feedback) components connected to signal input terminals. Instead, the amplifier’s gain is FIGURE 2.12 Difference amplifier (DA) consisting of an integrated op amp and a resistor network.70 VOLTAGE AMPLIFICATION internally set by integrated resistors, although in some models it can be mod- ified by external components. External feedback around IAs’ signal terminals ‘can also be used to implement specific functions. Moreover, IAs have a differ- ‘ential input but either of their input terminals can be grounded to implement a single-ended amplifier. ‘The symbol for IAs is the same that for op amps, so that it is convenient to add some feature, such as the “IA” letters, Figure 2.13a, in order to distinguish them from op amps. Signal bandwidth for common TAs, which have a voltage- feedback architecture, reduces when the gain increases. That is, in Figure 2.136, Gols © Gifs © Géfe. The transfer function is (2.26) but with smaller de gain and larger f, than open-loop op amps, resulting in a gain-bandwidth product larger than that of common op amps. IAs with (internal) current-feedback amplifiers do not have such a fixed gain-bandwidth trade-off [7]. Table 2.1 provides relevant data for some IAs. Errors for IAs can be modeled as described in Section 2.2.3. However, an TA. ‘must be regarded as an amplifier with an input section and an output section: the input section amplifies the differential input signal and provides a differ- ential output voltage which is converted into a single-ended voltage by the @ ae ait a, & 6 Lo of moms o FIGURE 2.13 (a) Symbol and (6) gain amplitude for common instrumentation ampli- fers. Basic Parameters of Some Instrumentation Amplifiers? TABLE 2.1 fa 7) f (kHz) MRR AV Q/AT Yo wy (ab) Co uvro, "= 100; the at £15V oF £5V, but other measurement conditions are not necessarily the ar, respectively, the gain erro and gain nonlinearity error for G 1 and ty ithe setting time 10 0.01%. 25°C ambient temperature when supp 100, and has been calculated from data sheets ya eg Jas the 3B frequency for G "Denotes marimal values 10. “For G nls otherwise noted, same. Ve corresponds to 6 CMRR te that at 0H, "Values ae typical “Bias eurent doubles ever 10°C temperature increas. “Percent ofthe Fulscale outputTL VOLTAGE AMPLIFICATION output section, This output section usually has unity gain. Sometimes, manu- facturers specify errors from the input section as “input errors” and errors from the output section as “output errors.” For an IA with a gain G, the (otal error referred to its input (RTI) will be Output error Total error RTI = Input error + “NPY (2.46a) whereas the total error referred to the output (RTO) will be Total error (RTO) = (Input error)xG + Output error (2.466) When G = 1, the RTI and RTO errors are the same, Example 25 The AD622 is an IA whose maximal input and output offset voltage errors, at 25°C, are 125 nV and 1.5 mV, respectively. Calculate the offset voltage referred to the IAs input and referred to the IA’s output when G= 100 By applying (2.46a) to the offset voltage, Vig = 125 WV + (1.5 m¥)/100 = 140 eV From (2.466) Voo = (125 eV) x 100+ 1.5 mV = 14 mV Note that Voo = Vig « G, as expected. 23.5 Switched Capacitors Another approach to differential-voltage amplification is to charge a capacitor with the differential voltage and then measure the drop in voltage across the capacitor, Figure 2.14 shows that first switches SI and S2 are closed and S3 and S4 are opened, so that Cs charges to vg, regardless of the common-mode voltage at the input. Then S1 and $2 open and S3 and S4 close, and the charge in Ce is shared by Ci. If the clock rate for switches is much faster than the changes in 1, then no information is lost because of switching, Given that no charge can be transferred from the upper side to the lower side of capacitors, there is no way for the common-mode input voltage to produce a differential ‘output voltage; hence, the theoretical CMR is infinite, In order to measure the voltage across Cy, an amplifier providing gain and ow output impedance must be used. If one terminal of Cy is grounded, that amplifier can have a single-ended input (see Figure 2.22). Furthermore, the 2.3. BUILDING BLOCKS FOR VOLTAGE AMPLIFIERS 73, ” FIGURE 2.14 Switched-capacitor building block to amplify differential voltages. (a) First, St and $2 are closed and $3 and S4 are open: Cs charges to ry; (6) then $1 and $2 ‘open and $3 and $4 close, transferring the charge from C's 10 Cy. input common-mode voltage will not be applied to that amplifier, so that a convenient differential-to-single-ended voltage converter results. However, when using real switches with ON resistance, stray capacitance, delays, and switching transients (Section 8.2), a switched capacitor with differential output provides a CMRR larger than that for a single-ended output {8}. The LTC1043 is a monolithic, dual switched-capacitor building block. It includes the switches and an adjustable internal clock to drive them ON and OFF. The sampling and holding capacitors are external low-leakage capaci- tors. 23.6 Voltage Buffers Some applications require amplifiers with high input impedance and very low ouiput impedance, but no voltage gain. These are typically applications where large output current, bandwidth or slew rate is required for a circuit requiring @ high input impedance. Using voltage amplifiers for unity gain applications may not be cost effec- five. Monolithic buffers, such as the AD9620/30, BUF600/1/4, BUFO3, LH0033, LTCIO10, LM6121/25, MAX4278, OPAG33, and OPA660 provide {in different units) output current of up to 250 mA, slew rate in excess of 2000 V/uss, and bandwidths close to | GHz. Their gain accuracy, however, is very low compared to op amps and TAs, and their input zero errors are latge.14 VOLTAGE AMPLIFICATION jon, buffers built from fast op Therefore, for accurate unity-gain amplitica amps are preferable, 2.4 de AMPLIFIERS: De amplifiers must be implemented by components able to yield low static errors (offset, gain, and nonlinearity). Preferred active components are: voltage-feedback op amps, difference and instrumentation amplifiers and switched capacitors, The best de performance is provided by op amps using. autozero or chopper techniques [9] or self-calibration techniques (TLC$502, ‘Texas Instruments). In general, components with JFET inputs have larger supply currents than those with BJT inputs. Consequently, they also suffer a larger increase in temperature, leading to gain and offset drifts. Table 2.2 provides data for some op amps with good de performance, De signals are narrowband signals and therefore dynamic errors should not be a concern here. However, for a first-order low-pass frequency response, for instance, from Table 1.3 we know that if a gain error of, say, 0.01% is accepted, then fe; must be at least 71 times the maximal frequency for the signal to be processed. Hence, bandwidth reduction can become an unexpected error source even for frequencies near de, 2.4.1 Single-Ended de Amplifiers ‘Single-ended amplifiers can be built from op amps, DAs, and As. The last two are more expensive but occupy less space. use fewer components and are less susceptible to thermoelectric interference (Section 11.4.1) than those based on op amps. 24.11 inverting Amplifiers A simple inverting amplifier can be implemen- ted by an op amp and two resistors, Figure 2.15a. For high de accuracy, use a VFA. From (2.31), 47 which shows that the sign of the output voltage is inverted. If Ry = Ry, the ‘rcuit is termed a unity-gain inverter. It behaves as an impedance converter: input impedance is Ry and output impedance is close to 0 2. Capacitor C must bbe designed to match amplifier and signal bandwidth; it will introduce a 20 dB/ decade gain roll-off from frequency f= 1/(27R;C) up, because at higher frequencies C has an impedance which is tower than that of R.. To limit the maximal relative amplitude error € at frequency f,, from (1.27) we require 4241S R08. 24 de AMPLIFIERS 75 TABLE 2.2 Relevant Data for Some de Precision Op Amps" AVQ/Ar Aw fr Vn MUn/AT Ny Jn AR/AT Min, Min, Max, Max. GN) Max. Mx, Ma 1. Over the signal bandwidth, CMRR = 126dB = 2 x 10°, which fulfils that condition, ee Ry +R, 100+ 100 x 10" ~ TOOT Hence, the closed-loop gain will have a pole at Jo = frb = 0AMHz/1001 ~ 400 Hz which is high enough compared to the desired $ Hz bandwidth. However, in (2.66) the value for the open-loop gain is also of concern. At de, Aqg = 200V/mV = 2 x 10°, Therefore, = 5x 107 = -0.5% 2x 10° 1 oor «(4ae) This means that the actual gain will not be the desired 1001 but 0.5% smaller, that is, G = 1001(1 — 0.005) = 996, At 5 Hz, the gain error will be larger. In order to reduce this error, Ago should be much higher. ‘A gain of 1001 may seem odd. But, if standard values for resistors are used, it will be difficult to get two resistors whose ratio is 999, unless components with very narrow tolerance are selected. For a 1% tolerance, itis possible to design a resistor ratio of 1000 but not 999, From (2.67), because of resistor 24 de AMPLIFIERS 87 tolerance there will be a gain inaccuracy of up to ‘The actual gain can be as low as 981 or as high as 1021. The resistors’ temperature coefficients are very low and very low power is dissipated in them, so that from (2.67) we find that resistors’ thermal drift should not be a problem here. A noninverting amplifier can also be built from a DA. If no external resis- tors are used. Figure 2.184, then the gain is fixed. Capacitor C will help in reducing bandwidth if the output resistance of the signal source is known, If external resistors are used, Figure 2.18, the signal gain will be oats and the signal bandwidth can be reduced by Cor Ci, or both. {Fin Figure 2.16b the connections for the inverting and noninverting inputs of the IA are interchanged, a noninverting amplifier results whose performance will not depend on external components. Its errors are modeled by (2.57) (without the minus sign for the gain) and (2.58). 242 Differential put de Amplifiers De amplifiers for differential signals are easily implemented by limiting the bandwidth ‘of TAs (Figure 2.19). The corner (-3 dB) frequency will be fe= I/[2x(Ry + Rj)CI. If the source resistances are low in value, itis better to increase C rather than adding series resistors because this would reduce the effective CMRR and increase the noise voltage. ‘The complete expression for the output voltage is (2.24), where IZB is given by (2.22) and the gain error is that specified in the IA data sheet, Input offset voltage can be calculated as described in Section 2.3.4 For low-impedance signals, DAs can also be considered. However, it is difficult to limit their bandwidth and their gain is fixed. The amplifier gain an be tailored to the application by using an external op amp as shown in Figure 2.20. Assuming ideal amplifiers and R, = Ry = Ry = Ry = R, applying KCL to the noninverting input gives,88 VOLTAGE AMPLIFICATION @ o FIGURE 2.18 Noninverting amplifier implemented with an integrated difference ampli Solving fort, x v= RE Feedback, however, can result in oscillation ((4}, Section 2.6). To prevent it, the .gain-bandwidth product (GBP) of the op amp must be large compared to the GBP of the difference amplifier; this makes it difficult to reduce signal band- ‘width for small gains. A differential de amplifier response can be better tailored by using a VFA. and external resistors (Figure 2.21a). The output voltage can be calculated by 24 de AMPLIFIERS 89 FIGURE 2.19 Differential amplifier for de signals based on an instrumentation amplifier superposition from the inverting and noninverting amplifiers. The voltage at the noninverting output will be, If the common-mode gain for the op amp is assumed to be zero, from the gain in (2.48) and from (2.60b), we have R + ®) aaa 2] (2.68) This shows that the loop gain 4gB has the same effect as in single-ended amplifiers. If resistors are matched as in (2.44), then the output voltage will be (2.69) FIGURE 2.20 Differential amplifier with variable gain for de signals.9 VOLTAGE AMPLIFICATION @ o FIGURE 2.21 (a) Differential amplifier for de signals based on an op amp and feed- ‘back resistors (6) Circuit to extend the common-mode range of the previous differential amplifier ‘The ideal differential gain is Gp, = k, and the real gain Under these conditions, the CMRR will be infinite Ifthe op amp has a finite CMRR,, and the resistors are mismatched, it can then be shown that (1] t 1 CMRR = GaRR;T+CMRRG * ACMRR, +CMRR, 2.70) 24 de AMPLIFIERS 91 where L2R2Ry + RoRy + RiRe OMRRR = 3 RR RR my can be defined as the CMRR resulting from resistor mismatch. Equation (2.70) has the same form as (2.18). If external capacitors C are used to reduce ampli- fier bandwidth, the matching condition (2.44) will refer to impedances rather than resistances; in practical terms, this means capacitors will also affect mis- match. If resistors with tolerance te are used (and C =0), the minimal CMRRg will be KU t lt k+1 Ate Te CMRRg This shows that CMRRg depends not only on tx but also on k, although itis more sensitive (0 tp. In order to avoid the use of small tolerance resistors, it is possible to include a potentiometer in series with Ra, but this increases thermal drifts because resistors and potentiometers have quite different temperature coefficients, If (CMRRg +CMRR,a) > 1, then (2.70) can be simplified to 1 1 1 CMRR ~ CMRRg * CMRR,, ae which shows that by unbalancing the resistors itis possible to compensate for a limited CMRRoq at de. Note that the loop gain does not influence the CMR, thus suggesting that a finite loop gain has the same effect on the differential and common mode gains. ‘The circuit in Figure 2.214 extends the common-mode voltage range for the common differential amplifier beyond that of the op amp. There are (wo input voltage dividers: Ry and Rs, and Ry and Rj, It can be shown that if Ry/Ri Rand Ry 2 = (k= 1), then vy = v2 ~ vj. Designing resistors fulfilling these condi- tions is not easy using discrete components. There are, however, integrated circuits providing this function (INAI17). Another method to extend the input common-mode voltage range is by using the floating capacitor technique to implement a differential-to-single- ended voltage converter (Section 2.3.5) followed by a single-ended amplifier (Figure 2.22). Mode conversion eliminates the common-mode input voltage ‘and the output voltage will be v = (vy — 41 + Ra/R)).92 VOLTAGE AMPLIFICATION wn ipo! c FIGURE 2.22 Differential amplifier for signals with large common-mode voltage based on the floating capacitor. A simple differential amplifier can be built from two op amps as shown in Figure 2.23. For ideal op amps, KCL at their inverting inputs leads to Mort _ Me tot Rp Rx s By solving for 1, we obtain it LR, * Re FIGURE 2.23 Differential amplifier based on two op amps. 24 de AMPLIFIERS 93 In order for the output voltage to depend only on the differential input voltage v1 the gain for euch single-ended voltage must be the same. This condition fulfilled when Ry_R RR; Then, the output voltage is eee Rt Ry fy =O wo(eais 3 ') which shows that the gain can be tuned by Ry without modifying any of the matched resistors. However. ifthe amplifier bandwidth is to be limited, then Ry and Ry should be shunted by capacitors, and it would be difficult to keep the resulting impedances matched, The INA126 is an integrated 1A using two op amps and matched resistors, and whose gain can be selected from 5 to 10000 by an external resistor. If the op amps in Figure 2.23 ate now considered to have limited open-loop differential gains, Agy and Ags, and, for simplicity, Ry = Ry = Ry = Ry = R. then it can be demonstrated that Gp ~ 2(1 + R/R,) (provided Agy and Ays are large enough) and 2 tg ET OEIRY, la : ® ear(et This shows that the common-mode gain will never be zero, even if 4y, = Ags. This is because the circuit is not symmetrical for both input voltages: vy goes through two op amps, whereas v> goes only through one, Furthermore, at the output of the first op amp, the common-mode signal is amplified by (Ry + Ro)/Re, so that a large gain can lead to saturation. For these reasons, {his circuit has good performance only at very low frequencies and, even in this ‘ease, for precision applications Ags and Aja must be both very high. Section 2.6.1 analyzes a better and more popular differential amplifier based on three op amps, 24.3 Fully Differential de Amplifiers ‘An amplifier with differential input and differential output can be built from {wo TAs, Figure 2.24a. If the common-mode gain for each amplifier is finite, the94 VOLTAGE AMPLIFICATION " iat) % 5 ‘ Ya Ma. vn Ry F FIGURE 224 Fully differential amplifiers built from (a) two instrumentation ampli- fiers. (6) two op amps. respective outputs will be Vou = VivGiv + VeGie You = —VinGan + VicGie From (2.2) and (2.3), we obtain 1 Geo = 3(Gre + Gre) Gop = Gin + Gao Gc = Gye ~ Gre (Gin — Gap) 24 de AMPLIFIERS 9S ‘The corresponding figures of merit will therefore be (2.73a) (2.73b) (2.73) 2G ¥ Gy We conclude that in order for the amplifier to have a large C, the two IAs do ‘not need to be perfect but they must be matched. If the differential gains are not the same, E will not be zero. However, this is irrelevant if only the differ- ential mode signal is of interest. Common-mode gains, however, must be matched, This result is qualitatively the same as that previously obtained for two independent single-ended amplifiers in parallel (Example 2.1). Figure 2.24b shows a rather different approach to designing fully differential circuits. Instead of two parallel, independent amplifiers, here (wo op amps are “coupled” by sharing resistor R, and there is no ground connection other than that at the power supplies. I first the op amps are assumed to be ideal, Vou = VinlG, +) — VG Vou = —VinG2 + VilGz +) where G; = Ri/R, and G; = RY/R. By adding and subtracting these (wo equations we obtain Vou — Vou = (Gi + G+ WVin ~ Vind (2.74a) Vou + Vou _ Gi - Gy, Yow + Vin, z in = Mi) +S (2.74b) From (2.74b), Gee Goo and from (2.74a) Gop = Seo96 VOLTAGE AMPLIFICATION The corresponding figures of merit will be C= 00, D=1+G)+Gy and E = (G, ~G,)/2(1 + Gy + G;). Thisis quite remarkable because the imbalance between G, and G affects only factor E, not factor C. Consequently, if signal bandwidth is reduced by shunting R§ and RJ with respective capacitors, these capacitors need not be matched either This high common-mode voltage rejection is easy to understand by inspect- ing Figure 2.24h: a common-mode voltage applied to the input (% = ty = ti.) is reflected at the inverting inputs of the op amps. Then, if both ends of Ry are at the same voltage, no current will low through it. Hence, no current will flow through RJ and RY either, and von =r = te, implying Gee = 1 and Gye = 0. Because there is no direct ground connection, there is no way by which a common-mode input voltage can result in a differential voltage at the output. If now the circuit in Figure 2.24 is considered as the result of coupling two noninverting amplifiers like that in Figure 2.17, we ean conclude that the design of fully differential circuits by symmetrical coupling (or mirroring) single-ended circuits results in an infinite CMRR. If in Figure 2.24 the op amps have limited differential gain and CMRR, the analysis 1] leads to Vay + Aei/2+ Aap + deal? + 2Ags Aan ~ AerAca/? 2 Ag + dai? = Ay — Ag /2 + Aavda — Aad an TE RVR, PRET, ‘These equations show that in order to achieve a large CMRR, the op amps must be matched for both the differential and common-mode gains. It is neither necessary for the differential gain to be very high nor for the com- mon-mode gain to be very small. Dual op amps (two op amps in the same package) offer good matching. In the usual case where Ay > Ac, (2.75) can be simplified to Asie = gy = Aas 2 Aas —_—_— 2.78 Aa: + Acs asi Aade which shows that the value for C will be very high at low frequencies, where ay and Agy are very large and Aq, and Aq are comparatively very small. Furthermore, for matched op amps, Ag Af 4a APB 14S AP Gop = (2.71) 25 ac AMPLIFIERS 97 2.77) where G= (Ry + Ri + RI)/R,. Equation (2.76) then takes the form a Ga Ac ON OT = AB i) where 6 = 1/G is the feedback factor. Therefore, D will decrease at frequencies which will be smaller for large signal gains. Equations (2.77) also show that the cuit diferential and common-mode operations are quite differen because G affects Gpp but not Gee. White [10] analyzed the possible oscillation because of the common-mode signal when using op amps not compensated for unity sain; the solution proposed to achieve stability 1s to split Ry into two halves and place a RC network from the central point to ground. 2.5. ac AMPLIFIERS ‘Ac signals coming, for example, from reactive sensor bridges and impedance measurements, must be amplified by ac amplifiers. Some biopotentials (electro- cardiogram (ECG), electroencephalogram (EEG). and electromyogram (EMG)) and signals from piezoelectric sensors, also need ac amplifiers. AC signals, in general, can be broadband or narrowband and low-impedance or high-impedance (Section 1.2). ‘The de performance of many ac amplifiers is irrelevant because their output can be ac-coupled to the following stage. Indeed, ac amplifiers can be built by preceding de amplifiers with an ac-coupling network presenting a large input {impedance over the entie signal passband (Figure 2.25), Then only dynamic errors must be considered. This section concerns only these ac amplifiers Section 2.6 considers amplifiers for those ac signals that include low-frequency components, thus also requiring good de performance. The transfer function for the amplifier in Figure 2.25 is Sa fititha tif GN) =, whose maximal amplitude can be calculated by setting the first derivative ofits Squared modulus to zero, d]G/*/df = 0. This leads to IGparl = Go 98) \ i 7 (2.79a)98 VOLTAGE AMPLIFICATION c yo @ o FIGURE 2.25 (a) Ac amplifier based on preceding a de amplifier by an ac-coupling network: (b) its frequency response which is achieved at a frequency Sax = Vii (2.79) ‘Therefore, f, and fx must be well apart, otherwise, for an expected gain Go there would be an appreciable gain error, \Gnanl = Go __ fi ony oo Gs Atha This error could certainly be calibrated out, but the error from the gain roll-off could not, ‘Common building blocks for ac amplifiers are: op amps (both VFA and CFA), DAs, and IAs. In VFAs, to ensure stability, usually the open-loop gain is made to roll off at ~20 dB/decade. This reduces slew rate and bandwidth. 25 sc AMPLIFIERS 99 ‘The bandwidth reduction is greater for larger gains (Section 2.3.1.1). There are ‘VFAs with uncompensated open-loop response whose bandwidth and slew rate are larger; however, in order to ensure stability they must operate with a gain higher than a specified minimum. Current-feedback op amps do not have this restriction. In general, op amps with large bandwidth also have large supply ‘currents so that they may induce thermal drifts in nearby components. Table 2.3 provides some parameters for wide-bandwidth op amps. TABLE 2.3 Relevant Data for Some Op Amps with Good ac Performance” ‘GBP Slew Rate Setting Time’ — Comments (MHz) ius) (as) Bipolar ADSI7 0 350 70 ADEE 0 2000 (100) CFA FL2020€ 50 500 0 EL2168C 30 500 110 CFA HA2500 R 0 (330) HASO04 100 1200 (50) CFA LMBIs 15 30 (1000) LM6I81 100 2000 (50) CFA M6313 35 250 200) M7171 20 100 = LT1220¢ 45 200 (90) LrI222¢ 350 200 (90) G>0 L223¢ 100 1000 5) CFA MAXa73 10 15 (400) op27 8 28 ~ op? 63 7 : Gos OPAG23 Mo 2100 ° CFA OPAG28 160 310 “4 THS4001 300 400 20) ‘TLE2037 0 75 = Gos TLEDISIM 39 4s 400 Bitet D843 u 230 135 ADS 6 100 350 LFIS6A $ 2 1500 LTIOSSAC 35 10 1500 LT122AC 4 o 340 OPISE 6 0 4500 opa2 10 30 900 OPAG27 16 55 550 TLosIc 3 1s : a {All values are typical at 25°C but other measurement conditions are not necessarily the same. "To 0.01%; values in parentheses to 0.1%.100 VOLTAGE AMPLIFICATION Whatever ICs are used, when implementing ac amplifiers we should mini- ‘mize stray capacitance, which can result in reduced bandwidth and even oscil lation, Careful passive component selection and circuit layout are mandatory. Furthermore, wide-bandwidth circuits are interference prone. Interference reduction is analyzed in Chapter 10. 2.5.1 Single-Ended ac Amplifiers ‘A simple inverting amplifier can be built by adding a series capacitor to the input resistor of a de inverting amplifier based on an op amp, Figure 2.26a. From (2.31a), the (transform of the) output voltage (excluding offset and noise terms) will be where fi =(2rR)C))! and, from (2.30), pone 1+ j2mfRiC) Ati D+ Zz WFAA R + RIG 7g pRB A a At frequencies much higher than fi, Z1 © Ri; then, 6* Ry/(Ri + R2), and by substituting (2.32) we obtain (2.80) where fi; = Aga/aRi/(R; + Ra). Therefore, for this cireuit we have fi, =fi and fy =o, provided C does not reduce the upper comer frequency to Sr =V/Q2xR:C) such that fr < fo. Figure 2.26b shows the amplitude of the ‘op amp open-loop gain and the amplifier closed-loop gain. ‘The main shortcoming of this inverting amplifier is that its input impedance in the passband is Ry, Figure 2.26c, and this resistor must be kept low in value iffa large gain is desired. Otherwise, Rz should be large and stray capacitance C would severely reduce signal bandwidth. Figure 2.274 shows an inverting amplifier based on an 1A. The input impe~ dance in the passband is again Ry, but now its value is dictated only by amplifier bias currents, not by the gain. For this circuit, fi =/, and far = fos where f, is the comer frequency of the 1A’s gain, which is internally set, Figure 2.216. ‘A noninverting amplifier can also be built by ac-coupling a de noninverting amplifier, Figure 2.28a. In the passband, the gain amplitude will be 1 + Rx/Rj 25 sc AMPLIFIERS 101 pot a [va Low, © « IGain| + mo a lat LZ ON ‘ot Lh 12 A, of 4 © FIGURE 226 (a) Ac inverting amplifier based amplifier based on an op amp: (6) amplitude of the open-loop and closed-loop gain; (c) input impedance, "102 VOLTAGE AMPLIFICATION “, FIGURE 2.27 (a) Ac inverting amplifier based on an instrumentation amplifier: (4) its gain amplitude and the input impedance Rj, whose maximal value depends on bias currents for the op amp. The corner frequencies will be fi =fi=1/QnR,C) and fin = Se: = AafaRi (Ry + Ro). Figure 2.286 shows a similar solution using an IA. In both circuits, signal bandwidth reduces in proportion to the gain increase. For broadband signals, a CFA can provide a better solution, Figure 2.28c. By applying KCL to the node where resistors meet, By applying KVL to the same node, Vy= Vy Inks 25 ac AMPLIFIERS 103 yo o FIGURE 2.28 ac noninverting amplifiers based on (a) a VFA, (b) an A. and (c) @ CFA.14 VOLTAGE AMPLIFICATION ‘The output voltage is given by (2.41b), Vo = hee where the transimpedance Z is given by (2.40). By solving for V,, the transfer function, excluding the input network, is 281) where 2.82) and the approximation in (2.81) is valid for frequencies well above fy (in the range of hundreds of kilohertz). Therefore, for the complete circuit, fy, = 1/QAR,C) and fy = fo. This upper corner frequency can be changed by Rs without modifying the gain in the passband. 25.2 Differential-Input ac amplifiers ‘The approach described above for single-ended amplifiers can also be applied to differential amplifiers (Figure 2.29). Here, however, care must be paid to the CMRR of the ac-coupling network. {f two independent networks are used 9s in Figure 2.292, they must be closely matched or a low CMRR will result (see Example 2.1). The coupling network in Figure 2.29 does not need any com- ponent matching. Ideally, only R, and Rj should be used (or, better yet, a single resistor instead). But Ry must be included in order to provide an input bias path. By applying the delta-star impedance-transformation rules, the dif- ferential and common-mode input resistances can be calculated, 2 RiRi Ry = Ry + Ri + RL 1D = RHR +e R= RE + Rt 25 ac AMPLIFIERS 105 @ 6 FIGURE 2.29 (a) Differential ac amplifer built from an IA. (b) Circuit does not require any component matching in order to achieve a large CMRR. From Section 2.2.2, we can use the results for amplifiers with finite input impedances. Then, from (2.18) the effective CMRR will be 1 TEE] where C; and C, are the respective CMRRs for the input network and the IA. From (2.14), 1 2ReRE + Zi RE + ZiRe 2 ZORe— Redz,106 VOLTAGE AMPLIFICATION Ifdifference values (AZ\,. Rca) are expressed as a function of average values (Ziys Req) and tolerances for resistors (t) and capacitors (¢c), we finally obtain Regt _ Rig + 2Ro/( =e) F20f Ria + 2RIC ia aoe (2.83) Zin tetle 1 tint le PaICAT= EA where the approximation holds for fg, fc < 1. C; increases with frequency, 50 that at high frequencies the overall CMRR will be determined by the ampiifier. Note that in (2.83) the CMRR will increase for large values of R; without affecting much the lower corner frequency, dictated by Ci, Cj, Ry and Rj. We will have fy = fy =[2n(Ry + Rj + RR/RIC CIC, + CD! and fu = fo Example 2.7 Calculate the improvement in the CMRR provided by th put network of Figure 2.296 with respect to that in Figure 2.29a when using 100 nF capacitors to achieve a corner frequency of 1 Hz and R: = 10 MQ. First, input resistors are calculated from 1 Rell t TRG, ACh = Ix loonk) UH = 1ME A Next, by evaluating (2.83) for Ry = 10 M@ and for Ry = 0, and by dividing the results, GMOMQ) _ Rig +2Ry_ 1.6420 G02 ~~ Ry Te 7 BS which represents an improvement better than 22 dB. ‘A rather different approach to implement differential ac amplifiers is by feeding the de component of the output voltage back to the reference terminal of a de differential amplifier (Figure 2.30). The 1A’s output voltage will be Vo = OW, — Vid + Ve For the op amp we have, U@2xfCi) __=Vo Rx PAAR Cy 25 ac AMPLIFIERS 107 FIGURE 2.30 Differential ac amplifier built by feeding back to the reference terminal ‘ofan JA the de component of the output voltage. which is the de component of vg, By solving for Vo, (2.84) Hence, fy = fi(2eR\C\)"! and fiy = So. 25.3. Fully Differential ac Amplifiers By combining the fully differential de amplifier in Figure 2.24 with the ac- coupling network in Figure 2.296, we obtain the fully differential amplifier in Figure 2.31. The lower corner frequency fi is the same as that for the corre- sponding differential amplifier. The upper corner frequency can be derived from (2.77); it is fia * Auohe/G. wo 7 a a fe Re wo, ana o FIGURE 231 Fully differential ac amplifier.108 VOLTAGE AMPLIFICATION 0 iy rw a c= R, Vp teow of @ ho YG o FIGURE 2.32 (0) Fully differential ac amplifier; (b) its approximate amplitude response. The circuit in Figure 2.32a uses fewer passive components than that in Figure 2.31. The differential gain Gpp can be derived from (2.77a) by substi- tuting Ry + 1/(2nfC) for Ry in G. Goo takes then the form [11] Ag G00 = a 26 COMPOSITE AMPLIFIERS 109 where 1+ j2mfR\C (+i) THPMIQR + RIC +i B 2a(Ry + 2R)CY! and fo = (2nR,CY'. The amplitude for Gpp is repre- sented in Figure 2.32h. At very low frequencies, Gop ~ 1, and therefore this is not a true ac amplifier. For frequencies in the passband (/ > f,. f.) Gop ~ fa/fi,=(Ri +2R2)/R;. The phase shift is zero at frequency Jn = (fehi)"”. This frequency can be tuned up by varying C. Note that fr for ‘op amps is not accurately known. 2.6 COMPOSITE AMPLIFIERS Itis often difficult to achieve the desired gain, bandwidth, and accuracy using a single integrated circuit. On the one hand, technology limitations thwart the production of devices with good de and ac performance. On the other hand, there are many challenging applications out of the reach of even the best devices. Composite amplifiers include two or more basic amplification stages combined so as to yield the desired performance. By using several building blocks, it is also possible to implement @ novel function, as shown for example in Figures 2.20 and 2.30. Note that slew rate cannot be improved by “distri- ‘buting” it among several stages. Ifthe stage with the larger output is not fast enough, the output waveform will be distorted. 2.6.1 Cascaded Amplifiers Bandwidth limitation can be solved by distributing the desired gain among several cascaded stages where each stage amplifies the output of the previous one. With this technique, however, any output error from one stage is amplified by the following stages. Furthermore, the CMRR for differential amplifiers will depend on the CMRR of each stage, not only on that of the first stage [12 In Figure 2.33, for example, Yoo = Vin(Gon1Gp0rGons + Goo Gem2Gnes + Geni GoexGons + Geo GeeaGoes) + Vic(GociGo02Go0s + GoerGeorGnes + GeciGoe2Gnns + GeeiGeexGpes) 80 that the overall gain will be the product of gains for each stage, Gpp =110 VOLTAGE AMPLIFICATION | S01 Goes Goce Goce Geos Gocs FO Veer Ye P| Goon Ger Geoe Goce Geos Goes | Ya. FIGURE 2.33 Cascade connection of three fully differential amplifiers. Go01Gop2Goos and the overall CMRR will be MRR, = 202102001 + GeorGoes) + Geo1GoerGons + GeexGoes) T* Goci(Goo.Gons + GeoGoes) + Gee Goe Gps + GceaGoca) By using the expressions for the respective figures of merit, U4 E/C, + £y/D3Cy + £3/Cs CMRRr V/C) + 1/D, Cy + L/D, DyCy + Ex/CyCy If E, & Gigs and Ey & Digs Cia, We cam approximate where CMRR, =C), Ca, CMRR, = DyD2Cy. That is, the reci- procal of the overall CMRR equals the sum of reciprocals of the CMRR of each stage, and the CMRR ofeach stage is its factor C(CMRR when the stage is considered alone) times the discrimination factors of the previous stages. Therefore, in a general case with m stages, cane, ~ OAR, oy MRR, = GT] D, (2.86) with CMRR, = C;. Equation (2.85) isa generalization of (2.19). IFCMRR, has the same sign for all stages, then CMRRy < CMRR,. If two or more stages have a CMRR with opposite signs, then CMRRy can be larger than any CMRR, The result for CMRRx would have been the same if the last stage in Figure 2.33 had a single-ended output. However, fully differential stages have a CMRR larger than that for differential amplifiers. Therefore, by connecting a fully differential amplifier like that in Figure 2.24b with gain G to a differ- ential amplifier like that in Figure 2.12 or 221(a) with gain k and CMRR = Cy, we obtain an instrumentation amplifier with gain Gk and 26 COMPOSITE AMPLIFIERS 111 MRR = GC, at low frequencies (Figure 2.34). This circuit is termed a three- ‘op-amp 1A, because itis usually implemented by op amps Another negative consequence of cascading amplifiers is ertor propagation. In Figure 2.33, the output zero error (OZE) will be OZE = IZE,Gp0:Gv02Gpps + IZErGpp2Gpp3 + IZEsGops ‘This will clearly be larger than the zero error of a single amplifier with the same overall gain. 2.6.2 Feedback Composite Amplifiers Section 2.3.1 shows that negative feedback has some remedial properties ‘enabling us, for example, to trade off gain for accuracy. Hence, negative feed- bback can be applied to a multistage amplifier in order to reduce some errors. In Figure 2.35a, op amps share a common feedback network. The circuit can be analyzed by the voltage-divider method (Section 2.3.1.1) according to Figure 2.356, to yield Vo ub 5G where G is the gain for the minor feedback loop, wo hh FIGURE 234. Three-opamp instrumentation ample obtained by connecting afl differential amplifier to a difference amplifier. * *112 VOLTAGE AMPLIFICATION « 1-H O-a % o FIGURE 2.35 (a) Feedback composite amplifier and (6) its block diagram. By substituting, we finally obtain Vo UB peo 287) Aa AiAaB In order for the gain to be determined by the feedback network, we need Agi. AaiAagb> |. For a single amplifier, achieving the same objective would require 44,8 > 1, which would certainly be more restrictive, It is straightforward to show that the input zero error is Vion IZE = Vig) + Hence, if the first op amp has a good de performance, the composite amplifier will have a good de performance too. Then the second op amp can be a fast model (probably with poor de performance) providing good slew rate, However, fast VFA op amps may have additional poles in their open-loop gain, which can lead to oscillation. To prevent it, a compensation network 2.7 PROGRAMMABLE-GAIN AMPLIFIERS 113, may be required to reduce the gain at high frequencies [13]. Alternatively, a CFA can be used (see Problem 2.18). Composite differential and fully differential amplifiers can also be imple- mented by the same approach and applying the cireuit-mirroring technique described in Section 2.4.3. 2.6.3 Paralleled Amplifiers The parallel connection of several identical amplifiers improves the output ‘current capability offered by a single amplifier (Figure 2.36). The overall cur- rent will be /, =, +/; and for similar amplifiers working at the same tem- perature (similar output resistance), /, ~2f. A shortcoming is that output ‘offsets result in currents that can damage the internal output stage of each amplifier because of excessive heating. Those currents can be limited to a safe value by placing limiting resistors as shown, Paralleled amplifiers have also been proposed to reduce voltage noise {14}. Voltage noise decreases as the square root of the number of amplifiers paral- Jeled. For example, nine amplifiers in parallel would offer a noise voltage three times lower than a single amplifier. 2.7, PROGRAMMABLE-GAIN AMPLIFIERS Amplifiers adapt the dynamic range of a signal to that of another signal pro- cessor, such as an ADC. If signals with different amplitudes have to share a common amplifier, amplifier gain must be switched accordingly. Normally, switches are controlled digitally. hence the term programmable-gain amplifier (PGA). Electronic programmable-gain amplifiers consist of one or more inte- grated circuits and, sometimes, a passive feedback network, in which case ae “Tap, im _ A h Load a De, A, FIGURE 2.36 Parallel connection of two amplifiers to increase the output current ‘capability.14 VOLTAGE AMPLIFICATION this network determines the gain. Consequently, an amplifier can be made programmable by changing the active circuits, the feedback network, or both. Integrated amplifiers whose gain can be changed under digital control are termed software programmable. Such is the case of the ADS26 and the PGA20X series. Ofien, for IAs, it is possible to change gain by connecting some specific pins tied to integrated resistors; these are pin-programmable ‘amplifiers, such as the AD621, AD624, INA102, and INA110 {15} PGA built from discrete parts must be designed so that electronic analog switches (Section 8.2) do not interfere with signal currents, because that would result in gain errors and gain drift with temperature change. Figure 2.374 R, st p=] % 82 Le a, @ 4% my RSA, st 82 R Ry o FIGURE 2.37 Programmable-gain noninverting amplifiers built from discrete components 27 PROGRAMMABLE-GAIN AMPLIFIERS 115 shows a noninverting amplifier whose gain can take two different values, Ry Gi=I+ RFR (SI closed, S2 open) R+Ry G,=1+ 2 ($1 open, $2 closed) "500 0 FIGURE 2.38 Noninverting programmable amplifier built from a programmable op amp.116 VOLTAGE AMPLIFICATION Sta IRE 2.39 Programmable-gain amplifier for differential signals. Note that currents through SI and S2 are negligible. Resistor Ry should be low in value in order to minimize transients when the gain changes, Switches must perform a “make-before-break” (mbb) action so that the op amp is never left in the open-loop condition. That action is easy to achieve by using integrated switches such as the DG243. An alternative circuit is that in Figure 2.376 where each gain is determined by a different resistor ratio. In [16] there are several other single-ended PGAs based on standard resistor arrays. Yet another approach to designing PGASs is to use ICs integrating several amplifiers that can be switched on/off under digital control. For example, the HA2400, EHA2400, and LM604. Figure 2.38 shows a noninverting amplifier ‘with gain 1, 2, 4, or 8, built from the HA2400 and external resistors. The gain is selected by two bits, DO and DL Differential PGAs can be implemented by symmetrically coupling single- ended amplifiers. The gain for the differential amplifier in Figure 2.39, for example, can be switched from 1 to 1 + (Ry + Rj)/R). Switches must be oper- ated by pairs: Sa and Sib, and S2a and S2b. Y 28 PROBLEMS 117 2.8 PROBLEMS 21 A_ given differential amplifier with gain Gy=10 has a CMRR = 1004B/0” at low frequencies, which decreases by 20 dB/dec- ade from 10 Hz up (asymptotically) and whose phase goes from 0° to —90°. Calculate the amplitude and phase of the output voltage when a 1 V common-mode signal is applied to its input, whose frequency is 60 Hz, I kHz, and 20 kHz, 2.2. Calculate the common-mode rejection ratio for a fully differential amp- lifer consisting of two parallel single-ended amplifiers whose respective transfer functions are Gy = Gores /io+ ai) and Ga = Goxi2er/{jw + Wea), where o = Inf, Write the result as a function of the average and difference values for the low-frequency gains and corner frequencies, and the CMR at very low and very high frequencies. 2.3, Calculate the figures of merit for the fully differential circuit in Figure P2.3 based on two voltage buffers whose differential and common-mode gains are different, Loy, FIGURE P23 A fully differential buffer built from separate buffers requires lightly matched op amps to achieve a large CMRR. 24 A balanced differential signal with 120 © source impedance is applied to a differential amplifier whose common-mode input impedance is | M& [100 pF with 1% tolerance in the resistance and 5% tolerance in the capacitance. If the CMRR for the amplifier at 1 kHz is 804B/0°, cal- cculate the effective CMRR at I kHz in a worst-case condition, 25 Calculate the effective CMRR for a sensor bridge whose output resis- tance is 100 2 with a maximal 1% unbalance, when connected to a differential amplifier whose common-mode input resistance is 50k and CMRR = 90dB. If the bridge is supplied at 10 V and the amplifier has unity gain, calculate the output voltage resulting from the bridge supply when it is balanced and when its equivalent output resistance has 1% unbalance.18 26 27 28 29 241 212 243 214 245 216 247 VOLTAGE AMPLIFICATION The OPA-27CGP (Burr-Brown) is an op amp whose thermal resistance is Gy = 160°C/W and, at 25°C, has a typical quiescent current of 43.3 mA when supplied at £15 V and the output current is 0 mA, Calculate its actual temperature when the ambient temperature is T, = 30°C, Calculate the frequency at which the gain is 1% below the de gain Go when Gy = 10 and Gp = 100 for a noninverting amplifier built using an OP07 whose fy = 0.6 MHZ (typ.) and fr = 0.4 MHz (min.). Compare the results with those in Example 2.4 ‘An amplifier based on a given CFA has a ~3 dB bandwidth of 100 MHz ‘when the feedback resistor is 1.5 kS and the gain is 1. If the output resistance of the input buffer is 50 &, calculate the bandwidth for a gain of 100. Derive (2.62b) from the analysis ofthe circuit in Figure 2.17b. Calculate the value for C in the amplifier of Figure E2.6 so that the gain error at 5 Hz is less than half the maximal quantization error for an 8 bit, system, Demonstrate that in the differential amplifier of Figure 2.21a, the loop gain has the same influence on the differential and common-mode gains. First assume matched resistors and a common-mode gain ¢ for the op amp. Then assume 4, = 0 and mismatched resistors. Calculate the output voltage in Figure 2.23 when Ry is connected to a reference voltage V; instead of being grounded. Assume ideal op amps. Calculate the IZE for the fully differential amplifier in Figure 2.246 when using the OPO7 op amp and the gain is 100. The CMRR of dual op amps is often specified in linear units, not in decibels. If we have one op amp with CMRR, = 1:V/V and another one with CMRR, =0.75,V/V, calculate the difference in CMRR depending on whether the respective CMRRs have the same or different sign, and express that difference in decibels, Find the transfer function for the amplifier in Figure P2.15 assuming an ideal op amp. Discuss the effect of the finite GBP of the op amp, Analyze the effect of the tolerance of C; in the maximal gain of the amplifier in Figure P2.16, assuming an ideal op amp. Figure P2.17 shows an ac-coupled buffer. Find its transfer function at low frequencies (ideal op amp) and determine the condition to have a flat gain. 28 PROBLEMS 119 FIGURE P2.18 A T-network including a capacitor yields a large ac gain but limits de agin, hence preventing saturation because of op amp offset voltage Se FIGURE P2.16 To ensure that the low-corner frequency is not higher than the desired value, Ry must be large enough to compensate for the tolerance in Cy Ry + FIGURE P217 High input impedance sc coupled bulfer built from low-value resistors,10 248 219 220 VOLTAGE AMPLIFICATION Find the gain and bandwidth of the composite amplifier in Figure 2.18 depending on whether the second op amp is a VFA identical to the first one, or a CFA, all with finite gain. Determine the bandwidth improvement for the composite amplifier in igure P2.19 as compared to an inverting amplifier with the same gain using a single op amp. Find the gain and bandwidth for the composite fully differential amp! ficr in Figure P2.20 assuming identical op amps. FIGURE P2.18 A composite amplifier whose first stage uses a VFA and second stage uses a CFA has a large bandwidth and a good de performance. FIGURE P2.19 Nesting two VFAs in a composite amplifer boosts the equivalent open loop gain yo: FIGURE P2.20 Mirroring single-ended composite amplifiers yields a fully differential ‘composite amplifier. REFERENCES 121 REFERENCES: iu) a 81 4 (1 (4 a 8) eo to} on 013 013) 114) 03) 4 R. Pallis-Areny and J. G. Webster. Common mode rejection ratio for differential amplifier stages. IEEE Trans. Insirum. Meas., 40, 1991, 669-676. S, Franco. Design with Operational Amplifiers and Analog Integrated Circuits, 2nd ced, New York: McGraw-Hill, 1998, J, Dostil. Operational Amplifiers, 2nd ed. Boston: Butterworth-Heinemann, 1993. J. Graeme. Optimizing Op Amp Performance. New York: McGraw-Hill, 1997, S. Franco. Current-feedback amplifiers. In: J. Williams (ed.), Analog Circuit Design, Chapter 25. Boston: Butterworth-Heinemann, 1991, B. Harvey. Dual-amplifier designs increase the accuracy of current-feedback amps. EDN, 38, 5, December 9, 1993, 129-134 . Kitchin and L. Counts. Instrumentation amplifier application guide, 2nd ed. Application Note. Norwood, MA: Analog Devices, 1992, M. Gasulla, J. Jordana, R. Pallis-Areny and J. M. Torrents. The floating capa- itor as a differential building block. In: Proc. IEEE Int. Meas. Technol. Conf. 1997, Ottawa (Canada), May 19-21, 1997, 1500-1504. C.C, Enzand G. C. Temes. Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling and chopper stabiliza- tion. Proc. IEEE, 84, 1996, 1584-1614, D. R. White. Phase compensation of the three op amp instrumentation amplifier. IEEE Trans. Insirum. Meas.. 36, 1987, 842-844, R. Pallis-Areny and J. G. Webster. AC instrumentation amplifier for bio- impedance measurements. IEEE Trans. Biomed. Eng. 40, 1993, 830-833. R. Pallis-Areny and J. G. Webster. Common mode rejection ratio for cascaded differential amplifier stages. IEEE Trans. Instrum. Meas, 40, 1991, 677-681 J. Graeme. Phase compensation perks up composite amplifiers. AR-036. Tucson, AZ: Burt-Brown, 1994 J. Williams. Composite amplifiers, Application Note 21, Milpitas, CA: Linear Technology. 1986. D. Jones and RM. Stitt. Programmable-gain instrumentation amplifier Application Brief AB-042. IC Applications Handhook. Tueson, AZ: Burr- Brown, 1994, S.C. Dutta Roy, Digitally programmable gain amplifiers. JEEE Trans. Instrum, Meas.. 33, 1984, 329-332,3 CURRENT-TO-VOLTAGE AND VOLTAGE-TO-CURRENT CONVERSION Current signals in instrumentation come, for example, from photodiodes (blood analyzers, smoke sensors, infrared pyrometers, chromatographs, posi- tion sensors), nuclear and x-ray radiation detectors (CT scanners), ionization chambers, some temperature sensors (AD590 family), impedance measure- ments by injecting voltage, and current loops (4 mA to 20 mA). Current is also of interest to perform some operations such as signal integration (by charging a capacitor). Some digital-to-analog converters also offer current outputs. ‘Therefore, we need to convert input currents into voltages, and then use voltage amplifiers, or other analog processors, and convert voltages into cur- rents and then process these currents. This chapter deals with these two com- mon functions. In both cases, first we analyze the ideal converter. Then we ‘consider the real situation, together with the ICs available to implement these processors (in addition to those studied in Chapter 2). Finally, we describe some common converter circuits and their zero and gain errors. As for voltage amplifiers, fully differential converters are the general case; single-ended con- verters are particular cases. However, to implement some functions we first consider single-ended circuits in order to later design differential circuits by the mirroring technique (Section 2.4.3). 3 IDEAL CURRENT-TO-VOLTAGE CONVERTERS In an ideal current-to-voltage (I/V) converter, an input current signal mod- ulates power from power supplies and provides an output voltage in the 31 IDEAL CURRENT-TO-VOLTAGE CONVERTERS 123. same mode (differential or common) as the input, without any distortion in amplitude or phase. No energy is transferred from the signal source to the converter. No energy is transferred from the converter to the following stage. Thus there is a zero input impedance and a zero output impedance. Moreover, the performance is immune to environmental factors, such as temperature, time, and power supply fluctuations. A fully differential 1/¥ converter can be described by four transfer impe- dances, Figure 3.la. We can describe input currents by their differential and ‘common-mode components, Sip G.la) iekib ey meaning that ip flows around the signal loop and ic flows through the ground return, We can also describe output terminal voltages by differential and com- ‘mon-mode components as usual, wn tf (2 wap te = MP a2 Holz 0 bow 0 Zc FO vm, tof ” FIGURE 3.1. (a) Transfer impedances for a fully differential current-to-voltage con- verter. (6) For an ideal case these reduce to two,124 CURRENT-TO-VOLTAGE AND VOLTAGE-TO-CURRENT CONVERSION Transfer impedances in Figure 3.1a are defined similarly to the gains in Figure 2.14, equations (2.3a) to (2.34). The differential-mode transfer impe- dance, for example, is the (transform of the) differential output voltage divided by the (transform of the) differential input current Vos 200 = pe To liao G3) Analogously, the common-mode transfer impedance is Zee Vac/Ie when in =0; the differential to common-mode transfer impedance is Zcy = Voc When jy = 0; and the common-mode to differential transfer impedance is Zpe Vec/Ip when ic =0. These transfer impedances do not describe input or output impedances but input-output relations. Input and output impedances are considered to be ideal (zer0) here. By applying the superposition principle, the output voltages fo converter will be linear 11V Von = Zopln + Zocl 4a) Voc = Zevly + Zecle G.4b) In an ideal converter, all transfer impedances are independent of input current amplitudes and frequency. In addition, there is no signal mode con- version: the differential output voltage depends only on the differential input current and the common-mode output voltage depends only on the common- mode input current. That is, Zpc = Zcp = 0. $0 that there are only the two transfer impedances in Figure 3.15, whose quotient is termed discrimination ratio, Zov Zc Bs) For a differential converter with single-ended output, uj, = OV, and we define only two transfer impedances: Zp =Zpp and Z-=Zpc. For a single-ended converter, ti, = vat, = OV. ic = 0A, and there is only one transfer impedance, Zr=Zpy. For a single-ended current to differential voltage converter, ty. = OV, ic = 0A, and there are two transfer impedances Zp = Zpp and Zep. 3.2. PRACTICAL CURRENT-TO-VOLTAGE CONVERTERS 3.2.1 Figures of Merit of Fully Differential Current-to-Voltage Converters In a real 1/V converter, some input common-mode current yields a differential output voltage and some differential-mode input current yields a common- mode output voltage. That is, Zpc #0 and Zep £0. The common mode 32. PRACTICAL CURRENT-TO-VOLTAGE CONVERTERS 1 rejection ratio is defined as ee 66 is not an impedance itself. The exclusion rato is defined as Zan 220 a7 © 200 Cy) Ideally, C= 00 and E = 0. C is very important because the circuit must con- vert the information in the differential current into a differential output vol- tage. Any additional contribution to the output differential voltage is an error source. E is less important if the output voltage is processed by a differential amplifier which rejects common-mode voltages. For a practical 1/V converter therefore, Von = InZpp + IeZoe = Zo0(%0 + s) 8a) = InZen + IeZee = Zeclle + IpED) (3.8b) If jp and ic are independent, a limited C yields an additive error, which increases as C decreases. If ip and ic are not independent, a limited C can yield both a gain and a nonlinearity error. For a differential 1/¥ converter, (@.8a) describes the single-ended output voltage. Example 3.1 Calculate the figures of merit of a fully differential #/¥ conver- ter consisting of two parallel (noncoupled) single-ended stages (Figure E3.1) ia Dy, pom vo AB}. FIGURE E3.1_ Fully differential 1/V converter built from separate single-ended 1/¥ converters needs close matching to achieve # high CMRR.126 CURRENT-TO.VOLTAGE AND VOLTAGE-TO-CURRENT CONVERSION “The voltages at the output terminals are You = lid = ($+10)2n I Ya=hin=(%-b)2n ‘The corresponding differential and common-mode output voltages are Zn 2nt+Zn +1 ‘The four transfer impedances that describe the converter are the factors mult plying Jy and Jc in the former equations. That is, Zpp = Zri + Zr: Zoe = (Zr — Zn/2s Zep = (Zr — ZrV/2; and Zee = (Zr, + Zmd/4. Hence, the corresponding figures of merit are ZntZn C ‘The results from this example do not depend on the circuit implementing the 1)V conversion. As in differential amplifiers, an infinite C requires identical stages (Zr = Zra). Practical 1/V converters will have, in addition to finite C, frequency-depen- dent transfer impedances, and zero and gain errors. Also, their input and output impedances will not be zero, but they are very low and usually neglected. 3.2.2 Error Modeling for Current-to-Voltage Converters Figure 3.2 shows some error sources for a generic J/V converter. The signal of interest is the differential current ig. Current sources /p and J, describe the bias or leakage currents into of out of the converter input terminals. Their presence ‘means that even in the absence of iy and i the differential output voltage will not be zero. In addition, if we place an adjustable impedance across the input terminals of the converter, the output voltage changes accordingly; this is modeled by the input offset voltage Vig, Therefore, the output zero error 32 PRACTICAL CURRENT-TOVOLTAGE CONVERTERS 127 \ tf Zs» Ze l°™ 20 Foe bib. FIGURE 32 Some error sources for a generic 1/V converter which is von when iy = ic = 0A, will be OZzE = (% “ht Zein) 2000 +p + Iy)Zpc(0) 39a) where the impedances considered are those at de (“0 Hz"). If source impe- dances Z, and Za. are reactive, external paths for bias currents fy and Iy must be provided, for example by feedback networks used to implement the converter. “The input zero error is IZE OZE/Zp00). h)~-—* ik (3.20) AaB134 CURRENT-TO-VOLTAGE AND VOLTAGE-TO-CURRENT CONVERSION where 21 RaRD Figure 3.7a shows the frequency dependence of Zr. A large R reduces 6 and hence fiy. Any capacitance C in parallel with R will reduce Zr(f); at fo = W/QnRC), the gain loss would be 30% (—3 4B). If R is split into serial resistors, the equivalent parallel capacitance is smaller (see Problem 3.5). A broad signal bandwidth requires an op amp with large GBP. CFAs can be at JAI lanl. @ o FIGURE 3.7 (a) Frequency dependence of the transfer impedance of the basic tran- simpedance amplifier (b) Noise gain for the transimpedance amplifier. 7 34 CURRENT-TO-VOLTAGE CONVERTER CIRCUITS 138 used, but because the feedback resistor determines their bandwidth, itis not possible to separately set the gain and the bandwidth (sce Problem 3.6) Example 3.3 Determine the product Zo/, for a CFA in a I[V converter based on the circuit in Figure 3.4a yielding @ 1 V output when the input cur- rent is 100 1A at 100 kHz. The gain error accepted for the maximal cur- rent amplitude is 1/2 LSB for an 8 b ADC. First we need to determine R. Then, from the error accepted, we will determine the corner frequency fz, and from R and fo, Zof. ‘At the inverting terminal, Vo Pthth=0 and the output voltage is V,=I,Zy. Therefore, from these equations and (2.40), 4 ity Zah/R Hence, R= 1V/100 HA = 10k and fe; = Zofa/R. From (1.27), and by considering that | LSB for an 8 b ADC equals 1/2* of the full-scale input, the corner frequency of the transfer impedance must Fulfill the condition Therefore, we need Zpf,=foR= (1.6 x 10° Hz) (10° 2) = 1.6 x 10! He, which is at the limit of common CFAs. Stray capacitance at the source output (ie., inverting input), could easily lead to oscillation, If stray capacitance in the signal source and op amp input predominate over resistances, the assumptions leading from (3.17b) to (3.19) are no longer valid. For a capacitive source impedance, Z, = 1/QnC,), if Zp =1/QxCp) and Z = R/(+jwRC), by substituting into (3.176) the transfer impedance is found to be 2y=-R— an + Dean + 04(14 284 Aas) 4 ate 3.22)136 CURRENT-TO-VOLTAGE AND VOLTAGE-TO-CURRENT CONVERSION where oy =1/2eRC) and w=1/2xR(C+Cp+C)). The frequency- dependent Zy can be characterized by its natural frequency, which, assuming Aq > Vas usual, is Sn = VAaalhi = VI 8.23a) and its damping factor (4+) (8.2%) So Depending on the values for the different components, Z can be under- damped. The gain for any noise voltage at the op amp noninverting input in Figure 3.6 (noise gain) will be, at low frequencies, 1_LsRiC+ Co +O) JL ttse een B T+sRC @ 3F0y 8.24) which is represented in Figure 3.7. At high frequencies, the noise gain will decrease because of the op amp finite gain. Depending on fo, the noise gain can bbe underdamped, thus leading to oscillation. A design criterion is to select components s0 that fo falls at the crossover of the noise gain and op amp ‘open-loop gain curves [2]. That is, Ay(fo) = B'Ua). which, assuming fy > fi, leads to Aa fo C#O4G fe /(2xRC) 625) ‘The value for C can be calculated by solving the resulting quadratic equation to yield + YIP RRR TG 4a ic) (3.26a) Whenever 82 R/(Cp + C,) > I, we can approximate e 3.260 c (e out Example 34 A current signal from a photodiode with R, =20G9 and C, = 10 pF is converted into a voltage with a circuit ike that in Figure 3.6 using R= SOkS and an op amp with fr =20MHz (single-pole response) 34. CURRENT-TO-VOLTAGE CONVERTER CIRCUITS 137 and input capacitance 15 pF at the inverting terminal. Calculate the capaci- tance C required to prevent gain peaking and the resulting converter signal bandwidth, For the present circuit, parameters, 82 /,(Ciy + C,) = 81 x 5 x 10*x 20 x 10° x (15 +10) x 10°? = 628, which is much larger than 1. We can use 3.266), cw [ US+10) pF © V2a(50KQ)20 M2) pF ‘This implies that a small capacitor must be placed across R, otherwise only 0.2 PF to 0.5 pF stray capacitance would be present. From (3.23a), the natural frequency for the transfer impedance will be = Vii ie hon Vi = acme tie [—oMez = FSD + 15-4 TO)pA = 1SMHz From (3.21) and (3.23a), Z1's bandwidth can be widened by increasing fr. A composite amplifier like that in Figure 3.8 provides such a bandwidth exten- sion, and (or) higher output slew rate and current, depending on the added op amp. Equations (3.20) and (3.22) still hold, but now the VFA open-loop gain is multiplied by G= 1+ Ro/R; so that in (3.21) and (3.23a) we must use Gf instead of fr. Because of the higher fa, (3.23b) can be simplified to ¢ * fy/2fy. A Loy, 4 4 o FIGURE 39 (a) Transimpedance amplifier with second-order frequency response at low frequencies. (b) General circuit to analyze that in (a), ” low frequencies (44 very large), Ve =z ET ayn (3.28) (4 Z)A+% and forthe particular impedances in Figure 29a, Yo fo (3.29) ne which is a second-order response with natural frequency. I (3.30a)140 CURRENT-TO-VOLTAGE AND VOLTAGE-TO-CURRENT CONVERSION and damping factor : s[a(: ee 8.306) Therefore, whereas, because of C, the circuit in Figure 3.6 has a first-order response even for an ideal op amp, the circuit in Figure 3.9a is a transimpe- dance amplifier with second-order response whose bandwidth and damping factor can be determined by Ry and C2 without affecting the “gain” R. If the damping factor is 2/2, the response is maximally flat. 34.1.2 Transimpedance Amplifier for Differential and Floating Currents The mirroring method, introduced in Section 2.4.3 to design fully differential de am- plifiers from single-ended amplifiers, can also be applied to designing differential transimpedance amplifiers for floating current sources. Figure 3.10 shows the circuit resulting from duplicating that in Figure 3.4a to convert the difference between grounded current sources into voltage. To obtain a single-ended output voltage, a DA has been added. Because of the op amp’s high input impedance, fy flows though R and iy flows through R’, and the output voltages vt) = OR’ = ORI G31) where (1) = i2(0) — (0) is the signal of interest and k is the DA's gain. If R= R’, the transresistance, oF gain, is Ry = Rk. Note that a common-mode current would yield a common-mode voltage (vj + 12)/2 = i(R-+ R')/2, and a differential-mode voltage if R # R', However, for a differential and floating 0 and the common-mode rejection would be infinite. In current source Zpc es FIGURE 3.10 Differential transimpedance amplifier. A differential output voltage ean be obtained by omitting the difference amplifier. 7 34 CURRENT-TO-VOLTAGE CONVERTER CIRCUITS 14 any case, if Rand R’ are designed large to achieve a large Ry. current can easly saturate the op amp's output If the current sources have output resistances R,y and Ri, op amp input currents and offset voltages yield Rt Re o7ze [10+ ¥, 2) a (n+ hoi Jie) + 12 Je common-mode RR, RR, (3.328) where IZEpa is the DA input zero error. If R~ R’ and Ry ~ Ro. oz = [ener Via Ge + 2p 2326) and from IZE = OZE/(KR). 7 Vier = Viot n WZE = Iyy ~ fy + Pee Hit 4 IE 6.33) RAR, R Hence, to achieve a small zero error, op amps must be matched, but they do not need to have low input currents or offset voltages. Resistor tolerances result in a gain error. By differentiating Rr, assuming resistors with a small tolerance ¢g and a relative gain error ¢, = dk/k for the DA, dk k dy _ ak Ry R sate, 3.4) If we consider the nonzero common-mode gain for the DA, the common- ‘mode voltage from the first stage contributes to the output, AR/R, coterie) 9 ar +h Va = Go DGS 9 = GolVs Vy) Ge where R, and AR are the average and difference between Rand R’. The limited MRR for the DA thus produces a gain error. The common-mode gain of input op amps results na second-order error because their outputs are sub- racte Bandwidth is limited by input op amps and the DA. For the op amps, (3.21) gives the approximate ~3 4B frequency. For the DA. the corresponding corner frequency is specified by the manufacturer. If the DA is built from an op amp and matched resistors, then, from (2.34) and (2.44), the ~3 dB frequency is fo = Fr) +8) The mirroring technique applied to the transimpedance amplifier in Figure 355 yields a high-gain differential transimpedance amplifier which does not use142. CURRENT-TO-VOLTAGE AND VOLTAGE-TO-CURRENT CONVERSION, bulky. expensive, large-value resistors. However, the IZE will increase (see Problem 3.9) By realizing that a VFA is a differential voltage amplifier itself, the above technique can be applied to a single op amp, as shown in Figure 3.11. For an ideal op amp. and R= R’, Ry = 2R. For an op amp with limited open-loop in, the transimpedance decreases by 3 dB at fx given by (3.21) with R sub- Situted by 2R. Stray capacitances limit bandwidth too, and they are not sym- metrical. Stray capacitance across R will be smaller than that across R’ because R’ is shunted by the common-mode input impedance at the noninverting terminal. The limited op amp CMRR yields a gain error (see Problem 3.10). This cireuit ean be easily modified to obtain additional gain voltage, but at the cost of a reduced bandwidth and increased IZE (see Problem 3.11). 34.2 Charge Amplifiers A charge amplifier is a special 1/V converter whose transfer impedance is essentially a capacitance. It is intended for sensors yielding an electric charge proportional to a physical quantity and whose equivalent output impedance is predominantly capacitive, such as piezoelectric and pyroctectric sensors. Charge amplifiers can also process voltages from sources with capacitive out- put impedance. Figure 3.12a shows the basic charge amplifier, where R is a bias resistor. This circuit is similar to the transimpedance amplifier in Figure 3.6, but R and C have changed their functions: here provides the desired response and Ris an error source to deal with. Hence, (3.176) and (3.18) are valid here. FIGURE 3.11 Differential transimpedance based on a single op amp. 34 CURRENT-TO-VOLTAGE CONVERTER CIRCUITS 143 lof 4 fe w FIGURE 3.12 (a) Basic charge amplifier; (b) its frequency response. By substituting and rearranging, the response to the input charge is, 3.36) Bo (Clg + 1) + l4s + RER (Ag FD) where Ry = RiLRp and Cy = C, + Cp result from the parallel combination of the source impedance and the op amp input impedance (differential impedance in parallel with the common-mode impedance from the inverting terminal to ground),144 CURRENT-TO-VOLTAGE AND VOLTAGE-TO-CURRENT CONVERSION [At low frequencies, Aq is a very large real number and (3.36) simplifies to Ve_ 1 sRC 07 CissRC 8.37a) where R; = RilAgR, © R. The circuit yields a high-pass response with corer frequency f, © 1/(2nRC), Figure 3.12. The larger R, the lower fi. Hence, C ‘must be stable to prevent gain drift, and have very low leakage. Otherwise, if insulation resistance is too small, f_ would increase. Suitable dielectrics include: polypropylene, polystyrene, and Teflon for high temperature. For less ‘demanding applications, polyester and mylar capacitors are acceptable. ‘At high frequencies, capacitances in parallel with resistors will determine the equivalent impedance and for the op amp. Ay ~ fr/if. Then, (3.17) and (3.18) lead to (@.37) where 3.38) is the corner frequency of the low-pass response, Figure 3.12. A large sensitivity requires a small C, but this results in a high fi and a tow ‘ix (ie. a reduced bandwidth). Hence, a subsequent voltage amplifier may be required to obtain the desired overall sensitivity. Moreover, the noise gain at high frequencies is 1+ C,/C, and if C is very small to achieve a large sensitiv- ity, the noise gain can be very large and the circuit may oscillate. In order to ensure stability, a resistor R, is placed in series with the input. R, should have an impedance much lower than that of C, in the signal passband (see Example 36 and Problem 3.12). This resistor also offers input protection, for example ‘when the signal source is distant: the connecting cable may contact a relatively high voltage causing an overcurrent able to damage the op amp. R, would limit that current. Zero errors in charge amplifiers are less important because these are intended for ac signals. Nevertheless, the de output level, which is V(de) re( + » 4 1R 839) 34 CURRENT-TO-VOLTAGE CONVERTER CIRCUITS 148 should not significantly limit the dynamic range. Stray de currents because of poor insulation can increase the effective value of fy. A grounded guard around the inverting terminal on both sides of the printed circuit board will drain away those currents. If a resistor R is connected between the noninverting terminal and ground, fy replaces Jy, This added resistor can be shunted by a capacitor in order to reduce noise bandwidth. Ifa resistor T- network is used instead of R in the feedback network, the de output level increases (see Problem 3.13). Example 3.6 A given piezoelectric hydrophone has a sensitivity of 0.45 pC/ Pa and equivalent capacitance of 8 nF, Design a charge amplifier yielding 500 V/Pa, such that the amplitude response at $ Hz be within 5% of the passband response. Determine the -3dB bandwidth when connecting a 2KM series resistor to protect the op amp input. The Norton equivalent circuit for the signal source is a charge generator shunted by 8 nF. When connected to the charge amplifier in Figure 3.124, from (3.37a), in the passband we have _o/P Q/P __ 0.45pC/Pa u% B/P 500 4V/Pa 900 pF We can select C = 910 pF, polystyrene, with 5% tolerance, In addition, the frequency-dependent term in (3.378) must be larger than 0.95 at 5 Hz. That is, < 0.05 which implies RCw > 3 and 0sMa ‘Such a large resistance can be obtained by a single 100 M2 resistor (expensive), a T-network with carbon-film resistors (which increases noise) or by series- connecting one 5.1 Mand ten 10 MQ carbon-film resistors (noisy and with large temperature coefficient).146 CURRENT-TO-VOLTAGE AND VOLTAGE-TO-CURRENT CONVERSION A 2k@ resistor in series with the input would affect the response at those frequencies where its impedance is comparable or larger than that of the source capacitance. Hence, 1 — Ia TRAM OE ‘The high-pass response will be determined by R and C, SSCUSME Top = hon Bax 1O6ME x 910 pF 7 ‘The —3 dB bandwidth will be 1.6 Hz to 10 kHz, provided the op amp has, from (3.38), fr>fa(1+ 2) = 10K x (145 which is not very restrictive, Figure 3.13 shows an alternative charge amplifier, a counterpart of the transimpedance amplifier in Figure 3.9a. Ignoring R,, at low frequencies (3.28) holds, which for the particular impedances here leads to 1 7 3.40) Chri ON GURE 3.13 Charge amplifier whose sensitivity can be selected by Cand whose low- frequency response can be selected by Ry and Cy. 34 CURRENT-TO-VOLTAGE CONVERTER CIRCUITS 147 where fi=——a— Gan NCTE is high-pass and the sensitivity is 1/C again, but now itis possible to design C; for the desired f, without affecting the sensitivity. C, blocks any de input current from reaching the output through Ry. R, protects from tran- sient currents and must be small enough as compared to the impedance of C, in the signal passband. Example 3.7 Design a charge amplifier for a signal source with C, = 1 nF providing a 1 Hz to 10 kHz signal bandwidth. Use the circuit in Figure 3.13 with C= 100pF. The op amp has 1, = 100 pA but otherwise is ideal. The de output voltage must be less than I V. By applying KCL to the inverting input and to the nodes at each side of Ry, Yo = sc, Rea he Solving for V,, we obtain vet Rich a> CO Rela -),& 14s +4sa1c)+2 a+ Rca(14 Le RC +e Our aim is to have Vo/Q, = ~1/C in the signal passband. Hence, the rightmost factor in the above equation must be | in the 1 Hz to 10 kHz frequency band. This leads to the first condition for the higher frequency, ORC «1 and the second condition for the smaller frequency, a a aR\C, > 1424S ut cre18 CURRENT-TO-VOLTAGE AND VOLTAGE-TO-CURRENT CONVERSION Also, MaRS 1Y This last condition requires R, < 10 GQ. The first condition requires 1 Ry <= = 10k Ss 3c 10 He x Tk We can select R, from 100 8 to 200 & to be low enough and still offer some ‘overcurrent protection. The second condition requires ——— 3a x 10" QHiz — 10% /p a> 200 pF We can select C; = L00nF, ceramic. 38. IDEAL VOLTAGE-TO-CURRENT CONVERTERS In an ideal voltage-to-current (V/) converter, an input voltage modulates power from power supplies and yields an output current in the same mode (differential or common) as the input, without any distortion in amplitude oF phase, The current can be sourced or sinked but the circuit works only when connected to a load, No energy is transferred from the signal source to the converter, nor from the converter to the Following stage, thus implying infinite input and output impedances. Moreover, the performance is immune to envir- onmental factors, such as temperature, time, and power supply fluctuations. ‘A fully differential V}1 converter can be described by four transfer admit ‘ances, Figure 3.14a, Input voltages and output currents can be describe terms of differential and common-mode components. The differential-mode transfer admittance is the (transform of the) differential output current divided by the (Iransform of the) differential input voltage, G42) Vie. when fel ‘Analogously, the common-mode transfer admittance is Yee + tip = OV; the differential to common-mode transfer admittance is Yep 35 IDEAL VOLTAGE-TO-CURRENT CONVERTERS 149 i 4 -+ B+ Yo Yoo Ho 27” Yoo Yoo FL Sab o — &, Yo 0 }-02°® “OL Yee 2 0 FIGURE 3.14 (a) Transfer admittances for a fully differentia voltage-to-current con- verter. (4) For an ideal case these reduce to two, Vip when vc = OV; and the common-mode to differential transfer admittance is Yoo *Jp/Vie when vip = OV. By applying the superposition principle, the output currents for a linear V/7 converter will be Jo = Yop Vin + YorVic B.43a) Te = Yeo¥in + YecVic: G.43b) In.an ideal converter, all transfer admittances are independent of input voltage, amplitude, and frequency. In addition, there is no signal mode conversion: the differential output current depends only on the differential input voltage, and the common-mode output current depends only on the common-mode input voltage. That is, Yoc = Yep =0; there are only two transfer admittances, Figure 3.146, whose quotient is termed the discrimination ratio, Yoo p= to Voc (3.44) For a differential converter with single-ended output (grounded load), V, ic = 0A and there are only two transfer admittances: Yp C= Yc. For a single-ended converter (grounded load), y, = tm =OV, fe =0A, and there is only one transfer admittance, Y¥++ Ypp. For a single-150 CURRENT-T0-VOLTAGE AND VOLTAGE-TO-CURRENT CONVERSION ended voltage to differential current converter (floating load), 1, = OV, and there are two transfer admittances: ¥p = Ypp and Yep. 36 PRACTICAL VOLTAGE-TO-CURRENT CONVERTERS 3.6.1 Figures of Merit of Fully Differential Voltage-to-Current Converters In a real V/1 converter there is some mode conversion, ie., Ypc #0 and Yep #0. The common-mode rejection ratio is defined as G45) and the exclusion ratio is defined as 6.46) Neither C or £ are admittances themselves. Ideally, C = oo and E = 0. A finite C results in an error because the information is embedded in the output differ- ential current. A nonzero E results in a larger output common-mode current, ‘This current can result in a conducted interference and also in an inductive interference if this current return path through ground defines a large loop, (Section 10.1). In practical Vf converters, then, Vic 0 = YoYo + VeYoe = Yoo(Yo+ 2) Gan) Te = ViYeo + VicYeo = Yee(Vie + Viv ED) (3.476) If up and vp are independent, C yields an additive error. If they are not independent, a finite C can result in a gain and a nonlinearity error. Differential V/J converters built from noncoupled single-ended stages require perfectly matched stages to achieve a large C (see Problem 3.15). In addition to a finite C and nonzero E, transfer admittances will be fre- quency-dependent, there will be zero and gain errors, and input and output impedances will be finite 3.6.2 Error Modeling for Voltage-to-Current Converters Figure 3.15 depicts some error sources for a general V/I converter, Input errors are the same as for a voltage amplifier (Figure 2.5). The output zero error will be 7 16 PRACTICAL VOLTAGE-TO-CURRENT CONVERTERS 151 FIGURE 3.18 Some error sources for a general V/I converter. Vig + IpZo + InZe OZE = (Vio + IyZo ~ InZo) Yoo) + Ypc(0) (3.48a) ‘The input zero error is IZE=+OZE/Ypp(0) and, therefore, Vio + to + Za Voc) a ‘on Vig + 2Rog_ 2 CO Ize Vin + IyZu ~ InZa + .48b) © Vig + ligRea + 2IyARo + where Roy is the average and A Rg, is the difference value for the source output resistances. A small IZE demands a small input offset voltage and current, and a balanced source or very small bias currents, “The source common-mode voltage », yields two different errors. One results from the conversion of r, into a differential input voltage vip, because of the unbalanced voltage dividers formed by source output impedances and finite common-mode input impedances (Section 2.2.2). The other error results from the finite common-mode rejection of the converter. As for differential voltage amplifiers, both errors can be described by the effective common-mode rejection ratio, CMRRg. Therefore, b= val Yoo + ) +0ZE 3.49) Ye MRR, A Vil converter with finite input impedance draws some current i, from the voltage source. The amplitude of the current delivered to the load i,(= ip)152 CURRENT-TO.VOLTAGE AND VOLTAGE-TO.CURRENT CONVERSION divided by that of the current drawn from the source is termed current effi- ciency, n= lit|/ie. Wally n should be infinite. The output impedance of real V// converters is finite. If it is not high enough, compared to the load impedance, a current divider results and there is @ loss or current attenuation (Section 1.4.3). Then, a load change implies a current change. Finally, the drop in voltage across the load must be lower than the voltage range acceptable for circuit components. In particular, it must be lower than saturation voltages for integrated circuits. The voltage compliance for the VI converter is defined as the voltage range allowed across the load for which the current supplied is constant. 3.7 OPERATIONAL TRANSCONDUCTANCE AMPLIFIERS An operational transconductance amplifier (OTA) yields an output current proportional to the voltage difference at its high-impedance input terminals, The transconductance gain g,, for the classical IC OTAs (CA3080, CA3280, LM13600, LM13700, NESS17) is voltage-controlled, thus implementing an analog multiplier, Figure 3.16a, lo = Bly — Va) = Klanc(¥y ~ Va) (350) Typical values are gq, = 9600 and k = 19.2S/A. gy is linear only for small input voltages. It can be linearized by two input diodes, sometimes supplied on the IC, as shown in Figure 3.16a, The design equation to achieve a given Ianc from a control voltage Vand resistor Ry, depends on the model. VFAs can be considered as the series connection of an OTA and voltage buffer, which provides the rationale for the OTA symbol in Figure 3.16b. ‘The MAX435 is an IC OTA whose differential output current is propor- tional to the current across an external impedance Z,, determined by the differential input voltage, Figure 3.16c, G51) The current gain ratio is K = 4.0 A/A, typically. The MAX436 is similar but with single-ended output current, Integrated OTAs have a bandwidth ranging from 2 MHz for the older models to 275 MHz for the MAX435, and faster slew rate than op amps of similar cost. However, they are not intended for de precision applications. Maximal values for de error parameters for classical models are Vi, = 5 mV, Ty= SHA, Ig =0.6KA, and C(O)pin = 80 4B. Their peak output current is limited to 302A in the older models and to 300 mA in the CA309%4, The MAX435 has lower offset voltage and input currents and 10 mA. output ’ 7 OPERATIONAL TRANSCONDUCTANCE AMPLIFIERS 183, “ a S| 4 of de bias on > im yo—¥- ° R o bo ; 4 “ ze 2 4, ne a FIGURE 3.16 Integrated 0 (6) symbol; (¢) fully differen ational transconductance amplifiers: (a) multiplier-ype; operational transconductance amplifier. nee vis184° CURRENT-TO-VOLTAGE AND VOLTAGE-TO-CURRENT CONVERSION current, but its performance is still far from that required by (3.48b). OTAs can bbe used as open-loop devices, though with poor stability. They find their major application in voltage- or current-controlled circuits, such as gain-controlled amplifiers and active filters, particularly at audio and video frequencies, and also in modulators, multipliers, and other nonlinear applications (4). 38 VOLTAGE-TO-CURRENT CONVERTER CIRCUITS. A voltage yields a current when applied across a resistor R. The resulting ‘current will entirely flow through an external load if the voltage across. R remains constant when the load changes. There is a variety of circuits to implement this function depending on whether the voltage and load are grounded or floating. 38.1 de Current Sources and Sinks A constant de current can be obtained from a de voltage and a well-known resistor. Fairly constant de voltages are supplied by linear (or series) voltage regulators ({5}. Chapter 11), Switched voltage regulators are too noisy for current sources. IC voltage regulators are available with either fixed or adjus- table output voltages. Their current capability can be as high as 5A. More accurate applications require a precise de voltage, such as that provided by an IC voltage reference ({5], Section 11.2). Their current capability is limited to about 10 mA. The REF200 (Burr-Brown) is an accurate current source that includes two 100 2A sources in a package Figure 3.17a shows a de current source built from a voltage reference and a resistor. The IC keeps its output voltage V,, constant regardless of Ry. Vo yields a constant current through R so that the load current will be (3.52a) where Ig is the IC quiescent current. If the supply voltage accepted by the IC ranges from Vignin) (0 Vmax the Voltage compliance stems from the condition Vojmiay < Vor — Ve < Vogmany G.526) For example, a 10 V voltage regulator accepting from 12 V to 40 V and sup- plied at 15 V will yield a voltage compliance from 3 V to ~25 V. Rearranging connections as shown in Figure 3.17b yields a de current sink. The voltage compliance follows now from the condition Vegaiay < Vi = Vo— < Vojmany (3.520) 7 38 VOLTAGE-TO-CURRENT CONVERTER CIRCUITS 188 @ x FIGURE 3.17 (a) Simple current source and (6) sink based on an IC voltage reference. This same IC regulator supplied at —15 V in the circuit in Figure 3.176 would yield a current sink with a voltage compliance of ~3 V to 25 V. Both circuits in Figure 3.17 have a limited accuracy because of /g. This may not be a concern for current sources built around voltage regulators with high ‘current outputs, but itis a shortcoming for voltage references. The REF-O1A, for example, provides a 10.00 V typical output, which can be as low as 9.95 V of as high as 10.05 V. This means an uncertainty of 50 mV out of 10 V, or 0.5%, However, Io is typically I mA and 1.4 mA maximum. For a 10 mA.156 CURRENT-TO.VOLTAGE AND VOLTAGE-TO-CURRENT CONVERSION current source or sink, this adds an uncertainty of 0.4 mA out of 10 mA, oF 4%. Clearly, Zq should not flow through the load. A buffer placed between the load and the voltage reference's common terminal can divert Iq away from Ry, Figure 3.18a. For an ideal op amp, f, = Vo/R. For a real op amp, +IZB, 653 where IZEy is the buffer's input zero error. By taking derivatives, dh dv, dIZE, dR - (3.54a) TL” Vo ¥1ZEy” Vo+IZE, This allows us to determine f,'s accuracy and stability. If IZE, < V,, in a worst-case condition y's uncertainty will be G.54b) where ey, is the uncertainty in Vand fg isthe resistor tolerance. For the REF- OIA, for example, € 10.00 V — 9.95 V)/10 V = 0.5%, thus requiring a nar- row-tolerance resistor. Basic quality indexes for current sources are output current stability under power supply. load, and temperature variations and over time. For the voltage reference IC, output voltage stability power supply, load, and temperature variations, and over time are specified, respectively, as fine regulation, (AV o/Vo)/ AV eqs load regulation, (AV/V)/ Aly, and temperature coefficient, TCs) = (AVa/Va)/AT. Long-term stability, (AVq/Vq) is. specified for a 1000 hh period. Section 2.4.1.1 considers stability of factors determining input zer0 errors in op amp amplifiers. For the buffer in Figure 3.184, IZBy = Vig + Iy(RIRL) (3.54) Example 38 A given 10 mA de current source hased on the circuit in Fig- ture 3.184 uses an IC voltage reference whose output is 10,00 V, line regula- tion is 2x 10-SV-! and fg=SmA. The op amp has Vio =1mV at the working temperature, AVjo/AT=1yV/°C, Ip=1nA, PSRR=14V/V, I =3mA and comes in a plastic package with thermal resistance y= 150°°C/W. Calculate the change in load current when the supply vol- tage increases by 2 V. A 10 mA load current requires R= 10V/10mA = 1k. Hence, J, will not significantly contribute to IZEy, and from (3.54a) and (3.54c), 3 VOLTAGE-TO-CURRENT CONVERTER CIRCUITS 157 in V-REF Com bt @ dee (or v,.) o FIGURE 3.18 (a) Precision current source and (b) sink based on an IC voltage refer- fence and a buffer.158 CURRENT-TO.VOLTAGE AND VOLTAGE-TO.CURRENT CONVERSION dh Vo tio Wa , tL Vo+Vin TetVn Vo” Ve For small changes, we can substitute differentials by incrementals, and from the specifications, AV, _2x 10 AV, =4 x 105 AV AV = (vod PRR + (SE) x a Op amp heating results from the increased power dissipation because of the larger Voq and /,. fq does not contribute any additional heating because it is drained to the V,_ supply. Therefore, AV ig = VMI AV/V) HRV / °CXO9°C) =29nV AT = APo x Oy = AV ag X fy X Gp = (2VI3MAYISO°C/W) = 0.9°C and the relative change in load current will be Ale gg 8 29KY - TEMAS ATE = 40.3 x 10 For f, = 10 mA, Al, = (40.3 x 10-\10mA) = 0.4 4A which is a very small change. In the above example, the voltage reference IC would suffer an increase in temperature because of the larger power supply voltage. Output voltage, line regulation, and load regulation, are temperature dependent. To make the vol- tage reference IC work at a constant temperature, it can be supplied by another voltage reference IC which will attenuate external voltage supply fluctuations (6). Rearranging connections as shown in Figure 3.186 yields a precision current sink. The RC; network improves stability. For the REF102 voltage reference and the OPAIIL op amp, Ri = 10k and C; = I nF [7]. By connecting the grounded load terminal to a de voltage instead, the voltage compliance given AR VOLTAGE-TO-CURRENT CONVERTER CIRCUITS 159 by (3.526) is shifted accordingly. The same applies to the current source in igure 3.184. 3 ¥/F converters have a transfer characteristic whose slope unit is siemens (sym- bol S). Hence, V/I converters for ac signals are also termed transconductance amplifiers. 2 Transconductance Amplifiers 4382.1 Single-Ended Transconductance Amplifiers for Floating Loads Us- ing the load impedance itself as the feedback element for an op amp yields a simple transconductance amplifier, as shown in Figure 3.19a, The inverting terminal is at 0 V, so that ig = 14/R and this current can only flow through the load, which must be floating. The load voltage, v,, can be monitored by sensing the op amp output voltage. If v; is bipolar, i, will be bipolar too. The equivalent output impedance is R(+4a) ((8], Section 8.2.2), hence very ” FIGURE 3.19 Single-ended transimpedance amplifiers for bipolar, floating loads.160 CURRENT-TO-VOLTAGE AND VOLTAGE-TO-CURRENT CONVERSION large. However, the input impedance is R, so that the signal source must supply all the load current and the current efficiency will be 1. Voltage com- pliance is determined by op amp saturation levels (Vayty, Vasusy) and is Feat < Vi < Feu (3.55a) Input impedance is enhanced in the noninverting configuration in Figure 3.195. The equivalent output impedance is the same, but the voltage compli- ance has reduced because now |v + oy] must be within op amp saturation levels. Hence, Voauty < OL +4 < Voauty (3.556) As for inverting and noninverting voltage amplifiers, bandwidth is limited to So =fuI V+ IZ VR). In both circuits, inductive loads (such as deflection coils) can lead to oscilla tion. An RC network in parallel with the load improves stability. Furthermore, if the load is distant from the op amp, interference can couple into the circuit. If grounded shield wires are used, stray capacitance to ground will reduce output impedance and can cause oscillation. Using common op amps limits load currents to about 20 mA. Larger currents can be obtained with power op amps, or by adding an IC (EL2002, LH0002, LH0033, LT1010, OPA633) (9] or transistor-based current booster at the op amp output, inside the feedback loop {10}, 3.8.2.2 Differential Transconductance Amplifiers A differential voltage can be converted in a current driving a grounded load by means of an 1A, a scal- ing resistor R and a buffer, Figure 3.20. Considering real components with gain and zero errors, but neglecting noise, from (2.24) we have oy ne von tic y Alen y AM, Wy. 60 60)(ho tae BERS aR +ize,) (560) where IZE;, is given by (2.21) for an unbalanced voltage source of (2.22) for a balanced one. For the buffer, assuming its voltage gain is exactly 1, we have V, = Vy +IZBy (3.566) Because no current enters the op amp, A (3.56¢) AR VOLTAGE-TO.CURRENT CONVERTER CIRCUITS 161 FIGURE 320 Differential transconductance amplifier for a grounded load based on an instrumentation amplifier and external buffer Solving for /, and assuming ¢g < 1, we obtain which shows that the converter’s CMRR equals the effective common-mode rejection ratio for the 1A. Equation (3.57) permits us to evaluate the output current accuracy and stability by applying the method described in Section 3.8.1. Bandwidth will be limited by the frequency dependence of G. Voltage compliance depends on both the TA and the buffer, but the TA sets the lower limits because its output, voltage isu, =u, + Grip, whereas the buffer output is w, (Which allows us to monitor load voltage). Hence, ut) < Ke + Gun < Maury (3.58) Example 3.9 Determine the requirements for the 1A in the V/I converter in Figure 3.20, which supplies I mA £0.01 mA to a 1k load from a 100 mV, 1 KHz voltage, superimposed on a 10 V common-mode voltage of the same frequency. A maximum 10°C change in temperature is expected. From (3.57), if we consider stable power supplies and work at 1 kHz, with a constant gain G,162, CURRENT-TO-VOLTAGE AND VOLTAGE-TO-CURRENT CONVERSION Therefore, = 1002 00 Tm: ‘The gain is limited by (3.58). For a common IA supplied at +15 V, the output does not saturate until it becomes more than 10 V. Hence, IOV > 11 +p x G= 1mA x 1k2 + 100mV x G and G<90. By taking G=10 and R imposed on the IA gain at 1 kHz. ‘The accuracy on the load current can be estimated by taking derivatives, 1k, no strong requirement is di, _dG_ AR i GR In a worst-case situation, uncertainties in G and R add, so that 0.01 mA dG dR Ima = GR Resistors with a tolerance narrower than 1% are quite expensive compared to ‘metal-film resistors with 1% tolerance. In LAs, gain tolerance less than 0.1% is, available even in low-cost models. Theoretically, we could have a maximal 0.011 uncertainty, but this should be considered acceptable because it could occur only in a worst-case situation. By dividing the derivative of (3.57) by dT, dif, _AG/G _AR/R “ar "dr ar wwe have the temperature coefficient for the load current, TCli,) = TCG) + TCR) 0.01 may mA) T° 107°C = TC(G) + TCR) Metalslm resistors with TC(R) <10°/°C are easily available. Hence, TCG) < 107/°C, which is not very restrictive. “The input common-mode voltage has the same frequency as the differential voltage, and it is constant. Hence, it yields a constant error, which must be less 38 VOLTAGE-TO-CURRENT CONVERTER CIRCUITS 163 than 0.01 mA. Therefore, g < 001mA 10x 10V A CMRRe > Dot mA x 1k ‘We need an IA with 80 dB CMRR at | kHz, which is feasible for a source unbalance smaller than 1 k8. ‘We have considered all error sources separately, so that the 0.01 mA error can be contributed by any source. Chapter 9 describes alternatives to combine different error sources. ‘The output current in Figure 3.20 can be increased by adding a current booster in series with the IA output. The “sense” terminal should then be connected to the booster output in order to include it inside the feedback loop of the IA output stage. The voltage gain can be increased by placing a fully differential amplifier before the 1A. The converter output impedance can be calculated by substituting a test voltage v, for the load and grounding the input terminals. If the current flow- ing into the circuit isi, then Z, = V;/T.. In Figure 3.20, grounded inputs give Vq—V; =0. The buffer forces V, = V.. Hence, V, = V_ and I, =0. No cur- rent will flow across R because its terminals are atthe same voltage. The output impedance is thus infinite, In practice, Z, will decrease with frequency because of the IA and buffer gain roll-off, and because of the buffer input capacitance. Simple differential amplifiers also permit implementation of V/I converters, bbut with reduced input impedance. For the circuit in Figure 3.21, @.59a) R The input impedance is R, and can be enhanced by adding an input fully differential amplifier. The matched resistors and input op amp can be replaced by an integrated DA. The circuit can be further simplified by omitting the buffer (Figure 3.22). Then, in order for i, to be independent of the load voltage, resistors must be matched, RyRy = Ri(Ras + Rep) (We assume a low-output- impedance voltage source) and (oa — get f= (on WR RE 3.596) Using a small Ray increases the transconductance. This circuit is termed a modified Howland current generator (see Problems 3.16 and 3.17). It can also be implemented by an integrated DA and two external resistors R, one168 CURRENT-TO-VOLTAGE AND VOLTAGE-TO-CURRENT CONVERSION 4 FIGURE 3.2 Differential transconductance amplifier for a grounded load based on a differential amplifier and external buffer. of them in series with the internal negative feedback resistor in order to fulfil the matching condition, as shown in Figure 3.24. 38.23 Single-Ended Transconductance Amplifiers Grounding anit terminal of a differential transconductance amplifier yields a single-ended amplifier, which can be inverting or noninverting depending on the terminal grounded, The circuits in Figures 3.20, 3.21, and 3.22 can be modified in this way. However, grounding an input terminal in transconductance amplifiers with a low input impedance will unbalance resistors unless the voltage source has a very low output impedance. 4a FIGURE 3.22 Differential transconductance amplifier for a grounded load based on a differential amplifier. 3B VOLTAGE-TO-CURRENT CONVERTER CIRCUITS 168 38.24 Differential Transconductance Amplifiers for Floating Loads dif- erential transconductance amplifier for a floating load can be built by mirroring a differential transconductance amplifier for grounded loads. However, this requires the current setting resistor R for each amplifier to be identical ‘A simpler design method is to start with the single-ended 1/1 converter in Figure 3.195. The current through R depends on the voltage drop across it. Hence, we just need to apply the input differential voltage across R, for exam- ple as shown in Figure 3.23. The load current is ig = (ayn ~ m.)/R, the output impedance is again R(1 + 4g), the current efficiency is very high because of the high input impedance, and the voltage compliance follows from (3.55b) with 1 = ty. Now, however, 1, does not monitor the load voltage 38.3. Voltage-to-(4 mA to 20 mA) Converters Information from sensors must be often sent over a distance to the receiver. In process control and other applications, voltages are usually converted into currents before transmission because current signals are sensed by low-impe- dance receivers, hence establishing low-impedance signal loops. which are more immune to capacitive interference than high-impedance circuits (Section 10.1) ‘A common standard for current transmission uses a 4 mA loop current for no signal and 20 mA for a full-scale signal. The system can use from two to four wires depending on how the transmitter and receiver are supplied ({11}, Section 10.3.2). When only two wires are used, circuits take their power supply from signal lines. Hence, they should not need more than 4 mA to work, Voltage-to(4 mA to 20 mA) converters are available in IC form (AD694, Analog Devices and XTR series, Burr-Brown). They can also be implemented by a handful of resistors and active components. This function requires two ‘operations: scaled V/1 conversion and offsetting (0 V to 4 mA), which can be performed in any order. In Figure 3.24, first a constant voltage is added and then the resulting voltage is converted to a current using a single-ended ¥/7 5 R x VFA 6 6 > lov, FIGURE 3.23 Differential transconductance amplifier for a floating load. ;166 CURRENT-TO-VOLTAGE AND VOLTAGE-TO-CURRENT CONVERSION FIGUR} 324 Voltage-to-(4 mA to 20 mA) converter: converter. The op amp output voltage is au Rey Re neon Ne Ga) From (3.59b), her RR (3.606) Hence, _ Rahs +R) o= (+9) 3 (3.606) ‘The output current capability of the op amp in the DA must exceed 20 mA, otherwise a current booster must be included. Reference (12] describes several circuits to convert from 4 mA to 20 mA to different current scales. Example 3.10 Convert @ 0 V to 10 V signal to a 4 mA to 20 mA current loop using the circuit in Figure 3.24, implemented with the INA10S (Ry = 25k) DA, ¥ 39. OTHER COMPONENTS AND CIRCUITS FOR PROCESSING CURRENTS 167 In order to keep resistor balance in the VJ section, we must design R < Ry. By selecting R = 49.92 (0.1% tolerance), from (3.60b) the transconductance will be —20mS. From (3.60c), when = OV, _ Ve ReQS x 10° + 49.9) 0.08 R35 x 107 499 and when vy = 10V, 0.07 (2+) R&(25 x 10° 449.9) RR) 25x10 499 A reasonable choice for Vis 10 V (equals full-scale v). Then, Ry = 50R, and R, = 12.5Re. If Re = 1k, then Ry = 50K and Ry = 12.5kS2. All resistors should be metal-film because of their lower temperature coefficient. 3.9 OTHER COMPONENTS AND CIRCUITS FOR PROCESSING CURRENTS 3.9.1 Current Mirrors A current mirror is a circuit whose output current is a copy of the current imposed on its input terminal. Current mirrors are common cells inside analog integrated circuits ({13}, Chapter 6) and are also available as uncommitted integrated circuits (REF 200), Figure 3.2Sa shows an improved Wilson-type current mirror. Transistors QL and Q2 are matched and form the basic mirror. They have the same base emitter voltage, hence the same collector currents. Q3 and Q4 are matched too and their base is at 2Vpp above ground, so that they will have the same collector current. Ifthe transistors work in their active region and base currents, are negligible, /, ~ jj. Q3 buffers Q2 to prevent any variation in the external oad (hence Q2 collector voltage) from modifying Q2's base-emitter voltage (Early effect). Q¢ keeps QI and Q2 working under similar conditions, lowering static errors because of any mismatch in tcp between QI and Q2. Equal-value emitter resistors can be included to stabilize the current transfer ratio for changes in the base-emitter voltages of QI and Q2. By integrating multi-emit- ter transistors, it is possible to design different current ratios. Figure 3.256 shows a symbol for a generic men current mirror and Figure 3.25¢ another symbol for a 1:1 current mirror. Current mirrors can be used for designing floating current sources and to implement different operations with current signals without converting them to voltages. Their bandwidth is higher than that of voltage-based circuits of simi- lar cost, but their accuracy is lower. Figure 3.26a shows a current buffer. Input168 CURRENT-TO-VOLTAGE AND VOLTAGE-TO-CURRENT CONVERSION ar a2 c FIGURE 3.25 (a) Improved Wilson current mirror. (b) Generic symbol for an min ratio current mirror. (c) Symbol for a 1:1 current mirror current jj comes from a circuit not necessarily supplied at V,,. Figures 3.26b ‘and 3.26c show how to sum current signals and multiply by 2. In the first circuit i, = 2iy + hy im the second cireuit, i, = 2h + i). 39.2 Current Amplifiers A current amplifier or current pump yields an output current that isa sealed version of an input current. Ideally, a current amplifier should have zero input impedance and infinite output impedance, Figure 3.27a shows a current 39. OTHER COMPONENTS AND CIRCUITS FOR PROCESSING CURRENTS 169, v, o o re) FIGURE 3.26 Some operations with current signals using current mirrors. (a) Current buffering. (6) Current addition. (c) Current doubling. amplifier fora floating load. Assuming an ideal op amp, i flows through Rs and (3.61a) ‘The inverting terminal will be at 0 V and §Ry Rt 3.616)170 CURRENT-TO-VOLTAGE AND VOLTAGE-TO-CURRENT CONVERSION @ FIGURE 3.27 (a) Current amplifier for a floating load and (6) for a grounded load. Hence, (3.62) ‘The current gain is G= 1+ R;/Rj. The op amp current output capability could be enhanced by a current booster. The gain accuracy because of the tolerance of the resistors can be obtained by taking derivatives, OG _ dR +R) dR, _ Rr (AR #) GO RFR Ry -aR( Ry og Resistors having the same temperature coefficient will not contribute to gain thermal drift 19 OTHER COMPONENTS AND CIRCUITS FOR PROCESSING CURRENTS 171 By applying an input test voltage v, and calculating the resulting input ‘current i, the input impedance Z, is V, Tq Ry + Zl + RoR) 4 THZR, + Ay (G.64a) Z; will be small at low frequencies (Ay large), provided the current gain is not very large. The same method can be applied to calculate the output Zo Which i Za = Rl + Ay) (3.646) hence very large when Ay is very large. The input zero error can be calculated by noting that bias current [yi parallel with i, and dividing the output current resulting from V, by G. We obtain IZE=1,+ 8.65) (y+ RVR, where R, is the signal source resistance. If the noninverting terminal is con- nected to ground through Ry = Ry + Ry, then fg replaces fy in (3.68). Figure 3.27h shows a current pump for a grounded foad. If the op amp is ideal, j flows through Ro, (3.64a) and (3.646) hold and the output curren given by (3.65). fan input test voltage v, is applied, KCL at the load node yields Vea & = xz (3.66) The input impedance is (3.66b) Solving for V/V, in (3.66a) and substituting yields Ry 2a R42 ee) G6172 CURRENT-TO.VOLTAGE AND VOLTAGE-TO-CURRENT CONVERSION ‘Therefore, the current source must have a very high output impedance or loading errors will result, These errors will increase for large cutrent gains. ‘The output impedance can be calculated by applying the same method to the output. Now, KCL at the load node yields .68a) G.68b) (Rul (14+ 2) 6.69) which shows that the circuit behaves as a current generator only if the input current comes from a high-impedance source. ‘A differential current amplifier for floating loads can be built by mirroring the current amplifier in Figure 3.276. However, it requires matched compo- nents (see Problem 3.20), 3.9.3 Current Conveyors A second-generation current conveyor (CCI) (“II" stands for second genera- tion) has an input ¥ with very high input impedance, an input X with very low input impedance, a high-impedance output and one common terminal, Figure 3.28a, and also supply terminals. Voltage at input X equals that applied to terminal ¥ regardless of input current ig. The output-current amplitude at terminal Z equals that in terminal ¥, with the same (CCH+) or different (CCH) polatity, i, = +i,, regardless of the voltage at terminals Y and Z, Input characteristics are the same as those of a current-feedback operational amplifier (Section 2.3.2). Indeed, the input stage of CFAs is a current conveyor. Moreover, in some CFAs (AD644, AD646) the output node of the internal current conveyor is uncommitted and accessible for external connections. Unlike OTAs, current conveyors do not have a symmetrical differential input. Current conveyors were first proposed in 1968. Advances in integrated cir- cuit technologies made them available during the 1980s and they have become valuable in the development of fast op amps and other analog circuits (13) ‘They can be used to implement most of the linear and nonlinear analog signal processing functions. Figure 3.28, for example, shows an inverting voltage amplifier implemented with a CCIL+. The inverting input will be at 0 V, hence 7 19. OTHER COMPONENTS AND CIRCUITS FOR PROCESSING CURRENTS 173 come Z}—0 y, @ Fe x come Zz ¥, y ol o FIGURE 3.28 (a) Symbol for a second-generation noninverting current conveyor (CCH), (6) Inverting amplifier implemented with a CCI (3.70a) (3.70b) Nevertheless, op amps are still the best design option in most instrumentation applications. As part of CFAs, however, current conveyors will be the best choice in many ac applications. 3.9.4 Bidirectional Current Sources A bidirectional current source is a floating current source that yields a constant ‘current independent of the applied bias voltage polarity [7]. A bidirectional current source can be built from a unipolar current source by adding conve- nient steering devices, such as diodes or switches. In Figure 3.29, when vq > vp diodes D; and Ds will be reverse biased and current will flow from let to right, through Dj and Dj, When vu < vp, the situation reverses and the same current will flow from right to left through D2 and Ds. In both cases, the current source will have two diode drop voltages added, thus limiting voltage compliance. | ' : ' |174 340 34 32 » 34 36 (CURRENT-TO-VOLTAGE AND VOLTAGE-TO-CURRENT CONVERSION D, » FIGURE 329. Bidirectional current source and its symbol, PROBLEMS Calculate the maximal integration time for an inverting current integra- tor using C = 100 pF if the input current is 104A and the op amp saturates at ~10V. Calculate the integration time for an integrating current-to-voltage con- verter, able to cancel interference from both 60 Hz and 50 Hz power lines. Compare the speed of response ofa 1/¥ converter based on an amplifier with transimpedance gain R, shunted by C, and that of a system based (on a voltage amplifier that measures the drop in voltage across a resistor R shunted by C Calculate the input impedance for the transimpedance amplifier in Figure 3.6. (Hint: consider f, = Vy(1/Z, + 1/Z,), analyze the circuit, and solve for Zi.) ‘A method to decrease the effect of stray capacitance on the bandwidth of ‘a transimpedance amplifier is by splitting the gain resistor as shown in Figure P3.5, Demonstrate that the transimpedance bandwidth of this amplifier is better than that for an amplifier implemented using a single resistor R with stray capacitance C. Assume an ideal op amp. Calculate the -3.4B bandwidth for a transimpedance amplifier like that in Figure 3.4a implemented with KO and a CFA having f, 350kHz and a de internal transimpedance Zy = 710k®. 340 PROBLEMS 175, FIGURE P35 Splitting the gain resistor in a transimpedance amplifier minimizes the bandwidth reduction because of stray capacitance, 37 38 39 Derive the value for the damping coefficient of a low-pass second-order system with maximally flat frequency response. The composite transimpedance amplifier in Figure 3.8 uses an input VFA for de precision and an output CFA for speed. Assume the current source has output impedance 20 G2 shunted by 5 pF: the VFA has, fr = 200 MHz and its capacitance from the inverting terminal to ground is 10 pF: and the gain resistor is R = 10kS2 shunted by 0.5 pF. Calculate the value for the gain G of the CFA-based amplifier in order to have a maximally flat transimpedance, and the resulting natural Frequency fy, ‘The fully differential transimpedance amplifier in Figure P3.9 includes a T-network to achieve a large transimpedance without using high-value resistors, Calculate its input zero error (IZE) and compare it with that of an amplifier having the same gain but implemented with large-value resistors. FIGURE P3.9 A fully differential ransimpedance amplifier using T-network feedback achieves high gain without requiring high-value resistors,16 x0 CURRENT-TO-VOLTAGE AND VOLTAGE-TO-CURRENT CONVERSION ‘The differential transimpedance amplifier in Figure 3.11 relies on the differential properties of the VEA. Analyze the errors arising from its limited CMRR. Figure P3.11 shows a differential transimpedance amplifier with subse- quent voltage gain, based on a single op amp whose GBP is assumed finite, Calculate its voltage gain, ~34B bandwidth, and IZE. FIGURE P3.11 A single op amp provides 1/V conversion and voltage gsin, though with reduced bandwidth Buz 313 34 3.18 In order to protect a charge amplifier like that in Figure 3.12a imple- mented with C= 10pF and R= 10MQ, a 1k@ resistor is added in series with the input. Calculate the effect of this resistor on the frequency response, Calculate the OZE for the charge amplifier in Figure 3.12a when instead of a single resistor R a resistor T-network is used that yields the same high-pass frequency fi, Derive the equation for the gain of the composite charge amplifier in Figure P3.14 Calculate the figure of merit for the fully differential V/J converter based on parallel single-ended converters shown in Figure P3.15. The circuit in Figure P3.16 is termed a Howland current generator. Determine the matching condition for resistors in order for the circuit to behave as a current source, and calculate the effect of the tolerance of resistors on the output impedance and the voltage compliance. (Hints: use superposition for vj and vy) and find the condition that makes the load current independent of the load voltage.) 30 PROBLEMS A C A, R, RR FIGURE P3.14 The gain ofthis composite charge amplifier can be modified by adjust- ing a single resistor value wot D> FIGURE P3.15 A fully differential ¥/1 converter o bk e lt from separate single-ended 7 / converters needs close matching to achieve a high CMRR. FIGURE P36 Howland current generator,178 3.17 FIGURE P3.17 Modified Howland currer (CURRENT-TO-VOLTAGE AND VOLTAGE-TO.CURRENT CONVERSION Determine the matching conditions required for the improved Howland current generator shown in Figure P3.17 to actually work as a current source. Calculate its transimpedance and voltage compliance. (Consider hints given in Problem 3.16.) A, R, z z generator with improved trans: conductance. 3.18 349 3.20 Determine the matching condition required in order for the circuit in Figure P3.18 to work as a differential transconductance amplifier for a grounded load and its voltage compli ‘The circuit in Figure P3.19 is a voltage-to-(4 mA to 20 mA) converter based on a single op amp able to supply 20 mA. Design the values for the resistors in order to convert an input signal » whose range is 0 V wo SV, Analyze the matching condition required for resistors in Figure P3.20 in order for the circuit to work as a fully differential current amplifier. Assume ideal op amps. REFERENCES 179 ¥ oH fan 4 iG yom FIGURE P3.19 A single op amp and a resistor network implement the conversion and ‘scaling functions required to convert a OV to SV input into a 4mA to 20mA output FIGURE P3.20 Fully differential current amplifier built by mirroring two single-ended ccurtent amplifiers REFERENCES [1] J. Graeme. Photodiode Amplifiers. New York: McGraw-Hill, 196 2] T. Wang and B. Ehrman. Compensate transimpedance amplifiers intuitively. Application Bulletin AB0S0, 1C Applications Handéook. Tucson, AZ: Burr- Brown, 1994 (3) M. Steffes, Embedded gain supercharges FET-transimpedance amplifier. EDN, 42, 11, May 22, 1997, 129-143 (4). HA, Witinger. Applications of the CA3080 and CA3O80A high-performance operational transconductance amplifiers. Application Note AN6668.1 Melbourne, FL: Harris Semiconductor, 199, {51 S. Franco. Design with Operational Amplifiers and Analog Integrated Circuits, 2nd fed. New York: McGraw-Hill, 1998,180 6) m 1 9 (0) om 02) 3) CURRENT-TO.VOLTAGE AND VOLTAGE-TO-CURRENT CONVERSION REFOI + 10V precision voltage reference data sheet and applications. Norwood, MA: Analog Devices, 1997. R. M. Stitt, Implementation and applications of current sources and current receivers. Application Bulletin AB-165, IC Applications Handbook. Tucson, AZ: Burt-Brown, 1994. J. Dosti. Operational Amplifiers, 2nd ed. Boston: Butterworth-Heinemann, 1993, ‘Anonymous, The care, feeding and application of unity gain buffers. Application, Note 19. Blantec Semiconductor Data Book, Milpitas, CA: Flantec Semiconductor, 1997, J. Williams. Power gain stages for monolithie amplifiers. Application Note 18, Milpitas, CA: Linear Technology, 1986. R, Pallis-Areny and J. G, Webster. Sensors and Signal Conditioning. New York: John Wiley & Sons, 1991 J. Graeme. Four standard circuits convert current-loop scales. Electronic Design, 36, 23, November 23, 1988, 107-112. . Toumazou, F. J. Lidgey, and D. G, Haigh (eds.). Analogue IC Design: the Current Mode Approach. London: Peter Peregrinus, 1990, 4 LINEAR ANALOG FUNCTIONS ‘An electronic function is said to be linear in a broad sense when its transfer characteristic isa straight line. In a more restrictive sense, linear functions are those described by linear transfer functions (Section 1.4.1). Linear functions are implemented by domain transformations enabling us to apply the basic building blocks and circuits described in Chapters 2 and 3. Cost-effective implementations seck to use a minimum of components and avoid the need for matching passive components 41 ADDITION ‘The easiest method to add voltage signals is to apply KCL: convert voltages to currents, apply them to a common node and sense the current leaving that node. fan output voltage is needed, then use an 1/V converter, To add current signals, connect them directly to an 1/V converter, either single-ended (Figure 3.4) or differential (Figure 3.10). 4.1.1 Single-Ended Voltage Addition A single-ended voltage can be converted into a current by applying it to a resistor whose other end is at 0 V. The circuit in Figure 4.1a performs this function and the subsequent //V conversion. The output voltage will be 4.1)182 LINEAR ANALOG PUNCTIONS % FIGURE 4.1 Inverting adder using (a) single resistors and (6) resistor networks, and there is a sign inversion, The number of input signals can be extended, but in any case their output impedance must be very low or else added to the respective R. High-impedance signals can be buflered before adding them. If the R, are designed equal and R= Ri RyI/Ry then the circuit is an inverting averager. From (2.50), the output zero error is Oz = Vo 14% 42) 41 ADDITION 183 Ifa balancing resistor Ry = RUR\[IRoIRs connects the noninverting terminal to ground, fy replaces fy There are two different gain errors. Those resulting from resistor tolerance are static errors, The gain for each signal will be G= R/R;, hence tet, 43) If the quantity considered is the gain ratio for different signals, Wye =G,/Gs = Re/Rj, then Wy _ aR Wy Re R = tnt, 4) Equation (4.3) also estimates the thermal and time gain drift if the resistor's temperature coefficient or time drift replaces the resistor tolerance. Resistors with extremely different values, for example a very large R in order to have a large G;, display different temperature coefficients leading to large gain drift Resistors in integrated networks track each other better in temperature. Figure 4.10 shows how to apply them. Now, G = (Ri |RoRyl)/Ry and FG, = 1. The balancing resistor must be Ry = (Ry RoIlRs)/2. The dynamic gain error results from limited op amp bandwidth. From (2.55), the corner frequency of the low-pass response when using a VFA and the same signal is applied to all inputs will be Anh oa aoe (45a) MRR: Ses * RAR: If CFA is used instead, the corner frequency will be fy, = 2 (4.56) R which is independent of individual signal gains Example 4.1 Two 60 Hz, 100 mV (peak) single-ended voltages with 1002 (maximum) source resistance must be added, and then the peak value de- tected and converted to digital using a 10 6 ADC with 0 V to | V input range. Determine the performance requirements for the op amp and resistors if no single error source should yield an error larger than 1/8 LSB. We can detect positive or negative peak values, so that an inverting adder is acceptable, The maximal peak value will be 200 mV (in-phase signals) so that we need G = 1V/200mV = 5. That is, Ry = R= R/S.184 LINEAR ANALOG FUNCTIONS Each source resistance R,(< 10052) will be in series with the corresponding input resistance R,. These must be large enough to fulfill x(loomv) 4096R,, We can select Ry = Ry = 41.22, which is standard, ‘Then, R = 2.06 MQ: the closest standard valve is 2.05 M2, which gives a gain of 4.976. A series standard resistor can be added to achieve 2.06 MO. From (43), in a worst-case condition, AG/G = th + ta, so that (.yy/2" 100m) 3 Ig + tp, = 0.00024 Hence, we need 0.01% tolerance resistors, These are wirewound resistors, quite expensive and with 1 MS? maximal values. To achieve 2.06 M& we will need three series-connected resistors. When considering op amp input zero errors, the cost of adding a balancing (wirewound) resistor may not be worth the benefit, Ifa cheaper resistor were used, it would not track the other adder resistors in temperature. Therefore, from (4.2), oze= Y(t zueMe ) + x (.06M2) < 2K This requires V4, < 11 pV and fy < 6OpA. According to Table 2.2, we need a chopper op amp with input bias current J, < 60 pA. ‘The dynamic gain error for low gain and 60 Hz signals should not impose a severe limit. The gain error accepted is AG/G = 0.00024 and from Table 1.2, the corner frequency must be 45.5 x 60 Hz. From (4.5a). fr = Ifq, so that we need fy > 11 x 45.5 x 60 Hz = 30kHz, which is easy to achieve. ‘A noninverting adder is better envisaged by working with voltages. In Figure 4.2a, each input branch can be replaced by its Norton equivalent. Then, parallel current sources add and parallel impedances are combined, jure 4.2b. The output will be au (148) a (% 4242 wo(ten)= (Rte tE)e(! (46) 41 ADDITION 185 als ASS wks Phx ow FIGURE 42 (a) Noninverting adder; (6) equivalent circuit to analyze it where Ry = RrIRaIRs, Ra Ry > RR E RR ERR, «ay Signal source output resistances must be very low or else included in the respective Rj. High-impedance signals can be buffered before being added. If Ry = Ry = Ry, we have an averager with gain (1 + Ry/R,). If, in addition, Ry, = 2R,, we have a simple adder. ‘The output zero error follows from (2.63), OzE= vol +B) +1nRo~ 1a,( +R) (48a)186 LINEAR ANALOG FUNCTIONS. If resistors are balanced so that RR, = Rp. then Ry O28 = Vo(1+ 2) + ho (43) The gain for each signal is now & (1 + *) (49a) By taking derivatives and rearranging, Ry (# 8) 38 RF RAR, R dG, _ AR, GR (4.96) R Determining the inaccuracy in R, due to the tolerance of each single resistor is a simple yet long procedure. By taking the derivative of (4.7) and solving, TAR, 1 dk, 1d (4.96) If input voltages are all weighted equally, Ry = Re = Rs, ea inctintin a Rp 3 and by substituting in (4.96) AG, _ttintin, Re 8G in tintin -u)- Go RE Rm (4.10) By comparing with (4.3), we conclude that the noninverting adder is less accurate than the inverting adder because equal tolerances do not lead now to error cancellation. ‘The dynamic gain error follows from the circuit low-pass response. Depending on whether a VFA or a CFA is used, comer frequencies are ‘given by (4.5a), with G, from (4.9a), or by (4.5b) with R replaced by Rie From (2.66), a limited CMRR yields an additional gain error. Accurate noninverting two-voltage adders can be built from integrated DAs, Figure 4.3a. For low-frequency signals, gain accuracy can be up to 0.05% for integrated (laser-trimmed) resistors. A voltage averager needs just ‘a rearranged connection, Figure 4.3. 41 ADDITION 187 @ o FIGURE 43 Noninverting adder (a) and averager (b) for two voltages, built from an integrated difference amplifier. 4.1.2 Differential Voltage Addition Figure 44a shows a simple circuit to add two differential voltages. The IAS ‘must have the same gain. The OZE will be the difference between the OZE for each TA, given by (2.46b) and (2.22) or (2.21), depending on whether the voltage source is balanced or not. Hence, for high accuracy itis better to use ‘dual IAs (two IAs in a single package) which will have similar errors. Gain ‘accuracy and drift will be those of each IA. If gains are not identical, Uy = Gin ~ 6: va) = Galva +9) + AGS "B (4.11) ‘where G, is the average gain and AG its difference. That is, the output will depend not only on the sum but also on the difference of input signals. If a