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A

JASAA
Orlando 10A/10AG

LA3831P REV 1.0 Schematic


3

AMD Turion,Sempron/ATI RX690/RS690MC / ATI SB600


2007-08-06 Rev. 1.0

Compal Secret Data

Security Classification
2007/3/8

Issued Date

Deciphered Date

2008/3/8

Compal Electronics, Inc.

Title

SCHEMATIC MB A3831

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Document Number
401498
Thursday, November 25, 2010

Rev
D
Sheet
E

of

46

Compal confidential

JASAA Orlando10A FUNCTION BLOCK

DIAGRAM

File Name : JASAA Orlando10A LA3831P


P/N :
Clock Generator
ICS951462AGLFT

Thermal Sensor
GMT G781P8F

AMD S1 CPU 638 pin


Turion 64 X2
Turion 64
Sempron

PAGE 13

PAGE 6

CPU VID

533/667MHz
(1.8V)

SO-DIMM x 2(DDRII)

Memory Bus

BANK 0,1,2,3

FANController

PAGE 41
4

PAGE 8,9

DC/DC Interface PAGE 42

PAGE 1,2,3,4,5,6,7

Power Buttom
PAGE 6

PAGE 39

HT
16x16 1000MHZ

CRT Conn.

x1 PCI-E

HD DVD

page 15

PAGE 24

ATI-RX/RS690MC

LVDS Conn

x1 PCI-E

Mini Card-WLAN

page 15

PAGE 24

VGA M26P Embeded


x1 PCI-E

TV-OUT Conn.

New Card
3

465 pin BGA

page 14

PAGE 28

PAGE 10,11,12

HDMI Conn.
page 20

LAN

x1 PCI-E

VGA Conn
page 15

PAGE 25

USB 2.0

PCI

ATI-SB600

SATA

480MHz(5V)

Primary SATA
3.3V,5V
1.5GHz(150MB/s)

USB Port * 6 (Port 0, 1


PAGE 30
4, 5, 6, 7)
SATA HDD0

Int. Camera (Port 8)

PCI8412-1394/CardBus/5IN1

SATA

SATA HDD1

PAGE 16,17,18,19

Finger Printer (Port 2)


PAGE 30

Bluetooth (Port 3)
PAGE 30

PAGE 30

PAGE 21

548 pin BGA

CardBus/ 5IN1/ 1394

PAGE 25

RTL8101E-10/100M

A-Link Express II
x4 PCIE

33MHz (3.3V)

RJ-45

RTL8111B-1G

NewCard (Port 9)
PAGE 29

PAGE 21
Secondary

PATAATA-100 (5V)

PAGE 22, 23

DCIN&DETECTOR

IDE ODD
PAGE 28

PAGE 36

LPC

BATT CONN/OTP

33MHz (3.3V)

PAGE 37

5 IN 1 Conn

1394-Port
PAGE 22

Debug Port
PAGE 34

PAGE 22

Azalia

Embedded Controller
SPI

24MHz(3.3V)

PAGE 30

ENE KB926

PAGE 26

Int.
K/B
Matrix

PS2

BIOS

Track
Pad

Scan
KB

PAGE 31

PAGE 33

PAGE 33

HD CODEC
ALC268-GR

CHARGER

Audio Amplifier
APA2057APAGE 27

PAGE 38

3V/5V/
PAGE 39

MDC w/Rev1.5
PAGE 29

Audio Amplifier
APA2068 PAGE 27

1.8V/1.2V
PAGE 40

Audio Amplifier
APA3010APAGE 28

2.5V/0.9V/1.5V
PAGE 41

CPU_CORE
PAGE 42

Compal Secret Data

Security Classification
2007/3/8

Issued Date

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Compal Electronics, Inc.


SCHEMATIC MB A3831
Document Number
401498
Thursday, November 25, 2010

Rev
D
Sheet
E

of

46

Voltage Rails

SIGNAL

STATE

Power Plane

Description

S1

S3

S5

VIN

Adapter power supply (19V)

ON

ON

ON

B+

AC or battery power rail for power circuit.

ON

ON

ON

+RTCVCC

RTC power

ON

ON

ON

+VSB

B+ switched power rail

ON

ON

ON

+5VALW

5V always on power rail

ON

ON

ON

+3VALW

3.3V always on power rail

ON

ON

ON

+1.2VALW

1.2V always on power rail

ON

ON

ON

+1.8V

1.8V power rail

ON

ON

OFF

+0.9V

0.9V switched power rail

ON

ON

OFF

ON

HIGH

HIGH

ON

ON

ON

LOW

S3 (Suspend to RAM)

LOW

HIGH

ON

ON

OFF

OFF

S4 (Suspend to Disk)

LOW

LOW

ON

OFF

OFF

OFF

S5 (Soft OFF)

LOW

LOW

ON

OFF

OFF

OFF

S1(Power On Suspend)

OFF

OFF

OFF

OFF

Vcc
Ra

+2.5VS

2.5VS switched power rail

ON

OFF

OFF

Board ID

+1.8VS

1.8VS switched power rail

ON

OFF

OFF

0
1
2
3
4
5
6
7

OFF

OFF

OFF

OFF

+1.2V_HT

1.2VS switched power rail

ON

OFF

OFF

ID Table for AD channel

ON

ON

Clock

ON

ON

ON

+VS

ON

5VS switched power rail

1.5VS switched power rail

+V

ON

3.3VS switched power rail

Core voltage for CPU

+VALW

HIGH

+5VS

+1.5VS

SLP_S3# SLP_S5#
HIGH

Full ON

+3VS

+CPU_CORE

3.3V +/- 5%
100K +/- 5%
Rb
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC

V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V

V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V

V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

External PCI Devices


Device

IDSEL#

1394/ CardBus/ 5IN1

AD20

REQ#/GNT#
2/ 2

EC SM Bus1 address
3

Interrupts

EC SM Bus2 address

Device

HEX

Address

Device

HEX

Address

Smart Battery

16H

0001 011X b

CPU Thermal-G781P8F

98H

1001 100X b

24C16

A0H

1010 000X b

VGA Thermal-

ATi SB600 SM Bus address


SM Bus0 address
Device

HEX

BTN_ID
0
1
2
3
4
5
6
7

PIRQE/F/G

BTO

BOM STURCTURE

SM Bus1 address

Address

Clock GEN.
(ICS951462AGLFT)
DDR DIMM0

A4
A6

DDR DIMM1
4

Mini Card-WLAN

Mini Card-3G
New Card

Compal Secret Data

Security Classification
2007/3/8

Issued Date

Deciphered Date

2008/3/8

Title

Compal Electronics, Inc.


SCHEMATIC MB A3831

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom401498
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Thursday, November 25, 2010
Date:
A

Rev
D
Sheet
E

of

46

10 H_CADIP[0..15]
D

10 H_CADIN[0..15]

H_CADIP[0..15]

H_CADOP[0..15]

H_CADIN[0..15]

H_CADON[0..15]

H_CADOP[0..15]

10

H_CADON[0..15]

10

+1.2V_HT
JP27A

H_CADIP15
H_CADIN15
H_CADIP14
H_CADIN14
H_CADIP13
H_CADIN13
H_CADIP12
H_CADIN12
H_CADIP11
H_CADIN11
H_CADIP10
H_CADIN10
H_CADIP9
H_CADIN9
H_CADIP8
H_CADIN8
H_CADIP7
H_CADIN7
H_CADIP6
H_CADIN6
H_CADIP5
H_CADIN5
H_CADIP4
H_CADIN4
H_CADIP3
H_CADIN3
H_CADIP2
H_CADIN2
H_CADIP1
H_CADIN1
H_CADIP0
H_CADIN0

10
10
10
10

H_CLKIP1
H_CLKIN1
H_CLKIP0
H_CLKIN0

D4
D3
D2
D1

VLDT_A3
VLDT_A2
VLDT_A1
VLDT_A0

VLDT_B3
VLDT_B2
VLDT_B1
VLDT_B0

AE5
AE4
AE3
AE2

N5
P5
M3
M4
L5
M5
K3
K4
H3
H4
G5
H5
F3
F4
E5
F5
N3
N2
L1
M1
L3
L2
J1
K1
G1
H1
G3
G2
E1
F1
E3
E2

L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0

L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0

T4
T3
V5
U5
V4
V3
Y5
W5
AB5
AA5
AB4
AB3
AD5
AC5
AD4
AD3
T1
R1
U2
U3
V1
U1
W2
W3
AA2
AA3
AB1
AA1
AC2
AC3
AD1
AC1

J5
K5
J3
J2

L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKIN_H0
L0_CLKIN_L0

L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0

Y4
Y3
Y1
W1

P3
P4

L0_CTLIN_H1
L0_CTLIN_L1

L0_CTLOUT_H1
L0_CTLOUT_L1

T5
R5

N1
P1

L0_CTLIN_H0
L0_CTLIN_L0

L0_CTLOUT_H0
L0_CTLOUT_L0

R2
R3

HTT Interface

VLDT=500mA

1
C107

2
4.7U_0805_10V4Z

H_CADOP15
H_CADON15
H_CADOP14
H_CADON14
H_CADOP13
H_CADON13
H_CADOP12
H_CADON12
H_CADOP11
H_CADON11
H_CADOP10
H_CADON10
H_CADOP9
H_CADON9
H_CADOP8
H_CADON8
H_CADOP7
H_CADON7
H_CADOP6
H_CADON6
H_CADOP5
H_CADON5
H_CADOP4
H_CADON4
H_CADOP3
H_CADON3
H_CADOP2
H_CADON2
H_CADOP1
H_CADON1
H_CADOP0
H_CADON0

VLDT CAP.

+1.2V_HT
250 mil

C102
4.7U_0805_10V4Z

C103
4.7U_0805_10V4Z

C101
0.22U_0603_16V4Z

C104
0.22U_0603_16V4Z

C106
180P_0402_50V8J

C112
180P_0402_50V8J

Near CPU Socket

H_CLKOP1
H_CLKON1
H_CLKOP0
H_CLKON0

10
10
10
10

+1.2V_HT
R52
R51
B

10
10

1 51_0402_1%
1 51_0402_1%

2
2
H_CTLIP0
H_CTLIN0

H_CTLIP0
H_CTLIN0

H_CTLOP0
H_CTLON0

H_CTLOP0 10
H_CTLON0 10

FOX_PZ63823-284S-41F
Athlon 64 S1
Processor Socket

AMD : 49.9 1%
ATI : 51 1%

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/3/8

Issued Date

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC MB A3831
Rev
D

401498

Date:

Thursday, November 25, 2010

Sheet
1

of

46

Processor DDR2 Memory Interface


9 DDR_B_D[63..0]

2
R91
1K_0402_1%
+CPU_M_VREF

C156
1000P_0402_50V7K

R90
1K_0402_1%

C151
0.1U_0402_16V4Z

DVT: Change to SE074102K80

PLACE CLOSE TO PROCESSOR


WITHIN 1.5 INCH

+CPU_M_VREF
JP27B

+0.9V
DDR_A_CLK2

Need to link SD000006980

R331 1
R335 2

+1.8V

TP2

8
8
8
8
9
9
9
9

DDR_CS3_DIMMA#
DDR_CS2_DIMMA#
DDR_CS1_DIMMA#
DDR_CS0_DIMMA#
DDR_CS3_DIMMB#
DDR_CS2_DIMMB#
DDR_CS1_DIMMB#
DDR_CS0_DIMMB#

9 DDR_CKE1_DIMMB
9 DDR_CKE0_DIMMB
8 DDR_CKE1_DIMMA
8 DDR_CKE0_DIMMA
8 DDR_A_MA[15..0]

8 DDR_A_BS#2
8 DDR_A_BS#1
8 DDR_A_BS#0
8 DDR_A_RAS#
8 DDR_A_CAS#
8 DDR_A_WE#

VTT_SENSE

2
1 39.2_0402_1%
39.2_0402_1%

Y10

M_ZN AE10
M_ZP AF10

M_VREF
VTT_SENSE
M_ZN
M_ZP

DDR_CS3_DIMMA#
DDR_CS2_DIMMA#
DDR_CS1_DIMMA#
DDR_CS0_DIMMA#

V19
J22
V22
T19

DDR_CS3_DIMMB#
DDR_CS2_DIMMB#
DDR_CS1_DIMMB#
DDR_CS0_DIMMB#

Y26
J24
W24
U23

MB0_CS_L3
MB0_CS_L2
MB0_CS_L1
MB0_CS_L0

H26
J23
J20
J21

MB_CKE1
MB_CKE0
MA_CKE1
MA_CKE0

DDR_CKE1_DIMMB
DDR_CKE0_DIMMB
DDR_CKE1_DIMMA
DDR_CKE0_DIMMA

VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9

MA0_CS_L3
MA0_CS_L2
MA0_CS_L1
MA0_CS_L0

DDR_A_MA15
DDR_A_MA14
DDR_A_MA13
DDR_A_MA12
DDR_A_MA11
DDR_A_MA10
DDR_A_MA9
DDR_A_MA8
DDR_A_MA7
DDR_A_MA6
DDR_A_MA5
DDR_A_MA4
DDR_A_MA3
DDR_A_MA2
DDR_A_MA1
DDR_A_MA0

K19
K20
V24
K24
L20
R19
L19
L22
L21
M19
M20
M24
M22
N22
N21
R21

MA_ADD15
MA_ADD14
MA_ADD13
MA_ADD12
MA_ADD11
MA_ADD10
MA_ADD9
MA_ADD8
MA_ADD7
MA_ADD6
MA_ADD5
MA_ADD4
MA_ADD3
MA_ADD2
MA_ADD1
MA_ADD0

DDR_A_BS#2
DDR_A_BS#1
DDR_A_BS#0

K22
R20
T22

DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#

T20
U20
U21

DDRII Cmd/Ctrl//Clk

W17

D10
C10
B10
AD10
W10
AC10
AB10
AA10
A10

1
C148
1.5P_0402_50V9C

DDR_A_CLK1

MA0_CLK_H2
MA0_CLK_L2
MA0_CLK_H1
MA0_CLK_L1

Y16 DDR_A_CLK2
AA16 DDR_A_CLK#2
E16 DDR_A_CLK1
F16 DDR_A_CLK#1

MB0_CLK_H2
MB0_CLK_L2
MB0_CLK_H1
MB0_CLK_L1

AF18
AF17
A17
A18

DDR_B_CLK2
DDR_B_CLK#2
DDR_B_CLK1
DDR_B_CLK#1

W23
W26
V20
U19

DDR_B_ODT1
DDR_B_ODT0
DDR_A_ODT1
DDR_A_ODT0

MB0_ODT1
MB0_ODT0
MA0_ODT1
MA0_ODT0

DDR_A_CLK#2

DDR_B_MA15
DDR_B_MA14
DDR_B_MA13
DDR_B_MA12
DDR_B_MA11
DDR_B_MA10
DDR_B_MA9
DDR_B_MA8
DDR_B_MA7
DDR_B_MA6
DDR_B_MA5
DDR_B_MA4
DDR_B_MA3
DDR_B_MA2
DDR_B_MA1
DDR_B_MA0

DDR_A_CLK2
DDR_A_CLK#2
DDR_A_CLK1
DDR_A_CLK#1

DDR_B_CLK2
DDR_B_CLK#2
DDR_B_CLK1
DDR_B_CLK#1

DDR_A_CLK#1

C150
1.5P_0402_50V9C

8
8

DDR_B_CLK2

1
9

9
9

DDR_B_ODT1 9
DDR_B_ODT0 9
DDR_A_ODT1 8
DDR_A_ODT0 8
DDR_B_MA[15..0]

MB_ADD15
MB_ADD14
MB_ADD13
MB_ADD12
MB_ADD11
MB_ADD10
MB_ADD9
MB_ADD8
MB_ADD7
MB_ADD6
MB_ADD5
MB_ADD4
MB_ADD3
MB_ADD2
MB_ADD1
MB_ADD0

J25
J26
W25
L23
L25
U25
L24
M26
L26
N23
N24
N25
N26
P24
P26
T24

MA_BANK2
MA_BANK1
MA_BANK0

MB_BANK2
MB_BANK1
MB_BANK0

K26 DDR_B_BS#2
T26 DDR_B_BS#1
U26 DDR_B_BS#0

DDR_B_BS#2 9
DDR_B_BS#1 9
DDR_B_BS#0 9

MA_RAS_L
MA_CAS_L
MA_WE_L

MB_RAS_L
MB_CAS_L
MB_WE_L

U24 DDR_B_RAS#
V26 DDR_B_CAS#
U22 DDR_B_WE#

DDR_B_RAS# 9
DDR_B_CAS# 9
DDR_B_WE# 9

DDR_B_CLK#2

C149
1.5P_0402_50V9C

DDR_B_CLK1

1
9

DDR_B_CLK#1

C568
1.5P_0402_50V9C

9 DDR_B_DM[7..0]

FOX_PZ63823-284S-41F
Athlon 64 S1
Processor
Socket

9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9

DDR_B_DQS7
DDR_B_DQS#7
DDR_B_DQS6
DDR_B_DQS#6
DDR_B_DQS5
DDR_B_DQS#5
DDR_B_DQS4
DDR_B_DQS#4
DDR_B_DQS3
DDR_B_DQS#3
DDR_B_DQS2
DDR_B_DQS#2
DDR_B_DQS1
DDR_B_DQS#1
DDR_B_DQS0
DDR_B_DQS#0

DDR_B_D63
DDR_B_D62
DDR_B_D61
DDR_B_D60
DDR_B_D59
DDR_B_D58
DDR_B_D57
DDR_B_D56
DDR_B_D55
DDR_B_D54
DDR_B_D53
DDR_B_D52
DDR_B_D51
DDR_B_D50
DDR_B_D49
DDR_B_D48
DDR_B_D47
DDR_B_D46
DDR_B_D45
DDR_B_D44
DDR_B_D43
DDR_B_D42
DDR_B_D41
DDR_B_D40
DDR_B_D39
DDR_B_D38
DDR_B_D37
DDR_B_D36
DDR_B_D35
DDR_B_D34
DDR_B_D33
DDR_B_D32
DDR_B_D31
DDR_B_D30
DDR_B_D29
DDR_B_D28
DDR_B_D27
DDR_B_D26
DDR_B_D25
DDR_B_D24
DDR_B_D23
DDR_B_D22
DDR_B_D21
DDR_B_D20
DDR_B_D19
DDR_B_D18
DDR_B_D17
DDR_B_D16
DDR_B_D15
DDR_B_D14
DDR_B_D13
DDR_B_D12
DDR_B_D11
DDR_B_D10
DDR_B_D9
DDR_B_D8
DDR_B_D7
DDR_B_D6
DDR_B_D5
DDR_B_D4
DDR_B_D3
DDR_B_D2
DDR_B_D1
DDR_B_D0

AD11
AF11
AF14
AE14
Y11
AB11
AC12
AF13
AF15
AF16
AC18
AF19
AD14
AC14
AE18
AD18
AD20
AC20
AF23
AF24
AF20
AE20
AD22
AC22
AE25
AD26
AA25
AA26
AE24
AD24
AA23
AA24
G24
G23
D26
C26
G26
G25
E24
E23
C24
B24
C20
B20
C25
D24
A21
D20
D18
C18
D14
C14
A20
A19
A16
A15
A13
D12
E11
G11
B14
A14
A11
C11

MB_DATA63
MB_DATA62
MB_DATA61
MB_DATA60
MB_DATA59
MB_DATA58
MB_DATA57
MB_DATA56
MB_DATA55
MB_DATA54
MB_DATA53
MB_DATA52
MB_DATA51
MB_DATA50
MB_DATA49
MB_DATA48
MB_DATA47
MB_DATA46
MB_DATA45
MB_DATA44
MB_DATA43
MB_DATA42
MB_DATA41
MB_DATA40
MB_DATA39
MB_DATA38
MB_DATA37
MB_DATA36
MB_DATA35
MB_DATA34
MB_DATA33
MB_DATA32
MB_DATA31
MB_DATA30
MB_DATA29
MB_DATA28
MB_DATA27
MB_DATA26
MB_DATA25
MB_DATA24
MB_DATA23
MB_DATA22
MB_DATA21
MB_DATA20
MB_DATA19
MB_DATA18
MB_DATA17
MB_DATA16
MB_DATA15
MB_DATA14
MB_DATA13
MB_DATA12
MB_DATA11
MB_DATA10
MB_DATA9
MB_DATA8
MB_DATA7
MB_DATA6
MB_DATA5
MB_DATA4
MB_DATA3
MB_DATA2
MB_DATA1
MB_DATA0

DDR_B_DM7
DDR_B_DM6
DDR_B_DM5
DDR_B_DM4
DDR_B_DM3
DDR_B_DM2
DDR_B_DM1
DDR_B_DM0

AD12
AC16
AE22
AB26
E25
A22
B16
A12

MB_DM7
MB_DM6
MB_DM5
MB_DM4
MB_DM3
MB_DM2
MB_DM1
MB_DM0

DDR_B_DQS7
DDR_B_DQS#7
DDR_B_DQS6
DDR_B_DQS#6
DDR_B_DQS5
DDR_B_DQS#5
DDR_B_DQS4
DDR_B_DQS#4
DDR_B_DQS3
DDR_B_DQS#3
DDR_B_DQS2
DDR_B_DQS#2
DDR_B_DQS1
DDR_B_DQS#1
DDR_B_DQS0
DDR_B_DQS#0

AF12
AE12
AE16
AD16
AF21
AF22
AC25
AC26
F26
E26
A24
A23
D16
C16
C12
B12

MB_DQS_H7
MB_DQS_L7
MB_DQS_H6
MB_DQS_L6
MB_DQS_H5
MB_DQS_L5
MB_DQS_H4
MB_DQS_L4
MB_DQS_H3
MB_DQS_L3
MB_DQS_H2
MB_DQS_L2
MB_DQS_H1
MB_DQS_L1
MB_DQS_H0
MB_DQS_L0

DDRII Data

JP27C

+1.8V

MA_DATA63
MA_DATA62
MA_DATA61
MA_DATA60
MA_DATA59
MA_DATA58
MA_DATA57
MA_DATA56
MA_DATA55
MA_DATA54
MA_DATA53
MA_DATA52
MA_DATA51
MA_DATA50
MA_DATA49
MA_DATA48
MA_DATA47
MA_DATA46
MA_DATA45
MA_DATA44
MA_DATA43
MA_DATA42
MA_DATA41
MA_DATA40
MA_DATA39
MA_DATA38
MA_DATA37
MA_DATA36
MA_DATA35
MA_DATA34
MA_DATA33
MA_DATA32
MA_DATA31
MA_DATA30
MA_DATA29
MA_DATA28
MA_DATA27
MA_DATA26
MA_DATA25
MA_DATA24
MA_DATA23
MA_DATA22
MA_DATA21
MA_DATA20
MA_DATA19
MA_DATA18
MA_DATA17
MA_DATA16
MA_DATA15
MA_DATA14
MA_DATA13
MA_DATA12
MA_DATA11
MA_DATA10
MA_DATA9
MA_DATA8
MA_DATA7
MA_DATA6
MA_DATA5
MA_DATA4
MA_DATA3
MA_DATA2
MA_DATA1
MA_DATA0

AA12
AB12
AA14
AB14
W11
Y12
AD13
AB13
AD15
AB15
AB17
Y17
Y14
W14
W16
AD17
Y18
AD19
AD21
AB21
AB18
AA18
AA20
Y20
AA22
Y22
W21
W22
AA21
AB22
AB24
Y24
H22
H20
E22
E21
J19
H24
F22
F20
C23
B22
F18
E18
E20
D22
C19
G18
G17
C17
F14
E14
H17
E17
E15
H15
E13
C13
H12
H11
G14
H14
F12
G12

DDR_A_D63
DDR_A_D62
DDR_A_D61
DDR_A_D60
DDR_A_D59
DDR_A_D58
DDR_A_D57
DDR_A_D56
DDR_A_D55
DDR_A_D54
DDR_A_D53
DDR_A_D52
DDR_A_D51
DDR_A_D50
DDR_A_D49
DDR_A_D48
DDR_A_D47
DDR_A_D46
DDR_A_D45
DDR_A_D44
DDR_A_D43
DDR_A_D42
DDR_A_D41
DDR_A_D40
DDR_A_D39
DDR_A_D38
DDR_A_D37
DDR_A_D36
DDR_A_D35
DDR_A_D34
DDR_A_D33
DDR_A_D32
DDR_A_D31
DDR_A_D30
DDR_A_D29
DDR_A_D28
DDR_A_D27
DDR_A_D26
DDR_A_D25
DDR_A_D24
DDR_A_D23
DDR_A_D22
DDR_A_D21
DDR_A_D20
DDR_A_D19
DDR_A_D18
DDR_A_D17
DDR_A_D16
DDR_A_D15
DDR_A_D14
DDR_A_D13
DDR_A_D12
DDR_A_D11
DDR_A_D10
DDR_A_D9
DDR_A_D8
DDR_A_D7
DDR_A_D6
DDR_A_D5
DDR_A_D4
DDR_A_D3
DDR_A_D2
DDR_A_D1
DDR_A_D0

MA_DM7
MA_DM6
MA_DM5
MA_DM4
MA_DM3
MA_DM2
MA_DM1
MA_DM0

Y13
AB16
Y19
AC24
F24
E19
C15
E12

DDR_A_DM7
DDR_A_DM6
DDR_A_DM5
DDR_A_DM4
DDR_A_DM3
DDR_A_DM2
DDR_A_DM1
DDR_A_DM0

MA_DQS_H7
MA_DQS_L7
MA_DQS_H6
MA_DQS_L6
MA_DQS_H5
MA_DQS_L5
MA_DQS_H4
MA_DQS_L4
MA_DQS_H3
MA_DQS_L3
MA_DQS_H2
MA_DQS_L2
MA_DQS_H1
MA_DQS_L1
MA_DQS_H0
MA_DQS_L0

W12
W13
Y15
W15
AB19
AB20
AD23
AC23
G22
G21
C22
C21
G16
G15
G13
H13

DDR_A_DQS7
DDR_A_DQS#7
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DQS0
DDR_A_DQS#0

DDR_A_D[63..0]

DDR_A_DM[7..0]

DDR_A_DQS7
DDR_A_DQS#7
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DQS0
DDR_A_DQS#0

8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8

FOX_PZ63823-284S-41F

Athlon 64 S1
Processor Socket

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/3/8

Issued Date

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC MB A3831
Rev
D

401498

Date:

Thursday, November 25, 2010

Sheet
E

of

46

1
LDT_STOP#

2
R89
680_0402_5%

+1.2V_HT

R53
R54

AF4
AF5

SIC
SID

2 44.2_0402_1% CPU_HTREF1 P6
2 44.2_0402_1% CPU_HTREF0 R6

1
1

VID5
VID4
VID3
VID2
VID1
VID0

HTREF1
HTREF0

R53&R54 place them to CPU within 1"

A:PA_IXP600AD12

CPU_CLKIN_SC_P
CPU_CLKIN_SC_N

2 3900P_0402_50V7K
1

1
C547

CPUCLK0_H

R333
169_0402_1%

A:PA_IXP600AD12
13

1
C545

CPUCLK0_L

W9
Y9

TP1

2
3900P_0402_50V7K

A9
A8

+1.8V

2
R86

CPU_TEST25_H_BYPASSCLK_H
1
510_0402_5%

2
R48
2
R49
2
R50

CPU_TEST25_L_BYPASSCLK_L
1
510_0402_5%
CPU_TEST19_PLLTEST0
1
300_0402_5%
CPU_TEST18_PLLTEST1
1
300_0402_5%

Thermal Sensor
GMT G781P8F

G10

DBRDY
TMS
TCK
TRST_L
TDI

E9
E8
G9
H10
AA7
C2
D7
E7
F7
C7
AC8

TEST25_H
TEST25_L
TEST19
TEST18
TEST13
TEST9
TEST17
TEST16
TEST15
TEST14
TEST12

B: Change to GMT G781P8F from DVT.

C3
AA6
W7
W8
Y6
AB6

TEST7
TEST6
THERMDC
THERMDA
TEST3
TEST2

P20
P19
N20
N19

RSVD0
RSVD1
RSVD2
RSVD3

2200P_0402_50V7K
B

U6
THERMDA_CPU 2

DXP+

VCC

THERMDC_CPU 3

DXN-

ALERT#

THERM#

GND

15,31 EC_SMB_CK2

SCLK

15,31 EC_SMB_DA2

SDATA

R26
R25
P22
R22

C105
0.1U_0402_16V4Z

+1.8V

CPU_DBREQ#
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO

E10

CPU_DBREQ#

TDO

AE9

CPU_TDO

RSVD4
RSVD5
RSVD6
RSVD7

C9
C8

CPU_TEST29_H_FBCLKOUT_P
CPU_TEST29_L_FBCLKOUT_N

TEST24
TEST23
TEST22
TEST21
TEST20

AE7
AD7
AE8
AB8
AF7

Q11
11

R42
2
0_0402_5%
@

H_PROCHOT# 16

R88
80.6_0402_1%
1
2
C

TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8

J7
H8
AF8
AE6
K8
C4

RSVD8
RSVD9

H16
B18

RSVD10
RSVD11

B3
C1

RSVD12
RSVD13
RSVD14

H6
G6
D5

RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20

R24
W18
R23
AA8
H18
H19

TP8
TP9
TP10
CPU_TEST21_SCANEN
TP7

+1.8V

VID1
CPU_PRESENT#
CPU_TEST26_BURNIN#

CPU_TEST26_BURNIN#
CPU_TEST21_SCANEN

1
R47
1
R56
1
R57

2
300_0402_5%
2
1K_0402_5%
2
300_0402_5%

1
R55

2
300_0402_5%

FOX_PZ63823-284S-41F

HDT Connector
TP20
+3VS

TP18

U20D
TP19

NOTE: HDT TERMINATION IS REQUIRED


FOR REV. Ax SILICON ONLY.

H_THERMTRIP# 16

ROUTE AS 80 Ohm DIFFERENTIAL PAIR


PLACE IT CLOSE TO CPU WITHIN 1"

2
1
@ 220_0402_5% R77
2
1
@ 220_0402_5% R76
2
1
@ 220_0402_5% R75
2
1
@ 220_0402_5% R74
2
1
@ 220_0402_5% R73

G781P8F_MSOP8

DBREQ_L

TEST29_H
TEST29_L

+3VS
C111

CPU_PROCHOT#_1.8

@ MMBT3904_SOT23-3

AA9
AC9
AD9
AF9

THERMDC_CPU
THERMDA_CPU

43

1
@ 10K_0402_5%
2
300_0402_5%

CLKIN_H
CLKIN_L

CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI

TP4
TP5
TP6
TP3
TP11

PSI#

VDDIO_FB_H
VDDIO_FB_L

CPU_DBRDY

CPU_TEST25_H_BYPASSCLK_H
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST19_PLLTEST0
CPU_TEST18_PLLTEST1

2
R41
1
R43

+1.8V
TP15

A3

MAINPWON 37,38,40

43
43
43
43
43
43

13

R44
680_0402_5%

VDDIOFB_H

PSI_L

MMBT3904_SOT23-3

VID5
VID4
VID3
VID2
VID1
VID0

AC6 CPU_PRESENT#

41

CPU_PRESENT_L
VDD_FB_H
VDD_FB_L

A5
C6
A6
A4
C5
B5

16,22

F6
E6

43 CPU_VCC_SENSE
43 CPU_VSS_SENSE

LDT_RST#

LDT_RST#

CPU_SIC
1
300_0402_5%

2
R332

RESET_L
PWROK
LDTSTOP_L

MISC

A:PA_IXP600AD12

B7
A7
F10

AF6 CPU_THERMTRIP#_R
CPU_PROCHOT#_1.8
AC7

PCIRST#

R35
2
0_0402_5%
R36
2
0_0402_5%
@

Q10

THERMTRIP_L
PROCHOT_L

LDT_RST#
H_PWRGD
LDT_STOP#

VDDA2
VDDA1

F8
F9

16

CH751H-40PT_SOD323-2
2
1
D46

1
47K_0402_5%
2
300_0402_5%

JP27D

R87
680_0402_5%

11,16 LDT_STOP#

2
R37
1
R38

H_PWRGD

H_PWRGD

+1.8V

16

DVT:Change to 47k

C119
100U_D2_10VM

+2.5VDDA
VDDA=300mA
L16
3300P_0402_50V7K
1
2
1 FBM_L11_201209_300L_0805
1
1
1
+
4.7U_0805_10V4Z
C132
C131
C139
0.22U_0603_16V4Z
2
2
2
2

HDT_RST#

11

14

A:Need to re-Link "SGN00000200"

+2.5VS

12 LDT_RST#

13

SN74LVC08APW_TSSOP14

SB_PWRGD 16,31
A

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/3/8

Issued Date

Deciphered Date

2008/3/8

Title

SCHEMATIC MB A3831

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
D

401498

Date:

Thursday, November 25, 2010

Sheet
1

of

46

+CPU_CORE

+CPU_CORE

45level
+ C544
45@ 820U_E9_2_5V_M_R7

1
+

C576
330U_D2_2.5VY_R9M
@

C560
330U_D2_2.5VY_R9M

+ C602
330U_D2_2.5VY_R9M

+ C785
330U_D2_2.5VY_R9M
@
2

+ C786
330U_D2_2.5VY_R9M

Near CPU Socket


+CPU_CORE

C123
22U_0805_6.3V6M

C146
22U_0805_6.3V6M

C125
22U_0805_6.3V6M

+CPU_CORE

C144
22U_0805_6.3V6M

C138
0.22U_0603_16V4Z

C122
22U_0805_6.3V6M

+CPU_CORE

C143
0.22U_0603_16V4Z

C124
22U_0805_6.3V6M

C145
22U_0805_6.3V6M

C126
22U_0805_6.3V6M

C142
22U_0805_6.3V6M

+CPU_CORE

C129
0.01U_0402_25V4Z

C136
180P_0402_50V8J

Under CPU Socket

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD37
VDD38
VDD39
VDD40
VDD41
VDD42

Power

VDD(+CPU_CORE) decoupling.

AA4
AA11
AA13
AA15
AA17
AA19
AB2
AB7
AB9
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B4
B6
B8
B9
B11
B13
B15
B17
B19
B21
B23
B25
D6
D8
D9
D11
D13
D15
D17
D19
D21
D23
D25
E4
F2
F11
F13
F15
F17
F19
F21
F23
F25
H7
H9
H21
H23
J4

+CPU_CORE
JP27E

AC4
AD2
G4
H2
J9
J11
J13
K6
K10
K12
K14
L4
L7
L9
L11
L13
M2
M6
M8
M10
N7
N9
N11
P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
V6
V8
V10

VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54

V12
V14
W4
Y2
J15
K16
L15
M16
P16
T16
U15
V16

VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27

H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17
P18
P21
P23
P25
R17
T18
T21
T23
T25
U17
V18
V21
V23
V25
Y25

+1.8V

FOX_PZ63823-284S-41F

VDDIO decoupling.

Athlon 64 S1
Processor Socket

+1.8V
+1.8V

C153
22U_0805_6.3V6M

C152
22U_0805_6.3V6M

C155
0.22U_0603_16V4Z

C154
0.22U_0603_16V4Z

+0.9V

Under CPU Socket

VTT decoupling.

VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129

J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
M11
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6

FOX_PZ63823-284S-41F

Near Power Supply

Athlon 64 S1
Processor Socket

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65

Ground

JP27F

+ C577
220U_Y_4VM

Between CPU Socket and DIMM


+1.8V
+0.9V

C163
0.22U_0603_16V4Z

C177
0.22U_0603_16V4Z

C164
0.22U_0603_16V4Z

+1.8V

C160
0.01U_0402_25V4Z

C172
0.22U_0603_16V4Z

+1.8V

C159
0.01U_0402_25V4Z

180PF Qt'y follow the distance between


CPU socket and DIMM0. <2.5inch>
1

C157
180P_0402_50V8J

C158
180P_0402_50V8J

C165
180P_0402_50V8J

C555
4.7U_0805_10V4Z

C548
0.22U_0603_16V4Z

C549
0.22U_0603_16V4Z

C559
1000P_0402_50V7K

C554
1000P_0402_50V7K

C552
180P_0402_50V8J

C550
180P_0402_50V8J

Near CPU Socket Right side.


DVT: Change to SE074102K80

C176
+0.9V
180P_0402_50V8J

2
1

+1.8V

C556
4.7U_0805_10V4Z

C140
4.7U_0805_10V4Z

C137
4.7U_0805_10V4Z

C133
0.22U_0603_16V4Z

C134
0.22U_0603_16V4Z

C130
1000P_0402_50V7K

C127
1000P_0402_50V7K

C147
180P_0402_50V8J

C128
180P_0402_50V8J

1
1

1
C183
4.7U_0805_10V4Z

1
C182
4.7U_0805_10V4Z

1
C162
4.7U_0805_10V4Z

C161
4.7U_0805_10V4Z

+ C652
220U_Y_4VM
@

Near CPU Socket Left side.

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/3/8

Issued Date

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC MB A3831
Rev
D

401498

Date:

Thursday, November 25, 2010

Sheet
1

of

46

DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11

DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D24
DDR_A_D25
DDR_A_DM3
DDR_A_D26
DDR_A_D27
C

DDR_CKE0_DIMMA

5 DDR_CKE0_DIMMA

DDR_CS2_DIMMA#
DDR_A_BS#2

5 DDR_CS2_DIMMA#
5 DDR_A_BS#2

DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
DDR_A_MA10
DDR_A_BS#0
DDR_A_WE#

5 DDR_A_BS#0
5 DDR_A_WE#

DDR_A_CAS#
DDR_CS1_DIMMA#

5 DDR_A_CAS#
5 DDR_CS1_DIMMA#

DDR_A_ODT1

5 DDR_A_ODT1

DDR_A_D32
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D35

DDR_A_D45
DDR_A_D41
DDR_A_DM5
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
DDR_A_DM7
DDR_A_D58
DDR_A_D59
A

9,13,17,24,29 SMB_CK_DAT0
9,13,17,24,29 SMB_CK_CLK0
+3VS

1
C237
0.1U_0402_16V4Z

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1

PTI_A5652D-A0G16-P

DDR_A_D[0..63]

DDR_A_DM[0..7]
DDR_A_DM0
DDR_A_DQS[0..7]
DDR_A_D6
DDR_A_D7

DDR_A_MA[0..15]
DDR_A_DQS#[0..7]

DDR_A_D12
DDR_A_D13

DDR_A_DM[0..7]

DDR_A_DQS[0..7]

DDR_A_MA[0..15]

DDR_A_DQS#[0..7]

B: Swap.

DDR_CS2_DIMMA#
DDR_CKE0_DIMMA
DDR_A_MA12
DDR_A_BS#2

DDR_A_DM1
DDR_A_CLK1 5
DDR_A_CLK#1 5
DDR_A_D14
DDR_A_D15

+DIMM_VREF
DVT: Change to SE074102K80

DDR_A_D20
DDR_A_D21

2
DDR_A_DM2
DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29

DDR_A_MA0
DDR_A_MA2
DDR_A_RAS#
DDR_A_BS#1

+1.8V

R148
1K_0402_1%

R132
1K_0402_1%

DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
DDR_CKE1_DIMMA

B: Swap.

DDR_A_MA9
DDR_A_MA8
DDR_A_MA5

DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0

DDR_A_ODT0
DDR_A_MA13

1
2
3
4

47_0804_8P4R_5%
RP4
8
1
7
2
6
3
5
4
47_0804_8P4R_5%
RP7
8
1
7
2
6
3
5
4
47_0804_8P4R_5%
RP3
8
1
7
2
6
3
5
4

1
C238
1
C204

2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

1
C290
1
C655

2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

1
C274
1
C654

2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

1
C196
1
C244

2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

47_0804_8P4R_5%
RP21
8
1
7
2
6
3
5
4

1
C254
1
C199

2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

DDR_A_WE#
DDR_A_CAS#
DDR_CS1_DIMMA#
DDR_A_ODT1

47_0804_8P4R_5%
RP20
8
1
7
2
6
3
5
4

1
C232
1
C213

2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

DDR_CS0_DIMMA#
DDR_A_ODT0
DDR_A_MA13
DDR_CS3_DIMMA#

47_0804_8P4R_5%
RP5
8
1
7
2
6
3
5
4

1
C185
1
C218

2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

47_0804_8P4R_5%
RP8
8
1
7
2
6
3
5
4

1
C293
1
C258

2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

DDR_CKE1_DIMMA
DDR_A_MA14
DDR_A_MA15

DDR_A_BS#1
DDR_A_RAS#
DDR_CS0_DIMMA#

8
7
6
5

DDR_A_MA3
DDR_A_MA1
DDR_A_MA10
DDR_A_BS#0

DDR_CKE1_DIMMA 5

DDR_A_MA15
DDR_A_MA14

DDR_A_BS#1 5
DDR_A_RAS# 5
DDR_CS0_DIMMA# 5

47_0804_8P4R_5%

DDR_A_ODT0 5

DDR_CS3_DIMMA#

DDR_CS3_DIMMA# 5

DDR_A_D36
DDR_A_D37
DDR_A_DM4
DDR_A_D38
DDR_A_D39
B

DDR_A_D44
DDR_A_D40
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_CLK2 5
DDR_A_CLK#2 5
DDR_A_DM6
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
R121 2
R123 2

DIMM0 RVS H:5.2mm (BOT)

1 0_0402_5%
1 0_0402_5%

Compal Electronics, Inc.

Compal Secret Data

Security Classification

DDR_A_MA7
DDR_A_MA11
DDR_A_MA4
DDR_A_MA6

DDR_A_D[0..63]

DDR_A_D4
DDR_A_D5

DDR_A_D8
DDR_A_D9

+1.8V

RP6

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS

DDR_A_D2
DDR_A_D3

VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS

+0.9V

DDR_A_DQS#0
DDR_A_DQS0

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

+1.8V

C249
0.1U_0402_16V4Z

DDR_A_D0
DDR_A_D1

+DIMM_VREF JP31

C243
1000P_0402_50V7K

+1.8V

2007/3/8

Issued Date

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC MB A3831
Rev
D

401498

Date:

Thursday, November 25, 2010

Sheet
1

of

46

+DIMM_VREF

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

C203
1000P_0402_50V7K

DDR_B_D0
DDR_B_D1

DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9

DVT: Change to SE074102K80

DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11

VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS

RP23
DDR_B_D[0..63]

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

+1.8V

+0.9V

+1.8V

JP33

+1.8V

DDR_B_D4
DDR_B_D5

DDR_B_DM[0..7]

DDR_B_DM0

DDR_B_DQS[0..7]

DDR_B_D6
DDR_B_D7

DDR_B_MA[0..15]
DDR_B_DQS#[0..7]

DDR_B_D12
DDR_B_D13

DDR_B_D[0..63]

DDR_B_RAS#
DDR_B_BS#1
DDR_B_MA0
DDR_B_MA2

DDR_B_DM[0..7]

DDR_B_DQS[0..7]

DDR_B_MA[0..15]

DDR_B_DQS#[0..7]

8
7
6
5

1
2
3
4

2
C246
1
C245

1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

2
C261
1
C267

1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

2
C257
1
C268

1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

2
C277
1
C695

1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

2
C222
1
C241

1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

2
C229
1
C273

1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

2
C658
1
C256

1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

2
C215
1
C235

1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

47_0804_8P4R_5%
RP13
DDR_B_MA4
DDR_B_MA6
DDR_B_MA7
DDR_B_MA11

8
7
6
5

DDR_B_DM1

1
2
3
4

47_0804_8P4R_5%
DDR_B_CLK1 5
DDR_B_CLK#1 5

RP10

DDR_B_D14
DDR_B_D15

DDR_CKE0_DIMMB
DDR_CS2_DIMMB#
DDR_B_BS#2

8
7
6
5

1
2
3
4

47_0804_8P4R_5%
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
DDR_B_DM3
DDR_B_D26
DDR_B_D27
C

DDR_CKE0_DIMMB

5 DDR_CKE0_DIMMB

DDR_CS2_DIMMB#
DDR_B_BS#2

5 DDR_CS2_DIMMB#
5 DDR_B_BS#2

DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
DDR_B_MA10
DDR_B_BS#0
DDR_B_WE#

5 DDR_B_BS#0
5 DDR_B_WE#

DDR_B_CAS#
DDR_CS1_DIMMB#

5 DDR_B_CAS#
5 DDR_CS1_DIMMB#

DDR_B_ODT1

5 DDR_B_ODT1

DDR_B_D32
DDR_B_D33
DDR_B_DQS#4
DDR_B_DQS4
B

DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_DM5
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57
DDR_B_DM7
DDR_B_D58
DDR_B_D59

8,13,17,24,29 SMB_CK_DAT0
8,13,17,24,29 SMB_CK_CLK0
+3VS
C207
0.1U_0402_16V4Z

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD

VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1

P-TWO_A5692B-A0G16-P

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_B_D20
DDR_B_D21

RP9
DDR_B_MA9
DDR_B_MA12
DDR_B_MA8
DDR_B_MA5

DDR_B_DM2
DDR_B_D22
DDR_B_D23

1
2
3
4

47_0804_8P4R_5%
RP11

DDR_B_D28
DDR_B_D29

DDR_B_MA3
DDR_B_MA1
DDR_B_MA10
DDR_B_BS#0

DDR_B_DQS#3
DDR_B_DQS3

8
7
6
5

1
2
3
4

47_0804_8P4R_5%
DDR_B_D30
DDR_B_D31
DDR_CKE1_DIMMB

RP12
DDR_B_WE#
DDR_B_CAS#
DDR_B_ODT1
DDR_CS1_DIMMB#

DDR_CKE1_DIMMB 5

DDR_B_MA15
DDR_B_MA14

8
7
6
5

1
2
3
4

47_0804_8P4R_5%
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6

RP22
DDR_CS3_DIMMB#
DDR_B_MA13
DDR_B_ODT0
DDR_CS0_DIMMB#

DDR_B_MA4
DDR_B_MA2
DDR_B_MA0

8
7
6
5

1
2
3
4

47_0804_8P4R_5%
DDR_B_BS#1
DDR_B_RAS#
DDR_CS0_DIMMB#
DDR_B_ODT0
DDR_B_MA13
DDR_CS3_DIMMB#

DDR_B_BS#1 5
DDR_B_RAS# 5
DDR_CS0_DIMMB# 5

RP14
DDR_B_MA14
DDR_B_MA15
DDR_CKE1_DIMMB

DDR_B_ODT0 5

8
7
6
5

1
2
3
4

47_0804_8P4R_5%

DDR_CS3_DIMMB# 5

DDR_B_D36
DDR_B_D37
DDR_B_DM4
DDR_B_D38
DDR_B_D39

DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_CLK2 5
DDR_B_CLK#2 5
DDR_B_DM6
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
R423 1
2
R427

DIMM1 RVS H:9.2mm (BOT)

+3VS

2 4.7K_0402_5%
1
0_0402_5%

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/3/8

Issued Date

8
7
6
5

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC MB A3831
Rev
D

401498

Date:

Thursday, November 25, 2010

Sheet
1

of

46

15 PCIE_GTX_C_MRX_P[0..15]
15 PCIE_GTX_C_MRX_N[0..15]

PCIE_GTX_C_MRX_P[0..15]

PCIE_MTX_C_GRX_P[0..15]

PCIE_GTX_C_MRX_N[0..15]

PCIE_MTX_C_GRX_N[0..15]

PCIE_MTX_C_GRX_P[0..15] 15
PCIE_MTX_C_GRX_N[0..15] 15

U5B

25 PCIE_MRX_C_LANTX_P2
25 PCIE_MRX_C_LANTX_N2
24 PCIE_MRX_C_WLANTX_P3
24 PCIE_MRX_C_WLANTX_N3
16
16

SB_RX2P
SB_RX2N

GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N

Y7
AA7

GPP_RX2P
GPP_RX2N

PART 2 OF 5

AB9
AA9

GPP_RX3P
GPP_RX3N

W11
W12

GPP_RX0P(SB_RX2P)
GPP_RX0N(SB_RX2N)

PCIE I/F GPP

GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N

J1
H2
K2
K1
K3
L3
L1
L2
N2
N1
P2
P1
P3
R3
R1
R2
T2
U1
V2
V1
V3
W3
W1
W2
Y2
AA1
AA2
AB2
AB1
AC1
AE3
AE4

PCIE_MTX_GRX_P15
PCIE_MTX_GRX_N15
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_N0

C97

C95

C91

C89

C84

C82

C80

C78

C76

C73

C71

C64

C60

C56

C45

GPP_TX2P
GPP_TX2N

AD4 PCIE_MTX_LANRX_P2
AE5 PCIE_MTX_LANRX_N2

C53
C52

GPP_TX3P
GPP_TX3N

AD5 PCIE_MTX_WLANRX_P3
AD6 PCIE_MTX_WLANRX_N3

C44
C43

GPP_TX0P(SB_TX2P)
GPP_TX0N(SB_TX2N)

AD8
AE8

SB_TX2P_C
SB_TX2N_C

C48
C49

C99 1
2VGA@ 0.1U_0402_16V7K
C98 1
2VGA@ 0.1U_0402_16V7K
C96 1
VGA@
0.1U_0402_16V7K
2
C94 1
2VGA@ 0.1U_0402_16V7K
C90 1
VGA@
0.1U_0402_16V7K
2
C88 1
2VGA@ 0.1U_0402_16V7K
C83 1
VGA@
0.1U_0402_16V7K
2
C81 1
2VGA@ 0.1U_0402_16V7K
C79 1
2VGA@ 0.1U_0402_16V7K
C77 1
2VGA@ 0.1U_0402_16V7K
C74 1
2VGA@ 0.1U_0402_16V7K
C72 1
2VGA@ 0.1U_0402_16V7K
C68 1
2VGA@ 0.1U_0402_16V7K
C63 1
2VGA@ 0.1U_0402_16V7K
C59 1
2VGA@ 0.1U_0402_16V7K
C46 1
2VGA@ 0.1U_0402_16V7K

C100 1

1
1

2
1

1
1

2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K

0.1U_0402_16V7K
2 0.1U_0402_16V7K

PCIE_MTX_C_LANRX_P2 25
PCIE_MTX_C_LANRX_N2 25

2 WLAN@ 0.1U_0402_16V7K
2 WLAN@ 0.1U_0402_16V7K

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0

PCIE_MTX_C_WLANRX_P3 24
PCIE_MTX_C_WLANRX_N3 24

SB_TX2P 16
SB_TX2N 16
4 H_CADOP[0..15]

16
16

SB_RX3P
SB_RX3N

AA11
AB11

16
16

SB_RX0P
SB_RX0N

W14
W15

SB_RX0P
SB_RX0N

16
16

SB_RX1P
SB_RX1N

AB12
AA12

SB_RX1P
SB_RX1N

AA14
AB14

GPP_RX1P(SB_RX3P)
GPP_RX1N(SB_RX3N)

PCIE I/F SB

PCE_ISET(NC)
PCE_TXISET(NC)

AD7
AE7

SB_TX3P_C
SB_TX3N_C

SB_TX0P
SB_TX0N

AE9
AD10

SB_TX0P_C
SB_TX0N_C

SB_TX1P
SB_TX1N

AC8
AD9

SB_TX1P_C
SB_TX1N_C

GPP_TX1P(SB_TX3P)
GPP_TX1N(SB_TX3N)

PCE_PCAL(PCE_CALRP)
PCE_NCAL(PCE_CALRN)

AD11
AE11

R22
R23

C51
C50

4 H_CADON[0..15]

1
1

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

SB_TX3P 16
SB_TX3N 16

C40
C39

1
1

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

SB_TX0P 16
SB_TX0N 16

C42
C41

1
1

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

SB_TX1P 16
SB_TX1N 16

1
1

2
2

562_0402_1%
2K_0402_1%

H_CADOP15
H_CADON15
H_CADOP14
H_CADON14
H_CADOP13
H_CADON13
H_CADOP12
H_CADON12
H_CADOP11
H_CADON11
H_CADOP10
H_CADON10
H_CADOP9
H_CADON9
H_CADOP8
H_CADON8

R19
R18
R21
R22
U22
U21
U18
U19
W19
W20
AC21
AB22
AB20
AA20
AA19
Y19

H_CADOP7
H_CADON7
H_CADOP6
H_CADON6
H_CADOP5
H_CADON5
H_CADOP4
H_CADON4
H_CADOP3
H_CADON3
H_CADOP2
H_CADON2
H_CADOP1
H_CADON1
H_CADOP0
H_CADON0

T24
R25
U25
U24
V23
U23
V24
V25
AA25
AA24
AB23
AA23
AB24
AB25
AC24
AC25

HT_RXCAD7P
HT_RXCAD7N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD0P
HT_RXCAD0N

H_CLKOP1
H_CLKON1

W21
W22

HT_RXCLK1P
HT_RXCLK1N

H_CLKOP0
H_CLKON0

Y24
W25

+VDDA12_PKG2

4
4
4
4
A

+VDDHT_PKG

H_CADIP[0..15]
H_CADIN[0..15]

H_CADIP[0..15]

H_CADIN[0..15]

U5A

VGAR3@
216MQA6AVA11FG_FCBGA465_RS690M

4
4

H_CADOP[0..15]
H_CADON[0..15]

H_CTLOP0
H_CTLON0
R46
R40

1
1

H_CTLOP0
H_CTLON0

2 49.9_0402_1%
2 49.9_0402_1%

P24
P25
A24
C24

HT_RXCAD15P
HT_RXCAD15N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD8P
HT_RXCAD8N

HT_RXCLK0P
HT_RXCLK0N
HT_RXCTLP
HT_RXCTLN
HT_RXCALP
HT_RXCALN

PART 1 OF 5

HYPER TRANSPORT I/F

G5
G4
J8
J7
J4
J5
L8
L7
L4
L5
M8
M7
M4
M5
P8
P7
P4
P5
R4
R5
R7
R8
U4
U5
W4
W5
Y4
Y5
V9
W9
AB7
AB6

PCIE GFX I/F

PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N15
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_N0

HT_TXCAD15P
HT_TXCAD15N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD8P
HT_TXCAD8N

P21
P22
P18
P19
M22
M21
M18
M19
L18
L19
G22
G21
J20
J21
F21
F22

H_CADIP15
H_CADIN15
H_CADIP14
H_CADIN14
H_CADIP13
H_CADIN13
H_CADIP12
H_CADIN12
H_CADIP11
H_CADIN11
H_CADIP10
H_CADIN10
H_CADIP9
H_CADIN9
H_CADIP8
H_CADIN8

HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD0P
HT_TXCAD0N

N24
N25
L25
M24
K25
K24
J23
K23
G25
H24
F25
F24
E23
F23
E24
E25

H_CADIP7
H_CADIN7
H_CADIP6
H_CADIN6
H_CADIP5
H_CADIN5
H_CADIP4
H_CADIN4
H_CADIP3
H_CADIN3
H_CADIP2
H_CADIN2
H_CADIP1
H_CADIN1
H_CADIP0
H_CADIN0

HT_TXCLK1P
HT_TXCLK1N

L21
L22

H_CLKIP1 4
H_CLKIN1 4

HT_TXCLK0P
HT_TXCLK0N

J24
J25

H_CLKIP0 4
H_CLKIN0 4

HT_TXCTLP
HT_TXCTLN

N23 H_CTLIP0
P23 H_CTLIN0

HT_TXCALP
HT_TXCALN

C25 R39
D24

H_CTLIP0 4
H_CTLIN0 4

2 100_0402_1%

VGAR3@
216MQA6AVA11FG_FCBGA465_RS690M

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/3/8

Issued Date

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC MB A3831
Rev
D

401498

Date:

Thursday, November 25, 2010

Sheet
1

10

of

46

+1.8VS

L11
+AVDD
1
2
FBM-L11-201209-300LMA30T_0805
1
C108
0.1U_0402_16V4Z

14 UMA_CRT_R
14 UMA_CRT_G
14 UMA_CRT_B
14 UMA_CRT_VSYNC
14 UMA_CRT_HSYNC

C522
1U_0402_6.3V4Z

GND to B10

R58
+3VS

+1.8VS

14 UMA_CRT_SCL
14 UMA_CRT_SDA

UMA_CRT_SCL
1
4.7K_0402_5% UMA@
UMA_CRT_SDA
1
4.7K_0402_5% UMA@

2
R68
2
R61

C514
@ 10U_0805_10V4Z

HTPVDD=200mA

HTPVDD
HTPVSS

16 ALLOW_LDTSTOP

C10
C11
C5
B5

SYSRESET#
POWERGOOD
LDTSTOP#
ALLOW_LDTSTOP

R45 2
HTREFCLK

1 10K_0402_5% C23
B23

HTTSTCLK
HTREFCLK

1 10K_0402_5%

TVCLKIN

13

R65
13

C117
2.2U_0603_6.3V4Z

PLLVDD12=70mA
C110
1U_0402_6.3V4Z

R298
R301
R59
R67
R60
R66

+3VS

R70

UMA_LCD_CLK
1
UMA@ 4.7K_0402_5%
UMA_LCD_DAT
1
UMA@ 4.7K_0402_5%

GFX_PCIE
GFX_PCIE#

F2
E1

GFX_CLKP
GFX_CLKN

13
13

SBLINKCLK
SBLINKCLK#

G1
G2

SB_CLKP
SB_CLKN

D6
D7
C8
C7
B8
A8

DFT_GPIO0
DFT_GPIO1
DFT_GPIO2
DFT_GPIO3
DFT_GPIO4
DFT_GPIO5

1
1
1
1
1
1

R71
R72

@ 3K_0402_5%
@ 3K_0402_5%
@ 3K_0402_5%
@ 3K_0402_5%
@ 3K_0402_5%
@ 3K_0402_5%

DFT_GPIO0
DFT_GPIO1
DFT_GPIO2
DFT_GPIO3
DFT_GPIO4
DFT_GPIO5
UMA_LCD_CLK
UMA_LCD_DAT

1 @ 4.7K_0402_5%
2 4.7K_0402_5%
NB_STRAP_DATA

2
1

NB_STRAP_DATA
2
10K_0402_5%
2
@ 10K_0402_5%

B2
A2
B4
AA15
AB15
C14
B3
C3
A3

2 1

BMREQ#
I2C_CLK
I2C_DATA
THERMALDIODE_P
THERMALDIODE_N

D14
E14

+LPVDD

LVDDR18D_1
LVDDR18D_2
LVDDR18A_1(LVDDR33_1)
LVDDR18A_2(LVDDR33_2)

A12
B12
C12
C13

+LVDDR18D

LVSSR1
LVSSR3
LVSSR5
LVSSR6
LVSSR7
LVSSR8

A16
A14
D12
C19
C15
C16

LVSSR12
LVSSR13

F14
F15

15
15
15
15
15
15

LVDS_DIGON
LVDS_BLON
LVDS_BLEN
DVO_D0(GPP_TX0P)
DVO_D1(GPP_TX0N)
DVO_D2(DEBUG6)
DVO_D3(GPP_RX0P)
DVO_D4(GPP_RX0N)
DVO_D5(DEBUG9)
DVO_D6(DEBUG10)
DVO_D7(GPP_TX1N)
DVO_D8(GPP_TX1P)
DVO_D9(GPP_RX1N)
DVO_D10(GPP_RX1P)
DVO_D11(DEBUG15)
DVO_VSYNC(DEBUG0)
DVO_DE(DEBUG2)
DVO_HSYNC(DEBUG1)
DVO_IDCKP(DEBUG14)
DVO_IDCKN(DEBUG13)

+1.8VS

MBC1608121YZF_0603

L54
+LVDDR33A

LVDDR33=180mA

C505
0.1U_0402_16V4Z

UMA_TXCLK+ 15
UMA_TXCLK- 15
UMA_TZCLK+ 15
UMA_TZCLK- 15

+3VS

C537
4.7U_0805_10V4Z

GND to C15

+3VS C499
0.1U_0402_16V4Z

+LVDDR33A
R1218
2K_0402_5%
LVDS_ENBKL

NB_PWRGD

LVDS_ENVDD

U20A

+3VS

E12
G12
F12

GND to A14, D12

TMDS_HPD
DDC_DATA
TESTMODE
STRP_DATA

DFT_GPIO0

+3VS

Q12

LPVDD
LPVSS

UMA_TZOUT0+
UMA_TZOUT0UMA_TZOUT1+
UMA_TZOUT1UMA_TZOUT2+
UMA_TZOUT2-

C116
2.2U_0603_6.3V4Z

UMA_ENBKL 31

SN74LVC08APW_TSSOP14

U20B

O
B

UMA_ENVDD 15

SN74LVC08APW_TSSOP14

R1219
2K_0402_5%

LVDS_ENVDD
LVDS_ENBKL

1
2
AD14 PCIE_MTX_DVDRX_P0 C409
1
2
AD15 PCIE_MTX_DVDRX_N0 C414
AE15
AD16
PCIE_MRX_C_DVDTX_P0
AE16
PCIE_MRX_C_DVDTX_N0
AC17
AD18
C62
1
AE19 PCIE_MTX_NEWRX_N1
C61
1
AD19 PCIE_MTX_NEWRX_P1
AE20
PCIE_MRX_C_NEWTX_N1
AD20
PCIE_MRX_C_NEWTX_P1
AE21

DVD@
DVD@

0.1U_0402_16V7K
0.1U_0402_16V7K

PCIE_MTX_C_DVDRX_P0 24
PCIE_MTX_C_DVDRX_N0 24

24
24

2 NEW@
2 NEW@
29
29

0.1U_0402_16V7K
0.1U_0402_16V7K

PCIE_MTX_C_NEWRX_N1 29
PCIE_MTX_C_NEWRX_P1 29

AD13
AC13
AE13
AE17
AD17

VGAR3@
216MQA6AVA11FG_FCBGA465_RS690M

+1.8VS

POWER PLAY HI: 1.2V


LOW: 1.0V
Won't Support in IALAA

3
1
MMBT3904_SOT23-3

PULL HIGH
(internally
pulled high)

RS690
DFT_GPIO1

Memory
side port
not available

Bypass the loading


of EEPROM straps
and use Hardware
default values

DEFAULT
NB_LDTSTOP#

DEFAULT

6,16 LDT_STOP#

OSCIN
OSCOUT(PLLVDD12)

13
13

2
2
2
2
2
2

+3VS

C2
B11
A11

NB_REFCLK
+PLLVDD12

R63

NB_PWRGD
NB_LDTSTOP#

16
BMREQ#
15 UMA_LCD_CLK
15 UMA_LCD_DAT

C:Set to UMA@
2
R64
2
R62

DACSCL
DACSDA
PLLVDD(PLLVDD18)
PLLVSS

+PLLVDD12

B6
A6

B24
B25

L15

1
2
MBC1608121YZF_0603

UMA_CRT_SCL
UMA_CRT_SDA

TXCLK_LP
TXCLK_LN
TXCLK_UP
TXCLK_UN

E15
D15
H15
G15

RSET

+NB_HTPVDD

GND to B25
+1.2V_HT

B21

A10
B10

15,17,24,25,29,31,35 NB_RST#
31 NB_PWRGD

C520
1U_0402_6.3V4Z

2 715_0402_1%

RED
GREEN
BLUE
DACVSYNC
DACHSYNC

+NB_PLLVDD

+NB_HTPVDD

L52
1
2
MBC1608121YZF_0603

A15
B16
C17
C18
B17
A17
A18
B18

C109
0.1U_0402_16V4Z

14

TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N

1
1

PLLVDD18=625mA

C
Y
COMP

L14
+LVDDR18D

AVDDQ
AVSSQ

GND to E14

15
15
15
15
15
15

C114
2.2U_0603_6.3V4Z

UMA_TV_CRMA C21
UMA_TV_LUMA C20
2 UMA_TV_COMPS D19
@ 75_0402_1%
UMA_CRT_R
E19
UMA_CRT_G
F19
UMA_CRT_B
G19
C6
A5

14 UMA_TV_CRMA
14 UMA_TV_LUMA
1
R300

L13

1
2
MBK2012221YZF 0805 1

+AVDDQ

UMA_TXOUT0+
UMA_TXOUT0UMA_TXOUT1+
UMA_TXOUT1UMA_TXOUT2+
UMA_TXOUT2-

14

+NB_PLLVDD

B14
B15
B13
A13
H14
G14
D17
E17

+1.8VS

A21
A22

TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N

GND to A22

+1.8VS

PART 3 OF 5

C523
1U_0402_6.3V4Z

AVDD1
AVDD2
AVSSN1
AVSSN2
AVDDDI
AVSSDI

MBC1608121YZF_0603

B22
C22
G17
H17
A20
B20

AVDDQ=200mA

C113
2.2U_0603_6.3V4Z

+1.8VS

C513
2.2U_0603_6.3V4Z

U5C

R79
10K_0402_5%

L12
1
2
MBC1608121YZF_0603

1
2UMA_TV_CRMA
R317UMA@ 150_0402_1%
1
2UMA_TV_LUMA
R316UMA@ 150_0402_1%
1
2 UMA_CRT_R
R299
UMA@ 150_0402_1%
1
2 UMA_CRT_G
R297
UMA@ 150_0402_1%
1
2 UMA_CRT_B
R295
UMA@ 150_0402_1%

C115
2.2U_0603_6.3V4Z

LVTM

+AVDDQ

C504
0.1U_0402_16V4Z

CRT/TVOUT

+1.8VS

PLL PWR

GND to B20

PM

L50
1
2
1 MBC1608121YZF_0603

+LPVDD

AVDD=100mA

CLOCKs

C519
2.2U_0603_6.3V4Z

MIS.
DVO

+3VS

AVDDI=250mA

R69
10K_0402_5%
2
1

1
C515
0.1U_0402_16V4Z

C: Change R69 to 10K for AMD recommand

PULL
LOW

Memory
side port
available

RS690 only

2007/3/8

Deciphered Date

DFT_GPIO5

These pin straps are used to configure PCI-E GPP mode:


111: register defined (register default to Config E)
110: 4-0-0-0-0 Config A
101: 4-4 Config B
100: 4-2-2 Config C
011: 4-2-1-1 Config D
010: 4-1-1-1-1 Config E
others: register defined (register default to Config E)

DEFAULT

Enable debug bus via the memory


IO pads, if available in the package
DEFAULT

use default values

use the memory data bus


to output the debug bus

Compal Electronics, Inc.

Compal Secret Data

Security Classification
Issued Date

I2C Master can


load strap values
from EEPROM if
connected, or use
default values if
not connected

DFT_GPIO[4:2]

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC MB A3831
Rev
D

401498

Date:

Thursday, November 25, 2010

Sheet

11

of

46

+1.2V_HT

1
@ 330U_D2E_2.5VM
L43

C54
10U_0805_10V4Z

C430

D22
M1
AC11

+VDDHT_PKG
+VDDA12_PKG1
+VDDA12_PKG2

VDDHT_PKG
VDDA12_PKG1
VDDA12_PKG2

C530

1
1U_0402_6.3V4Z
1
1U_0402_6.3V4Z
1
1U_0402_6.3V4Z

C529

10U_0805_10V4Z

10U_0805_10V4Z

C446

C502

C433

C474

+1.8VS

VDDA12(VDDPLL_1)
VDDA12(VDDPLL_2)
VSSA12(VSSPLL_1)
VSSA12(VSSPLL_2)

0.1U_0402_16V4Z

E7
F7
F9
G9

L49
1
2
MBC1608121YZF_0603
C516
4.7U_0805_10V4Z

+NB_VDDPLL

VDDPLL=50mA
C501
1U_0402_6.3V4Z

GND to F9, G9.

1
+

ATi Recommend

VGAR3@
216MQA6AVA11FG_FCBGA465_RS690M
+1.2V_HT

C787

+NB_VDDPLL

VDD_DVO1(VDDR_1)
VDD_DVO2(VDDR_2)
VDD_DVO3(VDDR_3)

330U_D2E_2.5VM

2
2.2U_0603_6.3V4Z
1
0.1U_0402_16V4Z

+NB_VDDC

VDD_CORE=5A

C424

C498

VDDR3_1
VDDR3_2

AC12
AD12
AE12

L41 1
2
FBMA-L11-201209-221LMA30T_0805
L44 1
2
FBMA-L11-201209-221LMA30T_0805

+1.2V_HT

330U_D2E_2.5VM

C511

D11
E11

VDDR3=70mA

1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z

C479

+3VS

VDDA18_1(VDDA12_13)
VDDA18_2(VDDA12_14)
VDDA18_3(VDDA12_15)
VDDA18_4(VDDA12_16)
VDDA18_5(VDDA12_17)
VDDA18_6(VDDA12_18)
VDDA18_7(VDDA12_19)
VDDA18_8(VDDA12_20)

2
2
2
2
2
2

0.1U_0402_16V4Z

2
2
2
2

+VDDA12

A4
A7
A9
A19
B9
B19
C9
D9
D20
G20
H11
J11
J19
L11
L13
L15
L17
M12
M14
N11
N13
N15
P12
P14
P17
R11
R13
R15
U11
U12
U14
U15

1
1
1
1
1
1

C471

1
1
1
1

+VDDA12

VDDA_12=2.5A

10U_0805_10V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z

C500
C441
C453
C512
C506
C463

0.1U_0402_16V4Z

C448
C493
C470
C490
C486

VDD18_1
VDD18_2

AB3
AB4
AC3
AD2
AE1
AE2
U7
W7

10U_0805_10V4Z

C485

+1.2V_HT

J14
J15

VDD_18=2mA

C521

0.1U_0402_16V4Z

L45
2
1
FBMA-L11-201209-221LMA30T_0805

VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDC_28
VDDC_29
VDDC_30
VDDC_31
VDDC_32

10U_0805_10V4Z

C483

2 1U_0402_6.3V4Z
2 1U_0402_6.3V4Z

10U_0805_10V4Z

C58

0.1U_0402_16V4Z

1
1

C447

C480

C492
C489

VDDA12_1
VDDA12_2
VDDA12_3
VDDA12_4
VDDA12_5
VDDA12_6
VDDA12_7
VDDA12_8
VDDA12_9
VDDA12_10
VDDA12_11
VDDA12_12

0.1U_0402_16V4Z

+1.8VS

VDD_HT2
VDD_HT3
VDD_HT4
VDD_HT5
VDD_HT6
VDD_HT7
VDD_HT8
VDD_HT9
VDD_HT10
VDD_HT11
VDD_HT12
VDD_HT13
VDD_HT14
VDD_HT15

C491

1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z

2
2
2
2
2

0.1U_0402_16V4Z

1
1
1
1
1

+VDDA12

C510

C442
C456
C465
C445
C432

B1
C1
D1
D2
D3
E2
E3
F4
E6
G7
L9
M9

0.1U_0402_16V4Z

VDD_HT(I/O only)=800mA

VDD_HT1 PART 4 OF 5

0.1U_0402_16V4Z

AA17
AB17
AB19
AC18
AC19
AC20
AD21
AD22
AD23
AD24
AE23
AE24
AE25
W17
Y17

1
2
+1.2V_HT
FBMA-L11-201209-221LMA30T_0805

VDDA_12=2.5A

U5D
10U_0805_10V4Z

POWER

C55

+VDDA12_PKG1

C484
4.7U_0805_10V4Z

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23

L24
P13
P20
P15
R12
R14
R20
W23
Y25
AD25
U20
H25
W24
Y22
AC23
D25
G24
AC14

VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42

AC22
R23
C4
AE22
T23
T25
AE14
R17
H23
M17
A23
AC15
F17
D4

VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57

M13
AC16
H12
B7

VSS59
VSS60
VSS61
VSS62

PAR 5 OF 5

GROUND

C57

U5E

A25
F11
D23
E9
G11
Y23
P11
R24
AE18
M15
J22
G23
J12
L12
L14
L20
L23
M11
M20
M23
M25
N12
N14

VSSA2
VSSA3
VSSA4
VSSA5
VSSA6
VSSA7
VSSA8
VSSA9
VSSA10
VSSA11

V12
V11
V14
F3
V15
A1
H1
G3
J2
H3

VSSA13

J6

VSSA15
VSSA16
VSSA17
VSSA18
VSSA19
VSSA20
VSSA21
VSSA22

F1
L6
M2
M6
J3
P6
T1
N3

VSSA24
VSSA25
VSSA26
VSSA27
VSSA28

R6
U2
T3
U3
U6

VSSA30

Y1

VSSA32
VSSA33
VSSA34
VSSA35
VSSA36
VSSA93
VSSA94
VSSA95
VSSA37
VSSA38
VSSA39
VSSA40
VSSA41
VSSA42
VSSA43
VSSA44
VSSA45
VSSA46
VSSA47
VSSA48
VSSA49
VSSA50
VSSA51

W6
AC2
Y3
Y9
Y11
Y12
Y14
AA3
R9
AD1
AC5
AC6
AC7
AD3
AC9
AC10
G6
Y15
AC4
P9
AE6
AE10
M3

VGAR3@
216MQA6AVA11FG_FCBGA465_RS690M

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/3/8

Issued Date

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC MB A3831
Rev
D

401498

Date:

Thursday, November 25, 2010

Sheet
1

12

of

46

0.1U_0402_16V4Z

L56

C590

C595

C593

C170

C636

0.1U_0402_16V4Z

+3VS

VDDA=50mA

0.1U_0402_16V4Z 0.1U_0402_16V4Z

C167

C594

1
C171

+3VS_CLK_VDDA
1

0.1U_0402_16V4Z 0.1U_0402_16V4Z

C596
0.1U_0402_16V4Z

2
1

CPUCLK0_H 6
U25

1
2
MBC1608121YZF_0603

+3VS_CLK_VDDREF

1
C599
2.2U_0603_6.3V4Z

+3VS_CLK_VDD48
C597
0.1U_0402_16V4Z

+3VS_CLK_VDDREF

VDD_REF=50mA

Y3

X1

X2

CLK_RESET

1
31 CLK_RESET_R

GNDCPU
GNDSRC
GNDSRC
GNDSRC
GNDSRC
GND48
GNDATIG
GNDREF
GNDHTT

XTALIN_CLK

8,9,17,24,29 SMB_CK_CLK0
8,9,17,24,29 SMB_CK_DAT0

1
R378
1
R1220

53
15
22
29
45
8
38
1
58

XTALOUT_CLK

1
2
14.31818MHZ_20P_6X1430004201
C631
33P_0402_50V8J
+3VS_CLK

VDDCPU
VDDSRC
VDDSRC
VDDSRC
VDDSRC
VDD48
VDDATIG
VDDREF
VDDHTT

R390
@ 1M_0402_5%

C603
33P_0402_50V8J
1
2

54
14
23
28
44
5
39
2
60

2 CLK_RESET
10K_0402_5%
2
@ 0_0402_5%

1
R394

CLKIREF
2
475_0402_1%

11
61

RESET_IN#
NC

9
10

SMBCLK
SMBDAT

48

IREF

PLACE CLOSE TO U62


WITHIN 0.5 INCH

R101
261_0402_1%

VDDA
GNDA

50
49

CPUCLK8T0
CPUCLK8C0
CPUCLK8T1
CPUCLK8C1

56
55
52
51

CPUCLK0
CPUCLK0#

SRCCLKT6
SRCCLKC6
ATIGCLKT0
ATIGCLKC0
ATIGCLKT1
ATIGCLKC1
ATIGCLKT2
ATIGCLKC2
ATIGCLKT3
ATIGCLKC3
SRCCLKT5
SRCCLKC5
SRCCLKT4
SRCCLKC4
SRCCLKT3
SRCCLKC3
SRCCLKT2
SRCCLKC2
SRCCLKT0
SRCCLKC0
SRCCLKT1
SRCCLKC1
SRCCLKT7
SRCCLKC7

16
17
41
40
37
36
35
34
30
31
18
19
20
21
24
25
26
27
47
46
43
42
12
13

SBLINKCLK_R
SBLINKCLK#_R
GFX_PCIE_R
GFX_PCIE_R#

CLKREQA#
CLKREQB#
CLKREQC#

57
32
33

CLKREQ_WLAN#
CLKREQ_DVD#
CLKREQ_NEW#

48MHz_1
48MHz_0

7
6

CLK_CB
CLK_USB

R369
R379

1
1

2 33_0402_5%
2 33_0402_5%

FS1/REF1
FS0/REF0
FS2/REF2
HTTCLK0

63
64
62
59

FS1
FS0
FS2
CLK_HTREFCLK

R95
R94
R96
R97

1
1
2
1

2
2
1
2

R99 1
R100 1

+3VS_CLK
L58
+3VS

1
2
MBC1608121YZF_0603

C588
2.2U_0603_6.3V4Z

L17

2
2
@ 10U_0805_10V4Z

10U_0805_10V4Z

+3VS_CLK_VDD48

0.1U_0402_16V4Z

C179
10U_0805_10V4Z

C592

VDD_48=50mA
1
2
MBC1608121YZF_0603

+3VS_CLK

1
2
CHB2012U121_0805

+3VS

+3VS_CLK

VDD=500mA

to link "SM010007E00"
L57

C169
@10U_0805_10V4Z

+3VSNeed

C168
0.1U_0402_16V4Z

2 47.5_0402_1%
2 47.5_0402_1%

CPUCLK0_L 6
SBLINKCLK

R366
R365
R397
R396

1
1
1
1

2
2
2
2

33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%

SBLINKCLK
SBLINKCLK#
GFX_PCIE
GFX_PCIE#

SBLINKCLK 11
SBLINKCLK# 11
GFX_PCIE 11
GFX_PCIE# 11

SBLINKCLK#
GFX_PCIE
GFX_PCIE#

1
R356
1
R355
1
R92
1
R93

2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%

SBSRCCLK
SBSRCCLK_R
R360
SBSRCCLK_R#
R359
CLK_PCIE_VGA_R R373
CLK_PCIE_VGA_R# R372
CLK_DVD_R
CLK_DVD_R#
CLK_NEW_R
CLK_NEW_R#
CLK_PCIE_LAN_R
CLK_PCIE_LAN_R#
CLK_WLAN_R
CLK_WLAN_R#

1
1
1
1

R377
R376
R404
R403
R402
R401
R368
R367

2
2
2
2

33_0402_5%
33_0402_5%
VGA@ 33_0402_5%
VGA@ 33_0402_5%

1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2

SBSRCCLK
SBSRCCLK#
CLK_PCIE_VGA
CLK_PCIE_VGA#

DVD@ 33_0402_5% CLK_DVD


DVD@ 33_0402_5% CLK_DVD#
NEW@33_0402_5%
CLK_NEW
NEW@33_0402_5%
CLK_NEW#
33_0402_5%
CLK_PCIE_LAN
33_0402_5%
CLK_PCIE_LAN#
WLAN@ 33_0402_5% CLK_WLAN
WLAN@ 33_0402_5% CLK_WLAN#

SBSRCCLK 16
SBSRCCLK# 16
CLK_PCIE_VGA 15
CLK_PCIE_VGA# 15
CLK_DVD 24
CLK_DVD# 24
CLK_NEW 29
CLK_NEW# 29
CLK_PCIE_LAN 25
CLK_PCIE_LAN# 25
CLK_WLAN 24
CLK_WLAN# 24

CLKREQ_WLAN# 24
CLKREQ_DVD# 24
CLKREQ_NEW# 29

33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%

CLK_48M_CB 22
USBCLK_EXT 17

HTREFCLK

1
R354
1
R353
CLK_PCIE_VGA 1
R352
CLK_PCIE_VGA# 1
R351
CLK_PCIE_LAN
1
R102
CLK_PCIE_LAN#
1
R103
CLK_NEW
1
R407
CLK_NEW#
1
R406
CLK_DVD
1
R371
CLK_DVD#
1
R370
CLK_WLAN
1
R362
CLK_WLAN#
1
R361

2
49.9_0402_1%
2
49.9_0402_1%
2 VGA@
49.9_0402_1%
2 VGA@
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2 NEW@
49.9_0402_1%
2 NEW@
49.9_0402_1%
2 DVD@
49.9_0402_1%
2 DVD@
49.9_0402_1%
2 WLAN@
49.9_0402_1%
2 WLAN@
49.9_0402_1%

SBSRCCLK#

CLK_14M_SIO 35
SB_OSC_INT 17
NB_REFCLK 11
HTREFCLK 11

ICS951462AGLFT_TSSOP64
HTREFCLK

+3VS

CLKREQ_WLAN#

+3VS_CLK

CLKREQ_DVD#

48.00

Reserved

60.00

30.00

48.00

Reserved

100.00

36.56

73.12

48.00

Reserved

100.00

66.66

33.33

48.00

Reserved

133.33

100.00

66.66

33.33

48.00

Reserved

200.00

100.00

66.66

33.33

48.00

Normal ATHLON64 operation

Hi-Z

100.00

100.00

180.00

100.00

220.00

100.00

Reserved

R106
2
1
2.2K_0402_5%

48.00

R110
2
1
2.2K_0402_5%

Hi-Z
X/6

COMMENT

R105
2
1
2.2K_0402_5%

Hi-Z
X/3

SRCCLK HTT
[2:1]

R109
2
1
2.2K_0402_5%

USB

CPU

R104
2
1
2.2K_0402_5%

PCI

FS2 FS1 FS0

R108
2
1
2.2K_0402_5%

EXT CLK FREQUENCY SELECT TABLE(MHZ)

CLKREQ_NEW#

1
R398
1
R386
1
R395

1
R107

2
49.9_0402_1%

2
100K_0402_5%
2
100K_0402_5%
2
100K_0402_5%

FS0
FS1
FS2

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/3/8

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC MB A3831
Rev
D

401498

Date:

Thursday, November 25, 2010


G

Sheet

13

of
H

46

CRT CONNECTOR

11

UMA_CRT_B

R20

NON76@
1
2
L3 FBMA-10-100505-121T_0402

CRT_B_L

CRT_B

R19

R16

C17

C25

NON76@

C37

C21

2
NON76@

C16

JP24

CRT_G_L
CRT_B_L

NON76@

12
11
10
9
8
7
6
5
4
3
2
1

CRT_R_L

C13

NON76@

CRT_HSYNC
CRT_VSYNC
CRT_DDC_DAT
CRT_DDC_CLK

6P_0402_50V8K

VGA_CRT_B

CRT_G_L

CRT Conn.

CRT_R_L

6P_0402_50V8K

15

CRT_G

NON76@
1
2
L4 FBMA-10-100505-121T_0402

6P_0402_50V8K

UMA_CRT_G

NON76@
1
2
L6 FBMA-10-100505-121T_0402

22P_0402_25V8K

11

CRT_R

22P_0402_25V8K

VGA_CRT_G

2
VGA@ 0_0402_5%
2
UMA@ 0_0402_5%
2
VGA@ 0_0402_5%
2
UMA@ 0_0402_5%
2
VGA@ 0_0402_5%
2
UMA@ 0_0402_5%

22P_0402_25V8K

15

1
R1178
1
R1179
1
R1180
1
R1181
1
R1182
1
R1183

2
1
150_0402_1%

UMA_CRT_R

2
1
150_0402_1%

VGA_CRT_R

11

2
1
150_0402_1%

15

+5VS

13
14

NON76@

NON76@
NON76@

NON76@

NON76@

12
11
10
9
8
7
6
5
4
3
2
1

GND1
GND2
ACES_87213-1200G

C:Move pi circuit to daugther board


PreMP: Change BOM sturcture for EMI issue

11 UMA_CRT_HSYNC

2N7002_SOT23-3
3
+3VS

15 VGA_CRT_VSYNC

11 UMA_CRT_SCL

UMA@
Q4
1

CRT_DDC_DAT

2 R1231 1
Q5 0_0402_5% VGA@
1

CRT_DDC_CLK

CRT_VSYNC

UMA@
3

1
2
R1188 VGA@ 0_0402_5%
1
2
R1190 UMA@ 0_0402_5%

15 VGA_DDC_CLK

11 UMA_CRT_VSYNC

1
2
R1189 VGA@ 0_0402_5%
1
2
R1191 UMA@ 0_0402_5%

DVT:For ATi DDC PA request


C: VGA level shift
circuit on VGA/B, remove
extra components

15 VGA_DDC_DATA

15 VGA_CRT_HSYNC

1
2
R1184 UMA@ 0_0402_5%
1
2
R1186 VGA@ 0_0402_5%

11 UMA_CRT_SDA

CRT_HSYNC

1
2
R1185 UMA@ 0_0402_5%
1
2
R1187 VGA@ 0_0402_5%

+3VS

DVT:For ATi DDC PA request


C:BOM structure for UMA/VGA

2N7002_SOT23-3

2 R1232 1
0_0402_5%
VGA@

TV-OUT CONNECTOR

D5
@ DAN217_SC59

D4
@ DAN217_SC59

+3VS

2 C524
@ 22P_0402_50V8J

15 VGA_TV_CRMA
11 UMA_TV_CRMA

1
R288
1
R287

2
VGA@
2
UMA@

1
R290
1
R289

2
VGA@
2
UMA@

0_0402_5%
TV_LUMA
0_0402_5%

L51
TV_CRMA

0_0402_5%

L53

2
MBK1608121YZF_0603

2
MBK1608121YZF_0603
JP26

0_0402_5%

R307
150_0402_1%

R310
150_0402_1%

1
C533
100P_0402_25V8K

2 C528
@ 22P_0402_50V8J

C517
100P_0402_25V8K

11 UMA_TV_LUMA

15 VGA_TV_LUMA

TV_CRMA_L
TV_LUMA_L

4
3
2
1

1
C536

2
100P_0402_25V8K

C535

2
100P_0402_25V8K

4
3
2
1

ALLTO_C10877-104A1-L_4P

6
5

TV-OUT Conn.
1.
2.
3.
4.

Compal Secret Data

Security Classification
2007/3/8

Issued Date

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Y
C
Y
C

ground
ground
(luminance+sync)
(crominance)

Compal Electronics, Inc.


SCHEMATIC MB A3831

Document Number
401498

Thursday, November 25, 2010

Sheet
E

14

Rev
D
of

46

VGA BOARD Conn. (ATi Support Only)

PCEI_GTX_C_MRX_P13
PCEI_GTX_C_MRX_N13
PCEI_GTX_C_MRX_P12
PCEI_GTX_C_MRX_N12
PCEI_GTX_C_MRX_P11
PCEI_GTX_C_MRX_N11
C

PCEI_GTX_C_MRX_P10
PCEI_GTX_C_MRX_N10
PCEI_GTX_C_MRX_P9
PCEI_GTX_C_MRX_N9
PCEI_GTX_C_MRX_P8
PCEI_GTX_C_MRX_N8
PCEI_GTX_C_MRX_P7
PCEI_GTX_C_MRX_N7
PCEI_GTX_C_MRX_P6
PCEI_GTX_C_MRX_N6
PCEI_GTX_C_MRX_P5
PCEI_GTX_C_MRX_N5
PCEI_GTX_C_MRX_P4
PCEI_GTX_C_MRX_N4
PCEI_GTX_C_MRX_P3
PCEI_GTX_C_MRX_N3
PCEI_GTX_C_MRX_P2
PCEI_GTX_C_MRX_N2
PCEI_GTX_C_MRX_P1
PCEI_GTX_C_MRX_N1

PCEI_GTX_C_MRX_P0
PCEI_GTX_C_MRX_N0
20 VGA_HPD
20 VGA_DVI_SCLK
20 VGA_DVI_SDATA
20 VGA_DVI_TXC20 VGA_DVI_TXC+
20 VGA_DVI_TXD020 VGA_DVI_TXD0+
20 VGA_DVI_TXD120 VGA_DVI_TXD1+
20 VGA_DVI_TXD220 VGA_DVI_TXD2+
14 VGA_TV_LUMA
14 VGA_TV_CRMA

31 VGA_ENBKL
29,31,36,39 SUSP#
11,17,24,25,29,31,35 NB_RST#
14 VGA_CRT_VSYNC
14 VGA_CRT_HSYNC
14 VGA_DDC_CLK
14 VGA_DDC_DATA
+HDMI_5V_OUT
14 VGA_CRT_R
14 VGA_CRT_G
14 VGA_CRT_B

VGA_TV_LUMA
VGA_TV_CRMA
VGA_ENVDD
VGA_ENBKL
VGA_CRT_VSYNC
VGA_CRT_HSYNC
VGA_DDC_CLK
VGA_DDC_DATA
VGA_CRT_R
VGA_CRT_G
VGA_CRT_B

3
1

PCIE_GTX_C_MRX_P[0..15] 10

D
Q2

2
G

EC_SMB_CK2 6,31
EC_SMB_DA2 6,31
+3VS

+LCDVDD

C3
0.047U_0402_16V7K

R7
100K_0402_5%

80mil

+5VALW

C2
@ 4.7U_0805_10V4Z

PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14

C1
0.1U_0402_16V4Z

+3VS

PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13

+INV
BKOFF#
2
4.7K_0402_5%

1
R279

PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12

L34

1
2
FBMA-L11-201209-221LMA30T_0805 1

B+

PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11

JP3

PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10
LCD_EDID_DATA
LCD_EDID_CLK

PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9

DAC_BRIG
BKOFF#
INVT_PWM

PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8
+3VS

+LCDVDD_C
+LCDVDD_C

PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5

+INV

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

GND1
GND2

31
32

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

LCD_TZOUT1+
LCD_TXCLK+
LCD_TXCLK-

JP4

LCD_TXOUT1+
LCD_TXOUT1LCD_TXOUT2+
LCD_TXOUT2LCD_TXOUT0+
LCD_TXOUT0-

42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2

LCD_TZCLK+
LCD_TZCLK-

2
+INV

1
+3VS
+LCDVDD

@ ACES_88242-3001

LCD_EDID_DATA
LCD_EDID_CLK

C415
0.1U_0402_16V4Z
31
31
31

DAC_BRIG
BKOFF#
INVT_PWM

DAC_BRIG
BKOFF#
INVT_PWM

1
2
L36 0_0805_5%

+LCDVDD_C

PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3

1
C394
22U_A_4VM

PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2

+
+INV

GND
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2

GND
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1

41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1

1
C389

C390
68P_0402_50V8J

LCD_TXCLK+
LCD_TXCLKLCD_TXOUT1+
LCD_TXOUT1LCD_TXOUT2+
LCD_TXOUT2LCD_TXOUT0+
LCD_TXOUT0-

+INV

ACES_88242-4001
B

PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0

C407

DAC_BRIG
2
68P_0402_50V8J
INVT_PWM
2
68P_0402_50V8J
BKOFF#
2
68P_0402_50V8J
2LCD_EDID_CLK
68P_0402_50V8J
2LCD_EDID_DATA
68P_0402_50V8J

LCD_EDID_CLK R8 1
LCD_EDID_DATA R9 1

2 UMA@ 0_0402_5% UMA_LCD_CLK


2 UMA@ 0_0402_5% UMA_LCD_DAT

LCD_TXCLKLCD_TXCLK+

R255 1
R256 1

2 UMA@
2 UMA@

0_0402_5%
0_0402_5%

LCD_TXOUT0- R257 1
LCD_TXOUT0+ R258 1

2 UMA@
2 UMA@

0_0402_5%
0_0402_5%

LCD_TXOUT1- R259 1
LCD_TXOUT1+ R260 1

2 UMA@
2 UMA@

0_0402_5%
0_0402_5%

LCD_TXCLKLCD_TXCLK+

LCD_TXOUT2- R268 1
LCD_TXOUT2+ R269 1

2 UMA@
2 UMA@

0_0402_5%
0_0402_5%

LCD_TXOUT0LCD_TXOUT0+
LCD_TXOUT1LCD_TXOUT1+
LCD_TXOUT2LCD_TXOUT2+

LCD_TZOUT0- R261 1
LCD_TZOUT0+ R262 1

2 UMA@
2 UMA@

0_0402_5%
0_0402_5%

LCD_TZOUT1- R266 1
LCD_TZOUT1+ R267 1

2 UMA@
2 UMA@

0_0402_5%
0_0402_5%

LCD_TZOUT2- R263 1
LCD_TZOUT2+ R264 1

2 UMA@
2 UMA@

0_0402_5%
0_0402_5%

LCD_TZCLKLCD_TZCLK+

2 UMA@
2 UMA@

0_0402_5%
0_0402_5%

CLK_PCIE_VGA
CLK_PCIE_VGA#

C401

CLK_PCIE_VGA 13
CLK_PCIE_VGA# 13

C413
C9
C7

LCD_TZOUT0LCD_TZOUT0+
LCD_TZOUT1LCD_TZOUT1+
LCD_TZOUT2LCD_TZOUT2+
LCD_TZCLKLCD_TZCLK+

1
1
1
1

EMI

LCD_EDID_DATA
LCD_EDID_CLK

+5VS

DVT:For ATi DDC PA request

R271 1
R270 1

Compal Secret Data

Security Classification
2007/3/8

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

UMA_LCD_CLK 11
UMA_LCD_DAT 11
UMA_TXCLK- 11
UMA_TXCLK+ 11
UMA_TXOUT0- 11
UMA_TXOUT0+ 11
UMA_TXOUT1- 11
UMA_TXOUT1+ 11
UMA_TXOUT2- 11
UMA_TXOUT2+ 11

UMA_TZOUT0- 11
UMA_TZOUT0+ 11
UMA_TZOUT1- 11
UMA_TZOUT1+ 11
UMA_TZOUT2- 11
UMA_TZOUT2+ 11
UMA_TZCLK- 11
UMA_TZCLK+ 11

DVT: Add UMA@

Issued Date

DVT:For ATi DDC PA request

LCD_TZOUT0LCD_TZOUT0+
LCD_TZOUT2LCD_TZOUT2+
LCD_TZOUT1LCD_TZOUT1+

PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1

ACES_88386-1K71

AO3413_SOT23

PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15

PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7

+LCDVDD Width: 80mils

Q3

2N7002_SOT23-3 S

C4

@ 4.7U_0805_10V4Z
2

PCEI_GTX_C_MRX_P[0..15]

R6
100_0402_5%

1 2

PCIE_GTX_C_MRX_N[0..15] 10

1
1

R5
470_0805_5%

PCEI_GTX_C_MRX_N[0..15]

PCIE_MTX_C_GRX_P[0..15] 10

80mil

PCIE_MTX_C_GRX_P[0..15]

AO3413_SOT23

R2
2K_0402_5%

0.1U_0402_25V4K

PCEI_GTX_C_MRX_P14
PCEI_GTX_C_MRX_N14

PCIE_MTX_C_GRX_N[0..15] 10

+3VS
Q1

PCEI_GTX_C_MRX_P15
PCEI_GTX_C_MRX_N15

+LCDVDD
PCIE_MTX_C_GRX_N[0..15]

+1.5VS

ENVDD

+2.5VS

VGA_ENVDD

+1.8VS

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

11 UMA_ENVDD
JP23
B+

LCD/PANEL BD. Conn.

+3V_SB

1
2
R1 UMA@ 0_0402_5%

Compal Electronics, Inc.


SCHEMATIC MB A3831

Document Number
401498

Thursday, November 25, 2010

Sheet
1

15

Rev
D
of

46

U26A

E29
E28

PCIE_CALRP
PCIE_CALRN

R413

1 0_0402_5%

E27

PCIE_CALI

H_PWRGD

C:Change to 10K for AMD recommand


2
1 ALLOW_LDTSTOP
R112
10K_0402_5%
+3V_SB

LDT_RST#

29,31 EC_SWI#

EC_SWI#
2
100K_0402_5%

1
R416

1
R125
1
R127
1
R126
1
R129
1
R1217

ALLOW_LDTSTOP

EC_SWI#

31 PM_SLP_S3#
31 PM_SLP_S5#
31
PBTN_OUT#
6,31 SB_PWRGD

SB_TEST0
2
@ 2.2K_0402_5%
SB_TEST1
2
@ 2.2K_0402_5%
SB_TEST2
2
@ 2.2K_0402_5%
H_THERMTRIP#
2
@ 4.7K_0402_5%
H_PROCHOT#
2
@ 4.7K_0402_5%

SB_TEST0
SB_TEST1
SB_TEST2

6 H_THERMTRIP#

H_THERMTRIP#

31
GATEA20
31 EC_KBRST#

35 LPC_DRQ1#
11
BMREQ#
22,31,35 SERIRQ
SB_32KHI

CPU_PG/LDT_PG
INTR/LINT0
NMI/LINT1
INIT#
SMI#
SLP#/LDT_STP#
IGNNE#/SIC
A20M#/SID
FERR#
STPCLK#/ALLOW_LDTSTP
CPU_STP#/DPSLP_3V#
DPSLP_OD#/GPIO37
DPRSLPVR
LDT_RST#/DPRSTP#/PROCHOT#

PCI_PME#/GEVENT4#
RI#/EXTEVNT0#
SLP_S3#
SLP_S5#
PWR_BTN#
PWR_GOOD
SUS_STAT#
TEST0
TEST1
TEST2
S3_STATE/GEVENT5#
SYS_RESET#/GPM7#
WAKE#/GEVENT8#
BLINK/GPM6#
SMBALERT#/THRMTRIP#/GEVENT2#

D7
C25
AF26
AG26

LPC_PME#/GEVENT3#
LPC_SMI#/EXTEVNT1#
GA20IN
KBRST#

AG24
AG25
AH24
AH25
AF24
AJ24
AH26
W22
AF23

LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
SERIRQ

D2

C1

X1

X2

AD0/ROMA18
AD1/ROMA17
AD2/ROMA16
AD3/ROMA15
AD4/ROMA14
AD5/ROMA13
AD6/ROMA12
AD7/ROMA11
AD8/ROMA9
AD9/ROMA8
AD10/ROMA7
AD11/ROMA6
AD12/ROMA5
AD13/ROMA4
AD14/ROMA3
AD15/ROMA2
AD16/ROMD0
AD17/ROMD1
AD18/ROMD2
AD19/ROMD3
AD20/ROMD4
AD21/ROMD5
AD22/ROMD6
AD23/ROMD7
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#/ROMA10
CBE1#/ROMA1
CBE2#/ROMWE#
CBE3#
FRAME#
DEVSEL#/ROMA0
IRDY#
TRDY#/ROMOE#
PAR/ROMA19
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#/GPIO70
REQ4#/GPIO71
GNT0#
GNT1#
GNT2#
GNT3#/GPIO72
GNT4#/GPIO73
CLKRUN#
LOCK#
INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36

XTAL

SB_32KHO

A3
B2
F7
A5
E3
B5
B3
G9
E9
F9
D9
F4
E7
C2
G7

R136 1

2 22_0402_5%

PCIRST#

PCIRST#

W7
Y1
W8
W5
AA5
Y3
AA6
AC5
AA7
AC3
AC7
AJ7
AD4
AB11
AE6
AC9
AA3
AJ4
AB1
AH4
AB2
AJ3
AB3
AH3
AC1
AH2
AC2
AH1
AD2
AG2
AD1
AG1
AB9
AF9
AJ5
AG3
AA2
AH6
AG5
AA1
AF7
Y2
AG8
AC11
AJ8
AE2
AG9
AH8
AH5
AD11
AF2
AH7
AB12
AG4
AG7
AF6

PCI_REQ#2 22

PCI_GNT#2 22
TP14
B

AD3
AF1
AF4
AF3

PCI_PIRQE# 22
PCI_PIRQF# 22
PCI_PIRQG# 22

+ RTC Battery
TP17
H_PROCHOT#

VBAT
RTC_GND

E1
D1

+SB_VBAT

+RTCBATT
H_PROCHOT# 6

+SB_VBAT

C679

1
C251
1U_0402_6.3V4Z

W=20mils

+RTCVCC

1
R436

2
120_0402_5% 1

J4
@ JUMP_43X39

+CHGRTC
C700
0.1U_0402_16V4Z

OUT

NC

IN

NC

C250
0.1U_0402_16V4Z

R437
120_0402_5%
1
2

D35
BAS40-04_SOT23-3

Y4

R417
20M_0603_5%

TP16

D3
F5

SB_32KHI

1
8.2K_0402_5%

PCI_C/BE#0 22
PCI_C/BE#1 22
PCI_C/BE#2 22
PCI_C/BE#3 22
PCI_FRAME# 22
PCI_DEVSEL# 22
PCI_IRDY# 22
PCI_TRDY# 22
PCI_PAR 22
PCI_STOP# 22
PCI_PERR# 22
PCI_SERR# 22

1
1

2
R415

18,22

RTCCLK
RTC_IRQ#/GPIO69

C688

12P_0402_50V8J

PCIRST#
PCI_AD[0..31]

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

218S6ECLA13FG_FCBGA548_SB600
SB600R3@

R422
20M_0603_5%
2
1

B:Change to 8.2K_0402

6,22

PCI_AD[0..31]

LPC

31,35
LPC_AD0
31,35
LPC_AD1
31,35
LPC_AD2
31,35
LPC_AD3
31,35 LPC_FRAME#

AC26
W26
W24
W25
AA24
AA23
AA22
AA26
Y27
AA25
AH9
B24
W23
AC25

PCICLK5

PCICLK0 18
PCICLK1 18
CLK_PCI_SIO 35
CLK_PCI_CB 22
PCICLK4 18
CLK_PCI_EC 31
PCICLK6 18

1 562_0402_1%
1 2.05K_0402_1%

AJ9

2 22_0402_5%
2 22_0402_5%

2
2

11 ALLOW_LDTSTOP

+1.8VS

PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N

R412
R411

6,11 LDT_STOP#

T25
T26
T22
T23
M25
M26
M22
M23

PCIRST#

CPU

PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N

ACPI / WAKE UP EVENTS

+PCIE_VDDR

SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N

P29
P28
M29
M28
K29
K28
H29
H28

R419 1
R421 1

10
10
10
10
10
10
10
10

SB_RX0P_C
SB_RX0N_C
SB_RX1P_C
SB_RX1N_C
SB_RX2P_C
SB_RX2N_C
SB_RX3P_C
SB_RX3N_C

PCICLK2
PCICLK3

0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K

PCI CLKS

2
2
2
2
2
2
2
2

PCI INTERFACE

1
1
1
1
1
1
1
1

PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
SPDIF_OUT/PCICLK7/GPIO41

U2
T2
U1
V2
W3
U3
V1
T1

RTC

C632
C635
C641
C642
C634
C633
C640
C639

SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N

PCIE_RCLKP
PCIE_RCLKN

PCI EXPRESS INTERFACE

10
10
10
10
10
10
10
10

J24
J25

SBSRCCLK
SBSRCCLK#

B:Swap PCICLK7 and PCICLK2 for debug CLK fail issue.

SB600 SB
13
13

Close to SB600 pin E1


A

32.768KHZ_12.5P_1TJS125BJ4A421P
SB_32KHO

12P_0402_50V8J

Compal Electronics, Inc.

Compal Secret Data

Security Classification

PreMP: Change for RTC timer

2007/3/8

Issued Date

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC MB A3831
Rev
D

401498

Date:

Thursday, November 25, 2010

Sheet
1

16

of

46

U26B

2
R118

SATA_X2
2 10K_0402_5%

+3VS R120 1
33 HDD_LED#

2 NB_RST#_R
8.2K_0402_5%

1
R134

2 EC_RSMRST#
2.2K_0402_5%

31 EC_RSMRST#
13 SB_OSC_INT
13

2
R414

NB_RST# 4

Y
3

NB_RST#

1
R1221

0.1U_0402_16V4Z
1
NB_RST#_R

TC7SH08FU_SSOP5

2
@ 0_0402_5%

DVT: Follow IALAA and Modified BOM

31

R410
R408

2 10K_0402_5%

SIDERST#

2 2.2K_0402_5%

SMB_CK_CLK0

2 2.2K_0402_5%

SMB_CK_DAT0

SB_SPKR
SIDERST#

SMB_CK_CLK0
SMB_CK_DAT0

8,9,13,24,29 SMB_CK_CLK0
8,9,13,24,29 SMB_CK_DAT0

SATA_ACT#/GPIO67

AG10
E2
B23

A_RST#
RSMRST#
14M_OSC
USBCLK

A14

USB_RCOMP

A10
A11

USB_ATEST0
USB_ATEST1

A27
A26
B26
B27
D23
B29
A23
C26
D26
C28
A4
C27
B28
C3
F3

USB_HSDP9+
USB_HSDM9USB_HSDP8+
USB_HSDM8USB_HSDP7+
USB_HSDM7USB_HSDP6+
USB_HSDM6USB_HSDP5+
USB_HSDM5USB_HSDP4+
USB_HSDM4USB_HSDP3+
USB_HSDM3USB_HSDP2+
USB_HSDM2USB_HSDP1+
USB_HSDM1USB_HSDP0+
USB_HSDM0-

USB_OC0#/GPM0#
USB_OC1#/GPM1#
USB_OC2#/GPM2#
USB_OC3#/GPM3#
USB_OC4#/GPM4#
USB_OC5#/DDR3_RST#/GPM5#
USB_OC6#/GEVENT6#
USB_OC7#/GEVENT7#
USB_OC8#/AZ_DOCK_RST#/GPM8#
USB_OC9#/SLP_S2/GPM9#
SSMUXSEL/SATA_IS3#/GPIO0
ROM_CS#/GPIO1
SPKR/GPIO2
SMARTVOLT/SATA_IS2#/GPIO4
SHUTDOWN#/GPIO5
GHI#/SATA_IS1#/GPIO6
WD_PWRGD/GPIO7
DDC1_SDA/GPIO8
DDC1_SCL/GPIO9
SATA_IS0#/GPIO10
LLB#/GPIO66

IDE_IORDY
IDE_IRQ
IDE_A0
IDE_A1
IDE_A2
IDE_DACK#
IDE_DRQ
IDE_IOR#
IDE_IOW#
IDE_CS1#
IDE_CS3#

AB29
AA28
AA29
AB27
Y28
AB28
AC27
AC29
AC28
W28
W27

IDE_D0/GPIO15
IDE_D1/GPIO16
IDE_D2/GPIO17
IDE_D3/GPIO18
IDE_D4/GPIO19
IDE_D5/GPIO20
IDE_D6/GPIO21
IDE_D7/GPIO22
IDE_D8/GPIO23
IDE_D9/GPIO24
IDE_D10/GPIO25
IDE_D11/GPIO26
IDE_D12/GPIO27
IDE_D13/GPIO28
IDE_D14/GPIO29
IDE_D15/GPIO30

AD28
AD26
AE29
AF27
AG29
AH28
AJ28
AJ27
AH27
AG27
AG28
AF28
AF29
AE28
AD25
AD29

SPI_DI/GPIO12
SPI_DO/GPIO11
SPI_CLK/GPIO47
SPI_HOLD#/GPIO31
SPI_CS#/GPIO32

J3
J6
G3
G2
G6

LAN_RST#/GPIO13
ROM_RST#/GPIO14

C23
G5

FANIN0/GPIO50
FANIN1/GPIO51
FANIN2/GPIO52

N3
P2
W4

TEMP_COMM
TEMPIN0/GPIO61
TEMPIN1/GPIO62
TEMPIN2/GPIO63
TEMPIN3/TALERT#/GPIO64

P5
P7
P8
T8
T7

VIN0/GPIO53
VIN1/GPIO54
VIN2/GPIO55
VIN3/GPIO56
VIN4/GPIO57
VIN5/GPIO58
VIN6/GPIO59
VIN7/GPIO60

V5
L7
M8
V6
M6
P4
M7
V7

AZ_BITCLK
AZ_SDOUT
AZ_SDIN3/GPIO46
AZ_SYNC
AZ_RST#

N2
M2
K2
L3
K3

AC_BITCLK/GPIO38
AC_SDOUT/GPIO39
ACZ_SDIN0/GPIO42
ACZ_SDIN1/GPIO43
ACZ_SDIN2/GPIO44
AC_SYNC/GPIO40
AC_RST#/GPIO45

L1
L2
L4
J2
J4
M3
L5

SCL0/GPOC0#
SDA0/GPOC1#

SB600R3@
SCL1/GPOC2#
SDA1/GPOC3#

IDE_SDD[0..15]

IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15

29

B:1.Add PU R479 for BT_DET#


+3VS
2.Chg. BT_DET# from GPIO0 to GPIO51.
BT_DET#

10K_0402_5% 2

R479

+3VS
5IN1_EN

1
R128

1K_0402_5%

0: 5IN1 Disable
1: 5IN1 Enable

B:Chg. name to 5IN1_EN

+3VS
C

BT_DET#

1
R124
1
R122

2
100K_0402_5%
2
CIR@ 1K_0402_5%

A:ISKAA-Add for CIR floating casue S3 shut down issue


B:Chg. name to CIR_EN#
BT_DET# 30
SPK_SEL 26
DVT: follow IALAA

5IN1_EN
CIR_EN#
SB_INT_FLASH_SEL 32
EC_THERM# 31
SUBWOOFER 26

AZ_BITCLK
AZ_SDOUT
AZ_SYNC
AZ_RST#

AZ_SDIN3_HD

26

AC97_SDOUT 18
AZ_SDIN0_MD 29

E23
AC21
AD7
AE7
AA4
T4
D4
AB19
AZ_RST#
2
10K_0402_5%

218S6ECLA13FG_FCBGA548_SB600

CIR_EN#

M4
T3
V4

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8

IDE_SDIORDY 29
INT_IRQ15 29
IDE_SDA0 29
IDE_SDA1 29
IDE_SDA2 29
IDE_SDDACK# 29
IDE_SDDREQ 29
IDE_SDIOR# 29
IDE_SDIOW# 29
IDE_SDCS1# 29
IDE_SDCS3# 29

CAM_PW 30

FANOUT0/GPIO3
FANOUT1/GPIO48
FANOUT2/GPIO49

GPIO/ SMBUS

R409

EC_SMI#

SIDERST#

SATA_X2

AC12

USB OC

29

+3VS

AD18

A8
B8
C7
C8
A6
B6
B4
C4
C5
C6

EC_SCI#

27

SATA_X1

H12
G12
E12
D12
E14
D14
G14
H14
D16
E16
D18
E18
G16
H16
G18
H18
D19
E19
G19
H19

USBP9+
USBP9USBP8+
USBP8USBP7+
USBP7USBP6+
USBP6USBP5+
USBP5USBP4+
USBP4USBP3+
USBP3USBP2+
USBP2USBP1+
USBP1USBP0+
USBP0-

29 EXP_CPPE#
31 EC_LID_OUT#

31

SATA_CAL

USB INTERFACE

11,15,24,25,29,31,35

1
U40

1 USB_RCOMP
11.3K_0402_1%
TP13
TP12

C780
29
29
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30

AF12
AD16

A17

USBCLK_EXT

C:Change to 11.3K for USB logo

+3VALW

NB_RST#_R
EC_RSMRST#

SATA_RX0+
SATA_RX0SATA_RX1+
SATA_RX1SATA_RX2+
SATA_RX2SATA_RX3+
SATA_RX3-

OSC / RST

1
R119

SATA_CAL
1
1K_0402_1%
SATA_X1

AJ20
AH20
AJ17
AH17
AJ16
AH16
AJ13
AH12

SB600 SB

AZALIA

SATA_X2

SATA_TX0+
SATA_TX0SATA_TX1+
SATA_TX1SATA_TX2+
SATA_TX2SATA_TX3+
SATA_TX3-

P-ATA 66/100

10M_0402_5%

SATA_DTX_C_SRX_P0
SATA_DTX_C_SRX_N0
SATA_DTX_C_SRX_P1
SATA_DTX_C_SRX_N1

AH21
AJ21
AH18
AJ18
AH13
AH14
AJ11
AH11

SPI ROM

SATA_STX_DRX_P0
SATA_STX_DRX_N0
SATA_STX_DRX_P1
SATA_STX_DRX_N1

HW MONITOR

21
21
21
21

R113

1 C186

0.01U_0402_25V7K
0.01U_0402_25V7K
0.01U_0402_25V7K
0.01U_0402_25V7K

SATA_X1

Y2
25MHZ_20P
10P_0402_50V8J

2
2
2
2

1 C195

10P_0402_50V8J

1
1
1
1

SERIAL ATA

C662
C665
C767
C768

SATA_STX_C_DRX_P0
SATA_STX_C_DRX_N0
SATA_STX_C_DRX_P1
SATA_STX_C_DRX_N1

AC97

21
21
21
21

33_0402_5% 2

1 R158

AZ_BITCLK_HD 26

MDC@ 33_0402_5% 2

1 R160

AZ_BITCLK_MD 29

33_0402_5% 2

1 R161

AZ_SDOUT_HD 26

MDC@ 33_0402_5% 2

1 R163

AZ_SDOUT_MD 29

33_0402_5% 2

1 R155

AZ_SYNC_HD

26

AZ_SYNC

MDC@ 33_0402_5% 2

1 R157

AZ_SYNC_MD

29

33_0402_5% 2

1 R152

AZ_RST_HD# 26

AZ_RST#

MDC@ 33_0402_5% 2

1 R154

AZ_RST_MD# 29

AZ_BITCLK

AZ_SDOUT

R140

A:PA_IXP600AF3 reserve for SB600 prior to A21.

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/3/8

Issued Date

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC MB A3831
Rev
D

401498

Date:

Thursday, November 25, 2010

Sheet
1

17

of

46

1
R145
@ 10K_0402_5%

16,22
16,22
16,22
16,22
16,22

R146
10K_0402_5%

17 AC97_SDOUT
16
PCICLK4
16
PCICLK6
16
PCICLK1
16
PCICLK0

PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
R151
@ 2.2K_0402_5%

R138
@ 2.2K_0402_5%

R150
@ 2.2K_0402_5%

R144
10K_0402_5%

R147
@ 10K_0402_5%

R133
10K_0402_5%

R142
@ 2.2K_0402_5%

R149
@ 2.2K_0402_5%

R420
10K_0402_5%

1
R139
@ 10K_0402_5%

R418
@ 2.2K_0402_5%

Debug Straps

+3VS

+3VS

+3VS

+3VS

+3VS

Standard Straps

AC_SDOUT
PULL
HIGH

PULL
LOW

USE
DEBUG
STRAPS
IGNORE
DEBUG
STRAPS
<int'l PD>

PCI_CLK4
<PCICLK4>
USE INT.
PLL48

PCI_CLK6
PCI_CLK1
<PCICLK6> <CLK_PCI_LAN>
ROM TYPE:
CPU IF=AMD
H,
DEFAULT

USE EXT.
48MHZ

CPU IF=Intel

PCI_CLK0
<PCICLK0>
H = Reserve

H,

L = LPC ROM

L,

H = SPI ROM

L,

L = FWH ROM

PULL
HIGH

DEFAULT

PULL
LOW

PCI_AD23
<A11 only>

PCI_AD28

PCI_AD27

PCI_AD26

PCI_AD25

PCI_AD24

USE
LONG
RESET

USE PCI
PLL

USE ACPI
BCLK

USE IDE
PLL

USE DEFAULT DISABLE


PCIE STRAPS BOOTFAIL
TIMER

DEFAULT

DEFAULT

DEFAULT

DEFAULT

DEFAULT

DEFAULT

USE
SHORT
RESET

BYPASS
PCI PLL

BYPASS
ACPI
BCLK

BYPASS IDE
PLL

USE EEPROM
PCIE STRAPS

ENABLE
BOOTFAIL
TIMER

DEFAULT
DEFAULT

Un-Used Inputs Setting--GPIO pins

Un-Used Inputs Setting--GPM pins

Un-Used Inputs Setting--GPM pins

GPIO4/SMARTVOLT/SATA_IS2# Config. GPIO to Output Mode.

GPIO56/VIN3

Config. GPIO to Output Mode.

GPM5#/DDR3_RST#/USB_OC5# Config. for internal PU.

GPIO5/SHUTDOWN#

Config. GPIO to Output Mode.

GPIO57/VIN4

Config. GPIO to Output Mode.

GEVENT5#/S3_STATE

GPIO7/WD_PWRGD

Config. GPIO to Output Mode.

GPIO58/VIN5

Config. GPIO to Output Mode.

GPIO8/DDC1_SDA

Config. GPIO to Output Mode.

GPIO59/VIN6

Config. GPIO to Output Mode.

GPIO9/DDC1_SCL

Config. GPIO to Output Mode.

GPIO60/VIN7

Config. GPIO to Output Mode.

GPIO10/SATA_IS0#

Config. GPIO to Output Mode.

GPIO61/TEMPIN0

Config. GPIO to Output Mode.

GPIO41/PCICLK7/SPDIF_OUT

Config. GPIO to Output Mode.

GPIO50/FANIN0

Config. GPIO to Output Mode.

GPIO51/FANIN1

Config. GPIO to Output Mode.

GPOC2#/SCL1

Config. GPIO to Output Mode.

GPIO52/FANIN2

Config. GPIO to Output Mode.

GPOC3#/SDA1

Config. GPIO to Output Mode.

GPIO53/VIN0

Config. GPIO to Output Mode.

GPIO54/VIN1

Config. GPIO to Output Mode.

GPIO55/VIN2

Config. GPIO to Output Mode.

Config. for internal PU.

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/3/8

Issued Date

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC MB A3831
Rev
D

401498

Date:

Thursday, November 25, 2010

Sheet
1

18

of

46

+3VS

B:Update footprint w/o


wrong polar mark.

L64
1
2
MBC1608121YZF_0603
C671 2
1 1U_0402_6.3V4Z

+1.2V_HT
U26C

2
+

2
2
2
2
2
2
2
2
2
2

SB_VDD_33=150mA

2
2
2
2
2

1
22U_A_4VM
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z

0.1U_0402_16V4Z
+1.2VS_SB_VDD

+3V_SB

C678
C253
C230
C234

1
22U_A_4VM
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
0.1U_0402_16V4Z
2

1
1
1

+3V_SB

SB_S5_33=15mA
+1.2V_SB

2
2
2
2
2

1
1
1
1
1

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
@ 10U_0805_10V4Z

+1.2V_SB

SB_AVDDCK_12=80mA

+PCIE_VDDR

SB_PCIEPVDDR_12=450mA
2
1
FBMA-L11-201209-221LMA30T_0805

+1.2V_HT

+1.2V_HT

C646
C187
C192
C189
C648
C649

+PCIE_VDDR

1
22U_A_4VM
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z

1
1
1
1
1

+PCIE_PVDD

L59
SB_PCIEPVDD_12=35mA
2
1
+PCIE_PVDD
FBMA-L11-201209-221LMA30T_0805
C650 1
1
C647

1U_0402_6.3V4Z
2
2
22U_0805_6.3V6M

GND to U28

S5_1.2V_1
S5_1.2V_2
S5_1.2V_3
S5_1.2V_4

F27
F28
F29
G26
G27
G28
G29
J27
J29
L25
L26
L29
N29

PCIE_VDDR_1
PCIE_VDDR_2
PCIE_VDDR_3
PCIE_VDDR_4
PCIE_VDDR_5
PCIE_VDDR_6
PCIE_VDDR_7
PCIE_VDDR_8
PCIE_VDDR_9
PCIE_VDDR_10
PCIE_VDDR_11
PCIE_VDDR_12
PCIE_VDDR_13

U29

PCIE_PVDD

U28

PCIE_PVSS

V29
V28
V27
V26
V25
V24
V23
V22
U27
T29
T28
T27
T24
T21
P27

PCIE_VSS_42
PCIE_VSS_41
PCIE_VSS_40
PCIE_VSS_39
PCIE_VSS_38
PCIE_VSS_37
PCIE_VSS_36
PCIE_VSS_35
PCIE_VSS_34
PCIE_VSS_33
PCIE_VSS_32
SB600R3@
PCIE_VSS_31
PCIE_VSS_30
PCIE_VSS_29
PCIE_VSS_28

PCIE Analog PWR

L60

G4
H1
H2
H3

S5_3.3V_1
S5_3.3V_2
S5_3.3V_3
S5_3.3V_4
S5_3.3V_5
S5_3.3V_6

PLLVDD_SATA_1
PLLVDD_SATA_2

+3VS
C209

1
2
MBC1608121YZF_0603
1 1U_0402_6.3V4Z

+XTLVDD_ATA

+XTLVDD_ATA

AC16

XTLVDD_SATA

+1.2V_SATA

AE14
AE16
AE18
AE19
AF19
AF21
AG22
AG23
AH22
AH23
AJ12
AJ14
AJ19
AJ22
AJ23

L63

AVDD_SATA_1
AVDD_SATA_2
AVDD_SATA_3
AVDD_SATA_4
AVDD_SATA_5
AVDD_SATA_6
AVDD_SATA_7
AVDD_SATA_8
AVDD_SATA_9
AVDD_SATA_10
AVDD_SATA_11
AVDD_SATA_12
AVDD_SATA_13
AVDD_SATA_14
AVDD_SATA_15

SB_AVDDSATA_12=300mA

2
1
FBMA-L11-201209-221LMA30T_0805

+1.2V_HT

C668
C661
C197
C194
C206

SB_AVDDC_33=5mA

+1.2V_SATA

1
22U_A_4VM
2 1U_0402_6.3V4Z
2 1U_0402_6.3V4Z
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z

1
1
1
1

+3V_SB

+3V_SB

SB_AVDDTX_33=250mA
C669
C224
C228
C211
C212
C673
C675

2
1
1
1
1
1
1

2
2
2
2
2
2

SB_AVDDRX_33=250mA
1
22U_A_4VM
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

+1.2V_SB

+3V_SB

SB_AVDDCK_12=90mA
C670 1
C221 1

2 2.2U_0603_6.3V4Z
2 0.1U_0402_16V4Z

+SB_AVDD
+1.2V_SB

2
2
2
2

1
1
1
1

AVDDTX_0
AVDDTX_1
AVDDTX_2
AVDDTX_3
AVDDTX_4
AVDDRX_0
AVDDRX_1
AVDDRX_2
AVDDRX_3
AVDDRX_4

A12

AVDDC

A13

AVSSC

A18
A19
B19
B20
B21

USB_PHY_1.2V_1
USB_PHY_1.2V_2
USB_PHY_1.2V_3
USB_PHY_1.2V_4
USB_PHY_1.2V_5

SB_AVDD_33=1mA

GND to A13

C198
C666
C667
C201

B9
B11
B13
B16
B18
A9
B10
B12
B14
B17

SB_AVDDC_33=15mA
+3V_SB

1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z

+1.8VS

AVDD
AVSS

+V5_VREF

CPU_PWR

AE11

V5_VREF

SB_V5_VREF_5=5mA

A24
2 +3.3V_AVDDCK
SB_AVDDCK_33=10mA

AVDDCK_3.3V

A22

AVDDCK_1.2V

+1.2V_AVDDCK

SB_AVDDCK_12=40mA
B22

D27
D28
D29
F26
G23
G24
G25
H27
J23
J26
J28
K27
L22
L23
L24
L27
L28
M21
M24
M27
N27
N28
P22
P23
P24
P25
P26

PCIE_VSS_1
PCIE_VSS_2
PCIE_VSS_3
PCIE_VSS_4
PCIE_VSS_5
PCIE_VSS_6
PCIE_VSS_7
PCIE_VSS_8
PCIE_VSS_9
PCIE_VSS_10
PCIE_VSS_11
PCIE_VSS_12
PCIE_VSS_13
PCIE_VSS_14
PCIE_VSS_15
PCIE_VSS_16
PCIE_VSS_17
PCIE_VSS_18
PCIE_VSS_19
PCIE_VSS_20
PCIE_VSS_21
PCIE_VSS_22
PCIE_VSS_23
PCIE_VSS_24
PCIE_VSS_25
PCIE_VSS_26
PCIE_VSS_27

L65
1
2
MBC1608121YZF_0603

+3VS

2.2U_0603_6.3V4Z

C683

0.1U_0402_16V4Z

L61
1
2
MBC1608121YZF_0603

+3VS

GND to M1

AVSSCK

AVSS_USB_1
AVSS_USB_2
AVSS_USB_3
AVSS_USB_4
AVSS_USB_5
AVSS_USB_6
AVSS_USB_7
AVSS_USB_8
AVSS_USB_9
AVSS_USB_10
AVSS_USB_11
AVSS_USB_12
AVSS_USB_13
AVSS_USB_14
AVSS_USB_15
AVSS_USB_16
AVSS_USB_17
AVSS_USB_18
AVSS_USB_19
AVSS_USB_20
AVSS_USB_21
AVSS_USB_22
AVSS_USB_23
AVSS_USB_24
AVSS_USB_25
AVSS_USB_26
AVSS_USB_27
AVSS_USB_28
AVSS_USB_29
AVSS_USB_30
AVSS_USB_31
AVSS_USB_32
AVSS_USB_33

AB14
AB16
AB18
AC14
AC18
AC19
AD12
AD19
AD21
AE12
AE21
AF11
AF14
AF16
AF18
AG11
AG12
AG13
AG14
AG16
AG17
AG18
AG19
AG20
AG21
AH10
AH19
A16
C9
C10
C11
C12
C13
C14
C16
C17
C18
C19
C20
D11
D21
E11
E21
F11
F12
F14
F16
F18
F19
F21
G11
G21
H11
H21
J11
J12
J14
J16
J18
J19

218S6ECLA13FG_FCBGA548_SB600

+SB_AVDD

C685

HW Monitor PWR

AA27

SB_CPU_PWR=10mA

1
C188
0.1U_0402_16V4Z

N1
M1

AVSS_SATA_1
AVSS_SATA_2
AVSS_SATA_3
AVSS_SATA_4
AVSS_SATA_5
AVSS_SATA_6
AVSS_SATA_7
AVSS_SATA_8
AVSS_SATA_9
AVSS_SATA_10
AVSS_SATA_11
AVSS_SATA_12
AVSS_SATA_13
AVSS_SATA_14
AVSS_SATA_15
AVSS_SATA_16
AVSS_SATA_17
AVSS_SATA_18
AVSS_SATA_19
AVSS_SATA_20
AVSS_SATA_21
AVSS_SATA_22
AVSS_SATA_23
AVSS_SATA_24
AVSS_SATA_25
AVSS_SATA_26
AVSS_SATA_27

Special PWR/GND

C248
C239
C686
C682
C242

A2
A7
F1
J5
J7
K1

AD14
AJ10

USB PHY Digi. PWR

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12

Core PWR

SB_VDD_12=500mA

M13
M17
N12
N15
N18
R13
R17
U12
U15
U18
V13
V17

POWER

SB600 SB

+PLLVDD_ATA
L22

C214

1
1
1
1
1

A20
A21
A29
B1
B7
B25
C21
C22
C24
D6
E24
F2
F23
G1
J1
J8
L6
L8
M9
M12
M15
M18
N13
N17
P1
P6
P21
R12
R15
R18
T6
T9
U13
U17
V3
V8
V12
V15
V18
V21
W1
W9
Y29
AA11
AA14
AA18
AC6
AC24
AD9
AD23
AE3
AE27
AG6
AJ1
AJ25
AJ29

VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
3.3V Standby PWR VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
1.2V Standby PWR VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57

U26D

SB_PLLVDDSATA_12=65mA

USB Analog PWR

C202
C208
C219
C205
C216
C220

+1.2VS_SB_VDD

SB600 SB

L20
1
2
MBK2012221YZF 0805

+1.2V_HT

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
VDDQ_13
VDDQ_14
VDDQ_15
VDDQ_16
VDDQ_17
VDDQ_18
VDDQ_19
VDDQ_20
VDDQ_21
VDDQ_22
VDDQ_23
VDDQ_24
VDDQ_25
VDDQ_26
VDDQ_27
VDDQ_28

3.3V I/O PWR

1
1
1
1
1
1
1
1
1
1

A25
A28
C29
D24
L9
L21
M5
P3
P9
T5
V9
W2
W6
W21
W29
AA12
AA16
AA19
AC4
AC23
AD27
AE1
AE9
AE23
AH29
AJ2
AJ6
AJ26

+PLLVDD_ATA

SATA Analog PWR

C190
C227
C193
C200
C240
C191
C233
C226
C210
C676

1 C657
220U_Y_4VM
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

C659 1

2 2.2U_0603_6.3V4Z

C660 1

+3.3V_AVDDCK

0.1U_0402_16V4Z

GND to B22
+5VS

R131 1

+3VS

D8

2 1K_0402_5%

+V5_VREF

2
1

CH751H-40PT_SOD323-2

C225
1U_0603_10V4Z

C223
0.1U_0402_16V4Z

218S6ECLA13FG_FCBGA548_SB600

+1.2V_HT

L62
SB600R3@
1
2
MBC1608121YZF_0603

C663

2 2.2U_0603_6.3V4Z

C664

+1.2V_AVDDCK

0.1U_0402_16V4Z

GND to B22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/3/8

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC MB A3831
Rev
D

401498

Date:

Thursday, November 25, 2010

Sheet

19

of

46

RB491D_SOT23

@ 1A_6VDC_MINISMDC110
1
+HDMI_5V_OUT
15

VGA_DVI_SDATA

R1177
HDMI@
19.1K_0402_1%

VGA_DVI_SCLK

HDMI_SDATA

Q135
1

HDMI_SCLK

15 VGA_DVI_SCLK

Q134
1
2N7002_SOT23-3
HDMI@

15 VGA_DVI_SDATA

C270
HDMI@
0.1U_0402_16V4Z

R1176
HDMI@
19.1K_0402_1%

@ JUMP_43X79

VGA_HPD

VGA_HPD

2
J1

F1

+5VS

D10
D

+HDMI_5V_OUT
R430
@
24K_0402_5%

R431
@
24K_0402_5%

R429
HDMI@
2.2K_0402_5%

+3VS

2N7002_SOT23-3
HDMI@

HDMI Connector
L68
15 VGA_DVI_TXD1+

VGA_DVI_TXD1+

VGA_DVI_TXD1-

L66

HDMI_R_D1+

HDMI_R_D1-

15 VGA_DVI_TXC+

VGA_DVI_TXC+

VGA_DVI_TXC-

HDMI_R_CK+

HDMI_R_CK-

JP35
HDMI_HPD

15 VGA_DVI_TXD1-

15 VGA_DVI_TXC-

HDMI@ WCM2012F2S-900T04_0805

+HDMI_5V_OUT

HDMI@ WCM2012F2S-900T04_0805

HDMI_SDATA
HDMI_SCLK

HDMI_R_CKHDMI_R_CK+
HDMI_R_D0L69
15 VGA_DVI_TXD2+
15 VGA_DVI_TXD2-

VGA_DVI_TXD2+
VGA_DVI_TXD2-

L67

HDMI_R_D2+

HDMI_R_D2-

VGA_DVI_TXD0+

15 VGA_DVI_TXD0+

VGA_DVI_TXD0-

15 VGA_DVI_TXD0-

HDMI@ WCM2012F2S-900T04_0805

HDMI_R_D0+

HDMI_R_D0+
HDMI_R_D1-

HDMI_R_D0-

HDMI_R_D1+
HDMI_R_D2-

HDMI@ WCM2012F2S-900T04_0805

HDMI_R_D2+

19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKGND
CK_shield GND
CK+
GND
D0GND
D0_shield
D0+
D1D1_shield
D1+
D2D2_shield
D2+

20
21
22
23

TYCO_1939864-1
HDMI@

PVT: Delete all co-lay resistors.

+HDMI_5V_OUT

C783
0.1U_0402_16V4Z
HDMI@

HDMI_HPD
B

VGA_HPD
R1225
4
100K_0402_5%
HDMI@
U41
SN74AHCT1G125GW_SOT353-5
HDMI@

2 C784
0.1U_0402_16V4Z
HDMI@
1

P
OE#

5
1

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/3/8

Issued Date

Deciphered Date

2008/3/8

Title

SCHEMATIC MB A3831

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
D

401498

Date:

Thursday, November 25, 2010

Sheet
1

20

of

46

SATA HDD Conn.


+5VS

Place closely JP25 SATA CONN.


JP34

C684
10U_0805_10V4Z

C680
10U_0805_10V4Z

C687
0.1U_0402_16V4Z

C689
0.1U_0402_16V4Z

GND
A+
AGND
BB+
GND

C690
0.1U_0402_16V4Z

+3VS

C697

@ 10U_0805_10V4Z
2

C691

C693

@ 0.1U_0402_16V4Z @ 0.1U_0402_16V4Z
2
2

C696
@ 0.1U_0402_16V4Z

24
23

GND
GND

V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12

1
2
3
4
5
6
7

SATA_STX_C_DRX_P0 17
SATA_STX_C_DRX_N0 17
SATA_DTX_SRX_N0
SATA_DTX_SRX_P0

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

C699
C698

2 0.01U_0402_25V7K
2 0.01U_0402_25V7K

1
1

SATA_DTX_C_SRX_N0 17
SATA_DTX_C_SRX_P0 17

+3VS

+5VS

OCTEK_SAT-22SO1G_RV
C

2HDD@
+5VS

JP55

Place closely JP55 SATA CONN.

C775

10U_0805_10V4Z
2 2HDD@

C776

10U_0805_10V4Z
2 2HDD@

C777

C778

GND
A+
AGND
BB+
GND

C779

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2HDD@
2HDD@
2HDD@

VCC3.3
VCC3.3
VCC3.3
GND
GND
GND
VCC5
VCC5
VCC5
GND
RESERVED
GND
GND
VCC12
GND
VCC12
VCC12

24
23

1
2
3
4
5
6
7

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

SATA_STX_C_DRX_P1 17
SATA_STX_C_DRX_N1 17
SATA_DTX_SRX_N1
SATA_DTX_SRX_P1

C769
C770

1
1

2 0.01U_0402_25V7K
2 0.01U_0402_25V7K

SATA_DTX_C_SRX_N1 17
SATA_DTX_C_SRX_P1 17

+5VS
B

SUYIN_127043FB022G345ZR_NR

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/3/8

Issued Date

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC MB A3831
Rev
D

401498

Date:

Thursday, November 25, 2010

Sheet
1

21

of

46

+3VS

+AVDD_7412
+3VS

C281

C289

C278

C282

10U_0805_10V4Z

10U_0805_10V4Z

C294

C296

C295
0.01U_0402_25V4Z
1
2
0.1U_0402_16V4Z

0.01U_0402_25V4Z

1
C319

C299

4.7U_0805_10V4Z
+3VS
D

2
1U_0603_10V4Z

SMELWP#

MSCLK_SDCLK_SMELWP#
MSBS_SDCMD_SMWE#
MSD3_SDD3_SMD3
MSD2_SDD2_SMD2
MSD1_SDD1_SMD1
MSD0_SDD0_SMD0

A7
E8
B6
A6
C7
B7

MS_CLK/SD_CLK/SM_EL_WP#
MS_BS/SD_CMD/SM_WE#
MS_DATA3/SD_DAT3/SM_D3
MS_DATA2/SD_DAT2/SM_D2
MS_DATA1/SD_DAT1/SM_D1
MS_SDIO(DATA0)/SD_DAT0/SM_D0

SMRE
SDCMD_SMALE
SDD0_SMD4
SDD1_SMD5
SDD2_SMD6
SDD3_SMD7
SDWP#_SMCE#

CLK_48M_CB

SD_CLK/SM_RE#
SD_CMD/SM_ALE
SD_DAT0/SM_D4
SD_DAT1/SM_D5
SD_DAT2/SM_D6
SD_DAT3/SM_D7
SD_WP/SM_CE#

G5

SC_PWR_CTRL

B4
A3

SM_CLE
XD_CD#/SM_PHYS_WP#

P1
W8

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

M1
M2
M3
M6
M5
N1
N2
N3
P3
R1
R2
P5
R3
T1
T2
W4
W7
R8
U8
V8
W9
V9
U9
R9
V10
U10
R10
W11
V11
U11
P11
R11

C/BE3#
C/BE2#
C/BE1#
C/BE0#

P2
U5
V7
W10

2
0.1U_0402_16V4Z

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

C286
2

2
C301

2
0.01U_0402_25V4Z

+VCC_5IN1

C284
1U_0603_10V4Z

5 IN 1 LED
+5VS

PCI_AD[0..31]

PCI_AD[0..31]

16,18

MSBS_SDCMD_SMWE#

1
R176

2
100K_0402_5%

SMRE

1
R168

2
100K_0402_5%

SDWP#_SMCE#

1
R187

2
100K_0402_5%

SM_RB

1
R167

2
22K_0402_5%

R254
120_0402_5%

D24

5IN1_LED

+VCC_5IN1
D
Q32

2
G

R225
10K_0402_5%

5 In 1 Card Power Switch

+3VS

HT-191NB_BLUE_0603

R182
10K_0402_5%

U9
1
2
3
4

2N7002_SOT23-3

MC_PWRON#

GND
IN
IN
EN#

OUT
OUT
OUT
FLG

R175

1
R169 1

X_OUT R18
X_IN
R19

XO
XI

CLOSE TO CHIP

G2
G3

VR_EN#

K2

16
16
16
16

MC_PWRON#

C309
@ 22P_0402_50V8J

Q23
2
G

2N7002_SOT23-3

PCM_SPK 27
PCI_PIRQE# 16
PCI_PIRQF# 16
PCI_PIRQG# 16
SERIRQ
16,31,35

DEVICE_ID
5IN1_LED
2
R191
2 300_0402_5%
2
300_0402_5%

1
10K_0402_5%

JP36

2 43K_0402_5%

R190
1K_0402_1%

R194
100_0402_5%
8402@

+3VS

R193 1

1 R200
1
R199

SCL
SDA

G1
H5
H2
H1
J1
J2
J3

H3

MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6

SPKROUT

R188
470_0805_5%

5 in 1 CardReader Conn.

R192
1
2
43K_0402_5%

J5

R189
@ 10_0402_5%
DEVICE_ID

CLK_PCI_CB 16
PCIRST# 6,16

C311
0.1U_0402_16V4Z

+3VS

R1233

41

XD-VCC

MSD0_SDD0_SMD0
MSD1_SDD1_SMD1
MSD2_SDD2_SMD2
MSD3_SDD3_SMD3
SDD0_SMD4
SDD1_SMD5
SDD2_SMD6
SDD3_SMD7

33
34
35
36
37
38
39
40

XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7

MSBS_SDCMD_SMWE#
SMELWP#
SDCMD_SMALE
XD_CD#
SM_RB
SMRE
SDWP#_SMCE#
SMCLE

30
31
29
23
25
26
27
28

XD-WE
XD-WP
XD-ALE
XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE

32
24

XD-GND
XD-GND

6.8_0402_5%

X_IN
C788
1P_0402_16VCB

+VCC_5IN1

R1234

6.8_0402_5%
C:Change to 6.18 for EMI solution

1
C304

SUSPEND#

PCI_PERR#
PCI_SERR#
PCI_REQ#2
PCI_GNT#2

CLK_PCI_CB

X_OUT

X2
24.576MHz_16P_3XG-24576-43E1
18P_0402_50V8J

L1
K3
K5
L5

C310
2

18P_0402_50V8J

PCLK
PRST#
GRST#
RI_OUT#/PME#

+VCC_5IN1
CLK_PCI_CB

PCI_PAR 16
PCI_FRAME# 16
PCI_TRDY# 16
PCI_IRDY# 16
PCI_STOP# 16
PCI_DEVSEL# 16

2 R184
1 PCI_AD20
100_0402_5%

R17

PCI7412ZHK_PBGA257
8412@

R14
U13
U14

R174 1
2 CPS
4.7K_0402_5%

VSSPLL

AGND
AGND
AGND

+3VS

U7
R6
W5
V5
V6
U6
N5
R7
W6
L3
L2

R186 6.34K_0402_1%
T18 R0
1
2
T19 R1
XTPBIAS0
R13 TPBIAS0
XTPA0+
V14 TPA0P
XTPA0W14 TPA0N
XTPB0+
V13 TPB0P
XTPB0W13 TPB0N
W17 TPBIAS1
2
1U_0402_6.3V4Z
V16 TPA1P
W16 TPA1N
2 1K_0402_1% V15 TPB1P
2 1K_0402_1%W15 TPB1N
CPS
R12 CPS

PAR
FRAME#
TRDY#
IRDY#
STOP#
DEVSEL#
IDSEL
PERR#
SERR#
REQ#
GNT#

42
18

4 IN 1 CONN

GND
GND

56.2_0402_1%

56.2_0402_1%
2
1

R180

C285
R170

TEST0
CLK_48
PHY_TEST_MA

N.C.
N.C.
TAITW_R007-530-L3

C789
1P_0402_16VCB

47
48

C276

220P_0402_50V8J

R179

R178

R181 1

5.1K_0402_1%

AMP_440168-2

4
3
2
1

5
6
7
8

R177

56.2_0402_1%
2
1

1
JP37

1U_0402_6.3V4Z

+3VS
C280

PCI7412

MSCLK

CLK_48M_CB

56.2_0402_1%

13

2 1K_0402_1% P12
CLK_48M_CB F1
2 4.7K_0402_5%P17

C283
2

4.7U_0805_10V4Z
1U_0603_10V4Z

R173 1

C297

16
16
16
16

PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0

SDCLK

SMCLE
XD_CD#

1
C292

0.1U_0402_16V4Z

1
C320
@ 22P_0402_50V8J

8
7
6
5

G528P1UF_SO8

R196
@ 33_0402_5%

A4
C5
C6
A5
B5
E6
E7

VCCP
VCCP

K1
K19
VR_PORT
VR_PORT

C302

2 2

1
33_0402_5%
1
33_0402_5%
1
22_0402_5%

SD_CD#
MS_CD#
SM_CD#

C343

1 1

2
R213
2
R214
2
R215

MSCLK

E9
A8
B8

0.01U_0402_25V4Z
1

SDCLK

MC_PWR_CTRL_0
MC_PWR_CTRL_1/SM_R/B#

C291

SD_CD#
MS_CD#

DVT:Change R213 and R214 from 22 to 33ohm

C8
F8

VDDPLL_33
VDDPLL_15

U19
P15

P13
P14
U15
AVDD_33
AVDD_33
AVDD_33

MC_PWRON#
SM_RB

PCI8402:5IN1 + 1394

0.1U_0402_16V4Z

0.1U_0402_16V4Z
1

U11B

C288

0.1U_0402_16V4Z
2

0.1U_0402_16V4Z

C298

1 2

C279

0.1U_0402_16V4Z

L26

C275

+3VS

MBK1608301YZF_0603
1
2

0.01U_0402_25V4Z

L25

+CB_VDDPLL33

0.01U_0402_25V4Z

MBK1608301YZF_0603
0.1U_0402_16V4Z
2
1

SD-VCC
MS-VCC

15
9

SD_CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-CMD
SD-CD-SW
SD-CD-COM
SD-WP-SW
SD-WP-COM

16
19
20
11
12
13
21
22
43
44

SDCLK
MSD0_SDD0_SMD0
MSD1_SDD1_SMD1
MSD2_SDD2_SMD2
MSD3_SDD3_SMD3
MSBS_SDCMD_SMWE#
SD_CD#

MS-SCLK
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3
MS-INS
MS-BS
SD-GND
SD-GND
MS-GND
MS-GND

8
4
3
5
7
6
2
14
17
1
10

MSCLK
MSD0_SDD0_SMD0
MSD1_SDD1_SMD1
MSD2_SDD2_SMD2
MSD3_SDD3_SMD3
MS_CD#
MSBS_SDCMD_SMWE#

+VCC_5IN1

SDWP#_SMCE#

B:IALAA only to add Pin47


and Pin48 to link to GND.

Bottom Side, Normal Insertion


Compal Secret Data

Security Classification
2007/3/8

Issued Date

2008/3/8

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Compal Electronics, Inc.


SCHEMATIC MB A3831
Document Number

Rev
D

401498
Thursday, November 25, 2010

Sheet
1

22

of

46

+3VS
0.1U_0402_16V4Z
D

C287

C308

CAD31/D10
CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6
CAD19/A25
CAD18/A7
CAD17/A24
CAD16/A17
CAD15/IOWR#
CAD14/A9
CAD13/IORD#
CAD12/A11
CAD11/OE#
CAD10/CE2#
CAD9/A10
CAD8/D15
CAD7/D7
CAD6/D13
CAD5/D6
CAD4/D12
CAD3/D5
CAD2/D11
CAD1/D4
CAD0/D3

E13
E18
H18
L17

CC/BE3#/REG#
CC/BE2#/A12
CC/BE1#/A8
CC/BE0#/CE1#

H14
E19
G15
F17
G18
F19
H15
G19
C12
C14
G17
A12
A11
F18
E12

CPAR/A13
CFRAME#/A23
CTRDY#/A22
CIRDY#/A15
CSTOP#/A20
CDEVSEL#/A21
CBLOCK#/A19
CPERR#/A14
CSERR#/WAIT#
CREQ#/INPACK#
CGNT#/WE#
CSTSCHG/BVD1(STSCHG#/RI#)
CCLKRUN#/WP(IOIS16#)
CCLK/A16
CINT#/READY(IREQ#)

C15

CRST#/RESET

B12

CAUDIO/BVD2(SPKR#)

N15
B11
A13
B16

CCD1#/CD1#
CCD2#/CD2#
CVS1/VS1#
CVS2/VS2#

E10

A_USB_EN#

F6
F9
F12
F14
J6
J14
L6
L14
P6
P8
P10

DATA/VD2/VPPD1
CLOCK/VD1/VCCD0#
LATCH/VD3/VPPD0

PCI 7412

B9
A9
C9

RSVD/D2
RSVD/VD0/VCCD1#
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD

B10
C4
D1
E1
E2
E3
F2
F3
F5
G6
H17
M19

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

A2
A17
A18
B1
B2
B3
B17
B18
B19
C1
C2
C3
C16
C17
C18
C19
D2
D3
D17
D18
E5
N14
P18
T3
T17
U1
U2
U3
U4
U12
U16
U17
U18
V1
V2
V3
V4
V12
V17
V18
V19
W2
W3
W12
W18

+3VS

R216
2

0_0402_5%
1

F7
F10
F13
G14
H6
K6
K14
M14
N6
P7
P9

8412@ PCI7412ZHK_PBGA257

C303

0.1U_0402_16V4Z

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

C10
A10
F11
E11
C11
B13
C13
A14
B14
B15
E14
A16
D19
E17
F15
H19
J17
J15
J18
K15
K17
K18
L15
L18
L19
M17
M18
N19
M15
N17
N18
P19

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

VCCB
VCCB

U11A

A15
J19

0.1U_0402_16V4Z

Compal Secret Data

Security Classification
2007/3/8

Issued Date

2008/3/8

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Compal Electronics, Inc.


SCHEMATIC MB A3831
Document Number

Rev
D

401498
Thursday, November 25, 2010

Sheet
1

23

of

46

+3VALW_DVD

Mini-Express Card for HDDVD

+3VS

1
C729
@
0.1U_0402_16V4Z
+3VS

1
2

13 CLKREQ_DVD#
13
13

CLK_DVD#
CLK_DVD

11 PCIE_MRX_C_DVDTX_N0
11 PCIE_MRX_C_DVDTX_P0
11 PCIE_MTX_C_DVDRX_N0
11 PCIE_MTX_C_DVDRX_P0
+3VS

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

53

GND1

C423
DVD@
0.1U_0402_16V4Z

+1.5VS
+1.5VS

JP5

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

C391
DVD@
4.7U_0805_10V4Z

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

GND2

54

C725
DVD@
0.01U_0402_25V7K

+3VALW_DVD
R278
R275

NB_RST#
1
R485

2
@ 0_0603_5%

@ 0_0402_5%
@ 0_0402_5%

C723
DVD@
0.1U_0402_16V4Z

1
C724
4.7U_0805_10V4Z

DVD@

+3VALW

Small/B already had ESD IC

SMB_CK_CLK0
SMB_CK_DAT0

SMB_CK_CLK0 8,9,13,17,29
SMB_CK_DAT0 8,9,13,17,29

A51 request to reserve from ISKAA

FOX_AS0B226-S40N-7F
DVD@

Mini-Express Card for WLAN


+3VS

+3V_WLAN

Kill SWITCH
C495
WLAN@
0.01U_0402_25V4Z

C467
WLAN@
4.7U_0805_10V4Z

C469
WLAN@
0.1U_0402_16V4Z

C386
WLAN@
0.1U_0402_16V4Z

C487
4.7U_0805_10V4Z

WLAN@

+3VALW

2
D14

+3VALW

+1.5VS

@ DAN217_SC59
SW5
+1.5VS

+3VS_WLAN

5
4

3
2
1

3
2
1

R246
100K_0402_5%

+3V_WLAN

G2
G1

A: For WLAN Wake up event.


JP7

13
13

PCIE_WAKE#

CLK_WLAN#
CLK_WLAN

10 PCIE_MRX_C_WLANTX_N3
10 PCIE_MRX_C_WLANTX_P3
10 PCIE_MTX_C_WLANRX_N3
10 PCIE_MTX_C_WLANRX_P3

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

53

GND1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

GND2

54

KILL_SW# 31

1BS003-1210L_3P
WLAN@
+3V_WLAN
XMIT_OFF#
NB_RST#

C387 WLAN@ 0.1U_0402_16V4Z


1
2

NB_RST# 11,15,17,25,29,31,35
+3V_WLAN

31 PCIE_WAKE#
30 WLAN_BT_DATA
30 WLAN_BT_CLK
13 CLKREQ_WLAN#

SMB_CK_CLK0
SMB_CK_DAT0

31

WL_OFF#

KILL_SW#

D25

PCIE_WAKE#
2
100K_0402_5%

Y
A

1
R323

C543
WLAN@
0.1U_0402_16V4Z

2
0_1206_5%
WLAN@

C461
WLAN@
0.01U_0402_25V4Z

1
R294

+3VS_WLAN

3G_OFF# 1

XMIT_OFF#

WLAN@ CH751H-40PT_SOD323-2
U15
WLAN@ NC7SZ08P5X_NL_SC70-5

A:Add USB I/F with WLAN conn.,


reserve to support Realtek WLAN.

FOX_AS0B226-S40N-7F
WLAN@

Compal Secret Data

Security Classification
Issued Date

2007/3/8

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Compal Electronics, Inc.


SCHEMATIC MB A3831

Document Number
401498

Thursday, November 25, 2010

Sheet

Rev
D
24

of

46

2
+3V_LAN
R25
3.6K_0402_5%

+3V_LAN

U4
U2
2 0.1U_0402_16V7K

PCIE_PTX_IRX_P2

29

HSOP

2 0.1U_0402_16V7K

PCIE_PTX_IRX_N2

30

HSON

10 PCIE_MTX_C_LANRX_P2

23

HSIP

10 PCIE_MTX_C_LANRX_N2

24

HSIN

26

REFCLK_P

27

REFCLK_N

20

PERSTB

+LAN_CTRL18

VCTRL18

+LAN_CTRL15

63

VCTRL15

64

RSET

19

LANWAKEB

36

ISOLATEB

13 CLK_PCIE_LAN

C:For 8111C only.

13 CLK_PCIE_LAN#
R483
1

11,15,17,24,29,31,35

NB_RST#

+3V_LAN

8111C@
0_0603_5%
+LAN_CTRL15
2

2
D49
MMGZ5226BPT
@

C727
8111C@
0.1U_0402_16V4Z

100M@ R284 1
2
R283

2 2K_0402_1%
1
1G@ 2.49K_0402_1%
EC_PME#
EC_PME#

31
+3VS

R291 1

EEDO
EDDI/AUX
EESK
EECS

2 1K_0402_1%

1
R482

+3V_LAN

+3V_LAN_R

2
0_0603_5%
8111C@

A:For LAN Wake up

+3V_LAN

EC_PME#

2
R31

C429
0.1U_0402_16V4Z
8111B@

DVT: Change to SE074102K80


1LAN_X2
25MHZ_20P
C65

27P_0402_50V8J
2

27P_0402_50V8J

DO
DI
SK
CS

GND
NC
NC
VCC

5
6
7
8

MDIP0
MDIN0
MDIP1
MDIN1

3
4
6
7

LAN_MDI0+
LAN_MDI0LAN_MDI1+
LAN_MDI1-

MDIP2
MDIN2
MDIP3
MDIN3

9
10
12
13

LAN_MDI2+
LAN_MDI2LAN_MDI3+
LAN_MDI3-

VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15

15
21
32
33
38
41
43
49
52
58

CKXTAL1

16
37
53
46

CKXTAL2
GVDD

65

EXPOSE_PAD

25

EGND

VDD33
VDD33
VDD33
VDD33

31

EGND

AVDD33

AVDD33

59

AVDD18
AVDD18
AVDD18
AVDD18

5
8
11
14

EVDD18

22

EVDD18

28

NC
NC
NC
NC
NC
NC
NC
NC
NC

C47

1
0.1U_0402_16V4Z

+3V_LAN
1

C468
0.1U_0402_16V4Z

C450
0.1U_0402_16V4Z

C436
0.1U_0402_16V4Z

R293
2

0_0603_5%
8111B@

C466
0.1U_0402_16V4Z

C440
0.1U_0402_16V4Z

C451
0.1U_0402_16V4Z

C472
0.1U_0402_16V4Z

2
0_0603_5%
8111B@

C454
0.1U_0402_16V4Z

C476
0.1U_0402_16V4Z

C478
0.1U_0402_16V4Z

C459
0.1U_0402_16V4Z

1
L47

0.1U_0402_16V4Z

8101E@ R28
C458 2
1 R27

8101E@
R83
0_0402_5%

0.01U_0402_25V4Z

+3V_LAN

Q42
+LAN_CTRL18

+3V_LAN

Mount for 8111B Only


Q6

+LAN_CTRL15 1

8111B@
2SB1188T100R_SC62-3

40mil
L46
1
2
8101E@ 0_0603_5%

LAN_MDI0LAN_MDI0+

1 49.9_0402_1%
1 49.9_0402_1%

2
2

+LAN_VDD18
1

L78

C444 +
8101E@
22U_A_4VM
2

8111B@
2SB1188T100R_SC62-3

40mil

40mil

1
2
8111C@ 4.7UH_1008HC-472EJFS-A_5%_1008
1
1

C477
0.1U_0402_16V4Z

40mil

1
L48

2
0_0603_5% 1
8101E@
+ C464
8111B@
22U_A_4VM
2

+
C482
8101E@
22U_A_4VM
2

+LAN_VDD15
1

C473
8111B@
1000P_0402_50V7K

+
2

C452
22U_A_4VM

DVT: Change to SE074102K80

LAN_MDI1LAN_MDI1+

Mount for 8111C Only

8101E@

Place Close to Chip

8101E@
R82
0_0402_5%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+AVDD18

8101E@

8111C@
0_0603_5%

B:Reserve for 8111C.

C439

C: Add Inductor 4.7uH

1 49.9_0402_1%
1 49.9_0402_1%

C437

2
0_0603_5%

+LAN_VDD18

8101E@

0.01U_0402_25V4Z

C435

+3V_LAN

+AVDD33
1
C434

10U_0805_10V4Z

C455

R481
2

+3V_LAN

8101E@
2
2

0.1U_0402_16V4Z

0.1U_0402_16V4Z 0.1U_0402_16V4Z
1
1

+LAN_VDD15

+AVDD33

C481

+LAN_VDD15

1
R480

B:Mount for 8101E and 8111B.

Place Close to Chip


R26
R24

C460

+LAN_VDD15
CLKREQ_LAN

10mil

C:Power cap balance.

+AVDD18

8111B@ RTL8111B_QFN64

8101E@
C449 2
1

0.1U_0402_16V4Z

Mount for 8101E Only

+LAN_VDD18

C475

+LAN_VDD18

C66

LAN_LINK#
LAN_ACTIVITY#

62

17
18
35
34
39
40
42
50
51

Y1
LAN_X1 2

54
55
56
57

LED3
LED2
LED1
LED0

61

C438
1000P_0402_50V7K
2
8111B@

1
100K_0402_5%

LAN_X2

15K_0402_5%

B:1.For 8111C only.


2.Chg. 100U to 22Ux2 bec'z no enough space.

60

4
3
2
1

AT93C46-10SI-2.7_SO8

R292
LAN_X1

45
47
48
44

C93

C92

10 PCIE_MRX_C_LANTX_P2
10 PCIE_MRX_C_LANTX_N2

LAN Conn.
JP28
12

Amber LED+

1 300_0402_5%

11

Amber LED-

RJ45_MIDI3-

+3V_LAN
LAN_ACTIVITY#

U23
LAN_MDI3LAN_MDI3+

1
2
3

LAN_MDI2LAN_MDI2+

4
5
6

TCT1
TD1+
TD1TCT2
TD2+
TD2-

MCT1
MX1+
MX1-

24
23
22

MCT2
MX2+
MX2-

21
20
19

TCT3
TD3+
TD3-

MCT3
MX3+
MX3-

18
17
16

RJ45_MIDI1RJ45_MIDI1+

LAN_MDI0LAN_MDI0+

10
11
12

TCT4
TD4+
TD4-

MCT4
MX4+
MX4-

15
14
13

RJ45_MIDI0RJ45_MIDI0+

C121
0.1U_0402_16V4Z
2
1G@

75_0402_1%

C565
68P_0402_50V8J

C:Change for EMI

75_0402_1%
1

R80

PR4+

RJ45_MIDI1-

PR2-

RJ45_MIDI2-

PR3-

RJ45_MIDI2+

PR3+

RJ45_MIDI1+

PR2+

RJ45_MIDI0-

PR1-

RJ45_MIDI0+

PR1+

2 R345
1
300_0402_5%
+3V_LAN

RJ45_GND

10

Green LED-

Green LED+

C166
1
2

1000P_1206_2KV7K

C135
0.1U_0402_16V4Z
1G@

75_0402_1%

SHLD2

16

SHLD1

15

SHLD2

14

SHLD1

13

PR4-

RJ45_MIDI3+

R78

TYCO_3-440470-4
LANGND
1

C141

C174
A

75_0402_1%
2

C120
0.1U_0402_16V4Z
1G@

LAN_LINK#
R81

2
1G@

R84

C118
0.1U_0402_16V4Z

1G@
NS892402

7
8
9

RJ45_MIDI2RJ45_MIDI2+

LAN_MDI1LAN_MDI1+

C601
68P_0402_50V8J

RJ45_MIDI3RJ45_MIDI3+

2 R387

RJ45_GND

0.1U_0402_16V4Z

4.7U_0805_10V4Z

PreMP:Change C118,C120,C121,C135
for EMI solution

Place these components


colsed to LAN chip

GST5009 for GIGA LAN


TST1284 for 10/100 LAN

Compal Secret Data

Security Classification
Issued Date

2007/3/8

2008/3/8

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Compal Electronics, Inc.


SCHEMATIC MB A3831
Document Number

Rev
D

401498
Thursday, November 25, 2010

Sheet
1

25

of

46

HD Audio Codec

+5VALW

+VDDA
+5VALW

VOUT

C376
@

DELAY SENSE or ADJ

ERROR

CNOISE

SD

GND

SI9182DH-AD-T1-E3_MSOP8
@

@ 69.8K_0603_1%

C360
0.1U_0402_16V4Z
@

GMT982

C:BOM structure change for APL5151

R221

C353
@ 4.7U_0805_10V4Z

C753
4.7U_0805_10V4Z

+VDDA

U36

4.75v

VIN

+VDDA

VIN

GND

SHDN#

VOUT

BP

C754

APL5151-475BC-TRL_SOT23-5

+VDDA

1
2

0.1U_0402_16V4Z

U31

C380
4.7U_0805_10V4Z
@

Fix 4.75V Output

R222

SYSON

29,31,33,36,41 SYSON

0.1U_0402_16V4Z

@ 24K_0402_1%

2
C756
0.22U_0402_6.3V6K

C755
@ 4.7U_0805_10V4Z
D

Moat Bridge

+3V_DVDD
+AVDD_HD

27

MIC1_R

MIC1_R

MONO_IN

@
17 AZ_RST_HD#

B:Chg. to link w/ SB600 bec'z chg. to KB926.

HP_SENSE

28

MIC_SENSE

28

LINE_SENSE

R455
R456
R1207
R464

22

MIC1_R

12

PCBEEP

11

RESET#

17
SPK_SEL
17 SUBWOOFER
2
1
39.2K_0402_1%
1
2
20K_0402_1%
1
2
10K_0402_1%
1
2
CAMERA@ 20K_0402_1%
31
28

MIC1_L

SENSE_A
SENSE_B

2
3
13
34

EAPD
SPDIF

SENSE A

SENSE B

1
DVDD

35

LINE_OUT_R

36

AMP_SPK_R

39
41

NC

45

DMIC_CLK

46

NC

43

NC

44

SDATA_IN

AZ_SDIN3_HD_R

29

GPIO1

31

MIC1_VREFO_L

28

MIC1_VREFO_R

32

MIC2_VREFO

30

VREF

27

JDREF

40

NC

33

AVSS1
AVSS2

26
42

SDATA_OUT
GPIO0
GPIO3
SENSE A
SENSE B

47

EAPD

48

SPDIFO

4
7

DVSS1
DVSS2

Codec Signals

39.2K

PORT-A (PIN 39, 41)

20K

PORT-B (PIN 21, 22)

10K

PORT-C (PIN 23, 24)

5.1K

PORT-D (PIN 35, 36)

39.2K

PORT-E (PIN 14, 15)

20K

PORT-F (PIN 16, 17)

10K

PORT-G (PIN 43, 44)

5.1K

PORT-H (PIN 45, 46)

C367
@ 10P_0402_50V8J
AMP_SPK_L 27

SPK output to AMP

AMP_SPK_R 27
C

HP output to AMP

R454
@ 10_0402_5%

AZ_BITCLK_HD 17

1
R453

2
33_0402_5%
AMP_SUB 28

AZ_SDIN3_HD

17

10mil
10mil
10mil
10mil

SPDIF_SENSE 28

C708
@ 10P_0402_50V8J

+MIC1_VREFO_L
+MIC1_VREFO_R
+MIC2_VREFO
C720 1
C721

10U_0805_10V4Z
2

2
100P_0402_25V8K
@

R224
20K_0402_1%

ALC268-GR_LQFP48

Impedance

AZ_BITCLK_HD

AZ_BITCLK_HD

LINE1_VREFO

AMP_HP_R 27

37

AMP_HP_L 27

BIT_CLK

MONO_OUT

HP_OUT_L

SYNC

DGND

Sense Pin

LINE_OUT_L

28

CD_GND

21

10

17 AZ_SYNC_HD
17 AZ_SDOUT_HD

19

680P_0402_50V7K

C368
@ 10P_0402_50V8J
AMP_SPK_L

HP_OUT_R

1
2
+3VS
FBMA-L11-160808-800LMT_0603

28

@ 100P_0402_25V8K
C350 1
2
MIC1_C_L
1
2
C351
1U_0402_6.3V4Z
MIC1_C_R
1
2
C356 1
1U_0402_6.3V4Z
2
C355
100P_0402_25V8K
1
2
C707
100P_0402_25V8K

@
MIC1_L

MIC1_L

10U_0805_10V4Z
1
1
C331
C332
C328

2
2
0.1U_0402_16V4Z

38

25

28

AVDD2

AVDD1

L27

20mil

0.1U_0402_16V4Z
1
C327

L29 1
0.1U_0402_16V4Z
680P_0402_50V7K
2
FBMA-L11-160808-800LMT_0603 1
1
1
1
C373
C372
C359
C366
C371
10U_0805_10V4Z
2
2
2
2
0.1U_0402_16V4Z
U29
100P_0402_25V8K
@
@
CAMERA@
CAMERA@
1 R380
2
1
2
14 NC
+MIC2_VREFO
JP16
4.7K_0402_5%
C3371
2 100P_0402_25V8K
INT_MIC
C3381
1U_0402_6.3V4Z
2
4 NC2 2 2
15 NC
C346
1U_0402_6.3V4Z
2
1
1
2
3 NC1 1 1
C591
C345
100P_0402_25V8K
MIC2_L 16
MIC2_L
CAMERA@ 220P_0402_50V8J
CAMERA@
CAMERA@
ACES_85204-0200N
@
MIC2_R
17 MIC2_R
1
2
C7491
@ LINE1_C_L
2 100P_0402_50V8J
23 LINE1_L
28
LINE1_L
C750
1U_0402_6.3V4Z
LINE1_C_R
1
2
24 LINE1_R
28
LINE1_R
C7511
@
2 1U_0402_6.3V4Z
C752
100P_0402_50V8J
18 CD_L
C714 1
2 1U_0402_6.3V4Z
C711 1
2 100P_0402_50V8J
20 CD_R
+VDDA

DVDD_IO

40mil

AGND

DGND To AGND Bypass


1
R247
1
R207
1
R206

2
0_0603_5%
2
0_0603_5%
2
0_0603_5%

DGND

AGND
Compal Secret Data

Security Classification
2007/3/8

Issued Date

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Compal Electronics, Inc.


SCHEMATIC MB A3831

Document Number
401498

Thursday, November 25, 2010

Sheet
1

Rev
D
26

of

46

+5VS

C325
@ 0.01U_0402_25V4Z

Volume Control
+3VS
R205
100K_0402_5%

+3VS

+HVDD

3
5

2 AMP_RHPIN R458
2.2U_0603_6.3V4Z
2 AMP_LHPIN R459
2.2U_0603_6.3V4Z

1
1

C333
C719

2
C344
1
C336

Gain HP 0dB
SPK 10dB

4
6
26

AMP_BEEP
2
1U_0402_6.3V4Z
AMP_CP+
AMP_CP1
2.2U_0603_6.3V4Z
AMP_BIAS
1
2.2U_0603_6.3V4Z
2
0.1U_0402_16V4Z

HP_R
HP_L

17
18

HP_R
HP_L

CVSS

15

INR_H
INL_H

BEEP

12
14

CP+
CP-

25

BIAS

HVSS

16

GND
PGND
PGND
CGND
GND

2
23
7
13
29

B:Co-Layout for
APA2056A and APA2057A

U28

1
2
3
4
5
6
7

0.1U_0402_16V4Z

C722

5SPK@
R1192
5SPK@
100K_0402_5%

C730

C731
5SPK@
10U_0805_10V4Z
U34

10
15
VOLUME

7
8

R1194
5SPK@
10K_0402_5%

100K_0402_5% 1 R1195 2
5SPK@
LINRIN-

5SPK@

13
6
3

C732

5SPK@
R1193 1
+5VSA
100K_0402_5%

LOUT-

M_SPK_L- 28

16

M_SPK_R- 28

LOUT+

11

M_SPK_L+ 28

ROUT+

14

M_SPK_R+ 28

GND
GND

5
12

VOLMAX
SE/BTL#
LINRINBYPASS

SPK_MUTE

ROUT-

VOLUME

APA2068KAI-TRL_SOP16
C733
5SPK@
2.2U_0805_10V6K
5SPK@
2

AMP_SPK_L

1U_0402_6.3V4Z
1
2
R452
2.4K_0402_5%

+5VS

C734
5SPK@
1
2

R1196 1K_0402_1%
1
2
5SPK@

1U_0402_6.3V4Z

Q60
MMBT3904_SOT23-3

R1197
5.11K_0402_1%
5SPK@

R1216
5SPK@ 100K_0402_5%

HP_EN 2
G

CH751H-40PT_SOD323-2

AMP_SPK_R
Q140
2N7002_SOT23-3

@ R447
10K_0402_5%

D36

C736
33N_0402_16V7K
5SPK@

SPK_MUTE
C737

R448
1
2
560_0402_5%
PCMCIA@

0.47U_0402_6.3V6K
LIN2
C735
5SPK@

MONO_IN 26

R1198 1K_0402_1%
1
2
5SPK@

1U_0402_6.3V4Z
5SPK@

R1199
5.11K_0402_1%
5SPK@

C704
0.01U_0402_25V4Z
PCMCIA@

1
2

R443
1
2
560_0402_5%

C703 1
1U_0402_6.3V4Z
2 PCMCIA@

MUTE
SHUTDOWN#

Pin2 /SD should be tied to 5V always and mute pin controled by EC_EAPD

C706
1
2

CardBus Beep

0.1U_0402_16V4Z

PCM_SPK

VDD
VDD

R446
1
2
560_0402_5%

2
B

22

VOLUME

R451
20K_0402_5%

C701 1
1U_0402_6.3V4Z

SB_SPKR

+5VSA

1
2

PCI Beep
17

C713

2
C702 1
1U_0402_6.3V4Z

BEEP#

14
13
12
11
10
09
08

74LCX74MTC_TSSOP14

EC Beep

VCC
CD2#
D2
CP2
SD2#
Q2
Q2#

28
28

+VDDA

31

CD1#
D1
CP1
SD1#
Q1
Q1#
GND

ENCODER_DIR 31
ENCODER_PULSE 31

+3VS

R445
10K_0402_5%

0.1U_0402_16V4Z

0.01U_0402_25V4Z

74LVC1G14GW_SOT353-5

1
C716

CVSS

APA2057ARI-TRL_TSSOP28

NC

DIP

1
C715

APA2068 Medium Range Amplifier

+5VSA

SET/SD#

28

DIP
H_SPK_L+ 28
H_SPK_L- 28

HP_EN

AMP_RHPIN_L
2
24K_0402_5%
AMP_LHPIN_L
2
EC_EAPD#
24K_0402_5%

8
9

24

26 AMP_HP_L

H_SPK_R+ 28
H_SPK_R- 28

LOUT+
LOUT-

HP_EN

1
2
R462 10K_0402_5%

+3VS
0.1U_0402_16V4Z
C710

1
C709
1
C712

26 AMP_HP_R

22
21

/AMP EN

+5VS

2 100K_0402_5%

ROUT+
ROUT-

27

R223 1

INR_A
INL_A

AMP_EN#

AMPR
2
0.22U_0402_10V4Z
AMPL
2
0.22U_0402_10V4Z
2 100K_0402_5%

1
C340
1
C348
R208 1

COM

AMP_SPK_L

1
CVDD

AMP_SPK_R

26 AMP_SPK_L

U32

SW_XRE094_3P

U30

26 AMP_SPK_R

1
2
R461 10K_0402_5%

0.01U_0402_25V4Z

C374

C718

R457
100K_0402_5%

0.1U_0402_16V4Z

2.2U_0603_6.3V4Z

1U_0402_6.3V4Z

C335

0.1U_0402_16V4Z

C357

680P_0402_50V7K

W=80mil

R460
10K_0402_5%

+5VS

C717
1

+3VS

VDD

R463
10K_0402_5%

SW6

C365

10
20

PreMP: reserve for +HVDD power

PVDD
PVDD

C790

1U_0402_6.3V4Z

W=20mil

0_0603_5%

19

+3VS

0_0603_5%

2
@
2

11

C326
0.01U_0402_25V4Z @

1
R487
1
R486

HVDD

EC_EAPD#
1
+5VS

10U_0805_10V4Z

1 @ 0_0402_5%

10U_0805_10V4Z

R201

28,31 EC_EAPD_R#

28,31

HP_EN

HP_EN

0.47U_0402_6.3V6K
RIN2
C738
5SPK@

2
C739
33N_0402_16V7K
1 5SPK@

A:Set PCMCIA@ on CardBus Beep circuit


B:Remove NSE_DPR circuit, bec'z chg. to KB926.

Compal Secret Data

Security Classification
2007/3/8

Issued Date

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Compal Electronics, Inc.


SCHEMATIC MB A3831

Document Number
401498

Thursday, November 25, 2010

Sheet
E

Rev
D
27

of

46

Tweeter Conn.

10mil

MICROPHONE
IN JACK

+MIC1_VREFO_R

+MIC1_VREFO_L

R242

10mil

4.7K_0402_5%

R243

HLMA-160808-39NKT
HLMA-160808-39NKT

HSPK_L+
HSPK_L-

ACES_85205-04001

1
C384

D17

FOX_JA6033L-5S1-TR

1
C383

J2
JUMP_43X39
@

D6

MIC1_L

1
2
3
4
G5
G6

8
3
6
2
1

MIC1_L_1

2
2

MIC1_L

MIC1_R_1

AGND
J3
JUMP_43X39
@

L18 1
L19 1

H_SPK_L+
H_SPK_L-

L33
1
2
KC FBM-L11-160808-121LMT 0603
L32
1
2
KC FBM-L11-160808-121LMT 0603

@ SM05_SOT23

1
2
3
4
5
6

4
MIC1_R

HSPK_R+
HSPK_RMSPK_R+
MSPK_R-

27
27

26

JP6

MIC1_R

MIC_SENSE

D3

26
26

SM05_SOT23

HSPK_R+
HSPK_R-

HLMA-160808-39NKT
HLMA-160808-39NKT

2
2

220P_0402_50V7K

L9 1
L10 1

H_SPK_R+
H_SPK_R-

220P_0402_50V7K

27
27

JP39
4.7K_0402_5%

2
1
3
@ SM05_SOT23

HEADPHONE OUT JACK

Medium SPK Conn.

JP38
JP18

27

HP_L

ACES_85205-04001

R241
@ 47K_0402_5%

1
3

R244

HPR

2 20_0402_1%

HPL

R240
@ 47K_0402_5%
C381

SM05_SOT23
5SPK@
27
27

L72 1
L73 1

M_SPK_L+
M_SPK_L-

5SPK@

HLMA-160808-39NKT
HLMA-160808-39NKT

2
2

MSPK_L+
MSPK_L-

HP_SENSE

2 20_0402_1%

HP_R
L31 1
2
1
KC FBM-L11-160808-121LMT 0603
HP_L
L30 1
2
1
KC FBM-L11-160808-121LMT 0603

1
C382

8
3
6
2
1
2

HP_R

D39

26

R245
27

AGND

SM05_SOT23

LINE IN JACK

2
1
3

JP51

SM05_SOT23

LINE1_L_1

1
C740

SM05_SOT23 D42

2
1
3

L76 1
L77 1

2
2

@
HLMA-160808-39NKT
HLMA-160808-39NKT

C741

D41

1
2

+3VS

ACES_85204-0200

R1200

AO3413_SOT23

20mil

26

4
7
8
10

SPDIF

INTSPK_SUB+

26

AMP_SUB

HP_EN

1
HP_EN

27,31

C744
100P_0402_50V8J

INTSPK_SUB+

9
2

ACES_20234-0101

INTSPK_SUB-

Normal OPEN

Compal Secret Data

Security Classification
2007/3/8

Issued Date

Deciphered Date

2008/3/8

Title

Compal Electronics, Inc.


SCHEMATIC MB A3831

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom401498
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Thursday, November 25, 2010
Date:
5

JP53

1
2
6
3

SPDIF_PLUG#

+5VSPDIF
U35
SUB@
C745
6 VDD SHUTDOWN# 1
2.2N_0603_100V7K
22K_0402_1%
1 SUB@ 2
1
2
3 IN+
Vo+ 5
R1205
R1204
C746
1
2
1 R1206 2
4 INVo- 8
SUB@ 56K_0402_1%
SUB@ 12K_0402_1%
SUB@ 2.2U_0603_6.3V6K
1
2
2 BYPASS
GND 7
C747
GND 9
SUB@ 0.022U_0402_16V7K
APA3011XA-TRL_MSOP8
SUB@
C748
SUB@ 2.2U_0603_6.3V6K

Q136

APA3011 Subwoofer Amplifier

C743
SUB@
10U_0805_10V4Z

1
D43

S/PDIF OUT JACK

100K_0402_5%

C742

R1201

2
CH751H-40_SC76

26 SPDIF_SENSE
G

0.1U_0402_16V4Z
SUB@

AGND

+5VS

100K_0402_5%

+5VS
5SPK@ 0_0603_5%
1
2
R218 1
2
R233 2SPK@ 0_0603_5%

7
FOX_JA6033L-5S1-TR

JP52
SPK_SUB+
SPK_SUB-

INTSPK_SUB+
INTSPK_SUB-

3
6
2
1
SM05_SOT23

LINE1_L

LINE1_R_1

26

4
LINE1_R
L74
1
2
KC FBM-L11-160808-121LMT 0603
LINE1_L
L75
1
2
KC FBM-L11-160808-121LMT 0603

LINE1_R

LINE_SENSE

220P_0402_50V7K

26
26

220P_0402_50V7K

Sub-woofer Conn.

+5VSA
+5VS

D18
@

D40

7
FOX_JA6033L-5S1-TR

MSPK_R+
MSPK_R-

10P_0402_50V8J

5SPK@

HLMA-160808-39NKT
HLMA-160808-39NKT

2
2

10P_0402_50V8J

L70 1
L71 1

M_SPK_R+
M_SPK_R-

1
2
3
4
G5
G6

5SPK@
27
27

1
2
3
4
5
6

HSPK_L+
HSPK_LMSPK_L+
MSPK_L-

Sheet
1

Rev
D
28

of

46

+5VS

MDC 1.5 Conn.

Place Components closely to ODD Conn.

ODD CONN
1

+3V_SB

1000P_0402_50V7K

C563
MDC@ 0.1U_0402_16V4Z

C562
MDC@ 4.7U_0805_10V4Z

2 IDE_SDIORDY
4.7K_0402_5%

1
R382

17

SIDERST#

2
R357

1
MDC@ 33_0402_5%

GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK

2
4
6
8
10
12
C571

GND
GND
GND
GND
GND
GND
13
14
15
16
17
18

1 1

@ 10_0402_5% @ 10P_0402_50V8J
MDC@
ACES_88018-124G

+3V_SB

C315
NEW@
0.1U_0402_16V4Z

1
C305
@ 10U_0805_10V4Z

10

1
C307
@ 10U_0805_10V4Z

2 @ 0.1U_0402_16V4Z
2 @ 0.1U_0402_16V4Z
SIDE_RST#
IDE_SDD7
IDE_SDD6
IDE_SDD5
IDE_SDD4
IDE_SDD3
IDE_SDD2
IDE_SDD1
IDE_SDD0

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
53

17 IDE_SDIOW#
IDE_SDIORDY
17 IDE_SDIORDY
17
INT_IRQ15
17
IDE_SDA1
17
IDE_SDA0
17 IDE_SDCS1#
2
1
+5VS
R374
100K_0402_5% +5VS

+1.5VS

C306
NEW@
0.1U_0402_16V4Z

U20C

SIDE_RST#

SN74LVC08APW_TSSOP14

JP29
C771 1
C773 1

AZ_BITCLK_MD 17

Connector for MDC Rev1.5

0.1U_0402_16V4Z

IDE_SDD[0..15]

17 IDE_SDD[0..15]

R358

+3VS

NB_RST#

NB_RST#

+3V_SB

JP14

17 AZ_SYNC_MD
17 AZ_SDIN0_MD
17 AZ_RST_MD#

0.1U_0402_16V4Z
2

11,15,17,24,25,31,35

1
3
5
7
9
11

+3VS

DVT: Change to SE074102K80

17 AZ_SDOUT_MD

1
C580

0.1U_0402_16V4Z
+3VS

14

C569

10U_0805_10V4Z
2

1
C578

1
C579

1
C586
C585
10U_0805_10V4Z

C317
NEW@
0.1U_0402_16V4Z

C318
@ 10U_0805_10V4Z

2
R348

1 SEC_CSEL
470_0402_5%

@ 0.1U_0402_16V4Z
@ 0.1U_0402_16V4Z
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
54

2
2

1 C772
1 C774

IDE_SDDREQ 17
IDE_SDIOR# 17
IDE_SDDACK#
IDE_PDIAG#

W=80mils

17

R363
2
+5VS
100K_0402_5%
IDE_SDA2 17
IDE_SDCS3# 17
+5VS

C584 0.1U_0402_16V4Z

SUYIN_800194MR050S110ZL
+3VALW_CARD

+3VS_CARD

Imax = 0.275A
C312
NEW@

C313
NEW@
10U_0805_10V4Z

Imax = 1.35A
C321
NEW@
0.1U_0402_16V4Z

A:This symbol is for IALAA


only, to add these two
pins for Boss Hole.

+1.5VS_CARD

C316
NEW@
10U_0805_10V4Z

Imax = 0.75A
1

C323
NEW@
0.1U_0402_16V4Z

C322
NEW@
10U_0805_10V4Z

0.1U_0402_16V4Z

B:relink DC030006O00.
JP20

+3V_SB
17
17

U12

1
R203

2EXP_CPPE#
100K_0402_5%

+3VS

+3V_SB

share with USB OC PIN


need always pull high

+1.5VS

CP_USB#
EXP_CPPE#
15,31,36,39 SUSP#
26,31,33,36,41 SYSON

2
B

Q22
2N7002_SOT23-3
NEW@

2
G
3

RCLKEN

G Vcc

CLKREQ#

R183
NEW@
10K_0402_5%

C300
NEW@
0.1U_0402_16V4Z

3.3Vout1
3.3Vout2

1.5Vin1
1.5Vin2

14
15
4
3
2

CPUSB#
CPPE#
STBY#
SHDN#
SYSRST#

7
8

Aux_out

20

1.5Vout1
1.5Vout2

16
17

OC#

23

RCLKEN
PERST#

22
9

3.3Vaux_in

18
19

GND

R185
NEW@
10K_0402_5%

21

3.3Vin1
3.3Vin2

11

+3VS

+3VS

+3VS

NB_RST#

5
6

60mils

USBP9USBP9+

CP_USB#

+3VS_CARD
8,9,13,17,24 SMB_CK_CLK0
8,9,13,17,24 SMB_CK_DAT0
+1.5VS_CARD

40mil
+3VALW_CARD

16,31 EC_SWI#
+3VALW_CARD

40mil
+1.5VS_CARD

PERST#

+3VS_CARD

17 EXP_CPPE#
13 CLK_NEW#
13 CLK_NEW

RCLKEN
PERST#

CLKREQ#
EXP_CPPE#

11 PCIE_MRX_C_NEWTX_N1
11 PCIE_MRX_C_NEWTX_P1

NC1
NC2
NC3
NC4
NC5

2 CP_USB#
NEW@100K_0402_5%

1
10
12
13
24

1
R204

11 PCIE_MTX_C_NEWRX_N1
11 PCIE_MTX_C_NEWRX_P1

NEW@
TPS2231PWPR_PWP24

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

GND
USB_DUSB_D+
CPUSB#
RSV
RSV
SMB_CLK
SMB_DATA
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLK- GND
REFCLK+ GND
GND
PERn0
PERp0
GND
GND
PETn0
GND
PETp0
GND

27
28

GND
GND

C:Swap PCIE Tx/Rx signals.

U10

NEW@

NC7SZ32P5X_NL_SC70-5
NEW@

C:Chg. PN to SB770020010.

31
32

29
30

TYCO_1759056-1

CLKREQ_NEW# 13

Compal Secret Data

Security Classification
Issued Date

2007/3/8

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Compal Electronics, Inc.


SCHEMATIC MB A3831

Document Number
401498

Thursday, November 25, 2010

Sheet

Rev
D
29

of

46

17
17

1
2
G
D_CAM@
2N7002_SOT23-3

USBP8+

VIN

1
L21

USBP1+_R

Q141
D_CAM@
AO3413_SOT23

Q142
S

IO2 GND

VIN

IO1

IO2 GND

L24

4
17
17

USBP0+
USBP0-

USBP1-_R

D9
USBP0+_R
USBP0-_R
USBP0+_R

WCM2012F2S-900T04_0805
+5VALW

IO1

D7

USBP1+_R
USBP1-_R

+5VALW

D32

@ PRTR5V0U2X_SOT143-4

C782
D_CAM@
+CAM_VDD
1000P_0402_50V7K
1
DVT:Change to SE074102K80

CAM_PW

+5VS

R1224
1
2
D_CAM@
100K_0402_5% 2

ACES_88266-05001
CAMERA@
17

+5VALW

D_CAM@
R1223 1M_0402_5%

USBP8USBP8+

+5VALW

USBP1+
USBP1-

1
2
3
4
5
6
7

1
2
3
4
5
GND1
GND2

C566
0.1U_0402_16V4Z
CAMERA@

+5VALW

WCM2012F2S-900T04_0805

4
17
17

+5VS

JP11

1
2
R484 CAMERA@ 0_0603_5%
1
2
R343 @
0_0603_5%

W=20mils

+5VALW

USB CONN.

+CAM_VDD

Int.Check
Camera
Conn
5VS or 3VS

VIN

IO1

IO2 GND

USBP0-_R

@ PRTR5V0U2X_SOT143-4
+USB_VCCC

USBP8-

U7

1
2
3
4

@ PRTR5V0U2X_SOT143-4
C231
@ 4.7U_0805_10V4Z

GND
IN
IN
EN#

OUT
OUT
OUT
FLG

8
7
6
5

G528P1UF_SO8

C672
0.1U_0402_16V4Z
DVT:Change to SE074102K80

+3VS
DVT: Update CIR Footprint to IR_TSOP6238-TR_4P
C598
FP@
0.1U_0402_16V4Z

CIR
+5VALW
31

Fingerprint Conn

2 R230
1
CIR@ 100_0805_5%

CIR_IN

VCC

ROUT

+USB_VCCC

+USB_VCCC

W=120mils

1
2

C681
150U_Y_6.3VM

JP17

1
2
3
4
5

USBP2USBP2+

GND

CIR@

17
17

GND

USB_EN#

U33
C375
1
CIR@
4.7U_0805_10V4Z 2

31

USB_EN#

1
C643

2
2
0.1U_0402_16V4Z

1
2
3
4

USBP1-_R
USBP1+_R

10
12

D34

USBP2+

VIN

IO1

IO2 GND

1
C677

C674

0.1U_0402_16V4Z
1000P_0402_50V7K
2
2

+3VS

C653 +
@ 150U_D2_6.3VM

JP30

FP@ACES_85201-0505

TSOP6238TR_4P

C644

1000P_0402_50V7K
2

USBP2-

VCC VCC
D0- D1D0+ D1+
VSS VSS

5
6
7
8

G2
G4

9
11

G1
G3

USBP0-_R
USBP0+_R

SUYIN_020122MR008S506ZL_8P

@ PRTR5V0U2X_SOT143-4

BlueTooth Interface
+3VS

USB Small Board

+5VS

R346

+USB_VCCA

USB_EN#

+BT_VCC
1
Q51
DVT: Change to SE074102K80
BT@
2N7002_SOT23-3

1
2
3
4

C705

+USB_VCCB

GND
IN
IN
EN#

+USB_VCCA
JP22

OUT
OUT
OUT
FLG

8
7
6
5

G528P1UF_SO8
@ 4.7U_0805_10V4Z

+5VALW

JP12
17
USBP3+
17
USBP324 WLAN_BT_CLK
17
BT_DET#
31
BT_RST#
24 WLAN_BT_DATA
+BT_VCC

(MAX=200mA)
BT_DETACH

1
2
3
4
5
6
7
8
9
10

1
2

Q52
BT@AO3413_SOT23

R477
BT@4.7K_0402_5%

2
G
3

W=80mils
+5VALW

BT_PWR

C557
BT@
0.1U_0402_16V4Z

U27
D

1
2
2
BT@ 100K_0402_5%
2
BT@
C558
1000P_0402_50V7K

31

R347
1M_0402_5%
BT@

C570
BT@

C567
BT@

+5VALW

1
2
3
4
5
6
7
8
9
10

+USB_VCCB
U37

USB_EN#
C757
@ 4.7U_0805_10V4Z

1
2
3
4

GND
IN
IN
EN#

OUT
OUT
OUT
FLG

8
7
6
5

G528P1UF_SO8

17
17
17
17

USBP5USBP4+
USBP5+
USBP4-

17
17
17
17

USBP7USBP6+
USBP7+
USBP6-

ACES_87213-1000
BT@

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

Aces_88242-2001_20P

10U_0805_10V4Z 0.1U_0402_16V4Z

Compal Secret Data

Security Classification
Issued Date

2007/3/8

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Compal Electronics, Inc.


SCHEMATIC MB A3831

Document Number
401498

Thursday, November 25, 2010

Sheet

Rev
D
30

of

46

DVT:Change to SE074102K80

+3VALW
+3VALW

0.1U_0402_16V4Z
1
2
C540

2
2
0.1U_0402_16V4Z

C546

2
2
0.1U_0402_16V4Z

C575
1
2 ECAGND

2
C600
C551
1000P_0402_50V7K1000P_0402_50V7K
1

0.1U_0402_16V4Z

CLK_PCI_EC

16
16
16,22,35
16,35
16,35
16,35
16,35
16,35

R339
@ 10_0402_5%

1
C553
@ 22P_0402_50V8J

1
2
3
4
5
7
8
10

GATEA20
EC_KBRST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

CLK_PCI_EC 12
13
ECRST#
37
20
38

16 CLK_PCI_EC
11,15,17,24,25,29,35 NB_RST#

17 EC_SCI#
36 STB_WLAN
+3VALW

R340
47K_0402_5%
2
1

2
C561

ECRST#

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

77
78
79
80

SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47

33,34

KSI[0..7]

33,34

KSO[0..17]

KSI[0..7]
KSO[0..17]

BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43

63
64
65
66
75
76

DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F

68
70
71
72

PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F

83
84
85
86
87
88

DA Output
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49

PS2 Interface

SDICS#/GPXOA00
SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0

97
98
99
109

SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#

119
120
126
128

CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59

73
74
89
90
91
92
93
95
121
127

1
2
3
4

8
7
6
5

32,38
32,38
6,15
6,15

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11

100
101
102
103
104
105
106
107
108

PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7

110
112
114
115
116
117
118

V18R

124

INVT_PWM 15
BEEP#
27
ENCODER_DIR
ACOFF 39
BATT_TEMPA

SPI Flash ROM

GPIO
SM Bus

1
C587

MODE#
2
100K_0402_5%

STRAP

BTN_ID

EC_EAPD_R# 27,28
USB_EN# 30
WL_BT_LED# 33
SATTLATE_LED# 33
TP_CLK 34
TP_DATA 34
CLK_RESET_R 13

2 R471

+3VALW

1
100K_0402_5%

+5VS

EC_SI_SPI_SO 32
EC_SO_SPI_SI 32
EC_SPICLK 32
SPI_CS# 32

ACIN_R

2
R383

TP_CLK
1
4.7K_0402_5%
TP_DATA
1
4.7K_0402_5%

1 4.7K_0402_5%
STB_LAN 36
STB_SB 36
VGATE 43

CIR_IN

39

1
R470

Analog BTN ID definition,


Please see page 3.

DAC_BRIG 15
EN_DFAN1 35
IREF
39
EN_DFAN2 35

TP_CLK
TP_DATA

ADP_I

2
0.22U_0402_10V4Z
+3VALW

MODE# 33
KILL_SW# 24
BTN_ID 33

BTN_ID

R364
100K_0402_5%
1
2

ADP_IR

27

ECAGND
1
0.01U_0402_25V4Z

BATT_TEMPA 38
BATT_OVP 39

ADP_IR
MODE#

SPI Device Interface

+5VALW
RP17

21
23
26
27

PWM Output

PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D

55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82

33,34 EC_REVBTN#

INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13

AD

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

33,34 EC_PLAYBTN#
33,34 EC_STOPBTN#
33,34 EC_FRDBTN#

1
0.1U_0402_16V4Z

GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC & MISC

BATT_TEMPA
2
C574

AVCC

VCC
VCC
VCC
VCC
VCC
VCC

U24

L55
2
1
0_0603_5%

67

0.1U_0402_16V4Z
1 C572
1
C582

9
22
33
96
111
125

CIR_IN 30
ENCODER_PULSE 27
FSTCHG 39
BATT_FULL_LED# 33
CAPS_LED# 34
BATT_CHG_LOW_LED# 33
POWER_LED# 33
SYSON
26,29,33,36,41
VR_ON 43

CIR_IN

2
R338
2
R337

1 R1226 2
10K_0402_5%

+3VALW

DVT:Add Pull high resistor


+3VALW

2
R341

1
100K_0402_5%

D33
33,37

ACIN

ACIN_R

2
CH751H-40PT_SOD323-2

4.7K_0804_8P4R_5%

R315

EC_RSMRST# 17
EC_LID_OUT# 17
EC_ON
33
EC_SWI# 16,29
SB_PWRGD 6,16
BKOFF# 15
WL_OFF# 24
ALI/MH# 38,39
VLDT_EN 36

+3VALW

IE_BTN#
2
100K_0402_5%

NB_PWRGD 11

ENBKL

EAPD
26
EC_THERM# 17
BT_PWR 30
BT_RST# 30
IE_BTN# 33

IE_BTN#

ENBKL

AGND

XCLK1
XCLK0

69

15P_0402_50V8J

1
IN

OUT

NC

NC

1
C542
Y5

122
123

GND
GND
GND
GND
GND

CRY1
CRY2

15P_0402_50V8J
A

GPI

2CRY2

@ 20M_0603_5%

C541

PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A

11
24
35
94
113

CRY1

6
14
15
16
17
18
19
25
28
29
30
31
32
34
36

16 PM_SLP_S3#
16 PM_SLP_S5#
17 EC_SMI#
33 LID_SW#
15,29,36,39 SUSP#
16 PBTN_OUT#
25 EC_PME#
24 PCIE_WAKE#
35 FAN_SPEED1
35 FAN_SPEED2
35 E51_TXD
35 E51_RXD
33 ON/OFFBTN#
33 PWR_SUSP_LED
34 NUM_LED#

1
R330

2
0_0402_5% VGA@

1
R1173

VGA_ENBKL 15

2
0_0402_5% UMA@

1
R1174

UMA_ENBKL 11

2
@ 2K_0402_5%

1
R1175

KB926QFA1_LQFP128_14X14

ECAGND

32.768KHZ_12.5P_1TJS125BJ4A421P

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/3/8

Issued Date

DVT: Change value from 27p to 15p

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC MB A3831
Rev
D

401498

Date:

Thursday, November 25, 2010

Sheet
1

31

of

46

+3VALW
+5VALW

C527 TEST@

+5VALW
R318
100K_0402_5%

A0
A1
A2
GND

1
2
3
4

R325

INT_SPI_CS#

100K_0402_5%

TEST@ 22_0402_5%

AT24C16AN-10SU-2-7_SO8

U21

R303

VCC
WP
SCL
SDA

G Vcc

8
7
6
5

0.1U_0402_16V4Z

U22

31,38 EC_SMB_CK1
31,38 EC_SMB_DA1

0.1U_0402_16V4Z C538
1
2

B
A

2
1

INT_FLASH_EN#

R305 TEST@
100K_0402_5%
2

SPI_CS#

NC7SZ32P5X_NL_SC70-5
TEST@
Add BOM structure for MP

SPI Flash (8Mb*1)


B:Chg. to SPI ROM.
+3VALW

C507
0.1U_0402_16V4Z

Add BOM structure for MP


31

EC_SPICLK

31 EC_SO_SPI_SI

SPI_CS#

1
R472
EC_SPICLK
1
R473
2
R474

20mils
U19

INT_SPI_CS#
2
0_0402_5% MP@
SPI_CLK_R
2
0_0402_5%
1 EC_SO_SPI_SI_R
0_0402_5%

VCC

HOLD

VSS

EC_SI_SPI_SO_R

2
R475

1
0_0402_5%

EC_SI_SPI_SO 31

SST25LF080A_SO8-200mil

JP50
31 SPI_CS#
17 SB_INT_FLASH_SEL

EC_SI_SPI_SO_R

1
3
5
7

1
3
5
7

2
4
6
8

2
4
6
8

INT_FLASH_EN#
SPI_CLK_R
EC_SO_SPI_SI_R

+3VALW

@ E&T_2941-G08N-00E~D

C:Chg. PN to LTC00000200

Compal Secret Data

Security Classification
Issued Date

2007/3/8

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Compal Electronics, Inc.


SCHEMATIC MB A3831

Document Number
401498

Thursday, November 25, 2010

Sheet

Rev
D
32

of

46

For debug only

D2
MODE#

31

51_ON#

IE_BTN#
51_ON#

BTN

+3VALW

TOP

100K_0402_5%

ON/OFFBTN_R# 1

1
EC_ON

ACIN

3
2
2
300_0402_5%

1
R232

2
2
120_0402_5%

2
G

Q30

1
D

BATT_FULL_LED#
1
HT-191NB_BLUE_0603

BATT_FULL_LED# 31

R234 1

2 300_0402_5% 2

C377

VDD

VOUT

LID_SW#

31

C378

26,29,31,36,41

PWR_SUSP_LED 31

POWER LED
3

SYSON

2
G

Q31
10K

1
D

Q26
2N7002_SOT23-3
3

POWER_LED# 31

WL&BT LED

DTA114YKAT146_SOT23-3

WL_BT_LED# 31

D26

VF=1.9V
1
WLAN@ HT-191UD_AMBER_0603

1
HT-191UD_AMBER_0603

+5VALW

47K

1
2
2
R250 WLAN@ 300_0402_5%

D21

1
BATT_CHG_LOW_LED# 31

D27

+5VS

D19
RLZ20A_LL34

C358
0.01U_0402_25V4Z

DTA114YKAT146_SOT23-3

BATT_CHG_LOW_LED#
1
HT-191UD_AMBER_0603

D38

SYSON

Q27
2N7002_SOT23-3
3
S

10K

D22

1
R231

2N7002_SOT23-3

BATT CHARGE/FULL LED


+5VALW

SYSON

47K

2
G
1
HT-191NB_BLUE_0603

Q38
2N7002_SOT23-3
S

R236
47K_0402_5%

SUSPEND LED

31,37

2
2
120_0402_5%

1
R252

+5VALW

37

R251
10K_0402_5%

+5VALW

2
G
3

31

Q37
1

51_ON#

DAN202UT106_SC70-3

SMT1-05-A_4P

ACES_85201-1005N

D20

51_ON#

AC IN LED

U14
APX9132ATI-TRL_SOT23-3

ON/OFFBTN# 31

GND

D13

KSO0

31,34 EC_PLAYBTN#
31,34 EC_STOPBTN#
31,34 EC_FRDBTN#
31,34 EC_REVBTN#
31
BTN_ID

1
2
3
4
5
6
7
8
9
10
GND
GND

6
5

ON/OFFBTN_R# 1
IEBTN#
2
3
MODEBTN#
4
KSI1
5
KSI2
6
KSI3
7
KSI5
8
9
10
11
12

Add BOM structure for MP


SW1 TEST@
JP2

31,34

+3VALW
+3VALW

R228

DAN202UT106_SC70-3

0.1U_0402_16V4Z

DAN202UT106_SC70-3

31

IEBTN# 1

Lid SW
2

D1

Power Button

SW/LED Connector
MODEBTN#

10P_0402_50V8J

1
R235

2
120_0402_5%

1
HT-191NB_BLUE_0603

+5VS

Satellite LED

Q130
2N7002_SOT23-3

HDD LED
1

47K

1
2
R253
120_0402_5%

HT-191NB_BLUE_0603
10K

Q33
SATEL@
DTA114YKAT146_SOT23-3
2

SATTLATE_LED# 31

3
Q131
2N7002_SOT23-3

D15

1
100K_0402_5%

2
G

2
R476

2
G

+5VS

D23

HDD_LED# 17

1
R238

2
SATEL@ 100_0402_5%

VF=2.8V
1

SATEL@ 12-21-BHC-ZL1M2RY-2C_BLUE
D16

1
R239

2
SATEL@ 100_0402_5%

SATEL@

1
A

12-21-BHC-ZL1M2RY-2C_BLUE

Compal Secret Data

Security Classification
2007/3/8

Issued Date

Deciphered Date

2008/3/8

Compal Electronics, Inc.

Title

SCHEMATIC MB A3831

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom401498
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Thursday, November 25, 2010
Date:
5

Sheet
1

Rev
D
33

of

46

KEYBOARD CONN.

KSO2
KSI[0..7]

KSI[0..7]

KSO[0..17]

TP CONN.
JP15

12
11
10
9
8
7
6
5
4
3
2
1

+5VS
31
31

TP_DATA
TP_CLK

TP_DATA
TP_CLK

SW_R

SW_L

12 G2
11
10
9
8
7
6
5
4
3
2
1 G1

14
SW_R
SW_L
TP_DATA
TP_CLK

1
C573
1
C564
1
C583
1
C581

2
@ 33P_0402_50V8J
2
@ 33P_0402_50V8J
2
@ 33P_0402_50V8J
2
@ 33P_0402_50V8J

13

E&T_6701-Q12N-00R

TP Button
SW2
SW_L

SW3

SW_R

SMT1-05-A_4P

6
5

6
5

SMT1-05-A_4P

31,33

KSO1

KSO[0..17] 31,33

KSO0

DVT: Modify KSO[0..17]

JP19

34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

KSO16

1
2
R389 300_0402_5%

KSO4

+3VS

KSO3

KSO17

KSO5
KSO14

KSO2
KSO1
KSO0
KSO4
KSO3
KSO5
KSO14
KSO6
KSO7
KSO13
KSO8
KSO9
KSO10
KSO11
KSO12
KSO15
KSI7
KSI2
KSI3
KSI4
KSI0
KSI5
KSI6
KSI1
CAPS_LED#
NUM_LED#

KSO6
KSO7
KSO13
KSO8
KSO9
KSO10
KSO11
KSO12
KSO15
KSI7
KSI2
KSI3

2
1
R388 300_0402_5%

+3VS
CAPS_LED# 31

KSI4
KSI0

NUM_LED# 31

ACES_88170-3400

KSI5
KSI6
KSI1
CAPS_LED#
KSO16
NUM_LED#
KSO17

1
C630
1
C616
1
C629
1
C615
1
C628
1
C614
1
C627
1
C613
1
C626
1
C612
1
C625
1
C611
1
C624
1
C610
1
C623
1
C609
1
C622
1
C608
1
C621
1
C607
1
C620
1
C606
1
C619
1
C605
1
C604
1
C618
1
C617
1
C758

2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K

@
@
@

For EMI Request

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/3/8

Issued Date

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC MB A3831
Rev
D

401498

Date:

Thursday, November 25, 2010

Sheet
1

34

of

46

+5VS

FAN1 Conn

FD2

FAN1_ON

Q46
AO3409_SOT23

JP8

+FAN1

5
4

GND
GND

3
2
1

3
2
1

FD8

1
@

FD9

1
@

1
@

FD10

FD11

1
@

FD12

1
@

1
@

FD13

1
@

FD14

1
@

FD15

FD16

1
@

1
@
1

1
FD7

R308
@ 10K_0402_5%

FD6

D30
1SS355_SOD323-2

FD5

8
P
G

PU5B
R313
2
1
0 7
100_0402_5%
P@ LM358DT_SO8

FD3

@
S

FBFAN
1
10K_0402_5%
ENFAN
1
10K_0402_5%

2
R309
2
R281

31 EN_DFAN1

VS

H14
H_C315D118

H15
H_C315D118

H16
H_C315D157

H17
H_C315D157

H19
H_R197X102D126X24

H20
H_C276D157

H23
H_C236D87

H24
H_C236D87

H25
H_C236D87

H26
H_C236D87

H27
H_C236D87

H21
H_C276D157

3
2
1

GND
GND

3
2
1

H41
H_C315D157

H29
H_C236D126

H30
H_C236D126

H31
H_C236D138

H32
H_C197D118

H33
H_C236D118

H34
H_C236D118

VGA@ ACES_85205-03001

C760

31 FAN_SPEED2

@ 1000P_0402_50V7K

5
4

1
2
R1213 VGA@ 10K_0402_5%

+3VS

D45

C759
VGA@ BAS16_SOT23-3
VGA@ 22U_B_10VM
2

2
VGA@ 5.1K_0402_5%

JP54

1
R1212

H13
H_C315D118

1
1

H12
H_C315D118

D44
1SS355_SOD323-2
VGA@

+FAN2

H11
H_C315D118

R1211
@ 10K_0402_5%

H10
H_C315D118

Q137
AO3409_SOT23
VGA@

H9
H_C315D118

FAN2_ON

8
P

U38A
R1209
1
0 1VGA@2100_0402_5%
VGA@ LM358DT_SO8

H8
H_S394D118

C532
0.01U_0402_50V7K
DVT:Del@ and Change to 0.01u

FBFAN2
2
1
R1208 VGA@ 10K_0402_5%
ENFAN2
2
1
R1210 VGA@ 10K_0402_5%

31 EN_DFAN2

H7
H_C315D118

+5VS

FAN2 Conn

VS

H6
H_S394D118

31 FAN_SPEED1

2
10K_0402_5%

1
R312

+3VS

ACES_85205-03001
C531
@ 1000P_0402_50V7K

H5
H_S394D118

H4
H_S394D118

C508
22U_B_10VM

2
5.1K_0402_5%

H3
H_S394D118

1
R314

H2
H_S394D126

D31
BAS16_SOT23-3

LPC_AD0

10

LPC_AD1
LPC_FRAME#

M1
H_C79D79N

M2
H_C79D79N

M3
H_C79D79N

M4
H_C79D79N

M5
H_C79D79N

M6
H_C79D79N

M7
H_C150D150N

LPC_DRQ1# 16

NB_RST# 11,15,17,24,25,29,31

R85

M15
R80x100
@

M16
R80x100
@

M17
R80x100
@

M18
R80x100
@

M14
R80x100

M13
R80x100

VGA@ LM358DT_SO8

M19
R80x100
@

M21
R80x100
@

22P_0402_50V8J

M20
R80x100

M22
R80x100
@

M23
R80x100
@

M24
R80x100
@

M25
R80x100
@

U38B
0 7

For EC

1
C781

CLK_PCI_SIO2 R1222 1 2
22_0402_5%

CLK_14M_SIO 13

JP13

1
2
3
4

1
2
3
4

E51_RXD
E51_TXD

+5VALW

Compal Secret Data

Security Classification

@ ACES_85205-0400

@ ACES_85201-2005

LPC Debug card


LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ1#
NB_RST#
2 @ 0_0402_5%
CLK_PCI_SIO
SERIRQ

M11
H_O256X150D256X150N

M12
R80x100

LPC Debug Port

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

M10
H_O256X150D256X150N

1
C692

M9
H_C106D106N

22P_0402_50V8J

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

M8
H_C339D339N

2 R424
1 2
22_0402_5%

JP10

LPC_AD0 16,31
CLK_PCI_SIO 16

@ DEBUG_PAD

+3VS

LPC_AD2 16,31

16,31 LPC_FRAME#

LPC_AD2

H40
H_C236D87

H39
H_C236D87

LPC_AD1

16,31

LPC_AD3

H38
H_C276D157

LPC_AD3

16,31

2
R426
0_0402_5%
NB_RST#

LPC_DRQ1#

16,22,31 SERIRQ

1
R450
0_0402_5%

H37
H_C276D157

E51_TXD 31

SERIRQ

R449
@ 0_0402_5%
1
2

E51_TXD

E51_RXD

E51_RXD

DVT:Del@ and Change to 0.01u

R428
@ 0_0402_5%
2

H36
H_R197X102D126X24

31

H35
H_R197X102D126X24

H42

+3VALW

C761
VGA@ 0.01U_0402_50V7K

2007/3/8

Issued Date

Deciphered Date

2008/3/8

Title

Compal Electronics, Inc.


SCHEMATIC MB A3831

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom401498
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Thursday, November 25, 2010
Date:
B

Sheet
E

Rev
D
35

of

46

330K_0402_5%
Q43
Q44
SUSP 2
2
2N7002_SOT23-3
G
G
2N7002_SOT23-3

SUSP
2
2
G
G
Q35
2N7002_SOT23-3
2N7002_SOT23-3

1
1
3
2

1
1

10U_0805_10V4Z

10U_0805_10V4Z

1
1

+1.5VS
R29
STAR@
470_0805_5%

+5VALW

Change to 0603 50V7K

STB_SB#

31

+1.2V_SB

R324
STAR@
100K_0402_5%

R405
STAR@
470_0805_5%

STB_WLAN#
D

Q55
STAR@
2N7002_SOT23-3

2
Change to 0603 50V7K

Security Classification

S
C638
STAR@
Change to 0603 50V7K

Compal Secret Data


Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Q50
STAR@
2N7002_SOT23-3

R327
STAR@
100K_0402_5%

2007/3/8

2
G

STB_WLAN

2
G

31

2 STB_SB#
G
STAR@
2N7002_SOT23-3

Q54

STB_SB#

2 STB_WLAN#
G
STAR@
2N7002_SOT23-3

2
1
R400 STAR@
47K_0402_5%

Q21
STAR@
2N7002_SOT23-3

1
1
C651
C656
STAR@
STAR@
STAR@
22_0805_5%
2
2
SI3456BDV-T1-E3_TSOP6
1U_0603_10V4Z
2
10U_0805_10V4Z

C645
STAR@

+VSB

1
3

S
C526
STAR@

C637
STAR@
10U_0805_10V4Z

+5VALW

PreMP: ChangeC651 to 22_0805_5%

2
R320
STAR@
470_0805_5%

R172
STAR@
100K_0402_5%

Q56
6
5
2
1

2
G

STB_SB

2 SUSP
G
Q40
2N7002_SOT23-3

Q7
C87
STAR@
2N7002_SOT23-3 2 STAR@

2
G

R165
STAR@
100K_0402_5%

S
D

R34
STAR@
100K_0402_5%
R280
470_0805_5%

2 STB_LAN#
G
STAR@
2N7002_SOT23-3

Q9
STAR@
2N7002_SOT23-3

2
1U_0603_10V4Z

C86
STAR@

2
1
STAR@
47K_0402_5%

R30

Issued Date

2
G

STB_LAN

@ JUMP_43X79

0.1U_0603_50V7K

R32
STAR@
100K_0402_5%

PJ23

Change to 0603 50V7K

+VSB

Q139
2N7002_SOT23-3
2
5SPK@

+5VALW

C766
5SPK@
0.1U_0603_50V7K

Q48
STAR@
2N7002_SOT23-3

2
G

Q8

+1.2VALW

+1.2VALW TO +1.2V_SB

Q49

STB_WLAN# 2
G

31

Change to 0603 50V7K

2
1
R306 STAR@
47K_0402_5%

SUSP

2 STB_SB#
G
STAR@
2N7002_SOT23-3

STB_LAN#

1
1
C494
C509
1
1
C518
C525
STAR@
STAR@
10U_0805_10V4Z
1U_0603_10V4Z
STAR@
STAR@
STAR@
2
2
10U_0805_10V4Z
SI3456BDV-T1-E3_TSOP6
2
2
10U_0805_10V4Z
+VSB

2
G

2 SUSP
G
Q39
@ 2N7002_SOT23-3

STB_LAN#

STAR@
SI3456BDV-T1-E3_TSOP6

@ JUMP_43X79
Q47
6
5
2
1

2 SUSP
G
Q57
S
2N7002_SOT23-3

C85
STAR@
10U_0805_10V4Z

+3V_WLAN

PJ22

5SPK@

1 1

+3VALW TO +3V_WLAN
2

R1214
470_0805_5%

2
1U_0603_10V4Z

C67
STAR@

1
C269
Q20
STAR@
STAR@
2
2N7002_SOT23-3

+3VALW

0.1U_0603_50V7K

Q138
5SPK@ 2N7002_SOT23-3

5VSA_GATE

R272
@ 470_0805_5%

C:Chg. PN to SB770020010.

C75
10U_0805_10V4Z
STAR@

10U_0805_10V4Z

R143
STAR@
470_0805_5%

Q17

AOS 4422

1
1
C762 C763

+3V_LAN

1
C255
STAR@
1U_0603_10V4Z
2
2

2
G

R433
470_0805_5%

1
2
3
4

5SPK@ AO4422_SO8
@

SUSP

6
5
2
1

S
G

STAR@
SI3456BDV-T1-E3_TSOP6

2
1
R164 STAR@
47K_0402_5%
STB_SB#

C252
STAR@
10U_0805_10V4Z

1 1

0.1U_0603_50V7K

S
S
S
G

Q132 @ JUMP_43X79

D
3

C271
STAR@

+VSB

10U_0805_10V4Z

C272
10U_0805_10V4Z
STAR@

D
D
D
D

+2.5VS

PJ20

@ JUMP_43X79

6
5
2
1

1
C765

5SPK@

+3VALW

8
7
6
5

2
1
R1215
47K_0402_5%

Q34

PJ21

1
C764

+VSB

+3V_SB

Q133

R212
10K_0402_5%

+5VSA

+3VALW TO +3V_LAN

+3VALW TO +3V_SB

Q29
2N7002_SOT23-3

C385

5SPK@

10U_0805_10V4Z

+VSB

Change to 0603 50V7K


+3VALW

470_0805_5%

2
1U_0402_6.3V4Z
1 R248
2
10K_0402_5%

C379

R237

0.1U_0603_50V7K

C247

SI4800BDY_SO8
D

C362

Q19
SUSP
2
2
G
G
2N7002_SOT23-3 2N7002_SOT23-3

1
2
3
4

Q16

S
S
S
G

2
G

U39

C363

D
D
D
D

1
+5VALW

R166

Q36

8
7
6
5

0.1U_0603_50V7K

0.01U_0402_25V7K

4.7U_0805_10V4Z

C262

1U_0402_6.3V4Z
1 R137
2
+VSB
330K_0402_5%

SI4800BDY_SO8

C263

1
2
3
4

S
S
S
G

4.7U_0805_10V4Z

C264

D
D
D
D

26,29,31,33,41 SYSON

+5VS

1
4.7U_0805_10V4Z
470_0805_5%

Q18

2
G

R209
10K_0402_5%

4.7U_0805_10V4Z

8
7
6
5

SYSON#

SYSON#

+0.9V

+5VALW

2N7002_SOT23-3

+5VALW TO +5VS

+3VS

42
D
Q28
2N7002_SOT23-3

15,29,31,39 SUSP#

R478
100K_0402_5%

SUSP

SUSP

2
1

2
G

VLDT_EN

31

Q24

+VSB

42
D

VLDT_EN#

C457-R

C457

R286

1
1

R211
10K_0402_5%

C462

470_0805_5%

1U_0402_6.3V4Z

SI4800BDY_SO8

C431
10U_0805_10V4Z
R285

+3VALW TO +3VS
+3VALW

R210
10K_0402_5%

Change to 0603 50V7K

1
2
3
4

S
S
S
G

1
D

D
D
D
D

Q15
2 VLDT_EN# 2
G 2N7002_SOT23-3G
2N7002_SOT23-3

8
7
6
5

+5VALW

10K_0402_5%

C443

C180

Q13

C180-R

C184

R111

1 R98
2
+VSB
33K_0402_5%

Q41

82.5K_0603_1%
2
1

0.1U_0603_50V7K

4.7U_0805_10V4Z

R197

1U_0402_6.3V4Z

SI4800BDY_SO8

+5VALW

4.7U_0805_10V4Z

820K_0402_5%
2
1

+5VALW

+1.8VS

0.01U_0402_25V7K

C178

1
2
3
4

S
S
S
G

4.7U_0805_10V4Z

C181

D
D
D
D

470_0805_5%

Q14

+1.8V TO +1.8VS

+1.2V_HT
+1.8V

8
7
6
5

+1.2VALW TO +1.2V_HT
+1.2VALW

Compal Electronics, Inc.


SCHEMATIC MB A3831

Document Number
401498

Thursday, November 25, 2010

Sheet
E

Rev
D
36

of

46

VS
VIN

1
PR2
5.6K_0402_5%

1
1

PACIN

LM393DG_SO8

PC6
0.1U_0402_16V7K

2
0.068U_0402_10V6K

1
PR8
10K_0402_1%

PACIN

39

Vin Detector

RTCVREF

3.3V

High 18.384 17.901 17.430


Low 17.728 17.257 16.976

VIN

31,33

PR7
10K_0402_1%

PD1
RLZ4.3B_LL34

PC5

PR6
20K_0402_1%

@ SINGA_2DW-0005-B03

ACIN

PU1A

PC4
100P_0402_50V8J

PR4
10K_0402_1%
1
2

1
PC3
1000P_0402_50V7K

PR5
22K_0402_1%
1
2

PC2
100P_0402_50V8J

PC1
1000P_0402_50V7K

VS
PR3
84.5K_0402_1%

1
1

DC_IN_S2

10A_125V_451010MRL

DC_IN_S1

PJP1

DC301001N00

PR1
1M_0402_1%
1
2

VIN

PL1
HCB4532KF-800T90_1812
1
2

PF1

BATT+

PD3
RLS4148_LL34-2

PD2
RLS4148_LL34-2

PR9
68_1206_5%

PR10
68_1206_5%

PQ1
N1

1
2
PR11
1K_1206_5%

PR12
200_0603_5%
1
2

VS

CHGRTCP

2
PR15
22K_0402_1%

51_ON#

PD4
RLS4148_LL34-2

N3

1
2
PR13
1K_1206_5%

B+

2
33

VIN

PC8
0.1U_0603_25V7K

PC7
0.22U_1206_25V7K

PR14
100K_0402_1%

1
2
PR16
1K_1206_5%

TP0610K-T1-E3_SOT23-3

PR20
499K_0402_1%

RB715F_SOT323-3

LM393DG_SO8

2
6

PC13
1000P_0402_50V7K

1 VL

PR23
34K_0402_1%
PR25
66.5K_0402_1%

PC12
1000P_0402_50V7K

PR24
499K_0402_1%
PR26
191K_0402_1%

PC11
1000P_0402_50V7K

ACON

39

@ RLZ16B_LL34

PU1B

6,38,40 MAINPWON

PD6
PD5

PC10
1U_0805_25V4Z

1
2

1
2

GND
PC9
10U_0805_6.3V6M

N2

IN

OUT

PR19
2.2M_0402_5%
2
1

3.3V

PR18
100K_0402_1%
1
2

VL

PU2 G920AT24U_SOT89-3

+CHGRTC

PR22
560_0603_5%
1
2

PR17
200_0603_5%
PR21
560_0603_5%
1
2

RTCVREF

+3VALW

+1.8VP

PQ2
1

+1.8V

Precharge detector
15.97V/14.84V FOR
ADAPTOR

@ JUMP_43X118

(5A,200mils ,Via NO.= 10)

(8A,320mils ,Via NO.= 16)

PJ3
2
@

+5VALW

PJ4
+1.5VSP

JUMP_43X118

+1.5VS

PQ3
DTC115EUA_SC70-3
2

+5VALWP

(3.0A,120mils ,Via NO.=6)


1

+VSB

@ JUMP_43X39

PACIN

RHU002N06_SOT323-3

PJ5
2

2
G

@ JUMP_43X118

(5A,200mils ,Via NO.= 10)


+VSBP

PJ6
2

+0.9VP

+0.9V

+5VALWP

PR27
47K_0402_1%
2
1

PJ2
1

JUMP_43X118

2
@

PJ1
+3VALWP

@ JUMP_43X79

(120mA,40mils ,Via NO.= 2)

(2A,80mils ,Via NO.= 4)


PJ7
+1.2VALWP

+1.2VALW

@ JUMP_43X118

(8A,320mils ,Via NO.=16)


4

PJ8
+2.5VSP

+2.5VS

@ JUMP_43X39

(1A,40mils ,Via NO.=2)

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/3/8

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC MB A3831
Rev
D

401498

Date:

Thursday, November 25, 2010


D

Sheet

37

of

46

PH1 under CPU botten side :


CPU thermal protection at 92 degree C
Recovery at 56 degree C
VS

VL
2

VL
VMB

PR28
47K_0402_1%

PR32
13.7K_0402_1%
1
2

PC127
820P_0603_50V7K

TM_REF1

1SS355_SOD323-2

VL

PR37
100K_0402_1%
1

LM393DG_SO8

PR39
100K_0402_1%
2

+3VALWP

PC18
1000P_0402_50V7K

PR36
15.4K_0402_1%

PR38
6.49K_0402_1%
2
1

31,39

ALI/MH#

PC17
0.22U_0805_16V7K

PR35
100_0402_1%

PR34
100_0402_1%

PD7
2

OCTEK_BTJ-09HA1G

PQ4
DTC115EUA_SC70-3

PU3A

PC16
0.01U_0402_25V7K

PR33
1K_0402_1%

PC15
1000P_0402_50V7K

PC126
2200P_0603_50V7K

+3VALWP

MAINPWON 6,37,40
1

PR31
47K_0402_1%
1
2

PC14
0.1U_0603_25V7K

PH1
100K_0603_1%_TH11-4H104FT

BATT+

PL2
HCB4532KF-800T90_1812
1
2

GND
GND

BATT_S1

1
2
3
4
5
6
7
8
9

10
11

1
2
3
4
5
6
7
8
9

PJP2

PF2
15A_65V_451015MRL
1
2
PR29 1K_0402_1%
1
2
1
2
PR30
47K_0402_1%

PR40
1K_0402_1%

PH2 near main Battery CONN :


BAT. thermal protection at 95 degree C
Recovery at 59 degree C

BATT_TEMPA 31
EC_SMB_DA1 31,32
EC_SMB_CK1 31,32

VL

VL

PR42
47K_0402_1%
1
2

PR48
0_0402_5%
2

PD8
2

O
4

PR44
13.7K_0402_1%

PU3B

1
3

1SS355_SOD323-2
LM393DG_SO8

PC19
0.22U_0805_16V7K

1
2
2

1
2

PC20
0.22U_1206_25V7K

PQ6
RHU002N06_SOT323-3

2
G
1

POK

PC22
0.1U_0402_16V7K

1
2
PR47
100K_0402_1%
40,41

2
1
PR45
100K_0402_1%

PR46
22K_0402_1%
1
2

VL

+VSBP
PC21
0.1U_0603_25V7K

B+

TM_REF1

PR43
13.7K_0402_1%
1
2

PQ5 TP0610K-T1-E3_SOT23-3

PR41
47K_0402_1%

PH2
100K_0603_1%_TH11-4H104FT

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/3/8

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC MB A3831
Rev
D

401498

Date:

Thursday, November 25, 2010


D

Sheet

38

of

46

20

VCOMP

CSIP

19

ICM

PHASE

18

LX_CHG

VREF

UGATE

17

DH_CHG

16

ACLIM

VDDP

15

11

VADJ

LGATE

14

PGND

13

BST_CHG 1
2
2.2_0603_5%
6251VDDP

2 PR75
1
10K_0402_1%

12

ACOFF 2

GND

5
6
7
8
D
D
D
D

DTC115EUA_SC70-3

0.1U_0603_25V7K

PL3
16UH_LF919AS-160M=P3_3.7A_20%
CHG
1
2
1

BATT+

PR68
0.02_2512_1%

PC41
SI4800BDY-T1-E3_SO8

DL_CHG

ISL6251AHAZ-TR5283_QSOP24

PACIN

SI4800BDY-T1-E3_SO8

PQ21

PC40
4.7U_0805_6.3V6K

2
G

RHU002N06_SOT323-3

G
S
S
S

CH751H-40PT_SOD323-2
PD12
1
26251VDD
4.7_0603_5%
PR74

PQ18

G
S
S
S

PQ22
DTC115EUA_SC70-3

BOOT

CHLIM

PR72
10K_0402_1%

10

0_0603_5%
1

PC39
BST_CHGA 2
1
0.1U_0603_25V7K

ACON

ACON

10.7K_0402_1%
6251VREF 1 PR73
2

RHU002N06_SOT323-3
37

0.1U_0402_16V7K

15.4K_0402_1%

PR66
2

2
D
1SS355_SOD323-2
PC34

PQ19

PR64
2.2_0603_5%

PR69

CSIN

VIN

PD11
2

ICOMP

200K_0402_1%

31

PR58
1

CSOP

4
3
2
1

PR71
1

IREF
S

ACOFF

PQ16

4
3
2
1

21

31

2
G

PR67
@ 0_0402_5%

CSON

5
6
7
8

CSOP

1
PACIN 1
2
PR70
22K_0402_1%

PACIN

37

PC38
1
2

1SS355_SOD323-2

D
D
D
D

CELLS

1 PR65
2
100_0402_1%
6251VREF

PR59
20_0603_5%
1
2
PC31
0.047U_0603_25V7M
1
2
PR60
20_0603_5%
1
2
PC35 PR61 20_0603_5%
0.1U_0603_25V7K
1
2

1 PR63
2
10K_0402_1%
1
2
PC37
100P_0402_50V8J

ADP_I

D PQ20

BATT+

VIN

PC42

31

PR55
10K_0402_1%

1
2
PR52
47K_0402_1%
PD10
1

ACOFF#

1
2

0.01U_0402_25V7K

FDS4435BZ_SO8

15,29,31,36

10U_1206_25V6M

22

CSON

EN

8
7
6
5

D
D
D
D

10U_1206_25V6M

ACSET ACPRN

23

SUSP#

24

4.7U_1206_25V6K

4.7U_1206_25V6K

PD9
RB715F_SOT323-3
PC29
DCIN 1
2

S
S
S
G

2
1

DCIN

1
2

2
6251_EN 3

PC32
@ 680P_0402_50V7K
CSON1
2

PC36
1
2

S
RHU002N06_SOT323-3

PR54 100K_0402_1%
1
2
PU4

1
2
PC33 6800P_0402_25V7K

PR62
150K_0402_1%

4.7U_1206_25V6K

2 1

PC30
1
2.2U_0603_6.3V6K VDD

PQ14
DTC115EUA_SC70-3

ALI/MH#

PC24

@ 0.1U_0603_25V7K

PQ15
DTC115EUA_SC70-3

D
3

1
3

PQ17
2
G

1
1

PR57
10K_0402_1%

31,38

6251VDD
PR56
0_0402_5%
2
1

FSTCHG
2

2FSTCHG

1
2
3
4

PC25

31
6251VDD 1

PC28
0.1U_0603_25V7K

PC23

PR51
200K_0402_1%

DTA144EUA_SC70-3
2

PR50
100K_0402_1%

PC27
5600P_0402_25V7K

FDS4435BZ_SO8
PQ11

PQ12
DTC115EUA_SC70-3

PC26
0.1U_0603_25V7K

8
7
6
5

D
D
D
D

DCIN

P3

PR53
47K_0402_1%
2

B++

S
S
S
G

CSIP
CSIN

FDS4435BZ_SO8

1
2
3
4

FDS4435BZ_SO8
1

PQ13

JUMP_43X118

2
@

3
PQ10
TP0610K-T1-E3_SOT23-3

8
7
6
5

D
D
D
D

S
S
S
G

1
2
3
4

4
3
2
1

PQ7

PC129
0.022U_0603_50V7K

PJ9

G
S
S
S

D
D
D
D

PQ9

5
6
7
8

VIN

PQ8

PC128
820P_0603_50V7K

B+

PR49
0.02_2512_1%

P3

Iadp=0~3.6A

P2

PR76
3

6251VREF

@ 28.7K_0402_1%

PR77
PQ23
2

@ 47K_0402_1%
2

@ SI2301BDS-T1-E3_SOT23-3

BATT Type

IREF=1.016*Icharge
IREF=0.508V~3.048V

ALI/MH#

Charge Current

CC=0.5~3A
CV=12.6V(6 CELLS LI-ION)

IREF

3 CELL

3.3V

1.5A

1.524V

6 CELL

3.3V

3.0A

3.048V

9 CELL

3.3V

3.0A

3.048V

RTC Battery

120W Iadapter=0~6.315A PR49=0.010 ohm CP=5.936A PR73=19.6K PR75=4.53K

10K_0402_1%
4

6251_EN

PU5A
3

0
G

BATT_OVP

LM358DT_SO8

@ 0.01U_0402_25V7K

PC44
1
2

CSON

C
PQ24
@ 2SC2411KT146_SOT23-3

2
B

LI-3S :13.5V----BATT-OVP=1.5V
LI-4S :18V----BATT-OVP=2V
BATT-OVP=0.111*BATT+
4

PR79
@ 100K_0402_1%

P
31

6251VREF

PR82

45@ RTCBATT

PC45
0.01U_0402_25V7K

+RTCBATT

90W Iadapter=0~4.737A PR49=0.015 ohm CP=4.459A PR73=19.6K


+RTCBATT

1
PR83
105K_0402_1%

BATT1

75W Iadapter=0~3.947A PR49=0.02 ohm CP=3.71A PR73=10.7K

PC43
0.01U_0402_25V7K

VS

1
2
1
PR80
PR78
499K_0402_1% 340K_0402_1%

VMB

Layout Note:
1. Under BATT1 battery Body, no Trace no Via
2. BATT1 + - PIN keep out 80mil from other component ,trace and via

PR81
@ 20K_0402_1%
2

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/3/8

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC MB A3831
Rev
D

401498

Date:

Thursday, November 25, 2010


D

Sheet

39

of

46

PJ10

DL_5V

LL2

16

DRVL2

VO1

17

PGND2

VFB1
COMP1
COMP2
CS1
CS2
VREF2
TONSEL
GND
PGOOD1
PGOOD2

VREG3

10

EN3

RLZ5.1B_LL34

10K_0402_1%

PC50
4.7U_1206_25V6K
2
1

5
6
7
8
D
D
D
D

4
3
2
1

+3VALWP
PR103
100K_0402_1%
1
2

2 1 PR102

TPS51120RHBR_QFN32_5X5

PR98
10K_0402_1%

PC63
10U_0805_6.3V6M
2
1

PD13
VS

PC65
2.2U_0805_25V6K

+3.3V_RTC_LDO

+VCC_TPS51120
PR97
14.7K_0402_1%
1
2

EN2
EN1

19

TPS51120_CS1
TPS51120_CS2

PR96
14.7K_0402_1%
1
2

12
29

FB5

PC62
1000P_0402_50V7K
2
1

VFB2

32

0_0402_5%

VO2

PC59
@ 680P_0603_50V7K

1
3
2
7
23
18
4
31
5
30
11

PAD

1
2
3

SKIPSEL

FB3

806K_0603_1%

PR99

24
3
2
1

PGND1

PR100
0_0402_5%
2

15

33

PQ28
AO4712_SO8

PR95

PC64
0.047U_0603_16V7K

DRVL1

PR88
@ 4.7_1206_5%

PC57
330U_D3L_6.3VM_R25M

DRVH2

25

PQ27
AO4712_SO8

26

LX_5V

PC56
1000P_0402_50V7K

DH_5V

27

PC54
0.1U_0603_25V7K
1
2

PR89
10.2K_0402_1%
2

DRVH1

32 QFN 5X5 LL1


VBST2

EN5

PR86
0_0603_5%
1

PR93
2.49K_0402_1%
1
2

28

+5VALWP
PL4
3.3UH_SIL1045R-3R3PF_8.2A_30%
1
2

21

VBST1

14

PR101
0_0402_5%
2
1

10U_0805_10V4Z
2
1

PC52

VREG5

V5FILT

VL

6,37,38 MAINPWON

OCP=8A

12

8
7
6
5

VIN

20

13

DH_3V
LX_3V

@ 680P_0603_50V7K

+5VALWP

PQ25
SI4800BDY-T1-E3_SO8

22

PC55
PR90
0.1U_0603_25V7K 0_0603_5%
2
1
1
2

PR91
@4.7_1206_5%

PC61

G
S
S
S

S
S
S
G
1
2
3
4
@

PR87
0_0603_5%
1
2

PR92
10K_0402_1%

1000P_0402_50V7K
PC58
2
1

PL5
3.3UH_SIL1045R-3R3PF_8.2A_30%
2
1

PR94
4.22K_0402_1%
1
2

PC60
330U_D3L_6.3VM_R25M

+3VALWP

PR85
0_0603_5%
1
2

PU6

SI4800BDY-T1-E3_SO8

OCP=8A

VL

PR84
5.1_0603_5%
2
1

5
6
7
8

PQ26

D
D
D
D

8
7
6
5

+3VALWP

+VCC_TPS51120

PC53
0.1U_0603_25V7K
2
1

PC51
1U_0603_10V6K
2
1

PC46
@ 680P_0402_50V7K

PC49
4.7U_1206_25V6K
2
1

JUMP_43X118
PC48
4.7U_1206_25V6K
2
1

PC47
4.7U_1206_25V6K
2
1

B+

@
POK

38,41

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/4/14

Issued Date

Deciphered Date

2007/12/9

Title

SCHEMATIC MB A3831

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Thursday, November 25, 2010
Date:

Rev
D

401498

Sheet
1

40

of

46

PJ11

PR105
2.2_0603_5%

B+

1
2

PC69
4.7U_1206_25V6K

DAP202U_SOT323-3

PC72
2.2U_0805_10V6K

2
3

JUMP_43X118

PC71
0.1U_0603_25V7K

PC68
4.7U_1206_25V6K

+5VALWP

PD14

PC70
4.7U_0805_6.3V6K

PR104
0_1206_5%

1
2

PC67
4.7U_1206_25V6K

PC66
4.7U_1206_25V6K

2
@

D
D
D
D
27

5
6
7
8

28
LGATE2

ISE_1.2V

PC80
0.01U_0402_25V7K

@ PC78
@PC78
680P_0603_50V8J

PGND1

PGND2

26

9
10
8
15

VOUT1
VSEN1
EN1
PG1

VOUT2
VSEN2
EN2
PG2/REF

20
19
21
16

OCSET2

18

4
3
2
1

G
S
S
S

+1.2VALWP

LX_1.2V

PR115
2K_0402_1%
1
2
DL_1.2V

+1.2VALWP

PL7
1.8U_D104C-919AS-1R8N_9.5A_30%
1
2
PR113
@ 4.7_1206_5%

PQ32
AO4712_SO8

PR118
0_0402_5%
PC82
@ 680P_0603_50V8J

LGATE1

22

PR112
0_0603_5%

DH_1.2V-2

+
PR119
2.21K_0402_1%
2

PC81
0.01U_0402_25V7K

PC79
220U_D2_4VM_R15

ISEN2

ISEN1

PHASE2

25

8
7
6
5

DH_1.2V-1

DL_1.8V

PHASE1

24

1
PR117
10.2K_0402_1%

ISE_1.8V

UGATE2

PQ30
SI4800BDY-T1-E3_SO8

2
PR121
0_0402_5%

POK

PR126
100K_0402_1%

PR123
@ 0_0402_5%
PC84
@0.1U_0402_16V7K

PR124
6.49K_0402_1%

PR127
56K_0402_1%

38,40

ISL6227CAZ-T_SSOP28

13

OCSET1

PC83
@ 0.1U_0402_16V7K

PR125
@ 0_0402_5%

PR122
10K_0402_1%
2

11

VSE_1.2V
1

PR120
0_0402_5%

VSE_1.8V
2

DDR

26,29,31,33,36 SYSON

GND

+
PC77
330U_D2E_2.5VM

@ PR109
0_0402_5%

PR116
0_0402_5%

PR114
1.54K_0402_1%
1
2

UGATE1

PC76
0.1U_0402_16V7K
2
1

PQ31
AO4712_SO8

1
2
3

PR108
@ 4.7_1206_5%

BST_1.2V-2
1
PR107
0_0603_5%

PR110
0_0402_5%

DH_1.8V-1

PR111
0_0603_5%

21

VDDIOFB_H

23

2 1

BOOT2

PL6
1.8U_D104C-919AS-1R8N_9.5A_30%
1
2 LX_1.8V

17

5
6
7
8

+1.8VP

BOOT1

PC74
0.01U_0402_25V7K
2
1

SOFT2

3
2
1

2BST_1.8V-2 6
PR106
0_0603_5%

1
2
3
4

S
S
S
G

+1.8VP

PC75
0.1U_0402_16V7K
2
1

VCC

PQ29
SI4800BDY-T1-E3_SO8

PC73
0.01U_0402_25V7K PU7
2
1
12 SOFT1

VIN

D
D
D
D

8
7
6
5

14

BST_1.8V-1

BST_1.2V-1

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/3/8

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC MB A3831
Rev
D

401498

Date:

Thursday, November 25, 2010


D

Sheet

41

of

46

PJ12

PU8
2

VIN

EN

ADJ

GND

GND

GND

GND

VO

@ JUMP_43X79
PC85
4.7U_0805_6.3V6K

PR128
22K_0402_1%

PR130
20K_0402_1%

PC87
0.1U_0402_16V7K

PR129
10K_0402_1%

+3VS

PC86
10U_1206_6.3V7K

G965-18ADJP1UF_SO8
1

+2.5VSP

3
1

+3VS

PJ13
@ JUMP_43X79

+1.8V

+3VS

VREF

NC

VOUT

NC

TP

VREF

NC

VOUT

NC

TP

+5VALW

PC92
@ 0.1U_0402_16V7K

+0.9VP

1
PC90

PR132
1K_0402_1%

S
PQ33

NC

1
VCNTL

GND

2
G

PC91
10U_1206_6.3V7K

VIN

2
1

2
PR134
1.15K_0402_1%

PR133
0_0402_5%
1
2

SYSON#

36
PU10

PJ14
@ JUMP_43X79

PC89
1U_0603_6.3V6M

APL5331KAC-TRL_SO8

2
1

PC93
4.7U_0805_6.3V6K

+3VALW
1

NC

VCNTL

GND

PR131
1K_0402_1%

PC88
4.7U_0805_6.3V6K

VIN

2
1

PU9
1

PC94
1U_0603_6.3V6M

0.1U_0402_16V7K
RHU002N06_SOT323-3

1
PR136
PC95
1K_0402_1% 0.1U_0402_16V7K

+1.5VSP

PC97
@ 0.1U_0402_16V7K

2
G
2

2
PR135
0_0402_5%

SUSP

SUSP

PC96
10U_1206_6.3V7K

36

APL5331KAC-TRL_SO8
PQ34
RHU002N06_SOT323-3

2007/3/8

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC MB A3831
Rev
D

401498

Date:

Sheet

Thursday, November 25, 2010


1

42

of

46

PR137
10K_0402_5%

PC100
10U_1206_25V6M

2
1

1
+

2
25

VSEN

BOOT2

21

41

GND PAD

3
2
1
PC106
4.7U_0603_6.3V6K

LG1

PR179
UG2-1

2
2

2
PR156
1_0402_5%
1

2
PR176
@ 0_0402_5%

2
PR155
10K_0402_1%
1

PC115
10U_1206_25V6M

2
PR177
@ 0_0402_5%

2
PR174
1_0402_5%
1

PC122
0.22U_0603_16V7K
1
2

+CPU_CORE

ISEN1

VSUM
ISEN2

VCC_PRM

4
3
2
1

2
PR173
10K_0402_1%

1
2
PR171
4.7_1206_5%
PC124
470P_0603_50V8J
1
2
PR172
3.65K_0805_1%

G
S
S
S

D
D
D
D

5
6
7
8

PQ40
SI4856DY-T1-E3_SO8

5
6
7
8
D
D
D
D
G
S
S
S
4
3
2
1

LG2

PL10
0.36UH_PCMC104T-R36MN1R17_30A_20%
1
2
PQ39
SI4856DY-T1-E3_SO8

PC121
1U_0402_6.3V6K

PHASE2

1
2
PR167
10_0603_5%

2
PR169
10_0603_5%

VCC_PRM

3
2
1

PQ38
SI7840DP-T1-E3_SO8

+5VALW

ISEN1

CPU_B+

UG2-2

ISEN2

VSUM

PR159
PC112
2.2_0603_1% 0.22U_0603_10V7K

20

19

18

17

16

15

14

13

11

PC105
0.22U_0603_16V7K
1
2

+CPU_CORE

0_0603_5%

ISEN2

VSUM

1
2
PR153
4.7_1206_5%
1
2
PR154
3.65K_0805_1%

5
6
7
8
D
D
D
D

5
6
7
8
D
D
D
D

+5VALW

VDD

ISEN1

10

ISEN2

22

GND

UGATE2

VIN

VDIFF

VSUM

VO

23

DFB

24

PHASE2

G
S
S
S

26

4
3
2
1

27

PVCC

PR157 0_0402_5%
2
1

PQ37
SI4856DY-T1-E3_SO8

LGATE1

UG1-1

G
S
S
S

28

PHASE1

4
3
2
1

PGND1

PL9
0.36UH_PCMC104T-R36MN1R17_30A_20%
1
2

0.22U_0603_10V7K

PQ36
SI4856DY-T1-E3_SO8

31

32
VID0

BOOT1

34

33
VID1

VID2

35
VID3

36
VID4

38

37
VID5

VR_ON

29

FB

1
2
1
2
PR175
PH3
2.61K_0402_1%
10K_0603_5%_TSM1A103J4302RE

PC99
10U_1206_25V6M

PC130
220U_25V_M

1
PR145
1
PR138
1
PR139
1
PR140
1
PR141
1
PR142
1
PR143
1
PR144
PSI_L

PGOOD

30

PHASE1

PGND2

1
2
PR170
11K_0402_1%

PR168
100_0402_1%

UGATE1

LGATE2

PU11
ISL6264CRZ-T_QFN40_6X6

VCC_PRM

PR166
0_0402_5%

2.2_0603_1%

PC108
470P_0603_50V8J

PC114
10U_1206_25V6M

COMP

UG1-2

VW

39

40
6

PC101

B+

CPU_VSS_SENSE

OCSET

PC120
0.1U_0402_16V7K

<>

SOFT

PR163
100_0402_1%

PC116
180P_0402_50V8J
1
2
PR164
PR165
1K_0402_1%
1.82K_0402_1%
2
1
1
2

OFS

ISEN1

+CPU_CORE

PR146

PC123
0.01U_0603_50V7K

PR162
0_0402_5%

PC119
0.22U_0402_6.3V6K

CPU_VCC_SENSE

RBIAS

PC111
0.068U_0603_16V7K

PC118
0.22U_0402_6.3V6K

PC110
1000P_0402_50V7K
1
2

PR161
255_0402_1%
1
2

@ PC113
1000P_0402_50V7K
1
2

PR160
1K_0402_1%
2
1

PC117
1000P_0402_50V7K

SET

PR178

RTN

PC107
470P_0402_50V7K
1
2
PC109
220P_0402_50V8J
1
2

PR158
97.6K_0402_1%
1
2

PQ35
SI7840DP-T1-E3_SO8

B+

0_0603_5%

12

PR150 150K_0402_1%

PC103
0.047U_0603_25V7M
1
2
PR149
51.1K_0402_1%

PC102
1000P_0402_50V7K
1
2
PR151
5.36K_0402_1%

2
1

PC104
1000P_0402_50V7K
1
2
PR152
6.81K_0603_1%
1
2

VCC_PRM

1
2
@ PR148
10K_0402_5%

1
2
PR147
10K_0402_5%

1
5

2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%

VGATE
+3VS

DROOP

31

PL8
HCB4532KF-800T90_1812
2
1

CPU_B+

PC125
220U_25V_M

31
VID2
6
VID1
6
VID0
6

VID4
6
VID3

VID5

VR_ON

PSI#

+3VS

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/3/8

Issued Date

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC MB A3831
Rev
D

401498

Date:

Thursday, November 25, 2010

Sheet
1

43

of

46

POWER PIR LIST


page

Reason for change

EVT

43

design change

DVT

43

offset

change PR149 to 51.1K

43

ocp

change PR151 to 5.36K

43

Vsense feedback

PR163 change to mount

43

transient modification

PC120 change to 0.1uF

43

EMI solution

PR153, PR171 change to 4.7Ohm. PC108, PC124 change to 470pF.

38

EMI solution

add PC126 2200P and PC127 820P

39

EMI solution

add PC128 820P and PC129 0.022U

38

OTP setting design change

change PR43 to 13.7K, PR44 to 13.7K

41

OCP solution

change PR114 to 2.61K, change PQ27, PQ28, PQ31, PQ32 to AO4712

40

HW design change

change PR89 to 10.2K

43

noise solution

add PC130, 100U 25V

39

component version change

change PU4 from ISL6251AHAZ-T to ISL6251AHAZ-TR5283

41

OCP solution

change PR114 to 3K

41

HW design change

change PR117 to 10.2K

43

noise solution

change PC130 to 220U 25V

41

1.8V shutdown solution

change PR114 to 1.54K, PR127 to 56K, PC77 to 330U(SGA19331D00)

PVT

PreMP

MP

Modify list
change PQ36,PQ37,PQ39,PQ40 from SI4856ADY(SB000001Y00)
to SI4856DY(SB000003800).

Compal Secret Data

Security Classification
Issued Date

2007/4/14

Deciphered Date

2007/12/9

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Compal Electronics, Inc.


SCHEMATIC MB A3831
Document Number

Rev
D

401498
Thursday, November 25, 2010

Sheet

44

of

46

HW4 Product Improvement Record (P.I.R.)


Phase: A to B
D

Date: 0601

Page# Action Plan


(add; del; change)
7

Add @

14

Del @

C576, C785
CRT Pi-Filter circuit

Add
15
17

Location or
Net_List

CRT DDC circuit

Add

330U_D2_2.5VY_R9M

Del @

C780, U40

Add @

R1221

31

Add

34

Change

36

Change

KSO[0..15]
C180, C385, C87, C269
C638, C526

Phase: B to C

NC
@0.1u and @7408
0 ohm
NC

Del

BOM Structure

Location or
Net_List

Add buffer avoid the leakage issue from LAN CHIP

@0 ohm
10ohm and 1p

Add RC for reduce EMI noise

10k

For CIR function.


For Keyboard some keys function.

0.1uF 0402

0.1uF 0603

Change X7R

After value
(Attached file)
NC

R1229, R1230

19.2K_0402_5%

NC

D47

CH491D_SC59

C727, C728

Add

L78

Net

C727, R293

Detail Discretion and Root Cause

NC
UMA@

VGA@

22U_A_4VM

Update RTL8101E/8102E/8111B/8111C co-layout circuit


4.7uH_1008HC
B

Before value
(Attached file)

Writer: Gino Lu
After value
(Attached file)

Detail Discretion and Root Cause

Add

R486, R487

0_0603_5%

Add

C790

10U_0805_10V4Z

16

Add

C679, C688

12P_0402_50V8J

18P_0402_50V8J

For Real time clock adjust

25

Change

C118,C120,C121,C135

0.01U_0402_25V4Z

0.1U_0402_16V4Z

for Gigalan EMI solution

BOM structure
change
25

C728

Rev. DL/DM Check

AMD CRT level shift solution already be implement on VGA/B

Date: 0723
Location or
Net_List

Writer: Gino Lu

0_0402_5%

DEL

Page# Action Plan


(add; del; change)

0.1u and 7408

R1227, R1228

Phase: C to PreMP

27

Follow AMD PA

KSO[0..17]

R1231, R1232

Follow AMD PA
AT JP23.193, J23.182

NC

Q4, Q5

CAM@

C558

Rev. DL/DM Check

Reserve for +HVDD power select

D_CAM@

For Camera reserve

BT@

For Bluetooth select

2007/3/8

Issued Date

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Remove pi filter from CRT board from S/B to M/B for EMI solution

KSO[0..15]

Before value
(Attached file)

Rev. DL/DM Check

After Power Jeff meausre CPU core ripple,


we can unmount the 2 capacitors.

@330U_D2_2.5VY_R9M

Date: 0628

Page# Action Plan


(add; del; change)

25

Detail Discretion and Root Cause

D47, R1231 ...and so on.

R1233, R1234, C788,


C789
R1226

Add

After value
(Attached file)

R16, R20....and so on

+HDMI_DDC_CLK, +5VS

22

14

Before value
(Attached file)

Writer: Timo Teng

SCHEMATIC MB A3831
Document Number

Rev
D

401498
Thursday, November 25, 2010

Sheet
1

45

of

46

PJP1

45@ Part
45@

DC-IN JACK

ZZZ
D

PCB

LA-3831
<BOM
Structure>
REV0 M/BDA800009C00
U5

U5

U5

U26

CHIPSET
UMAR3@

RS690MC

8101E

UMAR1@

RS690MC

VGAR1@

RS690MC

8111C

C: Modify BOM

U4

SB600R1@ 218S6ECLA13FG_FCBGA548_SB600

C473

R293

8102E

U4

U4

L48

C482

LAN
8101E@

RTL8101E

C429

8101E@

1000P_0402_25V8J

8101E@

0_0603_5%

8111C@

C464

0.1U_0402_16V4Z 8101E@

C438

8101E@

8101E@

22U_A_4VM

1000P_0402_50V7K8101E@

8102E@

MBC1608121YZF_0603

8102E@

C482

0_0603_5%

C135

C118

22U_A_4VM

8102E@

8102E@

0_0603_5%

8102E@

22U_A_4VM

L46

1000P_0402_50V7K 8102E@

C464

8111C@
C120

RTL8102E

C473

8111C@

R480

U23

RTL8111C SA00001WM00

R293

0_0603_5%

C444

22U_A_4VM

8102E@

22U_A_4VM

C121
PreMP:Change C118,C120,C121,C135
for EMI solution

TRANSFORMER
100M@

TST1284

100M@ 0.01U_0402_25V4Z

100M@ 0.01U_0402_25V4Z 100M@ 0.01U_0402_25V4Z 100M@ 0.01U_0402_25V4Z

U11

Card BUS
8402@

PCI8402

L6

L3

L4

M76 CRT
76@
76@
FBMA-11-100505-900T
FBMA-11-100505-900T
PreMP: Add BOM sturcture for EMI issue

76@
FBMA-11-100505-900T

2007/3/8

Issued Date

Deciphered Date

2008/3/8

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Compal Electronics, Inc.

Compal Secret Data

Security Classification

SCHEMATIC MB A3831
Document Number

Rev
D

401498
Thursday, November 25, 2010

Sheet
1

46

of

46