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1

PWA : Y507R
PWB : Y509R
SCH : Y510R

Calpella Intel Discrete Block Diagram

CLOCK
SLG8SP585V

AC/BATT CONNECTOR PG 55
BATT CHARGER
PG 45

(QFN-64) PG 15

DDR3-SODIMM1

DDR3-SODIMM2

Clarksfield

FAN & THERMAL


EMC1422
(8P TSSOP)

(Qual Core)

PG 37

PCH REGULATOR

SYS VR

+1.05V_PCH

MIC
Internal Speaker

HP2

(20 Pin QFN)

VCC Core

VGA VDDCI

+5V_SUS/+3.3V_SUS/+5V_RUN/
+3.3V_RUN/+1.5V_RUN/
+1.5V_GDDR
PG 54

+VCC_CORE

+VDDCI

PG 46

PG 50

AMD M96XT

DP

PG 23

DISPLAYPORT

LVDS

PG 23

Panel Connector

AUDIO
IDT 92HD73C

PG 24

(100P FBGA)

PG 38

USB2.0 [11]

PG 35

(8 MSOP)

PG 21,22

USB2.0 [9]
PG 33

PCIE [1]
USB2.0 [5]

WWAN MINI-CARD

PCIE [2]
USB2.0 [4]

WLAN Half MINI-CARD PG 31

PCIE [3]
USB2.0 [6]

UWB/BT MINI-CARD

PG 25

GPU THERMAL
ANALOG DEVICES ADM1032

DDR3 x 8 (1G, 64Mx16 bit)

(56 LQFP)
9 x 9 mm

PG 39

CRT CONN.

IHDA
Ibex Peak-M

PG 39

VGA

PG 53

HDMI CONN.

PCI EXPRESS GFX

PG 17,18,19,20
PG 40

Camera + D-MIC

TV CONN

REGULATOR

DMI x 4

Amplifier
TI TPA4411MRTJR

HP1

+1.8V_RUN

Load Switch

(989 PGA)
PG 3,4,5,6

Amplifier
TI TPA6040A4
(32 Pin QFN)

PG 48

CPU VR
+1.1V_VTT

PCIEx16

Subwoofer AMP
MAXIM MAX9759
(16 Pin TQFN)

+VCC_GFX_CORE
+1.1V_GFX_PCIE PG 52

DDR3 VR

HDMI

PG 14

PG 51

+1.5V_SUS/+0.75V_DDR_VTTPG 47

(962 FCBGA)

Subwoofer
PG 40
CONN

VGA Core

+5V_ALW2/+3.3V_ALW
+5V_ALW/+15V_ALW

PG 49

800 / 1066 MHZ DDR III


PG 13

800 / 1066 MHZ DDR III

SYSTEM POWER

VER : D3A

POWER

3 x 3 mm

PG 20

PG 32

PG 32

USB2.0 x 2 [0:1]

USB CONN

USB2.0 [8]
SATA2 [A5]
SATA2 [A1]
SATA2 [A0]
PCIE [5]

USB/eSATA Combo
PG 33 & eSATA board

SATA-ODD

PCIE [4]
USB2.0 [7]

PG 34

PCIE [6]

Express Card

PG 28

(68P QFN)

1394 CONN
PG 27

CardReader
PG 27
CONN

LPC
PC Card/1394
RICOH R5U230
(48 Pin QFN)
6 x 6 mm

SIO
ITE ITE8512E

SPI

(128 Pin LQFP)


16 x 16 mm

PG 26

SMBus [2]

(20 QFN)

LAN
Broadcom BCM5784M

PAD &
SCREW &
SPRING

System
Reset
Circuit

PG 44

RM5 MB PCB (rev D)

(8 Pin SO8W) PG 30
2

Keyboard

CIR

PG 28

RJ45

PG 42

PG 42

To IO Board

To Daughter Board

(USB*2/ MIC/
HP2/ HP1/ LED)

(Power Button/Speaker/
KB LED/Touch PAD/
Media Button)

PG 43

PG 40

PG 35

PG 29

PS/2
SPI ROM
2MB

4 x 4 mm

Magnetic

PG 41

PG 7,8,9,10,11,12

SATA-HDD PG 34

Express Switch
RICOH R5538D001

Touchpad

Media Button

LED

RTC

PG 36

PG 30

QUANTA
COMPUTER

Title

BLOCK DIAGRAM

PG 35

PG 30

Size

Document Number
Calpella

Date:

Thursday, August 20, 2009


7

Rev
3A
Sheet

of
8

61

Table of Contents
PAGE

Block Diagram

Front Page

3-6

CPU (Clarksfield)

7-12

PCH (IBex Peak-M)

13-14

DDR3 SO-DIMM(204P)

15
16-22

GPU (M96XT)
HDMI & DP

24

LCD connector

25

CRT

26

Card reader PCIe interface

27

Card reader & 1394 CONN

28

Express card

29

SIO (IT8512)

30

Flash/RTC/CIR

31

WLAN

32

WWAN/WPAN

33

USB & eSATA & TV

34

SATA HDD & ODD

35

KB/CCD/UI

36

LED

37

Clock Generator

23

FAN/Thermal

38-40

Audio/CONN/Subwoofer (92HD73C).

41-42

LAN/RJ45 (BCM5784M)

43

System Reset Circuit

44

PAD & SCREW & SPRING

45

CHARGER (MAX8731A)

46

1.8V_RUN (TPS51218)

47

1.5_SUS/0.75(TPS51116)

48

1.1V_VTT(TPS51218)

49

1.05V_PCH (TPS51218)

50

VCC_CORE(MAX17036GTL+)

51

3.3V/5V/15V (MAX17020)

52

VGA_M97(MAX8792)

53

VDDCI_M97(TPS51218)

54

Run Power Switch

55

DCIN & Batt

56

XDP Connector

57

Power Block Diagram

58

SMBUS BLOCK

59

Power status

Power States

DESCRIPTION

POWER PLANE

VOLTAGE

+PWR_SRC

10V~+19V

+RTC_CELL

+3.0V~+3.3V

PAGE

CONTROL
SIGNAL

DESCRIPTION

24,30,45,46,47,48,49,50,51,52,53

MAIN POWER

ACTIVE IN
S0~S5

8,11,29,30

RTC

+3.3V_ALW

+3.3V

3,29,30,34,35,36,43,45,51,54,55

8051 POWER

ALWON

S0~S5

+5V_ALW

+5V

24,33,34,35,47,51,52,54

LCD/CHARGE POWER

ALWON

S0~S5

+15V_ALW

+15V

24,34,51,54

LARGE POWER

+5V_ALW

S0~S5

+3.3V_LAN

+3.3V

41,42

LAN POWER

AUX_ON

+5V_SUS

+5V

11,46,48,49,52,53,54

SLP_S5# CTRLD POWER

SUS_ON

+3.3V_SUS

+3.3V

7,8,9,10,11,20,24,28,29,42,43,46,47,48,
49,52,53,54

SLP_S5# CTRLD POWER

3.3V_SUS_ON

+1.5V_SUS

+1.5V

3,5,13,14,47,52,54

SODIMM POWER

SUS_ON

+0.75V_DDR_VTT

+0.75V

13,14,47,54

SODIMM POWER

SUS_ON

+5V_RUN

+5V

11,18,23,25,33,35,36,37,38,50,54

SLP_S3# CTRLD POWER

RUN_ON

+3.3V_RUN

+3.3V

7,8,9,10,11,13,14,15,18,23,24,26,28,29,30,31,
SLP_S3# CTRLD POWER
32,33,34,35,36,37,38,39,40,41,50,52,54,56

+1.8V_RUN

+1.8V

5,11,17,18,19,46,54

SDVO POWER

RUN_ON

+1.5V_RUN

+1.5V

28,31,32,54

PCH POWER

1.5V_RUN_ON

+1.1V_VTT

+1.1V

3,5,10,11,48,50,56

CPU POWER

RUN_ON

+1.05V_PCH

+1.05V

8,9,11,15,49

PCH POWER

RUN_ON

+0.7V~+1.5V

S0~S5

3.3V_RUN_ON

5,50

CPU CORE POWER

IMVP_VR_ON

+LCDVCC

+3.3V

24

LCD Power

LCDVCC_TST_EN
& ENVDD

+5V_MOD

+5V

34

Module Power

MODC_EN#

+5V_HDD

+5V

34

HDD Power

HDDC_EN#

+5V_ALW2

+5V

35,36,51,54,55

LED power source

LDO output

+VCC_CORE

GND PLANE
AGND

PAGE

DESCRIPTION

38,39,40

AGND_DC/DC

51

AGND_VCORE

50

GND

ALL

QUANTA
COMPUTER

Title

FRONTPAGE

Size

Document Number
RM5

Date:

Thursday, August 20, 2009


7

Rev
3A
Sheet

of
8

61

AUBURNDALE/CLARKSFIELD PROCESSOR (DMI,PEG,FDI)

AUBURNDALE/CLARKSFIELD PROCESSOR (CLK,MISC,JTAG)

DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]

D22
C21
D20
C18
G22
E20
F20
G19

FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
FDI_TX[3]
FDI_TX[4]
FDI_TX[5]
FDI_TX[6]
FDI_TX[7]

F17
E17

FDI_FSYNC[0]
FDI_FSYNC[1]

C17

FDI_INT

F18
D17

FDI_LSYNC[0]
FDI_LSYNC[1]

R170
1K

J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30

PCIE_MRX_GTX_P15
PCIE_MRX_GTX_P14
PCIE_MRX_GTX_P13
PCIE_MRX_GTX_P12
PCIE_MRX_GTX_P11
PCIE_MRX_GTX_P10
PCIE_MRX_GTX_P9
PCIE_MRX_GTX_P8
PCIE_MRX_GTX_P7
PCIE_MRX_GTX_P6
PCIE_MRX_GTX_P5
PCIE_MRX_GTX_P4
PCIE_MRX_GTX_P3
PCIE_MRX_GTX_P2
PCIE_MRX_GTX_P1
PCIE_MRX_GTX_P0

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26

PCIE_MTX_GRX_C_N15
PCIE_MTX_GRX_C_N14
PCIE_MTX_GRX_C_N13
PCIE_MTX_GRX_C_N12
PCIE_MTX_GRX_C_N11
PCIE_MTX_GRX_C_N10
PCIE_MTX_GRX_C_N9
PCIE_MTX_GRX_C_N8
PCIE_MTX_GRX_C_N7
PCIE_MTX_GRX_C_N6
PCIE_MTX_GRX_C_N5
PCIE_MTX_GRX_C_N4
PCIE_MTX_GRX_C_N3
PCIE_MTX_GRX_C_N2
PCIE_MTX_GRX_C_N1
PCIE_MTX_GRX_C_N0

PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25

PCIE_MTX_GRX_C_P15
PCIE_MTX_GRX_C_P14
PCIE_MTX_GRX_C_P13
PCIE_MTX_GRX_C_P12
PCIE_MTX_GRX_C_P11
PCIE_MTX_GRX_C_P10
PCIE_MTX_GRX_C_P9
PCIE_MTX_GRX_C_P8
PCIE_MTX_GRX_C_P7
PCIE_MTX_GRX_C_P6
PCIE_MTX_GRX_C_P5
PCIE_MTX_GRX_C_P4
PCIE_MTX_GRX_C_P3
PCIE_MTX_GRX_C_P2
PCIE_MTX_GRX_C_P1
PCIE_MTX_GRX_C_P0

H_COMP0

AT26

COMP0

AH24

29 SKTOCC#
H_CATERR#

10

PCIE_MRX_GTX_P[0..15]

H_PECI

10 H_THERM#

R499

56 H_CPURST#

1K

CATERR#

AT15

PECI

H_PROCHOT#

AN26

PROCHOT#

H_THERM#

AK15

THERMTRIP#

H_CPURST#_R

PM_SYNC

PAD

VCCPWRGOOD_1

AN27

VCCPWRGOOD_0

R210

7 PM_DRAM_PWRGD

VDDPWRGOOD_R

AK13

SM_DRAMPWROK

VTTPWRGOOD

AM15

VTTPWRGOOD

AM26

TAPPWRGOOD

56 H_PWRGD_XDP

9,16,26,28,29,31,32,41,56

R241

PLTRST#

RESET_OBS#

AL15

R180

10,56 H_CPUPWRGD

AP26

AN14

PM_SYNC
T12

SKTOCC#

AK14

16

RSTIN#

1.5K/F

AL14

= 1.1V

BCLK
BCLK#

A16
B16

CLK_CPU_BCLK 10
CLK_CPU_BCLK# 10

BCLK_ITP
BCLK_ITP#

AR30
AT30

PEG_CLK
PEG_CLK#

E16
D16

DPLL_REF_SSCLK
DPLL_REF_SSCLK#

A18
A17

SM_DRAMRST#

PWR MANAGEMENT

R158
1K

FDI_TX#[0]
FDI_TX#[1]
FDI_TX#[2]
FDI_TX#[3]
FDI_TX#[4]
FDI_TX#[5]
FDI_TX#[6]
FDI_TX#[7]

Intel(R) FDI

E22
D21
D19
D18
G21
E19
F21
G18

PCI EXPRESS -- GRAPHICS

5/14: Change FDI signals


from GND to NC to support
Arrandale discrete

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

COMP1

BCLK_ITP 56
BCLK_ITP# 56
CLK_PCIE_3GPLL 9
CLK_PCIE_3GPLL# 9

+1.1V_VTT
D

F6

DDR3_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

AL1
AM1
AN1

SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2

PM_EXT_TS#[0]
PM_EXT_TS#[1]

AN15
AP15

PM_EXTTS#0_RR245
PM_EXTTS#1_RR248

PRDY#
PREQ#

AT28
AP27

XDP_PREQ#

TCK
TMS
TRST#

AN28
AP28
AT27

XDP_TCLK
XDP_TMS
XDP_TRST#

TDI
TDO
TDI_M
TDO_M

AT29
AR27
AR29
AP29

XDP_TDI_R
XDP_TDO_R
XDP_TDI_M
XDP_TDO_M

DBR#

AN25

H_DBR#_R

R495

AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23

XDP_OBS0_R
XDP_OBS1_R
XDP_OBS2_R
XDP_OBS3_R
XDP_OBS4_R
XDP_OBS5_R
XDP_OBS6_R
XDP_OBS7_R

R203
R211
R207
R206
R198
R201
R204
R197

0
0
0
0
0
0
0
0

13,14

R246
10K

0
0

R249
*12.4K/F_NC

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

XDP_PRDY# 56
XDP_PREQ# 56
XDP_TCLK 56
XDP_TMS 56
XDP_TRST# 56
PAD
PAD
PAD
PAD

T85
T76
T82
T80

PAD
PAD
PAD

XDP_DBRESET# 7,56
XDP_OBS[0:7] 56

XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3
XDP_OBS4
XDP_OBS5
XDP_OBS6
XDP_OBS7

RSTIN#

Clarksfield/Auburndale
750/F
+1.5V_SUS

4/27: Change R200 to 1.1K


and R202 to 3K according
to Intel Design guide 1.52

R200
1.1K/F

+3.3V_ALW
C851

= 1.075V

VDDPWRGOOD_R
R202
3K/F

DG 1.1, processor requires this


pin to be never driven high before
DDR3 voltage planes have ramped
to a stable value. It requires a
1.05V or 1.1V Suspend power rail

0.1U/10V

H_VTTPWRGD
high level:1.1V

U55

43,48 1.1V_VTT_PWRGD

4
1
R243

from power
+1.1V_VTT circuit

PCIE_MTX_GRX_C_P0
PCIE_MTX_GRX_C_P1
PCIE_MTX_GRX_C_P2
PCIE_MTX_GRX_C_P3
PCIE_MTX_GRX_C_P4
PCIE_MTX_GRX_C_P5
PCIE_MTX_GRX_C_P6
PCIE_MTX_GRX_C_P7
PCIE_MTX_GRX_C_P8
PCIE_MTX_GRX_C_P9
PCIE_MTX_GRX_C_P10
PCIE_MTX_GRX_C_P11
PCIE_MTX_GRX_C_P12
PCIE_MTX_GRX_C_P13
PCIE_MTX_GRX_C_P14
PCIE_MTX_GRX_C_P15

10 C618
C603
10 C620
C605
10 C622
C607
10 C624
C609
10 C630
C631
10 C634
C635
10 C638
C641
10 C646
C649

10
10
10
10
10
10
10
10

0.1U PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
0.1U PCIE_MTX_GRX_N2
0.1U
PCIE_MTX_GRX_N3
0.1U PCIE_MTX_GRX_N4
0.1U
PCIE_MTX_GRX_N5
0.1U PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N7
0.1U
0.1U PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N9
0.1U
0.1U PCIE_MTX_GRX_N10
0.1U
PCIE_MTX_GRX_N11
0.1U PCIE_MTX_GRX_N12
0.1U
PCIE_MTX_GRX_N13
0.1U PCIE_MTX_GRX_N14
0.1U
PCIE_MTX_GRX_N15

PCIE_MTX_GRX_N[0..15]

16

0.1U

0.1U PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
0.1U
0.1U PCIE_MTX_GRX_P2
0.1U
PCIE_MTX_GRX_P3
0.1U PCIE_MTX_GRX_P4
0.1U
PCIE_MTX_GRX_P5
0.1U PCIE_MTX_GRX_P6
0.1U
PCIE_MTX_GRX_P7
0.1U PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P9
0.1U
0.1U PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P11
0.1U
0.1U PCIE_MTX_GRX_P12
0.1U
PCIE_MTX_GRX_P13
0.1U PCIE_MTX_GRX_P14
0.1U
PCIE_MTX_GRX_P15

H_THERMTRIP# 51

Thermtrip

2
2K/F

VTTPWRGOOD
R244

74AHC1G08GW

+1.1V_VTT
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TCLK

1K/F

H_CPUPWRGD

SM_RCOMP_2
SM_RCOMP_1
SM_RCOMP_0

Q37
MMST3904-7-F

130/F

R218

JTAG MAPPING

24.9/F

R214

XDP_TDI_R

Layout Note: Place


100/F
these resistors
near Processor

R529

R522

*0_NC

XDP_TDI 56

XDP_TDO_M

XDP_TDO 56

XDP_TRST#

R521
0

16

Processor Pullups

+1.1V_VTT
RSTIN#

PAD T42

R306

R501

49.9/F

49.9/F

*68_NC

H_COMP0

*0_NC

R490

H_COMP1

R310

R156

R238

R239

49.9/F

49.9/F

20/F

20/F

H_COMP3

For Boundary scan purpose!

H_PROCHOT#
use : pull to 68 ohm
unused : pull to 50 ohm

R525
XDP_TDO_R

H_COMP2
H_CATERR#
H_PROCHOT#
H_CPURST#_R

51

XDP_TDI_M

CLK_CPU_BCLK#
R208

R290

Processor
Compensation
Signals

CLK_CPU_BCLK

*51_NC
*51_NC
*51_NC
*51_NC

A
R221

H_THERM#

PCIE_MTX_GRX_P[0..15]

R489
R528
R190
R168

5/3: Added buffer to prevent


power good voltage to fluctuate

DDR3 Compensation Signals

10 C619
10 C604
10 C621
10 C606
10 C623
10 C608
10 C625
10 C610
10 C632
10 C633
10 C636
10 C637
10 C640
10 C645
10 C648
10 C650

T10
T75
T49

R242

PM_EXTTS#1_R

PM_EXTTS#0 13
PM_EXTTS#1 14

Clarksfield/Auburndale
PCIE_MTX_GRX_C_N0
PCIE_MTX_GRX_C_N1
PCIE_MTX_GRX_C_N2
PCIE_MTX_GRX_C_N3
PCIE_MTX_GRX_C_N4
PCIE_MTX_GRX_C_N5
PCIE_MTX_GRX_C_N6
PCIE_MTX_GRX_C_N7
PCIE_MTX_GRX_C_N8
PCIE_MTX_GRX_C_N9
PCIE_MTX_GRX_C_N10
PCIE_MTX_GRX_C_N11
PCIE_MTX_GRX_C_N12
PCIE_MTX_GRX_C_N13
PCIE_MTX_GRX_C_N14
PCIE_MTX_GRX_C_N15

R247
10K

PM_EXTTS#0_R

D25
F24
E23
G23

G16

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

PCIE_MRX_GTX_N15
PCIE_MRX_GTX_N14
PCIE_MRX_GTX_N13
PCIE_MRX_GTX_N12
PCIE_MRX_GTX_N11
PCIE_MRX_GTX_N10
PCIE_MRX_GTX_N9
PCIE_MRX_GTX_N8
PCIE_MRX_GTX_N7
PCIE_MRX_GTX_N6
PCIE_MRX_GTX_N5
PCIE_MRX_GTX_N4
PCIE_MRX_GTX_N3
PCIE_MRX_GTX_N2
PCIE_MRX_GTX_N1
PCIE_MRX_GTX_N0

COMP2

H_COMP1

7
7
7
7

K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31

16

COMP3

AT24

DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PCIE_MRX_GTX_N[0..15]

6/23: Pull SKTOCC# to EC


according to EC request

AT23

H_COMP2

CLOCKS

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

750/F

H_COMP3

DDR3
MISC

7
7
7
7

D24
G24
F23
H23

DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]

R479

49.9/F

B24
D23
B23
A22

R480

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

B26
A26
B27
A25

THERMAL

7
7
7
7

U38B

PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS

DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]

MISC

A24
C23
B22
A21

DMI

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

JTAG & BPM

U38A

7
7
7
7

Scan Chain
(Default)

STUFF -> A, C, E
NO STUFF -> B, D

CPU Only

STUFF -> A, B
NO STUFF -> C, D, E

PCH Only

STUFF -> D, E
NO STUFF -> A, B, C

Title

QUANTA
COMPUTER
CPU 1/4(PEG/DMI)

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
1

of

61

AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

A10
C10
C7
A7
B10
D10
E10
A8
D8
F10
E6
F7
E9
B7
E7
C6
H10
G8
K7
J8
G7
G10
J7
J10
L7
M6
M8
L9
L6
K8
N8
P9
AH5
AF5
AK6
AK7
AF6
AG5
AJ7
AJ6
AJ10
AJ9
AL10
AK12
AK8
AL7
AK11
AL8
AN8
AM10
AR11
AL11
AM9
AN9
AT11
AP12
AM12
AN12
AM13
AT14
AT12
AL13
AR14
AP14

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

13 M_A_BS0
13 M_A_BS1
13 M_A_BS2

AC3
AB2
U7

SA_BS[0]
SA_BS[1]
SA_BS[2]

13 M_A_CAS#
13 M_A_RAS#
13 M_A_WE#

AE1
AB3
AE9

SA_CAS#
SA_RAS#
SA_WE#

SA_CK[0]
SA_CK#[0]
SA_CKE[0]

AA6
AA7
P7

M_A_CLK0 13
M_A_CLK0# 13
M_A_CKE0 13

SA_CK[1]
SA_CK#[1]
SA_CKE[1]

Y6
Y5
P6

M_A_CLK1 13
M_A_CLK1# 13
M_A_CKE1 13

SA_CS#[0]
SA_CS#[1]

AE2
AE8

M_A_CS#0 13
M_A_CS#1 13

SA_ODT[0]
SA_ODT[1]

AD8
AF9

M_A_ODT0 13
M_A_ODT1 13

SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]

B9
D7
H7
M7
AG6
AM7
AN10
AN13

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

C9
F8
J9
N9
AH7
AK9
AP11
AT13

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

C8
F9
H9
M9
AH8
AK10
AN11
AR13

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

14 M_B_DQ[63:0]

M_A_DM[7:0] 13

M_A_DQS#[7:0] 13

M_A_DQS[7:0] 13

M_A_A[15:0] 13

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5
F3
G4
H6
G2
J6
J3
G1
G5
J2
J1
J5
K2
L3
M1
K5
K4
M4
N5
AF3
AG1
AJ3
AK1
AG4
AG3
AJ4
AH4
AK3
AK4
AM6
AN2
AK5
AK2
AM4
AM3
AP3
AN5
AT4
AN6
AN4
AN3
AT5
AT6
AN7
AP6
AP8
AT9
AT7
AP9
AR10
AT10

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

14 M_B_BS0
14 M_B_BS1
14 M_B_BS2

AB1
W5
R7

SB_BS[0]
SB_BS[1]
SB_BS[2]

14 M_B_CAS#
14 M_B_RAS#
14 M_B_WE#

AC5
Y7
AC6

SB_CAS#
SB_RAS#
SB_WE#

SB_CK[0]
SB_CK#[0]
SB_CKE[0]

W8
W9
M3

M_B_CLK0 14
M_B_CLK0# 14
M_B_CKE0 14

SB_CK[1]
SB_CK#[1]
SB_CKE[1]

V7
V6
M2

M_B_CLK1 14
M_B_CLK1# 14
M_B_CKE1 14

SB_CS#[0]
SB_CS#[1]

AB8
AD6

M_B_CS#0 14
M_B_CS#1 14

SB_ODT[0]
SB_ODT[1]

AC7
AD1

M_B_ODT0 14
M_B_ODT1 14

SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]

D4
E1
H3
K1
AH1
AL2
AR4
AT8

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

D5
F4
J4
L4
AH2
AL4
AR5
AR8

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

C5
E3
H4
M5
AG2
AL5
AP5
AR7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_DM[7:0] 14

DDR SYSTEM MEMORY - B

13 M_A_DQ[63:0]

U38D

DDR SYSTEM MEMORY A

U38C

M_B_DQS#[7:0] 14

M_B_DQS[7:0] 14

M_B_A[15:0] 14

Clarksfield/Auburndale

Channel A DQ[15,32,48,54], DM[5]


Requires minimum 12mils spacing
with all other signals, including data signals.

Clarksfield/Auburndale
A

Channel B DQ[16,18,36,42,56,57,60,61,62]
Requires minimum 12mils spacing
with all other signals, including data signals.
Title

QUANTA
COMPUTER
CPU 2/4(DDR)

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
1

of

61

AUBURNDALE/CLARKSFIELD PROCESSOR (POWER)

AUBURNDALE/CLARKSFIELD PROCESSOR (GRAPHICS POWER)

22U

22U

C679

C684

C686

22U

22U

22U

Inside cavity of the socket

C321

C330

C336

10U

10U

C356

C346

C363

10U

10U

10U

10U

Under cavity of the socket

C393

C392

10U

10U

10U

C389

C408

C410

10U

10U

10U

C407

C397

C409

10U
B

10U

10U

Between inductor and


socket on top layer

470U x 4 or 330U x 6
put on Power side

22U

22U

22U

C365
22U

Under cavity of the socket

C708

C709

C707

10U

10U

10U

C706

C616

C613

10U

10U

10U

C629

C627

10U

10U

J24
J23
H25

VTT1_45
VTT1_46
VTT1_47

VTT_SELECT

R205

1K

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18

AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1

VTT0_59
VTT0_60
VTT0_61
VTT0_62

P10
N10
L10
K10

VTT1_63
VTT1_64
VTT1_65
VTT1_66
VTT1_67
VTT1_68

J22
J20
J18
H21
H20
H19

VCCPLL1
VCCPLL2
VCCPLL3

L26
L27
M26

C317

C327

C345

C364

C355

1U

1U

1U

1U

1U

C303

C371

22U

22U

& no 330U x 1 for


Clarksfield only.

Edge of the socket

K26
J27
J26
J25
H27
G28
G27
G26
F26
E26
E25
PSI#

AR25
AT25
AM24

+1.1V_VTT

330U x 3 put on Power side

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
PROC_DPRSLPVR

GFX_VR_EN
GFX_DPRSLPVR
GFX_IMON

+1.5V_SUS

AN33

H_PSI# 50

AK35 VID0
AK33 VID1
AK34 VID2
VID3
AL35
VID4
AL33
AM33 VID5
AM35 VID6
AM34 DPRSLPVR

VID0 50
VID1 50
VID2 50
VID3 50
VID4 50
VID5 50
VID6 50
DPRSLPVR 50

G15

H_VTTVID1 48

VTT1_48
VTT1_49
VTT1_50
VTT1_51
VTT1_52
VTT1_53
VTT1_54
VTT1_55
VTT1_56
VTT1_57
VTT1_58

PEG & DMI

C378

AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15

C309

+1.1V_VTT

CPU CORE SUPPLY

C366

VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44

C328

FDI

10U

C351

GRAPHICS VIDs

22U

22U

5/14: Change to NC to
support Arrandale disable

- 1.5V RAILS

C677

C312

22U

GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]

AM22
AP22
AN22
AP23
AM23
AP24
AN24

DDR3

C674

C311

22U

AR22
AT22

1.1V

C680

C310

VAXG_SENSE
VSSAXG_SENSE

+1.8V_RUN

1.8V

22U

+1.1V_VTT

C666

C665

C313

C304

C668

1U

1U

2.2U

4.7U

22U

Clarksfield/Auburndale

Auburndale : drive VTT_SELECT = 1 for 1.05V


Clarksfield : drive VTT_SELECT = 0 for 1.1V
+1.1V_VTT

+VCC_CORE

C672

22U

AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

ISENSE

AN35

I_MON 50

R216
100/F

VCC_SENSE
VSS_SENSE

AJ34
AJ35

VCCSENSE 50
VSSSENSE 50

1 2

C676

22U

VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8
VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32

R212

VTT_SENSE
VSS_SENSE_VTT

B15
A15

VTT_SENSE 48

C678

POWER

22U

CPU VIDS

C683

22U

SENSE LINES

C685

22U

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100

VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36

GRAPHICS

C669
D

+1.1V_VTT

1.1V RAIL POWER

+VCC_CORE

5/14: Change to GND to


support Arrandale disable

SENSE
LINES

U38G

AT21
AT19
AT18
AT16
AR21
AR19
AR18
AR16
AP21
AP19
AP18
AP16
AN21
AN19
AN18
AN16
AM21
AM19
AM18
AM16
AL21
AL19
AL18
AL16
AK21
AK19
AK18
AK16
AJ21
AJ19
AJ18
AJ16
AH21
AH19
AH18
AH16

POWER

U38F

AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26

100/F

R292
1K

R283
1K

R289
1K

R298
*1K_NC

R296
*1K_NC

R317
1K

R304
*1K_NC

R301
1K

R311
*1K_NC

R291
*1K_NC

R282
*1K_NC

R288
*1K_NC

R297
1K

R295
1K

R314
*1K_NC

R303
1K

R300
*1K_NC

R307
1K

VID0
VID1
VID2
VID3
VID4
VID5
VID6
DPRSLPVR
H_PSI#

Note : For Validating IMVP VR R?


should be STUFF and R? NO_STUFF
Title

Clarksfield/Auburndale

QUANTA
COMPUTER
CPU 3/4(POWER)

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
1

of

61

AUBURNDALE/CLARKSFIELD PROCESSOR (GND)

AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)

U38I

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30

K27
K9
K6
K3
J32
J30
J21
J19
H35
H32
H28
H26
H24
H22
H18
H15
H13
H11
H8
H5
H2
G34
G31
G20
G9
G6
G3
F30
F27
F25
F22
F19
F16
E35
E32
E29
E24
E21
E18
E13
E11
E8
E5
E2
D33
D30
D26
D9
D6
D3
C34
C32
C29
C28
C24
C22
C20
C19
C16
B31
B25
B21
B18
B17
B13
B11
B8
B6
B4
A29
A27
A23
A9

U38E

Processor Generated
SO-DIMM VREF_DQ (M3)
Connect to page 13, 14

VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233

*0_NC
SA_DIMM_VREF
SB_DIMM_VREF

R140

M_VREF_DQ_DIMM0
M_VREF_DQ_DIMM1

R142
*0_NC

T48
T77
T36
T50
T46
T53
T79
T47
T27
T52
T78
T16

PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD

CFG0
CFG3
CFG4
CFG7

& NC CFG12 for Clarksfield only.

VSS

NCTF

U38H
AT20
AT17
AR31
AR28
AR26
AR24
AR23
AR20
AR17
AR15
AR12
AR9
AR6
AR3
AP20
AP17
AP13
AP10
AP7
AP4
AP2
AN34
AN31
AN23
AN20
AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11
AM8
AM5
AM2
AL34
AL31
AL23
AL20
AL17
AL12
AL9
AL6
AL3
AK29
AK27
AK25
AK20
AK17
AJ31
AJ23
AJ20
AJ17
AJ14
AJ11
AJ8
AJ5
AJ2
AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13
AH9
AH6
AH3
AG10
AF8
AF4
AF2
AE35

T51
T20
T81
T24
T35

VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7

AT35
AT1
AR34
B34
B2
B1
A35

PAD
PAD
PAD
PAD
PAD

AP25
AL25
AL24
AL22
AJ33
AG9
M27
L28
J17
H17
G25
G17
E31
E30

AM30
AM28
AP31
AL32
AL30
AM31
AN29
AM32
AK32
AK31
AK28
AJ28
AN30
AN32
AJ32
AJ29
AJ30
AK30
H16

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
SA_DIMM_VREF
SB_DIMM_VREF
RSVD11
RSVD12
RSVD13
RSVD14

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
RSVD_TP_86

RESERVED

Follow Intel CRB to GND


T113 PAD
R702
R703

*0_NC TP_RSVD17_R
*0_NC TP_RSVD18_R

T114 PAD

B19
A19

RSVD15
RSVD16

A20
B20

RSVD17
RSVD18

U9
T9

RSVD19
RSVD20

AC9
AB9

RSVD21
RSVD22

C1
A3

RSVD32
RSVD33

AJ13
AJ12

RSVD34
RSVD35

AH25
AK26

RSVD36
RSVD_NCTF_37

AL26
AR2

RSVD38
RSVD39

AJ26
AJ27

RSVD_NCTF_40
RSVD_NCTF_41

AP1
AT2

RSVD_NCTF_42
RSVD_NCTF_43

AT3
AR1

RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53
RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57
RSVD58

AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32

RSVD_TP_59
RSVD_TP_60
KEY
RSVD62
RSVD63
RSVD64
RSVD65

E15
F15
A2
D15
C15
AJ15
AH15

Follow Intel CRB to GND


PAD
RSVD64_R
RSVD65_R

RSVD_NCTF_23
RSVD_NCTF_24

J29
J28

RSVD26
RSVD27

A34
A33

RSVD_NCTF_28
RSVD_NCTF_29

C35
B35

RSVD_NCTF_30
RSVD_NCTF_31

RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75

AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3

RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85

V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9

VSS

T112

T90
T96

PAD

T89

AP34
R302
0

Can be left NC is Intel CRM


implementation; ESD/DG
recommendation to GND

Clarksfield/Auburndale

Scott_0630:Change R294
footprint from RC0402-C to
RC0402

CFG0

R285

*3.01K_NC

CFG3

R294

3.01K

CFG4

R281

*3.01K_NC

CFG7

R276

*3.01K_NC

The Clarksfield processor's PCI


Express interface may not meet
PCI Express 2.0 jitter
specifications. Intel recommends
placing a 3.01K +/- 5% pull down
resistor to VSS on CFG[7] pin for
both rPGA and BGA components.
This pull down resistor should be
removed when this issue is fixed.

PAD
PAD

T111
*0_NC
*0_NC

PAD

Clarksfield/Auburndale
Clarksfield/Auburndale

R700
R701

CFG0
(PCI-Epress
Configuration Select)

Single PEG (Default)

Bifurcation enabled

CFG3
(PCI-Epress Static
Lane Reversal)

Normal Operation
(Default)

Lane Numbers Reversed

Disabled; No Physical
Display Port attached to
Embedded Diplay Port
(Default)

Enabled; An external Display


port device is connected to
the Embedded Display port

Common
motherboard
design

For early samples


pre-ES1 CFD
(Default)

CFG4
(Display Port
Presence)

Title

CFG7
Clarksfield (only for
early samples pre-ES1)
3

QUANTA
COMPUTER
CPU 4/4(GND_RESV)

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
1

of

61

IBEX PEAK-M (DMI,FDI,GPIO)

IBEX PEAK-M (LVDS,DDI)


U39D

3
3
3
3

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

BE22
BF21
BD20
BE18

DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN

3
3
3
3

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

BD22
BH21
BC20
BD18

DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP

Width = 4 mil ; close


PCH within 500 mil
+1.05V_VCCIO

R494

49.9/F DMI_COMP

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

DG1.1, Page 314.


SYS_PWROK : This signal should be used on the platform to
indicate that the processor VR power is good and therefore
it can be connected to the same source as PWROK on PCH.
MEPWROK : For platform not supporting Intel AMT it can be
connected to PWROK

R228

29 PCH_PWRGD

SYS_PWROK

MEPWROK

K5

MEPWROK

LAN_RST#

A10

LAN_RST#

B17

D9

DRAMPWROK

C16

SUS_PWR_ACK

M1

SUS_PWR_DN_ACK / GPIO30

P5

PWRBTN#

R566 2

1 10K PM_BATLOW#

+3.3V_SUS

R268 2

1 10K PM_RI#

PWROK

PCH_RSMRST#

+3.3V_SUS

BJ12

FDI_LSYNC1

BG14

CLKRUN# / GPIO32

29 AC_PRESENT

BH13

FDI_LSYNC0

SYS_PWROK

R234

29 SIO_PWRBTN#

FDI_FSYNC1

M6

PWROK

29 SUS_PWR_ACK

BF13

WAKE#

29 PCH_RSMRST#

BJ14

SYS_RESET#

R555

3 PM_DRAM_PWRGD

FDI_INT
FDI_FSYNC0

T6

System Power Management

3,56 XDP_DBRESET#

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12

RSMRST#

P7

ACPRESENT / GPIO31

A6

BATLOW# / GPIO72

F14

RI#

FDI Disable :
NC all signals
as DG 1.1,
Page 82 & 83
LVDS Disable :
All signals associated
with the interface can
be left asNo connects.

J12

PCIE_WAKE#

Y1

CLKRUN#

SUS_STAT# / GPIO61

P8

RSV_LPCPD#

SUSCLK / GPIO62

F3

SUSCLK

SLP_S5# / GPIO63

E4

SLP_S4#

H7

SLP_S3#

P12

SLP_M#

K8

TP23

N2

PMSYNCH
SLP_LAN# / GPIO29

PCIE_WAKE# 28,41
CLKRUN# 29

T25

PAD

T102

SIO_SLP_S5# 29
PAD

T26

SIO_SLP_S3# 29
SLP_M#

BJ10
F6

PAD

PAD

T31

PAD

T29

PM_SYNC 3

CRT Disable :
CRT_RED
CRT_GREEN
CRT_BLUE
CRT_HSYCN
CRT_VSYNC
Leave as NC (floating).

L_DDC_CLK
L_DDC_DATA

AB46
V48

L_CTRL_CLK
L_CTRL_DATA

AP39
AP41

LVD_IBG
LVD_VBG

AT43
AT42

LVD_VREFH
LVD_VREFL

AV53
AV51

LVDSA_CLK#
LVDSA_CLK

BB47
BA52
AY48
AV47

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

BB48
BA50
AY49
AV48

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

AP48
AP47

LVDSB_CLK#
LVDSB_CLK

AY53
AT49
AU52
AT53

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

AY51
AT48
AU50
AT51

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

AA52
AB53
AD53

CRT_BLUE
CRT_GREEN
CRT_RED

BJ48
BG48

SDVO_INTN
SDVO_INTP

BF45
BH45
D

SDVO_CTRLCLK
SDVO_CTRLDATA

CRT_DDC_CLK
CRT_DDC_DATA

Y53
Y51

CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN

T51
T53

DDPB_AUXN
DDPB_AUXP
DDPB_HPD

BG44
BJ44
AU38

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38

DDPC_CTRLCLK
DDPC_CTRLDATA

Y49
AB49

DDPC_AUXN
DDPC_AUXP
DDPC_HPD

BE44
BD44
AV40

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36

DDPD_CTRLCLK
DDPD_CTRLDATA

V51
V53

AD48
AB51
R215
1K
0.5%

SDVO_STALLN
SDVO_STALLP

SDVO

DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP

L_BKLTCTL

BJ46
BG46

Display port B

BD24
BG22
BA20
BG20

Y48
AB48
Y45

SDVO_TVCLKINN
SDVO_TVCLKINP

Display port C

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

L_BKLTEN
L_VDD_EN

U50
U52

DDPD_AUXN
DDPD_AUXP
DDPD_HPD

BC46
BD46
AT38

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36

Display port D

3
3
3
3

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

T48
T47

LVDS

DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN

FDI

BC24
BJ22
AW20
BJ20

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

DMI

3
3
3
3

BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12

Digital Display Interface

U39C

CRT

IbexPeak-M_R1P0

SLP_LAN#

PAD

T39

IbexPeak-M_R1P0

+3.3V_SUS
PCH_PWRGD

R564 2

1 10K

PCH_RSMRST#

R571 2

1 10K

LAN_RST#

R557 2

1 10K

Internal LAN disable, LAN_RST#


is required 8.2K ~ 10K PD.

PCIE_WAKE#

R254

CLKRUN#

R531 2

1K
+3.3V_RUN
1 10K

Title

QUANTA
COMPUTER
PCH 1/6(DMI_VIDEO)

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
1

of

61

Cap values depend on Xtal


C701
1

R552

32.768KHZ

10M

U39A

Y3

20K
1

R574

20K
1

R568

1M
2

R570

C696
2
1

IBEX PEAK-M (HDA,JTAG,SATA)

RTC_X1
2

15P/50V

+RTC_CELL

RTC_X2

B13
D13

RTCX1
RTCX2

RTC_RST#

C14

RTCRST#

*27P/50V_NC
2 33

ACZ_SYNC

2 33

ACZ_RST#

R573 1

2 33

ACZ_SDOUT

38 ICH_AZ_CODEC_SDOUT

SPKR

Place all series terms close to PCH (within 500 mil) except for SDIN
input lines,which should be close to source.Placement of R773, R775,
R776 & R777 should equal distance to the T split trace point.
Basically, keep the same distance from T for all series
termination resistors.

T88 PAD

Scott_0630:Change R545 footprint from RC0402-C to RC0402.

Low = Default.
High = No Reboot.

T97 PAD
T99 PAD

2 *1K_NC

HDA_SYNC

SPKR

P1

SPKR

T95 PAD

HDA_RST#

G30

HDA_SDIN0

T37 PAD

F30

HDA_SDIN1

T40 PAD

E32

HDA_SDIN2

T43 PAD

F32

HDA_SDIN3

ACZ_SDOUT

B29

HDA_SDO

GPIO33

H32

HDA_DOCK_EN# / GPIO33

J30

HDA_DOCK_RST# / GPIO13

PCH_JTAG_TCK_BUFM3
K3

JTAG_TMS

PCH_JTAG_TDI

K1

JTAG_TDI

PCH_JTAG_TDO

J2

JTAG_TDO

PCH_JTAG_RST#

J4

TRST#

30 PCH_SPI_CLK

BA2

SPI_CLK

30 PCH_SPI_CS0#

AV3

SPI_CS0#

AY3

T13 PAD

JTAG_TCK

PCH_JTAG_TMS

GPIO33

6/2: Change R261 from 10K_NC


to 1K_NC according to Intel design guide 1.51

SPKR

C30

35 KB_LED_DET

T93 PAD

No Reboot strap.

R261 1

HDA_BCLK

D29

38 ICH_AZ_CODEC_SDIN0

R561 1

2 *1K_NC

A30

ACZ_SYNC

ACZ_RST#

R273 1

SPKR

ACZ_BIT_CLK

C703

38 ICH_AZ_CODEC_SYNC

R545 1

INTVRMEN

D33
B33
C32
A32

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

FWH4 / LFRAME#

C34

LPC_LFRAME# 29,32

LDRQ0#
LDRQ1# / GPIO23

A34
F34

PAD
PAD

SERIRQ

AB9

IRQ_SERIRQ

29,32
29,32
29,32
29,32

T92
T34
IRQ_SERIRQ

29

AY1

SPI_MOSI

30 PCH_SPI_SO

AV1

SPI_MISO

Note : GPIO33 is a signal used for Flash


Descriptor Security Override/ME Debug
Mode.This signal should be only asserted
lowthrough an external pull-down in
manufacturing or debug environments
ONLY.

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

AK7
AK6
AK11
AK9

SATA_RX0- 34
SATA_RX0+ 34
SATA_TX0-_C 34
SATA_TX0+_C 34

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

AH6
AH5
AH9
AH8

SATA_RX1- 34
SATA_RX1+ 34
SATA_TX1-_C 34
SATA_TX1+_C 34

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

AF11
AF9
AF7
AF6

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

AH3
AH1
AF3
AF1

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

AD9
AD8
AD6
AD5

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

AD3
AD1
AB3
AB1

SATAICOMPO

AF16

SATAICOMPI

AF15

HDD

ODD

Notes : Put AC Coupling Cap. near device side.


As DG1.1, Page 299, the series capacitors may
be placed at any point on the traces between
PCH and the Serial ATA connector. However, it
is recommended that they should be close to
the connector for optimal signal quality

Notes : FIS-based Port


Multiplier support on
SATA Ports 4 and 5 in
AHCI/RAID mode.

SATA_RX5- 33
SATA_RX5+ 33
SATA_TX5-_C 33
SATA_TX5+_C 33

E-SATA

within 500 mils of the PCH


SATA_COMP

R213

37.4/F

+1.05V_PCH

PU 10K to +3.3V_RUN
at Page 38

SPI_CS1#

30 PCH_SPI_SI

SATA

38

ACZ_BIT_CLK

29,38 ICH_AZ_CODEC_RST#

+3.3V_RUN

A14

IHDA

2 33

PCH_INVRMEN

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

1U/10V

INTVRMEN(Internal Voltage Regulator Enable) :


This signal enables the internal 1.05 V regulators.
This signal must be always pulled-up to VccRTC.
R562 1

INTRUDER#

LPC

330K

SRTCRST#

A16

RTC

R556

+RTC_CELL

D17

SM_INTRUDER#

JTAG

1U/10V

C699

SRTC_RST#

SPI

C700

15P/50V

38 ICH_AZ_CODEC_BITCLK

SATALED#

T3

SATA0GP / GPIO21

Y9

R188 1

2 10K

SATA1GP / GPIO19

V1

R537 1

2 10K

SATA_ACT# 36

+3.3V_RUN

IbexPeak-M_R1P0

6/2: NC JTAG resistors as PCH is in QT stage


+3.3V_SUS

Res. of TDI near PCH

R236

R251

R263

R259

*200_NC

*200_NC

*200_NC

*20K_NC
PCH_JTAG_TCK_BUF
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_RST#

R544
51

R546

R547

R549

R548

*100_NC

*100_NC

*100_NC

*10K_NC

Scott_0707: Reserver
PCH_JTAG_RST#
circuit as review.

Note : Only pop when PCH is production


stage & need "JTAG boundary Scan".
Remember to depop XDP side Res.
Title

NC all Res. when PCH is


production stage.

Res. of TDO
PCH ES1 stage : NC
PCH ES2 stage : pop

PCH 2/6(SATA_SPI)

Scott_0703 : Note : Delete pull up 1.05V according to


Intel change notice! (Reserved for debug purpose)

QUANTA
COMPUTER

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
1

of

61

IBEX PEAK-M (PCI,USB,NVRAM)

IBEX PEAK-M (PCI-E,SMBUS,CLK)


U39B

T103 PAD
T86 PAD
T91 PAD
34 PCH_IRQH_GPIO5

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

G38
H51
B37
A44

PIRQA#
PIRQB#
PIRQC#
PIRQD#

PCI_REQ0#
PCI_REQ1#
USB_MCARD3_DET#
USB_MCARD1_DET#

F51
A46
B45
M53

REQ0#
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54

PCI_GNT0#
PCI_GNT1#
PCI_GNT2#
PCI_GNT3#

F48
K45
F36
H53

GNT0#
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCH_IRQH_GPIO5

B41
K53
A36
A48

PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5

PCI_SERR#
PCI_PERR#
PCI_IRDY#

29 CLK_PCI_8512

SERR#
PERR#

PCI_PLOCK#

D49

PLOCK#

PCI_STOP#
PCI_TRDY#

D41
C48

STOP#
TRDY#

M7

PME#

D5

PLTRST#

R534 1 22

CLK_LPC_DEBUG_C

R220 1 22
CLK_PCI_FB R526 1 22

2
2

CLK_PCI_8512_C
CLK_PCI_FB_C

32 CLK_LPC_DEBUG

PCIRST#

A42
H44
F46
C46

PCI_PLTRST#

E44
E50

N52
P53
P46
P51
P48

NV_RCOMP

AU2

NV_RB#

AV7

NV_WR#0_RE#
NV_WR#1_RE#
NV_WE#_CK0
NV_WE#_CK1

PCI_DEVSEL#
PCI_FRAME#

PME#

T30 PAD

K6

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

IRDY#
PAR
DEVSEL#
FRAME#

0.1U/10V
0.1U/10V

PCIE_TXN2_C
PCIE_TXP2_C

C353
C349

1
1

2
2

0.1U/10V
0.1U/10V

PCIE_TXN3_C
PCIE_TXP3_C

Express Card

PCIE_RX4PCIE_RX4+
PCIE_TX4PCIE_TX4+

C329
C324

1
1

2
2

0.1U/10V
0.1U/10V

C658
C657

1
1

2
2

0.1U/10V
0.1U/10V

PCIE_TXN4_C
PCIE_TXP4_C

Card Reader
PCIE_TXN5_C
PCIE_TXP5_C

Giga Bit LOM

41 PCIE_RX6-/GLAN_RX41 PCIE_RX6+/GLAN_RX+
41 PCIE_TX6-/GLAN_TX41 PCIE_TX6+/GLAN_TX+

C339
C332

1
1

2
2

0.1U/10V
0.1U/10V

GLAN_TXN_C
GLAN_TXP_C

AY8
AY5
AV11
BF5
H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24

PCH_USBP3PCH_USBP3+

PCH_USBP0PCH_USBP0+
PCH_USBP1PCH_USBP1+
PCH_USBP2PCH_USBP2+
PAD T32
PAD T23
PCH_USBP4PCH_USBP4+
PCH_USBP5PCH_USBP5+

40
40
40
40
33
33

5/3: Added 0 ohms and change


pull up to PCH side

Side pair (Top / left, IB)


Side pair (Bottom / left, IB)

Mini Card (WLAN)


Mini Card (WPAN)

5/12: Move WPAN from port 6 to port 8 and


Expresscard from port 7 to port 10 to support HM55
Mini Card (WWAN)

PCH_USBP8- 32
PCH_USBP8+ 32
PCH_USBP9- 33
PCH_USBP9+ 33
PCH_USBP10- 28
PCH_USBP10+ 28
PCH_USBP11- 35
PCH_USBP11+ 35

Mini WPAN

BA32
BB32
BD32
BE32

PERN4
PERP4
PETN4
PETP4

BF33
BH33
BG32
BJ32

PERN5
PERP5
PETN5
PETP5

BA34
AW34
BC34
BD34

PERN6
PERP6
PETN6
PETP6

AT34
AU34
AU36
AV36

PERN7
PERP7
PETN7
PETP7

BG34
BJ34
BG36
BJ36

PERN8
PERP8
PETN8
PETP8

AM43
AM45

2 0 MINI3CLK_REQ#_R

R672 1

32 MINI3CLK_REQ#

N4
AH42
AH41

31 CLK_PCIE_MINI1#
31 CLK_PCIE_MINI1

Mini WLAN

U4
AM47
AM48

32 CLK_PCIE_MINI3#
32 CLK_PCIE_MINI3

Mini WWAN

P9

2 0 MINI2CLK_REQ#_R

R671 1

32 MINI2CLK_REQ#

TV
Express Card

PERN3
PERP3
PETN3
PETP3

AK48
AK47

32 CLK_PCIE_MINI2#
32 CLK_PCIE_MINI2

MINI1CLK_REQ#_R

Camera

2 0 CARD_CLK_REQ#_C M9

R674 1

28 CARD_CLK_REQ#

A8
AM51
AM53

28 CLK_PCIE_EXPCARD#
28 CLK_PCIE_EXPCARD

Express Card

CLKOUT_PCIE1N
CLKOUT_PCIE1P
PCIECLKRQ1# / GPIO18
CLKOUT_PCIE2N
CLKOUT_PCIE2P

B25

USBRBIAS

D25

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

N16
J16
F16
L16
E14
G16
F12
T15

R262

22.6/F

Card Reader
OC0#
OC1#
OC2#
OC3#
OC4#
OC5#
OC6#
OC7#

OC0# 33
OC1# 33

AJ50
AJ52

26 CLK_PCIE_CARD_READER#
26 CLK_PCIE_CARD_READER

H6

for USB 0/1


for USB 2
AK53
AK51

41 CLK_PCIE_LOM#
41 CLK_PCIE_LOM

Giga Bit LOM

2 0 LOMCLK_REQ#_R

R225 1

41 LOMCLK_REQ#

5/13: Added MOSFET Q81 to prevent leakage


from 3.3V_SUS to cardreader during S3

5/12: Depop R226 and R229 as BIOS decided


to boot from SPI ROM connected to PCH

PLTRST# 3,16,26,28,29,31,32,41,56

PCI_REQ1#
PCI_FRAME#
PCI_TRDY#
PCH_IRQH_GPIO5
+3.3V_RUN

6
7
8
9
10

USB OC Pullup

5
4
3
2
1

OC7#
OC3#
OC0#
OC1#
+3.3V_SUS

6
7
8
9
10

Boot BIOS Strap


PCI_GNT1# PCI_GNT0# Boot BIOS Location

OC6#
OC4#
OC2#
OC5#

10P8R-10K

PCI_PLOCK#
USB_MCARD1_DET#
PCI_PIRQB#
PCI_REQ0#

PCI_PIRQC#
PCI_STOP#
PCI_IRDY#
PCI_PIRQD#
+3.3V_RUN

6
7
8
9
10

T13
T11

CL_RST1#

T9

PEG_A_CLKRQ# / GPIO47

H1

CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P

AT1
AT3

NC for Non-iAMT

PEG_A_CLKRQ#

R563

10K

CLK_PCIE_VGA# 16
CLK_PCIE_VGA 16
CLK_PCIE_3GPLL# 3
CLK_PCIE_3GPLL 3

AW24
BA24

CLK_BUF_PCIE_3GPLL# 15
CLK_BUF_PCIE_3GPLL 15

CLKIN_BCLK_N
CLKIN_BCLK_P

AP3
AP1

CLK_BUF_BCLK# 15
CLK_BUF_BCLK 15

CLKIN_DOT_96N
CLKIN_DOT_96P

F18
E18

CLK_BUF_DREFCLK# 15
CLK_BUF_DREFCLK 15

AH13
AH12

CLK_BUF_DREFSSCLK# 15
CLK_BUF_DREFSSCLK 15

CLKIN_DMI_N
CLKIN_DMI_P

CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P

PCIECLKRQ3# / GPIO25

T22

To EC

AD43
AD45
AN4
AN2

PAD

REFCLK14IN

P41

CLKIN_PCILOOPBACK

J42

CLK_PCI_FB

XTAL25_IN
XTAL25_OUT

AH51
AH53

R675 1
R676 1

XCLK_RCOMP

AF38

XCLK_RCOMP

CLKOUT_PCIE4N
CLKOUT_PCIE4P
PCIECLKRQ4# / GPIO26

CLK_ICH_14M 15

2 0
2 0

5/3: Added 0 ohms to GND according


to Intel reccomandation

R191

+1.05V_PCH

90.9/F

P13

CLKOUT_PCIE5N
CLKOUT_PCIE5P
PCIECLKRQ5# / GPIO44
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
PEG_B_CLKRQ# / GPIO56

CLKOUTFLEX0 / GPIO64

T45

CLK_FLEX0

CLKOUTFLEX1 / GPIO65

P43

CLK_FLEX1

CLKOUTFLEX2 / GPIO66

T42

CLK_FLEX2

CLKOUTFLEX3 / GPIO67

N50

CLK_FLEX3

PAD

T18

PAD

T21

PAD

T19

PAD

T84

MINI1CLK_REQ#_R

26 CLK_PCIE_REQ5#

Non-iAMT

These are for


backdrive issue.
3

CLK_PCIE_REQ5#_R

RP7
4P2R-2.2K

2N7002W-7-F

LPC

Reserved (NAND)

PCI

SPI

+3.3V_SUS

Q61
SML1_SMBCLK

SMBCLK1 20,24,29

2N7002W-7-F

PCH_SMB_ALERT#
PCH_SML0ALERT#
PCH_SML1ALERT#
PCH_SMBCLK
PCH_SMBDATA
SML0CLK
SML0DATA
SML1_SMBCLK
SML1_SMBDATA

*1K_NC

10K/F
10K/F
10K/F
2.2K/F
2.2K/F
2.2K/F
2.2K/F
2.2K/F
2.2K/F

+3.3V_SUS
CLK_PCIE_REQ0#
MINI1CLK_REQ#_R

R542

R558
R250
R219
R267
R255
R565
R271
R266
R235

PCI_GNT3#

SMBDAT1 20,24,29

R232
R576

2
2

1 10K
1 10K

CLK_PCIE_REQ5#_R R258
LOMCLK_REQ#_R
R227
CARD_CLK_REQ#_C R277

2
2
2

1 10K
1 10K
1 10K

56 PCH_SMBDATA

5
4
3
2
1

PCI_PIRQA#
PCI_SERR#
PCI_DEVSEL#
PCI_PERR#

PCI_GNT3#

0 = A16 swap
override/Top-Block
Swap Override enabled
1 = Default

+3.3V_RUN

56 PCH_SMBCLK

PCH_SMBCLK

Title
MINI2CLK_REQ#_R
MINI3CLK_REQ#_R

R536
R231

2
2

Q60
1

MEM_SCLK 13,14,28,31,32,34
A

2N7002W-7-F

+3.3V_RUN

4/28: Change polarity to prevent leakage

MEM_SDATA 13,14,28,31,32,34

2N7002W-7-F

2N7002W-7-F

A16 swap override Strap/Top-Block


Swap Override jumper

Q63
1

PCH_SMBDATA 3

+3.3V_RUN

10P8R-8.2K

0
0

10P8R-8.2K
RP6

5
4
3
2
1

2N7002W-7-F

Q62
SML1_SMBDATA
1

+3.3V_SUS
RP1

CL_CLK1
CL_DATA1

T38

+3.3V_RUN

+3.3V_RUN

+3.3V_RUN

RP5

SML1DATA / GPIO75

SML1_SMBDATA

PAD

5/4: Added MOSFET Q80 to prevent leakage


from 3.3V_SUS to cardreader during S3

7SH32

SML1_SMBCLK

Q80
1

PCI_GNT0#
PCI_GNT1#

8.2K
8.2K
8.2K
8.2K

C401
1
2
U8

PCH_SML1ALERT#

CLKOUT_DMI_N
CLKOUT_DMI_P

+3.3V_SUS

PCI_PIRQE#
R572
PCI_PIRQF#
R541
PCI_PIRQG#
R560
USB_MCARD3_DET# R577

M14
E10
G12

T100

*1K_NC
*1K_NC

PCI Pullup

SML0DATA

SML0DATA

PAD

+3.3V_RUN

31 MINI1CLK_REQ#
R226
R229

0.047U/10V

SML0CLK

G8

SML1CLK / GPIO58

CLKOUT_PCIE3N
CLKOUT_PCIE3P

Q81

5/19: Update BIOS strap table

PCI_PLTRST#

PCH_SML0ALERT#

C6

SML1ALERT# / GPIO74

PCIECLKRQ2# / GPIO20

+3.3V_RUN

PCH_SMBDATA

IbexPeak-M_R1P0

IbexPeak-M_R1P0

+3.3V_SUS

PCH_SMBCLK

C8
J14

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

PCIECLKRQ0# / GPIO73

PCH_SMB_ALERT#

SML0CLK

SML0ALERT# / GPIO60

CLKOUT_PCIE0N
CLKOUT_PCIE0P

B9
H14

USB_BIAS

USBRBIAS#

CLK_PCIE_REQ5#_R

CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4

PERN2
PERP2
PETN2
PETP2

AU30
AT30
AU32
AV32

CLK_PCIE_REQ0#

USB W/ E-SATA port

31
31
32
32

AW30
BA30
BC30
BD30

SMBDATA

SMBus

2
2

Mini WWAN

26 PCIE_RX526 PCIE_RX5+
26 PCIE_TX526 PCIE_TX5+
NV_ALE 10
NV_CLE 10

1
1

SMBCLK

Link

C318
C315

SMBALERT# / GPIO11

PCI-E*

PCIE_RX2PCIE_RX2+
PCIE_TX2PCIE_TX2+

PERN1
PERP1
PETN1
PETP1

Controller

BD3
AY6

PCIE_TXN1_C
PCIE_TXP1_C

Mini WLAN

32 PCIE_RX332 PCIE_RX3+
32 PCIE_TX332 PCIE_TX3+
28
28
28
28

0.1U/10V
0.1U/10V

PEG

C/BE0#
C/BE1#
C/BE2#
C/BE3#

PCI_RST#_G

T33 PAD

NV_ALE
NV_CLE

31
31
31
31

2
2

2
4

T28 PAD
T44 PAD
T87 PAD

AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6

1
1

1
3

T104 PAD
32 USB_MCARD3_DET#
31 USB_MCARD1_DET#

AV9
BG8

C659
C660

BG30
BJ30
BF29
BH29

T94 PAD

NV_DQS0
NV_DQS1

32 PCIE_RX132 PCIE_RX1+
32 PCIE_TX132 PCIE_TX1+

Clock Flex

T45 PAD

J50
G42
H47
G34

Mini WPAN

AY9
BD1
AP15
BD8

NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15

USB

Change Cardreader to PCIE


Interface!
Del PCI debug card!

NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3

NVRAM

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

PCI

H40
N34
C44
A38
C36
J34
A40
D45
E36
H48
E40
C40
M48
M45
F53
M40
M43
J36
K48
F40
C42
K46
M51
J52
K51
L34
F42
J40
G46
F44
M47
H36

From CLK BUFFER

U39E

1 10K
1 10K

QUANTA
COMPUTER
PCH 3/6(PCI_SMBUS_CLK)

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
1

Sheet

of

61

IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)


U39F
S_GPIO

Y3
C38

TACH1 / GPIO1

29 SIO_EXT_SCI#

SIO_EXT_SCI#

D37

TACH2 / GPIO6

SIO_EXT_WAKE#

J32

TACH3 / GPIO7

RSV_WOL_EN

F10

GPIO8

T41

GPIO12

PAD

TEST_WOOFER_EN

39 TEST_WOOFER_EN

CLKOUT_PCIE6N
CLKOUT_PCIE6P

AH45
AH46

AF48
AF47

MISC

SIO_EXT_SMI#

29 SIO_EXT_WAKE#

CLKOUT_PCIE7N
CLKOUT_PCIE7P

K9

LAN_PHY_PWR_CTRL / GPIO12

A20GATE

T7

GPIO15

U2

SIO_A20GATE

SIO_A20GATE 29

32 PCIE_MCARD3_DET#

PCIE_MCARD3_DET#

AA2

SATA4GP / GPIO16

CLKOUT_BCLK0_N / CLKOUT_PCIE8N

AM3

CLK_CPU_BCLK# 3

31 PCIE_MCARD1_DET#

PCIE_MCARD1_DET#

F38

TACH0 / GPIO17

CLKOUT_BCLK0_P / CLKOUT_PCIE8P

AM1

CLK_CPU_BCLK 3

32 PCIE_MCARD2_DET#

PCIE_MCARD2_DET#

Y7

BG10

H_PECI 3

32 USB_MCARD2_DET#

AB12

GPIO27

PCH_GPIO28

V13

GPIO28

USB_MCARD2_DET#

M11

STP_PCI# / GPIO34

GPIO35

V6

CAMERA_CBL_DET#

35 CAMERA_CBL_DET#

SATA3GP

R540

32 WPAN_RADIO_DIS_MINI#

H_CPUPWRGD 3,56

THRMTRIP#

BD10

SATA2GP / GPIO36

TP1

BA22

AB13

SATA3GP / GPIO37

TP2

AW22

V3

SLOAD / GPIO38

TP3

BB22

P3

SDATAOUT0 / GPIO39

TP4

AY45

0 CRB_SV_DET

T101

PAD

GPIO45

H3

PCIECLKRQ6# / GPIO45

TP5

AY46

T98

PAD

GPIO46

F1

PCIECLKRQ7# / GPIO46

TP6

AV43

29 CRIT_TEMP_REP#

R192

0 SV_SET_UP

AB6

SDATAOUT1 / GPIO48

TP7

AV45

R511

0 SATA5GP

AA4

SATA5GP / GPIO49

TP8

AF13

GPIO57

TP9

M18

TP10

N18

TP11

AJ24

TP12

AK41

TP13

AK42

TP14

M32

TP15

N32

TP16

M30

TP17

N30

GPIO57

+3.3V_RUN
SIO_RCIN#

R538

10K

SIO_A20GATE

R539

10K

SIO_EXT_SCI#

R575

10K

SIO_EXT_SMI#

R559

10K

R272

10K

CAMERA_CBL_DET#

R186

10K

SATA3GP

R196

10K

USB_MCARD2_DET#

R233

10K

PCIE_MCARD1_DET#

R257

10K

F8

A4
A49
A5
A50
A52
A53
B2
B4
B52
B53
BE1
BE53
BF1
BF53
BH1
BH2
BH52
BH53
BJ1
BJ2
BJ4
BJ49
BJ5
BJ50
BJ52
BJ53
D1
D2
D53
E1
E53

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31

RSVD

32 WWAN_RADIO_DIS#

SIO_EXT_WAKE#

SIO_RCIN# 29

BE10

R181

+1.1V_VTT

R178
56
56

H_THERM# 3

SATACLKREQ# / GPIO35

NCTF

T1

PROCPWRGD

RCIN#

AB7

WLAN_RADIO_DIS#

31 WLAN_RADIO_DIS#

PECI

GPIO

GPIO24

GPIO27

PAD

SCLOCK / GPIO22

H10

CPU

T15

BMBUSY# / GPIO0

29 SIO_EXT_SMI#

TP18
TP19

AA23
AB45

NC_2

AB38

NC_3

AB42

NC_4

AB41

NC_5

T39

TP24

PAD

T14

Note : TP3 is not part of the JTAG


interface, but is required to select
the Boundary Scan test mode.

+NVRAM_VCCQ

9 NV_ALE
9 NV_CLE

H12

NC_1

INIT3_3V#

PCH_TP3

R185

*1K_NC

R189

*1K_NC

DMI Termination Voltage


B

Set to Vcc when LOW


NV_CLE
Set to Vcc/2 when HIGH

2/12: Peter: According to checklist,


default is set to low for disabling anti theif!

P6
C10

Anti-Thief Enabled
High = Enable (Default)
NV_ALE
Low = Disable
+3.3V_RUN

IbexPeak-M_R1P0
PCIE_MCARD2_DET#

R193

10K

PCIE_MCARD3_DET#

R527

10K

SATA5GP

R530

10K

S_GPIO

R532

10K

WLAN_RADIO_DIS#

R533

10K

SV_SET_UP

SV_SET_UP

!!!
5/6: Added GPIO57 to
recognize
M96 and Madison
1 = M96 ; 0 = Madison

+3.3V_SUS

+3.3V_RUN
+3.3V_SUS

R543
10K
PCH_GPIO28

R223

10K

GPIO12

R270

10K

R256
10K

CRB_SV_DET
GPIO57

R222

1K

RSV_WOL_EN

R269

10K

R217
10K

10K

1-X High = Strong (Default)

GPIO35
TEST_WOOFER_EN

R187

R677
*10K_NC

Title

QUANTA
COMPUTER
PCH 4/6(GPIO)

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
1

10

of

61

C661
*10U_NC

AN20
AN22
AN23
AN24
AN26
AN28
BJ26
BJ28
AT26
AT28
AU26
AU28
AV26
AV28
AW26
AW28
BA26
BA28
BB26
BB28
BC26
BC28
BD26
BD28
BE26
BE28
BG26
BG28
BH27

POWER_JP
C331
10U

C347
1U

C333
1U

C342
1U

C361
1U

+3.3V_RUN

C352
0.1U

+1.8V_RUN

+1.05V_PCH

L63

*1uH_NC +V1.1LAN_VCCAPLL_FDI
C662
*10U_NC

+1.05V_PCH

VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]
VCCIO[50]
VCCIO[51]
VCCIO[52]
VCCIO[53]
VCCIO[54]
VCCIO[55]

AN35

VCC3_3[1]

AT22

VCCVRM[1]

BJ18

VCCFDIPLL

AM23

CRT

AF53

VSSA_DAC[2]

AF51

VCCALVDS

AH38

VSSA_LVDS

AH39

VCCIO[1]

L59

*10uH_NC

+1.05V_RUN_VCCA_CLK
C643
*10U_NC

AP51

VCCACLK[1]

C644
AP53
*1U_NC

VCCACLK[2]

+1.05V_PCH

AP43
AP45
AT46
AT45

AF23

VCCLAN[1]

AF24

VCCLAN[2]

Y20

POWER

DCPSUSBYP

C385

VCCAPLLEXP

AN30
AN31

+3.3V_RUN

VCC3_3[2]

AB34

VCC3_3[3]

AB35

VCC3_3[4]

AD35

0.1U

+3.3V_RUN
C396
0.1U
+1.05V_PCH
C359
22U

VCCVRM[2]

AT24

VCCDMI[1]

AT16

VCCDMI[2]

AU16

VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]

AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15

C354
22U

C381
1U

+VCCDMI

R184

+1.1V_VTT

R183

*0_NC

+1.05V_PCH

C334
1U

VCCME[2]

AD41

VCCME[3]

AF43

VCCME[4]

AF41

VCCME[5]

AF42

VCCME[6]

V39

VCCME[7]

V41

VCCME[8]

V42

VCCME[9]

Y39

VCCME[10]

Y41

VCCME[11]

Y42

VCCME[12]

C388 0.1U +VCCRTCEXT

+NVRAM_VCCQ

V9

DCPRTC

R194

2
C358

R195

1 *0_0603_NC

+3.3V_RUN

1 0_0603

+1.8V_RUN

AU24

+1.8V_RUN

+3.3V_RUN

VCCVRM[3]

BB51
BB53

VCCADPLLA[1]
VCCADPLLA[2]

BD51
BD53

VCCADPLLB[1]
VCCADPLLB[2]

C379 C380 C377

AH23
AJ35
AH35

VCCIO[21]
VCCIO[22]
VCCIO[23]

1U

AF34

VCCIO[2]

AH34

VCCIO[3]

AF32

VCCIO[4]

+1.05V_VCCADPLLA

0.1U

+1.05V_PCH

AM8
AM9
AP11
AP9

VCCME[1]

AD39

+1.8V_RUN

+1.05V_VCCADPLLB

VCCME3_3[1]
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]

AD38

1U

1U

C343
0.1U

IbexPeak-M_R1P0
C376 0.1U +VCCSST

V12

USB

BJ24

VSSA_DAC[1]

VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]

LVDS

+1.05V_RUN_PLLEXP

AE52

Clock and Miscellaneous

*1uH_NC

+1.05V_VCCIO

PJP8
+1.05V_PCH

L62

VCCIO[24]

AE50

VCCADAC[2]

VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]

V24
V26
Y24
Y26

VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]

V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26

+1.05V_PCH
C384
1U

C399

C391

0.1U

0.1U

Scott_0626:Change D9,D10 PN from BCRB500VZ29


to BC010K45004.

U23

VCCIO[56]

V23

V5REF_SUS

F24

+V5REF_SUS

V5REF

K49

+V5REF

VCC3_3[8]

J38

+V1.1LAN_INT_VCCSUS
C386

Y22

+1.05V_PCH
R274 1

C400

2 100

D9

+5V_SUS

SDM10K45-7-F

+3.3V_SUS

1uF
R230 1

C395

2 100

D10

VCC3_3[9]

L38

VCC3_3[10]

M36

VCC3_3[11]

N36

VCC3_3[12]

P36

VCC3_3[13]

U35

VCC3_3[14]

AD13

+5V_RUN

SDM10K45-7-F

+3.3V_RUN

1uF

+3.3V_RUN
C390
0.1U

C340
0.1U

VCCSATAPLL[1]
VCCSATAPLL[2]

DCPSST

AK3
AK1

+V1.1LAN_VCCAPLL
C673
*1U_NC

+3.3V_SUS

VCCSUS3_3[28]

PCI/GPIO/LPC

+1.05V_PCH

U39J

HVCMOS

AK24

+1.05V_PCH

VCC CORE

VCCADAC[1]

+1.05V_PCH

DMI

C382
1U

VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]

PCI E*

C350
10U

AB24
AB26
AB28
AD26
AD28
AF26
AF28
AF30
AF31
AH26
AH28
AH30
AH31
AJ30
AJ31

NAND / SPI

+1.05V_PCH

FDI

IBEX PEAK-M (POWER)

POWER

U39G

L64

*10uH_NC +1.05V_PCH

C671
*10U_NC
B

DCPSUS
VCCIO[9]

AH22

+1.05V_PCH

10uH

C344
+

4.7U

C663

C387

V16

VCC3_3[6]

0.1U

Y16

VCC3_3[7]

AT18

V_CPU_IO[1]

AU18

V_CPU_IO[2]

C325

0.1U

0.1U

C697

C705

10uH

+1.05V_VCCADPLLB

A12

VCCRTC

C704

IbexPeak-M_R1P0
1U
C653
220U
3528

AT20

VCCIO[10]

AH19

VCCIO[11]

AD20

VCCIO[12]

AF22

VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]

AD19
AF20
AF19
AH20

VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]

AB19
AB20
AB22
AD22

VCCME[13]
VCCME[14]
VCCME[15]
VCCME[16]

AA34
Y34
Y35
AA35

0.1U

VCCSUSHDA

C383
1U

+1.8V_RUN

+1.05V_PCH

L30

+VCCSUSHDA R224 2

1 0_0603

+3.3V_SUS
A

C398
1U

0.1U

C664
1U

Use External Graphics. Can connect power directly


without Inductor & Cap ? As Ibex peak-M EDS 1.0,
need +1.05V. Can use +1.1V_VTT as CPU ?

VCCVRM[4]

1U
+RTC_CELL

L61

VCCSUS3_3[32]

HDA

C652
220U
3528

C326

VCCSUS3_3[31]

U22

VCC3_3[5]

+1.1V_VTT

+1.05V_VCCADPLLA

U20

RTC

L60

VCCSUS3_3[30]

V15

+3.3V_RUN

+1.05V_PCH

VCCSUS3_3[29]

SATA

0.1U

P18
U19

CPU

C394

PCI/GPIO/LPC

0.1U

+3.3V_SUS

Title

QUANTA
COMPUTER
PCH 5/6(POWER)

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
1

11

of

61

IBEX PEAK-M (GND)


U39H

U39I

AB16

VSS[0]

AA19
AA20
AA22
AM19
AA24
AA26
AA28
AA30
AA31
AA32
AB11
AB15
AB23
AB30
AB31
AB32
AB39
AB43
AB47
AB5
AB8
AC2
AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49
AD7
AE2
AE4
AF12
Y13
AH49
AU4
AF35
AP13
AN34
AF45
AF46
AF49
AF5
AF8
AG2
AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47
AH7
AJ19
AJ2
AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34
AT5
AJ4
AK12
AM41
AN19
AK26
AK22
AK23
AK28

VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

AY7
B11
B15
B19
B23
B31
B35
B39
B43
B47
B7
BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49
BB5
BC10
BC14
BC18
BC2
BC22
BC32
BC36
BC40
BC44
BC52
BH9
BD48
BD49
BD5
BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50
BE6
BE8
BF3
BF49
BF51
BG18
BG24
BG4
BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47
BH7
C12
C50
D51
E12
E16
E20
E24
E30
E34
E38
E42
E46
E48
E6
E8
F49
F5
G10
G14
G18
G2
G22
G32
G36
G40
G44
G52
AF39
H16
H20
H30
H34
H38
H42

AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47

IbexPeak-M_R1P0

VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]

H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14

IbexPeak-M_R1P0
Title

QUANTA
COMPUTER
PCH 6/6(GND)

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
1

12

of

61

5/13: Change connector from Tyco to Foxconn to avoid shortage

4
4
4
4
4
4
4
4
4
4
4
4
4
4

M_A_BS0
M_A_BS1
M_A_BS2
M_A_CS#0
M_A_CS#1
M_A_CLK0
M_A_CLK0#
M_A_CLK1
M_A_CLK1#
M_A_CKE0
M_A_CKE1
M_A_CAS#
M_A_RAS#
M_A_WE#

9,14,28,31,32,34 MEM_SCLK
9,14,28,31,32,34 MEM_SDATA
4 M_A_ODT0
4 M_A_ODT1
4 M_A_DM[7:0]

4 M_A_DQS[7:0]

4 M_A_DQS#[7:0]

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78

SA0_DIM0_0
SA1_DIM0_0
MEM_SCLK
MEM_SDATA

109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

116
120

ODT0
ODT1

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

11
28
46
63
136
153
170
187

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

PC2100 DDR3 SDRAM SO-DIMM


(204P)

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

+1.5V_SUS

+3.3V_RUN

3 PM_EXTTS#0
3,14 DDR3_DRAMRST#

PM_EXTTS#0

C275
.1U/10V_4

M_VREF_CA_DIMM0
C374

C372

2.2U/6.3V_6

.1U/10V_4

JDIM2B
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

199

VDDSPD

77
122
125

NC1
NC2
NCTEST

198
30

EVENT#
RESET#

1
126

VREF_DQ
VREF_CA

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

VTT1
VTT2

203
204

G1
G2
H1
H2

205
206
207
208

+0.75V_DDR_VTT

AS0A626-U4SN-7F

For CH A SO-DIMM VREF_DQ for M2

Delete according to Intel Design Change


5/18: Separate voltage divider for M_VREF_DQ_DIMM0
and M_VREF_CA_DIMM0 to follow Intel CRB design

M1 VREF

6/02: Change M1 from voltage regulator to voltage divider

+DDR_VTTREF
2

10K

.1U/10V_4

2.2U/6.3V_6

Note:
If SA1_DIM0 = 0, SA0_DIM0 = 0
SO-DIMMA SPD Address is 0xA0
SO-DIMMA TS Address is 0x30
If SA1_DIM0 = 0, SA0_DIM0 = 1
SO-DIMMA SPD Address is 0xA2
SO-DIMMA TS Address is 0x32

2
1

R278

10K

C404

2.2U/6.3V_6

C272

AS0A626-U4SN-7F

R293

C402

M_VREF_DQ_DIMM0

SA1_DIM0_0
SA0_DIM0_0

Channel A
M_A_DQ[63:0] 4

JDIM2A
4 M_A_A[15:0]

PC2100 DDR3 SDRAM SO-DIMM


(204P)

R685
*0_NC
1K/F
2

M_VREF_DQ_DIMM0

R155
1

+1.5V_SUS

Channel A Decoupling

R153

C283

1K/F

.1U/10V_4
1

+1.5V_SUS

C370

C307

C368

C338

C335

C316

C362

C319

C348

C323

10U

10U

10U

10U

10U

10U

.1U/10V_4

.1U/10V_4

.1U/10V_4

.1U/10V_4

.1U/10V_4

+ C687
+DDR_VTTREF

330U

C305

R686
*0_NC

+1.5V_SUS

C417

C418

C421

C419

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

10U

M_VREF_CA_DIMM0

R151

C860

1K/F

.1U/10V_4

Title

QUANTA
COMPUTER
DDR3 DIMM-A

C420

1K/F
2
2

R143
1

+0.75V_DDR_VTT

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
1

13

of

61

5/13: Change connector from Tyco to Foxconn to avoid shortage

4
4
4
4
4
4
4
4
4
4
4
4
4
4

M_B_BS0
M_B_BS1
M_B_BS2
M_B_CS#0
M_B_CS#1
M_B_CLK0
M_B_CLK0#
M_B_CLK1
M_B_CLK1#
M_B_CKE0
M_B_CKE1
M_B_CAS#
M_B_RAS#
M_B_WE#

9,13,28,31,32,34 MEM_SCLK
9,13,28,31,32,34 MEM_SDATA
4 M_B_ODT0
4 M_B_ODT1
4 M_B_DM[7:0]

4 M_B_DQS[7:0]

4 M_B_DQS#[7:0]

SA0_DIM1_0
SA1_DIM1_0
MEM_SCLK
MEM_SDATA

109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

116
120

ODT0
ODT1

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

11
28
46
63
136
153
170
187

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

+1.5V_SUS

+3.3V_RUN

C403

C406

2.2U/6.3V_6

.1U/10V_4

PM_EXTTS#1

3 PM_EXTTS#1
3,13 DDR3_DRAMRST#
M_VREF_DQ_DIMM1

C274

C276

2.2U/6.3V_6

JDIM1B
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

199

VDDSPD

77
122
125

NC1
NC2
NCTEST

198
30

EVENT#
RESET#

1
126

VREF_DQ
VREF_CA

.1U/10V_4

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

M_VREF_CA_DIMM1
C375

C373

2.2U/6.3V_6

.1U/10V_4

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

VTT1
VTT2

203
204

G1
G2
H1
H2

205
206
207
208

+0.75V_DDR_VTT

AS0A626-U8SN-7F

For CH B SO-DIMM VREF_DQ for M2

Delete according to Intel Design Change

+3.3V_RUN

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78

PC2100 DDR3 SDRAM SO-DIMM


(204P)

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

Channel B
M_B_DQ[63:0] 4

JDIM1A
4 M_B_A[15:0]

PC2100 DDR3 SDRAM SO-DIMM


(204P)

AS0A626-U8SN-7F

R280
10K
SA1_DIM1_0
SA0_DIM1_0

5/18: Separate voltage divider for M_VREF_DQ_DIMM1


and M_VREF_CA_DIMM1 to follow Intel CRB design

M1 VREF

Note:
If SA1_DIM1 = 1, SA0_DIM1 = 0
SO-DIMMA SPD Address is 0xA4
SO-DIMMA TS Address is 0x34
If SA1_DIM1 = 1, SA0_DIM1 = 1
SO-DIMMA SPD Address is 0xA6
SO-DIMMA TS Address is 0x36

R275
10K

6/02: Change M1 from voltage regulator to voltage divider


+DDR_VTTREF
R687
*0_NC

R154
1

1K/F
2
2

Channel B Decoupling

M_VREF_DQ_DIMM1

+1.5V_SUS

+1.5V_SUS

R152
1K/F

C282

.1U/10V_4
C341

C367

C306

C337

C369

C314

C320

C357

C322

C360

10U

10U

10U

10U

10U

10U

.1U/10V_4

.1U/10V_4

.1U/10V_4

.1U/10V_4

.1U/10V_4

+ C667
330U

+DDR_VTTREF
2

C308

R688
*0_NC

+1.5V_SUS

C413

C412

C415

C416

C414

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

10U

1K/F
2

M_VREF_CA_DIMM1

R141
1

+0.75V_DDR_VTT

R150
1K/F

C861
Title

.1U/10V_4

DDR3 DIMM-B

1
5

QUANTA
COMPUTER

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
1

14

of

61

Realtek: 0.1uFx6pcs, 22uFx1pcs


IDT: 0.1uFx5pcs, 10uFx1pcs

+3.3V_RUN

U47
L68 BLM21PG600SN1D
+3.3V_CLK_VDD

40mil
0805

C761
10U/6.3V

C738
0.1U

C746
0.1U

C754
0.1U

C749
0.1U

C745

+VDDIO_CLK

0.1U

0.1uF near the every power pin.

1
5
17
24
29
15
18

VDD_USB
VDD_LCD
VDD_SRC
VDD_CPU
VDD_REF
VDD_SRC_IO
VDD_CPU_IO

9
2
8
12
21
26

VSS_SATA
VSS_USB
VSS_LCD
VSS_SRC
VSS_CPU
VSS_REF

CK505
QFN32

+3.3V_RUN
43 CK_PWRGD_R
9 CLK_ICH_14M

CLK_ICH_14M

R607

10K

R590

33

16
25
30

CPU_SEL

Place the 33 ohm


resistors close to the CK 505
37 EC_SMBDAT0
37 EC_SMBCLK0

CPU_STOP#
CK_PWRGD/PD#_3.3
REF_0/CPU_SEL

XTAL_OUT
XTAL_IN

27
28

XOUT
XIN

EC_SMBDAT0
EC_SMBCLK0

31
32

SDATA
SCLK

CPU-0
CPU-0#

23
22

CPU-1
CPU-1#

20
19

CLK_BUF_BCLK
CLK_BUF_BCLK#

3
4

CLK_BUF_DREFCLK
CLK_BUF_DREFCLK#

SRC-1
SRC-1#

13
14

CLK_BUF_PCIE_3GPLL
CLK_BUF_PCIE_3GPLL#

SATA
SATA#

10
11

CLK_BUF_DREFSSCLK
CLK_BUF_DREFSSCLK#

6
7

27M_NSS
27M_SS

DOT96T_LPR
DOT96C_LPR

27MHz_nonSS
27MHz_SS

R601
R604

CLK_BUF_BCLK 9
CLK_BUF_BCLK# 9

CLK_BUF_DREFCLK 9
CLK_BUF_DREFCLK# 9
CLK_BUF_PCIE_3GPLL 9
CLK_BUF_PCIE_3GPLL# 9
CLK_BUF_DREFSSCLK 9
CLK_BUF_DREFSSCLK# 9
33
33

CLK_VGA_27M 17
CLK_VGA_27M_SS 17

Place within
0.5" of CLKGEN

GND

33

SLG8SP585VTR

Realtek: 0.1uFx3pcs, 22uFx1pcs


IDT: 0.1uFx2pcs, 10uFx1pcs

+3.3V_RUN

+VDDIO_CLK
L69 BLM21PG600SN1D

R614
Y5
2
14.318MHZ
C733
33P
50

*0_NC

C734
33P

R613

40mil
0805

+1.05V_PCH

XTAL_OUT
2

XTAL_IN

CPU_0

CPU_1

R591
*4.7K_NC

0(default)

133MHz

133MHz

1(0.7V-1.5V)

100MHz

100MHz

CPU_SEL

0.1U

0.1U

Place each 0.1uF cap as close as


possible to each VDD IO pin. Place
the 10uF caps on the VDD_IO plane.

+VDDIO_CLK:
SLG date sheet (V0.2) P15: Min 1.05V,Max3.465V.
Realtek date sheet(V1.2) P11: Min 1.05V,Max 3.3V.
IDT date sheet(V0.7) P10: Min 0.9975V,Max 3.465V.

PIN 30

C762

10U

HP: 10u x2pcs

50

+3.3V_RUN

R592
4.7K

C750

SLG,IDT: +1.05V
Realtek: +3.3V

C772

C737
*10P_NC

CPU_SEL:
SLG date sheet (V0.2) P15:
High Voltage: Min 0.7V, Max 1.5V.
Low Voltage: Min Vss-0.3V, Max 0.35V.
Realtek date sheet(V1.2) P11:
High Voltage: Min 0.7V, Max 1.5V.
Low Voltage: Min Vss-0.3V, Max 0.35V.
IDT date sheet(V0.7) P10:
High Voltage: Min 0.7V, Max 1.5V.
Low Voltage: Min Vss-0.3V, Max 0.35V.

EMI Capacitor

Title

QUANTA
COMPUTER
CLOCK GENERATOR

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
1

15

of

61

ASIC
PN
100-CK
QCI P/N
----------------------------------------------------------------------------------------M96-M2 XT A13 216-0729051 100-CK3186 AJ072900T08
M97-M2 LP A11 216-0731001 100-CG1806 AJ073100T01

U29A

3 PCIE_MTX_GRX_P[0..15]
3 PCIE_MTX_GRX_N[0..15]

PCIE_MRX_GTX_P[0..15] 3
PCIE_MRX_GTX_N[0..15] 3
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_N0

PCIE_MTX_GRX_P1
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_N4

PCIE_MTX_GRX_P6
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_N8

PCIE_RX0P
PCIE_RX0N

PCIE_TX0P
PCIE_TX0N

Y33
Y32

PCIE_MRX_GTX_C_P0
PCIE_MRX_GTX_C_N0

Y35
W36

PCIE_RX1P
PCIE_RX1N

PCIE_TX1P
PCIE_TX1N

W33
W32

PCIE_MRX_GTX_C_P1
PCIE_MRX_GTX_C_N1

W38
V37

PCIE_RX2P
PCIE_RX2N

PCIE_TX2P
PCIE_TX2N

U33
U32

PCIE_MRX_GTX_C_P2
PCIE_MRX_GTX_C_N2
PCIE_MRX_GTX_C_P3
PCIE_MRX_GTX_C_N3

V35
U36

PCIE_RX3P
PCIE_RX3N

PCIE_TX3P
PCIE_TX3N

U30
U29

U38
T37

PCIE_RX4P
PCIE_RX4N

PCIE_TX4P
PCIE_TX4N

T33
T32

PCIE_MRX_GTX_C_P4
PCIE_MRX_GTX_C_N4

T35
R36

PCIE_RX5P
PCIE_RX5N

PCIE_TX5P
PCIE_TX5N

T30
T29

PCIE_MRX_GTX_C_P5
PCIE_MRX_GTX_C_N5

R38
P37

PCIE_RX6P
PCIE_RX6N

PCIE_TX6P
PCIE_TX6N

P33
P32

PCIE_MRX_GTX_C_P6
PCIE_MRX_GTX_C_N6

P35
N36

PCIE_RX7P
PCIE_RX7N

PCIE_TX7P
PCIE_TX7N

P30
P29

PCIE_MRX_GTX_C_P7
PCIE_MRX_GTX_C_N7

N38
M37

PCIE_RX8P
PCIE_RX8N

PCIE_TX8P
PCIE_TX8N

N33
N32

PCIE_MRX_GTX_C_P8
PCIE_MRX_GTX_C_N8

PCIE_TX9P
PCIE_TX9N

N30
N29

PCIE_MRX_GTX_C_P9
PCIE_MRX_GTX_C_N9

PCIE_TX10P
PCIE_TX10N

L33
L32

PCIE_MRX_GTX_C_P10
PCIE_MRX_GTX_C_N10

PCIE_TX11P
PCIE_TX11N

L30
L29

PCIE_MRX_GTX_C_P11
PCIE_MRX_GTX_C_N11

PCIE_TX12P
PCIE_TX12N

K33
K32

PCIE_MRX_GTX_C_P12
PCIE_MRX_GTX_C_N12
PCIE_MRX_GTX_C_P13
PCIE_MRX_GTX_C_N13

PCIE_MTX_GRX_P9
PCIE_MTX_GRX_N9

M35
L36

PCIE_RX9P
PCIE_RX9N

PCIE_MTX_GRX_P10
PCIE_MTX_GRX_N10

L38
K37

PCIE_RX10P
PCIE_RX10N

K35
J36

PCIE_RX11P
PCIE_RX11N

PCIE_MTX_GRX_P11
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_P15
PCIE_MTX_GRX_N15

J38
H37

PCI EXPRESS INTERFACE

PCIE_MTX_GRX_P5
PCIE_MTX_GRX_N5

AA38
Y37

PCIE_RX12P
PCIE_RX12N

H35
G36

PCIE_RX13P
PCIE_RX13N

PCIE_TX13P
PCIE_TX13N

J33
J32

G38
F37

PCIE_RX14P
PCIE_RX14N

PCIE_TX14P
PCIE_TX14N

K30
K29

PCIE_MRX_GTX_C_P14
PCIE_MRX_GTX_C_N14

F35
E37

PCIE_RX15P
PCIE_RX15N

PCIE_TX15P
PCIE_TX15N

H33
H32

PCIE_MRX_GTX_C_P15
PCIE_MRX_GTX_C_N15

PCIE_MRX_GTX_C_P0

C189

0.1U

PCIE_MRX_GTX_P0

PCIE_MRX_GTX_C_P1

C188

0.1U

PCIE_MRX_GTX_P1

PCIE_MRX_GTX_C_P2

C205

0.1U

PCIE_MRX_GTX_P2

PCIE_MRX_GTX_C_P3

C176

0.1U

PCIE_MRX_GTX_P3

PCIE_MRX_GTX_C_P4

C212

0.1U

PCIE_MRX_GTX_P4

PCIE_MRX_GTX_C_P5

C204

0.1U

PCIE_MRX_GTX_P5

PCIE_MRX_GTX_C_P6

C218

0.1U

PCIE_MRX_GTX_P6

PCIE_MRX_GTX_C_P7

C216

0.1U

PCIE_MRX_GTX_P7

PCIE_MRX_GTX_C_P8

C222

0.1U

PCIE_MRX_GTX_P8

PCIE_MRX_GTX_C_P9

C211

0.1U

PCIE_MRX_GTX_P9

PCIE_MRX_GTX_C_P10

C230

0.1U

PCIE_MRX_GTX_P10

PCIE_MRX_GTX_C_P11

C221

0.1U

PCIE_MRX_GTX_P11

PCIE_MRX_GTX_C_P12

C245

0.1U

PCIE_MRX_GTX_P12

PCIE_MRX_GTX_C_P13

C247

0.1U

PCIE_MRX_GTX_P13

PCIE_MRX_GTX_C_P14

C249

0.1U

PCIE_MRX_GTX_P14

PCIE_MRX_GTX_C_P15

C251

0.1U

PCIE_MRX_GTX_P15

PCIE_MRX_GTX_C_N0

C194

0.1U

PCIE_MRX_GTX_N0

PCIE_MRX_GTX_C_N1

C179

0.1U

PCIE_MRX_GTX_N1

PCIE_MRX_GTX_C_N2

C207

0.1U

PCIE_MRX_GTX_N2

PCIE_MRX_GTX_C_N3

C171

0.1U

PCIE_MRX_GTX_N3

PCIE_MRX_GTX_C_N4

C215

0.1U

PCIE_MRX_GTX_N4

PCIE_MRX_GTX_C_N5

C195

0.1U

PCIE_MRX_GTX_N5

PCIE_MRX_GTX_C_N6

C219

0.1U

PCIE_MRX_GTX_N6

PCIE_MRX_GTX_C_N7

C217

0.1U

PCIE_MRX_GTX_N7

PCIE_MRX_GTX_C_N8

C223

0.1U

PCIE_MRX_GTX_N8

PCIE_MRX_GTX_C_N9

C208

0.1U

PCIE_MRX_GTX_N9

PCIE_MRX_GTX_C_N10

C231

0.1U

PCIE_MRX_GTX_N10

PCIE_MRX_GTX_C_N11

C220

0.1U

PCIE_MRX_GTX_N11

PCIE_MRX_GTX_C_N12

C246

0.1U

PCIE_MRX_GTX_N12

PCIE_MRX_GTX_C_N13

C248

0.1U

PCIE_MRX_GTX_N13

PCIE_MRX_GTX_C_N14

C250

0.1U

PCIE_MRX_GTX_N14

PCIE_MRX_GTX_C_N15

C252

0.1U

PCIE_MRX_GTX_N15

CLOCK
9 CLK_PCIE_VGA
9 CLK_PCIE_VGA#

!!! Park, Madison : Pop 0 Ohm


M96: depop 0 ohm

PLTRST#

R100
2

PCIE_REFCLKP
PCIE_REFCLKN

AJ21
AK21
AH16

NC#1
NC#2
PWRGOOD

AA30

PERSTB

CALIBRATION

R426

3,9,26,28,29,31,32,41,56

AB35
AA36

*0_NC

PCIE_CALRP

Y30

R101

1.27K

PCIE_CALRN

Y29

R99

2K/F

+PCIE_VDDC

PERST#
216-0729051(M96-M2 XT)

Title

QUANTA
COMPUTER
M96XT_PCIE

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
1

16

of

61

RAM_
RAM_
RAM_
RAM_
TYPE_CFG3 TYPE_CFG2 TYPE_CFG1 TYPE_CFG0

Memory Straps

reserve for Qimonda

reserve for Samsung

800 MHz 512MB(32M*16) Hynix_Tiva die

H5TQ5163MFR-12

800 MHz 1GB(64M*16) Hynix_Orion die

H5TQ1G63BFR-12C

800 MHz 1GB(64M*16) Qimonda_A1 die

IDGH1G-04A1F1C-16X

800 MHz 1GB(64M*16) Samsung_E die

K4W1G1646E-HC12

MEMORY APERTURE SIZE SELECT

VRAM TYPE

CFG0
MEMORY CFG2
CFG1
SIZE
GPIO13 GPIO12 GPIO11

+3.3V_DELAY
R61
R62
R63

3K
*3K_NC
*3K_NC

RAM_CFG0
RAM_CFG1
RAM_CFG2

APERTURE SIZE

128MB

256MB

64MB

+3.3V_DELAY
R77
R79
R64
R85
R76
R80
R60
R83
R82
R81

3K
3K
*3K_NC
*3K_NC
*3K_NC
3K
*3K_NC
*3K_NC
*3K_NC
*3K_NC

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO8
GFX_CORE_CNTRL2
GPIO10

R444
R442

3K
3K

VGAHSYNC
VGAVSYNC

R89

*3K_NC

VGAVSYNC2

RAM_TYPE_CFG0
RAM_TYPE_CFG1
RAM_TYPE_CFG2
RAM_TYPE_CFG3

AR8
AU8
AP8
AW8
AR3
AR1
AU1
AU3
AW3
AP6
AW5
AU5
AR6
AW6
AU6
AT7
AV7
AN7
AV9
AT9
AR10
AW10
AU10
AP10
AV11
AT11
AR12
AW12
AU12
AP12

DVPCNTL_MVP_0
DVPCNTL_MVP_1
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
DVPCLK
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23

TEMP_FAIL
2
*10K_NC

AK26
AJ26

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6

AH20
AH18
AN16
AH23
AJ23
AH17
AJ17
AK17
GPIO8
AJ13
GFX_CORE_CNTRL2 AH15
GPIO10
AJ16
RAM_CFG0
AK16
RAM_CFG1
AL16
RAM_CFG2
AM16
GPIO14_HPD2
AM14
AM13
CLK_VGA_27M_SS_R AK14
AG30
T70 PAD
AN14
TEMP_FAIL
AM17
AL13
AJ14
AK13
T62 PAD
AN13
T59 PAD
AM23
T61 PAD
AN23
T63 PAD
AK23
T73 PAD
AL24
T72 PAD
AM24
T71 PAD
AJ19
T65 PAD
AK19
T69 PAD
AJ20
T64 PAD
AK20
T60 PAD
AJ24
T66 PAD
AH26
T68 PAD
AH24
T67 PAD

+3.3V_DELAY

23 ATI_DP_HPD

1 2
1

150K

Q19
MMST3904-7-F
29 PANEL_BKEN

GPIO14_HPD2

52 GFX_CORE_CNTRL2
R44

R50

*365K/F_NC

10K
52 GFX_CORE_CNTRL0
20 THERMAL_INT#

+3.3V_DELAY

R46
23 ATI_HDMI_DET

1 2

R45

150K

52 GFX_CORE_CNTRL1
18 BB_ENA

Q20
MMST3904-7-F
HPD1

R51

*365K/F_NC

10K

L9
+1.8V_RUN

C46

C47

C48

10uF

1uF

100nF

+1.8V_RUN

(1.8V @ 120mA DPLL_PVDD)

HPD1 AK24

PLACE
VREFG
DIVIDER
AND CAP
CLOSE TO
499/F
ASIC

TX_DEEMPH_EN

GPIO1

AU26
AV25

ATI_HDMI_TX1+ 23
ATI_HDMI_TX1- 23

BIF_GEN2_EN_A

GPIO2

AT25
AR24

TX1P_DPA1P
TX1M_DPA1N
TX2P_DPA0P
TX2M_DPA0N

AT27
AR26

ATI_HDMI_TX2+ 23
ATI_HDMI_TX2- 23

TXCBP_DPB3P
TXCBM_DPB3N

AR30
AT29

DP_LANE3_P 23
DP_LANE3_N 23

TX3P_DPB2P
TX3M_DPB2N

AV31
AU30

DP_LANE2_P 23
DP_LANE2_N 23

TX4P_DPB1P
TX4M_DPB1N

AR32
AT31

DP_LANE1_P 23
DP_LANE1_N 23

DPB

TX5P_DPB0P
TX5M_DPB0N

AT33
AU32

TXCCP_DPC3P
TXCCM_DPC3N

AU14
AV13

TX0P_DPC2P
TX0M_DPC2N

AT15
AR14

TX1P_DPC1P
TX1M_DPC1N

AU16
AV15

TX2P_DPC0P
TX2M_DPC0N

AT17
AR16

TXCDP_DPD3P
TXCDM_DPD3N

AU20
AT19

TX3P_DPD2P
TX3M_DPD2N

AT21
AR20

TX4P_DPD1P
TX4M_DPD1N

AU22
AV21

TX5P_DPD0P
TX5M_DPD0N

AT23
AR22

R
RB

AD39
AD37

VGA_RED

G
GB

AE36
AD35

VGA_GRN

VGA_GRN 25

B
BB

AF37
AE38

VGA_BLU

VGA_BLU 25

HSYNC
VSYNC

AC36
AC38

VGAHSYNC
VGAVSYNC

DPC

DP_LANE0_P 23
DP_LANE0_N 23

SET

GPIO5

1 = AC (Performance mode)
0 = Battery saving mode

VGA_DIS

GPIO9

BIOS_ROM_EN

GPIO22

0: VGA Controller capacity enabled


1: The device will not be recognized
as the systems VGA controller
Enable external BIOS ROM device
0 = Disable ; 1 = Enable

AUD[1]
AUD[0]

VGAHSYNC
VGAVSYNC

BIOS_ROM_EN

0 = Advertises the PCIe device as


2.5 GT/s capable at power-on.
1 = Advertises the PCIe device as
5.0 GT/s capable at power-on.

GPIO_5_AC_BATT
(M96-M2)

VIP_DEVICE_STRAP_EN

AUD[1:0]:
00 - No audio function;
01 - Audio for DisplayPort only;
10 - Audio for DisplayPort and HDMI if dongle is
detected;
11 - Audio for both DisplayPort and HDMI.

11

VIP Device Strap Enable


0 = Disable ; 1 = Enable

!!! NC when M92-M2

SCL
SDA

GPIO_0
GPIO_1
GPIO_2
GPIO_3_SMBDATA
GPIO_4_SMBCLK
GPIO_5_AC_BATT
GPIO_6
GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL_0
GPIO_16_SSIN
GPIO_17_THERMAL_INT
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21_BB_EN
GPIO_22_ROMCSB
GPIO_23_CLKREQB
JTAG_TRSTB
JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TDO
GENERICA
GENERICB
GENERICC
GENERICD
GENERICE_HPD4
GENERICF
GENERICG

DAC1

RSET

AB34

AVDD
AVSSQ

AD34
AE34

VDD1DI
VSS1DI

AC33
AC34

RSET

R97

VGA_RED 25

VGAHSYNC
VGAVSYNC

R441
150/F

R443
150/F

R445
150/F

Layout Note:
Place 150 ohm
termination resistors
close to ATI CHIP.

25
25

L21
+1.8V_RUN

BLM15BD121SN1D

120ohm, 300mA

R2
R2B

AC30
AC31

G2
G2B

AD30
AD31

B2
B2B

AF30
AF31

C
Y
COMP

AC32
AD32
AF32

H2SYNC
V2SYNC

AD29
AC29

VDD2DI
VSS2DI

AG31
AG32

A2VDD

AG33

A2VDDQ

AD33

A2VSSQ

AF33

R2SET

AA29

DDC1CLK
DDC1DATA

AM26
AN26

AUX1P
AUX1N

AM27
AL27

DDC2CLK
DDC2DATA

AM19
AL19

HPD1

VGA_BLU
VGA_GRN
VGA_RED

1 499/F

2
+AVDD
+VDD1DI

C129

C130

C131

10uF

1uF

100nF

C145

C146

C147

10uF

1uF

100nF

C540

C106

1uF

100nF

+AVDD

(1.8V @ 70mA AVDD)

+VDD1DI

( 1.8V @ 45mA VDD1DI)

L22
+1.8V_RUN

BLM15BD121SN1D

120ohm, 300mA

( 1.8V @ 40mA VDD2DI)

L51
+1.8V_RUN

+A2VDDQ

BLM15BD121SN1D

120ohm, 300mA

DAC2

+DPLL_PVDD

BLM15BD121SN1D

120ohm, 300mA

ATI_HDMI_TX0+ 23
ATI_HDMI_TX0- 23

TX0P_DPA2P
TX0M_DPA2N

GENERAL PURPOSE I/O

R47

DESCRIPTION
PCIE FULL TX OUTPUT SWING
0 = 50% Tx output swing
1 = Full Tx output swing
PCIE TRANSMITTER DE-EMPHASIS ENABLED
0 = Disable ; 1 = Enable

ATI_HDMI_CLK+ 23
ATI_HDMI_CLK- 23

I2C
R71

PIN
GPIO0

AU24
AV23

DPD

STRAPS
TX_PWRS_ENB

TXCAP_DPA3P
TXCAM_DPA3N

DPA

+1.8V_RUN
RAM_TYPE_CFG0
RAM_TYPE_CFG1
RAM_TYPE_CFG2
RAM_TYPE_CFG3

CONFIGURATION STRAPS

MUTI GFX

Note : Required Frequency = 800 MHz

10K
*10K_NC
*10K_NC
10K

U29B

R427
R429
R428
R430

(1.8V @ 20mA A2VDDQ)


B

VGAVSYNC2

+VDD1DI
C89

*100nF_NC

R419
L10
+1.1V_GFX_PCIE

+DPLL_VDDC

BLM15BD121SN1D

120ohm, 300mA

C51
10uF

R431
1

1uF

AH13

C54

!!!
(1.1V @ 150mA DPLL_VDDC)
100nF
(1.0V @ 150mA DPLL_VDDC for M97)

*0_NC
2

R417

C530

249/F

100nF

VREFG

DDC/AUX

CLK_VGA_27M_SS_R
PLL/CLOCK

15 CLK_VGA_27M_SS

C53

+DPLL_PVDD

R432
*10K_NC

+DPLL_VDDC
15 CLK_VGA_27M

R412

100/F

2
R413

1
120/F

DPLL_PVDD
DPLL_PVSS

AN31

DPLL_VDDC

AV33
XTAOUT AU34

T110 PAD

20 VGA_THERMDP
20 VGA_THERMDN

AM32
AN32

AF29
AG29

DPLUS
DMINUS

AK32
AJ32
AJ33

TS_FDO
TSVDD
TSVSS

THERMAL

+TSVDD
L20
+1.8V_RUN

(1.8V @ 20mA TSVDD)

BLM15BD121SN1D

120ohm, 300mA

C115

C114

C90

10uF

1uF

100nF

AUX2P
AUX2N

AN20
AM20

DDCCLK_AUX3P
DDCDATA_AUX3N

AL30
AM30

DDCCLK_AUX4P
DDCDATA_AUX4N

AL29
AM29

DDCCLK_AUX5P
DDCDATA_AUX5N

AN21
AM21

XTALIN
XTALOUT

+3.3V_DELAY
+A2VDDQ

R2SET

R94

1 715/F

ATI_HDMI_SCL 23
ATI_HDMI_SDA 23

DDC2CLK
DDC2DATA

R67
1
1
R74

HDMI

Reserve 0 ohm for


Dual mode DDC/AUX

2
2
0

AUX_SINK_P 23
AUX_SINK_N 23

DP

!!! NC when M92-M2


A

DDC6CLK
DDC6DATA

AJ30
AJ31

NC_DDCCLK_AUX7P
NC_DDCDATA_AUX7N

AK30
AK29

ATI_LCD_DDCCLK
ATI_LCD_DDCDAT

ATI_LCD_DDCCLK
ATI_LCD_DDCDAT
G_CLK_DDC
G_DAT_DDC

25
25

24
24

ATI_LCD_DDCDAT
ATI_LCD_DDCCLK

LVDS

R78
R70

2
2

1 2.2K
1 2.2K

+3.3V_DELAY

CRT

DDC6CLK/DDC6DATA support
internal HDCP(High-bandwidth
Digital Content Protection) function.
Title

M96XT_IO & STRAP

216-0729051(M96-M2 XT)

Scott_0703:Delete Spread Spectrum XTAL circuit as placement required of thermal issue.

QUANTA
COMPUTER

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
1

17

of

61

U29E

PCIE

C580

C576

C238

C578

C566

1uF

1uF

1uF

1uF

1uF

C575

C567

C587

C581

C569

1uF

1uF

1uF

1uF

1uF

C93

C200

C104

C186

C173

1uF

1uF

1uF

1uF

1uF

C150

C111

C210

C568

C88

1uF

1uF

1uF

1uF

1uF

C234

C232

C577

C583

C555

10uF

10uF

10uF

10uF

10uF

AC7
AD11
AF7
AG10
AJ7
AK8
AL9
G11
G14
G17
G20
G23
G26
G29
H10
J7
J9
K11
K13
K8
L12
L16
L21
L23
L26
L7
M11
N11
P7
R11
U11
U7
Y11
Y7

1U = 20 pcs
10U = 5pcs

+1.8V_RUN

VDDR1#1
VDDR1#2
VDDR1#3
VDDR1#4
VDDR1#5
VDDR1#6
VDDR1#7
VDDR1#8
VDDR1#9
VDDR1#10
VDDR1#11
VDDR1#12
VDDR1#13
VDDR1#14
VDDR1#15
VDDR1#16
VDDR1#17
VDDR1#18
VDDR1#19
VDDR1#20
VDDR1#21
VDDR1#22
VDDR1#23
VDDR1#24
VDDR1#25
VDDR1#26
VDDR1#27
VDDR1#28
VDDR1#29
VDDR1#30
VDDR1#31
VDDR1#32
VDDR1#33
VDDR1#34

+VDD_CT

(1.8V @ 136mA VDD_CT)


C544

C543

C109

C108

C94

10uF

1uF

1uF

100nF

1uF

AF26
AF27
AG26
AG27

VDD_CT#1
VDD_CT#2
VDD_CT#3
VDD_CT#4
I/O

+3.3V_DELAY

(3.3V @ 60mA VDDR3)


C91

C98

C110

C99

10uF

1uF

1uF

1uF

AF23
AF24
AG23
AG24

VDDR3#1
VDDR3#2
VDDR3#3
VDDR3#4

+1.5V_GDDR

+VDDR4

+VDDRHA
L57

L18
BLM15BD121SN1D
BLM15BD121SN1D
C107

120ohm, 300mA

120ohm, 300mA

C113

G30
G31
H29
H30
J29
J30
L28
M28
N28
R28
T28
U28

AF13
AF15
AG13
AG15

VDDR4#4
VDDR4#5
VDDR4#7
VDDR4#8

AD12
AF11
AF12
AG11

VDDR4#1
VDDR4#2
VDDR4#3
VDDR4#6

C224

100nF

M20
M21

NC_VDDRHA
NC_VSSRHA

V12
U12

NC_VDDRHB
NC_VSSRHB

+VDDRHB
BLM15BD121SN1D
C163
+1.8V_RUN

!!! M96 Only

+PCIE_PVDD
L56

1uF
PLL

(1.8V @ 68mA PCIE_PVDD)


AB37

BLM15BD121SN1D

120ohm, 300mA

C556

C552

C553

10uF

1uF

100nF

+MPV18

PCIE_PVDD

H7
H8

MPV18#1
MPV18#2

AM10

(0.95-1.2V @ 136mA SPV10)


+1.1V_GFX_PCIE

SPV10

AN10

SPVSS

*BLM15BD121SN1D_NC

120ohm, 300mA

C60

C67

C70

10uF

1uF

100nF

L11

+VCC_GFX_CORE

VOLTAGE
SENESE

BLM15BD121SN1D_

120ohm, 300mA
!!!
For M96 SPV10 = +VCC_GFX_CORE
For Park, Madison SPV10 = +1.1V_GFX_PCIE = 1.0V

+1.8V_RUN

FB_VDDC

AG28

FB_VDDCI

AH29

+MPV18
L26

AF28

FB_GND

(1.8V @ 40mA MPV18)

*BLM15BD121SN1D_NC

120ohm, 300mA

C233

C228

C229

C213

*10uF_NC

*1uF_NC

*1uF_NC

*100nF_NC *100nF_NC

C203

C545

100nF

1uF

1uF

1uF

10uF

+1.1V_GFX_PCIE

C182

C167

C198

C187

C197

C209

1uF

1uF

1uF

1uF

1uF

1uF

10uF

120ohm, 2A

C92

C103

C120

C121

C124

C125

C126

1uF

1uF

1uF

1uF

1uF

1uF

1uF

C128

C132

C136

C137

C151

C152

C153

1uF

1uF

1uF

1uF

1uF

1uF

1uF

C154

C155

C156

C158

C159

C164

C165

1uF

1uF

1uF

1uF

1uF

1uF

1uF

C172

C174

C177

C178

C181

C183

C190

1uF

1uF

1uF

1uF

1uF

1uF

1uF

C192

C199

1uF

1uF

C105

C123

C140

C141

C142

C149

C166

10uF

10uF

10uF

10uF

10uF

10uF

10uF

1U = 30 pcs
10U = 7 pcs
22U = 5pcs

VDDC/VDDCI decoupling Cap follow AMD "ref137-03"

5/18: Adjusted cap values and quantities!

+VCC_GFX_CORE

+BBP
C112

C160

C161

C162

C201

47U

47U

47U

47U

47U

+VDDCI

5/13: Added 5 0805 caps!

+VCC_GFX_CORE
L25
BLM18PG121SN1D

C193

C184

C185

C180

1uF

1uF

1uF

10uF

Scott_0821:Change R704 F/P to 0603 type.

R704
+BBP

*SI2303BDS-T1-E3_NC

1U = 3 pcs
10U = 1 pcs

+3.3V_DELAY

R705
*100K_NC

+VDDCI

(1.8V @ 75mA SPV18)


C71

*1uF_NC

*100nF_NC

+1.8V_RUN

Q11
SI2301BDS-T1-E3

Q14
2N7002W-7-F

2
R35

+VCC_GFX_CORE

Q15
2N7002W-7-F
2
C856
*4700P_NC
25

+BBP

C148

C139

1uF

1uF

C863
*0.1U_NC
10

F15
F17
F19
F21
F23
F25
F27
F29
F31
F33
F7
F9
G2
G6
H9
J2
J27
J6
J8
K14
K7
L11
L17
L2
L22
L24
L6
M17
M22
M24
N16
N18
N2
N21
N23
N26
N6
R15
R17
R2
R20
R22
R24
R27
R6
T11
T13
T16
T18
T21
T23
T26
U15
U17
U2
U20
U22
U24
U27
U6
V11
V16
V18
V21
V23
V26
W2
W6
Y15
Y17
Y20
Y22
Y24
Y27
U13
V13

GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8
GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55
GND#56
GND#57
GND#58
GND#59
GND#60
GND#61
GND#62
GND#63
GND#64
GND#65
GND#66
GND#67
GND#68
GND#69
GND#70
GND#71
GND#72
GND#73
GND#74
GND#75
GND#76
GND#77
GND#78
GND#79
GND#80
GND#81
GND#82
GND#83
GND#84
GND#85
GND#86
GND#87
GND#88
GND#89
GND#90
GND#91
GND#92
GND#93
GND#94
GND#95
GND#96
GND#97
GND#98
GND#99

A3
A37
AA16
AA18
AA2
AA21
AA23
AA26
AA28
AA6
AB12
AB15
AB17
AB20
AB22
AB24
AB27
AC11
AC13
AC16
AC18
AC2
AC21
AC23
AC26
AC28
AC6
AD15
AD17
AD20
AD22
AD24
AD27
AD9
AE2
AE6
AF10
AF16
AF18
AF21
AG17
AG2
AG20
AG22
AG6
AG9
AH21
AJ10
AJ11
AJ2
AJ28
AJ6
AK11
AK31
AK7
AL11
AL14
AL17
AL2
AL20
AL21
AL23
AL26
AL32
AL6
AL8
AM11
AM31
AM9
AN11
AN2
AN30
AN6
AN8
AP11
AP7
AP9
AR5
AW34
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29
B31
B33
B7
B9
C1
C39
E35
E5
F11
F13

VSS_MECH#1
VSS_MECH#2
VSS_MECH#3

A39
AW1
AW39

PCIE_VSS#1
PCIE_VSS#2
PCIE_VSS#3
PCIE_VSS#4
PCIE_VSS#5
PCIE_VSS#6
PCIE_VSS#7
PCIE_VSS#8
PCIE_VSS#9
PCIE_VSS#10
PCIE_VSS#11
PCIE_VSS#12
PCIE_VSS#13
PCIE_VSS#14
PCIE_VSS#15
PCIE_VSS#16
PCIE_VSS#17
PCIE_VSS#18
PCIE_VSS#19
PCIE_VSS#20
PCIE_VSS#21
PCIE_VSS#22
PCIE_VSS#23
PCIE_VSS#24
PCIE_VSS#25
PCIE_VSS#26
PCIE_VSS#27
PCIE_VSS#28
PCIE_VSS#29
PCIE_VSS#30
PCIE_VSS#31
PCIE_VSS#32
PCIE_VSS#33
PCIE_VSS#34
PCIE_VSS#35

GND
GND#100
GND#101
GND#102
GND#103
GND#104
GND#105
GND#106
GND#107
GND#108
GND#109
GND#110
GND#111
GND#112
GND#113
GND#114
GND#115
GND#116
GND#117
GND#118
GND#119
GND#120
GND#121
GND#122
GND#123
GND#124
GND#125
GND#126
GND#127
GND#128
GND#129
GND#130
GND#131
GND#132
GND#133
GND#134
GND#135
GND#136
GND#137
GND#138
GND#139
GND#140
GND#141
GND#142
GND#143
GND#144
GND#145
GND#146
GND#147
GND#148
GND#149
GND#150
GND#151
GND#153
GND#154
GND#155
GND#156
GND#157
GND#158
GND#159
GND#160
GND#161
GND#163
GND#164
GND#165
GND#166
GND#167
GND#168
GND#169
GND#170
GND#171
GND#172
GND#173
GND#174
GND#175
GND#152
GND#162

R422
0

!!!
Reserve for PX_EN
for Park and Madison

216-0729051(M96-M2 XT)
Q83

C862
*4700P_NC
25

*2N7002W-7-F_NC

5/03: Added 4700pF for time tuning purpose

Scott_0819:Reserve +3.3V_delay circuit and add 0ohm resistor from +3.3V_Run to +3.3V_Delay

!!!
M96 support Back Bias
Park, Madison : pop 0 ohm, depop other parts
M96 : pop other parts, depop 0 ohm
5

*75K/F_NC

OPTIONAL RC
NETWORK
TO FINE TUNE
POWER SEQUENCING

1 100K +5V_RUN

5/03: Added 4700pF for time tuning purpose

10K

R706
24,43,46,47,48,49,54 RUN_ON

17 BB_ENA

R36
3

!!! For Park, Madison

3
C10
1U
603
10

AB39
E39
F34
F39
G33
G34
H31
H34
H39
J31
J34
K31
K34
K39
L31
L34
M34
M39
N31
N34
P31
P34
P39
R34
T31
T34
T39
U31
U34
V34
V39
W31
W34
Y34
Y39

C69

*10uF_NC

C68

*BLM15BD121SN1D_NC

120ohm, 300mA

+3.3V_RUN

*0_0603_NC
2

0_0603

Q82

(For M96, 1.2V @ 375mA VDDCI)


VDDCI UNDER REVIEW FOR M97

L13

L24

C191

216-0729051(M96-M2 XT)

+SPV18

!!!
For M96/M92 PCIE_VDDC = 1.1V
For M97 PCIE_VDDC = 1.0V

+PCIE_VDDC

1uF

+BBP
R37
1

+1.8V_RUN

470ohm, 1A

Scott_0701: Change 5pcs*22U to 5pcs*47U as Loki's suggestion

SPV18

AN9

+SPV10

L12

C144

C175

+SPV18

C138

(1.2V @ 29.5A VCC_GFX_CORE) +VCC_GFX_CORE

AA13
AB13
AC12
AC15
AD13
AD16
M15
M16
M18
M23
N13
N15
N17
N20
N22
R12
R13
R16
T12
T15
V15
Y13

L23

C118

BLM18PG121SN1D

VDDCI#1
VDDCI#2
VDDCI#3
VDDCI#4
VDDCI#5
VDDCI#6
VDDCI#7
VDDCI#8
VDDCI#9
VDDCI#10
VDDCI#11
VDDCI#12
VDDCI#13
VDDCI#14
ISOLATED VDDCI#15
CORE I/O VDDCI#16
VDDCI#17
VDDCI#18
VDDCI#19
VDDCI#20
VDDCI#21
VDDCI#22

!!! M96 Only

C119

(1.1V @ 1.4A PCIE_VDDC)

AA15
AA17
AA20
AA22
AA24
AA27
AB16
AB18
AB21
AB23
AB26
AB28
AC17
AC20
AC22
AC24
AC27
AD18
AD21
AD23
AD26
AF17
AF20
AF22
AG16
AG18
AG21
AH22
AH27
AH28
M26
N24
N27
R18
R21
R23
R26
T17
T20
T22
T24
T27
U16
U18
U21
U23
U26
V17
V20
V22
V24
V27
Y16
Y18
Y21
Y23
Y26
Y28

1uF
1uF

BLM18PG471SN1D

VDDC#1
VDDC#2
VDDC#3
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8
VDDC#9
VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15
VDDC#16
VDDC#17
VDDC#18
VDDC#19
VDDC#20
VDDC#21
VDDC#22
VDDC#23
VDDC#24
VDDC#25
VDDC#26
VDDC#27
VDDC#28
VDDC#29
VDDC#30
VDDC#31
VDDC#32
VDDC#33
VDDC#34
VDDC#35
VDDC#36
VDDC#37
VDDC#38
VDDC#39
VDDC#40
VDDC#41
VDDC#42
VDDC#43
VDDC#44
VDDC#45
VDDC#46
VDDC#47
VDDC#48
VDDC#49
VDDC#50
VDDC#51
VDDC#52
VDDC#53
VDDC#54
VDDC#55
VDDC#56
VDDC#57
VDDC#58

+VDDR4

DVP isn't used.


+1.8V_RUN

PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8
PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12

LEVEL
TRANSLATION

BLM15BD121SN1D

120ohm, 300mA

PCIE_VDDR#1
PCIE_VDDR#2
PCIE_VDDR#3
PCIE_VDDR#4
PCIE_VDDR#5
PCIE_VDDR#6
PCIE_VDDR#7
PCIE_VDDR#8

CORE

L54

(1.8V @ 210mA PCIE_VDDR)


AA31
AA32
AA33
AA34
V28
W29
W30
Y31

POWER

L53

U29F
+PCIE_VDDR

MEM I/O

For DDR3, VDDR1 = 1.5V


(1.5V @ 2.9A VDDR1+VDDRHA+VDDRHB)

+1.5V_GDDR

Title

QUANTA
COMPUTER
M96XT_POWER

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
1

Sheet

18

of

61

!!!
For M96/92, DPx_VDD10 = 1.1V
For M97 DPx_VDD10 = 1.0V

!!! For M97 Only


(1.8V @ 110mA DPA_VDD18)

+DPA_VDD18

L15

DPC & DPD U29H


+DPC_VDD18 aren't used.
DP C/D POWER
AP20
AP21

*BLM15BD121SN1D_NC

+DPA_VDD18

DP A/B POWER

DPC_VDD18#1
DPC_VDD18#2

DPA_VDD18#1
DPA_VDD18#2

AN24
AP24

DPC_VDD10#1
DPC_VDD10#2

DPA_VDD10#1
DPA_VDD10#2

AP31
AP32

C80
*100nF_NC

+DPA_VDD10

C74

C73

*1uF_NC

*10uF_NC

+1.8V_RUN

120ohm, 300mA

(1.1V @ 200mA DPA_VDD10)

+1.1V_GFX_PCIE

L48
AP13
AT13

BLM15BD121SN1D
C519

C520

C521

100nF

1uF

10uF

C55
*100nF_NC

AN17
AP16
AP17
AW14
AW16

DPC_VSSR#1
DPC_VSSR#2
DPC_VSSR#3
DPC_VSSR#4
DPC_VSSR#5

DPA_VSSR#1
DPA_VSSR#2
DPA_VSSR#3
DPA_VSSR#4
DPA_VSSR#5

AN27
AP27
AP28
AW24
AW26

AP22
AP23

DPD_VDD18#1
DPD_VDD18#2

DPB_VDD18#1
DPB_VDD18#2

AP25
AP26

120ohm, 300mA

+1.1V_GFX_PCIE

L14

DPA for HDMI

*BLM15BD121SN1D_NC
C79
*100nF_NC

+DPD_VDD18

(1.8V @ 110mA DPB_VDD18)

+DPB_VDD18

C75

C72

*1uF_NC

*10uF_NC

+1.8V_RUN

120ohm, 300mA

+DPB_VDD18

+DPB_VDD10

+DPC_VDD18
R59
1

(1.1V @ 200mA DPB_VDD10)

+1.1V_GFX_PCIE

L16
AP14
AP15

DPD_VDD10#1
DPD_VDD10#2

DPB_VDD10#1
DPB_VDD10#2

AN33
AP33

BLM15BD121SN1D
C78

C77

C83

100nF

1uF

10uF

C57
*100nF_NC

AN19
AP18
AP19
AW20
AW22

DPD_VSSR#1
DPD_VSSR#2
DPD_VSSR#3
DPD_VSSR#4
DPD_VSSR#5

DPB_VSSR#1
DPB_VSSR#2
DPB_VSSR#3
DPB_VSSR#4
DPB_VSSR#5

120ohm, 300mA

*0_NC
2

+1.8V_RUN

*0_NC
2

+1.8V_RUN

C82

+1.1V_GFX_PCIE

*100nF_NC

DPB for DP

AN29
AP29
AP30
AW30
AW32

+DPD_VDD18
R58
1

(1.8V @ 20 mA DPA_PVDD)

+DPA_PVDD

C81

L49
150/F

(1.8V @ 400mA DPE_VDD18;


200mA for DPE/DPF respectively) +DPE_VDD18

R425 AW18

L19
+1.8V_RUN

AH34
AJ34

BLM18PG600SN1D

60ohm, 500mA

0504: Change L19 for low DCR


0.1ohm as AMD suggest.

C97

C95

C96

10uF

1uF

100nF

DPCD_CALR
DP E/F POWER
DPE_VDD18#1
DPE_VDD18#2

AL33
AM33

AN34
AP39
AR39
AU37
AW35

AF34
AG34

(1.1V @ 200mA DPE_VDD10;


100mA for DPE/DPF respectively) +DPE_VDD10

DPE_VSSR#1
DPE_VSSR#2
DPE_VSSR#3
DPE_VSSR#4
DPE_VSSR#5

AK33
AK34

BLM15BD121SN1D
C86

C84

C85

10uF

1uF

100nF

150/F

DPB_PVDD
DPB_PVSS

AV29
AR28

R438

DPC_PVDD
DPC_PVSS

AU18
AV17

DPD_PVDD
DPD_PVSS

AV19
AR18

BLM15BD121SN1D
C534

C532

C529

100nF

1uF

10uF

DPF_VSSR#1
DPF_VSSR#2
DPF_VSSR#3
DPF_VSSR#4
DPF_VSSR#5

AM39

DPEF_CALR

L50

C537

C533

C531

100nF

1uF

10uF

+1.8V_RUN

120ohm, 300mA

C535

C536
*100nF_NC

+DPE_PVDD

(1.8V @ 40mA DPE_PVDD; 20mA


for DPE/DPF respectively)
L55

DPE_PVDD
DPE_PVSS

AM37
AN38

NC_DPF_PVDD
NC_DPF_PVSS

AL38
AM35

DPF_VDD10#1
DPF_VDD10#2

AF39
AH39
AK39
AL34
AM34

120ohm, 300mA

BLM15BD121SN1D

DPC & DPD +1.8V_RUN


aren't used.

+1.8V_RUN

*100nF_NC

*100nF_NC

DPF_VDD18#1
DPF_VDD18#2

L17

120ohm, 300mA

AU28
AV27

150/F

(1.8V @ 20 mA DPB_PVDD) +DPB_PVDD


DPE_VDD10#1
DPE_VDD10#2

+DPE_VDD18

+1.1V_GFX_PCIE

DP PLL POWER
DPA_PVDD
DPA_PVSS

R424

+DPE_VDD10

DPE & DPF for LVDS

DPAB_CALR

AW28

BLM15BD121SN1D
C549

C548

C547

100nF

1uF

10uF

+1.8V_RUN

120ohm, 300mA

216-0729051(M96-M2 XT)

Title

QUANTA
COMPUTER
M96XT_DP POWER

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
1

19

of

61

WEA0#
WEA1#

21 CKEA0
21 CKEA1

CKEA0
CKEA1

21 CSA0_0#
21 CSA1_0#

CSA0_0#
CSA1_0#

MVREFDA
MVREFSA

L18
L20

R107 1
R104 1
R88 1

2 *240/F_NC
2 *240/F_NC
2 *240/F_NC

R105 1

2 240/F

R106 1
R84 1

2 *240/F_NC
2 *240/F_NC

ODTA0
ODTA1

ODTA0
ODTA1

21 CLKA0
21 CLKA0#

CLKA0
CLKA0#

21 CLKA1
21 CLKA1#

CLKA1
CLKA1#
QSA#[7..0]

21 QSA#[7..0]

QSA[7..0]

21 QSA[7..0]

DQMA#[7..0]

21 DQMA#[7..0]

MDA[63..0]
21 MDA[63..0]
MAA[13..0]

21 MAA[13..0]
21
21
21

A_BA0
A_BA1
A_BA2

A_BA0
A_BA1
A_BA2

+1.5V_GDDR

PLACE MVREF
DIVIDERS
Ra
AND CAPS
CLOSE TO ASIC
+1.5V_GDDR

Rb

R110
100/F

R111

C196

100/F

100nF

R113

Ra

Rb

100/F

R109

C206

100/F

100nF

+1.5V_GDDR

!!!
For PM

DQA0_0/DQA_0
DQA0_1/DQA_1
DQA0_2/DQA_2
DQA0_3/DQA_3
DQA0_4/DQA_4
DQA0_5/DQA_5
DQA0_6/DQA_6
DQA0_7/DQA_7
DQA0_8/DQA_8
DQA0_9/DQA_9
DQA0_10/DQA_10
DQA0_11/DQA_11
DQA0_12/DQA_12
DQA0_13/DQA_13
DQA0_14/DQA_14
DQA0_15/DQA_15
DQA0_16/DQA_16
DQA0_17/DQA_17
DQA0_18/DQA_18
DQA0_19/DQA_19
DQA0_20/DQA_20
DQA0_21/DQA_21
DQA0_22/DQA_22
DQA0_23/DQA_23
DQA0_24/DQA_24
DQA0_25/DQA_25
DQA0_26/DQA_26
DQA0_27/DQA_27
DQA0_28/DQA_28
DQA0_29/DQA_29
DQA0_30/DQA_30
DQA0_31/DQA_31
DQA1_0/DQA_32
DQA1_1/DQA_33
DQA1_2/DQA_34
DQA1_3/DQA_35
DQA1_4/DQA_36
DQA1_5/DQA_37
DQA1_6/DQA_38
DQA1_7/DQA_39
DQA1_8/DQA_40
DQA1_9/DQA_41
DQA1_10/DQA_42
DQA1_11/DQA_43
DQA1_12/DQA_44
DQA1_13/DQA_45
DQA1_14/DQA_46
DQA1_15/DQA_47
DQA1_16/DQA_48
DQA1_17/DQA_49
DQA1_18/DQA_50
DQA1_19/DQA_51
DQA1_20/DQA_52
DQA1_21/DQA_53
DQA1_22/DQA_54
DQA1_23/DQA_55
DQA1_24/DQA_56
DQA1_25/DQA_57
DQA1_26/DQA_58
DQA1_27/DQA_59
DQA1_28/DQA_60
DQA1_29/DQA_61
DQA1_30/DQA_62
DQA1_31/DQA_63

MAA0_0/MAA_0
MAA0_1/MAA_1
MAA0_2/MAA_2
MAA0_3/MAA_3
MAA0_4/MAA_4
MAA0_5/MAA_5
MAA0_6/MAA_6
MAA0_7/MAA_7
MAA1_0/MAA_8
MAA1_1/MAA_9
MAA1_2/MAA_10
MAA1_3/MAA_11
MAA1_4/MAA_12
MAA1_5/MAA_13_BA2
MAA1_6/MAA_14_BA0
MAA1_7/MAA_A15_BA1

G24
J23
H24
J24
H26
J26
H21
G21
H19
H20
L13
G16
J16
H16
J17
H17

WCKA0_0/DQMA_0
WCKA0B_0/DQMA_1
WCKA0_1/DQMA_2
WCKA0B_1/DQMA_3
WCKA1_0/DQMA_4
WCKA1B_0/DQMA_5
WCKA1_1/DQMA_6
WCKA1B_1/DQMA_7
GDDR5/DDR2/GDDR3
EDCA0_0/QSA_0/RDQSA_0
EDCA0_1/QSA_1/RDQSA_1
EDCA0_2/QSA_2/RDQSA_2
EDCA0_3/QSA_3/RDQSA_3
EDCA1_0/QSA_4/RDQSA_4
EDCA1_1/QSA_5/RDQSA_5
EDCA1_2/QSA_6/RDQSA_6
EDCA1_3/QSA_7/RDQSA_7

A32
C32
D23
E22
C14
A14
E10
D9

DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7

C34
D29
D25
E20
E16
E12
J10
D7

QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7

DDBIA0_0/QSA_0B/WDQSA_0
DDBIA0_1/QSA_1B/WDQSA_1
DDBIA0_2/QSA_2B/WDQSA_2
DDBIA0_3/QSA_3B/WDQSA_3
DDBIA1_0/QSA_4B/WDQSA_4
DDBIA1_1/QSA_5B/WDQSA_5
DDBIA1_2/QSA_6B/WDQSA_6
DDBIA1_3/QSA_7B/WDQSA_7

A34
E30
E26
C20
C16
C12
J11
F8

QSA#0
QSA#1
QSA#2
QSA#3
QSA#4
QSA#5
QSA#6
QSA#7

ADBIA0/ODTA0
ADBIA1/ODTA1

J21
G19

ODTA0
ODTA1

CLKA0
CLKA0B

H27
G27

CLKA0
CLKA0#

CLKA1
CLKA1B

J14
H14

CLKA1
CLKA1#

RASA0B
RASA1B

K23
K19

RASA0#
RASA1#

CASA0B
CASA1B

K20
K17

CASA0#
CASA1#

K24
K27

CSA0_0#

CSA0B_0
CSA0B_1

22 CASB0#
22 CASB1#

CASB0#
CASB1#

22 WEB0#
22 WEB1#

WEB0#
WEB1#

22 CKEB0
22 CKEB1

CKEB0
CKEB1

22 CSB0_0#
22 CSB1_0#

CSB0_0#
CSB1_0#

22 ODTB0
22 ODTB1

ODTB0
ODTB1

22 CLKB0
22 CLKB0#

CLKB0
CLKB0#

22 CLKB1
22 CLKB1#

CLKB1
CLKB1#

U29D
DDR2
GDDR3/GDDR5
DDR3

QSB[7..0]
DQMB#[7..0]
MDB[63..0]

22 MDB[63..0]
MAB[13..0]

22 MAB[13..0]

M13
K16

CSA1_0#

MVREFDA
MVREFSA

CKEA0
CKEA1

K21
J20

CKEA0
CKEA1

L27
N12
AG12

MEM_CALRN0
MEM_CALRN1
MEM_CALRN2

WEA0B
WEA1B

K26
L15

WEA0#
WEA1#

M12
M27
AH12

MEM_CALRP1
MEM_CALRP0
MEM_CALRP2

22
22
22

B_BA0
B_BA1
B_BA2

B_BA0
B_BA1
B_BA2

+1.5V_GDDR

PLACE MVREF
DIVIDERS
Ra
AND CAPS
CLOSE TO ASIC
+1.5V_GDDR

Rb

R98
100/F

R96

C143

100/F

100nF

R92

Ra

MVREFDB Y12
MVREFSB AA12

Rb

R93

C134

100/F

100nF

MAA13

H23
J19

R91

1K

R75 R690 R691


RSVD

216-0729051(M96-M2 XT)

GDDR3

DDR3

1.8V

1.5V

Ra

40.2R

100R

Rb

100R

100R

MVDDQ

DQB0_0/DQB_0
DQB0_1/DQB_1
DQB0_2/DQB_2
DQB0_3/DQB_3
DQB0_4/DQB_4
DQB0_5/DQB_5
DQB0_6/DQB_6
DQB0_7/DQB_7
DQB0_8/DQB_8
DQB0_9/DQB_9
DQB0_10/DQB_10
DQB0_11/DQB_11
DQB0_12/DQB_12
DQB0_13/DQB_13
DQB0_14/DQB_14
DQB0_15/DQB_15
DQB0_16/DQB_16
DQB0_17/DQB_17
DQB0_18/DQB_18
DQB0_19/DQB_19
DQB0_20/DQB_20
DQB0_21/DQB_21
DQB0_22/DQB_22
DQB0_23/DQB_23
DQB0_24/DQB_24
DQB0_25/DQB_25
DQB0_26/DQB_26
DQB0_27/DQB_27
DQB0_28/DQB_28
DQB0_29/DQB_29
DQB0_30/DQB_30
DQB0_31/DQB_31
DQB1_0/DQB_32
DQB1_1/DQB_33
DQB1_2/DQB_34
DQB1_3/DQB_35
DQB1_4/DQB_36
DQB1_5/DQB_37
DQB1_6/DQB_38
DQB1_7/DQB_39
DQB1_8/DQB_40
DQB1_9/DQB_41
DQB1_10/DQB_42
DQB1_11/DQB_43
DQB1_12/DQB_44
DQB1_13/DQB_45
DQB1_14/DQB_46
DQB1_15/DQB_47
DQB1_16/DQB_48
DQB1_17/DQB_49
DQB1_18/DQB_50
DQB1_19/DQB_51
DQB1_20/DQB_52
DQB1_21/DQB_53
DQB1_22/DQB_54
DQB1_23/DQB_55
DQB1_24/DQB_56
DQB1_25/DQB_57
DQB1_26/DQB_58
DQB1_27/DQB_59
DQB1_28/DQB_60
DQB1_29/DQB_61
DQB1_30/DQB_62
DQB1_31/DQB_63

MAB0_0/MAB_0
MAB0_1/MAB_1
MAB0_2/MAB_2
MAB0_3/MAB_3
MAB0_4/MAB_4
MAB0_5/MAB_5
MAB0_6/MAB_6
MAB0_7/MAB_7
MAB1_0/MAB_8
MAB1_1/MAB_9
MAB1_2/MAB_10
MAB1_3/MAB_11
MAB1_4/MAB_12
MAB1_5/BA2
MAB1_6/BA0
MAB1_7/BA1

P8
T9
P9
N7
N8
N9
U9
U8
Y9
W9
AC8
AC9
AA7
AA8
Y8
AA9

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
B_BA2
B_BA0
B_BA1

WCKB0_0/DQMB_0
WCKB0B_0/DQMB_1
WCKB0_1/DQMB_2
WCKB0B_1/DQMB_3
WCKB1_0/DQMB_4
WCKB1B_0/DQMB_5
WCKB1_1/DQMB_6
WCKB1B_1/DQMB_7
GDDR5/DDR2/GDDR3
EDCB0_0/QSB_0/RDQSB_0
EDCB0_1/QSB_1/RDQSB_1
EDCB0_2/QSB_2/RDQSB_2
EDCB0_3/QSB_3/RDQSB_3
EDCB1_0/QSB_4/RDQSB_4
EDCB1_1/QSB_5/RDQSB_5
EDCB1_2/QSB_6/RDQSB_6
EDCB1_3/QSB_7/RDQSB_7

H3
H1
T3
T5
AE4
AF5
AK6
AK5

DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7

F6
K3
P3
V5
AB5
AH1
AJ9
AM5

QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7

DDBIB0_0/QSB_0B/WDQSB_0
DDBIB0_1/QSB_1B/WDQSB_1
DDBIB0_2/QSB_2B/WDQSB_2
DDBIB0_3/QSB_3B/WDQSB_3
DDBIB1_0/QSB_4B/WDQSB_4
DDBIB1_1/QSB_5B/WDQSB_5
DDBIB1_2/QSB_6B/WDQSB_6
DDBIB1_3/QSB_7B/WDQSB_7

G7
K1
P1
W4
AC4
AH3
AJ8
AM3

QSB#0
QSB#1
QSB#2
QSB#3
QSB#4
QSB#5
QSB#6
QSB#7

T7
W7

ODTB0
ODTB1

CLKB0
CLKB0B

L9
L8

CLKB0
CLKB0#

CLKB1
CLKB1B

AD8
AD7

CLKB1
CLKB1#

RASB0B
RASB1B

T10
Y10

RASB0#
RASB1#

CASB0B
CASB1B

W10
AA10

CASB0#
CASB1#

P10
L10

CSB0_0#

CSB1B_0
CSB1B_1

AD10
AC10

CSB1_0#

CKEB0
CKEB1

U10
AA11

CKEB0
CKEB1

WEB0B
WEB1B

N10
AB11

WEB0#
WEB1#

MAB0_8
MAB1_8

T8
W8

MAB13

ADBIB0/ODTB0
ADBIB1/ODTB1

CSB0B_0
CSB0B_1

MVREFDB
MVREFSB

AD28

TESTEN

AK10
AL10

CLKTESTA
CLKTESTB

DRAM_RST

AH11

DDR3_RST 21,22

R68

R440

C100

R439

1nF

*4.7K_NC

4.7K

+1.5V_GDDR

4.7K

DDR3/GDDR3 Memory Stuff Option

4.7K
2

AL31

C5
C3
E3
E1
F1
F3
F5
G4
H5
H6
J4
K6
K5
L4
M6
M1
M3
M5
N4
P6
P5
R4
T6
T1
U4
V6
V1
V3
Y6
Y1
Y3
Y5
AA4
AB6
AB1
AB3
AD6
AD1
AD3
AD5
AF1
AF3
AF6
AG4
AH5
AH6
AJ4
AK3
AF8
AF9
AG8
AG7
AK9
AL7
AM8
AM7
AK1
AL4
AM6
AM1
AN4
AP3
AP1
AP5

DDR2
GDDR5/GDDR3
DDR3

100/F

!!! For PM
!!! For PM: Park and Madison

MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63

QSB#[7..0]

22 QSB#[7..0]
22 QSB[7..0]
22 DQMB#[7..0]

CSA1B_0
CSA1B_1

MAA0_8
MAA1_8

RASB0#
RASB1#

21
21

C37
C35
A35
E34
G32
D33
F32
E32
D31
F30
C30
A30
F28
C28
A28
E28
D27
F26
C26
A26
F24
C24
A24
E24
C22
A22
F22
D21
A20
F20
D19
E18
C18
A18
F18
D17
A16
F16
D15
E14
F14
D13
F12
A12
D11
F10
A10
C10
G13
H13
J13
H11
G10
G8
K9
K10
G9
A8
C8
E8
A6
C6
E6
A5

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
A_BA2
A_BA0
A_BA1

22 RASB0#
22 RASB1#

GDDR5

21 WEA0#
21 WEA1#

MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63

*0_NC *0_NC
2

21 CASA0#
21 CASA1#

CASA0#
CASA1#

DDR2
GDDR5/GDDR3
DDR3

GDDR5

RASA0#
RASA1#

MEMORY INTERFACE B

U29C
DDR2
GDDR3/GDDR5
DDR3

21 RASA0#
21 RASA1#

MEMORY INTERFACE A

216-0729051(M96-M2 XT)

0504:Change C100 from 1uF to 1nF


according to AMD's suggestion
!!! For M96 : Pop 4.7K
For Madison : Pop 0 ohm

+3.3V_SUS

+3.3V_ADM1032A

Q22
SI2303BDS-T1-E3

R114
100K

+3.3V_ADM1032A
3

+3.3V_ADM1032A

17 THERMAL_INT#

THERMAL_INT#

SDATA

D+

ALERT#

D-

VDD

GND

THERM#

1 10K

R451 2

1 10K

2200P
50

VGA_THERMDN 17
MB_THERM# 51

QUANTA
COMPUTER

C562

Title

0.1U
10

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

M96XT_MEMORY/THERM

+3.3V_ADM1032A

C563

MB_THERM#

R450 2

THERMAL_INT#

C858
*4700P_NC
25

5/03: Added 4700pF for time tuning purpose

VGA_THERMDP 17

SCLK

ADM1032ARMZ-1RL
MB_THERM#

Q21
2N7002W-7-F

+3.3V_ADM1032A
U31

Scott_0703:Delete Spread Spectrum IC as placement require of thermal issue.

29,52,53 GFX_ON

4.7K

4.7K

2
9,24,29 SMBDAT1

Q51
2N7002W-7-F
1

R454

9,24,29 SMBCLK1
A

R455

THERMAL MONITOR
Q52
2N7002W-7-F
1

Rev
3A
Sheet
1

20

of

61

DDR3 64MX16, CH A : 512MB


U4

20 CLKA0
20 CLKA0#
20 CKEA0

CSA0_0#
RASA0#
CASA0#
WEA0#

VREF_A0
VREF_A1

M8
H1

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

A_BA0
A_BA1
A_BA2

M2
N8
M3

BA0
BA1
BA2

CLKA0
CLKA0#
CKEA0

J7
K7
K9

CK
CK
CKE

ODTA0_M
CSA0_0#
RASA0#
CASA0#
WEA0#

K1
L2
J3
K3
L3

ODT
CS
RAS
CAS
WE

QSA3
QSA1

F3
C7

DQSL
DQSU

DQMA#3
DQMA#1

E7
D3

DML
DMU

QSA#3
QSA#1

G3
B7

DQSL
DQSU

DDR3_RST

T2

RESET

L8

ZQ

20,22 DDR3_RST
R131 1

2 240/F

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

MDA29
MDA24
MDA30
MDA25
MDA28
MDA26
MDA31
MDA27

VREF_A2
VREF_A3

M8
H1

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

MDA12
MDA15
MDA10
MDA13
MDA9
MDA11
MDA8
MDA14

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

B2
D9
G7
K2
K8
N1
N9
R1
R9

A_BA0
A_BA1
A_BA2

M2
N8
M3

BA0
BA1
BA2

CLKA0
CLKA0#
CKEA0

J7
K7
K9

CK
CK
CKE

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

A1
A8
C1
C9
D2
E9
F1
H2
H9

ODTA0_M
CSA0_0#
RASA0#
CASA0#
WEA0#

K1
L2
J3
K3
L3

ODT
CS
RAS
CAS
WE

QSA2
QSA0

F3
C7

DQSL
DQSU

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

DQMA#2
DQMA#0

E7
D3

DML
DMU

QSA#2
QSA#0

G3
B7

DQSL
DQSU

DDR3_RST

T2

RESET

L8

ZQ

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

B1
B9
D1
D8
E2
E8
F9
G1
G9

VREFCA
VREFDQ

J1
L1
J9
L9

NC#J1
NC#L1
NC#J9
NC#L9

+1.5V_GDDR

+1.5V_GDDR

R456 1

2 240/F

J1
L1
J9
L9

100-BALL
SDRAM DDR3
K4W1G1646E-HC12

E3
F7
F2
F8
H3
H8
G2
H7

MDA19
MDA22
MDA18
MDA21
MDA16
MDA20
MDA17
MDA23

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

MDA4
MDA3
MDA7
MDA0
MDA5
MDA1
MDA6
MDA2

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

B2
D9
G7
K2
K8
N1
N9
R1
R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

A1
A8
C1
C9
D2
E9
F1
H2
H9

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

B1
B9
D1
D8
E2
E8
F9
G1
G9

NC#J1
NC#L1
NC#J9
NC#L9

M8
H1

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

A_BA0
A_BA1
A_BA2

M2
N8
M3

BA0
BA1
BA2

CLKA1
CLKA1#
CKEA1

J7
K7
K9

CK
CK
CKE

ODTA1_M
CSA1_0#
RASA1#
CASA1#
WEA1#

K1
L2
J3
K3
L3

ODT
CS
RAS
CAS
WE

QSA4
QSA6

F3
C7

DQSL
DQSU

DQMA#4
DQMA#6

E7
D3

DML
DMU

QSA#4
QSA#6

G3
B7

DQSL
DQSU

DDR3_RST

T2

RESET

L8

ZQ

+1.5V_GDDR

20 CLKA1
20 CLKA1#
20 CKEA1

+1.5V_GDDR

20
20
20
20

CSA1_0#
RASA1#
CASA1#
WEA1#

R122 1

U33

VREF_A4
VREF_A5

2 240/F

J1
L1
J9
L9

100-BALL
SDRAM DDR3
K4W1G1646E-HC12

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

MDA38
MDA34
MDA36
MDA35
MDA39
MDA32
MDA37
MDA33

VREF_A6
VREF_A7

M8
H1

VREFCA
VREFDQ

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

MDA51
MDA50
MDA49
MDA48
MDA54
MDA53
MDA52
MDA55

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

B2
D9
G7
K2
K8
N1
N9
R1
R9

A_BA0
A_BA1
A_BA2

M2
N8
M3

BA0
BA1
BA2

CLKA1
CLKA1#
CKEA1

J7
K7
K9

CK
CK
CKE

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

A1
A8
C1
C9
D2
E9
F1
H2
H9

ODTA1_M
CSA1_0#
RASA1#
CASA1#
WEA1#

K1
L2
J3
K3
L3

ODT
CS
RAS
CAS
WE

QSA7
QSA5

F3
C7

DQSL
DQSU

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

DQMA#7
DQMA#5

E7
D3

DML
DMU

QSA#7
QSA#5

G3
B7

DQSL
DQSU

DDR3_RST

T2

RESET

L8

ZQ

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

B1
B9
D1
D8
E2
E8
F9
G1
G9

VREFCA
VREFDQ

NC#J1
NC#L1
NC#J9
NC#L9

+1.5V_GDDR

+1.5V_GDDR

R465 1

2 240/F

J1
L1
J9
L9

100-BALL
SDRAM DDR3
K4W1G1646E-HC12

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

MDA57
MDA60
MDA58
MDA61
MDA56
MDA63
MDA59
MDA62

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

MDA43
MDA44
MDA46
MDA42
MDA40
MDA47
MDA41
MDA45

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

B2
D9
G7
K2
K8
N1
N9
R1
R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

A1
A8
C1
C9
D2
E9
F1
H2
H9

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

B1
B9
D1
D8
E2
E8
F9
G1
G9

+1.5V_GDDR

NC#J1
NC#L1
NC#J9
NC#L9

+1.5V_GDDR

100-BALL
SDRAM DDR3
K4W1G1646E-HC12

MDA[63..0]

20 MDA[63..0]

MAA[13..0]

20 MAA[13..0]

QSA#[7..0]

20 QSA#[7..0]

+1.5V_GDDR

+1.5V_GDDR

+1.5V_GDDR

+1.5V_GDDR

+1.5V_GDDR

+1.5V_GDDR

+1.5V_GDDR

+1.5V_GDDR

R133

R126

R458

R462

R123

R134

R463

R460

4.99K/F

4.99K/F

4.99K/F

4.99K/F

4.99K/F

4.99K/F

4.99K/F

QSA[7..0]

20 QSA[7..0]

DQMA#[7..0]

20 DQMA#[7..0]

A_BA[2..0]

20 ODTA1

4.99K/F

0.1U
10

C589

0.1U
10

C263

C261

C241

C237

C600

C599

C588

C582

C236

R459

C596

VREF_A7

C598

C593

C579

4.99K/F

0.1U
10

C586

C594

C257

4.99K/F

R464

+1.5V_GDDR

C239

0.1U
10

C262

+1.5V_GDDR

C256

R135

VREF_A6

4.99K/F

C242

0.1U
10

4.99K/F

VREF_A5

R124

C595

+1.5V_GDDR

C260

VREF_A4

4.99K/F

0.1U
10

R461

C240

C585

+1.5V_GDDR

4.99K/F

VREF_A3

ODTA0_M

C597

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

*56_NC

1U/6.3V

R127

1U/6.3V

1U/6.3V

*56_NC

R125

1
0

0
2

R120
2
R121
2

0.1U
10

+1.5V_GDDR

56

20 ODTA0

R457

2 0.01U/16V

C235

2 0.01U/16V

C264 1

R136

C258 1

56

4.99K/F

56

R137

0.1U
10

R130

CLKA1

R119

CLKA0#

56

R129

C259

VREF_A2

4.99K/F
CLKA0

VREF_A1

R132

Placement has to be close to VRAM


C

VREF_A0

20 A_BA[2..0]

CLKA1#

U5
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

VREFCA
VREFDQ

20
20
20
20

U32

1U/6.3V

ODTA1_M

10uF_6.3V
CC0603

C591
10uF_6.3V
CC0603

C255

10uF_6.3V
CC0603

C244

10uF_6.3V
CC0603

C584

10uF_6.3V
CC0603

C592

10uF_6.3V
CC0603

C243

10uF_6.3V
CC0603

C254

+1.5V_GDDR

+1.5V_GDDR

!!! M96 : pop 0 ohm :


Park, Madison: pop 56 ohm

C590
10uF_6.3V
CC0603

Title

QUANTA
COMPUTER
M96XT_DDR3_A_512M

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet

21
8

of

61

DDR3 64MX16, CH B : 512MB


U30

20 CLKB0
20 CLKB0#
20 CKEB0

CSB0_0#
RASB0#
CASB0#
WEB0#

VREF_B0
VREF_B1

M8
H1

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

B_BA0
B_BA1
B_BA2

M2
N8
M3

BA0
BA1
BA2

CLKB0
CLKB0#
CKEB0

J7
K7
K9

CK
CK
CKE

ODTB0_M
CSB0_0#
RASB0#
CASB0#
WEB0#

K1
L2
J3
K3
L3

ODT
CS
RAS
CAS
WE

QSB0
QSB1

F3
C7

DQSL
DQSU

DQMB#0
DQMB#1

E7
D3

DML
DMU

QSB#0
QSB#1

G3
B7

DQSL
DQSU

DDR3_RST

T2

RESET

L8

ZQ

20,21 DDR3_RST
R449 1

2 240/F

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

MDB3
MDB4
MDB2
MDB5
MDB0
MDB6
MDB1
MDB7

VREF_B2
VREF_B3

M8
H1

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

MDB15
MDB10
MDB14
MDB8
MDB12
MDB9
MDB13
MDB11

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

B2
D9
G7
K2
K8
N1
N9
R1
R9

B_BA0
B_BA1
B_BA2

M2
N8
M3

BA0
BA1
BA2

CLKB0
CLKB0#
CKEB0

J7
K7
K9

CK
CK
CKE

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

A1
A8
C1
C9
D2
E9
F1
H2
H9

ODTB0_M
CSB0_0#
RASB0#
CASB0#
WEB0#

K1
L2
J3
K3
L3

ODT
CS
RAS
CAS
WE

QSB2
QSB3

F3
C7

DQSL
DQSU

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

DQMB#2
DQMB#3

E7
D3

DML
DMU

QSB#2
QSB#3

G3
B7

DQSL
DQSU

DDR3_RST

T2

RESET

L8

ZQ

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

B1
B9
D1
D8
E2
E8
F9
G1
G9

VREFCA
VREFDQ

J1
L1
J9
L9

NC#J1
NC#L1
NC#J9
NC#L9

+1.5V_GDDR

+1.5V_GDDR

R95

2 240/F

J1
L1
J9
L9

100-BALL
SDRAM DDR3
K4W1G1646E-HC12

MDB16
MDB17
MDB23
MDB18
MDB20
MDB19
MDB21
MDB22

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

MDB24
MDB31
MDB28
MDB30
MDB26
MDB29
MDB25
MDB27

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

B2
D9
G7
K2
K8
N1
N9
R1
R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

A1
A8
C1
C9
D2
E9
F1
H2
H9

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

B1
B9
D1
D8
E2
E8
F9
G1
G9

NC#J1
NC#L1
NC#J9
NC#L9

M8
H1

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

B_BA0
B_BA1
B_BA2

M2
N8
M3

BA0
BA1
BA2

CLKB1
CLKB1#
CKEB1

J7
K7
K9

CK
CK
CKE

ODTB1_M
CSB1_0#
RASB1#
CASB1#
WEB1#

K1
L2
J3
K3
L3

ODT
CS
RAS
CAS
WE

QSB6
QSB5

F3
C7

DQSL
DQSU

DQMB#6
DQMB#5

E7
D3

DML
DMU

QSB#6
QSB#5

G3
B7

DQSL
DQSU

DDR3_RST

T2

RESET

L8

ZQ

+1.5V_GDDR

20 CLKB1
20 CLKB1#
20 CKEB1

+1.5V_GDDR

20
20
20
20

CSB1_0#
RASB1#
CASB1#
WEB1#

R66

U28

VREF_B4
VREF_B5

2 240/F

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

MDB55
MDB52
MDB54
MDB51
MDB49
MDB48
MDB53
MDB50

VREF_B6
VREF_B7

M8
H1

VREFCA
VREFDQ

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

MDB41
MDB47
MDB40
MDB46
MDB43
MDB45
MDB44
MDB42

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

B2
D9
G7
K2
K8
N1
N9
R1
R9

B_BA0
B_BA1
B_BA2

M2
N8
M3

BA0
BA1
BA2

CLKB1
CLKB1#
CKEB1

J7
K7
K9

CK
CK
CKE

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

A1
A8
C1
C9
D2
E9
F1
H2
H9

ODTB1_M
CSB1_0#
RASB1#
CASB1#
WEB1#

K1
L2
J3
K3
L3

ODT
CS
RAS
CAS
WE

QSB4
QSB7

F3
C7

DQSL
DQSU

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

DQMB#4
DQMB#7

E7
D3

DML
DMU

QSB#4
QSB#7

G3
B7

DQSL
DQSU

DDR3_RST

T2

RESET

L8

ZQ

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

B1
B9
D1
D8
E2
E8
F9
G1
G9

VREFCA
VREFDQ

J1
L1
J9
L9

NC#J1
NC#L1
NC#J9
NC#L9

+1.5V_GDDR

+1.5V_GDDR

R446 1

2 240/F

J1
L1
J9
L9

100-BALL
SDRAM DDR3
K4W1G1646E-HC12

+1.5V_GDDR

+1.5V_GDDR

+1.5V_GDDR

+1.5V_GDDR

+1.5V_GDDR

QSB#[7..0]

R447

R452

R116

R112

QSB[7..0]

4.99K/F

4.99K/F

4.99K/F

4.99K/F

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

MDB33
MDB39
MDB38
MDB36
MDB35
MDB34
MDB37
MDB32

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

MDB63
MDB56
MDB60
MDB58
MDB62
MDB57
MDB61
MDB59

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

B2
D9
G7
K2
K8
N1
N9
R1
R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

A1
A8
C1
C9
D2
E9
F1
H2
H9

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

B1
B9
D1
D8
E2
E8
F9
G1
G9

+1.5V_GDDR

NC#J1
NC#L1
NC#J9
NC#L9

+1.5V_GDDR

100-BALL
SDRAM DDR3
K4W1G1646E-HC12

+1.5V_GDDR

+1.5V_GDDR

+1.5V_GDDR

R90

R55

R415

R436

4.99K/F

4.99K/F

4.99K/F

MAB[13..0]

20 ODTB1

C546

C572

C522

4.99K/F

0.1U
10

C542

0.1U
10

+1.5V_GDDR

C64

C122

C61

C127

C550

C557

C554

C525

C225

R435

C214

4.99K/F

0.1U
10

VREF_B7

C526

C157

R414

C560

C63

C564

4.99K/F

C565

0.1U
10

C570

R54

+1.5V_GDDR

+1.5V_GDDR

C87

VREF_B6

4.99K/F

0.1U
10

4.99K/F

VREF_B5

R86

C202

4.99K/F

0.1U
10

VREF_B4

C573

R108

+1.5V_GDDR

C227

ODTB0_M

C523

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

1U/6.3V

*56_NC

1U/6.3V

R73

1U/6.3V

1U/6.3V

*56_NC

R103

1
0

0
2

R102
2
R72
2

20 ODTB0

+1.5V_GDDR

56

VREF_B3

2 0.01U/16V

4.99K/F

2 0.01U/16V

C62

R53

C226 1

0.1U
10

56

4.99K/F

R117

56

R52

0.1U
10

C571

R115

CLKB1

R453

CLKB0#

56

R118

C561

VREF_B2

4.99K/F
CLKB0

VREF_B1

R448

B_BA[2..0]

20 B_BA[2..0]
C

VREF_B0

DQMB#[7..0]

20 DQMB#[7..0]

20 QSB[7..0]

20 QSB#[7..0]

20 MAB[13..0]

CLKB1#

E3
F7
F2
F8
H3
H8
G2
H7

100-BALL
SDRAM DDR3
K4W1G1646E-HC12

MDB[63..0]

20 MDB[63..0]

U2
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

VREFCA
VREFDQ

20
20
20
20

U3

1U/6.3V

ODTB1_M

10uF_6.3V
CC0603

C524
10uF_6.3V
CC0603

C135

10uF_6.3V
CC0603

C76

10uF_6.3V
CC0603

C558

10uF_6.3V
CC0603

C66

10uF_6.3V
CC0603

C559

10uF_6.3V
CC0603

C574

+1.5V_GDDR

+1.5V_GDDR

!!! M96 : pop 0 ohm :


Park, Madison: pop 56 ohm

C551
10uF_6.3V
CC0603

Title

QUANTA
COMPUTER
M96XT_DDR3_B_512M

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet

22
8

of

61

CN14
R23
R22

HDMI_CLK+_L
HDMI_CLK-_L

1 499/F
1 499/F

2
2

C503
C502

0.1U
0.1U

L39

ATI_HDMI_CLK+ 17
ATI_HDMI_CLK- 17

HDMI_TX2-_L
HDMI_TX2+_L

4
1

3
2

HDMI_TX2HDMI_TX2+

HDMI_TX2+

EXC24CG900U
R26
R27

HDMI_TX2+_L
HDMI_TX2-_L

1 499/F
1 499/F

2
2

C506
C507

0.1U
0.1U

ATI_HDMI_TX2+ 17
ATI_HDMI_TX2- 17

HDMI_TX1HDMI_TX0+

2
2

1 499/F
1 499/F

HDMI_TX1+_L
HDMI_TX1-_L

2
2

1 499/F
1 499/F

HDMI_TX0+_L
HDMI_TX0-_L

C505
C504

0.1U
0.1U

ATI_HDMI_TX1+ 17
ATI_HDMI_TX1- 17

R5

R6

2.2K

2.2K

0.1U
0.1U

HDMI_TX1-_L
HDMI_TX1+_L

ATI_HDMI_TX0+ 17
ATI_HDMI_TX0- 17

1
4

2
3

HDMI_TX1HDMI_TX1+

R7

17 ATI_HDMI_DET

2
1

+5V_RUN

HDMI_TX0HDMI_CLK+
HDMI_CLKHDMI_CEC

T1
T4

HDMI_SCL_L
HDMI_SDA_L

EXC24CG900U

C500
C501

L38
R20
R21

R25
R24

+5V_RUN

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

HDMI_TX2HDMI_TX1+

Q6
2N7002W-7-F

R399

Pop for ATI Graphic

10K

F1 1

+5V_RUN

HDMI_DET

1 0

+VCC_HDMI_+5V

20
22

SHELL1
D2+ GND
D2 Shield
D2D1+
D1 Shield
D1D0+
D0 Shield
D0CK+
CK Shield
CKCE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DETGND
SHELL2

23
21

TYC_2041602-3
HDMI-2041602-3-19P-LDV-H

*POLY SWITCH 1.1A_NC


L36
HDMI_TX0-_L
HDMI_TX0+_L

C490
*0.1U_NC

HDMI_TX0HDMI_TX0+

FDV301N
HDMI_SCL_L

1
4

2
3

AUX_SINK_N

17 AUX_SINK_N

HDMI_CLKHDMI_CLK+

Q10
BSS138_NL

Q13
BSS138_NL

+5V_RUN

+3.3V_RUN

HDMI_SDA_L

AUX_SINK_N_C

Q12
BSS138_NL

C494
1
1
C495

0.1U/10V
2
2
0.1U/10V

DP_LANE2_N_C
DP_LANE2_P_C

R390
1R391
1

0
02
2

R34
*499/F_NC

R30
*499/F_NC

2
C8
0.1U/10V

Q1
2N7002W-7-F
CAD_SINK
2

Temporary DP dongle
support circuit for DP
function test

R16
100K

AUX Intermittent Read Failure :


M8x bug, need 500 ohm to GND;
M9x don't need.

R17
1M

Q2
2N7002W-7-F

Delete EMI ESD IC for EMI asked HDMI signals link to


CONN directly.

R13
100K

DP_LANE3_N_R
DP_LANE3_P_R

AUX_SINK_P_C

0
02
2

R388
1R389
1

DP_LANE3_N_C
DP_LANE3_P_C

Remember to keep 1M
connection when
remove dongle circuit.

17 DP_LANE2_N
17 DP_LANE2_P

3 2

0.1U/10V
2
2
0.1U/10V

C492
1
1
C493

17 DP_LANE3_N
17 DP_LANE3_P

AUX_SINK_P

17 AUX_SINK_P

Scott_0814:Delete 0ohm reserve resistors as confirm with EMI.

Reserve For EMI

FDV301N

Q4

EXC24CG900U
17 ATI_HDMI_SDA

Q9
BSS138_NL

L37
HDMI_CLK-_L
HDMI_CLK+_L

+3.3V_DELAY

Q5

17 ATI_HDMI_SCL

3
2

R32
4.7K

R33
4.7K

4
1

EXC24CG900U

+3.3V_DELAY

2
Q3
*2N7002W-7-F_NC

DP_LANE2_N_R
DP_LANE2_P_R
+3.3V_RUN

DISPLAY PORT CONNECTOR

Scott_0814:Delete reserve choke as confirm with EMI.

DP only, no dongle
support DVI or HDMI
FS1
1206L150-C

DP_LANE1_N_C
DP_LANE1_P_C

R392
1R393
1

0
02
2

DP_LANE1_N_R
DP_LANE1_P_R

CN18
dp-rsd-47644-001-20p-l-h
SHIELD6
SHIELD5

21
23

C489
220P

20

17 ATI_DP_HPD
0.1U/10V
2
2
0.1U/10V

DP_LANE0_N_C
DP_LANE0_P_C

R394
1R395
1

0
02
2

Scott_0703:Delete ESD Clamp U23,U24,U25 as EMI suggestion.

DP_LANE0_N_R
DP_LANE0_P_R

+3.3V_DELAY
+3.3V_DELAY

R4
*100K_NC

R18
100K
AUX_SINK_N_C
AUX_SINK_P_C

R386
1R387
1

0
02
2

DP_HPD_SINK

18

HPD

AUX_SINK_N_R
AUX_SINK_P_R

17
15

AUXN
AUXP

R8
100K

19

AUX_SINK_N_R
AUX_SINK_P_R

DP_LANE3_N_R
DP_LANE3_P_R

12
10

LANE_3N
LANE_3P

DP_LANE2_N_R
DP_LANE2_P_R

9
7

LANE_2N
LANE_2P

DP_LANE1_N_R
DP_LANE1_P_R

6
4

LANE_1N
LANE_1P

DP_LANE0_N_R
DP_LANE0_P_R

3
1

LANE_0N
LANE_0P

20
19

GND

16

GND
MODE

14
13

GND

11

GND

GND

GND

17
16
15

13
12
11

SHIELD3
SHIELD2

22
24

CONFIG2
CAD_SINK

10U/6.3V/0603

T2
T3

10
9
8
7
6
5

4
3
2
1

R19
*100K_NC

C491

18

Title

QUANTA
COMPUTER
HDMI & DP

2
2

C5

0.1U/10V
2
2
0.1U/10V

1
1

10K

1
1

C4

2
2

AUX_SINK_N
AUX_SINK_P

R396

14

1
1

17 DP_LANE0_N
17 DP_LANE0_P

C498
1
1
C499

PWR
PWR_RET

0.1U/10V
2
2
0.1U/10V

17 DP_LANE1_N
17 DP_LANE1_P

C496
1
1
C497

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
1

23

of

61

0.047U/10V

C611

LCD_A0LCD_A1LCD_A2-

C271 1
C270 1
C269 1

2 3.3P/16V
2 3.3P/16V
2 3.3P/16V

LCD_A0+
LCD_A1+
LCD_A2+

R148

0.1U/10V

100K

LCD_B0LCD_B0+

C277
0.1U/50V
0603
50

Q27
FDC658AP

C279
0.1U/50V
CC0603

C278
0.1U/50V
CC0603
D

R149
LCD_ACLK3 2

100K

LCD_A2LCD_A2+

C268
3.3P/16V

18,43,46,47,48,49,54

*0_NC

GFX_PWR_SRC layout note:


40 mil trace for tube type
45 mil for white LED type
65 mil for RGB LED type

Q28
2N7002W-7-F

RUN_ON

+3.3V_RUN

R138

LCD_ACLKLCD_ACLK+

LCD_ACLK+

R468

LCD_A1LCD_A1+

*10K_NC
LCD_BCLKLCD_PWM

*0_NC

C253
3.3P/16V

17
17

R128
ATI_LCD_DDCCLK
ATI_LCD_DDCDAT

LCD_A0LCD_A0+

29 PWM_VADJ

LCD_BCLK+

+3.3V_RUN
+LCDVCC
LCD_TST 29

Adress : A9H --Contrast


AAH --Backlight

+GFX_PWR_SRC

+15V_ALW

+3.3V_RUN

6
5
2
1

LCD_CBL_DET# 29

*47P/50V_NC

R472
47
RC0805

AK27
AJ27

+3.3V_SUS
ENVDD

C612
0.01U/25V

C639
0.01U/25V

LCD_B0+
LCD_B0-

TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N

AH35
AJ36

LCD_B1+
LCD_B1-

TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N

AG38
AH37

LCD_B2+
LCD_B2-

TXOUT_U3P
TXOUT_U3N

AF35
AG36

TXCLK_LP_DPE3P
TXCLK_LN_DPE3N

AP34
AR34

LCD_ACLK+
LCD_ACLK-

TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N

AW37
AU35

LCD_A0+
LCD_A0-

TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N

AR37
AU39

LCD_A1+
LCD_A1-

TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N

AP35
AR35

LCD_A2+
LCD_A2-

TXOUT_L3P
TXOUT_L3N

AN36
AP37

47K

Support the new imbeded


diagnostics.
ENVDD

TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N

Q53
2N7002W-7-F

D19
1

AK35
AL36
AJ38
AK37

Q57
2N7002W-7-F

Scott_0812: Delete DPST function as non-used.

29 LCDVCC_TST_EN

EN_LCDVCC

Q55
DDTC124EUA-7-F

2
1

TXCLK_UP_DPF3P
TXCLK_UN_DPF3N

LCD_BCLK+
LCD_BCLK-

R473

PAD
PAD

22U/10V
CC1206

10K

C617

10K

*100K_NC

VARY_BL
DIGON

R69

LVDS CONTROL

R423

R483
U29G

LCDVCC_ON

*47P/50V_NC

330K

R485
C284

1
C285

29

LCD_PWM

SMBCLK1
SMBDAT1

SMBCLK1 9,20,29
SMBDAT1 9,20,29
INVERTER_CBL_DET#
LCD_BAK# 29

SMBCLK1
SMBDAT1

+LCDVCC
Q56
FDC655BN

+5V_ALW

IPX_20323-050ED41

65 mils

C615

0.1U/10V

1
2

LCD_B1LCD_B1+

C614

LCD_B0+
LCD_B1+
LCD_B2+

2 3.3P/16V
2 3.3P/16V
2 3.3P/16V

C267 1
C266 1
C265 1

6
5
2
1

DS2413_IN 29

LCD_B0LCD_B1LCD_B2-

+GFX_PWR_SRC

65 mils

For new function!

LCD_B2LCD_B2+

51
52
53
54
55
56

+3.3V_RUN

51
52
53
54
55
56

+LCDVCC

+PWR_SRC

Shunt capacitors on LVDS for improving WWAN.

LCD_BCLKLCD_BCLK+

50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

CN3

BAT54C T/R

T9
T8

LVTMDP

PAD
PAD

T7
T74

216-0729051(M96-M2 XT)

Title

QUANTA
COMPUTER
M96XT_LVDS & LCD CONN

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
1

24

of

61

+5V_RUN

D13
SDM10K45-7-F
1

+3.3V_DELAY

17 VGA_RED

17 VGA_GRN

D3
*DA204U_NC

D2
*DA204U_NC

+5V_CRT_REF
RED
PAD

T55

M_SEN#_R
GREEN
CN17
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5

BLUE
1

C3
10P/50V

C2
10P/50V

C1
10P/50V

C9
22P/50V

1
R398
2.7K/F
Q50
BSS138_NL

T54

M_ID2#

R373
2.7K/F

FOX_DZ11A91-SB283-9F
DSUB-DZ11A91-SB283-9F-15P-H
R372
2.7K/F

G_DAT_DDC_C

R370
1

33
2

G_DAT_DDC_R

G_CLK_DDC_C

R369
1

33
2

G_CLK_DDC_R

C481
0.01U/25V
2

2
G_DAT_DDC

17 G_DAT_DDC

1
R397
2.7K/F

PAD
+5V_CRT_REF

4/28: Change to +5V_CRT_REF


to prevent leakage

+3.3V_DELAY

C7
22P/50V

C6
22P/50V

R31
150/F

R29
150/F

R28
150/F
2

D1
*DA204U_NC

17 VGA_BLU

L3
BLM18BB750SN1D
RC0603
1
2
L2
BLM18BB750SN1D
RC0603
1
2
L1
BLM18BB750SN1D
RC0603
1
2

Layout Note:
Setting R,G,B treac
impedance to 50 ohm.

Q49
BSS138_NL

R377 1K
2
1

C487
*22P/50V_NC

G_CLK_DDC

17 G_CLK_DDC

+5V_RUN

+3.3V_DELAY

C482
*22P/50V_NC

U22
4

VGAHSYNC_R

R374
1

33
2

L35 BLM11A05S
1
2
RC0603

HSYNC

74AHCT1G125GW
C484
0.1U/10V
2
1
2

C488
*10P/50V_NC

C486
47P/50V

Place near
U24,U25 <
200 mil

JVGA_HS

VGAHSYNC

17 VGAHSYNC

U21
4

VGAVSYNC_R

L34 BLM11A05S
1
2
RC0603

VSYNC

74AHCT1G125GW

C485
*10P/50V_NC

C483
47P/50V

VGAHSYNC
VGAVSYNC

Place near JVGA1 connector <


200 mil

D16
*DA204U_NC

D15
*DA204U_NC

+3.3V_DELAY

D14
*DA204U_NC

2
3

+5V_RUN

JVGA_VS

33
2

VGAVSYNC

17 VGAVSYNC

R371
1

D17
*DA204U_NC
G_DAT_DDC
G_CLK_DDC

Title

QUANTA
COMPUTER
CRT CONN

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
E

25

of

61

Place close U23

0.1U/10V

RXC
CPO

9
16
22
24

PERSTN
RXC
CPO
RREF

AVCC_3V

1
1
2

C796

0
2

10uF_6.3V
CC0603

C801
0.1U/10V

+3.3V_R5U230

2
+3.3V_RUN_CARD

R630
5.1K/F

C798
1500P

0.1U/10V

+3.3V_R5U230
R634
1

MF_VOUT

36

GND0
AGND0

49
21

C806
0.1U/10V

C805

MFIO SD8 MS8


WP BS
00
01
D1 D0 D1
02
D7 03
D6 D5
04
05 CLK D0
06
07
D5 D4
08 CMD D2
09
D4 D6
10
D3 D3
D2 11
12
- D7
13
- CLK
14

XD
D7
D6
D5
D4
D3
D2
D1
D0
WP#
WE#
ALE
CLE
CE#
RE#
R/B#

1U/6.3V

R637
56.2/F

R5U230

10

R638
56.2/F

3
6
7
8

R635
56.2/F

TPBN0
TPBP0
TPAN0
TPAP0
TPBIAS0

1
R636
56.2/F

45
46
47
48
1

UDIO0
UDIO1
UDIO2
UDIO3

TPB0N
TPB0P
TPA0N
TPA0P
TPBIAS0

TPB0N
TPB0P
TPA0N
TPA0P

27
27
27
27

TEST

C795
0.022U

C802

0.1U/10V

RREF

RXP
RXN

C810

PLTRST#

15
17

0.1U/10V

3,9,16,28,29,31,32,41,56

TXP
TXN

C797

9 PCIE_TX5+
9 PCIE_TX5-

REFCLKP
REFCLKN

19
20

MS_CLK/XD_R/B# 27

C808
*22P/50V_NC

+3.3V_RUN

TXP
TXN

0.1U/10V

PCIE_VIN_VOUT

9 PCIE_RX5+
9 PCIE_RX5-

20.1U/10V
20.1U/10V

C803

18
23

C807

2
PCIE_VIN1
PCIE_VIN0

2
12
42

C800 1
C799 1

4
5
PCIE_VOUT1
PCIE_VOUT0

13
14

9 CLK_PCIE_CARD_READER
9 CLK_PCIE_CARD_READER#

SD_CLK/MS_DAT0/XD_DATA2 27

11
37

Y6
24.576MHZ
30PPM
16p

27P 50NPO

MFIO Pin Assignment Table


VCC_3V1
VCC_3V0

C812

XI
XO

22P/50V

44
43

+3.3V_R5U230

1394_XI
1394_XO

MFCD0N
MFCD1N

4/30: Change C812 to 27pF


Change C813 to 22pF

25
26
27
28
29
30
31
32
33
34
35
38
39
40
41
MFIO00
MFIO01
MFIO02
MFIO03
MFIO04
MFIO05
MFIO06
MFIO07
MFIO08
MFIO09
MFIO10
MFIO11
MFIO12
MFIO13
MFIO14

U51

C813

C804
*22P/50V_NC

R639
1

MS_CLK/XD_R/B#_R

SD_CD#/XD_CD0# 27
MS_INS#/XD_CD1# 27

Close to RU230
Shield GND Required

R633
1

SD_CLK/MS_DAT0/XD_DATA2_R
1

XD_DATA1 27
SD_DATA5/MS_DATA4/XD_DATA0 27
SD_CMD/MS_DATA2/XD_WP# 27
SD_DATA4/MS_DATA6/XD_WE# 27
SD_DATA3/MS_DATA3/XD_ALE 27
SD_DATA2/XD_CLE 27
XD_CE# 27
MS_DATA7/XD_RE# 27

SD_WP#/MS_BS/XD_DATA7 27
SD_DATA1/XD_DATA6 27
SD_DATA0/MS_DATA1/XD_DATA5 27
SD_DATA7/XD_DATA4 27
SDATA_6/MS_DATA5/XD_DATA3 27

2
1

2
C811
270P/50V

C809
0.33U/16V
CC0603

C859
*100P_NC

50
NPO

R640
5.11K/F

9 CLK_PCIE_REQ5#

5/13: Reseved 100P


cap for EMI concern!
+3.3V_R5U230

1
R631

2
47K

5/18: Added 10K pull-up to avoid floating signal


when powering up cardreader IC
+3.3V_RUN

CLK_PCIE_REQ5#

R684

10K

Title

QUANTA
COMPUTER
CardReader (5C833)

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
E

26

of

61

1. TPA0P/TPA0N,TPB0P/TPB0N pair trace :


Same length electrically.
2. TPA0P/TPA0N,TPB0P/TPB0N pair trace : As
close as possible.
3. Termination resistor for TPA+/- TPB+/- : As
close as possible to its cable driver (device pin
out).

Reserved EMI Solution

26

TPB0P

26

TPA0N

26

TPB0P

L33
4
1

OLTPBOLTPB+

3
2

CN13
1
2
3
4
5
6

*DLW21SN900SQ2B_NC

TPA0N
TPA0P

TPA0P

L32
4
1

OLTPAOLTPA+

3
2

7
8

TYC_2041054-6
06FFS-SP-TF-6P-L

*DLW21SN900SQ2B_NC

TPB0N
TPB0P
TPA0N
TPA0P

0
0
0
0

OLTPBOLTPB+
OLTPAOLTPA+

+3.3V_RUN_CARD

TAI-SOL_144-2400002900
C841
8IN1-144-2400002900-45P-R-H
*270P/25V_NC

SD_CMD/MS_DATA2/XD_WP#

24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45

MS_INS#/XD_CD1#
SD_DATA3/MS_DATA3/XD_ALE
SD_DATA5/MS_DATA4/XD_DATA0
MS_CLK/XD_R/B#
SD_CMD/MS_DATA2/XD_WP#
SD_DATA4/MS_DATA6/XD_WE#
SD_DATA3/MS_DATA3/XD_ALE
SD_CMD/MS_DATA2/XD_WP#
SD_DATA2/XD_CLE
SD_DATA4/MS_DATA6/XD_WE#
SD_DATA3/MS_DATA3/XD_ALE
SD_DATA2/XD_CLE
XD_CE#
MS_DATA7/XD_RE#
MS_CLK/XD_R/B#
XD_CD#

C844
270P/25V

MS-5(DATA2)
XD-9(GND)
MS-6(INS)
SD-3(VSS1)
MS-7(DATA3)
MMC-(D5)
MS-8(SCLK)
SD-2(CMD)
MS-9(VCC)
MMC-(D4)
MS-10(VSS)
SD-1(DAT3)
XD-8(-WP)
SD-9(DAT2)
XD-7(WE)
XD-6(ALE)
XD-5(CLE)
XD-4(CE)
XD-3(RE)
XD-2(R/-B)
XD-1(CD)
XD-0(GND)

1
2

SD(CD2/WP2/GND)
SD(CD1)
SD(WP1)
XD-18(VCC)
XD-17(D7)
XD-16(D6)
XD-15(D5)
XD-14(D4)
SD-8(DAT1)
XD-13(D3)
SD-7(DAT0)
XD-12(D2)
MMC-(D7)
XD-11(D1)
SD-6(GND/VSS2)
MS-1(VSS)
MMC-(D6)
MS-2(BS)
SD-5(CLK)
MS-3(VCC/DATA1)
XD-10(D0)
MS-4(SDIO/DATA0)
SD-4(VCC/VDD)

1
2

C847
*27P/50V_NC

C840
*270P/25V_NC

2
1
2

C837
*1P/50V_NC

1
C836
*1P/50V_NC

SDATA_6/MS_DATA5/XD_DATA3
SD_WP#/MS_BS/XD_DATA7
SD_CLK/MS_DAT0/XD_DATA2
SD_DATA0/MS_DATA1/XD_DATA5
SD_DATA5/MS_DATA4/XD_DATA0
SD_CLK/MS_DAT0/XD_DATA2

R657
*22_NC

R655
*22_NC

2
2
2
2

CON1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23

SD_WP#/MS_BS/XD_DATA7
SD_DATA1/XD_DATA6
SD_DATA0/MS_DATA1/XD_DATA5
SD_DATA7/XD_DATA4
SD_DATA1/XD_DATA6
SDATA_6/MS_DATA5/XD_DATA3
SD_DATA0/MS_DATA1/XD_DATA5
SD_CLK/MS_DAT0/XD_DATA2
SD_DATA7/XD_DATA4
XD_DATA1

SD_CLK/MS_DAT0/XD_DATA2

1
1
1
1

C838
2.2U/6.3V
CC0603

SD_CD#/XD_CD0#
SD_WP#/MS_BS/XD_DATA7

MS_CLK/XD_R/B#

+3.3V_RUN_CARD

2.2uF cap is no more than


250mils away from the power
pin and a have a min trace
width of 40mils.

SD_WP#/MS_BS/XD_DATA7
SD_DATA1/XD_DATA6
SD_DATA0/MS_DATA1/XD_DATA5
SD_DATA7/XD_DATA4
SDATA_6/MS_DATA5/XD_DATA3
SD_CLK/MS_DAT0/XD_DATA2
XD_DATA1
SD_DATA5/MS_DATA4/XD_DATA0
SD_CMD/MS_DATA2/XD_WP#
SD_DATA4/MS_DATA6/XD_WE#
SD_DATA3/MS_DATA3/XD_ALE
SD_DATA2/XD_CLE
XD_CE#
MS_DATA7/XD_RE#
MS_CLK/XD_R/B#
SD_CD#/XD_CD0#
MS_INS#/XD_CD1#

SD_WP#/MS_BS/XD_DATA7
SD_DATA1/XD_DATA6
SD_DATA0/MS_DATA1/XD_DATA5
SD_DATA7/XD_DATA4
SDATA_6/MS_DATA5/XD_DATA3
SD_CLK/MS_DAT0/XD_DATA2
XD_DATA1
SD_DATA5/MS_DATA4/XD_DATA0
SD_CMD/MS_DATA2/XD_WP#
SD_DATA4/MS_DATA6/XD_WE#
SD_DATA3/MS_DATA3/XD_ALE
SD_DATA2/XD_CLE
XD_CE#
MS_DATA7/XD_RE#
MS_CLK/XD_R/B#
SD_CD#/XD_CD0#
MS_INS#/XD_CD1#

26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26

R368
R367
R366
R365

TPB0N

C843
*27P/50V_NC

C845
*27P/50V_NC

26

TPB0N

Close to the Chip


+3.3V_R5U230

XD_CD#

1
C846
0.01U/25V

C839
0.01U/25V

C842
0.01U/25V

1SS355
D26
MS_INS#/XD_CD1# 2

R656
150K

SD_CD#/XD_CD0# 2

The trace width for


+3.3V_RUN_CARD
should be 40MIL at
least.

D27

1
2

Close Pin4 of
CardReader Conn

+3.3V_RUN_CARD
R632
*10K_NC

1
1SS355

Title

QUANTA
COMPUTER
8 IN 1 & 1394 CONN

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
E

27

of

61

Express Card
A

+1.5V_CARD Max. 650mA, Average 500mA.


+3V_CARD Max. 1300mA, Average 1000mA.
A

CN12

9,13,14,31,32,34
9,13,14,31,32,34

MEM_SCLK
MEM_SDATA

+1.5V_CARD
7,41 PCIE_WAKE#
+3.3V_CARDAUX

CARD_RESET#

+3.3V_CARD
CARD_CLK_REQ#_R
EXPRCRD_PWREN#
9 CLK_PCIE_EXPCARD#
9 CLK_PCIE_EXPCARD
9 PCIE_RX49 PCIE_RX4+
9 PCIE_TX49 PCIE_TX4+

GND_1
USBUSB+
CPUSB#
RSV_0
RSV_1
SMBCLK
SMBDATA
+1.5V_0
+1.5V_1
WAKE#
+3.3VAUX
PERST#
+3.3V_1
+3.3V_2
CLKREQ#
CPPE#
REFCLKREFCLK+
GND_2
PERn0
PERp0
GND_3
PETn0
PETp0
GND_4

+1.5V_RUN

+3.3V_RUN

+3.3V_SUS

+3.3V_SUS

U53
17
2
4
12
14

AUXIN
3.3VIN_0
3.3VIN_1
1.5VIN_0
1.5VIN_1

20
1
6

SHDN#
STBY#
SYSRST#

16
7

NC
GND0

R654 100K
2
1

T109 PAD
3,9,16,26,29,31,32,41,56

PLTRST#

+3.3V_CARDAUX

AUXOUT
3.3VOUT_0
3.3VOUT_1
1.5VOUT_0
1.5VOUT_1

+3.3V_CARD

+1.5V_CARD

15
3
5
11
13
+3.3V_SUS

ExpressSwitch
PERST#
CPPE#
CPUSB#
OC#

8
10
9
19

CARD_RESET#
EXPRCRD_PWREN#
CPUSB#

RCLKEN

18

RCLKEN

R647 2
R648 2

1 100K
1 100K

4/27: Del R652

R5538D001-TR-F

NC1
NC2
NC3
NC4

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

USB10_DUSB10_D+
CPUSB#

+3.3V_RUN

R649
100K

2N7002W-7-F
Q71

FOX_1CH4110C-PL
expcard-1cx41101-pl-26p-l-smt

27
28
29
30

CARD_CLK_REQ#
B

CARD_CLK_REQ#_R

+3.3V_SUS
1

C826
0.1U/10V

C834
0.1U/10V

+3.3V_RUN
1

USB10_D+
USB10_D-

+1.5V_RUN

9 PCH_USBP10+
9 PCH_USBP10-

0
02
2

PCI-Express TX and RX direct to connector.


R364
1R363
1

Scott_0813:Change CN12 F/P to expcard-1cx41101-pl-26p-l-smt as ME modify.

C828
0.1U/10V

Please the cap near connector.

C820
0.1U/10V

C819
0.1U/10V

C825
0.1U/10V

+3.3V_CARD

+1.5V_CARD

C835
0.1U/10V

C827
0.1U/10V

C823
0.1U/10V

C824
0.1U/10V

1
2

1
2

C822
10U/6.3V
CC0603

Please the cap


near pin 17
(AUXIN).

+3.3V_CARDAUX

Please the cap


near pin 2 & 4
(3.3VIN).

+1.5V_CARD

+3.3V_CARD

Please the cap


near pin 12 &
14(1.5VIN).

Scott_0814:Delete L31 as confirm with EMI.

Please the cap


near pin 15
(AUXOUT).

Please the cap near connector.

Please the cap


near pin 3 & 5
(3.3VOUT).

Please the cap


near pin 11 &
13(1.5VOUT).

QUANTA
COMPUTER

Title

EXPRESS CARD

Size

Document Number
RM5

Date:

Thursday, August 20, 2009


7

Rev
3A
Sheet

28

of
8

61

7
8
10
10
10

CLK_PCI_8512

CLKRUN#
IRQ_SERIRQ
SIO_EXT_SMI#
SIO_EXT_SCI#
SIO_A20GATE
24 LCD_TST

D23
D24
D21

2
2
2

D22

22
13
6
10
9
8
7

93
IRQ_SERIRQ
5
1 SDMK0340L-7-F 15
1 SDMK0340L-7-F 23
1 SDMK0340L-7-F 126
17

24 LCD_BAK#

1 SDMK0340L-7-F 4
WRST#
14
LCD_BAK#
16

39 NB_MUTE#
8,38 ICH_AZ_CODEC_RST#

19
20

10 SIO_RCIN#

CHARGE, BAT,CLK & THERMAL


PCH & LCD & VGA THERMAL

37,45,55 SMBCLK0
37,45,55 SMBDAT0
9,20,24 SMBCLK1
9,20,24 SMBDAT1
35 SMBCLK2
35 SMBDAT2

PWM0/GPA0
PWM1/GPA1
PWM2/GPA2
PWM3/GPA3
PWM4/GPA4
PWM5/GPA5
PWM6/GPA6
PWM7/GPA7

24
25
28
29
30
31
32
34

TACH0/GPD6
TACH1/GPD7

KSI7
KSI6
KSI5
KSI4
KSI3/SLIN
KSI2/INT
KSI1/AFD
KSI0/STB
LPCRST/WUI4/GPD2
LPCCLK
LFRAME
LAD0
LAD1
LAD2
LAD3
CLKRUN/GPH0/ID0
SERIRQ
ECSMI/GPD4
ECSCI/GPD3
GA20/GPB5
LPCPD/WUI6/GPE6

110
111

SMCLK0/GPB3
SMDAT0/GPB4

SMBCLK1
SMBDAT1

115
116

SMCLK1/GPC1
SMDAT1/GPC2

SMBCLK2
SMBDAT2

117
118

SMCLK2/GPF6
SMDAT2/GPF7

85
86

PS2CLK0/GPF0
PS2DAT0/GPF1

87
88

PS2CLK1/GPF2
PS2DAT1/GPF3

89
90

PS2CLK2/GPF4
PS2DAT2/GPF5

2
SDMK0340L-7-F

BREATH_LED#
BREATH_PWLED#

*100K_NC
1

USB_CHG_DET#

R510 2

1 100K

BREATH_PWLED#

R569 1

2 100K

BREATH_LED#

R553 1

2 100K

BAT_LED#

R554 1

2 100K

USB_SIN_SIDE_EN#

R341 1

2 100K

AC_PRESENT

R535 2

1 10K

SUS_PWR_ACK

R515 2

1 10K

R551 2

1*10K_NC

IRQ_SERIRQ

R567 2

110K

LCD_CBL_DET#

R514 2

1 100K

47
48

FAN1_TACH 37
PANEL_BKEN 17

INVERTER_CBL_DET#

R513 2

1 100K

TMRI0/WUI2/GPC4
TMRI1/WUI3/GPC6

120
124

LID_SW# 35,36
SIO_SLP_S3# 7

IMVP_VR_ON

R509 2

1 *100K_NC

SUS_ON

R524 2

1 100K

RXD/GPB0
TXD/GPB1
CRX0/GPC0
CTX0/GPB2
CRX1/GPH1/ID1
CTX1/GPH2/ID2

108
109
119
123
94
95

HWPG

R661 2

1 100K

FLFRAME/GPG2/LF
FLRST/GPG0/TM
FLAD3/GPG6

100
106
104

FLAD2/SO
FLAD1/SI
FLAD0/SCE
FLCLK

103
102
101
105

LPC

IR/UART

BAT_LED#

+3.3V_RUN

DS2413_IN 24
SKTOCC# 3
CIRRX 30
RUN_ON_1 43
HDDC_EN 34
IMVP_VR_ON 50

IMVP_VR_ON

6/23: Pull SKTOCC# from CPU


to EC according to EC request

Board ID Straps
SMBUS

LPC/FWH
FLASH

SUS_ON

+3.3V_ALW

SUS_ON 47,54
KB_DET# 35
CAP_LED# 35

Clarksfield

EC_FLASH_SPI_DO 30
EC_FLASH_SPI_DIN 30
EC_FLASH_SPI_CS# 30
EC_FLASH_SPI_CLK 30

R507
10K

35 CLK_TP_SIO
35 DAT_TP_SIO

ITE8512_XTAL1

128

ITE8512_XTAL2

R550
10

+3.3V_ALW
L66

50

BLM18AG121SN1D
603

L65

32KHz Clock.
ITE8512_XTAL2

74
75

C702
2.2P

ITE8512IX_JX

1
12
27
49
91
113
122

96
97
98
99
107

USB_L_SIDE_EN#
BID0
BID1
BID2

18
21
35

USB_SIN_SIDE_EN#

PCH_PWRGD 7
5V_ALW_ON 51
GFX_ON 20,52,53

CK32K

USB_L_SIDE_EN#

R508
*10K_NC

33

R516
10K
BID0
BID1
BID2
USB_L_SIDE_EN#

RI1/WUI0/GPD0
RI2/WUI1/GPD1
WUI5/GPE5
RING/PWRFAIL/LPCRST/GPB7

112

PWRSW/GPE4

125

AVCC
AVSS

GINT/GPD5

C682
0.1U
10

R519
*10K_NC

R517
*10K_NC

Arrandale
CPU_IDENTIFY (USB_L_SIDE_EN#)
1 = Clarksfield. ; 0 = Arrandale.
USB_SIN_SIDE_EN#
ACAV_IN 45
MMB_ISSP 35

33

AC_PRESENT 7
MAIN_PWR_SW# 35

33

LCDVCC_TST_EN 24

IT8512E/KX-L
LQFP128-16X16-4-FX2

603
BLM18AG121SN1D

R520
10K

MODC_EN 34

CK32KE
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7

R518
10K

GPH3/ID3
GPH4/ID4
GPH5/ID5
GPH6/ID6
GPG1/ID7

GPIO
CLK_PCI_8512

PCH_PWRGD

EGPC
PS/2

82
83
84

R523
*10K_NC

55
PS_ID
35 MEDIA_INT#

EGAD/GPE1
EGCS/GPE2
EGCLK/GPE3

USB_CHG_DET#

+3.3V_SUS

36 LED_MASK#
33 USB_CHG_DET#

2 RP4
4 *10KX2_NC
R512 2

LCD_BAK#

L80HLAT/GPE0
L80LLAT/WUI7/GPE7

SMBCLK0
SMBDAT0

1
D20

CRIT_TEMP_REP# 10
SIO_EXT_WAKE# 10
LAN_DISABLE 41
AUDIO_AVDD_ON 39
PCH_RSMRST# 7
SIO_PWRBTN# 7

Scott_0821:Delete
SKTOCC# PH as SKTOCC#
has been tie to GND on
processor package

1
3

SIO_SLP_S5#

BREATH_LED# 36
BREATH_PWLED# 36
FAN1_PWM 37
PWM_VADJ 24
BAT_LED# 36
KB_BACKLITE_EN 35
USBP0_BUS_SW_CB 33
BEEP 38

PWM

KBRST/GPB6
WRST
PWUREQ/GPC7

SIO_SLP_S5#

SMBDAT2
SMBCLK2

MMB ONLY!!

76
77
78
79
80
81

LCD_CBL_DET#
INVERTER_CBL_DET#

HWPG 43
IMVP6_PROCHOT# 50
SUS_PWR_ACK 7
LCD_CBL_DET# 24
INVERTER_CBL_DET# 24
PBAT_PRES# 55
IINP 45
SIO_SLP_S5# 7

2 RP3
4 10KX2

3,9,16,26,28,31,32,41,56 PLTRST#
9 CLK_PCI_8512
8,32 LPC_LFRAME#
8,32 LPC_LAD0
8,32 LPC_LAD1
8,32 LPC_LAD2
8,32 LPC_LAD3

65
64
63
62
61
60
59
58

DAC0/GPJ0
DAC1/GPJ1
DAC2/GPJ2
DAC3/GPJ3
DAC4/GPJ4
DAC5/GPJ5

ADC/DAC

HWPG

1
3

KSI7
KSI6
KSI5
KSI4
KSI3
KSI2
KSI1
KSI0

KEYBOARD

NC RP22 with new MMB


firmware V35 which have
internal PU(5.6K) at MMB IC

10

SMBDAT1
SMBCLK1

603

66
67
68
69
70
71
72
73

C694
0.1U

Place these caps close to ITE8512.

ADC0/GPI0
ADC1/GPI1
ADC2/GPI2
ADC3/GPI3
ADC4/GPI4
ADC5/GPI5
ADC6/GPI6
ADC7/GPI7

+3.3V_ALW

2 RP2
4 2.2KX2

10

+3.3V_RUN

26
50
92
114
121
127

1
3

C690
0.1U

VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5
VSTBY6

+3.3V_ALW
SMBDAT0
SMBCLK0

10

10

C689
0.1U

ITE8512E
LQFP-128L

3
11

10

C681
0.1U

C688
0.1U

KSO17/GPC5
KSO16/GPC3
KSO15
KSO14
KSO13
KSO12/SLCT
KSO11/ERR
KSO10/PE
KSO9/BUSY
KSO8/ACK
KSO7/PD7
KSO6/PD6
KSO5/PD5
KSO4/PD4
KSO3/PD3
KSO2/PD2
KSO1/PD1
KSO0/PD0

VBAT1
VCC

6.3

2
C695
10U

57
56
55
54
53
52
51
46
45
44
43
42
41
40
39
38
37
36

+RTC_CELL

KSO16
KSO15
KSO14
KSO13
KSO12
KSO11
KSO10
KSO9
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSO2
KSO1
KSO0

+3.3V_ALW

35 KSO[0..16]
35 KSI[0..7]

50 IMVP_PWRGD

U40

BID2

BID1

BID0

SSI(X00)

PT(X01)

ST(X02)

QT(X03)

RM5

+3.3V_ALW

Y4

C691
18P
50

D28
1

37,51 THERM_STP#

WRST#

SDMK0340L-7-F

ITE8512IX Populate R735 0 ohms.


ITE8512JX Populate R735 to 0.1uF, & De-pop Cap 1uF.

R643
100K

C693
0.1U
10

C692 32.768KHZ
18P
50

4 ITE8512_XTAL1

ITE8512IX_JX

Title
C821
1U

QUANTA
COMPUTER
SIO (ITE8512)

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
1

29

of

61

EC SPI ROM, 8Mbit (1M Byte) 5/12: Change U37 from 2MB to 1MB

RTC BATTERY

according to BIOS request!

+3.3V_ALW

+RTC_CELL

U19

1
1
6
5
2

CE#
SCK
SI
SO

HOLD#

WP#

VSS

2
2

1
2 +RTC_1 1
D11
R340
SDMK0340L-7-F

+RTC

1
2

+3.3V_ALW

R660
10K

2
CE#
SCK
SI
SO

HOLD#

WP#

VSS

C848
4.7U/10V
CC0805

C849
0.1U/10V
CC0402

4
3
2
1

IRTX
VCC
GND1
GND2
IR-TSOP36136TR-4P

VDD

1
6
5
2

CIRRX

R492
10K

U36

2
1K

U20
29

MX25L3205DM2I-12G

C654
0.1U/10V

C655
22P/50V

C477
*1U/25V_NC
CC0805

SPI_CS0#
SPI_CLK
SPI_SI
SPI_SO

+3.3V_RUN

R487
10K
15
15
15
15

SHDN

+3.3V_ALW

R658
100

2
2
2
2

GND

*MAX1615EUK-T+_NC

Consumer IR

+3.3V_RUN

1
1
1
1

MLX_53398-0271
53261-0210-2P-L

R486
R497
R498
R488

IN

C469
1U/10V
CC0603

according to BIOS request!

PCH_SPI_CS0#
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_SO

OUT
5/3#

BT1
C670
0.1U/10V

PCH SPI ROM, (4M Byte) 5/12: Change U36 from 2MB to 4MB

8
8
8
8

MX25L8005M2C-15G

C675
22P/50V

C472
2.2U/6.3V
CC0603

VDD

2 15
2 15
2 15

R503 1
R505 1
R504 1

R502
10K

U37

2
EC_FLASH_SPI_CS#
EC_FLASH_SPI_CLK
EC_FLASH_SPI_DIN
EC_FLASH_SPI_DO

3
4

1
2
D12
SDMK0340L-7-F
R506
10K

29
29
29
29

+PWR_SRC

+3.3V_ALW

+3.3V_ALW

Title

QUANTA
COMPUTER
FLASH/ RTC/ CIR

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
1

30

of

61

Mini Card Nut


H21
Mini Card Align (h6.6)

Reserved PAD for EMI

MiniCard WLAN Connector

L70

USB4_DUSB4_D+

1
4

2
3

PCH_USBP4- 9
PCH_USBP4+ 9

*DLW21SN900SQ2B_NC
+3.3V_RUN

+3.3V_RUN

5/15: Change WAKE# to NC as it is


not required
MINI1CLK_REQ#

CN24
1
3
5
7
9
11
13
15

MINI1CLK_REQ#

9 CLK_PCIE_MINI1#
9 CLK_PCIE_MINI1

1
2

32 COEX2_WLAN_ACTIVE
32 COEX1_BT_ACTIVE_MINI
9 MINI1CLK_REQ#

C698
220P/50V

+1.5V_RUN

WAKE#
RESERVED_1
RESERVED_2
CLKREQ#
GND1
REFCLKREFCLK+
GND2

3.3V_1
GND0
1.5V_1
UIM_PWR
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP

2
4
6
8
10
12
14
16

1
R708

1
R709

2
2

PLTRST# 3,9,16,26,28,29,32,41,56

PCI-Express TX and RX
direct to connector

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

9 PCIE_RX29 PCIE_RX2+

9 PCIE_TX29 PCIE_TX2+
10 PCIE_MCARD1_DET#

UIM_C8
UIM_C4
GND4
PERn0
PERp0
GND6
GND7
PETn0
PETp0
GND9
RESERVED_3
RESERVED_4
RESERVED_5
RESERVED_6
RESERVED_7
RESERVED_8
RESERVED_9
RESERVED_10

GND3
W_DISABLE#
PERST#
3.3VAUX1
GND5
1.5V_2
SMB_CLK
SMB_DATA
GND8
USB_DUSB_D+
GND10
LED_WWAN#
LED_WLAN#
LED_WPAN#
1.5V_3
GND11
3.3V_2

C853
100P

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

50
NPO

WLAN_RADIO_OFF#

+3.3V_RUN

MEM_SCLK 9,13,14,28,32,34
MEM_SDATA 9,13,14,28,32,34
USB4_DUSB4_D+
USB_MCARD1_DET# 9
PAD T106
LED_WLAN_OUT# 36
PAD T105

5/03: Added 100p to PLTRST# and


PCIE_WAKE# according to EMI request

1759513-1
MIPCIEXP-1775838-1-52P

Suport for WoW


WLAN_RADIO_OFF#

D25
SDMK0340L-7-F
2
1

R612
*0_NC
1

WLAN_RADIO_DIS#

10

Prevent backdrive when


WoW is enabled.

Place caps close to connector.

1
C434
0.047U/10V

+1.5V_RUN

C779
0.047U/10V

+3.3V_RUN

2
C457
0.047U/10V

1
C456
0.1U/10V

1
C767
0.047U/10V

C460
0.1U/10V

C449
4.7U/10V
CC0805

QUANTA
COMPUTER

Title

MINI-CARD (WLAN)

Size

Document Number
RM5

Date:

Thursday, August 20, 2009


7

Rev
3A
Sheet

31

of
8

61

H23
Mini Card Align (h3.2)

L71
USB8_DUSB8_D+

1
4

2
3

PCH_USBP8- 9
PCH_USBP8+ 9

*DLW21SN900SQ2B_NC
1

Scott_0123:Change CN31 PN
with DFHS52FR015(FOX).

Reserve For EMI


H15
*Mini Card Nut (h3.2)_NC

MiniCard WWAN Connector

5/15: Change WAKE# to NC as it is


not required
A

Mini Card Nut

5/08: Swap WWAN and WPAN according


to antenna team's suggestion

5/13: Pull up WAKE# to 3.3V_RUN


so as to avoid leakage

R710 1

2 0

R711 1
2 0
Layout Note:
R240 and R244 close to choke as possible to minimize stubs.

+1.5V_RUN

+3.3V_RUN
+3.3V_RUN

PCI-Express TX and RX
direct to connector
B

MEM_SCLK 9,13,14,28,31,34
MEM_SDATA 9,13,14,28,31,34

USB8_DUSB8_D+

C817
33P/50V

C833
0.047U/10V

MEM_SCLK
MEM_SDATA

+3.3V_RUN

C818
33P/50V

C829
0.047U/10V

10 PCIE_MCARD3_DET#

10

+3.3V_RUN

9 PCIE_TX39 PCIE_TX3+

WWAN_RADIO_DIS#

PLTRST#

9 PCIE_RX39 PCIE_RX3+

C814
33P/50V

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

C816
0.047U/10V

GND3
W_DISABLE#
PERST#
3.3VAUX1
GND5
1.5V_2
SMB_CLK
SMB_DATA
GND8
USB_DUSB_D+
GND10
LED_WWAN#
LED_WLAN#
LED_WPAN#
1.5V_3
GND11
3.3V_2

Place caps close to connector.

+1.5V_RUN
UIM_PWR
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP

UIM_C8
UIM_C4
GND4
PERn0
PERp0
GND6
GND7
PETn0
PETp0
GND9
RESERVED_3
RESERVED_4
RESERVED_5
RESERVED_6
RESERVED_7
RESERVED_8
RESERVED_9
RESERVED_10

2
4
6
8
10
12
14
16

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

3.3V_1
GND0
1.5V_1
UIM_PWR
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP

WAKE#
RESERVED_1
RESERVED_2
CLKREQ#
GND1
REFCLKREFCLK+
GND2

9 CLK_PCIE_MINI3#
9 CLK_PCIE_MINI3

1
3
5
7
9
11
13
15

9 MINI3CLK_REQ#

T107 PAD
T108 PAD

MINI3CLK_REQ#

CN29

C832
330U/6.3V
CC7343

USB_MCARD3_DET# 9
LED_WWAN_OUT# 36
B

FOX_AS0B226-S56N-7F
MIPCIEXP-1775838-1-52P

5/13: Change SIM card connector to Lotes


layout note:10 mil trace and 20 mil space for SIM card and UIM_PWR use 20mil

CN23

VPP

UIM_VPP

UIM_CLK

CLK

DATA

UIM_DATA

Case_GND Case_GND

220P/50V

1
2
3
1

UIM_RESET
C438
33P/50V

Lotes_YCA-MSD-004-K01

L72

1
2
3

6
5
4

6
5
4

RCLAMP0504S.TCT
C439
33P/50V

USB5_DUSB5_D+

C433
33P/50V

1
4

C440
33P/50V

2
3

PCH_USBP5- 9
PCH_USBP5+ 9

*DLW21SN900SQ2B_NC

RST

UIM_PWR

UIM_VPP
UIM_PWR
UIM_DATA
1

UIM_RESET

UIM_CLK

GND

VCC

C830

Reserve For EMI

ESD1

UIM_PWR

MINI3CLK_REQ#

C442
1U/10V
CC0603

R712 1

2 0

R713 1
2 0
Layout Note:
R240 and R244 close to choke as possible to minimize stubs.

Place as close as possible to JMINI connector


+1.5V_RUN

Place caps close to connector.

9 PCIE_TX19 PCIE_TX1+
10 PCIE_MCARD2_DET#

COEX2_WLAN_ACTIVE

C476
220P/50V

C831
*33P/50V_NC

R653
*100K_NC

1
2

2
1
WPAN_RADIO_DIS_MINI#

10

C776
0.1U/10V

C778
0.047U/10V

+
C815
4.7U/6.3V
CC0603

MEM_SCLK
MEM_SDATA

50
NPO

C855
100P

C794
*330U/6.3V_NC
CC7343

USB5_DUSB5_D+
D

USB_MCARD2_DET# 10

QUANTA
COMPUTER

LED_WPAN_OUT# 36

5/03: Added 100p to PLTRST# and


PCIE_WAKE# according to EMI request
Title

C462
0.047U/10V

PLTRST#
+3.3V_RUN

C464
0.1U/10V

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

GND3
W_DISABLE#
PERST#
3.3VAUX1
GND5
1.5V_2
SMB_CLK
SMB_DATA
GND8
USB_DUSB_D+
GND10
LED_WWAN#
LED_WLAN#
LED_WPAN#
1.5V_3
GND11
3.3V_2

LPC_LFRAME# 8,29
LPC_LAD3 8,29
LPC_LAD2 8,29
LPC_LAD1 8,29
LPC_LAD0 8,29

MINI-CARD (WPAN,WWAN)

FOX_AS0B226-S56N-7F
MIPCIEXP-1775838-1-52P

1
1

+3.3V_RUN

MINI2CLK_REQ#

UIM_C8
UIM_C4
GND4
PERn0
PERp0
GND6
GND7
PETn0
PETp0
GND9
RESERVED_3
RESERVED_4
RESERVED_5
RESERVED_6
RESERVED_7
RESERVED_8
RESERVED_9
RESERVED_10

2
4
6
8
10
12
14
16

9 PCIE_RX19 PCIE_RX1+

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

3.3V_1
GND0
1.5V_1
UIM_PWR
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP

2 0
2 0

WAKE#
RESERVED_1
RESERVED_2
CLKREQ#
GND1
REFCLKREFCLK+
GND2

C463
0.047U/10V

+1.5V_RUN

MINI2CLK_REQ#

1
3
5
7
9
11
13
15

C777
0.047U/10V

COEX2_WLAN_ACTIVE

R650 1
R651 1

+3.3V_RUN

CN26

9 CLK_PCIE_MINI2#
9 CLK_PCIE_MINI2

3,9,16,26,28,29,31,41,56 PLTRST#
9 CLK_LPC_DEBUG

H16
*Mini Card Nut (h3.2)_NC

31 COEX2_WLAN_ACTIVE
31 COEX1_BT_ACTIVE_MINI
9 MINI2CLK_REQ#

Scott_0123:Change CN25
PN with DFHS52FR015.

+3.3V_RUN

5/15: Change WAKE# to NC as it is


not required

Mini Card Nut

MiniCard Robson, BT. UWB Connector

Size

Document Number
RM5

Date:

Thursday, August 20, 2009


7

Rev
3A
Sheet

32

of
8

61

eSATA Re-driver IC

USB POWER SW

+USB_RIGHT_PWR

12

OUT1M

IN1M

11

GND
GND
GND
GND
GND

3 2 0
13 2 0
17
18 2 0
19 2 0

PI3EQX4951BZDE

1
1

R682
R683

C470
0.1U/10V

USB Power Share

R678

USB2_DUSB2_D+

+5V_ALW

*100K_NC

RES_DIV_D+
RES_DIV_D-

eSATA_RX5+
eSATA_RX5eSATA_TX5eSATA_TX5+

U17
9

VCC

1
7

NC1
NC2

2
6

NO1
NO2

COM1
COM2

3
5

EN

GND

USB2_D+
USB2_D-

9 PCH_USBP2+
9 PCH_USBP2-

R624
49.9K_F

29 USBP0_BUS_SW_CB

10

CB

5/13: Change Connector to Foxconn


to avoid material shortage for Tyco

+5V_RUN

IN

3
4

C602
0.1U/10V

CN20

Scott_0814:Delete L58 as confirm with EMI.


GND

EN1#

OUT1
OC1#

7
8

EN2#

OUT2
OC2#

6
5

1
2
3
4
5
6
7
8
9
10

ESD2

OC0# 9

USB9_D+

1
2
3

1
2
3

USB9_D-

6
5
4

6
5
4

USB9_D+
USB9_D-

+5V_RUN

*RCLAMP0504S.TCT_NC
2

C647
0.1U/50V
CC0603

C601
10U/10V
CC0805

+USB_LEFT_PWR

U35

29 USB_L_SIDE_EN#

USB9_DUSB9_D+

+5V_ALW

0
02
2

R467
1R466
1

9 PCH_USBP99 PCH_USBP9+

Each channel is 1A

MAX4983EEVB+

TV module
USB POWER SW

FOX_GS12201-1011-9F
2006114-1-20P-L

R625
49.9K_F
1

5/11: Reserved 0 ohms for


Pericom enhanced mode select
5/12: Change IC to Pericom
as Maxim failed EA test
6/23: NC according to Pericom
reccomandation!

C468
0.1U/10V
R353
43.2K_F

R355
75K_F
1

R679
0

29 USB_CHG_DET#

+USB_RIGHT_PWR

CN25
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

*10K_NC

+USB_RIGHT_PWR

R618

10K

1
1

R680
R681

B1

eSATA CONN

OC1# 9

6
5

one 150uF cap by


each USB connector.

B0

R621

Scott_0708: Pop R617 for passed eye


diagram of MAXIM.

EN

OUT2
OC2#

eSATA_RX5+3.3V_RUN

OUT1
OC1#

EN2#

EN1#

C447
TPS2062DR
0.1U/50V
Place
CC0603

SATA_RX5-_C

0.01U/16V
2
10K
2
10K
2
*10K_NC

eSATA_RX5+

1
7
8

2 eSATA_TX50.01U/16V

GND

IN

1
C774

IN1P

0.01U/16V
2 eSATA_TX5+
1

OUT1P

C773
1

eSATA_TX5-_R

+3.3V_RUN

14

IN0M

C784
1
R623
1
R617
1
R622

+3.3V_RUN

OUT0M

IN0P

8 SATA_RX5-

OUT0P

eSATA_TX5+_R

8 SATA_TX5-_C

29 USB_SIN_SIDE_EN#

15

SATA_TX52
0.01U/16V
0.01U/16V
SATA_RX5+_C
2

8 SATA_TX5+_C
C782
C783

0.01U/16V
SATA_TX5+
2

8 SATA_RX5+

0.1U/ 10V

0.1U/ 10V

C781

C461

EP_AGND

C465

U15

qfn20-4x4-5-21p-adg786

VCC
VCC
VCC
VCC

21

C775
4.7U
6.3
603

C780
4.7U
6.3
603

6
10
16
20

U49
1

+5V_ALW

Each channel is 1A

+3.3V_RUN

1
2
3
4
5
6
7
8
9 11
1012

11
12

IPX_20374-010E-31
20374-010E-10P-L

TPS2062DR

TV RF Jack & Microwave connector


CN16
MLX_733660490
mcx-73366-049-5p

2
1

5
4
3
2

CN1
R376
R3
R375
R2

3
TYC_1909763-1
MINIRF-1909763-1-3P

1
1
1
1

2
2
2
2

*0_NC
*0_NC
*0_NC
*0_NC

5
4
3
2

RF_GND
RF_GND

RF_GND

Add a metal cap for TV sensitivity


concern. BOM location use PV8,
actually mount on PV7, PV8 & PV9.
PV2
PV4
PV3
PAD181X67 PAD181X67(FBRM2035) PAD118X67

GND

QUANTA
COMPUTER

GND

GND

Title

USB & eSATA & TV


RF_GND

RF_GND

RF_GND

Size

Document Number
RM5

Date:

Thursday, August 20, 2009


7

Rev
3A
Sheet

33

of
8

61

SATA Connector

ODD Connector

CN21

CN28

21
22
23
24

GND9
GND10
GND11
GND12

GND1
RXP
RXN
GND2
TXN
TXP
GND3

1
2
3
4
5
6
7

3.3V_0
3.3V_1
3.3V_2
GND4
GND5
GND6
5V_0
5V_1
5V_2
GND7
GND8
12V_0
12V_1

8
9
10
11
12
13
14
15
16
17
18
19
20

SATA_TX0+
SATA_TX0-

C292 2
C293 2

1 0.01U/16V
1 0.01U/16V

SATA_TX0+_C 8
SATA_TX0-_C 8

SATA_RXN0_C
SATA_RXP0_C

C291 1
C290 1

2 0.01U/25V
2 0.01U/25V

SATA_RX0- 8
SATA_RX0+ 8

GND1
RXP
RXN
GND2
TXN
TXP
GND3

1
2
3
4
5
6
7

DP
5V_0
5V_1
MD
GND
GND

8
9
10
11
12
13

+3.3V_RUN
14
15
16

14
15
16

+5V_HDD

SATA_TX1+
SATA_TX1-

C792 2
C791 2

1 0.01U/16V
1 0.01U/16V

SATA_TX1+_C 8
SATA_TX1-_C 8

SATA_RXN1_C
SATA_RXP1_C

C790 1
C789 1

2 0.01U/25V
2 0.01U/25V

SATA_RX1- 8
SATA_RX1+ 8

+5V_MOD

MLX_47645-2000
SATA-47645-2000-13P-L-H

+5V_MOD

C295
*1000P/50V_NC
CC0402

R362
100K
2

MOD_EN_5V

2
6

C478
10U/10V
CC0805

Place caps close to connector.

HDD_EN_5V

1
2

R484
100K

C475
0.1U/25V
CC0603

R482
100K

C642
4.7U/6.3V
CC0603

Q47B
2N7002DW-7-F

Q47A
2N7002DW-7-F

R361
100K

1
1
3

R481
100K

+15V_ALW

29 MODC_EN

6
5
2
1

+5V_HDD

Q58
FDC655BN

2
+5V_ALW

+3.3V_ALW

1
1

R359
100K
R360
100K

+5V_MOD

C297
1000P/50V
CC0402

+15V_ALW

C296
0.1U/16V
CC0402

C288
0.1U/16V
CC0402

C289
0.1U/16V
CC0402

1
2

1
2

+3.3V_ALW

Q48
SI4800BDY-T1-E3
3
2
1

8
7
6
5

+5V_HDD

C299
1U/10V
CC0603

C480
1000P/50V
CC0402

Place caps close to connector.


+5V_ALW

C300
10U/10V
CC0805

C793
0.1U/16V
CC0402

C479
0.1U/16V
CC0402

C787
1U/10V
CC0603

C788
*10U/10V_NC
CC0805

C287
*0.1U/16V_NC
CC0402

C294
*0.1U/16V_NC
CC0402

C286
*0.1U/16V_NC
CC0402

C301
*1U/10V_NC
CC0603

C298
*10U/10V_NC
CC0805

+3.3V_RUN

FOX_GS12201-1011-9F
2006114-1-20P-L

1
R469

Q54B
2N7002DW-7-F

Q54A
2N7002DW-7-F

29 HDDC_EN

C628
0.1U/25V
CC0603

100K

3-axis Fall Sensor (HDD data protector)


+3.3V_RUN, the same
SMBus with WLAN

U9

C411
*10U_NC
603
6.3

+3.3V_RUN

C426
*0.1U/10V_NC

VDD_IO

GND1

Reserved1

GND2

Reserved2

11

GND3

GND4

10

VDD

INT2

CS

INT1

SCL

14

MEM_SCLK 9,13,14,28,31,32

SDA

13

MEM_SDATA 9,13,14,28,31,32

SDO

12
D

PCH_IRQH_GPIO5

QUANTA
COMPUTER

9
Title

*LIS302DLTR_NC

HDD & ODD (SATA)

Size

Document Number
RM5

Date:

Thursday, August 20, 2009


7

Rev
3A
Sheet

34

of
8

61

Power Button

+3.3V_ALW

200K/F
1
1
100K

29 DAT_TP_SIO
29 CLK_TP_SIO
+3.3V_ALW
SMBDAT2_MMB
+5V_ALW
+MMB_PWR

Media Button

SMBCLK2_MMB
MEDIA_INT#

29 MEDIA_INT#

1
R588
2
2
R594

8 KB_LED_DET
29 KB_BACKLITE_EN
+5V_RUN

D29
*DA204U_NC
3

R666
100K
10K

R668
1

MAIN_PWR_SW# 29
1

POWER_ SW_IN0#

C850
1U/10V
CC0603

Hall Switch
+3.3V_ALW

+3.3V_ALW
C626 0.1U/10V
1
2

39 AUD_SPK_R1
39 AUD_SPK_R2

100K
1

R599
100K

"MEDIA_INT#"
PU at MB side
MEDIA_INT#

CN7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

KSI7
KSI6
KSI4
KSI2
KSI5
KSI1
KSI3
KSI0
KSO5
KSO4
KSO7
KSO6
KSO8
KSO3
KSO1
KSO2
KSO0
KSO12
KSO16
KSO15
KSO13
KSO14
KSO9
KSO11
KSO10
CAP_LED_L

U7
VDD

OUT

39 AUD_SPK_L1
39 AUD_SPK_L2

Speaker

R493
2

29 KB_DET#

GND1

+3.3V_ALW

CN9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

POWER_ SW_IN0#

Touch Pad

29 KSI[0..7]
29 KSO[0..16]

+3.3V_ALW

36 BREATH_PWRLED_INT

KB LED

GND2

Scott_0123:Change CN8 PN with


DFHD32MR003(With mylar)

Solid White = System On, Normal Activity


Off= System off (system off or hibernate);
"Breathing White " = System in Standby (S3);

KEYBOARD CONNECTOR

To Daughter Board connector

Power Button

VSS
LID_SW#

HRS_FH28-60(30)SB-1SH(86)
FH28-30SB-1SH-30P-R

LID_SW# 29,36

EM-6781-T3
FOX_GB5RF321-1203-8F
gb5rf341-1203-7f-32p-l
+3.3V_ALW

+3.3V_ALW

+5V_RUN

+MMB_PWR

R286
*20K_NC

R299
*20K_NC

2
2
2

29 SMBDAT2

0.1U/10V

1
2

29 SMBCLK2
1

Q39
2N7002W-7-F

CP2
100PX4
8
6
4
2

+MMB_PWR

Q43
2N7002W-7-F
3

SMBCLK2_MMB

Q40
2N7002W-7-F

7
5
3
1

KSI1
KSI3
KSI0
KSO5

8
6
4
2

+3.3V_RUN

+3.6V_RUN

+3.3V_RUN

The GND (pin 8) for DMIC is defined as AGND.


Connect with GND at MB, but separate AGND
& GND at coaxial cable & CCD module.
CN10

R358 1
R357 1

9 PCH_USBP11+
9 PCH_USBP11C

DMIC_CLK

38 DMIC_CLK
10 CAMERA_CBL_DET#

R626 1

+5V_RUN

C786
*33P/50V_NC

7
5
3
1

KSO4
KSO7
KSO6
KSO8

7
5
3
1

KSO12
KSO16
KSO15
KSO13

50
NPO
1206
CP5
100PX4
7
5
3
1

50
NPO
1206
C656
100P/50V
1
2

KSO14
KSO9
KSO11
KSO10

8
6
4
2
50
NPO
1206

KSI7

100P CAPS close to KB connector


C

5/03: Populate according to EMI request!


5/12: Change from CA110084N04 to
CA110084N39 due to material shortage!

11
12

IPX_20374-010E-31
20374-010E-10P-L
C471
10U/10V
CC0805

OUT

NC/FB

EN

R351
*100K/F_NC

C459
*1U/10V_NC
CC0603

C467
*27P/50V_NC

GND

*TPS76301DBVR_NC

IN

8
6
4
2

+3.6V_RUN

U16
1

DMIC_CLK_R

DMIC_DATA_R

1
2
3
4
5
6
7
8
9 11
1012

8
6
4
2

KSI6
KSI4
KSI2
KSI5

C785
*33P/50V_NC

DMIC_CLK_R

DMIC_DATA_R

2 0/0603
RC0603
2 22/0603
RC0603
1

R627 1

DMIC_DATA

1
2
3
4
5
6
7
8
9
10

USB11_D+
USB11_DCAM_VCC

2 0
2 0

KSO3
KSO1
KSO2
KSO0

CP6
100PX4
L28
*BLM11A05S_NC
RC0603

Scott_0814:Delete L29 as confirm with EMI.

L30
BLM11A05S
RC0603

7
5
3
1

CP3
100PX4
7
5
3
1

50
NPO
1206

1
R628
100K

CAP_LED_L

50
NPO
1206

CP4
100PX4

Array Microphone & Camera

CP1
100PX4

50
NPO
1206

8
6
4
2

38 DMIC_DATA

R253
150
1

1
2

R284

10K

R279
100

100K

Q38
DDTA114YUA-7-F

47K
1

29 CAP_LED#

SMBDAT2_MMB

Q41
2N7002W-7-F

2
29 MMB_ISSP

C405

R287
10K
+3.3V_ALW

Active high for


ISSP reset

R265
100K

NC R620 & R621 with new MMB


firmware V35 which have
internal PU(5.6K) at MMB IC

+5V_ALW2

Q42
2N7002W-7-F

SI2303BDS-T1-E3
2

Q44

1
1

+MMB_PWR

C466
*4.7U/6.3V_NC
CC0603

R352
*49.9K/F_NC

QUANTA
COMPUTER

Title

KB/ CCD/ UI

Size

Document Number
RM5

Date:

Thursday, August 20, 2009


7

Rev
3A
Sheet

of

35
8

61

R715
0

1
R157
*0_NC
1

+3.3V_ALW

47K

2
1

8 SATA_ACT#
BREATH_PWRLED_EXT

2 150 BREATH_PWRLED_EXT_R

R356 1

Q29
2N7002W-7-F

HDD_LED_R

Scott_0821:Change to +5V_ALW
power rail for slove LED blinking issue.

R161
1

330
2

HDD_LED 40

R581 1

2 390

BREATH_PWRLED_INT

35

LED_MASK#

U42
TC7SZ04FU(T5L,F,T)

Q64
2N7002W-7-F

BREATH_PWRLED_INT_R

1
R172
0

R169
*0_NC
1

Turns On when WiFi


radio is on.

+5V_RUN

+3.3V_RUN

Q34
DDTA114YUA-7-F

29 BREATH_PWLED#

+3.3V_RUN

WLAN

R174
4.7K

R579
100K

29,35 LID_SW#

5 2

R717
0

R716
*0_NC

R578
100K

Power button board LED:


Solid White = System On, Normal Activity
Off= System off (system off or hibernate);
"Breathing White " = System in Standby (S3)

+5V_ALW2

+5V_ALW2 +5V_ALW

Q30
DDTA114YUA-7-F

3 2
10K

U18
TC7SZ04FU(T5L,F,T)

R159
0

LED_MASK#

2
1

29 BREATH_LED#

Flicker with HDD activity.

+5V_RUN

2
R160
10K

29 LED_MASK#

R354
100K
2

Q46
2N7002W-7-F

+3.3V_RUN

R714
*0_NC

+3.3V_RUN

+5V_ALW2

HDD Activity LED

Solid White= Charging (system on);


Solid White= Charging (system off or hibernate and battery charge <90%);
Off= Charging (system off or hibernate and battery charge > 90%) ;
"Breathing White " = System in Standby (S3);
Off = System Off (or in Hibernate);

+3.3V_ALW

+5V_ALW2 +5V_ALW

Hinge LED

Hinge & Power Button board LED (PWR/Battery indictor) Solid White= System On, Normal Activity

47K

2
1

31 LED_WLAN_OUT#

3 2
10K

Hinge LED:
Flashing Amber = Low Battery (S0 and S3 and no AC) when battery charge <10%
Flash rate = on 1/4 sec., off 3/4 sec.

+3.3V_ALW

BAT_LED_EXT

R629 1

2 100

3
WLAN_LED_R
R171
1

330
2

WLAN_LED 40

BAT_LED_EXT_R

U50
TC7SZ04FU(T5L,F,T)

+3.3V_RUN

BT / UWB LED

+5V_RUN

+3.3V_RUN

Turns On when
Bluetooth radio is on.

29 BAT_LED#

Q33
2N7002W-7-F

R164
0

R166
100K
2

Q32
DDTA114YUA-7-F

R162
*0_NC
1

LED_MASK#

47K

2
1

32 LED_WPAN_OUT#

3 2
10K

Q31
2N7002W-7-F

BT_LED_R
2

R165
1

+3.3V_RUN

WWAN

1
2
3

4
5

4
5

47K

2
1

32 LED_WWAN_OUT#

Q36
DDTA114YUA-7-F

3 2
10K

FOX_HS8803F
C474
2200P/50V

Q35
2N7002W-7-F

1
C473
2200P/50V

C508
2200P/50V

FOX_HS8803F
C509
2200P/50V

1
2
3

R176
*0_NC

CN11
1
2
3

Turns On when
WWAN radio is on.

Right side

BAT_LED_EXT_R

1
2
3

LED_MASK#

CN2
4

WWAN_LED_R
R175
1

Solid White= System On, Normal Activity


Solid White= Charging (system on);
Solid White= Charging (system off or hibernate and battery charge <90%);
Off= Charging (system off or hibernate and battery charge > 90%);
"Breathing White " = System in Standby (S3);
Off = System Off (or in Hibernate);

330
2

WWAN_LED 40
1

QUANTA
COMPUTER

Title
LED

Flashing Amber = Low Battery (S0 and S3 and no AC) when battery charge <10%
Flash rate = on 1/4 sec., off 3/4 sec.

BT_LED 40

R179
0

R182
100K
BREATH_PWRLED_EXT_R

Left side

+5V_RUN

+3.3V_RUN

L-C filter (reserve R-C) for EMI

Hinge LED (PWR/Battery indictor)

330

Size

Document Number
RM5

Date:

Friday, August 21, 2009

Rev
3A
Sheet
E

36

of

61

Prevent Backdrive

R145
10K

Q24
2N7002W-7-F

+5V_RUN

R144
10K

+5V_RUN

+3.3V_RUN

+3.3V_RUN

C25
2.2U/10V
CC0805

+5V_RUN

15 EC_SMBCLK0

EC_SMBCLK0

C32
0.1U/10V

SMBCLK0 29,45,55

R402
4.7K

+3.3V_RUN
CN19
FAN1_PWM

29 FAN1_PWM
29 FAN1_TACH

4
3
2
1

4
3
2
1

D18
*DA204U_NC

D8
*SSM34PT_NC

15 EC_SMBDAT0

EC_SMBDAT0

Q23
2N7002W-7-F
3

SMBDAT0 29,45,55

MLX_53398-0471
53398-0410-4P-R

+3.3V_RUN

Place these under CPU

10/20mils
REM_DIODE1_P

Q59
MMST3904-7-F

U6
C281
2200P/50V

REM_DIODE1_N

EC_SMBCLK0

SDA

EC_SMBDAT0

ALERT#

THERM_ALERT#_C

GND

VDD

SCL

DP

DN

SYS_SHDN#

EMC1422-1-ACZL-TR

1.Place C579 close to EMC1422


Total capacitance between D+/D- is 2200pF(max)

+3.3V_RUN

C280
0.1U/10V

THERM_STP# 29,51

R147
1M
3

SYS_SHDN#

C273
0.1U/10V

Q26
2N7002W-7-F

Q25
2N7002W-7-F

OTP 90 degree
+3.3V_RUN

R139 1

2 6.8K/F

THERM_ALERT#_C

R146 1

2 10K/F

SYS_SHDN#

OTP 85 degree : R98 = 10K, R103 = 6.8K


OTP 90 degree : R98 = 6.8K, R103 = 10K

QUANTA
COMPUTER

Title

FAN /THERMAL

Size

Document Number
RM5

Date:

Thursday, August 20, 2009


7

Rev
3A
Sheet

37

of
8

61

R318
39.2K/F

+5V_SPK_AMP

C431
1000P/50V

2
3

3
MIC1_JD 40

+5V_RUN

C732
1U/10V
CC0603

C744
10U/10V
CC0805

FB_60ohm+-25%_100MHz
_3A_0.05ohm DC

39,40 HP1_JD

Q65
2N7002W-7-F

Q45
2N7002W-7-F

2
3

2
1

Q67
2N7002W-7-F

39,40 HP2_JD

L67
1
2
BLM21PG600SN1D
1

C758
1000P/50V

R603
39.2K/F

R606
20K/F

+VDDA

R315
5.1K/F
SENSEA

Layout Note:
Close to the Pin 13
of Codec

+VDDA
R600
5.1K/F
SENSEB

Layout Note:
Close to the Pin 34
of Codec

Layout Note:
Place close to pin 8

AZALIA (HD) CODEC


+3.3V_RUN

+VDDA

U46

R595 1

Depop these for 92HD73C

2
C

R580 1

ICH_AZ_CODEC_BITCLK
2 22 HDA_SDI

1
9
40

6
8
5
10
11

DVDD_CORE
DVDD_CORE
DVDD

HDA_BITCLK
HDA_SDI
HDA_SDO
HDA_SYNC
HDA_RST#

C435
0.1U/10V

AVDD
AVDD

25
38

SENSE_A
SENSE_B

13
34

PORT_A_L
PORT_A_R
NC/VREFOUT_A

39
41
37

PORT_B_L
PORT_B_R
VREFOUT_B

21
22
28

PORT_C_L
PORT_C_R
VREFOUT_C

23
24
29

PORT_D_L
PORT_D_R
VREFOUT_D

35
36
32

AUD_FRONT_L 39,40
AUD_FRONT_R 39,40

PORT_E_L
PORT_E_R
GPIO4/VREFOUT_E

14
15
31

AUD_MIC_L0 40
AUD_MIC_R0 40
AUD_MIC1_VREFO

PORT_F_L
PORT_F_R
GPIO3/VREFOUT_F

16
17
30

AUD_HP2_L0 39
AUD_HP2_R0 39

PORT_G_L
PORT_G_R

43
44

PORT_H_L
PORT_H_R

45
46

PC_BEEP
CAP2
VREFFILT

12
33
27

SENSEA
SENSEB

AUD_HP1_L0 39
AUD_HP1_R0 39

R593
*10K_NC

8 ICH_AZ_CODEC_BITCLK
8 ICH_AZ_CODEC_SDIN0
8 ICH_AZ_CODEC_SDOUT
8 ICH_AZ_CODEC_SYNC
8,29 ICH_AZ_CODEC_RST#

2 *100K_NC
2
*1000P/50V_NC

+3.3V_RUN

1
C739

C747
1U/10V
CC0603

C721
0.1U/10V

C719
1U/10V
CC0603

C720
1U/10V
CC0603

EAPD#

C722
*10P/50V_NC

18
19
20

NC/CD_L
NC/CD_GND
NC/CD_R

ICH_AZ_CODEC_BITCLK

DMIC_DATA

R584
*22_NC

4
7

DVSS1
DVSS2

AUD_PC_BEEP

AVSS1
AVSS2

AUD_PC_BEEP

C725
1U/10V
CC0603
1
2 BEEP2

R582 10K
1
2 BEEP1

26
42

C752
10U/10V
CC0805

R583
2.2K
C753
1U/10V
CC0603

BEEP 29

SPKR 8

U41
74LVC1G86GW

92HD73C-C1

1
4

35 DMIC_DATA

DMIC_CLK/GPIO0/SPDIF_IN
SPDIF_OUT_0

C711
0.1U/16V
CC0603
1
2

DMIC_CLK

47
48

+VDDA

Close to CODEC

EAPD#

DMIC0/VOL_UP/GPIO1
DMIC1/VOL_DN/GPIO2

40

39 EAPD#

2
3

35 DMIC_CLK
+3.3V_RUN

DMIC_CLK

C425
*1P/50V_NC

R308
*22_NC

1
2

C717
*1P/50V_NC

QUANTA
COMPUTER

Title

AZELIA CODEC (92HD73C)

Size

Document Number
RM5

Date:

Thursday, August 20, 2009


7

Rev
3A
Sheet

38

of
8

61

2 2.2K
2 2.2K

2.2U/50V/1206
C448

WOOFER_EN 40

270P/50V
AMP_HP1_SHUD#
50

C757 1
NB_MUTE# 2

CC1206

TEST_WOOFER_EN 10
1

Q69
2N7002W-7-F

Q68
2N7002W-7-F

2
1

EAPD#

14
18

SHDNR
SHDNL

1
3

C1P
C1N

5
7

PVSS
SVSS

C748
2.2U/25V
CC1206

9
11
4
6
8
12
16
20
10
19
2
17

OUTL
OUTR
NC1
NC2
NC3
NC4
NC5
NC6
SVDD
PVDD
PGND
SGND

AUD_HP1_L2 40
AUD_HP1_R2 40

+3.3V_RUN

MAX4411ETP+

C771
1U/16V
CC0805

Layout Note:
TPA 4411 : cannot connect EP to GND.
The reason that we can't solder the pad
to vdd or ground is because it is
internally connected to VSS.

+3.3V_RUN
C429
U11
2
1
TC7SZ08FU(T5L,F,T)
0.1U/10V
NB_MUTE#
1
4 AMP_HP2_EN_L
HP2_JD
2

AMP_HP1_SHUD#

4
2

38,40 HP2_JD

EAPD#

AMP_HP2_EN

4
2

U10
TC7SZ08FU(T5L,F,T)

U45
TC7SZ08FU(T5L,F,T)

0.1U/10V
1

0.1U/10V
1

+3.3V_RUN
C428
2
1

+3.3V_RUN
C728
2
1

+3.3V_RUN
C727
U44
2
1
TC7SZ08FU(T5L,F,T)
0.1U/10V
NB_MUTE#
1
4 AMP_HP1_SHUD_L#
HP1_JD
2
EAPD#

Q66
2N7002W-7-F

38,40 HP1_JD

INL
INR

38 EAPD#

13
15

29 NB_MUTE#

2 2.2U/25V

U48
AUD_HP1_L1
AUD_HP1_R1

R611
100K

R348 1
R342 1

R605
100K

38 AUD_HP1_L0
38 AUD_HP1_R0

50
1 270P/50V

C453 2
AUD_HP1_L1_L
AUD_HP1_R1_L

2.2U/50V/1206
C770 1
2
C764 1
2

1
R608
100K
2

INTERNAL SPEAKER AMP

+5V_SPK_AMP

AUD_SPK_ENABLE#

GND
GND
GND
GND
GND

21
22
23
24
25

3.48K/F
2

+5V_SPK_AMP
1
R334
100K

C451
1
2

38,40 AUD_FRONT_R
0.047U/25V
BUFFER_VIAS

0.01U/50V
R345
1
2

VDD

VSS

U13B
MAX4492AUD+
7

AUD_AMP_GAIN1
AUD_AMP_GAIN2

R325
*100K_NC

LINE_OUT_R

AUD_AMP_MUTE#

GAIN1

GAIN2

6dB

10dB

15.6dB

21.6dB

R316
1

*0_NC
2 AUDIO_AVDD_ON

GAIN
R587
1

*0_NC
2

EMI Reserved

AUDIO_AVDD_ON

AUDIO_AVDD_ON

29

R167
R313
R163
R312
R319
R474
R322

C729
0.033U/16V

For MAX9789A, depop Cap., pop Res.

1
1
1
1
1
1
1

2
2
2
2
2
2
2

0/0603
0/0603
0/0603
0_0805
0/0603
0/0603
0/0603

11

C455

+5V_SPK_AMP

R320
100K
2

2
1

3.48K/F
2

R335
100K

R336
*100K_NC

14.7K/F

R347
1

Layout Note:
MAX9789A/TPA6040A : need to connect
EP (exposed paddle) to GND.
TPA 4411 : cannot connect EP to GND.
MAX 4411: can connect EP to GND.

VSS

LINE_OUT_L

40 BUFFER_VIAS

+5V_SPK_AMP

U13A
MAX4492AUD+
1

BUFFER_VIAS

0.01U/50V
R332
1
2

VDD

0.047U/25V

C446
1
2

38,40 AUD_FRONT_L

11

C441

+5V_SPK_AMP
C766 0.1U/10V
1
2

R331
1

14.7K/F
R596
1

2 1U/16V

CC0805

1
1
1
2
2

2
2
1
1

*47P/50V_NC
*47P/50V_NC
270P/50V
270P/50V

LINRINAUD_HP2_L1
AUD_HP2_R1

C730
C731
C736
C735

C713
1U/16V
CC0805

7/01: Populate according to EMI request!

+VDDA

6
7

AUD_SPK_L1 35
AUD_SPK_L2 35

20
19

AUD_SPK_R1 35
AUD_SPK_R2 35

C743
0.033U/16V

R589
*0_NC

2
HPVDD
CPVDD

10
12
11

C1P
C1N
CPGND

14
13

PVSS
CPVSS

VOUT

29

VDD
PVDD_8
PVDD_18

30
8
18

GND_28
PGND_5
PGND_21

28
5
21

AGND

33

C718
1U/10V
CC0603

C724
0.1U/10V

+5V_SPK_AMP

+5V_SPK_AMP

C726
0.1U/10V

C710
1U/10V
CC0603

+VDDA

REGEN
SET

4
1

HPR
REGEN
SET

+5V_SPK_AMP

AUD_HP2_L2 40
AUD_HP2_R2 40

C723
1U/10V
CC0603

BIAS
SPKR_EN#
HP_EN
MUTE#
GAIN1
GAIN2

16
15

For MAX9789A, depop


Cap., pop 0 ohm.

TPA6040A4 OUTR+
OUTRQFN 32PIN HPL

HP_INL
HP_INR

17
9

EMI Reserved

OUTL+
OUTL-

C742
1U/10V
CC0603

C714 1

SPKR_INL
SPKR_INR

1
2

1
2

C715
1U/10V
CC0603

AUD_SPK_ENABLE#
AMP_HP2_EN
AUD_AMP_MUTE#
AUD_AMP_GAIN1
AUD_AMP_GAIN2

24
23
22
25
31
32

CC0603

+3.3V_RUN

C712
10U/10V
CC0805

27
26

2 1U/10V

3
2
AUD_HP2_L1
AUD_HP2_R1

C740 1

LINRIN-

2 2.2K
2 2.2K

CC1206
CC1206

2 0.033U/50V
2 0.033U/50V

38 AUD_HP2_L0
38 AUD_HP2_R0

C756 1
C755 1

2 2.2U/50V/1206 AUD_HP2_L1_L R598 1


2 2.2U/50V/1206 AUD_HP2_R1_L R597 1

LINE_OUT_L
LINE_OUT_R
C751 1
C759 1

*2.2K_NC
2

U43

C741
1U/10V
CC0603

Layout Note:
Place close pin 30.

C716
10U/10V
CC0805

TPA6040A4

Layout Note:
Place close to pin 18.

Layout Note:
Place close TPA6040.

Title

QUANTA
COMPUTER
AUDIO AMP

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
1

39

of

61

+5V_SPK_AMP

R339
100K

Condition

VDD

Spread-spectrum mode with fS = 1200kHz


70kHz.
Fixed-frequency mode with fS = 1100kHz.

GND

SYNC

C450
100P
50
NPO

Fixed-frequency mode with fS = 1500kHz.

Clocked

Fixed-frequency mode with fS = external clock frequency.

IN+
IN-

C452 1U/10V
CC0603
R344 100K
1
2

+5V_SPK_AMP

FLOAT

U14
2
3

1
R327

+5V_SPK_AMP

2
100K

SUB_MUTE#

CN8

MAX9759
TQFN 16PIN

SHDN#

MUTE#

OUT+
OUT-

SUB_OUT+
SUB_OUT-

11
10

VDD

GND

PVDD

SYNC

7
13

SYNC
SYNC_OUT

PGND

AUD_SUB_GAIN1
AUD_SUB_GAIN2

16
15

G1
G2

PVDD

12

Q70
2N7002W-7-F

1
2

C763
0.1U/10V
+5V_SPK_AMP

C423
*100P_NC
50
NPO

C422
*100P_NC
50
NPO
A

17

Exposed Paddle

PGND

14

R350
*100K_NC

39 WOOFER_EN

1
2

TYC_1775765-2

SYNC

C760
0.1U/10V
1

1U/10V
BLM18PG121SN1D
C458 CC0603
AUD_SUB_IN+
1
2 SUB_IN+
1
2 SUB_IN120ohm, 2A
L27

AUD_MONO_OUT

INTERNAL SUBWOOFER AMP

C765
0.1U/10V

C769
10U/10V
CC0805

MAX9759ETE+

+5V_SPK_AMP

+5V_SPK_AMP

+5V_SPK_AMP

C436
0.068U/16V

11.8K/F

VSS

10K/F

0.033U/16V

Ambient Parts of Headphone & MIC Jack

VSS

0.068U/16V

R337
100K

R328
20K/F

C454
1

0.01U/50V
2

R330
2

4.99K/F
1

VDD

13

C445

R333
1

100K/F
2

R326
1

11.3K/F
2

AUD_SUB_GAIN1
AUD_SUB_GAIN2

GAIN

24dB

18dB

12dB

6dB

C444
2

R346
100K

GAIN2

R343
*100K_NC

2
R323 10K/F

GAIN1

R338
*100K_NC
U13D
MAX4492AUD+
AUD_MONO_OUT
14

12

11

C437 0.47U/6.3V

R349

VDD

11

38,39 AUD_FRONT_R

10

R329

U13C
MAX4492AUD+

38,39 AUD_FRONT_L

2.2U/10V
CC0805

C443 0.47U/6.3V
R324 10K/F
1
2
1
2

BUFFER_VIAS

C768

R610
100K

BUFFER_VIAS

39

BUFFER_VIAS

BUFFER_VIAS

+5V_SPK_AMP

R609
100K

To IB(IO Board) connector


CN5

AUD_HP1_L2

39 AUD_HP1_L2

34

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

AUD_HP1_R2

39 AUD_HP1_R2

AUD_HP2_L2

39 AUD_HP2_L2

AUD_HP2_R2

39 AUD_HP2_R2

C430
1U/10V
CC0603
1
2

R305
4.7K
33
2

38 AUD_MIC_R0

R309
4.7K
2

38 AUD_MIC_L0

C427
2.2U/10V
CC0805
1
2

38 AUD_MIC1_VREFO

PCH_USBP1- 9
PCH_USBP1+ 9

Two USB ports


& WWAN LED

WWAN_LED 36
+USB_LEFT_PWR
C

WLAN_LED 36
BT_LED 36
HDD_LED 36

Front Side LED

AUD_HP1_L2
AUD_HP1_R2
HP1_JD
AUD_HP2_L2
AUD_HP2_R2
HP2_JD

Audio Jack

AUD_MIC_L1
AUD_MIC_R1
MIC1_JD

AUD_MIC_L1
FOX_GB5RF321-1203-8F
gb5rf341-1203-7f-32p-l

AUD_MIC_R1

PCH_USBP0- 9
PCH_USBP0+ 9

C424
2.2U/10V
CC0805

Scott_0123:Change CN5 PN with DFHD32MR003 (FOX).

+3.3V_RUN

QUANTA
COMPUTER

Adding additional AGND

R585
100K
2

R586
100K
2

R602
100K

CN4
HP1_JD
HP2_JD
MIC1_JD

1
2

HP1_JD 38,39
HP2_JD 38,39
MIC1_JD 38

Title

1
2

IB CONN & SUBWOOFER

MLX_53780-0270

Size

Document Number
RM5

Date:

Thursday, August 20, 2009


7

Rev
3A
Sheet

40

of
8

61

C42
0.1U
10
X7R

C50
0.1U
10
X7R

C44
0.1U
10
X7R

C38
0.1U
10
X7R

T56
PAD

C40
0.1U
10
X7R

+3.3V_LAN

+1.2V_LOM

VDDP Power Decoupling

+1.2V_VDDC_IO

U26

+1.2V_VDDC_IO

C35
0.1U
10
X7R

5
55
13
20
34
60

C518
0.1U
10
X7R

+3.3V_LAN
L46

VDDC_IO/VDDC
VDDC_IO/VDDC
VDDC
VDDC
VDDC
VDDC

+3.3V_LAN

C45
4.7U
10
X5R
805

C39
0.1U
10
X7R

C56
0.1U
10
X7R

C36
0.1U
10
X7R

+1.2V_LOM
L5
BLM18AG601SN1D
1
2

BCM5784M
+LAN_AVDDL
C30

L4
BLM18AG601SN1D
1
2
1 200/F

C516
27P
50
NPO

25MHz

0.1U/10V

4.7U/10V/0805

35
C28

AVDDL
AVDDL

L47
BLM18AG601SN1D
1
2

LAN_XTALI
C517
27P
50
NPO

L6
BLM18AG601SN1D
1
2

30
C513

68-Pin QFN

XTALVDDH

23

LAN_XTALVDDH

AVDDL/AVDDH

45

+LAN_AVDDL

DC/AVDDH

38

DC/AVDDH

52

1
C511

C41

GPHY_PLLVDDL

4.7U/10V/0805
C33

0.1U/10V

PCIE_PLLVDDL
PCIE_VDDL

24

PCIE_VDDL/GND

49
50

AVDDH/TRD2_N
TRD2_N/TRD2_P
TRD2_P/AVDDL

+LAN_AVDDH

AVDDH/TRD1_N
TRD1_N/TRD1_P
TRD1_P/AVDDL

42
43
44

+LAN_AVDDH

TRD0_N
TRD0_P

41
40

TRD0- 42
TRD0+ 42

LINKLED#
SPD100LED#
SPD1000LED#
TRAFFICLED#

2
1
67
66

LINKLED# 42
SPD100LED# 42
SPD1000LED# 42
IO_LOM_ACTLED_YEL# 42

C26

0.1U/10V

TRD2- 42
TRD2+ 42

Place one cap close


42, 48 respectively.

GPIO2

C27

0.1U/10V

TRD1- 42
TRD1+ 42

LAN_GPIO

T57

PAD

R1208 & R1210: Stuff


only if U86 is installed

9
7
4

BCM_WP

R411
4.7K
SCLK_EECLK
SI
SO_EEDATA
CS#

65
63
64
62

ENERGY_DET

59

VDDC_IO/VDDP

17

REGOUT12_IO/REGCTL25

18

BCM_SCL
SI
BCM_SDA
CS#

R407
*4.7K_NC

T5
PAD
1

1
R404
4.7K

R405
4.7K

LAN_DISABLE
is hign active

+3.3V_LAN
R403
R401

1K
1K

VAUX_PRSNT
VMAIN_PRSNT
LOW_PWR

58
57

TEST1/SMB_CLK
TEST2/SMB_DATA

LAN_XTALO
LAN_XTALI

22
21

XTALO
XTALI

LAN_RDAC

37

RDAC

U27
8
7
6
5

VCC
NC
SCL
SDA

A0
A1
A2
VSS

1
2
3
4

C528
0.1U
10
X7R

BCM_SCL

R410

4.7K

SI

R40

4.7K

CS#

R39

4.7K

T6
PAD

T58
PAD

+1.2V_VDDC_IO

54
53
3

LAN_DISABLE

29 LAN_DISABLE

R409
4.7K

24LC02BT-I/STG

+3.3V_LAN
+3.3V_RUN

+3.3V_LAN

UART_MODE
GPIO1_SERIALDI
GPIO0_SERIALDO

PCIE_TXD_P
PCIE_TXD_N
PCIE_RXD_P
PCIE_RXD_N
WAKE#
PERST#
PCIE_REFCLK_P
PCIE_REFCLK_N

26
25
31
32
12
10
29
28

LAN_PCIETXDP
LAN_PCIETXDN

10
10

2 0.1U
2 0.1U

C514 1
C515 1

BLM18AG601SN1D
2
0.1U/10V

TRD3- 42
TRD3+ 42

+3.3V_LAN

9 PCIE_RX6+/GLAN_RX+
9 PCIE_RX6-/GLAN_RX9 PCIE_TX6+/GLAN_TX+
9 PCIE_TX6-/GLAN_TX7,28 PCIE_WAKE#
3,9,16,26,28,29,31,32,56 PLTRST#
9 CLK_PCIE_LOM
9 CLK_PCIE_LOM#

BLM18AG601SN1D
2
0.1U/10V

L8
BLM18AG601SN1D
+LAN_AVDDH 1
2

48
47
46

PCIE_PLLVDDL

27
33

TRD3_N
TRD3_P

0.1U/10V

+LAN_PCIESDSVDDL
C29

4.7U/10V/0805

LAN_BIASVDDH

0.1U/10V

+LAN_PCIEPLLVDDL
C512

36

10mm x 10mm

LAN_XTALO

Y1
2

C24

+LAN_GPHYPLLVDDL
C23

R406 2

4.7U/10V/0805

39
51

BIASVDDH

L7

VDDIO Power Decoupling

68

C43
0.1U
10
X7R

DC/VDDP

C31
0.1U
10
X7R

6
15
19
56
61

C34
0.1U
10
X7R

VDDIO
VDDIO
VDDIO
VDDIO
VDDIO

C37
4.7U
10
X5R
805

Core Power Decoupling

+1.2V_LOM

R400

+3.3V_LAN
R42

1.24K/F

1/F
+3.3V_LAN
REGCTL12

Make sure it
stays high when
not driven by
R408
BCM5784M.

14

LAN_REGCTL12

Q16
PBSS5350Z

C49
4.7U
10
X5R
805

+1.2V_LOM

2
4

*4.7K_NC

11

CLK_REQ#

SUPER_IDDQ don't
work, to GND directly.

Package Body

69

GND

9 LOMCLK_REQ#

C65
0.1U
10
X7R

SUPER_IDDQ/GND

16

C52
0.1U
10
X7R

C58
10U
10
X7R
805

BCM5784MA0KMLG

Note:thermal pad

Title

QUANTA
COMPUTER
LAN (BCM5784M)

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
1

41

of

61

TRD0+
TRD0TRD1+
TRD1-

41

TRD2+

41

TRD2-

41

TRD1+

41

TDCT

TDCT1

TRD2+

TD1+

TRD2-

TD1-

TRD1+

TD2+

TRD1-

TRD1-

TDCT

C19
0.1U/10V

C13
0.1U/10V

C14
0.1U/10V

10

TDCT2

11

TD3+

12

TD3-

R10

2 75/F

TX1+

20

RJ45-TX2+

TX1-

19

RJ45-TX2-

TX2+

18

RJ45-TX1+

TX2-

17

RJ45-TX1-

TXCT2

16

TXCT1

R11

2 75/F GND_LAN

TXCT3

15

TXCT0

R12

2 75/F

TX3+

14

RJ45-TX0+

TX3-

13

RJ45-TX0-

1:1

1
2

1
2

1
2

C12
*1P/50V_NC

C11
*1P/50V_NC

C16
*1P/50V_NC

2 75/F

TXCT2

21

C15
*1P/50V_NC

C510
1000P/3K
CC1808

Scott_0729:Change L45 PN to DB0RM5LAN00(TDK)

+3.3V_SUS
CN15
2

RJ45-TX3RJ45-TX3+
RJ45-TX1RJ45-TX2RJ45-TX2+
RJ45-TX1+
RJ45-TX0RJ45-TX0+

47K
2

Q7
DDTA114YUA-7-F

2
10K

LED_YP

8
7
6
5
4
3
2
1

8
7
6
5
4
3
2
1

+3.3V_LAN
1

12

LED_GND

11
13

LED_GP/AN
LED_GN/AP

O
R14

330

4.7K
D4

SDMK0340L-7-F
+3.3V_LAN

D7

SDMK0340L-7-F
D6
1

41 LINKLED#

47K
2

14
15
16
17

R41
0_0805

+3.3V_LAN

SDMK0340L-7-F

LED_YN

CHSGND1
CHSGND2
CHSGND3
CHSGND4

D5
1

10

330

R1
1

+3.3V_LAN

R38

R9

TXCT1

1:1
TDK TLA-7T203LF-T

+3.3V_LAN

41 SPD1000LED#

TXCT3

C20
0.1U/10V

41 IO_LOM_ACTLED_YEL#

22

1:1

RJ-45 Connector

41 SPD100LED#

23

TDCT3

TRD0-

RJ45-TX3-

TX0-

1:1

TRD2+
TRD2TRD3+
TRD3-

RJ45-TX3+

TXCT0

TD2-

TRD0+

Pace 0.1u physically


close to transformer

TRD0-

TRD0+

41

TDCT

41

TDCT0

C21
*1P/50V_NC

C22
*1P/50V_NC

TD0-

24

TDCT

TX0+

TRD3-

MEDIA SIDE

TRD3-

TD0+

41

CHIP SIDE

L45
TRD3+

C17
*1P/50V_NC

TRD3+

C18
*1P/50V_NC

Layout Note:
Route TRD+/- pairs with 100 ohm
differential trace immpedance.

41

Reserved EMI

TRANSFORMER

Q8
DDTA114YUA-7-F

2
10K

SDMK0340L-7-F

TYC_2006250-1
rj45-2006250-13p-v-rm2
R15

330

Title

QUANTA
COMPUTER
LAN SWITCH

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
E

42

of

61

+3.3V_SUS

C432
0.1U

50 VR_PWRGD_CLKEN#

R321

CK_PWRGD_R

15

U12
TC7SZ04FU(T5L,F,T)

14

+3.3V_ALW

46 1.8V_PWRGD

3,48 1.1V_VTT_PWRGD

U54A
3
U54C
SN74AHC08PW

9
8
10

U54B
SN74AHC08PW

52 GFX_CORE_PWRGD

6
5

53 1.12V_PWRGD

SN74AHC08PW

U54D
12
11
13

49 1.05V_PWRGD

HWPG 29

SN74AHC08PW

+3.3V_ALW
U52
74AHC1G08GW

47 1.5V_SUS_PWRGD

4
1

RUN_ON 18,24,46,47,48,49,54

29 RUN_ON_1

R645 1
R646
1
R644
1

2 *0_NC

*10K_NC
2
*10K_NC
2

RUN_ON

RUN_ON_1

QUANTA
COMPUTER

Title

System Reset Circuit

Size

Document Number
RM5

Date:

Thursday, August 20, 2009


7

Rev
3A
Sheet

43

of
8

61

H-C276D118P2-8 * 7

GND
1

GND
1

PV6
HYH_RHC-CP-27G03

H-C236D118P2-8 * 3
H20
H-C236D118P2-8
6
7
5
8
4
9

H5
H-C236D157P2

H3
H-C236D158P2

H4
H-C236D158P2

R6921
R6931
R6941
R6951
R6961
R6971
R6981
R6991

H6
H-C236D158P2

H24
o-rm2-1

hg-c276i118d118p2 * 2

3
2
1

H19
hg-c276i118d118p2
6
7
5
8
4
9

Scott_0703:Add 8pcs 0ohm resistors R692~R699 for thermal issue as EMI concern.
Scott_0707: Reserver R692~R699.
B

H25
hg-c276i118d118p2
6
7
5
8
4
9

*0_NC
*0_NC
*0_NC
*0_NC
*0_NC
*0_NC
*0_NC
*0_NC

3
2
1

H26
H-T295X280B236D118P2

2
2
2
2
2
2
2
2

H-C236D158P2 * 4

h-c236d197p2 * 1
H12
h-c236d157p2

H-T295X280B236D118P2 * 1

Scott_0701:: Added PV6 according to EMI's suggestion

3
2
1

3
2
1

H10
H-C236D118P2-8
6
7
5
8
4
9

3
2
1

H14
H-C236D118P2-8
6
7
5
8
4
9

PV5
HYH_RHC-CP-27G03

GND

PV1
HYH_RHC-CP-27G03

3
2
1

3
2
1

3
2
1

3
2
1

H8
H13
H1
H30
H31
H22
H-C276D118P2-8
H-C276D118P2-8
H-C276D118P2-8
H-C276D118P2-8
H-C276D118P2-8
H-C276D118P2-8
7
6
7
6
7
6
7
6
7
6
7
8
5
8
5
8
5
8
5
8
5
8
9
4
9
4
9
4
9
4
9
4
9
3
2
1

6
5
4

3
2
1

H2
H-C276D118P2-8
7
8
9
3
2
1

6
5
4

h-c236d157p2 * 2

H11
h-c236d157p2

H17
h-c236d157p2

h-c394d260p2 * 1

H-C394D260P2-8 * 1
H7
h-o390x350d256x217p2

Scott_0731: change H7 & H18 footprint as ME change


Scott_0812:Delete H7 Pin2~Pin9 for layout requite.

3
2
1

H18
hg-c394d217p2
6
7
5
8
4
9

h-c236d236n * 2

H29
h-c236d236n

H-C197D118P2-8 * 1
H28
H-C197D118P2-8
7
8
9
3
2
1

6
5
4

H-C197D91P2-8 * 1

h-o205x157d138x91p2 * 1

H27
h-o205x157d138x91p2

3
2
1

H9
H-C197D91P2-8
6
7
5
8
4
9

QUANTA
COMPUTER

Title

PAD & SCREW & SPRING

Size

Document Number
RM5

Date:

Thursday, August 20, 2009


7

Rev
3A
Sheet

44

of
8

61

PQ40
SI4835DDY-T1-E3

PR134
10K

1
3

1
3

PQ29
SI4835DDY-T1-E3

+PWR_SRC

2
4

1
2
3

2
4
PC215
4700P/25V

PR121
100K

PC216
0.01U/25V

FL1
HI1206T161R-10

8
7
6
5
4

+DC_IN_SS

1
2
3

8
7
6
5

PR128
0.01/3720

FL2
*HI1206T161R-10_NC

+DC_IN_SS

PC135
0.1U/50V/0603
3

PR21
470K
FL5
HI1206T161R-10

8731CSSN

PQ17
2N7002W-7-F
8731CSSP

8731LDO
+DC_IN_SS
PD1
SDM10K45-7-F

BST
LDO

21

VCC

26

ACIN

+3.3V_ALW

13

ACOK

11

VDD

8731LX

DLO

20

8731DLO

PGND

19

PR34

1/0603

PQ11
FDS8884

+VCHGR

1
3

1
3

2
4

2
4

+VCHGR 55
PC146

PC145

PC144

PC32

PC138

PC139

PC143
10U/25V/1206

23

PR32
2.2/0805
1
2
3

CSIP

18

CSIN

17

FBSA

15

FBSB

16

IINP

CCV

CCI

CCS

REF

HI1206T161R-10

10U/25V/1206

24

LX

FL4

PR110
0.01/3720

10U/25V/1206

DHI

PL8
MPLC0730L4R7 5.6A/41mOhm)
2
1

*HI1206T161R-10_NC

0.1U/50V/0603

8731_IINP

IINP

PC36
3300P/50V
PC57 1U/10V/0603

FL3

2200P/50V

29

SCL
SDA
BATSEL

PC44
10U/25V/1206

1000P/50V

29,37,55 SMBCLK0
29,37,55 SMBDAT0

0.1U/50V/0603
10
9
14

PC43
10U/25V/1206

3300P/50V

PC81

PC150
0.1U/50V/0603

PQ10
FDS8884

8731DHI

PR45
15.8K/F

PC149
2200P/50V

PC50
0.1U/50V/0603
PR33
33/F/0603

0.01U/25V

29 ACAV_IN

PC151
0.1U/50V/0603

PC67 1U/10V/0603
8731LDO
25

5
6
7
8

28

27

1
DCIN

1
2
3

PC66

5
6
7
8

PR42
10K/F

1
22

8731_ACIN

PC148
2200P/50V

8731BST

CSSN

49.9K/F

GND

PR37

PC60
1U/25V/0805

CSSP

PR36
365K/F

8731LDO

CHG_PWR_SRC

PC35
1000P/50V

PC79
0.1U/10V

PC73
0.01U/25V

PC71
0.01U/25V

8731REF

PC70
0.01U/25V

PC68
1U/10V

8731CSIN
PR39
100
PC54
220P/50V

GND
12

PR44
8.45K/F

PR41
10K/F

DAC

8731CSIP
+VCHGR

MAX8731AETI+
PU4

Frequency(Vadapter-Vbattery>5V)

400K

PC76
0.1U/10V
PR38
2

GND_CHG

Jump20X10

QUANTA
COMPUTER

Title

CHARGER (MAX8731A)
Size

Document Number
RM3

Rev
3A

Date:
A

Sheet

2005/4/21

45

of

61

Loki_0701: Remove all power jumpers

+PWR_SRC
+5V_SUS
PC114

PC12

2200P/50V

0.1U/50V/0603

10U/25V/1206

PC115
1U/10V/0603

PC116

+1.8V_RUN
PU2

PR2
18,24,43,47,48,49,54

84.5K/F

RUN_ON
+1.8V_VFB

PC110
*0.1U_NC

PQ2

V5IN

VBST

10

TRIP

DRVH

+1.8V_DH

EN

SW

+1.8V_LX

VFB

PGOOD

RF

GND

11

PC8

0.1U/50V/0603
D1

G1

S1D2

1.8V_PWRGD 43 3

G2

S2

+1.8V_DL

PL2

3.3u_6.5A_30mOhm_MPLC0730L3R3
Loki_0701: Remove all power jumpers

SI4914DY-T1-E3

TPS51218_DCSR
PR11
100K

PR15
*422K/F_NC

PR16
*2.2_NC

PR7
15.8K/F

+ PC119
PC2
100P/50V
50

PC13
+1.8V_VFB
*2200p/50V_NC

VFB=0.704V
PR83
10K/F

+3.3V_SUS

Frequency(PR6=470K)

220U/2.5V/ESR15

PR6
470K

DRVL

TDC : 2.7A
Peak: 3.9A
OCP: 4.3A

PC120
0.1U
50
0603

300K

Title

+1.8V_RUN(TPS51218)
Size
Date:
5

Document Number
RM5
Thursday, August 20, 2009

Rev
3A
Sheet
1

46

of

61

+PWR_SRC

23

VBST

22

DDR_VBST

DRVH

21

+1.5V_DH

LL

20

+1.5V_LX
+1.5V_DL

COMP

DRVL

19

NC

PGND

18

VDDQSNS CS_GND

17

VDDQSET

5
6
7
8
9

PC51

PC48

PC40

PQ15
*NTMFS4943NT1G_NC
PL10

+5V_ALW

PR131

*0_NC

RUN_ON

10

29,54 SUS_ON

11

18,24,43,46,48,49,54

12

CS

16

S3

V5IN

15

S5

V5FILT

14

NC

PGOOD

13

PU10
TPS51116REGR

PC97
*18P_NC

PR133
76.8K/F

VDDQSET=0.75V
PR132
75K/F

PQ36
NTMFS4935NT1G
DDR_CS

PR119

6.8K/F

PR124

100K

DDR_V5FILT

PR120

+3.3V_SUS

5
6
7
8
9

PR118
2

5.1
0603

PC162
1U/10V/0603

1
2
3

*0.1U_NC

1
2
3

PC94

MPC1040LR45C (0.45UH/25A/1.1mOhm)

+1.5V_SUS

5
6
7
8
9

+5V_ALW

PC105
0.033U
0603
25

+DDR_VTTREF

TDC : 21.5A
Peak: 30.7A
OCP: 33.7A

PC159
2200P/50V
PQ39
NTMFS4935NT1G

PC45

PC49

PC152
330U/2.5V/ESR15

VTTREF

0.1U/50V/0603

PC61

330U/2.5V/ESR15

MODE

PQ16
NTMFS4943NT1G
PC163

PC65

0.1U/50V/0603

5
6
7
8
9

GND

VLDOIN

1
2
3

GND

1
2
3

VTTSNS

PC168
10U/4V/0805

*10U/25V/1206_NC

24

10U/25V/1206

25

+1.5V_SUS

VTT

10U/25V/1206

+0.75V_DDR_VTT

VTTGND

0.1U/50V/0603

TDC : 0.7A

2200P/50V

PC173
PC174
10U/4V/0805 10U/4V/0805

+5V_ALW
PC160
1U/10V/0603

1.5V_SUS_PWRGD 43

(Note 1) Current Limiting Setting :


Rtrip(Kohm)=100*(Iocp-0.5*Iripple)*Rds(on)
Frequency(Fixed)

400K

Title

+1.5V_SUS/+0.75V_VTT(TPS51218)
Size
Date:
5

Document Number
RM5

Rev
3A
Sheet

Thursday, August 20, 2009


1

47

of

61

+PWR_SRC

5
6
7
8

0.1U/50V/0603

2200P/50V

PQ38

PC158

FDS6298
PC84
1U/10V/0603

18,24,43,46,47,49,54

110K

RUN_ON

+1.1V_VTT

TDC : 12.6A
Peak: 18.1A
OCP: 19.9A

V5IN

VBST

10

TRIP

DRVH

EN

SW

+1.1V_VTT_LX

PGOOD

+1.1V_VTT_VFB 4
5

PC103
*0.1U_NC

RF

DRVL

GND

11

PL9

1.1V_VTT_PWRGD 3,43
+1.1V_VTT_DL

PR62
*422K/F_NC

PR40
2
0805

+
PC102
*1500P_NC
50

PR70
10.2K/F

1
2
3

PR65
100K

PC80
2200P/50V
50

PQ37

+
PC38

PC147

+1.1V_VTT_VFB

VFB=0.704V

FDMS8672S

+3.3V_SUS

PR71
20K/F

300K

PC39
0.1U
50
0603

PR68
*0_NC

PR66
137K/F
3

Frequency(PR64=470K)

0.88uH_MPC1040LR88

330U/2.5V/ESR15

TPS51218_DCSR

0.1U/50V/0603

330U/2.5V/ESR15

PR64
470K

VFB

1
2
3

0603
PR58
2.2/0603
PC86
+1.1V_VTT_DH

5
6
7
8
9

PC72

4
PU7

PR135

PC78

10U/25V/1206

PC157

10U/25V/1206

+5V_SUS

VTT_SENSE 5

PR67
100K

VTT_SELECT:
High level 1.05V for Auburndale
Low level 1.1V for Clarksfield

PQ19
BSS138-7-F

+3.3V_SUS
PR180
*10K_NC
3

PR179
2.2K

PQ43
UMT3904

2
1

5 H_VTTVID1

PR178

PC101
0.01U
16

PC214
*0.01U_NC

100K
25

Title

+1.1V_VTT(TPS51218)
Size
Date:
5

Document Number
RM5
Thursday, August 20, 2009

Rev
3A
Sheet
1

48

of

61

Loki_0701: Remove all power jumpers


+PWR_SRC

18,24,43,46,47,48,54

120K/F

RUN_ON
+1.05V_VFB

PC133
*0.1U_NC

V5IN

VBST

10

TRIP

DRVH

+1.05V_DH

SW

+1.05V_LX

PGOOD

DRVL

GND

11

EN

VFB

RF

PL4

2.2UH_8.2A(MPLC0730L2R2)

PR99
1

Loki_0701: Remove all power jumpers

PR103
10.2K/F

+ PC136
PC132
*1500P_NC
50

1
2
3

PQ28
FDS6690AS
PR106
100K

PR100
*422K/F_NC

PC130
1000P/50V

+1.05V_VFB

VFB=0.704V
PR102
20K/F

300K

1.05V_PWRGD 43
+1.05V_DL

TPS51218_DCSR

Frequency(PR101=470K)

TDC : 4.8A
Peak: 6.8A
OCP: 7.5A

0.1U/50V/0603

220U/2.5V/ESR15

PR101
470K

PC134

+1.05V_PCH

PQ27
FDS8884

5
6
7
8

PR105

1
2
3

PU9
7

PC127
10U/25V/1206

PC128
0.1U/50V/0603

PC131
1U/10V/0603
C

PC129
2200P/50V

5
6
7
8

+5V_SUS

PC137
0.1U
50
0603

+3.3V_SUS

Title

+1.05V_PCH(TPS51218)
Size
Date:
5

Document Number
RM5
Thursday, August 20, 2009

Rev
3A
Sheet
1

49

of

61

+VCC_CORE ( MAX17036GTL+ )

1
+
PC161
100U/25V

PC156
*27U_25V_NC

PQ14

TIME

DH1

PR43
2.2/0603

PC64
10U/25V/1206

BST1

30

LX1

29

DL1

27

TON

5
6
7
8
9

PQ35

NTMFS4935NT1G
4

+VCC_CORE

PR30
2.61K/F

1
2
3

PC153
2200P/50V
50

PR31
4.53K/F

PC37
0.1U/50V/0603

PR24
10K/NTC/0603

+ PC27
*330U/2V/E9/7343_NC

PC28
330U/2V/E9/7343

PC91
*1000P/50V_NC

VID0
VID1
VID2
VID3
VID4
VID5
VID6

32
33
34
35
36
37
38

D0
D1
D2
D3
D4
D5
D6

29 IMVP_VR_ON

13

SHDN

5
5
5
5
5
5
5

PR113
2
0805

LG1
1
2
3

16

5
6
7
8
9

PC75
0.22U/25V/0603

PR49
200K/F
+PWR_SRC

45W CPU
TDC : 40A
Peak: 52A
OCP :57A

PC56
10U/25V/1206

PL7
0.36UH (ETQP4LR36AFC)

PH1

ILIM

1
2
3

UG1

28

Loki_0813: change PR56 from 7.5K to 8.66K for component


tolerance and OCP up to 65A
5

PC53
0.1U/50V/0603

VDD

PR56
8.66K/F

VCC

PR59
133K/F

PC59
2200P/50V

NTMFS4943NT1G
4

26

PC74
2.2U/6.3V/0603

5
6
7
8
9

+
PC169
*27U_25V_NC

+
PC171
*27U_25V_NC

1
+

PC92
2.2U/6.3V/0603

Loki_0813: De-pop PC171, PC169 and PC156 because


acoutic noise is passed

+5V_RUN
PR57
10/0603

+PWR_SRC

CSP1

PR125
2.2/0603

CSN1

PQ34

CSP1

39

PC164
0.22U/25V/0603

*NTMFS4935NT1G_NC

CSN1

40

+PWR_SRC
PR51
499/F

*1000P/50V_NC
PC90

BST2

21

LX2

22

PQ13

PR46
2.2/0603
+3.3V_RUN
10K
PR116

29 IMVP_PWRGD

15

PSI

18

PWRGD

NTMFS4943NT1G
UG2
4

PC46
0.1U/50V/0603

PC77
0.22U25V/0603

THRM

PC85
*1000P/50V_NC

+3.3V_RUN

PR54
2.2/0603
25

29 IMVP6_PROCHOT#

VRHOT
CSN2

PR123
1K/F
4

I_MON

PC93
0.22U/25V/0603

11

IMON

PC213
+

PC320
+

FBAC

FB

4
PR28
2.61K/F

4
PC155
2200P/50V
50

PR29
4.53K/F

+VCC_CORE

PR23
10K/NTC/0603

PC41
0.1U/50V/0603

+ PC142
PC29
330U/2V/E9/7343
*330U/2V/E9/7343_NC

PQ32

CSN2

10

*NTMFS4935NT1G_NC

VSSSENSE 5
10
PR127
PR130
10

PC166
PR55
*1000P/50V_NC
6.49K/F
PR117
1.91K/F

PR112
2
0805

PC95
1000P/50V

*1000P/50V_NC
PC87
GNDS

PR122
16.5K/F

VSSSENSE
Loki_0813: change PR122 from 14.7K to 16.5K and
PC167 from 0.1u/0402 to 0.027u/0603 for Imon
transient test

NTMFS4935NT1G
4

CSP2

12

1
2
3

CSP2

PR114
499/F

PQ33
LG2

PR60
*NTC_100K_NC

5
6
7
8
9

+5V_RUN
Loki_0813: change pull up resistor from 68R to 499R
and connect to 3.3V_RUN from 1.1V_VTT, align with FM9

24

1
2
3

DL2

5
6
7
8
9

PR61
13K/F

PC167
0.027U/25V

PC63
10U/25V/1206

PL6
0.36UH (ETQP4LR36AFC)
PH2

PC55
10U/25V/1206

H_PSI#

PC47
2200P/50V

1
2
3

5
6
7
8
9

23

100U/25V

PC208
DH2

*100U/25V_NC

DPRSLPVR

100U/25V

14

5 DPRSLPVR

VCCSENSE 5

+3.3V_RUN

+PWR_SRC
17

43 VR_PWRGD_CLKEN#

CLKEN

1000P/50V
PC96

PR47
1K

PR48
100K

PC88
*1000P/50V_NC

2
6
3
9

VDD
PWM
SKIP
GND
PAD

PC82
0.22U/25V/0603

BST

DH

UG3

LX

PH3

DL

NTMFS4935NT1G
4

PR126
2.2/0603

MAX17036GTL+

PC165
0.22U/25V/0603
A

PR111
2
0805

PR25
2.61K/F

1
2
3

PU5

PQ31

PC62
10U/25V/1206

PL5
0.36UH (ETQP4LR36AFC)

LG3

MAX8791GTA+
CSP3

PC69
10U/25V/1206

PC154
2200P/50V
50

PR26
4.53K/F

+VCC_CORE

PU6
5

17030_PWM3
17030_SKIP#

PC52
0.1U/50V/0603

19

PC58
2200P/50V

5
6
7
8
9

DRVSKP

PQ12

NTMFS4943NT1G
4

1
2
3

PGD_IN

PR52
2.2/0603
PC83
1U/10V/0603

1
2
3

31

20

5
6
7
8
9

PWM3

5
6
7
8
9

+5V_RUN

+3.3V_RUN

PR22
10K/NTC/0603

PC42
0.1U/50V/0603

+ PC141
330U/2V/E9/7343
PC140
*330U/2V/E9/7343_NC
A

PQ30
EP

CSN3

41

CSP3
*1000P/50V_NC
PC89

SJ1
2

*NTMFS4935NT1G_NC

CSN3

Title
AGND_VCORE

+VCC_CORE(MAX17030)
Size
Date:

Document Number
RM5

Rev
3A
Sheet

Thursday, August 20, 2009


1

50

of

61

PC180

10U/25V/1206

0.1U/50V/0603

2200P/50V

PD8
UDZSTE-175.6B

PR153
*0_NC

+5V_VCC1

PC187
4.7U/25V/0805
PR163
*0_NC

ISL6237_ONLOD

PR155
200K/F

+3.3V_ALW

1
2
3

42
8
7
6
5
4
3
2
1
POK1

8
7
6
5

PR149
287K/F
+5V_EN1

PQ47
FDS6690AS

3
2
1

PC183
*2200P/50V_NC

PC184
0.1U/50V/0603

+5V_DL

PAD
LDOREFIN
LDO
VIN
RTC
ONLDO
VCC
TON
REF

PAD
PAD
PAD

0.1U/50V/0603

220U/6.3V/ESR25

PAD
PAD
PAD
PAD
BYP
OUT1
FB1
ILIM1
PGOOD1
ON1
DH1
LX1
PAD
PAD

PR152
1/0603

PL13
SIL1045R-3R3A (8A/21mOhm)

+3.3V_LX

REFIN2
ILIM2
OUT2
SKIP#
MAX17020ETJ+ PGOOD2
ON2
DH2
LX2
PU11

32
31
30
29
28
27
26
25

PR162
475K/F
PR157
*2.2/F/0603_NC

5
6
7
8

41
40
39
38
9
10
11
12
13
14
15
16
37
36

POK2
+3.3V_EN2
+3.3V_DH

+
PC182
0.1U/50V/0603

1
2
3

+5V_LX

PR142
*2.2/F/0603_NC

PQ48
FDS8884

BST1
DL1
VDD
SECFB
AGND
PGND
DL2
BST2

3
2
1

+5V_DH

PL12
SIL1045R-3R3A (8A/21mOhm)

PC176

TDC : 7.7A
Peak: 11A
OCP: 12.1A

PR167
*0_NC

*0_NC

PC195
0.1U/50V/0603

PC181
220U/6.3V/ESR25

PC193
*2200P/50V_NC

PQ45
FDS6690AS

PR159
1/0603

17
18
19
20
21
22
23
24

+5V_ALW

35
34
33

8
7
6
5

PQ44
FDS8884

PC186

PC196

PR164

TDC : 4.9A
Peak: 7.0A
OCP: 7.7A

PC177

PR165
*0_NC

0.1U/10V

PC191
1U/6.3V

PC192
1U/10V/0603

PC190
ISL6237_ONLOD 0.1U/50V/0603

PC188

5
6
7
8

PR154
68K

PC185

10U/25V/1206

PC178

PR160
10/0603

2200P/50V

PC179

+5V_ALW2

0.1U/50V/0603

+PWR_SRC

+3.3V_DL
PR151
*0_NC

+5V_ALW2

PR156
2

PC189
1U/10V/0603

Jump20X10
+3.3V_ALW

PD9
1
BAT54S-7-F
2
+15V_ALW
B

PC200
0.1U/50V/0603

PQ52

BAT54S-7-F
+15V_ALWP

47K

PR148
100K

PR161
100K

POK2

PC199
0.1U/50V/0603

PD10
1

DDTA114YUA-7-F

PC198
0.1U/50V/0603
3

+3.3V_ALW

POK1

10K
3

PC201
0.1U/50V/0603

PQ51
2N7002W-7-F

TON

Frequency

GND

OUT1@400K , OUT2@500K

VCC

OUT1@200K , OUT2@300K

OPEN

OUT1@400K , OUT2@300K

+3.3V_ADM1032A

+5V_ALW2

PR150

39K/F

PQ46
2N7002W-7-F
1

PR158
+3.3V_EN2

29 5V_ALW_ON

PR143

+5V_EN1
200K/F

PD7
2

PR144

1SS355
1

2
2

PU 10K at Page 22 (GPU


Thermal Monitor side)
MB_THERM# 20

Jump20X10
1 1

THERM_STP# 29,37

Jump20X10
1

H_THERMTRIP# 3

PR174

*0_NC

Title

QUANTA
COMPUTER
+3.3V/+5V/+15V (MAX17020)

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
1

51

of

61

+5V_SUS

+PWR_SRC

Scott_0819:Change PU1 library as DFx review.

*0_NC

8792SKIP# 12

PC1
0.1U/10V/X5R/0402

8792REFIN 10

BST

8792BST

PR8

PQ3
NTMFS4821NT1G
4

200K/F

SKIP#

LX
PU1
MAX8792ETD+T

8792LX

DL

8792DL

FB

REFIN

1
0603

REF

ILIM

15

PR5
20K/F

PR13

+VCC_GFX_CORE

PQ1
NTMFS4821NT1G

TDC : 27.5A
Peak: 37.6A
OCP: 39A

1
2
3

0.22U
25
0603

1
2
3

PR10

PGOOD
EN

PC4

PL1
ETQP4LR36AFC (0.36UH/28A/0.76mOhm)
+VCC_GFX_CORE_P

4
8792ILIM

PR88
1
0805

PQ24
NTMFS4833NT1G

PC219
*4700P_NC
25

Short Jump

PR9
75K/F

+
PC118
0.1U/50V/0603

PC10
*470u/2V/ESR6_NC
+
PC112
470u/2V/ESR6

PC303
470u/2V/ESR6
+

PC113
1000P/50V
50
PQ23
NTMFS4833NT1G

EP

11

VCC

REF-2V
8792REF

5
6
7
8
9

8792DH

5
6
7
8
9

8792TON

5
6
7
8
9

PR12

DH

PC109

1
2
3

14
1

20,29,53 GFX_ON

TON

5
6
7
8
9

8792PGD

43 GFX_CORE_PWRGD

13

VDD

1
2
3

2
8792VCC

PC7

10U/25V/1206

1U/10V/0603

PC111

10U/25V/1206

1U/10V/0603

PC5

PC9

10U/25V/1206

PC6
PR4
100K

PC11

0.1U/50V/0603

PR173
*0_NC

+3.3V_SUS

2200P/50V

Place near GND pin15

PC3
1000P
50

PR80
133K/F

PR3
100K
PQ22
BSS138-7-F

17 GFX_CORE_CNTRL0
PC117
0.01U
16

Frequency(PR8=200K)

GFX_CORE_CNTRL0

300K

PR1
30.9K/F

PR89
100K

PR87
133K/F

GFX_CORE_CNTRL1

GFX_CORE_CNTRL2

+VCC_GFX_CORE

LOW

LOW

LOW

1.2V

HIGH

LOW

LOW

1.1V

HIGH

HIGH

LOW

1.0V

HIGH

HIGH

HIGH

0.9

PQ21

17 GFX_CORE_CNTRL1

BSS138-7-F

PQ7

PC108
0.01U
16

FDS6298

PR81
100K

9
8
7
6
5

+1.5V_SUS

PC20
0.1U

+1.1V_GFX_PCIE
TDC : 2.2A

PC22
10U

3
2
1
B

+1.1V_GFX_PCIE

PR77
91K/F
PQ20

PC107
0.01U
16

BSS138-7-F
GFX_ON

PR76
100K

PGD

EN

VCC

RT9024PE
DRV 5

FB

PC24
100P

PR18
20K/F

PC23
22U

PC21
22U

0.8V

+5V_ALW

GND

PU3

17 GFX_CORE_CNTRL2

PC25
0.1U

PC26
1U/10V/0603

PR20
49.9K/F

Title

+VGA_M97(MAX8792)
Size
Date:
5

Document Number
RM5

Rev
3A

Thursday, August 20, 2009

Sheet
1

52

of

61

+1.12V_PWR_SRC

+PWR_SRC
PJP4
jumper

20,29,52 GFX_ON

PR94

V5IN

VBST

10

PR91

*51.1K_NC 2

TRIP

DRVH

+1.12V_DH

SW

+1.12V_LX

PGOOD

DRVL

*0_NC
+1.12V_VFB

PC124
*0.1U_NC

EN

VFB

RF

+VDDCI_M97
C

*0.1U/50V/0603_NC
PL3

PJP5
jumper

*3.3u_6.5A_30mOhm_MPLC0730L3R3_NC
+1.12V_VDDCI_P

1.12V_PWRGD 43
+1.12V_DL

PR90
*2.2/F/0603_NC

11
4

PR96
*12.1K/F_NC

+ PC122
PC126
*1500P_NC
50

1
2
3

PQ25
*AO4712_NC
PR92
100K

PR98
*422K/F_NC

PC121
*2200p/50V_NC

+1.12V_VFB

VFB=0.704V
PR95
*20K/F_NC

*220U/2.5V/ESR15_NC

GND
PR97
*470K_NC *TPS51218_DCSR_NC

PQ5
*AO4496_NC

TDC : 2.8A
Peak: 4.0A
OCP: 4.4A

5
6
7
8

PR93

0603
*0_NC
PC123

1
2
3

PU8

PC19
*10U/25V/1206_NC

PC17
*0.1U/50V/0603_NC

PC125
*1U/10V/0603_NC
C

PC18
*2200P/50V_NC

5
6
7
8

+5V_SUS

PC14
*0.1U_NC
50
0603

+3.3V_SUS

Frequency(PR97=470K)

300K

Title

+VDDCI_M97(TPS51218)
Size
Date:
5

Document Number
RM5
Thursday, August 20, 2009

Rev
3A
Sheet
1

53

of

61

+5V_ALW2

+5V_ALW
PQ56
FDS8884

+15V_ALW

8
7
6
5

PR171
100K

+5V_RUN

RUN_ENABLE_5V

+5V_ALW2

+5V_RUN
TDC :0.791A

3
2
1

+15V_ALW

PR168
100K

SUS_3.3V_ENABLE

PC204
4700P
25

+1.5V_SUS

+1.5V_GDDR
PQ26
SI4430BDY-T1-E3
3
2
1

8
7
6
5

8
7
6
5

PC203
0.1U
0603
50

+5V_ALW PQ57
+5V_SUS
SI2304BDS-T1-E3
3

PR172
100K

+5V_SUS
TDC : 42mA

SUS_ENABLE_5V

+1.5V_SUS

SUS_ON#

PQ58
2N7002W-7-F

PC207
4700P
25

PC206
0.1U
0603
50

+1.5V_RUN

PQ8

FDS8884
8
7
6
5

PR27
100K

PC202
4700P
25

+1.5V_GDDR
TDC : 8.68A

PC16
0.1U
0603
50

+15V_ALW

PQ53B
2N7002DW-7-F

PQ53A
2N7002DW-7-F

PQ6
SI4430BDY-T1-E3
3
2
1

PC15
4700P
25

PQ4
2N7002W-7-F

3
2
1

RUN_ENABLE_1.5V_GDDR
RUN_ON#

+15V_ALW
4

PR17
47K

+3.3V_SUS
TDC : 0.89A

+15V_ALW

+3.3V_SUS

Loki_0701: change to FDS8884 from SI4800BDY

6
5

29,47 SUS_ON

PQ55A
2N7002DW-7-F

SUS_ON#

RUN_ON

18,24,43,46,47,48,49

PC205
0.1U
0603
50

PQ55B
2N7002DW-7-F

RUN_ON#

8
7
6
5

PR169
100K

6
A

+3.3V_ALW
PQ54
FDS8884

Loki_0701: change to FDS8884 from SI4800BDY

PR170
100K

Loki_0701: change to FDS8884 from SI4800BDY

RUN_ENABLE_1.5V_RUN

+1.5V_RUN
TDC : 1.05A

3
2
1

RUN_ON#

PC34
4700P
25

PQ9
2N7002W-7-F

+15V_ALW

+3.3V_ALW

PQ49
FDS8880_NL

PC33
0.1U
0603
50

+3.3V_RUN

+3.3V_RUN
TDC : 6A

8
7
6
5

PR166
100K

RUN_ENABLE_3.3V

3
2
1

RUN_ON#

PC197
4700P
25

PQ50
2N7002W-7-F

PC194
0.1U
0603
50

Reserve discharge path


+1.5V_SUS

+3.3V_SUS

R667
*1K_NC

R669
*1K_NC

R663
*30/F_NC

R665
*1K_NC

+5V_SUS

+0.75V_DDR_VTT

R664
*1K_NC

R662
*1K_NC

R659
*10_NC

R670
*10_NC

+1.5V_RUN

+1.8V_RUN

+3.3V_RUN

+5V_RUN

Q74
*2N7002W-7-F_NC

Q76
*2N7002W-7-F_NC

Q78
*2N7002W-7-F_NC

Q77
*2N7002W-7-F_NC

SUS_ON#

Q75
*2N7002W-7-F_NC

Q73
*2N7002W-7-F_NC

Q72
*2N7002W-7-F_NC

Q79
*2N7002W-7-F_NC

RUN_ON# 2

Title

QUANTA
COMPUTER
RUN POWER SW

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
5

54

of

61

PC30

2200P/50V

PC31

0.1U/50V/0603

PD4
DA204U

PD3
DA204U

3300P/50V
1

PC319

+3.3V_ALW

4700P/25V

PC318

0.01U/25V

PC317

PD2
DA204U

+3.3V_ALW

CN22
BATT1+
BATT2+
SMB_CLK
SMB_DAT
BATT_PRES#
SYSPRES#
BATT_VOLT
BATT1BATT2-

PR108
100K

+VCHGR

1
2
3
4
5
6
7
8
9

PRP1
3
1

4P2R-100
4
2

PR109

FOX_BP02096-B51F5-7F
BAT-200045MR009H588ZR-9P-R-V

SMBCLK0 29,37,45
SMBDAT0 29,37,45
PBAT_PRES# 29

100

PC99

0.1U

PC211

0.01U/25V

PC100

1000P/50V

PC209

6800P/50V

PC98

2200P/50V

PC210

4700P/25V

PQ41
SI4835DDY-T1-E3

+DC_IN

+DC_IN_SS
CN27
Adapter1+

Adapter2+

2
3
4

Adapter2-

FL7
BLM41PG600SN1L
1
2

FL6
BLM41PG600SN1L
1
2

Adapter_DCIN-

1
2
3
PC104
0.47U/25V/0805

8
7
6
5

PR73
240K

PC175
0.01U/25V

PR137
10K/F/0603

PC172
0.1U/50V/0603

PC170
4.7U/25V/0805

PC106
0.1U/50V/0603

PSID
Adapter1-

Adapter_DCIN+

3300P/50V

PC212

100K
PRV1
*VZ0603M260AGT_NC

PR74

+5V_ALW2

PC217
PC218
4700P/25V 0.01U/25V

PQ42
FDV301N

PL11
BLM11B102S
1
2

DOCK_PSID

PD6
DA204U

PR138
2.2K

PR139
33

PS_ID 29

+3.3V_ALW
3

PRV2
*VZ0603M260AGT_NC
1

MLX_87437-0573
87437-0543-5p-r

PR141
100K/F
PR75

10K

+5V_ALW2

PD5
*SSM24PT_NC

PQ18

2
1

MMST3904-7-F
4

PR140
15K/F
Title

QUANTA
COMPUTER
DCIN & Batt

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
E

55

of

61

CPU XDP
CN6
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59

3 XDP_PREQ#
3 XDP_PRDY#
3 XDP_OBS0
3 XDP_OBS1
3 XDP_OBS2
3 XDP_OBS3

3 XDP_OBS4
3 XDP_OBS5
3 XDP_OBS6
3 XDP_OBS7
+1.1V_VTT

C302
*0.1U/10V_NC

3,10 H_CPUPWRGD
3 H_PWRGD_XDP
9 PCH_SMBDATA
9 PCH_SMBCLK

R177
T11 PAD
R1731

1K

H_CPUPWRGD_XDP
PM_PWRBTN#_R

2 0_0402
PCH_SMBDATA
PCH_SMBCLK

3 XDP_TCLK

GND0
OBSFN_A0
OBSFN_A1
GND2
OBSDATA_A0
OBSDATA_A1
GND4
OBSDATA_A2
OBSDATA_A3
GND6
OBSFN_B0
OBSFN_B1
GND8
OBSDATA_B0
OBSDATA_B1
GND10
OBSDATA_B2
OBSDATA_B3
GND12
PWRGOOD/HOOK0
HOOK1
VCC_OBS_AB
HOOK2
HOOK3
GND14
SDA
SCL
TCK1
TCK0
GND16

GND1
OBSFN_C0
OBSFN_C1
GND3
OBSDATA_C0
OBSDATA_C1
GND5
OBSDATA_C2
OBSDATA_C3
GND7
OBSFN_D0
OBSFN_D1
GND9
OBSDATA_D0
OBSDATA_D1
GND11
OBSDATA_D2
OBSDATA_D3
GND13
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND15
TDO
TRSTN
TDI
TMS
GND17

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

+1.1V_VTT

+3.3V_RUN

C651
*0.1U_NC

R491

R496

51

1K

BCLK_ITP 3
BCLK_ITP# 3
H_CPURST#
XDP_DBRESET#

H_CPURST# 3
XDP_DBRESET# 3,7
XDP_TDO 3
XDP_TRST# 3
XDP_TDI 3
XDP_TMS 3
H_CPURST#

R500

*0_NC

PLTRST#

PLTRST# 3,9,16,26,28,29,31,32,41

*Samtec BSH-030-01_NC

PCH XDP

DEL PCH XDP as FM9 confirmed with


Intel that its not necessary!
B

Title

QUANTA
COMPUTER
XDP Connector

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
1

56

of

61

(2)

AC : DC_IN -> DC_IN_SS -> +PWR_SRC


Bat : +VCHGR -> +PWR_SRC
+5V_ALW2, +3.3V_ALW

(3)

MAIN_PWR_SW#

(4)

5V_ALW_ON

(5)

+5V_ALW -> +15V_ALW

(6)

SUS_ON

(7)

All SUS power & PWRGD

(8)

SIO_PWRBTN#, PCH_RSMRST#

(9)

SIO_SLP_S5#, SIO_SLP_S3#

(1)

RM5 Power Design Block Diagram 2009/02/25


(1)

(1)

+DC_IN_SS

+PWR_SRC

(1)

Power Jack

+DC_IN

+5V_VCC1 (from +5V_ALW2)

SYSTEM POWER

Adapter input

SI4835

SI4835
(2)

Charger

(4)

+5V_ALW2(for +3.3V_ALW)

LDO

(2)

+3.3V_ALW

(2)

+5V_ALW

MAX17020

VR

5V_ALW_ON
Page 51

MAX8731A

+5V_ALW2

(5)

+5V_ALW

Diode & Cap

+15V_ALW

(5)

Page 51

POK2 (+3.3V_ALW)

(11) All RUN power & PWRGD

POK1 (+5V_ALW)

(12) HWPG

Page 45

(13) IMVP_VR_ON
(14) IMVP_PWRGD

+5V_SUS

(15) CLK_PWRGD

+VCHGR (1)

PCH CORE POWER

(1)
+PWR_SRC

Battery

(10)

RUN_ON

+1.05V_PCH
VR

TPS51218

(16) RESET_OUT#

(11)

1.05V_PWRGD

(17) PCH_PWRGD

(11)

(18) H_CPUPWRGD

+5V_SUS

Page 49

SI4835

(19) PLTRST#
+VCC_GFX_CORE

VGA POWER
(10)

+5V_ALW
(5)

+5V_ALW

S12304

+5V_SUS

(6)

SUS_ON
(10)

SUS_ON

VR

+3.3V_ALW

SI4800

+3.3V_SUS

1.5V_SUS_PWRGD

TPS51116
RUN_ON
Page 47

(2)

+1.5V_SUS

DDR POWER

(7)

Page 54
(6)

LDO

+0.75V_DDR_VTT

GFX_RUN_ON

MAX8792ETD+

(7)

(11)

+5V_SUS

(10) GFX_RUN_ON

+5V_SUS

SI4800

+5V_RUN

(11)

(10)

Page 54

(2)

TPS51218

RUN_ON

+1.1V_VTT
VR

TPS51218

1.1V_VTT_PWRGD

+5V_SUS
Graphics
(10) RUN_ON

FDS8880 +3.3V_RUN

(11)

+5V_RUN

TPS51218

+3.3V_RUN

SI4430

+1.5V_GDDR

IMVP_VR_ON

MAX17030

(11)

IMVP_PWRGD

Reset Circuit
Page 43

SI4430

+1.5V_RUN

(10)

(11)

Page 54

(7)
(11)

RUN_ON

(11)
(11)
(3)
MAIN_PWR_SW#

5V_ALW_ON
SUS_ON

EC
IT8512

Page 31
(12)

(6)
(8)

PCH_RSMRST#

(8)

SIO_SLP_S5#

(9)

SIO_SLP_S3#

(9)

RUN_ON_1

CLK_PWRGD (15)

(4)

SIO_PWRBTN#

(17)

RESET_OUT#

(14)
(16)

PCH

1.5V_SUS_PWRGD
RUN_ON_1

74AHC1G08GW

RUN_ON

(10)

1.8V_PWRGD
1.1V_VTT_PWRGD
1.12V_PWRGD

SN74AHC08PW

HWPG

(12)

GFX_CORE_PWRGD
1.05V_PWRGD
IMVP_PWRGD
RESET_OUT#

74AHC1G08GW

PCH_PWRGD

(17)

H_CPUPWRGD (18)
A

CPU
Page 11~14

(10)

Page 3~4

PLTRST# (19)

IMVP_PWRGD

(11)

CLK GEN
Page 17

PCH_PWRGD

HWPG
IMVP_VR_ON

(14)

(11)

(15)

Page 50

RUN_ON

+1.5V_SUS

(11)

(15)

(7)

(10)

1.8V_PWRGD

Page 46

+VCC_CORE
VR

TWO PHASE
SOLUTION

Page 54

(7)

+1.8V_RUN
VR

CPU POWER

RUN_ON

+1.5V_SUS

(10)

(11)

(11)

Page 48

(14)
(7)

(11)

(11)

Page 54

1.12V_PWRGD

RUN_ON

+3.3V_ALW

(10)

+VDDCI
VR

Page 53

+5V_ALW

(10)

Graphics

SUS_ON

(11)

(7)

(7)

CPU Mem Control


(5)

GFX_CORE_PWRGD

VR

(11)

Page 52

Page 54
(6)

(10) RUN_ON_1, RUN_ON, GFX_RUN_ON

(13)

Title

QUANTA
COMPUTER
Power Block Diagram

(16)

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
1

57

of

61

+3.3V_SUS
+3.3V_RUN

2.2K

2.2K

2.2K

2.2K

+3.3V_RUN
H14

PCH_SMBCLK

C8

PCH_SMBDATA

MEM_SCLK

7002

30

MINICARD-WLAN
/WWAN/WPAN

MEM_SDATA 32
7002
7

+3.3V_RUN

EXPRESS CARD

8
13

Fall Sensor

14

SO-DIMM
+3.3V_SUS

51
53

PCH
2.2K

XDP

2.2K

G6

SMB_CLK_ME0

G8

SMB_DATA_ME0

+3.3V_SUS
+3.3V_ALW

2.2K

10K

2.2K

10K

+3.3V_SUS
E10

SMB_CLK_ME1

G12

SMB_DATA_ME1

7002

SMBCLK1

115

SMBDAT1

116

EC

7002

+3.3V_ALW

+3.3V_SUS
+3.3V_RUN
32

2.2K

10K

2.2K

10K

31

CLOCK

+3.3V_RUN
110

SMBCLK0

111

SMBDAT0

7002

THERMAL
(EMC1422)

7002
C

+3.3V_RUN
9
10
100
+3.3V_ALW

3
+3.3V_SUS

SIO
ITE8502

10K

10K

2.2K

CHARGER

BATTERY

100

2.2K

+3.3V_SUS
115

SMBCLK1

116

SMBDAT1

SMB_CLK_ME1 115

7002

SMB_DATA_ME1 116

PCH

7002

+3.3V_SUS
6
5

LCD

+3.3V_ADM1032A

+3.3V_ADM1032A
D

+3.3V_ALW

4.7K

4.7K
D

7002

GPU THERMAL

7002
2.2K

+3.3V_ADM1032A

2.2K

117

SMBCLK2

31

118

SMBDAT2

28

DB

MMB
Title

QUANTA
COMPUTER
SMBUS BLOCK

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
8

58

of

61

POWER STATES
Signal

SLP_
S3#

SLP
_S4#

SLP
_S5#

S4
_STATE#

S0 (Full ON) / M0

HIGH

N/A

HIGH

N/A

S3 (Suspend to RAM) / M-OFF

LOW

N/A

HIGH

S4 (Suspend to DISK) / M-OFF

LOW

N/A

S5 (SOFT OFF) / M-OFF

LOW

N/A

State

ALWAYS
PLANE

SUS
PLANE

RUN
PLANE

ON

ON

ON

ON

N/A

ON

ON

OFF

OFF

HIGH

N/A

ON

OFF

OFF

OFF

LOW

N/A

ON

OFF

OFF

OFF

PCH
IBEX PEAK-M

PM TABLE
+RTC_CELL

power
plane

+DC_IN

+5V_ALW

+VCC_CORE

+3.3V_RUN_CARD

+DC_IN_SS

+15V_ALW

+0.75V_DDR_VTT

+3.3V_CARD

+PWR_SRC

+5V_SUS

+1.05V_PCH

+5V_RUN

+CPU_PWR_SRC

+3.3V_SUS

+1.1V_GFX_PCIE

+LCDVCC

+5V_ALW2

+3.3V_LAN

+1.2V_LOM

+5V_HDD

+MMB_PWR

+3.3V_CARDAUX

+1.5V_RUN

+5V_MOD

+3.3V_ALW

+1.8V_SUS

+1.5V_CARD

+5V_SPK_AMP

+1.5V_SUS

+1.8V_RUN

+VDDA

+3.3V_RUN

+GFX_PWR_SRC

DESTINATION

USB PORT#

CLOCKS

Side pair Top / left

Side pair Bottom / left

USB W/ E-SATA port

Reserved

Mini Card (WLAN)

Mini Card (WWAN)

Reserved

Reserved

Mini Card (WPAN)

TV

10

Express Card

11

Camera

+3.3V_DELAY

State

+3.3V_R5C833

S0

ON

ON

ON

ON

S3

ON

ON

ON

OFF

PCI EXPRESS

S5 & S4 with
AC or BAT

ON

ON

OFF

OFF

Lane 1

Mini Card-1 WWAN

no AC/Battery

ON

OFF

OFF

OFF

Lane 2

Mini Card-2 WLAN

Lane 3

Mini Card-3 WPAN

Lane 4

Express Card

Lane 5

Cardreader

Lane 6

LOM

PCH
IBEX PEAK-M

PCI TABLE
PCI DEVICE

IDSEL

REQ#/GNT#

PIRQ

NONE

DESTINATION

Title

QUANTA
COMPUTER
Power statu

Size

Document Number
RM5

Date:

Thursday, August 20, 2009

Rev
3A
Sheet
1

59

of

61

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