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c dch t ti liu slla284 - Digital Isolator Design Guide, Texas Instruments.

HNG DN THIT K MCH


CHO DNG DIGITAL ISOLATOR CA TI
(Cch ly s)

Ti liu ny trnh by v cc nguyn tc hot ng ca dng


cch ly s ISO72xx ca hng TI vi k thut cch ly mi hot
ng tt trong di bng thng rng t DC cho ti 150Mbps.
L mt gii php cch ly hu hiu trong nhu cu truyn
d liu tc cao.
Ti liu ny cng hng dn cch thit k PCB vi nhiu
EMI thp (nhiu in t), l nhng thng tin quan trng khi
thit k cc PCB chy tn s cao.

c dch t ti liu slla284 - Digital Isolator Design Guide, Texas Instruments.

Hng dn thit k ny gip nhng ngi thit k mch cch ly bt u lm quen vi


dng digital isolators ISO 72xx ca hng TI (Texas Instruments) - trong thi gian nhanh
nht. Ti liu ny gii thch cc nguyn tc hot ng c bn ca mt Isolator, gi v
tr t Isolator trong thit k h thng, v nhng hng dn thit k 1 board mch
tng hp in t (Electromagnetic Compatible - EMC).
Xem thm cc thng tin trong datasheet ca dng ISO72xx v ISO72xx EVM Manuals.
1. Nguyn tc hot ng:
Isolator trong hnh 1 da vo ro cch ly bng in dung (capacitive isolation barrier
technique). Thit b gm 2 knh d liu, knh tn s cao vi bng thng t 100 kbps
150Mbps, v mt knh tn s thp vi bng thng t 100 kbps tr xung ti DC.
V nguyn l, mt tn hiu n a vo HF-channel c tch thnh tn hiu vi phn
thng qua cng o (inverter gate) ti ng vo. H thng Capacitor-Resistor ly vi phn
tn hiu tc thi ti thi im . Tn hiu sau c chuyn i thnh xung vi phn
bi 2 b so snh (comparators). Ng ra ca comparator li mt cng NOR flip-flop c
chn ra l mt ng ra ca multiplexer. Mt Decision logic (DCL) ti ng ra c li
ca con flip-flop s tnh khong thi gian gia 2 ln ly tn hiu tc thi. Nu khong
thi gian gia 2 ln lin tip tc thi vt qu mt khong thi gian xc nh gii hn,
(vd trong trng hp LF signal), DCL s buc ng ra ca Multiplexer chuyn t HF
sang LF channel.

Tn hiu tn s thp LF c iu ch xung (PWM) vi sng mang ca mt b dao


ng ni, do , to ra mt tn hiu c tn s ln vt qua ro in dung. Khi
u vo c iu ch, mt b lc thng thp (LPF- low-pass filter) s loi b cc
tn hiu tn s cao t tn hiu thu c trc khi a qua ng ra ca Multiplexer.
c dch t ti liu slla284 - Digital Isolator Design Guide, Texas Instruments.

1.1 Hot ng ca knh tn s cao HF-Channel


Hnh 2 biu din HF-Channel v dng sng ti cc thi im c bit ca chui tn
hiu. Tn hiu a vo b tch thnh 2 tn hiu A v A\. Mi tn hiu li b vi phn thnh
cc tn hiu tc thi B v B\. Comparators so snh tn hiu vi phn tc thi vi nhau.
Khi ng vo dng ca comparator c in th cao hn ng vo m, ng ra ca
comparator c gi tr High,hn na n cn bin i tn hiu tc thi thnh mt xung
ngn ti ng ra.

Xung ra ca comparator s set hoc reset NOR-gate flip-flop. T bng chn tr, ta thy
cu hnh NOR-gate biu din mt flip-flop o (Inverting flip-flop), ngha l mt tn hiu
High ti ng vo C s set ng ra D\ High, cn tn hiu High ca C\ set D High. Khi c 2
tn hiu vo (C & C\) u mc Low, th comparator s gi gi tr cui cng ca ng ra
D. V tn hiu D\ ging vi tn hiu vo, D\ s l ng ra ca HF-Channel v c ni
vo ng ra ca Multiplexer.
c dch t ti liu slla284 - Digital Isolator Design Guide, Texas Instruments.

1.2 Hot ng ca knh tn s thp LF-Channel


LF-Channel s c qua iu ch vi sng mang tn s cao, vi mc High chim
90:10 chu k nhim v (duty cycle), mc low chim 10:90 chu k nhim v ti v tr A.
T y tn hiu c x l nh l tn hiu tn s cao. Nhng ng ra D phi qua mt
LPF trc khi a qua ng ra ca multiplexer to tn hiu nh ban u.

2. K thut cch ly v nhng yu cu cn thit


K thut cch ly ny chng t c kh nng truyn ti d liu trong mt di tn rng
(t tn hiu DC n hn 150Mbps), do Texas Instruments ch to cc linh kin cch
ly truyn d liu theo mt v hai chiu, vi cc phin bn dual-, triple- v quad-, p
ng hu ht cc chun giao tip s thng dng trong cng nghip (I2C, RS-232, RS485, CAN,)

Tt c cc chip Digital Isolator ca TI u dng mc in p theo chun logic CMOS


3V/5V. Tm in p ca chng bin i t 3.3V n 5V cho c 2 pha cp ngun (Vcc1
v Vcc2), v cho php bt c s kt hp no gia cc gi tr cp ngun ny.
Khi thit k mch vi cc Digital Isolators, cn lu mt iu quan trng l do cu trc
single-ended, cc chip Digital Isolators ny khng c ch to p ng cho ring
c dch t ti liu slla284 - Digital Isolator Design Guide, Texas Instruments.

mt chun giao tip c th no m c ch to phc v cho vic cch ly cc


ng dy tn hiu s single-ended (3V/5V).
Hnh 5 n Hnh 8 l nhng v d ng dng ca Digital Isolators dng cch ly cc
chun giao tip SPI, RS-232, RS-485. Lu rng cc Digital Isolators lun c t
gia cc b iu khin d liu data controller (nh Microcontroller hay UART) v b
chuyn i d liu data converter, hay ng dy thu-pht tn hiu line transceiver,
bt k l dng trong chun giao tip no i na.
Hnh 5 cho thy ng dng n gin nht ca Digital Isolators. y l mt mch hon
chnh dng trong h thng single-ended, low voltage. Trong Digital Isolator c
dng cch ly ng truyn SPI gia mt MCU v mt chip ADC. Chip cch ly s
thng dng nht cho ng truyn SPI l ISO7231 v ISO7241, v chng c 3 hoc 4
knh cch ly, ng vi ng truyn SPI cn dng 3 hay 4 ng d liu.
(Lu chiu d liu truyn qua cc knh cch ly, v d SPI th c 3 knh truyn t
MCU ti ngoi vi v 1 ng d liu i t ngoi vi v MCU).

Hnh 6 l v d dng Digital Isolators cch ly ng truyn RS-232. Trong v d


ny, ng dng ang cp s dng tt c cc chn ca RS-232 (Full-blown). Do
phi cn n 2 con Isolators 4 knh, trong c 6 knh dng cho 6 tn hiu iu khin
v 2 knh dng cho ng d liu truyn-nhn RX v TX. Mc d y, ton b h
thng l single-ended nhng do in p cao trn bus RS-232 (13-V) nn cn c cch
ly gia phn in p cao v in p thp trn bus d liu.

c dch t ti liu slla284 - Digital Isolator Design Guide, Texas Instruments.

Hnh 7: Cch ly trong giao tip RS-485. Cng nh trong Hnh 6, Digital Isolator c
t gia b iu khin v bus truyn-nhn d liu. Mc d ton b h thng u hot
ng in p thp, nhng sai lch t nhin gia cc bus truyn i hi cch ly u
tin pha Single-ended.

Hnh 8 cho thy ta c th tch hp thm chc nng cch ly vo module truyn-nhn,
nh vy c th cung cp mt linh kin c tch hp cch ly phc v mt ng dng c th
vi gi thnh r v gim tng s lng linh kin trn board mch.

c dch t ti liu slla284 - Digital Isolator Design Guide, Texas Instruments.

thun tin trong vic chn isolators thch hp cho mt ng dng no , Bng 1
tm tt cc Digital Isolators ca Texas Instrument:

Trong nm mc tc c khc nhau cho 5 loi cch ly A, B, C, CF v M, ch c cc phin


bn A, B, C v CF c tch hp cc b lc nhiu tn s thp ti cc ng vo v v th
thch hp s dng trong cc mi trng c nhiu. Phin bn tc cao M cn
thm b lc ng vo bn ngoi khi s dng trong mi trng c nhiu. iu ny c
thc hin bng cch kt ni mt t lc t ng vo n im ni t tng ng. Gi tr
in dung ca t c tnh bi CF = 1/ (2fmax x RS), vi fmax l tn s ti a ca tn
hiu v RS l tr khng ng ra ca tn hiu ngun.

3. PCB Design Guidelines


3.1

Vt liu PCB

Vi nhng board mch digital hot ng tn s t 150Mbps tr xung (hay l thi


gian ln rise time v xung fall time ca tn hiu ln hn 1ns), v cc ng mch c
di ti 10 inches th c th dng board FR-4 (thu tinh epoxy) lm PCB.
3.2

Layer Stack

c dch t ti liu slla284 - Digital Isolator Design Guide, Texas Instruments.

thit k c 1 PCB vi nhiu EMI thp th cn t nht 4 layers. Cc layers ny phi


c xp theo lp nh sau (t trn xung di): Layer cc ng tn hiu tn s cao,
ground plane, power plane, layer cc ng tn hiu tn s thp(*).

(*) Ghi ch: Mc d nhng hng dn Layout sau y dnh cho PCB c t nht 4 layers, nhng vn cha nhiu thng tin c gi tr
i vi vic thit k PCB 2 lp thng thng (Ghi ch ca ngi dch)

3.3

Creepage Distance (Khong cch r in)


Phn 3.3 khng c trnh by y, bn no quan tm c th xem trong ti liu gc.

3.4 Dy truyn tn hiu c tr khng iu khin c (Controlled Impedance


Transmission Lines)
ng dy truyn ti c tr khng iu khin c:
- L ng dy c tr khng Z0 c th c iu khin da vo thay i vo cu trc
hnh hc ca ng mch (trace)
- Thng c dng phi hp cc tr khng cc mi ni trung gian trong ng
dy truyn ti, v d nhu gia cp v u jack, gim thiu tn hao tn hiu.
- i vi Digital Isolators, cc ng mch c iu khin tr khng sao cho gn
bng tr khng ra (Z0~r0) theo nh l phi hp tr khng ngun.

xc nh Z0, ta cn tm tr khng ng ng ra ca isolator r0 (dynamic output


impedance). c tuyn r0 nh sau theo datasheet ISO7240, c xp x bng hai
ng thng:
rO ~ 260 ti cc gi tr in p thp.
Trong khong in p lm vic rO ~ 70 .

c dch t ti liu slla284 - Digital Isolator Design Guide, Texas Instruments.

Cc yu t xc nh cu trc hnh hc cn thit nh b dy (t), chiu rng (w) (b dy


lp ng v chiu rng ca ng mch), khong cch t trace ti ground layer (d) v
hng s in mi ca board mch PCB (r) ph thuc vo qu trnh m ng trn board
v hng s in mi ca vt liu lm board. Thng thng h s m ng l 1 v 2 oz
(1oz= 1ounce/1 foot vung), tng ng t l 1.37 v 2.74 mils. Nha epoxy lm loi
PCB FR-4 c hng s in mi trong khong 2.8 ti 4.5 ty thuc vo cp dng dy
n (microstrip) hay dng di (stripline).
Vi cc hng s t v r tm c, ta c th v c c tuyn Z0 theo w, d. Tuy vy,
trong thit k PCB, iu quan trng nht l t s w/d. n gin ha cng vic thit
k, Hnh 13 cho bn c tuyn tr khng Z0 ph thuc w/h (width-to-height) ca trace
(trace: ng mch trn board ng), ng vi t=2.74 (2 oz), r =4.5, d=10mils.
Vi h l b dy ca lp in mi r

c dch t ti liu slla284 - Digital Isolator Design Guide, Texas Instruments.

T c tuyn ta c th thy rng vi Z0=70 th w/h=0.8.


Trong phn tip theo (3.5), ta thy vic thit k 1 board mch c EMI thp (EMI Electromagnetic Interference nhiu in t) i hi phi close electric coupling gia
ng tn hiu (signal trace) v ground plane vi h=10mils, w=8mils.
B rng w ny phi c duy tr trn ton ng dy tn hiu nu khng s dn ti vic
thay i Z0 v tng EMI.
V d trn dy ch l 1 trong nhng cch thit k c c Z0 cn thit. Nu dy t
l 1 gi tr khc (ph thuc ch s m ng cao hay thp), hay dng mt vt liu PCB
khc (thay i r), th t s w/d cng s phi thay i cho ph hp. Cc cng thc ton
hc phc tp hn dng tnh Z0 khi c quan tm n dy t, chiu rng w, v hng
s in mi r c trnh by trong Bng 2:

c dch t ti liu slla284 - Digital Isolator Design Guide, Texas Instruments.

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3.5 Reference Planes:


Lp ngun (power plane) v t (ground plane) ca mt PCB hot ng tn s cao
thng phi tha nhiu iu kin.
tn hiu DC v tn s thp, chng phi cung cp 1 in th tham kho n nh, nh
Vcc-Ground, cung cp cho cc con IC.
Khi hot ng tn s cao, cc lp t (ground planes) cn phi phc v cho mt s
mc ch khc na. Chng hn, trong thit k tr khng cho ng mch truyn d
liu, th mt ground phi cung cp electric coupling mnh gia cc ng tn hiu
ca cc lp (layers) tn hiu gn nhau.
Xem xt mt dy dn n mang dng AC, Hnh 14, electric coupling yu hoc khng
c electric coupling s cho php sng in t ngang (TEM wave - transversal
electromagnetic wave) sinh ra bi dng in, tn mi trng bn ngoi, gy ra nhiu
trng in t EMI nghim trng.

Gi s c mt dy dn th 2, gn dy c, mang mt dng in y chang dy 1 nhng


ngc chiu. Trong trng hp ny, t trng ca 2 dy b trit tiu, v in trng
c lin kt cht ch (tightly couple). TEM waves ca 2 dy b trit tiu, khng tn ra
mi trng ngoi. Phn trng tn nh ch c th lin kt vi nhau xa. V vy, nhiu
EMI nh i rt nhiu.
c dch t ti liu slla284 - Digital Isolator Design Guide, Texas Instruments.

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Hnh 15 cho thy cng hiu ng xy ra gia ground plane v mt ng tn hiu


(signal trace). Dng in tn s cao s i theo ng i c h s t cm nh nht, ch
khng phi ng c tr khng b nht.
V ng tr v (return path) c h s t cm nh nht nm trc tip di ng tn
hiu, nn dng in tr v ca tn hiu (returning signal currents) c xu hng i theo
con ng ny. Dng in tr v s to ra mt vng mt in tch cao trong ground
plane, ngay bn di ng tn hiu. Vng t c mt in tch cao ny s hot
ng nh l mt ng mch dn dng in phn hi (single return trace), cho php
trng t trit tiu, khi to ra mt lin kt in mnh (tight electric coupling) vi ng
tn hiu bn trn.

to ra 1 ng lin tc c tr khng nh cho dng in tr v (return current), cc


lp tham kho reference planes (bao gm power plane v ground plane) phi l l
ng thun nht, khng c l hay b rn nt. Trn reference planes, phi ch mt iu
quan trng l cc clearance sections ca cc VIA (vng trng bao xung quanh VIA)
khng nh hng n ng dng tr v, bi v trong trng hp c vt cn, dng tr
v s tm hng i xung quanh vt .
Tuy nhin, khi , trng in t ca dng in s d b nh hng vi cc trng ca
nhng tn hiu khc, gy ra tp giao. Hn na, vt cn ny gy nh hng mnh n
tr khng ca ng i qua n, dn ti s khng lin tc v tng nhiu EMI.

c dch t ti liu slla284 - Digital Isolator Design Guide, Texas Instruments.

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3.6 i dy (Routing):
Cch i ng mch trn PCB v cch b tr linh kin ng mt vai tr quan trng khi
ta quan tm ti vic m bo tn hiu ton vn (khng suy hao hay mo dng), trnh
nhiu pick-up, v gim nhiu EMI, c bit trong cc ng dng tn s cao. Thc t l
c rt nhiu ti liu hng dn v vn ny, y chng ta ch nu ln mt s
yu cu chnh trong layout PCB:
1. Gi khong cch cc ng tn hiu bng 3 ln cao t ng tn hiu - t
(d = 3h, d y l khong cch gia 2 ng tn hiu lin k), gim mc
giao nhau gia cc tn hiu xung cn 10%. V mt dng in phn hi bn
di ng tn hiu gim theo hm 1/[1+(d/h)]2, cho nn mt ti im d >3h
l nh trnh c hin tng giao nhau gia cc tn hiu lin k.

2. S dng cc ng mch gc 45o thay v gc 90o. Gc 90o tng b rng thc s


ca ng tng tr khng sai lch tr khng, dn ti b phn x nhiu
hn.

3. Nu thng xuyn hot ng trong mi trng nhiu, kt ni Enable inputs ca


Isolator vi mt Reference Plane thch hp. High-Enable inputs ni vi Vcc v
Low-Enable inputs ni vi Ground.
4. Khi i cc traces gn 1 via hoc i gia 1 dy cc vias, cn m bo rng
khong clearance ca cc vias (clearance sections) khng ct ng dng in
tr v (return path) trn mt Ground plane. Nu khong clearance ca via nm
trn return path, dng in tr v s tm 1 ng i vi h s t cm nh nht
xung quanh khong clearance . V nh vy, ng ny c th ct cc ng
tn hiu khc, gy ra giao tn hiu v tng nhiu EMI.

c dch t ti liu slla284 - Digital Isolator Design Guide, Texas Instruments.

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5. Khi i cc ng tn hiu, cn trnh thay i layer (trnh i cc traces tn hiu


trn nhiu layer khc nhau) v n s dn ti tng h s h cm ca ng tn
hiu.
6. Nu khng th trnh khi vic i dy tn hiu xuyn qua nhiu lp, phi lin kt
mi via ca ng tn hiu vi mt via ca ng return-trace. Trong trng
hp ny, s dng kch thc via nh nht c th s tng h s h cm l t
nht.
7. Lp power v ground l lp ng thun nht (khng c gin on) iu khin
tr khng v hn ch nhiu ngun cung cp.
8. Cc dy i t Isolator ti cc linh kin xung quanh cng ngn cng tt trnh
nhiu pick-up. Digital Isolators thng c cc b bin i in p DC/DC cch ly
(isolated dc-to-dc converters) i km, cp ngun xuyn qua cc ro cch ly.
V vic truyn tn hiu single-ended nhy vi nhiu pick-up, nu ng dy tn
hiu di qu s d dng pick up vi tn s chuyn mch ca cc b DC/DC
converters.
9. t t in dung ln, gi l bulk capacitors, (vd 10 F), gn ngun cung cp,
chng hn ti chip n p ngun (voltage regulator), hay ti ni cp ngun vo
PCB.
10. t t c in dung nh hn, gi l bypass capacitors (0.1-F hoc 0.01-F) ti
cc linh kin. Bn ni vi ngun ca t kt ni trc tip vi chn cp ngun ca
linh kin, v qua 2 vias ti Vcc plane. Bn ni vi ground ca t cng dng 2 vias
ni ti ground plane.

c dch t ti liu slla284 - Digital Isolator Design Guide, Texas Instruments.

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3.7 Vias
Thut ng via thng c dng ch mt l m trong mt board mch in. Mc d
trong mt s ng dng yu cu l Vias l rng va vi chn ca cc linh kin
hn xuyn l (through-hole components), cn trong thit k board tn s cao ch yu
via c dng ni cc dy tn hiu khi cn chuyn t layer ny sang layer khc,
hoc kt ni cc linh kin dn b mt (linh kin SMT) vi reference plane cn thit
(ngun hay ground), v cng kt ni cc reference planes c cng th in vi
nhau.
Cc lp kt ni vi mt via bng cch ni trc tip vi mt pad xung quanh via, (via
pad). Cc lp khng kt ni s c cch ly bi mt clearance ring. Mi via c mt
in dung so vi ground c th c xp x bng cng thc sau y:

V in dung tng ln t l vi kch thc, nn Vias ca cc traces tn hiu trong cc


board mch tn s cao phi cng nh cng tt trnh suy hao tn hiu gy ra bi ti
in dung ln.
Khi kt ni cc t decoupling vi ground plane hoc cc lin kt ni (interconnecting)
trong ground plane, h s t cm ca via li quan trng hn in dung ca n. ln
ca h s t cm ny xp x:

Vi
L = in cm via, [nH].
h = chiu di via, [in].
d = ng knh via, [in].
Bi v phng trnh ny tnh theo logarit, thay i ng knh via gy nh hng rt
nh n L. Tuy nhin lng thay i ln c th c thc hin bng cch thay i
chiu di via (h) hoc bng cch s dng nhiu vias song song. Do ni cc t
decoupling vi ground hy s dng hai vias song song cho mi chn linh kin. gim
nh in cm do cc lin kt gia cc ground planes vi nhau, hy s dng nhiu vias
phn b trn tng khong u n xuyn sut board mch.

c dch t ti liu slla284 - Digital Isolator Design Guide, Texas Instruments.

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Thc s l rt khng nn i ng dy tn hiu tn s cao trn nhiu lp, tuy nhin nu


vic chuyn layer ca signal trace l khng th trnh khi, cn phi lu m bo s
lin tc trn ng tr v ca dng in.
Xem Hnh 21: Bn tri cho thy return path thay i nh th no khi chuyn signal
trace qua 1 layer khc, v hnh bn phi tng ng khi chuyn qua nhiu layer.

Mt ng tn hiu nu b chuyn t layer ny sang layer khc bng cch i qua cc


lp reference planes s lm ng tr v ca dng in cng thm phc tp. Trong
trng hp c 2 ground planes, nn t thm mt via ground-to-ground gn via tn hiu
m bo ng dng in tr v l lin tc (bn phi ca Hnh 21).
Nu cc reference planes c in th khc nhau, chng hn nh power plane v
ground plane nh trong Hnh 22 th ng tr v ca dng in tr nn ln xn hn,
do cn phi c 1 via th 3 v thm 1 t decoupling. Dng in tr v s bt u i
t mt y ca power plane, ni gn vi dng in ca tn hiu nht. Sau n i
xuyn qua power via ri qua t decoupling vo ground via v tr v mt trn ca
ground plane.
ng return ca dng in bao gm nhiu vias v nhiu t decoupling c h s h
cm cao, v do , nh hng n kh nng bo ton tn hiu v gia tng nhiu EMI.
Nu c th, hy trnh chuyn layer khi ang i cc dy tn hiu tn s cao, v iu
thng lm gim hiu sut ca board, thit k phc tp, tng chi ph sn xut.

c dch t ti liu slla284 - Digital Isolator Design Guide, Texas Instruments.

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3.8 T Decoupling
T decoupling nh l mt ngun sc ti ch (local source of charge) cung cp cho cc
ICs cn mt dng in ng k p ng hot ng chuyn mch ni. Thiu t
decoupling c th gy ra thiu dng cung cp cho IC n hot ng bnh thng, hu
qu l tn hiu khng c bo ton, xy ra li d liu.
Cc t phi c tr khng nh ti khong tn s ang quan tm. lm iu , mt
phng php thng dng l phn b u mt dy cc t decoupling xuyn sut board.
Ngoi ra, duy tr ton vn tn hiu, t decoupling phi c vai tr nh b lc EMC
ngn tn hiu tn s cao RF chy khp PCB.
Khi kt ni mt t gia ngun v ground, thc t l nng lng ang cp cho mt mch
cng hng ni tip, vi tn s cng hng ph thuc vo cc gi tr R-L-C trong mch
tng ng ca t. Hnh 23 biu din cc thnh phn k sinh ca mch tng ng
ban u v dng bin i thnh mch cng hng ni tip.

c dch t ti liu slla284 - Digital Isolator Design Guide, Texas Instruments.

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in tr r RL i din cho tn hao nng lng do cc dng r tn s thp. RD i


din cho tn hao do phn cc phn t, CD i din cho tn hao do hp th in mi. RS
l in tr cc chn v bn cc ca t. Ba in tr tn hao kt hp thnh mt in tr
tng ng ESR. ESL l gi tr tng ng ca cc in cm ca bn cc v cc
chn ca t.
Ch rng cc t ni vi vias, mc d c tr khng nh, nhng cng ng gp mt
lng ng k vo L tng ng. V vy, gim L ca via bng cch dng 2 vias cho
mi chn ca t.
Hnh 24 cho thy s thay i tr khng t in theo tn s (xt t 10nF). Ti cc tn s
thp hn nhiu so vi tn s cng hng (self-resonance frequency - SRF), dung
khng chim phn ln. Gn SRF hn, cm khng s dn trung ho dung khng. Ti
SRF, cm khng v dung khng trit tiu nhau, ch c ESR l hot ng. Lu ESR
ph thuc tn s v khng t gi tr nh nht ti SRF. Th nhng, tr khng tng
ng Z li t gi tr MIN ti tn s cng hng.

Ghp song song cc t trong mng decoupling phn b em li hiu qu cao, bi v


tng in dung tng CTOT=C x n, (n: s t). V vi XC=1/( x C), tr khng t gim n ln
vi tn s di SRF XC=1/(n x x C). Tng t vi in cm LTOT=L/n v XL= x L
=> XL gim n ln vi tn s trn SRF: XL= x L/n.

c dch t ti liu slla284 - Digital Isolator Design Guide, Texas Instruments.

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Thit k mt solid decoupling network phi bao gm c phn tn s thp cho ti tn


hiu DC (tn s = 0), do cn phi ghp thm cc t bypass. V vy, t c tr
khng thp ti di tn s thp, t thm t tantalum c gi tr t 1F ti 10F ti ng ra
ca cc b n p (voltage regulators) v ti im cp ngun cho PCB. Vi di tn s
cao hn, t thm vi t ceramic 0.1uF hoc 0.001uF bn cnh mi con IC chuyn
mch tn s cao.
4. Tng kt
Mc tiu ca ti liu ny l trnh by nhng im quan trng khi thit k PCB vi cc
chip cch ly tn hiu s Digital Isolators ca TI, v tng qut hn l nhng hng dn
thit k PCB hot ng tn s cao vi yu cu gim nhiu EMI, trnh suy hao tn
hiu.
Mc d c rt nhiu ti liu k thut, bi bo, forum v thit k PCB, nhng ti liu ny
vn cung cp cho nhng ngi thit k layout nhng hng dn kh ton din. Thc
hin nhng ngh trong ti liu ny, ngi thit k hon ton c th thit k c cc
board PCB tng hp in t EMC trong thi gian ngn nht.
5. Ti liu tham kho
1. High-speed Digital Design, Johnson/Graham, 1993
2. Noise Reduction Techniques in Electronic Systems, Ott, 1988
3. Eliminating the myths about printed circuit board power/ground plane decoupling,
Archambeault, 2001.

c dch t ti liu slla284 - Digital Isolator Design Guide, Texas Instruments.

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