Code No: RA410301 RA

IV B.Tech I Semester Supplimentary Examinations, February 2008

MICROPROCESSORS AND APPLICATIONS
(Mechanical Engineering)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
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1. (a) Explain various interrupt pins of 8085 Microprocessor, and also write their
priority.
(b) What are the various status flags provided in 8085? Discuss their role. [8+8]

2. (a) Write down the table used to find the Binary Codes for MOD and R/M fields
in instruction formats of 8086.
(b) Explain the Flag register of 8086. Also show their positions in Flag register.
(c) Explain the purpose of Queue in 8086. [8+4+4]

3. (a) Explain the following Instructions.

i. MOV
ii. POP
iii. XCHG
iv. SAHF
(b) Write a program to convert a Binary Number to a BCD Number. [8+8]

4. (a) Write a procedure COMPUTE for performing the computation R ← X +

Y − 3 The word variables X, Y, R and COMPUTE are in the same code
segment. The variables X and Y are defined in data segment D1 SEG. The
data segment D2 SEG contains the variable R. Show the necessary definition
along with the procedure?
(b) Give the definition of a macro RESTORE that will pop the register contents
that have been pushed in the order AX, BX, CX, DX, SI and DI? [8+8]

5. (a) Give the instruction sequence that compares the first 20 bytes beginning at
STR1 with the first ten bytes beginning at STR2 and branches to MAT FOUND
if they are equal, otherwise continues in sequence? [8]
(b) Explain the following instructions and the flags that are affected by these
instructions.
i. SCAS DST
ii. STOS DST
iii. MOVSW
iv. CMPSB [2+2+2+2]

6. (a) Draw the block diagram of 8259 and explain each block? Discuss the salient
features of 8259?

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Code No: RA410301 RA
(b) Draw a flow chart showing how a block of N bytes are inputted to memory
using programmed I/O transfer? [8+8]

7. Interface a stepper motor with 8-step input sequence to 8086 based system and
write the instruction sequence to move the stepper motor 20 steps in clockwise and
12 steps in anti-clockwise direction. [16]

8. (a) Explain demand transfer mode and block transfer mode of 8237?
(b) Show how 8237?s are cascaded to provide more number of DRQ’s and explain
the operation?
(c) Explain how memory to memory transfer is performed with 8237? [6+5+5]

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