Wistron LA46 Rev - 1 Sch-Lenovo b460 v460

5
LA46 Switchable Graphics System Schematicshttp://hobi-elektronika.net

Project Code: 91.4GV01.001
PCB(Raw Card): 09911-1
1
USB BD
PCB LAYER
L1:
L2:
L3:
L4:
L5:
L6:
L7:
L8:
I/O BD
Thermal
Sensor
EMC2103
11
VRAM
Clock GEN
CK505
DDR3 X4
512MB / 1GB
57,58
PortA
CRT BD
Power BD
UNBUFFERED
DDR3 SODIMM
Socket1
12
Top
GND
Signal
Signal
VCC
Signal
GND
Signal
Channel A
Intel CPU
Auburndale
(Dual Core)
DDR3 800/1066
204-PIN DDR3 SODIMM

Channel B
UNBUFFERED
DDR3 SODIMM
Socket2
13
NVIDIA
N11M-GE
CPU DC/DC
Finger Printer BD
PCIe 16X Gen2
HDMI
DDR3 800/1066MHz
HDMI BD
HDMI BD
INPUTS
OUTPUTS
DCBATOUT
VCC_CORE
SYSTEM DC/DC
54,55,56,57,58,59
4,5,6,7,8,9,10
HD AUDIO CODEC
HDA Link
DMI x4
AV BD
RGB
RGB
CRT CONN
23,24,25
Serial ATA (4 ports)
SYSTEM DC/DC
25
CRT BD
LPC I/F
GLAN
AR8131
PCI Express 8
PCI Rev 2.3
Transformer
29
INT. RTC
28
SATA CONN
28
RJ45
30
SATA Port 1
USB BD
USB 2.0
USB 2.0
1D05V_VTT
LDO
USB 2.0 port?
24
38
35
35
CH3
CH5
Mini PCI-E
WWAN Card
OUTPUTS
USB 2.0 CH6
CH8
1D8V_S0
LDO
SIM Slot
Express Card
INPUTS
OUTPUTS
1D5V_S3
0D75_S0
DDR_VREF_S3
35
SYSTEM DC/DC
44
ISL62881
I/O BD
PCI Express 4
31
INPUTS
OUTPUTS
DCBATOUT
VCC_GFXCORE
SYSTEM DC/DC
SPI FLASH
4MB
KBC
Nuvoton NPCE781E
38
36
INPUTS
OUTPUTS
DCBATOUT
VGA_CORE_S0
LPC Debug
Board Conn
36
CHARGER
OUTPUTS
BT+
DCBATOUT
Int. KB
36
G-Sensor
38
46
BQ24745
CH0
Multi-touch
Touchpad
38
45
ISL62872
LPC Bus / 33MHz
INPUTS
USB 2.0
43
RT9026
CH7
CH7
43
RT9025
INPUTS
USB 2.0 CH4
EHCI#1
32
42
OUTPUTS
Mini PCI-E
WLAN Card
PCI Express 1
SPI
Finger Printer
1D05V_S0
DCBATOUT
USB 2.0
Camera
DCBATOUT
RT8209E
PCI Express 3
Bluetooth
OUTPUTS
SYSTEM DC/DC
SATA Port 0
USB 2.0 CH2
C
41
INPUTS
3D3V_S5
MediaCard Reader
Realtek/5138
1D5V_S3
30
I/O BD
5-in-1
Slot
DCBATOUT
INPUTS
14,15,16,17,18,19,20,21,22
SATA ODD
OUTPUTS
RT8209E
ACPI 2.0
SATA CONN
INPUTS
SYSTEM DC/DC
AC97 2.3/Azalia Interface
SATA HDD
41
RT8209E
PCI Express (8 ports)
Headphone out
OUTPUTS
5V_AUX_S5
3D3V_AUX_S5
5V_S5
3D3V_S5
DCBATOUT
14'' WUXGA
(WSXGA) LCD 24
LVDS
MUX
USB 2.0 (12 ports)
27
LVDS
LVDS
Intel
PCH HM55
ALC269Q-VB-GR
RGB
40
TPS51123
BT BD
INPUTS
FDI
38,39
ISL62882
HDMI CONN 26
DDR3 800/1066
Mic in
SPI Flash
128Kb
38
A
<Core Design>
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
Title
01_Block Diagram
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Wednesday, January 27, 2010
Sheet
of
58
http://hobi-elektronika.net
Processor Strapping
Pin Name
Strap Description
Configuration (Default value for each bit is

1 unless specified otherwise)
CFG[4]
Embedded
DisplayPort
Presence
1: Disabled - No Physical Display Port attached to 1

Embedded DisplayPort.
0: Enabled - An external Display Port device is
connected to the Embedded Display Port.
1
1: Normal Operation.
0: Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
3D3V_AUX_S5
Default
Value
3D3V_S5
CFG[3]
PCI-Express Static
Lane Reversal
CFG[0]
PCI-Express
Configuration
Select
1: Single PCI-Express Graphics

0: Bifurcation enabled
Reserved Temporarily used

for early
Clarksfield
samples.
0
Clarksfield (only for early samples pre-ES1) Connect to GND with 3.01K Ohm/5% resistor
Note: Only temporary for early CFD samples
(rPGA/BGA) [For details please refer to the WW33
MoW and sighting report].
For a common motherboard design (for AUB and CFD),
the pull-down resistor should be used. Does not
impact AUB functionality.
CFG[7]
Sequence AC
AD+
5V_AUX_S5
S5_ENABLE (KBC)
5V_S5
>10ms
RSMRST#_KBC
LAN_PWR_ON
can power after power switch press
3D3V_LAN_S5
KBC_PWRBTN#
PM_PWRBTN#
PCH Strapping
Name
PM_SLP_S4#
Schematics Notes
SPKR
Reboot option at power-up

Default Mode: Internal weak Pull-down.
No Reboot Mode with TCO Disabled: Connect to Vcc3_3 with 8.2-k
- 10-k weak pull-up resistor.
INIT3_3V#
Weak internal pull-down. Do not pull high.
GNT3#/
GPIO55
Default Mode: Internal pull-up.

Low (0) = Top Block Swap Mode (Connect to ground with 4.7-k weak
pull-down resistor).
INTVRMEN
High (1) = Integrated VRM is enabled

Low (0) = Integrated VRM is disabled
Default (SPI): Left both GNT0# and GNT1# floating. No pull up
required.
Boot from PCI: Connect GNT1# to ground with 1-k pull-down
resistor. Leave GNT0# Floating.
Boot from LPC: Connect both GNT0# and GNT1# to ground with 1-k
pull-down resistor.
Default - Internal pull-up.
Low (0)= Configures DMI for ESI compatible operation (for servers
only. Not for mobile/desktops).
GNT0#,
GNT1#
GNT2#/
GPIO53
GPIO33
Default: Do not pull low.

Disable ME in Manufacturing Mode: Connect to ground with 1-k
pull-down resistor.
SPI_MOSI
Enable iTPM: Connect to Vcc3_3 with 8.2-k weak pull-up resistor.

Disable iTPM: Left floating, no pull-down required.
Enable Danbury: Connect to Vcc3_3 with 8.2-k weak pull-up
resistor.
Disable Danbury: Connect to ground with 4.7-k weak pull-down
resistor.
NV_ALE
1D5V_S3
DDR3_VREF_S3
PM_SLP_S3#
5V_S0
3D3V_S0
1D8V_S0
1D5V_S0
1D05V_S0
0D75V_S0
PLANAR_ID[1..0]
ALL_PWRGD
1D05V_VTT
VTT_PWRGD
(H_VTTPWRGD -->CPU, KBC)
KBC GPIn
31
23
PLANAR_IDn
LA46 - SA
LA46 - SB
SB
LA46 - SB
SC
Planar ID Version
Planar PCB Version
SA
-1
GFX_VR_EN
VCC_GFXCORE
DIS: Before 1D05V_VTT
7,36,39 VCC_CORE
DGPU_PWR_EN#
11,20,21,23,24,25,26,27,28,35,36,44,45,48,49
3D3V_S0_NV
NC_CLE
Weak internal pull-up. Do not pull low.
HAD_DOCK_EN#
/GPIO[33]
HDA_SDO
Low (0): Flash Descriptor Security will be overridden.

High (1) : Flash Descriptor Security will be in effect.
VGA_CORE_PWR
HDA_SYNC
DGPU_PWROK
GPIO15
GPIO8
Weak internal pull-up. Do not pull low.
5V_S0
3D3V_S0
3D3V_S0
5,8,12,13,36,41,43,50 1D5V_S3
1D5V_S3
GPIO27
Default = Do not connect (floating)

High(1) = Enables the internal VccVRM to have a clean supply for
analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter
circuits for analog rails.
3,14,15,16,20,21,41,50 1D05V_S0
5,7,8,19,20,21,36,38,42 1D05V_VTT
8,20,23,36,43 1D8V_S0
12,13,43 DDR_VREF_S3
8,36,44 VCC_GFXCORE
1D8V_S0_NV
FBVDD
1D05V_S0_NV
45,50,51,53,54,55 3D3V_S0_NV
50,54 1D8V_S0_NV
S0_PWR_GOOD
(IMVP_VR_EN)
1D05V_S0
1D05V_VTT
1D8V_S0
DDR_VREF_S3
VCC_GFXCORE
3D3V_S0_NV
45,50,51 VGA_CORE_S0
>99ms
VCC_CORE
5V_S0
3,5,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,31,32,33,34,35,36,38,41,43,44,50
VGA_CORE_S0
1D8V_S0_NV
50,52,57,58 FBVDD
FBVDD
50,51,52,54,55 1D05V_S0_NV
1D05V_S0_NV
VCC_CORE
N11M-GE Power Sequence
VR_CLKEN#
VDD33
PEX_VDD can ramp up any time
Platform
controlled
CORE_PWRGD
(SYS_PWROK, PCH_PWROK)
Sillicon
controlled
PM_DRAM_PWRGD
PEX_VDD
tNVVDD
NVVDD
tNV-IFPAB_IOVDD
H_PWRGD
IFPAB_IOVDD
tNV-FBVDDQ
FBVDDQ
PLT_RST#
A
<Core Design>
Wistron Corporation
Title
02_Reference
Size
A2
Document Number
LA46 MB
Date:
Rev
-1
Sheet
of
58
5
1D5V_S0_CK505
1D5V_S0
1
1D05V_CK505
1D05V_S0
-1 0107
CLK GEN
Mount Mount DY
CPU_0#
CPU_0
XTAL_IN
XTAL_OUT
28
27
GEN_XTAL_IN
GEN_XTAL_OUT
CPU_1#
CPU_1
SDA
SCL
31
32
11
10
SRC_1/SATA#
SRC_1/SATA
15 CLK_CPU_BCLK#
15 CLK_CPU_BCLK
22
23
19
20
DY
1 RNT1
2 SRN33J-5-GP-U
4
3
R80
C107
DY
DY
VGA_XIN1 55
OSC_SPREAD 55
R249 1
2 33R2J-2-GP
CLK_ICH14 15
DY
C
C351
SC10P50V2JN-4GP
VSS_SATA
PCH_SMBDATA 12,13,15
PCH_SMBCLK 12,13,15
VSS_DOT
VSS_27
8
VSS_SRC
12
VSS_CPU
21
VSS_REF
GND
33
SLG8SP585VTR-GP
2ND = 71.93197.003
DY
FOR DIS
26
-1 0111
C131
15 CLK_PCIE_SATA#
15 CLK_PCIE_SATA
DY
R79
SRC_2#
SRC_2
Mount Mount Mount Mount Mount
CPU_STOP#
CK_PWRGD
REF_0/CPU_SEL
14
13
X1
DY
16
25
30
15 CLKIN_DMI#
15 CLKIN_DMI
27MHZ
27MHZ_SS
R75
DY
CPU_STOP#
CKPWRGD/PD#
REF_0/CPU_SEL
DOT_96#
DOT_96
RNT1
Crystal
VGA_XIN1_L
OSC_SPREAD_L
4
3
VGA 27M
6
7
15 DREFCLK#
15 DREFCLK
2
18
VDD_CPU_IO
15
5
VDD_27
VDD_SRC_IO
29
17
24
1
VDD_DOT
VDD_REF
VDD_SRC
VDD_CPU
U27
C384
SC47P50V2JN-3GP
Low voltage I/O power

supply for outputs.
C376
SCD1U16V2ZY-2GP
1D05V_CK505
C401
SC10U10V5ZY-1GP
3D3V_CK505
C402
SC10U10V5ZY-1GP
R258
0R3J-0-U-GP
2
R268
0R0603-PAD
R264
0R3J-0-U-GP
DY
1
C349
SCD1U16V2ZY-2GP
C383
SCD1U16V2ZY-2GP
C346
SC47P50V2JN-3GP
SCD1U16V2ZY-2GP
C369
C348
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP
C347
C358
R247
0R0603-PAD
1D5V_S0_CK505
1
1
2
1
FOR CO-LAY SLG8LV595

3D3V_CK505
-1 0107
3D3V_S0
3D3V_CK505
1D05V_CK505
3D3V_CK505
R255
10KR2J-3-GP
R266
R251
CPU_STOP#
10KR2J-3-GP
3.3V LVTTL input for CPU_STOP#. Contains

internal pull-up resistor.
DY 2K2R2J-2-GP
CK_PWRGD
CL=20pF0.2pF
SPEED
133MHz
(Default)
Q21
1
38 VR_CLKEN#
SB-1015 change to 84.2N702.E31
Make sure that the stubs to the

test points(CK_PWRGD, CLK_EN#,
GEN_XTAL_OUT) in the layout are as
short as possible on the high speed
signals.
X4
82.30005.A51
G
2N7002A-7-GP
X-14D31818M-50GP
100MHz
FSC
2
R250
10KR2J-3-GP
Layout Notes:
C370
SC10P50V2JN-4GP
GEN_XTAL_IN
1
2
REF_0/CPU_SEL
2ND = 82.30005.C51
GEN_XTAL_OUT
C377
SC12P50V2JN-3GP
SB BOM change to 82.30005.A51
<Core Design>
A
Wistron Corporation
Title
03_Clock Generator SLG8SP585

Size
A3
Document Number
Date:
Tuesday, January 26, 2010
Rev
-1
LA46 MB DIS
Sheet
of
58
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
16
16
16
16
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
B24
D23
B23
A22
DMI_RX0
DMI_RX1
DMI_RX2
DMI_RX3
DMI_RX0#
DMI_RX1#
DMI_RX2#
DMI_RX3#
16
16
16
16
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
D24
G24
F23
H23
DMI_TX0#
DMI_TX1#
DMI_TX2#
DMI_TX3#
16
16
16
16
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
D25
F24
E23
G23
DMI_TX0
DMI_TX1
DMI_TX2
DMI_TX3
16
16
16
16
16
16
16
16
FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7
E22
D21
D19
D18
G21
E19
F21
G18
FDI_TX0#
FDI_TX1#
FDI_TX2#
FDI_TX3#
FDI_TX4#
FDI_TX5#
FDI_TX6#
FDI_TX7#
16
16
16
16
16
16
16
16
FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7
D22
C21
D20
C18
G22
E20
F20
G19
FDI_TX0
FDI_TX1
FDI_TX2
FDI_TX3
FDI_TX4
FDI_TX5
FDI_TX6
FDI_TX7
16 FDI_FSYNC0
16 FDI_FSYNC1
F17
E17
FDI_FSYNC0
FDI_FSYNC1
16 FDI_INT
C17
FDI_INT
16 FDI_LSYNC0
16 FDI_LSYNC1
F18
D17
FDI_LSYNC0
FDI_LSYNC1
PCI EXPRESS -- GRAPHICS
16
16
16
16
AUBURNDALE
CPU1A
A24
C23
B22
A21
1 OF 9
R500
2 49D9R2F-GP
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS
B26
A26
B27
A25
PEG_IRCOMP_R
K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31
PEG_RXN15
PEG_RXN14
PEG_RXN13
PEG_RXN12
PEG_RXN11
PEG_RXN10
PEG_RXN9
PEG_RXN8
PEG_RXN7
PEG_RXN6
PEG_RXN5
PEG_RXN4
PEG_RXN3
PEG_RXN2
PEG_RXN1
PEG_RXN0
PEG_RXN[15..0] 51
PEG_RX0#
PEG_RX1#
PEG_RX2#
PEG_RX3#
PEG_RX4#
PEG_RX5#
PEG_RX6#
PEG_RX7#
PEG_RX8#
PEG_RX9#
PEG_RX10#
PEG_RX11#
PEG_RX12#
PEG_RX13#
PEG_RX14#
PEG_RX15#
J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30
PEG_RXP15
PEG_RXP14
PEG_RXP13
PEG_RXP12
PEG_RXP11
PEG_RXP10
PEG_RXP9
PEG_RXP8
PEG_RXP7
PEG_RXP6
PEG_RXP5
PEG_RXP4
PEG_RXP3
PEG_RXP2
PEG_RXP1
PEG_RXP0
PEG_RXP[15..0] 51
PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7
PEG_RX8
PEG_RX9
PEG_RX10
PEG_RX11
PEG_RX12
PEG_RX13
PEG_RX14
PEG_RX15
PEG_TX0#
PEG_TX1#
PEG_TX2#
PEG_TX3#
PEG_TX4#
PEG_TX5#
PEG_TX6#
PEG_TX7#
PEG_TX8#
PEG_TX9#
PEG_TX10#
PEG_TX11#
PEG_TX12#
PEG_TX13#
PEG_TX14#
PEG_TX15#
L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26
PEG_TXN15_L
PEG_TXN14_L
PEG_TXN13_L
PEG_TXN12_L
PEG_TXN11_L
PEG_TXN10_L
PEG_TXN9_L
PEG_TXN8_L
PEG_TXN7_L
PEG_TXN6_L
PEG_TXN5_L
PEG_TXN4_L
PEG_TXN3_L
PEG_TXN2_L
PEG_TXN1_L
PEG_TXN0_L
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
C632
C628
C630
C342
C343
C340
C338
C345
C335
C316
C312
C294
C270
C272
C260
C258
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
PEG_TXN15
PEG_TXN14
PEG_TXN13
PEG_TXN12
PEG_TXN11
PEG_TXN10
PEG_TXN9
PEG_TXN8
PEG_TXN7
PEG_TXN6
PEG_TXN5
PEG_TXN4
PEG_TXN3
PEG_TXN2
PEG_TXN1
PEG_TXN0
PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7
PEG_TX8
PEG_TX9
PEG_TX10
PEG_TX11
PEG_TX12
PEG_TX13
PEG_TX14
PEG_TX15
L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25
PEG_TXP15_L
PEG_TXP14_L
PEG_TXP13_L
PEG_TXP12_L
PEG_TXP11_L
PEG_TXP10_L
PEG_TXP9_L
PEG_TXP8_L
PEG_TXP7_L
PEG_TXP6_L
PEG_TXP5_L
PEG_TXP4_L
PEG_TXP3_L
PEG_TXP2_L
PEG_TXP1_L
PEG_TXP0_L
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
C633
C629
C631
C341
C344
C339
C337
C336
C332
C320
C302
C277
C268
C276
C263
C252
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
PEG_TXP15
PEG_TXP14
PEG_TXP13
PEG_TXP12
PEG_TXP11
PEG_TXP10
PEG_TXP9
PEG_TXP8
PEG_TXP7
PEG_TXP6
PEG_TXP5
PEG_TXP4
PEG_TXP3
PEG_TXP2
PEG_TXP1
PEG_TXP0
Intel(R) FDI
DMI
1
R498
EXP_RBIAS
2 750R2F-GP
PEG_TXN[15..0] 51
PEG_TXP[15..0] 51
AUBURUNF
<Core Design>
A
Wistron Corporation
Title
04_CPU (1/7)-PEG / DMI / FDI

Size
A3
Document Number
Date:
Rev
-1
LA46 MB DIS
Sheet
of
58
COMP1
R179
H_COMP0
AT26
COMP0
49D9R2F-GP
R499
49D9R2F-GP
TPAD14-GP
TP41
SKTOCC#_R
AH24
SKTOCC#
H_CATERR#
AK14
CATERR#
SKTOCC# (Socket Occupied)
R209 1
38 H_PROCHOT#
PROCHOT#
2 0R2J-2-GP
AN26
DY
PECI
PROCHOT#
AK15
THERMTRIP#
130C
C
1
R119
16 PM_DRAM_PWRGD
VCCPWRGOOD_1
AN14
VCCPWRGOOD_1
AN27
VCCPWRGOOD_0
AK13
SM_DRAMPWROK
DRAMPWROK
2
0R0402-PAD
H_VTTPWRGD
-1 0107
TPAD14-GP
R128 1
PLT_RST#
TP53
AM15
VTTPWRGOOD
H_PWRGD_XDP
AM26
TAPPWRGOOD
PLT_RST#_R
AL14
RSTIN#
DDR3_DRAMRST#_R
AL1
AM1
AN1
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
SRN0J-6-GP
PEG_CLK_R
PEG_CLK#_R
DY
-1 0112
PEG_CLK_R 15
PEG_CLK#_R 15
1K5R2F-2-GP
R132
750R2F-GP
100R2F-L1-GP-U
24D9R2F-L-GP
2
130R2F-1-GP
impedance compensation
DPLL_REF_SSCLK 15
DPLL_REF_SSCLK# 15
SA 0901 : LC require to reserve
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
PM_EXT_TS0#
PM_EXT_TS1#
AN15
AP15
PRDY#
PREQ#
AT28
AP27
TCK
TMS
TRST#
AN28
AP28
AT27
XDP_TCLK
XDP_TMS
XDP_TRST#
TDI
TDO
TDI_M
TDO_M
AT29
AR27
AR29
AP29
XDP_TDI
XDP_TDO
XDP_TDI_M
XDP_TDO_M
DBR#
AN25
XDP_DBRESET#
BPM0#
BPM1#
BPM2#
BPM3#
BPM4#
BPM5#
BPM6#
BPM7#
AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23
1
2
1D05V_VTT
RN30
SRN10KJ-5-GP
4
3
R479
1KR2J-1-GP
S3_DY
DDR3_DRAMRST#_R
PM_EXTTS#0_R 12
PM_EXTTS#1_R 13
1
R484
DDR3_DRAMRST#
0R2J-2-GP
S3
12,13
S3_DY Q49
XDP_PRDY#
XDP_PREQ#
TP106 TPAD14-GP
3 BSS138LT1
2ND = 84.00138.G31
R489
100KR2J-1-GP
S3_DY
Vgs(th)<=1.5V
SC CHECK
RST_GATE 19
C601
SCD1U10V2KX-5GP
S3_DY
C
1D05V_VTT
XDP_TMS
DY
DY
DY
R503
XDP_TDI
R504
XDP_PREQ#
R205
XDP_TDO
CPU JTAG
XDP_TDO_M
51R2J-2-GP
51R2J-2-GP
51R2J-2-GP
XDP_TDI_M
XDP_TCLK
AUBURUNF
DY
R215
XDP_TRST#
R505
0R0402-PAD
-1 0107
51R2J-2-GP
R502
18,29,31,33,35,51
PM_SYNC
VCCPWRGOOD_0
2 R213
0R0402-PAD
2
R493
0R0402-PAD
1
AL15
F6
SM_DRAMRST#
JTAG & BPM
19,36 H_PWRGD
RESET_OBS#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
PWR MANAGEMENT
16 H_PM_SYNC
AP26
A18
A17
4
3
H_CPURST#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
1
2
TP50
E16
D16
DPLL_REF_SSCLK#
DPLL_REF_SSCLK
TPAD14-GP
RN77
BCLK_CPU_P 19
BCLK_CPU_N 19
PEG_CLK
PEG_CLK#
DDR3
MISC
-1 0112
19,36 PM_THRMTRIP-A#
A16
B16
AR30
AT30
1D5V_S3
THERMAL
AT15
19 H_PECI
H_PROCHOT#
If using an optional glue
logic receiver, a series
resistor of 2.2 k 5% is
needed.
BCLK
BCLK#
BCLK_ITP
BCLK_ITP#
COMP2
G16
AT24
H_COMP1
68R2-GP
H_COMP2
20R2F-GP
1
SM_RCOMP_0
R90
SM_RCOMP_1
R91
SM_RCOMP_2
R92
R207
1
R497
PROCHOT#
BCLK_CPU_P
BCLK_CPU_N
H_CATERR#
49D9R2F-GP
OF 9
COMP3
AUBURNDALE
AT23
20R2F-GP
MISC
1
R162
3D3V_S0
2
51R2J-2-GP
XDP_DBRESET# 1
2
R203
1KR2J-1-GP
R501
51R2J-2-GP
check list: 5k pu
SA 0903
3D3V_S5
3D3V_S5
3D3V_S0
S3
R120
3KR2F-GP
VCC
Y
1
1
Q51
SC 1130 change to 1.5Kohm
5
CPU_VDDQ_PWRGD
GND
R486 1
1K5R2F-2-GP
74LVC1G08GW-1-GP
DRAMPWROK
C617
SCD1U10V2KX-5GP
S3_DY
43
-1 0114
CPU_VDDQ_PWRGD
33,42 VTT_PWRGD
R487
750R2F-GP
S3_DY
S3_DY
VTT_PWRGD
H_VTTPWRGD_R
1D05V_VTT
DY
R495
1KR2J-1-GP
DMN66D0LDW-7-GP
SB 1015 change to 84.DMN66.03F
33,42 VTT_PWRGD
R492
100KR2J-1-GP
R494
10KR2J-3-GP
PM_SLP_S3#
16,31,33,36,41,42,43,44
DRAMPWROK
C593
SCD1U10V2KX-5GP
S3_DY
U58
R125
1K1R2F-GP
S3
1D5V_S3
CPU1B
H_COMP3
4
1
R496
CLOCKS
5
1D05V_VTT
H_VTTPWRGD
<Core Design>
A
Wistron Corporation
Title
05_CPU (2/7)-HOST
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
of
58
CPU1D
A10
C10
C7
A7
B10
D10
E10
A8
D8
F10
E6
F7
E9
B7
E7
C6
H10
G8
K7
J8
G7
G10
J7
J10
L7
M6
M8
L9
L6
K8
N8
P9
AH5
AF5
AK6
AK7
AF6
AG5
AJ7
AJ6
AJ10
AJ9
AL10
AK12
AK8
AL7
AK11
AL8
AN8
AM10
AR11
AL11
AM9
AN9
AT11
AP12
AM12
AN12
AM13
AT14
AT12
AL13
AR14
AP14
12 M_A_BS0
12 M_A_BS1
12 M_A_BS2
AC3
AB2
U7
12 M_A_CAS#
12 M_A_RAS#
12 M_A_WE#
AE1
AB3
AE9
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
SA_BS0
SA_BS1
SA_BS2
SA_CAS#
SA_RAS#
SA_WE#
13 M_B_DQ[63..0]
SA_CK0
SA_CK0#
SA_CKE0
AA6
AA7
P7
SA_CK1
SA_CK1#
SA_CKE1
Y6
Y5
P6
M_CLK_DDR1 12
M_CLK_DDR#1 12
M_CKE1 12
SA_CS0#
SA_CS1#
AE2
AE8
M_CS#0 12
M_CS#1 12
SA_ODT0
SA_ODT1
AD8
AF9
M_ODT0 12
M_ODT1 12
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
B9
D7
H7
M7
AG6
AM7
AN10
AN13
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_CLK_DDR0 12
M_CLK_DDR#0 12
M_CKE0 12
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#
C9
F8
J9
N9
AH7
AK9
AP11
AT13
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
C8
F9
H9
M9
AH8
AK10
AN11
AR13
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15
Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DM[7..0] 12
M_A_DQS#[7..0]
12
M_A_DQS[7..0] 12
M_A_A[15..0] 12
B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5
F3
G4
H6
G2
J6
J3
G1
G5
J2
J1
J5
K2
L3
M1
K5
K4
M4
N5
AF3
AG1
AJ3
AK1
AG4
AG3
AJ4
AH4
AK3
AK4
AM6
AN2
AK5
AK2
AM4
AM3
AP3
AN5
AT4
AN6
AN4
AN3
AT5
AT6
AN7
AP6
AP8
AT9
AT7
AP9
AR10
AT10
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
13 M_B_BS0
13 M_B_BS1
13 M_B_BS2
AB1
W5
R7
SB_BS0
SB_BS1
SB_BS2
13 M_B_CAS#
13 M_B_RAS#
13 M_B_WE#
AC5
Y7
AC6
SB_CAS#
SB_RAS#
SB_WE#
AUBURNDALE
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
AUBURNDALE
DDR SYSTEM MEMORY A
12 M_A_DQ[63..0]
OF 9
OF 9
DDR SYSTEM MEMORY - B
CPU1C
SB_CK0
SB_CK0#
SB_CKE0
W8
W9
M3
M_CLK_DDR2 13
M_CLK_DDR#2 13
M_CKE2 13
SB_CK1
SB_CK1#
SB_CKE1
V7
V6
M2
M_CLK_DDR3 13
M_CLK_DDR#3 13
M_CKE3 13
SB_CS0#
SB_CS1#
AB8
AD6
M_CS#2 13
M_CS#3 13
SB_ODT0
SB_ODT1
AC7
AD1
M_ODT2 13
M_ODT3 13
SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7
D4
E1
H3
K1
AH1
AL2
AR4
AT8
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#
D5
F4
J4
L4
AH2
AL4
AR5
AR8
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
C5
E3
H4
M5
AG2
AL5
AP5
AR7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15
U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_DM[7..0] 13
M_B_DQS#[7..0]
13
M_B_DQS[7..0] 13
M_B_A[15..0] 13
AUBURUNF
AUBURUNF
<Core Design>
Wistron Corporation
Title
06_CPU (3/7)-MEM INTERFACE

Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
of
58
AUBURNDALE
1.1V RAIL POWER
1
2
1
2
1
2
1
2
DY
The decoupling capacitors, filter

recommendations and sense resistors on the
CPU/PCH Rails are specific to the CRB
Implementation. Customers need to follow the
recommendations in the Calpella Platform
Design Guide.
1
2
C602
C218
VID0
VID1
VID2
VID3
VID4
VID5
VID6
PROC_DPRSLPVR
VTT_SELECT
AN33
AK35
AK33
AK34
AL35
AL33
AM33
AM35
AM34
G15
PSI# 38
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
H_VID[6..0]
38
PM_DPRSLPVR 38
H_VTTVID1
1
TP35 TPAD14-GP
Clarksfield H_VTTVID1 = Low, VTT = 1.1V
Arrandale H_VTTVID1 = High, VTT = 1.05V
VCC_CORE
AN35
R238
100R2F-L1-GP-U
IMVP_IMON 38
ISENSE
AJ34
AJ35
VCC_SENSE 38
VSS_SENSE 38
1
VCC_SENSE
VSS_SENSE
VTT_SENSE
VSS_SENSE_VTT
B15
A15
R232
100R2F-L1-GP-U
VTT_SENSE 42
1
2
1
2
C636
SCD1U10V2KX-5GP
Please note that the VTT Rail

Values are Auburndale
VTT=1.05V; Clarksfield
VTT=1.1V
PSI#
CPU VIDS
1
2
1
2
1
2
1
2
1
2
1
1
2
1
2
1
2
1
2
1
2
1
2
C611
SC10U6D3V3MX-GP
C604
SC10U6D3V3MX-GP
C603
SC10U6D3V3MX-GP
C605
SC10U6D3V3MX-GP
C613
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15
C616
SC10U6D3V3MX-GP
C635
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
SA 0917
1D05V_VTT
C621
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C634
C251
AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
1D05V_VTT
CPU CORE SUPPLY
C267
C627
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C243
C239
C241
SC10U6D3V3MX-GP
C242
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C620
C237
SC10U6D3V3MX-GP
C619
C238
SC10U6D3V3MX-GP
C618
C236
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C240
C235
1D05V_VTT
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
SC10U6D3V3MX-GP
C244
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
OF 9
SC10U6D3V3MX-GP
VCC_CORE
AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26
POWER
48A -->Arrandale
VCC_CORE
SENSE LINES
PROCESSOR CORE POWER
CPU1F
SB 1019 remove test point
<Core Design>
Wistron Corporation
AUBURUNF
Title
07_CPU (4/7)-POWER
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
of
58
0R2J-2-GP
0R2J-2-GP
0R2J-2-GP
0R2J-2-GP
0R2J-2-GP
S3_DY
D
D
D
D
8
7
6
5
AO4468-GP
84.04468.037
2nd = 84.04800.D37
U37_G
1
R459
RUN_POWER_ON
S3_DY 2
0R2J-2-GP
C570
SCD01U50V2KX-1GP
C186
C185
U56
S
S
S
G
2
2
2
2
2
2
1
2
S3_DY
Q64_D
1D05V_VTT
Q45
2N7002A-7-GP
ESD Protect
C209
SC10U6D3V3MX-GP
S3_DY
2
L26
L27
M26
VTT1
VTT1
VTT1
R466
200R2J-L1-GP
C606
SC10U6D3V3MX-GP
J22
J20
J18
H21
H20
H19
1
1.1V
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
1D05V_VTT
R257
0R0603-PAD
-1 0110
2
C381
SC10U6D3V3MX-GP
C247
SC10U6D3V3MX-GP
C246
SC4D7U6D3V3KX-GP
C259
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C256
PM_SLP_S3 36
-1 0114
1D8V_S0
0.6A
+V1.8S_VCCSFR
AUBURUNF
C184
C182
1
2
1
2
C204
1
2
3
4
S3
S3
S3
S3
S3
S3_DY
C211
SC1U6D3V2KX-GP
1.8V
1
2
1
2
1
2
C255
SC1U6D3V2KX-GP
C608
SC10U6D3V3MX-GP
C208
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
C210
PEG & DMI
TC7
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
C202
1
1
1
1
1
1D5V_CPU_VDDQ
1D05V_VTT
K26
J27
J26
J25
H27
G28
G27
G26
F26
E26
E25
C203
P10
N10
L10
K10
C201
1D5V_S3
R454
R453
R455
R456
R457
6A
1
VTT1
VTT1
VTT1
VTT1
1D5V_CPU_VDDQ
GFX_VR_EN:
4.7-k pull-down to GND at PWM
GFX_VR_EN 44
GFX_DPRSLPVR 44
GFX_IMON 44
AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1
SA 0901: LC require to reserve s3 reduce

power circuit
44
SC10U6D3V3MX-GP
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
GFX_VID[6..0]
SC10U6D3V3MX-GP
- 1.5V RAILS
AR25
AT25
AM24
DDR3
SENSE
LINES
GRAPHICS VIDs
GFX_VR_EN
GFX_DPRSLPVR
GFX_IMON
GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VID4
GFX_VID5
GFX_VID6
SC10U6D3V3MX-GP
AM22
AP22
AN22
AP23
AM23
AP24
AN24
SC10U6D3V3MX-GP
GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VID4
GFX_VID5
GFX_VID6
C230
SC1U6D3V2KX-GP
18A
VCC_AXG_SENSE 44
VSS_AXG_SENSE 44
SC1U6D3V2KX-GP
AR22
AT22
SC1U6D3V2KX-GP
VAXG_SENSE
VSSAXG_SENSE
SC1U6D3V2KX-GP
C205
SC1U6D3V2KX-GP
VTT1
VTT1
VTT1
FDI
C607
SC10U6D3V3MX-GP
J24
J23
H25
OF 9
SC1U6D3V2KX-GP
1D05V_VTT
GRAPHICS
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
AUBURNDALE
1
2
1
2
1
2
1
2
1
2
C234
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C233
AT21
AT19
AT18
AT16
AR21
AR19
AR18
AR16
AP21
AP19
AP18
AP16
AN21
AN19
AN18
AN16
AM21
AM19
AM18
AM16
AL21
AL19
AL18
AL16
AK21
AK19
AK18
AK16
AJ21
AJ19
AJ18
AJ16
AH21
AH19
AH18
AH16
Please note that the VTT Rail

Values are Auburndale
VTT=1.05V; Clarksfield
VTT=1.1V
ST220U2D5VBM-2GP
C609
SC10U6D3V3MX-GP
DY
C610
SC10U6D3V3MX-GP
DY
C612
SC10U6D3V3MX-GP
DY
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
C223
POWER
4
CPU1G
C216
C614
SC10U6D3V3MX-GP
5
VCC_GFXCORE
SA 0903: Place across the plane
SB 1022 Remove
<Core Design>
A
Wistron Corporation
Title
08_CPU (5/7)-Graphic PWR

Size
A3
Document Number
Date:
Rev
-1
LA46 MB DIS
Sheet
of
58
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AUBURUNF
VSS
OF 9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
CPU1I
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30
K27
K9
K6
K3
J32
J30
J21
J19
H35
H32
H28
H26
H24
H22
H18
H15
H13
H11
H8
H5
H2
G34
G31
G20
G9
G6
G3
F30
F27
F25
F22
F19
F16
E35
E32
E29
E24
E21
E18
E13
E11
E8
E5
E2
D33
D30
D26
D9
D6
D3
C34
C32
C29
C28
C24
C22
C20
C19
C16
B31
B25
B21
B18
B17
B13
B11
B8
B6
B4
A29
A27
A23
A9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
OF 9
AUBURNDALE
CPU1H
AT20
AT17
AR31
AR28
AR26
AR24
AR23
AR20
AR17
AR15
AR12
AR9
AR6
AR3
AP20
AP17
AP13
AP10
AP7
AP4
AP2
AN34
AN31
AN23
AN20
AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11
AM8
AM5
AM2
AL34
AL31
AL23
AL20
AL17
AL12
AL9
AL6
AL3
AK29
AK27
AK25
AK20
AK17
AJ31
AJ23
AJ20
AJ17
AJ14
AJ11
AJ8
AJ5
AJ2
AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13
AH9
AH6
AH3
AG10
AF8
AF4
AF2
AE35
VSS
NCTF TEST PIN:

A35,AT1,AT35,B1,A3,A33,A34,AP1,AP35,
AR1,AR35,AT2,AT3,AT33,AT34,B35,C1,C35
AUBURNDALE
VSS_NCTF#AR34
VSS_NCTF#B34
VSS_NCTF#B2
AR34
B34
B2
VSS_NCTF#B1
VSS_NCTF#A35
VSS_NCTF#AT1
VSS_NCTF#AT35
RSVD_NCTF#AT33
RSVD_NCTF#AT34
RSVD_NCTF#AP35
RSVD_NCTF#AR35
RSVD_NCTF#AT3
RSVD_NCTF#AR1
RSVD_NCTF#AP1
RSVD_NCTF#AT2
RSVD_NCTF#C1
RSVD_NCTF#A3
RSVD_NCTF#C35
RSVD_NCTF#B35
RSVD_NCTF#A34
RSVD_NCTF#A33
B1
A35
AT1
AT35
AT33
AT34
AP35
AR35
AT3
AR1
AP1
AT2
C1
A3
C35
B35
A34
A33
TP_MCP_VSS_NCTF6
TP_MCP_VSS_NCTF1
TP_MCP_VSS_NCTF2
TP_MCP_VSS_NCTF7
1
1
1
1
TP27
TP63
TP26
TP64
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AUBURUNF
<Core Design>
A
Wistron Corporation
Title
09_CPU (6/7)-VSS
Size
A3
Document Number
Date:
Rev
-1
LA46 MB DIS
Sheet
of
58
AH25
AK26
RSVD#AL26
RSVD_NCTF#AR2
AL26
AR2
RSVD#AJ26
RSVD#AJ27
AJ26
AJ27
PCI-Express Configuration Select

DY
R236
3KR2F-GP
CFG0
TPAD14-GP
TPAD14-GP
D
CFG3
CFG3 - PCI-Express Static Lane Reversal

CFG3
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TP61
TP56
TP49
TP48
TP57
TP60
TP62
TP52
TP47
TP54
TP105
TP104
1
1
1
1
1
1
1
1
1
1
1
1
1
1
H_RSVD17_R
H_RSVD18_R
B19
A19
RSVD#B19
RSVD#A19
A20
B20
RSVD#A20
RSVD#B20
U9
T9
RSVD#U9
RSVD#T9
AC9
AB9
J29
J28
RSVD#AC9
RSVD#AB9
RSVD#J29
RSVD#J28
RSVD#AR32
AR32
RSVD_TP#E15
RSVD_TP#F15
KEY
RSVD#D15
RSVD#C15
RSVD#AJ15
RSVD#AH15
E15
F15
A2
D15
C15
AJ15
AH15
CFG4
CFG4 - Display Port Presence

DY
R235
3KR2F-GP
CFG4
1:Disabled; No Physical Display Port

attached to Embedded Display Port
0:Enabled; An external Display Port
device is connected to the Embedded
Display Port
RSVD_TP#AA5
RSVD_TP#AA4
RSVD_TP#R8
RSVD_TP#AD3
RSVD_TP#AD2
RSVD_TP#AA2
RSVD_TP#AA1
RSVD_TP#R9
RSVD_TP#AG7
RSVD_TP#AE3
AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3
RSVD_TP#V4
RSVD_TP#V5
RSVD_TP#N2
RSVD_TP#AD5
RSVD_TP#AD7
RSVD_TP#W3
RSVD_TP#W2
RSVD_TP#N3
RSVD_TP#AE5
RSVD_TP#AD9
V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9
VSS
1 :Normal Operation
0 :Lane Numbers Reversed
15 -> 0, 14 -> 1, ...
TP58
TP55
AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
TPAD14-GP
TPAD14-GP
RSVD#AL28
RSVD#AL29
RSVD#AP30
RSVD#AP32
RSVD#AL27
RSVD#AT31
RSVD#AT32
RSVD#AP33
RSVD#AR33
CFG7
AP34
CFG7(Reserved) - Temporarily used for early

Clarksfield samples.
TP51
TP59
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
RSVD64_R
RSVD65_R
1
1
TP36 TPAD14-GP
TP33 TPAD14-GP
DY
2
TPAD14-GP
TPAD14-GP
1
1
1:Single PEG
0:Bifurcation enabled
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
RSVD_TP#H16
RSVD#AH25
RSVD#AK26
AM30
AM28
AP31
AL32
AL30
AM31
AN29
AM32
AK32
AK31
AK28
AJ28
AN30
AN32
AJ32
AJ29
AJ30
AK30
H16
CFG0
AJ13
AJ12
R233
3KR2F-GP
RESERVED
TP37
TP38
H_RSVD9_R
H_RSVD10_R
OF 9
RSVD#AJ13
RSVD#AJ12
TPAD14-GP
TPAD14-GP
1
1
RSVD#AP25
RSVD#AL25
RSVD#AL24
RSVD#AL22
RSVD#AJ33
RSVD#AG9
RSVD#M27
RSVD#L28
SA_DIMM_VREF#
SB_DIMM_VREF#
RSVD#G25
RSVD#G17
RSVD#E31
RSVD#E30
AUBURNDALE
CPU1E
AP25
AL25
AL24
AL22
AJ33
AG9
M27
L28
J17
H17
G25
G17
E31
E30
1
R234
3KR2F-GP
CFG7
Clarksfield (only for early samples pre-ES1) Connect to GND with 3.01K Ohm/5% resistor.
Note: Only temporary for early CFD sample
(rPGA/BGA) [For details please refer to the
WW33 MoW and sighting report].
For a common M/B design (for AUB and CFD),
the pull-down resistor shouble be used. Does
not impact AUB functionality.
RSVD_VSS 1
2
R231
0R0402-PAD
-1 0114
AUBURUNF
VSS (AP34) can be left NC is

CRB implementation; EDS/DG
recommendation to GND.
<Core Design>
A
Wistron Corporation
Title
10_CPU (7/7)-RESERVED
Size
A3
Document Number
Date:
Rev
-1
LA46 MB DIS
Sheet
10
of
58
1
Q9
C389
SC2200P50V2KX-2GP
H_THERMDC
MMBT3904WT1G-GP
Q6
MMBT3904WT1G-GP
CPU backside or inside the socket

CPU TEMP:
H_THERMDA and H_THERMDC routing 10mil trace width
and spacing. Locate Capacity near Thermal diode.
2200p close to smsc2103 chip

REMOTE2-
B
C183
SC390P50V2KX-GP
H_THERMDA
SA 0905 change to 390p
2200p close to smsc2103 chip
Close to PCH on top side.
Q42
MMBT3904WT1G-GP
C404
SC390P50V2KX-GP
B
C569
SC2200P50V2KX-2GP
DY
REMOTE2+
between CPU, VGA and DIMM on bottom side
5V_S0
R275
10KR2J-3-GP
R633
10KR2J-3-GP
R280
6K8R2J-GP
SA 0905
R426
10KR2J-3-GP
DY
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_AUX_S5
C39
SC4D7U6D3V3KX-GP
D2
1SS355PT-GP
Close to connector
SA 0823
FAN1
33,36 HW_THRMTRIP#
SYS_SHDN#
SHDN_SEL
1
FAN_PWM
FAN_TACH
R427 1
0R0402-PAD
SHDN --> 2N3904 ON External diode
Q25
2N7002A-7-GP
FAN_PWM_C
2
3
4
-1 0107
6
49 FAN_PWM_C
49 FAN_TACH
SB 1015 change to 84.2N702.E31
ACES-CON4-GP-U1
20.F0714.004
4 WIRE PWM Fan Control circuit
3D3V_S0
R260
68R2-GP
C388
2103_VDD
2
1
16
15
SC 1203
THERM_SCI#
33,34,55 SMBC_THERM
33,34,55 SMBD_THERM
1
R272
2
0R0402-PAD
SYS_SHDN#
THERM_SCI#_R
3
4
3D3V_S0
SRN10KJ-5-GP
3
H_THERMDA
H_THERMDC
REMOTE2+
REMOTE2-
1
TP66
TPAD14-GP
RN49
2
1
U31
SCD1U10V2KX-4GP
T8
VDD
DP1
DN1
DP2/DN3
ND2/DP3
7
6
SYS_SHDN#
ALERT#
9
8
SMCLK
SMDATA
GPIO1
GPIO2
4
5
TACH
PWM
10
11
TRIP_SET
SHDN_SEL
14
13
GND
GND
12
17
2103_4
2103_5
1
1
TP65 TPAD14-GP
TP67 TPAD14-GP
A
TRIP_SET R276 1
SHDN_SEL
2 2K05R2F-GP
T8 = 105
FAN_TACH
FAN_PWM
D7
1SS355PT-GP
SA 0905
EMC2103-2-AP-GP
pin6, ALERT# OD
pin7, SYS_SHDN# OD
<Core Design>
A
Wistron Corporation
Title
11_THERMAL SMSC2103
Size
A3
Document Number
Date:
Rev
-1
LA46 MB DIS
Sheet
11
of
58
MA_VTT
Place these caps

close to VTT1 and
VTT2.
1
2
C70
SC1U6D3V2KX-GP
C60
SC1U6D3V2KX-GP
C58
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
6 M_A_DQS#[7..0]
C48
6 M_A_DQS[7..0]
MA_VTT
203
204
H = 4mm
RESET#
VTT1
VTT2
DDR3-204P-31-GP-U
C81
C83
C84
C85
C87
C51
C86
C88
C46
C52
C47
1D5V_S3
VREF_CA
VREF_DQ
30
5,13 DDR3_DRAMRST#
SODIMM A DECOUPLING
ODT0
ODT1
126
1
M_VREF_CA_DIMM0
M_VREF_DQ_DIMM0
116
120
6 M_ODT0
6 M_ODT1
SB 1026 change to 78.22520.5BL
1D5V_S3
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
12
29
47
64
137
154
171
188
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
205
206
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
10
27
45
62
135
152
169
186
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C57
SC2D2U6D3V3KX-GP
R46
0R0603-PAD
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
PM_EXTTS#0_R 5
SCD1U10V2KX-5GP
-1 0107
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
C54
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
0D75_S0
77
122
125
-1 0107
PCH_SMBDATA 3,13,15
PCH_SMBCLK 3,13,15
3D3V_S0
NC#1
NC#2
NC#/TEST
SA0_DIM0
SA1_DIM0
2 0R0402-PAD
2 0R0402-PAD
2
1
C55
SC2D2U6D3V3KX-GP
SA0
SA1
197
201
1
1
SC10U6D3V3MX-GP
C53
SCD1U10V2KX-5GP
199
R53
R54
2
M_VREF_DQ_DIMM0
EVENT#
VDDSPD
R52 1
0R0402-PAD
SC10U6D3V3MX-GP
R42 1
0R0603-PAD
DIMM0_VREF_CADQ
TS#_DIMM0
198
SC 1203
-1 0107
SODIMM0_1_SMB_DATA_R
SODIMM0_1_SMB_CLK_R
C89
SC2D2U6D3V3KX-GP
200
202
2
1
C82
SCD1U10V2KX-5GP
SDA
SCL
M_CLK_DDR1 6
M_CLK_DDR#1 6
M_A_DM[7..0] 6
M_VREF_CA_DIMM0
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
R59 1
0R0603-PAD
DIMM0_VREF_CADQ
11
28
46
63
136
153
170
187
DY
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
M_CLK_DDR0 6
M_CLK_DDR#0 6
-1 0114
R64
1KR2F-3-GP
102
104
If SA0 DIM0 = 1, SA1_DIM0 = 0

SO-DIMMA SPD Address is 0xA2
SO-DIMMA TS Address is 0x32
R44
10KR2J-3-GP
DIMM0_VREF_CADQ
CK1
CK1#
DY
101
103
R45
10KR2J-3-GP
R66
0R0603-PAD
CK0
CK0#
SA1_DIM0
R63
1KR2F-3-GP
M_CKE0 6
M_CKE1 6
DDR_VREF_S3
1D5V_S3
CKE0
CKE1
SC10U6D3V3MX-GP
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
M_CS#0 6
M_CS#1 6
SCD1U10V2KX-5GP
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
114
121
73
74
Note:
If SA0 DIM0 = 0, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA0
SO-DIMMA TS Address is 0x30
SA0_DIM0
SC10U6D3V3MX-GP
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
CS0#
CS1#
SA 0902
R43
DY 10KR2J-3-GP
M_A_RAS# 6
M_A_WE# 6
M_A_CAS# 6
SC1U10V2KX-1GP
BA0
BA1
110
113
115
6 M_A_BS0
6 M_A_BS1
6 M_A_DQ[63..0]
NP1
NP2
SC10U6D3V3MX-GP
109
108
6 M_A_BS2
NP1
NP2
RAS#
WE#
CAS#
SC1U10V2KX-1GP
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2
SC1U10V2KX-1GP
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
79
DM1
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
1
3D3V_S0
SA 0820
6 M_A_A[15..0]
Place these Caps near SO-DIMMA.
A
<Core Design>
62.10017.M11
62.10017.M41
SB 1024 Change to 62.10017.M41
Wistron Corporation
Title
12_DDR3-SODIMM1
Size
Document Number
Custom
Date:
LA46 MB DIS
Rev
-1
Sheet
12
of
58
203
204
RESET#
VTT1
VTT2
DDR3-204P-51-GP
C43
1
2
62.10017.P51
62.10017.P91
SB 1024 Change to 62.10017.P91
SODIMM B DECOUPLING
C45
C539
C540
C44
C541
C535
C542
1D5V_S3
C536
C49
C537
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
205
206
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
1D5V_S3
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
C546
SC2D2U6D3V3KX-GP
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
1
1
2
C42
SC1U6D3V2KX-GP
C41
SC1U6D3V2KX-GP
MB_VTT
MB_VTT
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
77
122
125
-1 0107
C548
SCD1U10V2KX-5GP
PCH_SMBDATA 3,12,15
PCH_SMBCLK 3,12,15
3D3V_S0
C50
SC10U6D3V3MX-GP
NC#1
NC#2
NC#/TEST
SA0_DIM1
SA1_DIM1
2 0R0402-PAD
2 0R0402-PAD
1
1
PM_EXTTS#1_R 5
SCD1U10V2KX-5GP
VREF_CA
VREF_DQ
30
5,12 DDR3_DRAMRST#
SA0
SA1
197
201
R37
DY 10KR2J-3-GP
SC10U6D3V3MX-GP
ODT0
ODT1
126
1
199
SCD1U10V2KX-5GP
116
120
M_VREF_CA_DIMM1
M_VREF_DQ_DIMM1
EVENT#
VDDSPD
R39
R40
R38 1
0R0402-PAD
SC10U6D3V3MX-GP
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
TS#_DIMM1
198
SC 1203
SCD1U10V2KX-5GP
12
29
47
64
137
154
171
188
SODIMM1_1_SMB_DATA_R
SODIMM1_1_SMB_CLK_R
SC10U6D3V3MX-GP
C40
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
6 M_ODT2
6 M_ODT3
R41
0R0603-PAD
Place these caps

close to VTT1 and
VTT2.
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
200
202
SC1U10V2KX-1GP
0D75_S0
-1 0107
10
27
45
62
135
152
169
186
SDA
SCL
SC1U10V2KX-1GP
6 M_B_DQS[7..0]
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
R424
10KR2J-3-GP
SC1U10V2KX-1GP
6 M_B_DQS#[7..0]
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
11
28
46
63
136
153
170
187
M_CLK_DDR3 6
M_CLK_DDR#3 6
M_B_DM[7..0] 6
SC10U6D3V3MX-GP
102
104
CK1
CK1#
C538
SC2D2U6D3V3KX-GP
M_CLK_DDR2 6
M_CLK_DDR#2 6
2
1
C544
SCD1U10V2KX-5GP
101
103
SA0_DIM1
M_VREF_DQ_DIMM1
CK0
CK0#
Note:
SO-DIMMB SPD Address is 0xA4
SO-DIMMB TS Address is 0x34
SA1_DIM1
C543
SC2D2U6D3V3KX-GP
M_CKE2 6
M_CKE3 6
2
1
R423 1
0R0603-PAD
DIMM1_VREF_CADQ
C547
SCD1U10V2KX-5GP
CKE0
CKE1
M_VREF_CA_DIMM1
M_CS#2 6
M_CS#3 6
R425 1
0R0603-PAD
114
121
73
74
-1 0107
CS0#
CS1#
R36
10KR2J-3-GP
DY
M_B_RAS# 6
M_B_WE# 6
M_B_CAS# 6
-1 0114
110
113
115
DIMM1_VREF_CADQ
R421
1KR2F-3-GP
DIMM1_VREF_CADQ
3D3V_S0
DY
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
RAS#
WE#
CAS#
R419
0R0603-PAD
BA0
BA1
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
NP1
NP2
DDR_VREF_S3
109
108
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
NP1
NP2
SA 0902
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2
6 M_B_BS0
6 M_B_BS1
6 M_B_DQ[63..0]
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
79
6 M_B_BS2
R420
1KR2F-3-GP
DM2
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
1D5V_S3
B
1
SA 0820
6 M_B_A[15..0]
H =8mm
SO-DIMMB is placed farther from
the Processor than SO-DIMMA
A
<Core Design>
Wistron Corporation
Title
13_DDR3-SODIMM2
Size
Document Number
Custom
Date:
LA46 MB DIS
Rev
-1
Sheet
13
of
58
4
RTC_AUX_S5
R472
2 20KR2J-L2-GP
ICH_RTCX1
ICH_RTCX2
B13
D13
RTCX1
RTCX2
ICH_RTCRST#
C14
RTCRST#
SRTCRST#
D17
SRTCRST#
SRTCRST# new signal Pin
check 20ppm + 5.6p

C587
SC1U6D3V2KX-GP
27 ACZ_BITCLK_AUDIO
R96
27 ACZ_SYNC_AUDIO
2
SC33P50V2JN-3GP
2
SC33P50V2JN-3GP
2
SC33P50V2JN-3GP
2
SC33P50V2JN-3GP
R94
A16
INTRUDER#
ICH_INTVRMEN
A14
INTVRMEN
A30
HDA_BCLK
D29
HDA_SYNC
ACZ_BIT_CLK
33R2J-2-GP
ACZ_SYNC
33R2J-2-GP
P1
27 ACZ_SPKR
1
27 ACZ_RST#_AUDIO
R97
ACZ_RST#
33R2J-2-GP
27 ACZ_SDATAIN0
1
TPAD14-GP
HDA_SDIN2
C30
HDA_RST#
G30
HDA_SDIN0
F30
HDA_SDIN1
E32
HDA_SDIN2
TP98
F32
HDA_SDIN3
B29
HDA_SDO
HDA_DOCK_EN#
R482
1
2
0R0402-PAD
1
DY 2
R481
8K2R2J-3-GP
Low: Flash Descriptor Security will be overridden
H32
HDA_DOCK_EN#/GPIO33
J30
HDA_DOCK_RST#/GPIO13
PCH_JTAG_TCK
M3
JTAG_TCK
PCH_JTAG_TMS
K3
JTAG_TMS
PCH_JTAG_TDI
K1
JTAG_TDI
PCH_JTAG_TDO
J2
JTAG_TDO
PCH_JTAG_RST#
J4
1
R95
C34
A34
F34
PCH_GPIO23
SERIRQ
AB9
INT_SERIRQ
DY
ACZ_SPKR
2
1KR2J-1-GP
No Reboot Strap R23

Low = Default
HDA_SPKR High = No Reboot
SPI_CS0#, SPI_MISO, SPI_MOSI, SPI_CLK:
No series resistor required if routing length is 1.5"-6.5"
CHECK
-1 0114
DY 1
DY 1
DY 1
R145
PCH_JTAG_TDO
1
R126
R201 1
15R2J-GP
SATA
AK7
AK6
AK11
AK9
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
AH6
AH5
AH9
AH8
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
AF11
AF9
AF7
AF6
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
AH3
AH1
AF3
AF1
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
AD9
AD8
AD6
AD5
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
AD3
AD1
AB3
AB1
INT_SERIRQ
SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0
28
28
28
28
33
HDD
PCH: 71.0IBEX.G0U
C
SATA_RXN4
SATA_RXP4
SATA_TXN4
SATA_TXP4
28
28
28
28
ODD
1D05V_S0
SATAICOMPO
AF16
SATAICOMPI
AF15
SATAICOMP
BA2
SPI_CLK
SPI_CS#0_R
AV3
SPI_CS0#
AY3
SPI_CS1#
SATALED#
T3
SATA_LED#
SPI_MOSI_R
AY1
SPI_MOSI
SATA0GP/GPIO21
Y9
SATA_DET#0_R
SPI_MOSO_R
AV1
SATA1GP/GPIO19
V1
SATA_DET#1_R
1
2
R186
37D4R2F-GP
SATA_LED# 34
IBEXPEAK-M-GP-NF
200R2J-L1-GP
DY
SPI_MOSI Enable iTPM: Connect to Vcc3_3 with

8.2-k weak pull-up resistor.
3D3V_S0
RN25
DY 1
10KR2J-3-GP
R136
100R2J-2-GP
INT_SERIRQ
SATA_LED#
SATA_DET#1_R
SATA_DET#0_R
Disable iTPM: Left floating, no

pull-down required
3D3V_S0
PCH_JTAG_TMS
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SPI_MISO
33,35
TP101 TPAD14-GP
35 SPI_MOSO_R
TRST#
200R2J-L1-GP
R149
PCH_JTAG_RST#
R202 1
15R2J-GP
Low=Disable
33,35
33,35
33,35
33,35
LPC_LFRAME#
SPI_CLK_R
200R2J-L1-GP
R131
PCH_JTAG_TDI
35 PCH_SPI_CS#0
35 PCH_SPI_MOSI
1D05V_S0
PCH_JTAG_TMS
35 PCH_SPI_CLK
R206 1
15R2J-GP
SPI
1
R158
JTAG
33 ME_UNLOCK#
3D3V_S0
High=Enable
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LDRQ0#
LDRQ1#/GPIO23
-1 0107
NO REBOOT STRAP
D33
B33
C32
A32
FWH4/LFRAME#
SPKR
2 ACZ_SDATAOUT
33R2J-2-GP
27 ACZ_SDATAOUT_AUDIO
Low=Disable
1 OF 10
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
SM_INTRUDER#
-1 0126 BOM Change
1
DY ECT4
ACZ_SYNC
1
DY ECT1
ACZ_BIT_CLK
1
DY ECT3
ACZ_SDATAOUT
1
DY ECT2
High=Enable
LAN100_SLP
LPC
R471 1
20KR2J-L2-GP
ACZ_RST#
INTVRMEN
ICH_INTVRMEN
330KR2F-L-GP
PCH1A
RTC_AUX_S5
82.30001.661
SC-BOM Change to 6p
-1 0109 10ppm
2 SM_INTRUDER#
1MR2J-1-GP
1
R475
RTC
C190
SC5D6P50V2CN-1GP
1
R99
2
2
GAP-OPEN
X-32D768KHZ-34GPU
C191
SC5D6P50V2CN-1GP
G77
C591
SC1U6D3V2KX-GP
integrated VccLan1_05VccCL1_05
IHDA
X2
4
2
integrated VccSus1_05,VccSus1_5,VccCL1_5
RTC_AUX_S5
ICH_RTCX2
2
10MR2J-L-GP
1
R204
3D3V_AUX_S5
DY
SPI_MOSI_R
2
8K2R2J-3-GP
RTC_AUX_S5
RTC_BAT
D20
5
6
7
8
4
3
2
1
SRN10KJ-6-GP
SA-0914
RTC1
2
4
DY 1
R135
PCH_JTAG_TDI
DY 1
PCH_JTAG_TCK
1
R121
1
R154
2
R515
0R0603-PAD
100R2J-2-GP
DY
RTC_PWR_L
3
1
-1 0107
R140
PCH_JTAG_RST#
1
100R2J-2-GP
PCH_JTAG_TDO
SA 0906
ICH_RTCX1
1
R104
2
51R2F-2-GP
C643
SC1U10V2ZY-GP
BAS40WCGP-GP-U
RTC_PWR
1
R516
1KR2J-1-GP
83.00040.R81
2ND = 83.BAT54.Z81
SB 1015 change to 83.00040.Q81
SB 1030 change to 83.00040.R81
2
51R2F-2-GP
1
2
3
5
ACES-CON3-4-GP-U
20.F1267.003
<Core Design>
When unused all JTAG pins may be NC
Wistron Corporation
Title
14_PCH (1/9)-SATA/SPI/LPC/HDA
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
14
of
58
1
3D3V_S5
8
7
6
5
2 OF 10
PU, page 19
31
31
31
31
PCIE_RXN2
PCIE_RXP2
PCIE_TXN2
PCIE_TXP2
PCIE_RXN2
PCIE_RXP2
SCD1U10V2KX-5GP 2
SCD1U10V2KX-5GP 2
1 C324
1 C323
TXN2
TXP2
AW30
BA30
BC30
BD30
PERN2
PERP2
PETN2
PETP2
31
31
31
31
PCIE_RXN4
PCIE_RXP4
PCIE_TXN4
PCIE_TXP4
C326
C325
SCD1U10V2KX-5GP 2
SCD1U10V2KX-5GP 2
SCD1U10V2KX-5GP 2
SCD1U10V2KX-5GP 2
1
1
1
1
TXN3
TXP3
TXN4
TXP4
PCIECLKRQ{0,3,4,5,6,7}# should
have a 10K pull-up to +3VALW.
PCIECLKRQ{1,2} should have a
10K pull-up to +1.05VS (But CRB is
pull-up to +3VS).
AU30
AT30
AU32
AV32
PERN4
PERP4
PETN4
PETP4
BF33
BH33
BG32
BJ32
PERN5
PERP5
PETN5
PETP5
BA34
AW34
BC34
BD34
PERN6
PERP6
PETN6
PETP6
AT34
AU34
AU36
AV36
PERN7
PERP7
PETN7
PETP7
BG34
BJ34
BG36
BJ36
PERN8
PERP8
PETN8
PETP8
AK48
AK47
CHECK
PCIE_CLK_RQ0#
31 MINI1_CLKREQ#
PCIE_CLK_RQ1#
R172
U4
0R0402-PAD
AM47
AM48
31 CLK_PCIE_MINI2#
31 CLK_PCIE_MINI2
31 MIN2_CLKREQ#
PCIE_CLK_RQ2#
R148
N4
0R0402-PAD
AH42
AH41
29 CLK_PCIE_LAN#
29 CLK_PCIE_LAN
29 LAN_CLKREQ#
PCIE_CLK_RQ3#
R113
A8
0R0402-PAD
AM51
AM53
31 CLK_PCIE_NEW#
31 CLK_PCIE_NEW
31 NEW_CLKREQ#
R122
PCIE_CLK_RQ4#
M9
0R0402-PAD
-1 0111
PCIE_CLK_RQ5#
AJ50
AJ52
H6
AK53
AK51
PEG_B_CLKRQ#
PCIECLKRQ1#/GPIO18
CLKOUT_PCIE2N
CLKOUT_PCIE2P
C6
SML0_CLK
SML0_DATA
SML1ALERT#/GPIO74
PCH_GPIO74
SML1CLK/GPIO58
E10
KBC_SCL1
SML1DATA/GPIO75
G12
KBC_SDA1
CL_CLK1
T13
CL_CLK
CL_DATA1
T11
CL_DATA 1
CL_RST1#
T9
CL_RST# 1
PEG_A_CLKRQ#/GPIO47
H1
PEG_CLKREQ# 1
R124
RN62
SRN2K2J-4-GP
KBC_SDA1 33
3D3V_S0
1
TP45 TPAD14-GP
SMB_CLK
SMB_DATA
TP43 TPAD14-GP
TP40 TPAD14-GP
AD43
AD45
DY
DIS
CLK_PCH_PEGA_N
CLK_PCH_PEGA_P
3,12,13 PCH_SMBDATA
2
0R2J-2-GP
PEX_CLKREQ 51
RN27
3
4 SRN0J-10-GP-U
2
1
AT1
AT3
CLKOUT_DP_N
CLKOUT_DP_P
AW24
BA24
CLKIN_DMI#
CLKIN_DMI
CLKIN_DMI# 3
CLKIN_DMI 3
CLKIN_BCLK_N
CLKIN_BCLK_P
AP3
AP1
CLK_CPU_BCLK#
CLK_CPU_BCLK
CLK_CPU_BCLK# 3
CLK_CPU_BCLK 3
CLKIN_DOT_96N
CLKIN_DOT_96P
F18
E18
DREFCLK#
DREFCLK
DREFCLK# 3
DREFCLK 3
AH13
AH12
CLK_PCIE_SATA#
CLK_PCIE_SATA
CLK_PCIE_SATA# 3
CLK_PCIE_SATA 3
SMB_CLK
CLK_PCIE_PEG# 51
CLK_PCIE_PEG 51
CLKIN_DMI_N
CLKIN_DMI_P
4
3
SMB_DATA
PCH_SMBCLK 3,12,13
DMN66D0LDW-7-GP
84.DMN66.03F
2ND = 84.27002.F3F
PEG_CLK#_R 5
PEG_CLK_R 5
-1 0111
1
2 RN36
SRN0J-10-GP-U
DPLL_REF_SSCLK# 5
DPLL_REF_SSCLK 5
DY
CHECK
PEG_CLKREQ#
1
R127
2
10KR2J-3-GP
SA 0908
PCIECLKRQ4#/GPIO26
CLKOUT_PCIE5N
CLKOUT_PCIE5P
REFCLK14IN
P41
CLK_ICH14
CLK_ICH14
CLKIN_PCILOOPBACK
J42
CLK_PCI_FB
CLK_PCI_FB
XTAL25_IN
XTAL25_OUT
AH51
AH53
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
AF38
XCLK_RCOMP
3D3V_S5
RN23
PCIE_CLK_RQ0#
PCH_GPIO74
19 PCH_GPIO12
1
2
3
4
8
7
6
5
SRN10KJ-6-GP
18
1D05V_S0
ASM if external crystal is not used.
1
R229
2
90D9R2F-1-GP
XTAL25_IN
1
R187
2
0R2J-2-GP
PCH_FLEX0 1
CLKOUTFLEX0/GPIO64
T45
CLKOUTFLEX1/GPIO65
P43
PCH_FLEX1 1
CLKOUTFLEX2/GPIO66
T42
PCH_FLEX2 1
CLKOUTFLEX3/GPIO67
N50
TP107 TPAD14-GP
CLK48
1
33R2J-2-GP
TP108 TPAD14-GP
XTAL25_IN
X3
TP109 TPAD14-GP
XTAL-25MHZ-102-GP
2
R155
CLK48_Cardreader
82.30020.851
2nd = 82.30020.791
31
XTAL25_OUT
C207
DY SC4D7P50V2CN-1GP
DY
2
1
C227
SC18P50V2JN-1-GP
DY
DY
2
1
C219
SC18P50V2JN-1-GP
3D3V_S5
RN72
PCIE_CLK_RQ2#
1
2
3
4
R157
10KR2J-3-GP
8
7
6
5
PEG_B_CLKRQ#
PCIE_CLK_RQ4#
PCIE_CLK_RQ5#
PCH_GPIO57
PCH_GPIO57
19
SRN10KJ-6-GP
DY
DY
2
DY
KBC_SCL1
3D3V_S0
CLKOUT_DP_N/CLKOUT_BCLK1_N
CLKOUT_DP_P/CLKOUT_BCLK1_P
CLKOUT_PCIE4N
CLKOUT_PCIE4P
R153
10KR2J-3-GP
R165
10KR2J-3-GP
R114
10KR2J-3-GP
KBC_SDA1
3D3V_S5
AN4
AN2
PCIECLKRQ3#/GPIO25
PCIE_CLK_RQ1#
PCIE_CLK_RQ3#
SML0_CLK
SML0_DATA
KBC_SCL1 33
3D3V_S0
R168
10KR2J-3-GP
R112
10KR2J-3-GP
19
PU, page 19
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_PCIE3N
CLKOUT_PCIE3P
PEG_B_CLKRQ#/GPIO56
PCH_GPIO60
G8
CLKIN_SATA_N/CKSSCD_N
CLKIN_SATA_P/CKSSCD_P
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
SMB_DATA 31
J14
Q7
PCIECLKRQ2#/GPIO20
PCIECLKRQ5#/GPIO44
SMB_DATA
IO
3D3V_S0
3D3V_S5
CLKOUT_PCIE1N
CLKOUT_PCIE1P
C8
RN70
SRN2K2J-4-GP
19
SMB_CLK 31
IBEXPEAK-M-GP-NF
CHECK
P13
PCIECLKRQ0#/GPIO73
SMB_CLK
M14
SML0DATA
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_PCIE0N
CLKOUT_PCIE0P
PCH_GPIO11
H14
P9
AM43
AM45
31 CLK_PCIE_MINI1#
31 CLK_PCIE_MINI1
PERN3
PERP3
PETN3
PETP3
BA32
BB32
BD32
BE32
SML0CLK
B9
C328
C327
SMBDATA
SML0ALERT#/GPIO60
SMBus
PCIE_RXN3
PCIE_RXP3
PCIE_TXN3
PCIE_TXP3
SMBCLK
Link
31
31
31
31
SMBALERT#/GPIO11
PERN1
PERP1
PETN1
PETP1
BG30
BJ30
BF29
BH29
1
2
3
4
TXN1
TXP1
8
7
6
5
1 C321
1 C322
PEG
NEW CARD
PCIE_RXN1
PCIE_RXP1
SCD1U10V2KX-5GP 2
SCD1U10V2KX-5GP 2
PCI-E*
MINICARD2
WWAN
PCIE_RXN1
PCIE_RXP1
PCIE_TXN1
PCIE_TXP1
Controller
MINICARD1
WLAN
29
29
29
29
From CLK BUFFER
LAN
1
2
3
4
PCH1B
Clock Flex
<Core Design>
Wistron Corporation
Title
15_PCH (2/9)-PCIE / SMBUS / CLK

Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
15
of
58
BC24
BJ22
AW20
BJ20
DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN
4
4
4
4
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
BD24
BG22
BA20
BG20
DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP
4
4
4
4
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
BE22
BF21
BD20
BE18
DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
4
4
4
4
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
BD22
BH21
BC20
BD18
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP
BH25
DMI_IRCOMP_R
2
49D9R2F-GP
BF25
DMI_ZCOMP
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12
FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7
4
4
4
4
4
4
4
4
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12
FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7
4
4
4
4
4
4
4
4
FDI_INT
BJ14
FDI_INT
FDI_FSYNC0
BF13
FDI_FSYNC0
FDI_FSYNC1
BH13
FDI_FSYNC1
FDI_LSYNC0
BJ12
FDI_LSYNC0
FDI_LSYNC1
BG14
FDI_LSYNC1
DMI_IRCOMP
4
4
3D3V_S0
PM_SYSRST#_R
T6
M6
R102 1
36 PM_PWROK
DY
36,38 CORE_PWRGD
-1 0107
R103
1
R116
2 0R2J-2-GP
2
0R0402-PAD
PM_PWROK_1
B17
10KR2J-3-GP
1
R139
SYS_PWROK
PWROK
ME_PWROK
2
0R0402-PAD
K5
MEPWROK
LAN_RST#1
10KR2J-3-GP
A10
LAN_RST#
SA 0906
1
R485
D9
5 PM_DRAM_PWRGD
PM_RSMRST#
C16
SC 1203
33 SUS_PWR_DN_ACK
SUS_PWR_DN_ACK/GPIO30
PWRBTN#
2
0R0402-PAD
PM_PWRBTN#_R
2
0R0402-PAD
AC_PRESENT_R
P7
PCH_GPIO72
A6
33 AC_PRESENT
R166
PM_RI#
RSMRST#
P5
1
R169
DRAMPWROK
M1
2
0R0402-PAD
R159
33 PM_PWRBTN#
SUS_PWR_DN_ACK_R
F14
PCIE_WAKE#
CLKRUN#/GPIO32
Y1
PM_CLKRUN#
SUS_STAT#/GPIO61
P8
PM_SUS_STAT# 1
SUSCLK/GPIO62
F3
PM_SUS_CLK
SLP_S5#/GPIO63
E4
PM_SLP_S5#
SLP_S4#
H7
PM_SLP_S4#_R
SLP_S3#
P12
PM_SLP_S3#_R
SLP_M#
K8
PM_SLP_M#_R
N2
PM_SLP_DSW#
BJ10
H_PM_SYNC
F6
PM_SLP_LAN#
WAKE#
-1 0107
J12
SYS_RESET#
System Power Management
R173
10KR2J-3-GP
ACPRESENT/GPIO31
PCIE_WAKE# 29,31
PM_CLKRUN# 33
TP23
BATLOW#/GPIO72
PMSYNCH
RI#
SLP_LAN#/GPIO29
TP42 TPAD14-GP
TP28 TPAD14-GP
TP97 TPAD14-GP
2
0R0402-PAD
PM_SLP_S4# 31,33,36,41,43
2
0R0402-PAD
PM_SLP_S3# 5,31,33,36,41,42,43,44
R129
R137
-1 0107
1
TP102 TPAD14-GP
1
TP30 TPAD14-GP
H_PM_SYNC 5
1
TP96 TPAD14-GP
IBEXPEAK-M-GP-NF
3D3V_S5
RN24
SC 1209
3D3V_AUX_S5
PM_RI#
SUS_PWR_DN_ACK_R
AC_PRESENT_R
PM_PWRBTN#_R
1
2
3
4
8
7
6
5
SRN10KJ-6-GP
2
R601
0R0402-PAD
RSMRST#_KBC_R
-1 0107
Q64
DY
1
R111
PCIE_WAKE#
1
R133
DY
PM_RSMRST#
PWM_RSMRST# 40
High Active
PM_RSMRST#
PCH_GPIO72
1
D16
BAT54PT-GP
3
33 RSMRST#_KBC
83.00054.T81
2ND = 83.00054.Z81
3D3V_S5
R647
100KR2J-1-GP
DY
2
R100
10KR2J-3-GP
R646
10KR2J-3-GP
3D3V_S5
R101
100KR2J-1-GP
3 OF 10
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
1D05V_S0
1
R219
4
4
4
4
PCH1C
FDI
DMI
8K2R2J-3-GP
1KR2J-1-GP
3D3V_S0
PM_CLKRUN#
1
2
R174
8K2R2J-3-GP
DMN66D0LDW-7-GP
84.DMN66.03F
2ND = 84.27002.F3F
<Core Design>
A
Wistron Corporation
Title
16_PCH (3/9)-DMI / FDI / PM

Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
16
of
58
SA 0908 Add
3D3V_S0
PCH_HDMI_CLK
PCH_HDMI_DATA
3
4
Reserve PD at SW
SRN2K2J-1-GP
24 L_BKLTCTL
SA 0904 Add
2
1
RN67
SRN2K2J-1-GP
RN26
LCTL_CLK
LCTL_DATA
4
3
SRN10KJ-5-GP
LIBG
2
1
R195
2K37R2F-GP
LVDS reference current.
L_BKLTCTL
LCTL_CLK
LCTL_DATA
AB46
V48
L_CTRL_CLK
L_CTRL_DATA
LIBG
L_LVBG
AP39
AP41
LVD_IBG
LVD_VBG
LVDS_VREF
AT43
AT42
LVD_VREFH
LVD_VREFL
23 PCH_TXACLK23 PCH_TXACLK+
AV53
AV51
LVDSA_CLK#
LVDSA_CLK
23 PCH_TXAOUT023 PCH_TXAOUT123 PCH_TXAOUT2-
BB47
BA52
AY48
AV47
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
23 PCH_TXAOUT0+
23 PCH_TXAOUT1+
23 PCH_TXAOUT2+
BB48
BA50
AY49
AV48
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
AP48
AP47
LVDSB_CLK#
LVDSB_CLK
AY53
AT49
AU52
AT53
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
AY51
AT48
AU50
AT51
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
AA52
AB53
AD53
CRT_BLUE
CRT_GREEN
CRT_RED
2 R196
1
0R0402-PAD
1
2
Y48
L_DDC_CLK
L_DDC_DATA
TPAD14-GP TP44
3D3V_S0
L_BKLTEN
L_VDD_EN
AB48
Y45
CLK_DDC_EDID
DAT_DDC_EDID
3
4
T48
T47
CLK_DDC_EDID
DAT_DDC_EDID
23 CLK_DDC_EDID
23 DAT_DDC_EDID
3D3V_S0
SA 0908 Add
PCH_HDMI_DETECT
1
2
R191
100KR2J-1-GP
SA 0904 Add
3D3V_S0
RN66
2
1
3
4
RN29
1
2
3
4
PCH_BLUE
PCH_GREEN
PCH_RED
23 PCH_BLUE
23 PCH_GREEN
23 PCH_RED
PCH_BLUE
PCH_GREEN
PCH_RED
25 PCH_DDCCLK
25 PCH_DDCDATA
PCH_DDCCLK
PCH_DDCDATA
25 PCH_HSYNC
25 PCH_VSYNC
1
2
R177
1KR2D-1-GP
CRT_IREF
CRT_DDC_CLK
CRT_DDC_DATA
Y53
Y51
CRT_HSYNC
CRT_VSYNC
1K 0.5% ohm
AD48
AB51
DAC_IREF
CRT_IRTN
BJ46
BG46
SDVO_STALLN
SDVO_STALLP
BJ48
BG48
SDVO_INTN
SDVO_INTP
BF45
BH45
T51
T53
PCH_HDMI_CLK
PCH_HDMI_DATA
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
BG44
BJ44
AU38
PCH_HDMI_DETECT
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38
PCH_HDMI_DATA2-_L
PCH_HDMI_DATA2+_L
PCH_HDMI_DATA1-_L
PCH_HDMI_DATA1+_L
PCH_HDMI_DATA0-_L
PCH_HDMI_DATA0+_L
PCH_HDMI_CLK-_L
PCH_HDMI_CLK+_L
DDPC_CTRLCLK
DDPC_CTRLDATA
Y49
AB49
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
BE44
BD44
AV40
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36
DDPD_CTRLCLK
DDPD_CTRLDATA
V51
V53
SRN150F-1-GP
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_CTRLCLK
SDVO_CTRLDATA
PCH_DDCCLK
PCH_DDCDATA
SRN2K2J-1-GP
8
7
6
5
4 OF 10
PCH1D
23 PCH_BL_ON
24 PCH_LCDVDD_ON
UMA RN22
LVDS
2
1
Digital Display Interface
CRT
PCH_HDMI_CLK 26
PCH_HDMI_DATA 26
PCH_HDMI_DETECT
C288
C289
C286
C287
C284
C285
C283
C282
1
1
1
1
1
1
1
1
2
UMA
2
UMA
2
UMA
2
UMA
2
UMA
2
UMA
2
UMA
2
UMA
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
26
PCH_HDMI_DATA2- 26
PCH_HDMI_DATA2+ 26
PCH_HDMI_DATA1- 26
PCH_HDMI_DATA1+ 26
PCH_HDMI_DATA0- 26
PCH_HDMI_DATA0+ 26
PCH_HDMI_CLK- 26
PCH_HDMI_CLK+ 26
U50
U52
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
BC46
BD46
AT38
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36
IBEXPEAK-M-GP-NF
Intel check list recommend use 1K 0.5%
<Core Design>
A
Wistron Corporation
Title
17_PCH (4/9)-LVDS / CRT

Size
A3
Document Number
Date:
Rev
-1
LA46 MB DIS
Sheet
17
of
58
SRN8K2J-2-GP-U
3D3V_S0
3D3V_S0
RN73
1
2
3
4
INT_PIRQB#
2
2 8K2R2J-3-GP PCI_REQ3#
8K2R2J-3-GP
1
R134 1
R141
PCI_REQ0#
PCI_PERR#
INT_PIRQH#
PCI_REQ1#
8
7
6
5
SRN8K2J-4-GP
3D3V_S0
-1 0114
1
INT_PIRQF#
R138
8K2R2J-3-GP
3D3V_S0
RN65
1
2
3
4
INT_PIRQA#
INT_PIRQC#
INT_PIRQE#
PCI_SERR#
8
7
6
5
SB 1015 R105 change to ASM

3D3V_S0
SRN8K2J-4-GP
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
R105
8K2R2J-3-GP
23,24,25 dGPU_SELECT#
PCI_REQ0#
PCI_REQ1#
dGPU_SELECT#
PCI_REQ3#
PCI_GNT0#
PCI_GNT1#
PCI_GNT0# 1
PCI_GNT1# 1
DY
DY
C/BE0#
C/BE1#
C/BE2#
C/BE3#
G38
H51
B37
A44
PIRQA#
PIRQB#
PIRQC#
PIRQD#
F51
A46
B45
M53
PCI_GNT3#
INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
INT_PIRQH#
B41
K53
A36
A48
BOOT BIOS Strap

K6
PCI_GNT#0
PCI_GNT#1
BOOT BIOS Location
LPC(Default)
Reserved
PCI
SPI
PCI_SERR#
PCI_PERR#
PCI_IRDY#
1
TPAD14-GP
R151 1
R160 1
R161 1
35 PCLK_FWH
15 CLK_PCI_FB
33 CLK_PCI_KBC
PCI_DEVSEL#
PCI_FRAME#
A42
H44
F46
C46
PCI_PLOCK#
D49
PCI_STOP#
PCI_TRDY#
D41
C48
ICH_PME#
M7
PCI_PLTRST#
D5
TP39
2 22R2J-2-GP
2 22R2J-2-GP
2 22R2J-2-GP
TPAD14-GP
TPAD14-GP
E44
E50
TP32
TP29
CLK_PCI_SIO_R
CLK_PCI_FB_R
CLK_PCI_KBC_R
1 CLK_PCI_3
1 CLK_PCI_4
N52
P53
P46
P51
P48
REQ0#
REQ1#/GPIO50
REQ2#/GPIO52
REQ3#/GPIO54
GNT0#
GNT1#/GPIO51
GNT2#/GPIO53
GNT3#/GPIO55
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
PCIRST#
SERR#
PERR#
IRDY#
PAR
DEVSEL#
FRAME#
AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6
NV_ALE
NV_CLE
BD3
AY6
NV_RCOMP
AU2
NV_RB#
AV7
NV_WR#0_RE#
NV_WR#1_RE#
AY8
AY5
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
PLOCK#
USBRBIAS#
STOP#
TRDY#
USBRBIAS
PME#
PLTRST#
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4
OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO9
OC6#/GPIO10
OC7#/GPIO14
DMI Termination Voltage

NV_CLE
Set to Vss when low.

Set to Vcc when high.
R210
1KR2J-1-GP
AV9
BG8
NV_DQ0/NV_IO0
NV_DQ1/NV_IO1
NV_DQ2/NV_IO2
NV_DQ3/NV_IO3
NV_DQ4/NV_IO4
NV_DQ5/NV_IO5
NV_DQ6/NV_IO6
NV_DQ7/NV_IO7
NV_DQ8/NV_IO8
NV_DQ9/NV_IO9
NV_DQ10/NV_IO10
NV_DQ11/NV_IO11
NV_DQ12/NV_IO12
NV_DQ13/NV_IO13
NV_DQ14/NV_IO14
NV_DQ15/NV_IO15
NV_WE#_CK0
NV_WE#_CK1
+V_NVRAM_VCCQ
AY9
BD1
AP15
BD8
J50
G42
H47
G34
NV_DQS0
NV_DQS1
NV_CLE
DY
2
NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3
F48
K45
F36
H53
dGPU_PWM_SELECT#
24 dGPU_PWM_SELECT#
2 R118
1KR2J-1-GP
2 R150
1KR2J-1-GP
+V_NVRAM_VCCQ
These pins are left as NC,

because the function is disable.
Danbury Technology:
Disabled when Low.
Enable when High.
NV_ALE
These pins are left as NC,

because the function is disable.
5 OF 10
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
NVRAM
3D3V_S0
PCH1E
H40
N34
C44
A38
C36
J34
A40
D45
E36
H48
E40
C40
M48
M45
F53
M40
M43
J36
K48
F40
C42
K46
M51
J52
K51
L34
F42
J40
G46
F44
M47
H36
USB
3D3V_S0
10
PCI_STOP#
9
INT_PIRQD#
8
PCI_IRDY#
7
PCI_FRAME#
6
1
2
3
4
5
PCI
RN63
PCI_TRDY#
PCI_PLOCK#
PCI_DEVSEL#
INT_PIRQG#
R214
DY 1KR2J-1-GP
2
NV_ALE
NV_CLE
NV_RCOMP
1 DY
R197
32D4R2F-GP
AV11
BF5
Pair
H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24
B25
USBPN1
USBPP1
USBPN2
USBPP2
USBPN3
USBPP3
USBPN4
USBPP4
USBPN5
USBPP5
32
32
32
32
31
31
31
31
31
31
USBPN8 32
USBPP8 32
USBPN9 32
USBPP9 32
USBPN10 35
USBPP10 35
USBPN12
USBPP12
USBPN13
USBPP13
USB_RBIAS_PN
D25
1
R115
20R2F-GP
31
31
24
24
Device
NC
USB3
USB1
WLAN
Card Reader
WWAN
Disable (HM55)
Disable (HM55)
USB2
Blue Tooth
10
Finger Print
11
NC
12
Express Card
13
Camera
SC 1208, BOM Change to 20ohm for fine tune USB signal

N16
J16
F16
L16
E14
G16
F12
T15
USB_OC#3
USB_OC#0 32
USB_OC#1 32
USB_OC#4 32
3D3V_S5
RN68
USB_OC#4
USB_OC#1
USB_OC#3
USB_OC#0
8
7
6
5
1
2
3
4
SRN10KJ-6-GP
IBEXPEAK-M-GP-NF
3D3V_S5
DY
VCC
Y
5
4
GND
PLT_RST# 5,29,31,33,35,51
PCI_PLTRST#
1
C197
SCD1U10V2KX-5GP
U59
1
R483
2
0R2J-2-GP
1
R123
DY
2
4K7R2J-2-GP
A16 swap override Strap/Top-Block

Swap Override jumper
DY
PCI_GNT3#
R490
100KR2J-1-GP
74LVC1G08GW-1-GP
PCI_GNT#3
Low = A16 swap

override/Top-Block
Swap Override enabled
High = Default
OC#0
Port 0 & 1
OC#1
Port 2 & 3
OC#2
Port 4 & 5
OC#3
Port 6 & 7
OC#4
Port 8 & 9
OC#5
Port 10 & 11
EHCI 1
<Core Design>
EHCI 2
Wistron Corporation
OC#6
Port 12 & 13
OC#7
Floater OC# (not used)

Title
18_PCH (5/9)-PCI / USB

Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
18
of
58
PX_HDMI#
D37
TACH2/GPIO6
33 EC_SCI#
EC_SCI#
J32
TACH3/GPIO7
33 EC_SWI#
EC_SWI#
F10
GPIO8
TP100
SA 091015 PCH_GPIO12
DGPU_HOLD_RST# 2
10KR2J-3-GP
1
R180
DGPU_PWR_EN#
1
10KR2J-3-GP
2
R178
51 DGPU_HOLD_RST#
45,50,51 DGPU_PWROK
TPAD14-GP
TPAD14-GP
LAN_PHY_PWR_CTRL/GPIO12
PCH_GPIO15
T7
GPIO15
CLKOUT_BCLK0_N/CLKOUT_PCIE8N
AM3
TACH0/GPIO17
CLKOUT_BCLK0_P/CLKOUT_PCIE8P
AM1
Y7
H10
GPIO24
PCH_GPIO27
AB12
GPIO27
PCH_GPIO28
V13
GPIO28
STP_PCI#
M11
STP_PCI#/GPIO34
TP46
PCH_GPIO35
V6
CRB, 1K PH 3D3V_S0
DGPU_PWR_EN#
dGPU_PRSNT#
5 RST_GATE
1
R110
2
0R0402-PAD
S3 power reduce
5
6
7
8
8K2R2J-3-GP
2
1
2
1
PCH_GPIO45
PCH_GPIO46
R635
TP113
TPAD14-GP
2
1KR2J-1-GP
RP1
PCH_GPIO0
EC_SMI#
dGPU_EDID
EC_SCI#
3D3V_S0
1
2
3
4
5
10
9
8
7
6
3D3V_S0
PCH_GPIO22
STP_PCI#
PX_HDMI#
TP115
TPAD14-GP
TP116
TPAD14-GP
1
1
TP1
BA22
TP2
AW22
PCH_THERMTRIP_R
TP3
BB22
TP4
AY45
PCH_GPIO45
H3
PCIECLKRQ6#/GPIO45
TP5
AY46
PCH_GPIO46
F1
PCIECLKRQ7#/GPIO46
TP6
AV43
PCH_GPIO48
AB6
SDATAOUT1/GPIO48
TP7
AV45
PSW_CLR#
AA4
SATA5GP/GPIO49
TP8
AF13
PCH_NCTF_2
PCH_NCTF_3
PCH_NCTF_1
PCH_NCTF_4
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_28
A4
A49
A5
A50
A52
A53
B2
B53
BE1
BE53
BF1
BF53
BH1
BH53
BJ1
BJ2
BJ4
BJ49
BJ5
BJ50
BJ52
BJ53
D1
D53
E1
E53
VSS_NCTF#A4
VSS_NCTF#A49
VSS_NCTF#A5
VSS_NCTF#A50
VSS_NCTF#A52
VSS_NCTF#A53
VSS_NCTF#B2
VSS_NCTF#B53
VSS_NCTF#BE1
VSS_NCTF#BE53
VSS_NCTF#BF1
VSS_NCTF#BF53
VSS_NCTF#BH1
VSS_NCTF#BH53
VSS_NCTF#BJ1
VSS_NCTF#BJ2
VSS_NCTF#BJ4
VSS_NCTF#BJ49
VSS_NCTF#BJ5
VSS_NCTF#BJ50
VSS_NCTF#BJ52
VSS_NCTF#BJ53
VSS_NCTF#D1
VSS_NCTF#D53
VSS_NCTF#E1
VSS_NCTF#E53
1
2
R224
54D9R2F-L1-GP
C
UMA
TP9
M18
N18
TP11
AJ24
TP12
AK41
TP13
AK42
R182
10KR2J-3-GP
TP14
M32
DIS
TP15
N32
TP16
M30
TP17
N30
TP18
H12
TP19
AA23
NC_1
AB45
NC_2
AB38
NC_3
AB42
NC_4
AB41
NC_5
T39
P6
GPIO8 has a weak[20K] internal pull up.

No need to have external pull down/up.
GPIO8 pin set to high at reset.
3D3V_S0
TP10
INIT3_3V#
PM_THRMTRIP-A# 5,36
SB 1015 modify circuit

Placed Within 2" from PCH
2
GPIO57
TP24
-1 0114
1D05V_VTT
1
2
R223
56R2J-4-GP
SDATAOUT0/GPIO39
8K2R2J-3-GP
TP114
TPAD14-GP
BD10
SLOAD/GPIO38
SB 1015 change to two 8.2k pu

PCH_GPIO15 1
R171
THRMTRIP#
P3
SRN10KJ-6-GP
R634
H_PWRGD 5,36
SATACLKREQ#/GPIO35
B4
B52
BH2
BH52
D2
PU at KBC
BE10
V3
4
3
2
1
H_PECI 5
PROCPWRGD
SATA3GP/GPIO37
RN69
PCH_GPIO28
PCH_GPIO60
PCH_GPIO11
EC_SWI#
BCLK_CPU_N 5
BCLK_CPU_P 5
KBRCIN# 33
SATA2GP/GPIO36
F8
PU at KBC
T1
PCH_GPIO39
PCH_GPIO57
KA20GATE 33
BG10
dGPU_EDID
3D3V_S5
15 PCH_GPIO60
15 PCH_GPIO11
PECI
RCIN#
AB13
-1 0114
15 PCH_GPIO57
SCLOCK/GPIO22
AB7
SA 0901
U2
SATA4GP/GPIO16
PCH_GPIO24
23,25 dGPU_EDID
A20GATE
F38
PSW_CLR#
G12
GAP-OPEN
AF48
AF47
AA2
PCH_GPIO22
50 DGPU_PWR_EN#
CLKOUT_PCIE7N
CLKOUT_PCIE7P
DGPU_PWROK
CHECK
AH45
AH46
DGPU_HOLD_RST#
TP99
-1 0112
CPU
2
R175
K9
GPIO
PCH_GPIO35
1
10KR2J-3-GP
PCH_GPIO12
CLKOUT_PCIE6N
CLKOUT_PCIE6P
R183
10KR2J-3-GP
1
TPAD14-GP
SRN10KJ-6-GP
TACH1/GPIO1
NCTF
4
3
2
1
BMBUSY#/GPIO0
C38
NCTF TEST PIN:

A4,A49,A5,A50,A52,A53,B2,B53,BE1,
BE53,BF1,BF53,BH1,BH53,BJ1,BJ2,BJ4,
BJ49,BJ5,BJ50,BJ52,BJ53,D1,D53,E1,E53
5
6
7
8
PCH_GPIO48
PCH_GPIO39
PSW_CLR#
Y3
EC_SMI#
MISC
PCH_GPIO0
RSVD
3D3V_S0
RN28
6 OF 10
PCH1F
dGPU_PRSNT#
GPIO15 has a weak[20K] internal pull down.

No need to have external pull up/down.
GPIO 15 pin is set to low at reset.
Low : ME Crypto TLS with no confidentiality
High : ME Crypto TLS with confidentiality
GPIO27 has a weak[20K] internal pull up.
To enable on-die PLL Voltage regurator,
should not place external pull down.
SATACLKREQ#:
When used as SATACLKREQ#,
this pin is open drain and should
use a pull-up resistor.
INIT3_3V#
1
TP31 TPAD14-GP
C10
IBEXPEAK-M-GP-NF
SRN10KJ-L3-GP
<Core Design>
A
Wistron Corporation
Title
19_PCH (6/9)-GPIO/VSS_NCTF/RSVD
Size
A3
Document Number
Date:
Rev
-1
LA46 MB DIS
Sheet
19
of
58
1
2
1
2
C199
SCD1U10V2KX-5GP
3D3V_S0_DAC
VOUT
NC#4
G9091-330T11U-GP
DY
74.09091.J3F
Imax = 300 mA
DY
C229
VIN
GND
EN
C231
DY
2
C249
3D3V_S0
357mA
1
U23
1
2
3
5V_S0
SC10U6D3V3MX-GP
C257
LVDS
196mA
+1.1VS_VCC_DMI
VCCDMI
AU16
1
R239
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15
VCCME3_3
VCCME3_3
VCCME3_3
VCCME3_3
AM8
AM9
AP11
AP9
1D8V_S0
2
0R0603-PAD
61mA
1D8V_S0
SC1U6D3V2KX-GP
R240 1
DY
2 0R3J-0-U-GP
DY
R225
0R0603-PAD
+V_NVRAM_VCCQ
-1 0110
156mA
C274
SCD1U10V2KX-5GP
3D3V_S0
1D05V_S0
C331
VCCIO
1D05V_VTT
-1 0110
AT16
0R3J-0-U-GP
R226
VCCDMI
1
2
1
1
1 R200
2
0R0603-PAD
-1 0112
DY
AT24
IBEXPEAK-M-GP-NF
1D5V_S0
C254
VCCVRM
C297
SC10U6D3V3MX-GP
C333
SC1U6D3V2KX-GP
C329
SC1U6D3V2KX-GP
C317
SC1U6D3V2KX-GP
C308
SC1U6D3V2KX-GP
AM23
AD35
C253
VCCFDIPLL
1D05V_S0
VCC3_3
1D8V_S0
59mA
+1.8VS_VCCTX_LVDS
BJ18
DY
C303
SC10U6D3V3MX-GP
AB35
-1 0112
VCCVRM[1]
+1.05VS_VCCAPLL_FDI
357mA
AB34
VCC3_3
D
3D3V_S0
VCCPNAND which power the DC NAND interface must be powered even if dual channel
NAND interface is not connected since it also supplies power to other functions inside
PCH.
If NAND Interface is unused then this pin should be pulled up to 1.8V or 3.3V.
3D3V_S0
85mA
VCCME3_3
C269
SCD1U10V2KX-5GP
1
2
R208
0R3J-0-U-GP
2
IND-1UH-2-GP
VCC3_3
-1 0108
-1 0111
300mA
1 R192
2
0R0603-PAD
AT22
DY
1
L13
VCCTX_LVDS
VCCTX_LVDS
VCCTX_LVDS
VCCTX_LVDS
AP43
AP45
AT46
AT45
HVCMOS
VCC3_3
VCCAFDI_VRM
NOTE: This pin can be left as no

connect in On-Die VR enabled mode
(default).
1D05V_S0
VSSA_LVDS
DMI
AN35
1
2
C306
SCD1U10V2KX-5GP
AH38
AH39
C228
SC10U6D3V3MX-GP
-1 0112
NAND / SPI
VCCIO
VCCIO
3D3V_S0
VCCALVDS
C213
1D5V_S0_1D8V_S0
PCI E*
AN30
AN31
C279
SC1U6D3V2KX-GP
C311
SC1U6D3V2KX-GP
C315
SC1U6D3V2KX-GP
C319
SC1U6D3V2KX-GP
SC10U6D3V3MX-GP
C299
FDI
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
AN20
AN22
AN23
AN24
AN26
AN28
BJ26
BJ28
AT26
AT28
AU26
AU28
AV26
AV28
AW26
AW28
BA26
BA28
BB26
BB28
BC26
BC28
BD26
BD28
BE26
BE28
BG26
BG28
BH27
AF51
C214
3D3V_S0
R669
0R2J-2-GP
1
2
69mA
SC22U6D3V5MX-2GP
C298
VCCAPLLEXP
VSSA_DAC
R176
0R2J-2-GP
DY
1 R185
2
0R0402-PAD
SC1U16V3ZY-GP
TC4
DY
BJ24
SC10U6D3V3MX-GP
C304
SC10U6D3V3MX-GP
VCCIO
AE52
AF53
SCD01U16V2KX-3GP
DY
AK24
VCCADAC
VSSA_DAC
SCD01U16V2KX-3GP
+1.05VS_VCCAPLL_EXP
3.062A
SC10U6D3V3MX-GP
1
2
DY
L12
IND-1UH-2-GP
NOTE: This pin can be left as no
connect in On-Die VR enabled mode
(default).
1D05V_S0
ST220U2D5VBM-2GP
42mA
+VCCA_DAC_1_2
AE50
+3VS_VCCA_LVD
1D05V_S0
1D05V_S0
7 OF 10
VCCADAC
VCC CORE
1
2
C300
SC1U6D3V2KX-GP
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
SCD1U10V2KX-5GP
AB24
AB26
AB28
AD26
AD28
AF26
AF28
AF30
AF31
AH26
AH28
AH30
AH31
AJ30
AJ31
SCD01U50V2KX-1GP
C290
SC10U6D3V3MX-GP
2
3D3V_S0_DAC
POWER
PCH1G
1.432A
1D05V_S0
CRT
1D5V_S0_1D8V_S0
-1 0110
1
R243
1
R242
DY
0R0603-PAD
2
0R3J-0-U-GP
1
R237
VCCAFDI_VRM
2
0R0603-PAD
-1 0110
<Core Design>
A
Wistron Corporation
Title
20_PCH (7/9)-PWR_1
Size
A3
Document Number
Date:
Rev
-1
LA46 MB DIS
Sheet
20
of
58
VCCLAN
V9
DCPRTC
VCCVRM
BB51
BB53
VCCADPLLA
VCCADPLLA
BD51
BD53
VCCADPLLB
VCCADPLLB
AH23
AJ35
AH35
VCCIO
VCCIO
VCCIO
AF34
VCCIO
AH34
VCCIO
AF32
VCCIO
V5REF_SUS
F24
V12
V5REF
K49
VCC3_3
J38
VCC3_3
L38
VCC3_3
M36
VCC3_3
N36
VCC3_3
P36
VCC3_3
U35
VCC3_3
AD13
DCPSST
DCPSUS
U19
VCCSUS3_3
U20
VCCSUS3_3
U22
VCCSUS3_3
1
2
1
2
AK3
AK1
3D3V_S0
C221
SC1U10V2KX-1GP DY
VCCIO
AH22
VCCVRM
AT20
VCCIO
AH19
VCCIO
AD20
VCCIO
AF22
VCCIO
VCCIO
VCCIO
VCCIO
AD19
AF20
AF19
AH20
VCCIO
VCCIO
VCCIO
VCCIO
AB19
AB20
AB22
AD22
VCCME
VCCME
VCCME
VCCME
AA34
Y34
Y35
AA35
2
DY
L8
IND-10UH-215-GP
VCC3_3
V16
VCC3_3
Y16
VCC3_3
1
2
+1.1VS_PCH_VCCRTC
C594
SCD1U10V2KX-5GP
VCCRTC
IBEXPEAK-M-GP-NF
HDA
2mA
C590
SCD1U10V2KX-5GP
V_CPU_IO
RTC
A12
2
V_CPU_IO
AU18
RTC_AUX_S5
R476
1
0R0603-PAD
AT18
C293
SCD1U10V2KX-5GP
C292
SCD1U10V2KX-5GP
C278
SC4D7U6D3V3KX-GP
+1.1VS_PCH_CPU_IO
CPU
1mA
2
1
R230
1
0R0603-PAD
C222
DY SC1U10V2KX-1GP
32mA
SB 1015 change to 68.1001D.10E
1D05V_S0
C310
SC1U6D3V2KX-GP
VCCSUSHDA
1D05V_S0
-1 0107
PCH_VCC_1_1_20
PCH_VCC_1_1_21
PCH_VCC_1_1_22
PCH_VCC_1_1_23
R156
R146
R152
R163
1
1
1
1
2
2
2
2
6mA
L30
1
1
2
C305
SCD1U10V2KX-5GP
V15
1D05V_VTT
-1 0112
C265
2 SCD1U10V2KX-5GP
0R0402-PAD
0R0402-PAD
0R0402-PAD
0R0402-PAD
+3VS_+1.5VS_HDA_IO
R468
1
0R0603-PAD
3D3V_S5
2
C586
SC1U6D3V2KX-GP
-1 0112
3D3V_S0
C196
SCD1U10V2KX-5GP
SATA
163mA
PCI/GPIO/LPC
3D3V_S5
-1 0112
C224
SCD1U10V2KX-5GP
VCCSUS3_3
3D3V_S0
1D5V_S0_1D8V_S0
P18
5V_S0
2 R130
10R2J-2-GP
1D05V_S0
VCCSATAPLL
VCCSATAPLL
C220
SCD1U10V2KX-5GP
Y22
D3
CH751H-40PT-GP
83.R0304.A8F
2ND = 83.R3004.A8F
C200
SCD1U10V2KX-5GP
+1.1VALW_INT_VCCSUS
3D3V_S0
5V_S5
2 R488
10R2J-2-GP
1mA
+5VS_PCH_VCC5REF
+VCCSST
C215
SCD1U10V2KX-5GP
83.R0304.A8F
2ND = 83.R3004.A8F
1mA
+5VALW_PCH_VCC5REFSUS
D17
CH751H-40PT-GP
+1.05VS_VCCAPLL
C314
SC1U6D3V2KX-GP
V23
C600
SCD1U10V2KX-5GP
PCI/GPIO/LPC
2
+1.05VS_VCCA_B_DPL
1
2
C318
SC1U6D3V2KX-GP
VCCIO
1D05V_S0
VCCME
AU24
1D05V_S0
C330
SC1U6D3V2KX-GP
U23
Y42
1D5V_S0_1D8V_S0
+1.05VS_VCCA_A_DPL
69mA
VCCSUS3_3
VCCME
VCCME
Y41
3D3V_S5
VCCME
Y39
VCCME
V42
V41
C599
SCD1U10V2KX-5GP
VCCME
C598
SC1U6D3V2KX-GP
VCCME
V39
C597
SC1U6D3V2KX-GP
3D3V_S5
AF42
C195
SCD1U10V2KX-5GP
VCCME
3D3V_S5
VCCME
AF41
68mA
+1.05VS_VCCA_B_DPL
1
2
IND-10UH-215-GP
C273
C271
SC10U6D3V3MX-GP
SC1U6D3V2KX-GP
V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26
VCCME
AF43
USB
VCCME
AD41
Clock and Miscellaneous
C212
SCD1U10V2KX-5GP
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
C307
SC1U6D3V2KX-GP
VCCME
AD39
DY
+VCCRTCEXT
L10
V24
V26
Y24
Y26
2
DCPSUSBYP
+1.05VS_VCCA_A_DPL
2
IND-10UH-215-GP
C262
C264
SC10U6D3V3MX-GP
SC1U6D3V2KX-GP
VCCIO
VCCIO
VCCIO
VCCIO
VCCLAN
AF24
2
1
C313
SC1U10V2KX-1GP
L9
AF23
2
1
1
2
1
2
C301
SC1U6D3V2KX-GP
VCCACLK
DCPSUSBYP
Y20
C217
SCD1U10V2KX-5GP
AD38
1.849A
1D05V_S0
AP53
DY
1D05V_S0
C296
SC10U6D3V3MX-GP
1D05V_S0
10 OF 10
2
2
-1 0112
C295
SC10U6D3V3MX-GP
VCCACLK
DY
AP51
C291
SC1U6D3V2KX-GP
R222
0R0402-PAD
POWER
+1.05VS_VCCLAN
C245
1
2
SC1U10V2KX-1GP
R221
2 0R2J-2-GP
VccLAN may be grounded if

Intel LAN is disabled
PCH1J
1D05V_S0
1 DY
+1.05VS_VCCA_CLK
L11
52mA
1
2 IND-10UH-215-GP
DY
NOTE: This pin can be left as no connect in
On-Die VR enabled mode (default).
DY
C266
SC10U6D3V3MX-GP
1D05V_S0
<Core Design>
Wistron Corporation
Title
21_PCH (8/9)-PWR_2
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
21
of
58
PCH1I
PCH1H
AB16
AA19
AA20
AA22
AM19
AA24
AA26
AA28
AA30
AA31
AA32
AB11
AB15
AB23
AB30
AB31
AB32
AB39
AB43
AB47
AB5
AB8
AC2
AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49
AD7
AE2
AE4
AF12
Y13
AH49
AU4
AF35
AP13
AN34
AF45
AF46
AF49
AF5
AF8
AG2
AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47
AH7
AJ19
AJ2
AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34
AT5
AJ4
AK12
AM41
AN19
AK26
AK22
AK23
AK28
8 OF 10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
IBEXPEAK-M-GP-NF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47
AY7
B11
B15
B19
B23
B31
B35
B39
B43
B47
B7
BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49
BB5
BC10
BC14
BC18
BC2
BC22
BC32
BC36
BC40
BC44
BC52
BH9
BD48
BD49
BD5
BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50
BE6
BE8
BF3
BF49
BF51
BG18
BG24
BG4
BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47
BH7
C12
C50
D51
E12
E16
E20
E24
E30
E34
E38
E42
E46
E48
E6
E8
F49
F5
G10
G14
G18
G2
G22
G32
G36
G40
G44
G52
AF39
H16
H20
H30
H34
H38
H42
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
9 OF 10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14
IBEXPEAK-M-GP-NF
<Core Design>
Wistron Corporation
Title
22_PCH (9/9)-VSS
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
22
of
58
SEL
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GND
DIS
R400
10KR2J-3-GP
71.03421.003
71.03412.B0G
71.03412.C0G
DIS
C545
1
2
1
2
C528
3D3V_S0
RN5
2
1
LCD_EDID_DAT
LCD_EDID_CLK
3
4
SRN2K2J-1-GP
3D3V_S0
SA 0908: Add for LVDS signal SWAP

U17
3
4
6
7
11
12
14
15
DIS
3D3V_S0
SB 1015 modify for SEL pin

voltage level issue
LCD_TXACLK+ 24
LCD_TXACLK- 24
LCD_TXAOUT2+ 24
LCD_TXAOUT2- 24
LCD_TXAOUT1+ 24
LCD_TXAOUT1- 24
LCD_TXAOUT0+ 24
LCD_TXAOUT0- 24
3
2
1
55 NV_LCD_EDID_DAT
17 DAT_DDC_EDID
R401
8K2R2J-3-GP
LCD_EDID_DAT
24
LCD_EDID_CLK
24
73.03157.C0H
2ND = 73.53157.A0J
LVDS_SELECT#
U18
1
5
10
13
17
19
21
39
41
4
5
6
A
VCC
S
NC7SB3157P6X-1GP
DIS
1
B0
GND
B1
Q2
2N7002A-7-GP
DIS
84.2N702.E31
2ND = 84.2N702.D31
3
2
1
55 NV_LCD_EDID_CLK
DIS
17 CLK_DDC_EDID
dGPU_SELECT#
Pull up on chip side
B0
GND
B1
4
5
6
A
VCC
S
EDID_SELECT#_LCD
NC7SB3157P6X-1GP
73.03157.C0H
2ND = 73.53157.A0J
43
TS3DV421RUAR-GP
DIS
C530
BTMDS2+
BTMDS2TMDS2+
BTMDS1+
TMDS2BTMDS1TMDS1+
BTMDS0+
TMDS1BTMDS0TMDS0+
BTMDSCLK+
TMDS0BTMDSCLK- TMDSCLK+
TMDSCLK-
2
8
16
18
20
30
40
42
LVDS_SELECT#
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
SCD1U10V2KX-4GP
19,25 dGPU_EDID
R33
1
0R2J-2-GP
R31
1
0R2J-2-GP
2
2
DY
RN57
17 DAT_DDC_EDID
17 CLK_DDC_EDID
RN4
17
17
17
17
1
2
3
4
PCH_TXAOUT1+
PCH_TXAOUT1PCH_TXAOUT0+
PCH_TXAOUT0-
8
7
6
5
LCD_TXAOUT1+
LCD_TXAOUT1LCD_TXAOUT0+
LCD_TXAOUT0-
8
7
6
5
LCD_TXACLK+ 24
LCD_TXACLK- 24
LCD_TXAOUT2+ 24
LCD_TXAOUT2- 24
4
3
1
2
LCD_EDID_DAT
LCD_EDID_CLK
24
24
SRN0J-6-GP
24
24
24
24
UMA
SRN0J-7-GP
UMA
RN3
17
17
17
17
1
2
3
4
PCH_TXACLK+
PCH_TXACLKPCH_TXAOUT2+
PCH_TXAOUT2-
SRN0J-7-GP
UMA
5V_S0
C25
DIS
SCD1U10V2KX-4GP
2
3D3V_S0
U12
3
2
1
55 NV_BLON_IN
A
VCC
S
KBC_BL_ON_IN
R30
100KR2J-1-GP
R34
100KR2J-1-GP
R35
100KR2J-1-GP
NC7SB3157P6X-1GP
73.03157.C0H
2ND = 73.53157.A0J
DY
U8
1
dGPU_SELECT#
53 NV_CRT_BLUE
17 PCH_BLUE
53 NV_CRT_GREEN
17 PCH_GREEN
53 NV_CRT_RED
17 PCH_RED
DY
33
17 PCH_BL_ON
B0
GND
B1
4
5
6
DIS
29
28
27
26
25
24
23
22
GPU_TXACLK+
GPU_TXACLKGPU_TXAOUT2+
GPU_TXAOUT2GPU_TXAOUT1+
GPU_TXAOUT1GPU_TXAOUT0+
GPU_TXAOUT0-
DIS
ATMDS2+
ATMDS2ATMDS1+
ATMDS1ATMDS0+
ATMDS0ATMDSCLK+
ATMDSCLK-
SCD1U10V2KX-4GP
54
54
54
54
54
54
54
54
38
37
36
35
34
33
32
31
PCH_TXACLK+
PCH_TXACLKPCH_TXAOUT2+
PCH_TXAOUT0-
DIS
SCD1U10V2KX-4GP
17
17
17
17
17
17
17
17
4
1D8V_S0
U51
16
1
2
3
5
6
11
10
14
13
8
DIS
VCC
S
IA0
IA1
IB0
IB1
IC0
IC1
ID0
ID1
GND
YA
YB
YC
YD
OE#
CRT_BLUE
CRT_GREEN
CRT_RED
25,49
25,49
25,49
12
15
PI5C3257QE-GP
73.53257.B0C
2ND = 73.03257.C0B
17 PCH_BL_ON
1
R32
UMA
KBC_BL_ON_IN
2
0R2J-2-GP
17 PCH_BLUE
17 PCH_GREEN
17 PCH_RED
RN55
1
2
3
4
8
7
6
5
CRT_BLUE 25,49
CRT_GREEN 25,49
CRT_RED
25,49
SRN0J-7-GP
UMA
<Core Design>
Wistron Corporation
Title
23_Display MUX
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
23
of
58
LCD/INVERTER/CCD CONN
LCDVDD
CAMERA POWER
LCD1
C16
SCD1U16V2ZY-2GP
48
2 EC3
DY
SC22P50V2JN-4GP
2 EC4
DY
SC22P50V2JN-4GP
CAM_ON_T
C515
LCD_TXACLK- 23
LCD_TXACLK+ 23
USBPP13 1
LCD_TXACLKLCD_TXACLK+
USBPN13 1
R398
100KR2J-1-GP
LCD_TXAOUT2- 23
LCD_TXAOUT2+ 23
S
C510
C511
Q33
2N7002A-7-GP
USBPP13 18
USBPN13 18
LCD_EDID_DAT
DY
1
ECT5
2
SC33P50V2JN-3GP
LCD_EDID_CLK
84.2N702.E31
2ND = 84.2N702.D31
33 CAMERA_EN
DY
1
ECT6
2
SC33P50V2JN-3GP
PIN37: Reserve for AUO

Dynamic Backlight
Control pin
F2
2
C20
SC10U25V6KX-1GP
SR 33ohm at KBC
2 DY
1 BRIGHTNESS_DIS
33R2J-2-GP
2
1 L_BKLTCTL_R
R430
33R2J-2-GP
33 BRIGHTNESS
DCBATOUT
TP2
TPAD14-GP
17 L_BKLTCTL
1
POLYSW-1D1A24V-GP
3
2
1
R429
DY
69.50007.A31
2nd = 69.50007.A41
B0
GND
B1
3D3V_S0
DY
A
VCC
S
BRIGHTNESS_CN
4
5
6
U54
BRIGHTNESS_CN
BLON_OUT_1
LCD_AUO_TP
DCBATOUT_LCD1
C21
NC7SB3157P6X-1GP
73.03157.C0H
JAE-CON40-GP
18 dGPU_PWM_SELECT#
-1 0113
33 PWM_SELECT
3D3V_S0
UMA
2 BRIGHTNESS_CN
0R2J-2-GP
1
R428
LCDVDD_ON
2
0R2J-2-GP
4
C7
G5285T11U-GP
74.05285.07F
33 BLON_OUT
2
1
1KR2F-3-GP
R25
R24
IN#4
C10
DY
IN#5
C1
EN
GND
OUT
C26
BRIGHTNESS
1
2
2
1
DY
SC100P50V2JN-3GP
R4
DY
2
100KR2J-1-GP
17 PCH_LCDVDD_ON
dGPU_SELECT#_PWM
DY
SB 1015 brightness control from KBC only

1
2
3
SC4D7U6D3V3KX-GP
R2
100KR2J-1-GP
73.03157.C0H
2ND = 73.53157.A0J
R3
100KR2J-1-GP
SC4D7U6D3V3KX-GP
R10
100KR2J-1-GP
NC7SB3157P6X-1GP
DY
2
2
Layout 40 mil
LCDVDD_ON
SCD1U16V2ZY-2GP
DY
3D3V_S0
4
5
6
A
VCC
S
B0
GND
B1
1 R433
0R2J-2-GP
1 R431
0R2J-2-GP
U3
3
2
1
55 NV_LCDVDD_ON
17 PCH_LCDVDD_ON
LCDVDD
DIS
U1
1 R432
0R2J-2-GP
SC100P50V2JN-3GP
47
LCD_TXAOUT1- 23
LCD_TXAOUT1+ 23
Q34
AO3419L-GP
5V_S0
46
DY
-1 0114
LCD_EDID_CLK 23
LCD_EDID_DAT 23
LCD_TXAOUT0- 23
LCD_TXAOUT0+ 23
45
DY
3D3V_S0
CCD_PWR
CCD_PWR
LCD_EDID_CLK
LCD_EDID_DAT
2
SC5D6P50V2CN-1GP
SCD1U10V2KX-4GP
44
1 R395
0R2J-2-GP
1
C513
43
DY C514 SC5D6P50V2CN-1GP
LCD_TXACLK-
CCD_PWR
LCD_TXACLK+
SCD1U10V2KX-4GP
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
NP2
49
41
NP1
1
42
SCD1U10V2KX-4GP
BLON_OUT_1
<Core Design>
Wistron Corporation
Title
24_LCD & CCD

Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
24
of
58
SA-0820 Move pi filter to CRT board.

SA-0823
Hsync & Vsync level shift
5V_S0
L=>B0 -DIS
H=>B1 -UMA
11
CRT_RED
2
3
4
5
6
7
8
9
10
CRT_GREEN
CRT_BLUE
CRT_RED 23,49
CRT_GREEN 23,49
CRT_BLUE 23,49
U52
CRT_VSYNC1
CRT_HSYNC1
1
2
3
4
53 NV_CRT_HSYNC
5V_CRT_S0
CLK_DDC1_5
DAT_DDC1_5
For DIS CRT
1OE#
1A
2Y
GND
DIS
VCC
2OE#
1Y
2A
C531
SCD1U10V2KX-5GP
C534
SCD1U10V2KX-5GP
PER PIN
8
7
6
5
SSLVC2G125DP-1GP
12
C498
SCD01U16V2KX-3GP
CRT1
ACES-CON10-13-GP
73.2G125.A07
53 NV_CRT_VSYNC
20.F0772.010
SB 1024 Add pin to GND (EMI)
U53
CLK_DDC1_5
DAT_DDC1_5
CLK_DDC1_5 49
DAT_DDC1_5 49
1
2
3
4
17 PCH_HSYNC
For UMA CRT

CRT_VSYNC1
CRT_HSYNC1
CRT_VSYNC1
CRT_HSYNC1
1OE
1A
2Y
GND
VCC
2OE
1Y
2A
CRT_VSYNC1_1 1 R405
2CRT_VSYNC1_2
10R2J-2-GP
1 R406
2
0R0603-PAD
CRT_VSYNC1
CRT_HSYNC1_1 1 R396
2CRT_HSYNC1_2
10R2J-2-GP
1 R397
2
0R0603-PAD
CRT_HSYNC1
8
7
6
5
-1 0113
SSHCT2G126DP-GP
73.2G126.ABB
49
49
17 PCH_VSYNC
DDC_CLK & DATA level shift
F1
FUSE-1D1A6V-4GP-U
4
3
DY
RN53
SRN2K2J-1-GP
55 NV_CRT_DDCDATA
17 PCH_DDCDATA
B0
GND
B1
R383
10KR2J-3-GP
A
VCC
S
4
5
6
DDCDATA
73.03157.C0H
2ND = 73.53157.A0J
DIS
3
2
1
55 NV_CRT_DDCCLK
17 PCH_DDCCLK
B0
GND
B1
DAT_DDC1_5
DMN66D0LDW-7-GP
U10
A
VCC
S
3D3V_S0_DDC
Q32
NC7SB3157P6X-1GP
Pull up at chipset side
U9
1
2
DIS
RN54
SRN10KJ-5-GP
1
2
PER PIN
3
2
1
500mA
5V_CRT_DDC
4
3
C22
SCD1U10V2KX-5GP
C23
SCD1U10V2KX-5GP
3D3V_S0
D11
CH551H-30PT-GP
83.R5003.C8F
2nd = 83.R5003.G8H
69.50007.691
2nd = 69.50007.771
3D3V_S0
3D3V_S0
5V_S0
5V_CRT_S0
DDCCLK
4
5
6
84.DMN66.03F
2ND = 84.27002.F3F
CLK_DDC1_5
NC7SB3157P6X-1GP
73.03157.C0H
2ND = 73.53157.A0J
dGPU_SELECT#_DDC
RN56
L=>B0 -DIS
H=>B1 -UMA
19,23 dGPU_EDID
1 R18
0R2J-2-GP
1 R19
0R2J-2-GP
2
2
DY
17 PCH_DDCDATA
17 PCH_DDCCLK
4
3
1
2
DDCDATA
DDCCLK
<Core Design>
SRN0J-6-GP
A
Wistron Corporation
UMA

Title
25_CRT
Size
A3
Document Number
Date:
Rev
-1
LA46 MB DIS
Sheet
25
of
58
4
R144 4K7R2J-2-GP
2
2
DY
HDMI_TX0HDMI_TX0+
HDMI_TX1HDMI_TX1+
35
34
NC#35
NC#34
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
IN_D1IN_D1+
OUT_D1OUT_D1+
23
22
HDMI_TXCHDMI_TXC+
17 PCH_HDMI_DATA017 PCH_HDMI_DATA0+
41
42
IN_D2IN_D2+
OUT_D2OUT_D2+
20
19
HDMI_TX0HDMI_TX0+
44
45
IN_D3IN_D3+
OUT_D3OUT_D3+
17
16
HDMI_TX1HDMI_TX1+
14
13
HDMI_TX2HDMI_TX2+
8
9
7
HDMI_DETECT_R
IN_D4IN_D4+
TDMS_A_DAT
4
6
8
10
12
14
16
3
5
7
9
11
13
15
TDMS_A_CLK
HDMI_TX2HDMI_TX2+
HDMI_TXCHDMI_TXC+
20.F0881.016
HDMI_DB
38
39
47
48
MLX-CONN16D-3-GP
17 PCH_HDMI_CLK17 PCH_HDMI_CLK+
3D3V_S0
HDMI2
HDMI_A_HPD_CN
8101_NC35 1
8101_NC34 1
DY
U22
Recommended Equalization:
[PC1,PC0]=01, 4dB
1
SA 0910
5V_S0
R143
4K7R2J-2-GP
2
11
15
21
26
33
40
46
1
2
UMA
3D3V_S0
SCD1U10V2KX-4GP
1
2
UMA
C194
SCD1U10V2KX-4GP
1
2
UMA
C206
SCD1U10V2KX-4GP
1
2
UMA
C188
SCD1U10V2KX-4GP
C187
OUT_D4OUT_D4+
5V_S0
RN61
TDMS_A_CLK
TDMS_A_DAT
1
2
4
3
TDMS_A_CLK_R
3
1
D4
CH461FPT-GP-U
SRN1K5J-GP
CHECK
R93 2 UMA
R469 2
1
1
3
4
PC0
PC1
SDA
SCL
HPD
DY
PC0
PC1
4K7R2J-2-GP
4K7R2J-2-GP
REXT_HDMI
3D3V_S0
8101_OE#
DDC_EN_PS8101
UMA
2
6
10
25
32
REXT
RT_EN#
OE#
DDC_EN
UMA
5V_S0
2
30
29
28
HDMI_A_HPD_CN
TDMS_A_DAT
TDMS_A_CLK
HDMI_A_HPD_CN
UMA
R477
499R2F-2-GP
5V_S0
71.P8101.003
2ND = 71.03411.B03
1
3D3V_S0
R147
20KR2J-L2-GP
2
UMA
-1 0114
49 HDMI_A_HPD_CN
8101_OE#
HDMI_A_HPD_CN
TDMS_A_DAT
TDMS_A_CLK
TP112
TPAD14-GP
HDMI_A_CEC
HDMI_TXCHDMI_TXC+
HDMI_TX0HDMI_TX0+
HDMI_TX1-
-1 0114
HDMI_TX1+
HDMI_TX2-
UMA
HDMI_DETECT_R
HDMI_TX2+
HDMI_A_HPD_CN
23
22
2N7002A-7-GP
SKT-HDMI19P-76-GP
UMA
2
1
20
UMA
R181
100KR2J-1-GP
21
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
Q8
D
Q12 UMA
2N7002A-7-GP
22.10296.241
HDMI_ONMB
CHECK
HDMI1
49 HDMI_TX049 HDMI_TX0+
49 HDMI_TXC49 HDMI_TXC+
49 TDMS_A_DAT
49 TDMS_A_CLK
3D3V_S0
17 PCH_HDMI_DETECT
PS8101-GP
UMA
R190
20KR2J-L2-GP
DY
D5
BAV99PT-GP-U
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
R142
4K7R2J-2-GP
HPD_SINK
SDA_SINK
SCL_SINK
PCH_HDMI_DATA 17
PCH_HDMI_CLK 17
1
5
12
18
24
27
31
36
37
43
49
R470
5K1R2F-2-GP
3D3V_S0

SB 1016 Add 22.10296.241
RN64
54
54
54
54
NV_HDMI_DATA2NV_HDMI_DATA2+
1
2
3
4
8
7
6
5
HDMI_TX2HDMI_TX2+
HDMI_TX1HDMI_TX1+
3D3V_S0
SRN0J-7-GP
Q50
DIS_HDMI
NV_HDMI_DATA_R
RN71
54
54
54
54
NV_HDMI_CLKNV_HDMI_CLK+
1
2
3
4
8
7
6
5
HDMI_TX0HDMI_TX0+
HDMI_TXCHDMI_TXC+
DIS_HMDI
54 NV_HDMI_CLK
NV_HDMI_DATA_R
1
2
R480 DIS_HDMI 0R2J-2-GP
NV_HDMI_CLK_R
1
2
R491
0R2J-2-GP
DIS_HDMI
33,54 NV_HDMI_DETECT
1
R164
TDMS_A_DAT
NV_HDMI_CLK_R
DMN66D0LDW-7-GP
DIS_HDMI
54 NV_HDMI_DATA
84.DMN66.03F
2ND = 84.27002.F3F
DIS_HDMI
SRN0J-7-GP
TDMS_A_CLK
<Core Design>
Wistron Corporation
HDMI_A_HPD_CN
0R2J-2-GP
Title
26_HDMI
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
26
of
58
-1 0113
21
DMIC_CLK_R
DMIC_DATA
SPKR_LSPKR_L+
SPKR_RSPKR_R+
2 MIC1_VREF_L
R320
0R2J-2-GP
SA 0905
2 4K7R2J-2-GP
MIC1_VREF_L
R359 1
2 4K7R2J-2-GP
MIC_IN_JACK_L
R352 1
2 1KR2J-1-GP
MIC_IN_JACK_L_C
MIC_IN_JACK_R
R367 1
2 1KR2J-1-GP
MIC_IN_JACK_R_C
EXT MIC
DY
ALC269_31
EC28
DY
DY
1
2
6
3
4
5
NP1
NP2
EC27
AUDIO-JK182-GP-U1
22.10263.321
-1 0114
DY
2 R316
0R2J-2-GP
269VA_ASM
VA: GND
VB: MIC1_VREF0_L
HP_OUT/ LINE_OUT
2 MIC1_VREF_L
R315
0R2J-2-GP
SB 1015 change
HP1
HP_OUT_L
HP_OUT_R
R325
C474
MIC_IN_JACK_L_C
MIC_IN_JACK_R_C
MIC_IN#
1
1
1
AFTP102 AFTE14P-GP
AFTP118 AFTE14P-GP
AFTP87 AFTE14P-GP
C473
HP_OUT_R_R
2
0R0402-PAD
HP_DET#
-1 0107
R326
20KR2F-L-GP
HP_OUT_L_R
HP_OUT_R_R
HP_DET#
20KR2F-L-GP
1
1
1
SC22P50V2JN-4GP
AFTP96 AFTE14P-GP
AFTP97 AFTE14P-GP
AFTP92 AFTE14P-GP
HP_OUT_L_R
2
0R0402-PAD
1
R340
EC26
SC100P50V2JN-3GP
2
1
MIC_IN#
C481
SC100P50V3JN-2GP
SC22P50V2JN-4GP
Q65
2N7002A-7-GP
R363 1
EMIC1
R297
20KR2F-L-GP
1
R670
1KR2J-1-GP
20.F1621.004
SB 1015 change
SA 0912 change size
AUD_5VA
ACES-CON4-17-GP
SB 1024 C422 connect to 3D3V_S0,

place close to connector
MIC1_VREF_R
VA: MIC1_VREF0_L
VB: 2.2UF to GND
R339
3D3V_S5
269VA_ASM
2
R287
22R2J-2-GP
C466
SC2D2U10V3ZY-1GP
SA 0905
C465
C422
SCD1U10V2KX-4GP
SC100P50V2JN-3GP
2
1
41
40
44
45
24
23
4
3
2
AFTP156
1
AFTE14P-GP
ALC269_31
L27
2 SBY100505T-601Y-N-GP DMIC_CLK_R
DMIC_CLK 1
DMIC_DATA
-1 0114
MIC1_VREF_R
MIC1_VREF_L_269VA
MIC2_VREFO
1
TP72
TPAD14-GP
1
1
MIC1
AFTP62
1
AFTE14P-GP
SC 1208
C705
SC33P50V2JN-3GP
2
1
AFTP68
AFTE14P-GP
AFTE14P-GP
AFTP64
C704
SC33P50V2JN-3GP
2
1
22
MIC1_R
MIC1_L
34
39
46
25
38
CPVEE
PVDD1
PVDD2
SPKLSPKL+
SPKRSPKR+
SA 0905
2 AUD_PC_BEEP
C419
SCD1U10V2KX-5GP
AUD_CPVEE
30
28
29
Digital signal
SC2D2U10V3ZY-1GP
14 ACZ_RST#_AUDIO
14 ACZ_SDATAOUT_AUDIO
-1 0114
C700
SC1KP50V2KX-1GP
1
2
6
3
4
5
NP1
NP2
AUDIO-JK182-GP-U1
14 ACZ_BITCLK_AUDIO
14 ACZ_SDATAIN0
20.F1621.004
R286
4K7R2J-2-GP
C418
SC100P50V2JN-3GP
12
AUD_PC_BEEP
SC100P50V2JN-3GP
2
1
CBN
AUD_CBN
DY
R285
1
10KR2J-3-GP
AUD_PC_BEEP_C
PVSS1
PVSS2
CBP
14 ACZ_SYNC_AUDIO
SC -BOM change for SI
MIC1_VREFO_R
MIC1_VREFO_L
MIC2_VREFO
SPDIFO2/EAPD
ALC269Q-VB2-GR-GP
C421
SC8P250V2CC-GP
42
43
35
16
AVSS1
AVSS2
C450
SC2D2U10V3ZY-1GP
33 KBC_BEEP
17
15
14
LINEOUT1-R
LINEOUT1-L
26
37
36
GPIO1/DMIC-CLK
GPIO0/DMIC_DATA
BEEP
AUD_CBP
47
MIC_IN_JACK_L
MIC2_L
Alnalog signal
VREF
3
2
SENSE_B
AUD_VREF 27
DMIC_CLK
DMIC_DATA
SENSE_A
18
13
AUD_JDREF
SENSE_A
CPVREF
PD#
MONO-OUT
JDREF
1 39K2R2F-L-GP
31
4
20
19
HP_DET# R293 2
2 SC4D7U6D3V3KX-GP
R289
1
10KR2J-3-GP
SPDIFO
1 20KR2F-L-GP
SYNC
BIT-CLK
RESET#
SDATA_OUT
SDATA_IN
R295 2
C436 1
LINE2-R
LINE2-L
HP-OUT_R
HP-OUT_L
DVSS
GND
48
MIC_IN#
MIC_IN_L
MIC2_R
7
49
33
32
AVDD1
AVDD2
1
9
DVDD
DVDD_IO
HP_OUT_R_AUD
HP_OUT_L_AUD
10
6
11
5
ACZ_SDATAIN_RTL_R 8
1
1
R318
2 75R2J-1-GP
2 75R2J-1-GP
R317
MIC_IN_JACK_R
5
ACES-CON4-17-GP
3D3V_S0
U38
HP_OUT_R
HP_OUT_L
2 SC4D7U6D3V3KX-GP
AUD_5VA_1
SC2D2U10V3ZY-1GP
C423
SCD1U10V2KX-4GP
C441 1
14 ACZ_SPKR
MIC_IN_R
EC12
AUD_5VD
C464
AUD_5VA
AUD_3VD
SPKR_R+_R
EC13
SPKR_L-_R
SPKR_L+_R
SPKR_R-_R
SPKR_R+_R
4
3
2
1
1
1
1
EC14
SPKR_L-_R
SPKR_L+_R
SPKR_R-_R
SC100P50V2JN-3GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
EC15
SC100P50V2JN-3GP
AFTP11
AFTP10
AFTP13
AFTP14
SPKR_R+
2
2 0R0402-PAD
2 0R0402-PAD
0R0402-PAD
2
0R0402-PAD
C449
C442
1
R418 1
R417 1
R416
1
R415
SC100P50V2JN-3GP
C447
SPK1
SC100P50V2JN-3GP
SC1U10V2KX-1GP
SPEK R
1
-1 0107
SPKR_LSPKR_L+
SPKR_R-
SPEK L
SCD1U10V2KX-4GP
1
2
R310
0R0603-PAD
C452
SCD1U10V2KX-4GP
C433
SC10U6D3V3MX-GP
C440
SCD1U10V2KX-4GP
SC1U10V2KX-1GP
C429
SCD1U10V2KX-4GP
C430
-1 0107
2
R294
0R0603-PAD
SC10U6D3V3MX-GP
C420
SCD1U10V2KX-4GP
SC10U6D3V3MX-GP
AUD_5VA
-1 0107
1
C426
5V_S0
AUD_5VD
-1 0107
1
2
R284
0R0603-PAD
5V_S0
AUD_3VD
Speaker
2
3D3V_S0
22.10263.321
-1 0114
D6
1
R282
0R2J-2-GP
1
R288
0R2J-2-GP
33 KBC_MUTE#
14 ACZ_RST#_AUDIO
Reserve for anti-pop
AUD_PD#_2
AUD_PD#_1
DY
DY
AUD_SD#
<Core Design>
BAW56PT-U1-GP
Wistron Corporation
83.00056.E11
2ND = 83.00056.I11

SB 1015 change to 83.00056.E11

Title
27_AUDIO CODEC ALC269Q-VB

Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
27
of
58
ODD Connector
SATA Connector
SA-0820
HDD1
14 SATA_RXN0
14 SATA_RXP0
C639 1
1
C638
SATA_RXN0_C
SATA_RXP0_C
SC 1209
SC - BOM change
PWR TRACE 100mil

1
2
TC18
D19
SC10U10V5ZY-1GP
DY
C622
SCD1U25V3KX-GP
-1 0114
AFTP170
AFTE14P-GP
DY
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
NP2
24
5V_S0
AFTP162
AFTE14P-GP
D18
SSM24PT-GP
2
3
4
5
6
7
SATA_TXP0_C
SATA_TXN0_C
C641
2SCD01U50V2KX-1GP
2SCD01U50V2KX-1GP
C640
2SCD01U50V2KX-1GP
2
SCD01U50V2KX-1GP
1
1
SATA_TXP0_R
SATA_TXN0_R
C615
SCD1U16V2ZY-2GP
TC17
SC10U10V5ZY-1GP
SA-0820
2
2
14 SATA_TXP0
14 SATA_TXN0
R644
0R2J-2-GP
1
1
R645
0R2J-2-GP
5V_S0
23
NP1
1
-1 0107
SSM24PT-GP
14
14
14
14
SATA_TXP4
SATA_TXN4
SATA_RXP4
SATA_RXN4
ODD_DP
ODD_MD
C626
C625
C623
C624
1
1
1
1
2
2
2
2
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
R193
10KR2J-3-GP
1
DY
SATA_TXP4_C
SATA_TXN4_C
SATA_RXP4_C
SATA_RXN4_C
ODD1
8
NP1
S1
SKT-SATA7P-15P-34-GP
62.10065.071
SATA_TXP4_C
SATA_TXN4_C
AFTP75
AFTP74
AFTP73
AFTP72
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
1
1
1
1
SATA_TXP0_C
SATA_TXN0_C
SATA_RXN0_C
SATA_RXP0_C
SATA_RXN4_C
SATA_RXP4_C
5V_S0
ODD_DP
SB 1015 Add AFTE
AFTP158
TP103
AFTP166
AFTE14P-GP
TPAD14-GP
AFTE14P-GP
ODD_MD
S2
S3
S4
S5
S6
S7
P1
P2
P3
P4
P5
P6
NP2
9
SKT-SATA7P-6P-16-GP
62.10065.D01
SB 1016 change to 62.10065.D01
B
AFTP163 AFTE14P-GP
AFTP161 AFTE14P-GP
AFTP159 AFTE14P-GP
AFTP160 AFTE14P-GP
1
1
1
1
SATA_TXP4_C
SATA_TXN4_C
SATA_RXP4_C
SATA_RXN4_C
<Core Design>
A
Wistron Corporation
Title
28_HDD & ODD

Size
A3
Document Number
Date:
Rev
-1
LA46 MB DIS
Sheet
28
of
58
A0
A1
A2
GND
DY
VCC
WP
SCL
SDA
8
7
6
5
1
2
1
2
SCD1U10V2KX-4GP
C413
SCD1U10V2KX-4GP
Close to pin45.pin46
C399
SCD1U10V2KX-4GP
C367
SCD1U10V2KX-4GP
C414
SCD1U10V2KX-4GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
C365
C379
C382
C371
1
2
3
4
LAN_SCLK
LAN_SDATA
AT24C02BN-SH-T-GP
Close to LAN_AR8131
3D3V_LAN_S5
U29
SC1KP50V2KX-1GP
C373
1D25V_LAN_S5
Close to pin42
1D1VA_LAN_S5
SCD1U10V2KX-4GP
Close to pin8
C407
SCD1U10V2KX-4GP
72.24C02.R01
2ND = 72.24C02.M01
MDI0MDI0+
1
2
4 RN45
3 SRN49D9F-GP
MID0_RC
1
C362
MDI1MDI1+
1
2
4 RN44
3 SRN49D9F-GP
MID1_RC
1
C361
MDI2+
MDI2-
2
1
MID2_RC
1
C360
MDI3MDI3+
1
2
3
4 SRN49D9F-GP
RN43 8132_DY
4 RN42
3 SRN49D9F-GP
MID3_RC
1
C359
8132_DY
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
8132_DY
SCD1U10V2KX-4GP
8132_DY
Close to pin28,pin32
1D1VD_LAN_S5
SB 1015, OBS, change to 68.4R750.20C
C386
SCD1U10V2KX-4GP
82.30020.851
2ND = 82.30020.791
C375
SC15P50V2JN-2-GP
XTAL-25MHZ-102-GP
C380
SC15P50V2JN-2-GP
Close to pin5,pin19,pin25
Close to pin6
1
2
C372
SCD1U10V2KX-4GP
C374
SCD1U10V2KX-4GP
SC1U10V2KX-1GP
C366
C368
SCD1U10V2KX-4GP
2D5V_LAN_S5
1D1VA_LAN_S5
1D25V_LAN_S5
U28
-1 0114
3D3V_LAN_S5
1D1VD_LAN_S5
C393
C395
SC1U10V2KX-1GP
SC10U6D3V3MX-GP
1 AVDDL
0R0402-PAD
2
R274
Pin42 connect to AVDDL

DO NOT SUPPORT Overclocking
3D3V_LAN_S5
LX
3D3V_LAN_S5
1
3D3V_S5
AVDD_CEN
R263
2 Q22
0R3J-0-U-GP
AO3419L-GP
DVDDL
DVDDL
DVDD_REG
DVDD_REG
R256
84.2N702.E31
2ND = 84.2N702.D31
2
2
LAN_SCLK
LAN_SDATA
1
1
26
27
47
48
LAN_ACT_LED#
10M/100M/1G_LED# 1
12
3
10
9
7
LAN_RBIAS
LAN_RST
LAN_XI
LAN_XO
SEL_25M
49
SMCLK
SMDATA
34
35
TESTMODE
NO_CONN
RBIAS
PERST#
XTLI
XTLO
SEL_25_MHZ
29
30
TWSI_CLK
TWSI_DATA
GND
DY
LED2
CLKREQ#
LED1
LED0
31
33
R259 4K7R2J-2-GP
C385
SCD1U10V2KX-4GP
14
13
18
17
21
20
24
23
4
PCIE_RXDN C409 1
PCIE_RXDP C410 1
CLK_PCIE_LAN#
CLK_PCIE_LAN
PCIE_TXN1
PCIE_TXP1
PCIE_RXN1
PCIE_RXP1
2 SCD1U10V2KX-5GP
2 SCD1U10V2KX-5GP
15
15
15
15
15
15
MDI0- 30
MDI0+ 30
MDI1- 30
MDI1+ 30
MDI2- 30
MDI2+ 30
MDI3- 30
MDI3+ 30
PCIE_WAKE# 16,31
B
LAN_CLKREQ# 15
TP68 TPAD14-GP
R253 1
R271 2
AR8131-AL1E-R-GP
71.08131.M02
CO-LAY 71.08132.M01 (10/100)
DY
2 2K37R2F-GP
1 0R0402-PAD
PLT_RST# 5,18,31,33,35,51
-1 0107
C406
SC150P50V2JN-3GP
DY
R262
4K7R2J-2-GP
LAN_ACT_LED#
ASM : 48Mhz
DY : 25Mhz
1
R277
4K7R2J-2-GP
SC 1126
SA 0906: Reserve for EEPROM DY
2
D
LAN_PWR_ON_T
4K7R2J-2-GP
TRXN0
TRXP0
TRXN1
TRXP1
TRXN2
TRXP2
TRXN3
TRXP3
WAKE#
LX
VDD3V
VDD17
VDD25V
C403
R269
100KR2J-1-GP
40
41
44
43
37
38
1
2
6
5
1
1
C400
3D3V_LAN_S5
1
2
28
32
45
46
SC1U10V2KX-1GP
SCD1U16V2ZY-2GP
Q23
2N7002A-7-GP
33 LAN_PWR_ON
VDDHO
AVDDH
AVDDH
DY
-1 0114
C387
15
19
25
REFCLKN
REFCLKP
RX_N
RX_P
TX_N
TX_P
SA 0906
VDD11_REG
AVDD_REG
AVVDL
AVDDL
AVDDL
AVDDL
AVDDL
pin2
8
11
16
22
36
39
42
Close to
2D5V_LAN_S5
C392
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
X5
LAN_XI
AVDD_CEN
30 AVDD_CEN
SC 1209
Close to pin15
LAN_XO
1
2
2
L14
IND-4D7UH-192-GP
DY
C397
LX
C396
SCD1U10V2KX-4GP
1
2
1
2
DY
C398
SCD1U10V2KX-4GP
LAN_SCLK
LAN_SDATA
SC10U6D3V3MX-GP
SCD1U10V2KX-4GP
Close to pin1
for AR8131M apply in the future
C378
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC1U10V2KX-1GP
C390
C411
C412
5
Close to pin16,pin22,pin36,pin39
<Core Design>
SB ASM by SW require
Wistron Corporation
Title
29_LAN AR8131/8132
Size
A3
Document Number
Date:
Rev
-1
LA46 MB DIS
Sheet
29
of
58
LAN Connector
SA 0904 for 8131

SA 0906
2
1
2
SA 0916
C364
SC1U10V2KX-1GP
LAN1
2
1
29 MDI3+
3
4
5
1CT:1CT
1CT:1CT
22
21
20
RJ45_8
MCT1
RJ45_4
RJ45_1
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
1
1
1
1
1
1
1
RJ45_2
RJ45_3
RJ45_4
RJ45_5
RJ45_6
RJ45_7
RJ45_8
AFTP71 AFTE14P-GP
2
3
4
5
6
7
8
NP2
10
6
7
8
1CT:1CT
19
RJ45_5
18
17
MCT4
RJ45_3
16
15
14
RJ45_6
MCT3
RJ45_1
13
RJ45_2
29 MDI29
10
11
29 MDI1+
1CT:1CT
MCT1
MCT2
MCT4
MCT3
SC 1208
29 MDI1-
RN37
SRN75J-1-GP
XFORM-24P-15-GP
68.05009.301
2ND = 68.IH601.301
1
2
3
4
29 MDI0+
SC 1208
8132_DY
62.10044.481
SA 0916 SWAP
1
2
8132_DY
AFTP69
AFTP67
AFTP65
AFTP66
AFTP63
AFTP61
AFTP60
RJ45-8P-15-GP
29 MDI2+
8132_DY
C355
SC1KP50V2KX-1GP
C357
SCD1U10V2KX-4GP
1
MCT2
RJ45_7
SC 1208
12
SA 0906
24
23
8132_DY
AFTP70 AFTE14P-GP
XF1
1
2
SC 1208
C363
SC1KP50V2KX-1GP
C352
SCD1U10V2KX-4GP
2
SA 0906
C353
SC1KP50V2KX-1GP
C356
SCD1U10V2KX-4GP
9
NP1
1
GIGA Lan Transformer
-1 0113
29 MDI3-
29
8
7
6
5
2
1
C354
SC1KP50V2KX-1GP
XRF_TDC
C350
SCD1U10V2KX-4GP
AVDD_CEN
R252
0R0603-PAD
SA 0913 CHANGE SIZE
5
1.route on bottom as differential pairs.
2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.
29 MDI0-
MCT_R
C250
SC1KP2KV6KX-GP
SB 1026 change to 78.1022S.22L

SA 0906, change transformer type for vendor suggestion.
<Core Design>
Wistron Corporation

Title
30_LAN CONN
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
30
of
58
SB 1022 Change name

IOCN1
NP1
71
1
3A
3D3V_S5
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
72
NP2
1D5V_S0
1.6A
5V_S5
Debug card use

33 E51_RxD
33 E51_TxD
16,29 PCIE_WAKE#
15 MINI1_CLKREQ#
5,18,29,33,35,51 PLT_RST#
33 WIFI_RF_EN
WLAN_MINI1
15 SMB_CLK
15 SMB_DATA
34 WLAN_LED#
WWAN_MINI2
15 MIN2_CLKREQ#
34 3G_LED#
5,16,33,36,41,42,43,44 PM_SLP_S3#
16,33,36,41,43 PM_SLP_S4#
15 NEW_CLKREQ#
34 LED_WiMAX#
33 WWAN_EN
Card reader 15 CLK48_Cardreader

WWAN_MINI2
18 USBPN5
18 USBPP5
1
AFTP86 AFTE14P-GP
73
2
PCIE_RXN2 15
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
74
PCIE_RXP2 15
WLAN_MINI1
PCIE_TXP2 15
PCIE_TXN2 15
PCIE_TXP4 15
PCIE_TXN4 15
NEW CARD
PCIE_RXP4 15
PCIE_RXN4 15
PCIE_TXN3 15
PCIE_TXP3 15
WWAN_MINI2
PCIE_RXN3 15
PCIE_RXP3 15
CLK_PCIE_MINI1# 15
CLK_PCIE_MINI1 15
WLAN_MINI1
CLK_PCIE_MINI2# 15
WWAN_MINI2
CLK_PCIE_MINI2 15
CLK_PCIE_NEW# 15
CLK_PCIE_NEW 15
USBPP12 18
USBPN12 18
USBPP3 18
USBPN3 18
USBPP4 18
USBPN4 18
NEW CARD
NEW CARD
WLAN_MINI1
Card reader
FOX-CONN70A-2-GP
20.F1400.070
AFTP107 AFTE14P-GP
3D3V_S0
AFTP103 AFTE14P-GP
3D3V_S5
AFTP104 AFTE14P-GP
1D5V_S0
AFTP99 AFTE14P-GP
5V_S5
3D3V_S0
AFTP98 AFTE14P-GP
AFTP93 AFTE14P-GP
AFTP91 AFTE14P-GP
AFTP84 AFTE14P-GP
AFTP190 AFTE14P-GP
AFTP188 AFTE14P-GP
AFTP109 AFTE14P-GP
AFTP108 AFTE14P-GP
AFTP105 AFTE14P-GP
AFTP106 AFTE14P-GP
AFTP185 AFTE14P-GP
AFTP184 AFTE14P-GP
AFTP182 AFTE14P-GP
AFTP181 AFTE14P-GP
AFTP180 AFTE14P-GP
AFTP178 AFTE14P-GP
AFTP187 AFTE14P-GP
AFTP189 AFTE14P-GP
AFTP177 AFTE14P-GP
AFTP179 AFTE14P-GP
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
E51_RxD
E51_TxD
PCIE_WAKE#
MINI1_CLKREQ#
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
PCIE_RXN2
PCIE_RXP2
PCIE_TXN2
PCIE_TXP2
PLT_RST#
WIFI_RF_EN
SMB_CLK
SMB_DATA
WLAN_LED#
MIN2_CLKREQ#
USBPN3
USBPP3
CLK_PCIE_MINI2#
CLK_PCIE_MINI2
AFTP194 AFTE14P-GP
AFTP193 AFTE14P-GP
AFTP176 AFTE14P-GP
AFTP101 AFTE14P-GP
AFTP100 AFTE14P-GP
AFTP95 AFTE14P-GP
AFTP94 AFTE14P-GP
AFTP174 AFTE14P-GP
AFTP173 AFTE14P-GP
AFTP80 AFTE14P-GP
AFTP79 AFTE14P-GP
AFTP81 AFTE14P-GP
AFTP78 AFTE14P-GP
AFTP82 AFTE14P-GP
AFTP83 AFTE14P-GP
AFTP89 AFTE14P-GP
AFTP88 AFTE14P-GP
AFTP90 AFTE14P-GP
AFTP85 AFTE14P-GP
AFTP192 AFTE14P-GP
AFTP191 AFTE14P-GP
AFTP77 AFTE14P-GP
AFTP76 AFTE14P-GP
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
USBPP4
USBPN4
CLK48_Cardreader
PCIE_TXP4
PCIE_TXN4
PCIE_RXP4
PCIE_RXN4
CLK_PCIE_NEW
CLK_PCIE_NEW#
USBPP12
USBPN12
3G_LED#
PM_SLP_S3#
PM_SLP_S4#
NEW_CLKREQ#
PCIE_TXN3
PCIE_TXP3
PCIE_RXN3
PCIE_RXP3
USBPN5
USBPP5
LED_WiMAX#
WWAN_EN
<Core Design>
A
Wistron Corporation
Title
31_IO CONN
Size
A3
Document Number
Date:
Rev
-1
LA46 MB DIS
Sheet
31
of
58
USB3
U11
33 USB_PWR_EN#
C38
SCD1U10V2KX-4GP
Least 40 mil
8
7
6
5
VOUT
VOUT
VOUT
FLG#
SA 0820
USB_OC#0 18
2ND = 74.00547.A79
2
3
4
AFTE14P-GP
GND
VIN
VIN
EN/EN#
RT9711BPF-GP
18 USBPN1
18 USBPP1
AFTP9
1
5V_USB3_S0
1
2
3
4
USB3
>1A
AFTP126 AFTE14P-GP
SB 1015 change to 74.09711.079
6
ACES-CON4-17-GP
20.F1621.004
Least 40 mil
5V_USB1_S0
AFTP165 AFTE14P-GP
AFTP167 AFTE14P-GP
SA 0827
SA 0914 change pin define
Bluetooth Power
3D3V_BT_S0
USB1
1
R27
L28
ACM2012-900-2P-T-GP
S
R29
SKT-USB8-3-GP
C15
SC1U10V3KX-3GP
BT_ON_T
-1 0116 for EMI
C37
C36
SCD1U10V2KX-4GP
2
3
4
5
7
AFTP168 AFTE14P-GP
-1 0114
USB_L2USB_L2+
3D3V_S0
2
DY 0R3J-0-U-GP
Q1
AO3419L-GP
8
6
1
USB_OC#4 18
SA 0820
USB_OC#1 18
74.02062.079
2ND = 74.00546.07D
18 USBPP2
8
7
6
5
Least 40 mil
5V_USB2_S0
TPS2062D-GP
OC1#
OUT1
OUT2
OC2#
SCD1U10V2KX-4GP
GND
IN
EN1#
EN2#
100KR2J-1-GP
18 USBPN2
33 USB_PWR_EN#
C694
SCD1U10V2KX-5GP
USB_L2USB_L2+
EC19
DY
2
TC6
ST150U6D3VBM-2-GP
80.15715.12L
2ND = 77.C1571.09L
1
1
1
2
3
4
5V_USB1_S0
40 mil
SCD1U10V2KX-5GP
1
1
AFTE14P-GP
AFTP164
C699
SC1U10V3ZY-6GP
USB x 2 Connector
SA 0902
U64
5V_S5
USBPN1
USBPP1
1
1
AFTP125 AFTE14P-GP
AFTP123 AFTE14P-GP
Q3
2N7002A-7-GP
5V_USB2_S0
SA 0827
80.15715.12L
2ND = 77.C1571.09L
84.2N702.E31
2ND = 84.2N702.D31
33 BLUETOOTH_EN
EC20
SA 0916 change pin define

2
TC11
ST150U6D3VBM-2-GP
AFTP169 AFTE14P-GP
40 mil
SCD1U10V2KX-5GP
SB 1015
change name
5V_USB3_S0
5V_S5
Connect to USB BD
USB2
DY
8
6
1
SA 0820
18 USBPN8
18 USBPP8
USB_L8USB_L8+
AFTP175 AFTE14P-GP
2
3
4
5
7
L29
ACM2012-900-2P-T-GP
AFTP4
AFTP3
AFTP2
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
1
1
1
USBPP9
USBPN9
BT_LED
BT
3D3V_BT_S0
SKT-USB8-3-GP
BT1
-1 0116 for EMI
7
AFTP6
AFTP171 AFTE14P-GP
AFTP172 AFTE14P-GP
1
1
USB_L8USB_L8+
AFTE14P-GP
1
2
3
4
5
6
18 USBPP9
18 USBPN9
34 BT_LED
AFTP1
AFTE14P-GP
8
JST-CON6-17-GP
21.D0220.106
SB 1016 change to 21.D0220.106
<Core Design>
A
Wistron Corporation
Title
32_USB & BT
Size
A3
Document Number
Date:
Rev
-1
LA46 MB DIS
Sheet
32
of
58
2
1
DY
19 EC_SWI#
KBRCIN#
KA20GATE
ECSCI#_KBC
23 KBC_BL_ON_IN
2
ECSWI#_KBC
2
R574
0R0603-PAD
-1 0108
124
7
2
3
126
127
128
1
125
8
122
121
29
9
123
R552
0R0402-PAD
1
VREF
A/D
GPIO90/AD0
GPIO91/AD1
GPIO92/AD2
GPIO93/AD3
GPIO5/AD4
GPIO4/AD5
LPC
GPIO94/DA0
GPIO95/DA1
GPIO96/DA2
GPIO97
D/A
SCD1U16V2ZY-2GP
102
19
46
76
88
115
VCC
VCC
VCC
VCC
VCC
VDD
AVCC
80
GPIO10/LPCPD#
LRESET#
LCLK
LFRAME#
LAD0
LAD1
LAD2
LAD3
SERIRQ
GPIO11/CLKRUN#
KBRST#/GPIO86
GPIO85/GA20
ECSCI#/GPIO54
GPIO65/SMI#
GPIO67/PWUREQ#
U44A
U44B
DY
DY
KBC_XO
77
KBC_XI
GPIO0/32KCLKIN
KBSOUT0/JENK#
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
GPIO2
KBSOUT4/JEN0#
GPIO55/CLKOUT/IOX_DIN
KBSOUT5/TDO
KBSOUT6/RDY#
GPIO14/TB1
KBSOUT7
GPIO20/TA2/IOX_DIN
KBSOUT8
GPIO56/TA1
KBSOUT9/SDP_VIS#
GPIO15/A_PWM
KBSOUT10&P80_CLK
GPIO21/B_PWM
KBSOUT11&P80_DAT
GPIO13/C_PWM
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
GPIO12/PSDAT3
GPIO60/KBSOUT16
GPIO25/PSCLK3
GPIO57/KBSOUT17
GPIO27/PSDAT2
GPIO26/PSCLK2
GPIO35/PSDAT1
KBSIN0
GPIO37/PSCLK1
KBSIN1
KBSIN2
KBSIN3
KBSIN4
F_SDI
KBSIN5
F_SDO
KBSIN6
F_CS0#
KBSIN7
F_SCK
79
30
27 KBC_MUTE#
AD_DETECT
63
117
31
32
118
62
SG_DIS#
27 KBC_BEEP
2
BRIGHTNESS_R
33R2J-2-GP
1
R583
KBC
SB 1029 Add for SW requirement

13
12
11
10
71
72
26,54 NV_HDMI_DETECT
24 CAMERA_EN
24 PWM_SELECT
31 WWAN_EN
35 TPDATA
35 TPCLK
SA 0916
97
98
99
100
108
96
PS/2
AD_IA 46
TP_LED 34
VGA_SW# 34
GSENSE_Z 35
GSENSE_X 35
GSENSE_Y 35
PM_SLP_M# 1
G_SENSOR_ID
DISCRETE#
TP74
86
87
90
92
35 SPIDI
35 SPIDO
35 SPICS#
35 SPICLK
SUS_PWR_DN_ACK
R292
10KR2J-3-GP
2
1
2 OF 2
R319
10MR2J-L-GP
34 dGPU_LED
24 BRIGHTNESS
104
101
105
106
107
82.30001.661
47 AD_DETECT
16 PM_PWRBTN#
DY
X-32D768KHZ-34GPU
SC 1210
EC22
DY
KBC_XO
-1 0108
C468
DY
34 KBC_NOVO_BTN#
18 CLK_PCI_KBC
C656
SC4D7P50V2CN-1GP
2
R560
0R0603-PAD
3D3V_S0
GPIO41
1 OF 2
14,35 LPC_LFRAME#
14,35 LPC_LAD0
14,35 LPC_LAD1
14,35 LPC_LAD2
14,35 LPC_LAD3
14 INT_SERIRQ
16 PM_CLKRUN#
19 KBRCIN#
19 KA20GATE
3D3V_AUX_S5_KBC_L
BAT_IN#
47 BAT_IN#
SC27P50V2JN-2-GP
C475
2 PLT_RST#_1
100R2J-2-GP
C660
1
2
R336
1
PLT_RST#
SC1U10V2ZY-GP
C659
DY
SCD1U16V2ZY-2GP
3D3V_AUX_S5_KBC
DY R311
3D3V_AUX_S5
SRN4K7J-8-GP
5,18,29,31,35,51
1KBC_XO_R2
C460
X6
DY
C427
SCD1U16V2ZY-2GP
2
1
2 E51_TxD
R559
1
10KR2J-3-GP
BAT_SCL
BAT_SDA
3
4
C658
SCD1U16V2ZY-2GP
2
1
2
1
C476
33KR2J-3-GP
3D3V_AUX_S5
C661
SCD1U16V2ZY-2GP
2
1
RN50
DY
C479
C482
2 BLUETOOTH_EN
R324
1
4K7R2J-2-GP
C451 DY
KBC_PWRBTN#
KBC_NOVO_BTN#
SRN10KJ-6-GP
SCD1U16V2ZY-2GP
2
1
3D3V_AUX_S5
SC10U10V5ZY-1GP
2
1
E51_TxD
S5_ENABLE_KBC
SCD1U16V2ZY-2GP
DY
8
7
6
5
SC10U10V5ZY-1GP
2
1
DY
R558
1
10KR2J-3-GP
1
2
3
4
FIU
VCC_POR#
16
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
KCOL18
53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33
54
55
56
57
58
59
60
61
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
85
ECRST#
TPAD14-GP
SA 0912 RF
-1 0110
NPCE781EA0DX-GP
-1 0108
36 S0_PWR_GOOD
BLUETOOTH_EN
32 BLUETOOTH_EN
31 WIFI_RF_EN
34 WLAN_TEST_LED
E51_TxD
E51_RxD
31 E51_TxD
31 E51_RxD
16 AC_PRESENT
111
113
112
35 GSENSE_ON#
1
S5_ENABLE_KBC
84
83
82
91
114
14
15
R321
2KR2F-3-GP
GPIO74/SDA2
GPIO73/SCL2
GPIO22/SDA1
GPIO17/SCL1
GPIO1/TB2
GPIO3/AD6
GPIO6/IOX_DOUT
GPIO7/AD7
GPIO23/SCL3
GPIO24
GPIO30
GPIO31/SDA3
GPIO32/D_PWM
GPIO33/H_PWM
GPIO40/F_PWM
GPIO42/TCK
GPIO43/TMS
GPIO44/TDI
GPIO45/E_PWM
GPIO46/CIRRXM/TRST#
GPIO47
GPIO50/TDO
GPIO51
GPIO52/RDY#
GPIO53
GPIO70
GPIO71
GPIO72
GPO82/IOX_LDSH/TEST#
SMB
SP
GPIO66/G_PWM
GPIO77/SPI_DI
GPO76/SPI_DO/SHBM
GPIO75/SPI_SLK
GPIO81
SPI
GPIO
GPO83/SOUT_CR/XORTR#
GPIO87/CIRRXM/SIN_CR
GPO84/IOX_SCLK/TRIST#
GPIO16
GPIO34/CIRRXL
GPIO36
SER/IR
44
PU
PM_SLP_S3# 5,16,31,36,41,42,43,44
KBC_PWRBTN#
KBC_PWRBTN# 34
AC_IN# 46
COVER_SW#
PCB_VER0
WIRELESS_SW# 34
AV_INT 34
PCB_VER1
Power LED
PWR_LED 34
CHARGE_LED_2
46_DETECT
AD_OFF
34
SA 0827
AD_OFF 47
RN52
RSMRST#_KBC 16
PM_SLP_S4# 16,31,36,41,43
5
6
7
8
3D3V_AUX_S5
CHARGE_LED_1
34
GSENSE_TST 35
LAN_PWR_ON 29
SPI_WP# 35
3D3V_S0
INDICATE_LED#
65W_90W#
COVER_SW#
KA20GATE
KBRCIN#
C471
SC1U10V2KX-1GP
SB DY
DY
SRN10KJ-6-GP
34
BLON_OUT 24
CHG_ON# 46
USB_PWR_EN# 32
CHG_ON#
ECRST#
4
3
2
1
CHECK
11,36 HW_THRMTRIP#
Q28
CH3906PT-GP
0814
ME_UNLOCK# 14
84.03906.H11
2ND = 84.03906.U11
VCORF
GND
GND
GND
GND
GND
GND
5
18
45
78
89
116
SC 1210
3D3V_AUX_S5
3D3V_AUX_S5
AD_OFF
DY
D9
1
19 EC_SCI#
KB_LED_1 49
KB_LED_2 49
Q27
DY
2
KBC_SDA1
R305
DY
3
4
3D3V_S0
R332
DY
84.DMN66.03F
2ND = 84.27002.F3F SB 1016 change 84.DMN66.03F
3D3V_AUX_S5
C437
ADI
R554
DY
DY
R642
SG
1
2
1
1
2
R302
DIS
R578
UMA
R555
DIS
2
1
R553
SG_DIS#
65W_90W#
DISCRETE#
1
2
PCB_VER1
R637
10KR2J-3-GP
SC1U6D3V2KX-GP
1
2
PCB_VER0
C480
SCD22U6D3V2KX-1GP
ST
74.06781.07B
2ND = 74.09132.B7B
G_SENSOR_ID
EM-6781-T30-GP
84.00143.G1K
2nd = 84.00143.D1K
100R2F-L1-GP-U
VDD
COVER_SW#
2
R2
DTC143ZUB-GP
1
1
R1
3
1
COVER_SW#_1
R576
R301
UMA
10KR2J-3-GP
KCOL18
R350
R577
10KR2J-3-GP
OUTPUT
VSS
R636
10KR2J-3-GP
PlanarID
SA: 0,0
SB: 0,1
SC: 1,0
-1: 1,1
10KR2J-3-GP
KCOL18_Q
G-SENSOR ID
High: ST
Low: ADI
10KR2J-3-GP
HALL1
Q18
Cover Up Switch
10KR2J-3-GP
84.00143.G1K
2nd = 84.00143.D1K
10KR2J-3-GP
3D3V_AUX_S5
DTC143ZUB-GP
EMI
SB 1024 SWAP
10KR2J-3-GP
3D3V_S0
SA 0827
2
R2
-1 0111
R641
DIS_ONLY
KCOL17_Q
R1
3
1
3D3V_AUX_S5
Q20
KCOL17
3D3V_S0
KCOL17_Q
KCOL18_Q
83.00054.T81
2ND = 83.00054.Z81
BAT54PT-GP
3D3V_S0
KROW1
KCOL3
KCOL5
KCOL8
KCOL9
KCOL7
KCOL4
KCOL13
KCOL14
KCOL15
KCOL12
KCOL11
KCOL16
KROW3
KROW4
KCOL6
KCOL2
KCOL1
KB_LED_2
R412 1
100R2J-2-GP
R414 1
100R2J-2-GP
10KR2J-3-GP
KROW5
KROW6
SB 1030 Add
KB_LED_1
10KR2J-3-GP
KCOL10
SMBD_THERM 11,34,55
DMN66D0LDW-7-GP
10KR2J-3-GP
KROW8
KROW7
3D3V_S0
SMBC_THERM 11,34,55
2
KROW2
2
1
SRN10KJ-5-GP
ECSCI#_KBC
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
32
31
1
R314
2
1KR2J-1-GP
DY
1 R309
2 MODEL_ID0
0R2J-2-GP
1 R323
2 MODEL_ID1
0R2J-2-GP
R331
49
KBC_XO
KBC_XI
KCOL17_Q 49
KCOL18_Q 49
RN48
SMBC_THERM
SMBD_THERM
KCOL[16..1]
R304
1
100KR2J-1-GP
DY
10KR2J-3-GP
KB1
ACES-CON30-1-GP
49
10KR2J-3-GP
20.K0320.030
BAT_IN#
KROW[8..1]
R303
10KR2J-3-GP
3D3V_AUX_S5
Internal KeyBoard Connector
KBC_SCL1
2
10KR2J-3-GP
1
R355
100KR2J-1-GP
46_DETECT
TP75
NPCE781EA0DX-GP
TPAD14-GP
5V_AUX_S5
103
FOR KBC DEBUG
SCD1U16V2ZY-2GP
C428
AGND
VCORF
64
95
93
94
119
6
109
120
65
66
16
17
20
21
22
23
24
25
26
27
28
73
74
75
110
81
34 SCRLK_LED#
5,42 VTT_PWRGD
36,40 S5_ENABLE
68
67
69
70
BATTERY----->
KBC_SDA1
KBC_SCL1
BAT_SDA
BAT_SCL
KBC_SDA1
KBC_SCL1
BAT_SDA
BAT_SCL
15
15
46,47
46,47
THERMAL----->
3D3V_AUX_S5_KBC_L
RN51
E51_RxD
SC15P50V2JN-2-GP
4
3D3V_S0
SA 0827
2
SC15P50V2JN-2-GP
5
3D3V_S0
R557
1
10KR2J-3-GP
65W_90W#
High: 65W / Low: 90W
DISCRETE#
High: UMA / Low: Discrete
SG_DIS#
High: DIS only / Low: SG (Hybrid)
SB 1015 AdD
<Core Design>
Wistron Corporation
Title
33_KBC_NPCE781E
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
33
of
58
SC -BOM change to WHITE
Q63
Q57
33 TP_LED
SC - BOM change
LED6
TP_LED#_Q
R1
1
R624
2
200R2J-L1-GP
3D3V_S0
33 PWR_LED
R2
83.00191.J70
DTC143ZUB-GP
TP LED
LED1
R1
LED-W-56-GP
R2
A TP_LED#_R
PWR_LED#_Q
A PWR_LED#_R
83.00191.J70
Power and LED Board

KBC_PWRBTN#
KBC_NOVO_BTN#
INDICATE_LED#
SCRLK_LED#
SATA_LED#
-1 0108
3D3V_S0
3D3V_S5
9
KBC_PWRBTN#
AFTP54
AFTE14P-GP
AFTE14P-GP AFTP19
AFTE14P-GP AFTP18
AFTE14P-GP AFTP17
AFTE14P-GP AFTP15
AFTE14P-GP AFTP20
1
2
1
2
1
2
EC32
33 CHARGE_LED_1
R2
LED-O-16-GP-U
83.00190.Z70
3D3V_S0
DTC143ZUB-GP
84.00143.G1K
2nd = 84.00143.D1K
SC - BOM change
Q60
SB 1024 Add
-1 0107 ASM for EMI
W_LED#
LED4
R1
R2
W_LED#_Q
SMBC_THERM
SMBD_THERM
AV_INT
33 dGPU_LED
83.00191.J70
2
3D3V_S0
33R2J-2-GP
dGPU_LED
W_LED_1
1
B
BAW56PT-U1-GP
32 BT_LED
W_LED_2
D21
WLAN_LED
1
D26
E
3
W_LED_1#
R534
100KR2J-1-GP
W_LED#
BAT54CPT-GP
83.R2003.E81
2ND = 83.00054.X81
AFTP199
AFTE14P-GP
R1
R2
PDTC124EU-1-GP
R569
4K7R2J-2-GP
Q55
31 3G_LED#
C686
SCD1U10V2KX-4GP
R568
4K7R2J-2-GP
DY
3D3V_S0
VGA_SW# 33
1
R626
83.00270.E70
3D3V_S0
dGPU_LED#_R
LED-Y-71-GP
31 LED_WiMAX#
31 WLAN_LED#
NP1
NP2
SC 1209
D24
CON
B46-DY
84.00143.G1K
2nd = 84.00143.D1K
R606
100KR2J-1-GP
1
2
3
R1
dGPU_LED#_Q
DTC143ZUB-GP
3D3V_S0
VGASW1
WLAN_LED
SB 1016 change to 83.00193.A70
LED5
3
R2
SC 1130 Change net
83.R2003.H8F
2ND = 83.R2003.08M
SB 1015 change name
2
3D3V_S0
33R2J-2-GP
LED-W-56-GP
Q59
D23
CH521G-30PT-GP
AFTP198
AFTE14P-GP
1
R631
SC - BOM change
AFTP195
AFTE14P-GP
AFTP196
AFTE14P-GP
AFTP197
AFTE14P-GP
-1 0111
A W_LED#_R
C708
SC100P50V2JN-3GP
SB 1016 Add 20.K0403.008
C707
SC100P50V2JN-3GP
2
1
20.K0320.008
ACES-CON8-19-GP
C706
SC100P50V2JN-3GP
2
1
SMBC_THERM 11,33,55
SMBD_THERM 11,33,55
AV_INT 33
1
AFTP119
AFTE14P-GP
3D3V_S5
CHARGER LED1
CHECK SMBus voltage plane

AFTP21
AFTE14P-GP
84.00143.G1K
2nd = 84.00143.D1K
10
8
7
6
5
4
3
2
SC - BOM change
A CHARGE_LED1#_R
1
R629
39R2J-L-GP
3D3V_S5
CHARGER LED2
ORG
CHARGE_LED1#_Q
DTC143ZUB-GP
AV1
2
33R2J-2-GP
LED3
R1
A CHARGE_LED2#_R
1
R630
LED-W-56-GP
83.00191.J70
SB 1016 change to 83.00193.A70
84.00143.G1K
2nd = 84.00143.D1K
DTC143ZUB-GP
EC33
SCD1U10V2KX-4GP
CHARGE_LED2#_Q
Q61
SCD1U10V2KX-4GP
EC31
SCD1U10V2KX-4GP
-1 0111
EC30
SCD1U10V2KX-4GP
20.K0320.008
SB 1016 change to 20.K0403.008
EC29
SCD1U10V2KX-4GP
ACES-CON8-19-GP
1
AFTP16
AFTE14P-GP
R1
D
SC - BOM change
LED2
3
R2
KBC_PWRBTN# 33
KBC_NOVO_BTN# 33
SCRLK_LED# 33
SATA_LED# 14
INDICATE_LED# 33
AFTP12
AFTE14P-GP
1
1
1
1
1
KBC_PWRBTN#
KBC_NOVO_BTN#
10
33 CHARGE_LED_2
SB 1021
2
3
4
5
6
7
8
POWER LED
SB 1016 change to 83.00193.A70
Q62
G73
GAP-OPEN
3D3V_S5
SB 1015 change
2
33R2J-2-GP
84.00143.G1K
2nd = 84.00143.D1K
PB1
1
R632
LED-W-56-GP
DTC143ZUB-GP
SB 1016 change to 83.00193.A70
84.00143.G1K
2nd = 84.00143.D1K
SA 0824
SB 1016 change to 3D3V_S5

SC - BOM change
SA 0916
BAT54CPT-GP
SW-SLIDE3P-3-GP
62.40018.511
-1 0109
33 WLAN_Test_LED
CN1
3D3V_S5
3D3V_S0
13
CHECK PIN DEFINE
1
3D3V_S0
SW1
AFTP121
AFTE14P-GP
SB 1015 change name
DY
4
R607
100KR2J-1-GP
1
2
3
WIRELESS_SW# 33
DY
2
SW-SLIDE3-3-GP
62.40018.491
SB 1016 change to
62.40018.491
5
1
C687
SCD1U10V2KX-4GP
AFTE14P-GP AFTP122
2
3
4
5
6
7
8
9
10
11
12
PWR_LED
CHARGE_LED_2
CHARGE_LED_1
W_LED#
dGPU_LED
TP_LED
VGA_SW#
WIRELESS_SW#
14
<Core Design>
A
Wistron Corporation
Title
20.F0702.012
34_LED_POWERBD CONN
ACES-CON12-6-GP-U1
SC 1130 Reserve for 15"
Size
A3
Document Number
Date:
Rev
-1
LA46 MB DIS
Sheet
34
of
58
3D3V_AUX_S5
Finger printer
5V_S0
EC BIOS Flash ROM
SA 0827
SB 1024 SWAP
SA 0912 change
R117
0R0603-PAD
5V_FP_S0
1
2
3
4
5
6
1
MX25L1005CMI-12G-GP
DY
72.25105.B01
2ND = 72.25010.I01
DY
2 0R0402-PAD
2 0R0402-PAD
1
1
SPICLK 33
SPIDO 33
AFTE14P-GP
AFTP51
AFTP52
AFTE14P-GP
AFTE14P-GP
1
1
1
EC6
SC2D2U10V3ZY-1GP
USBPP10
USBPN10
AFTP50
SA 0912 EMI
EC24
SC4D7P50V2CN-1GP
ER3
ER4
ACES-CON6-13-GP
20.K0320.006
EC25
SC4D7P50V2CN-1GP
EC23
VCC
HOLD#
SCLK
SI
SPI_3D3V_VCC
SPI_HOLD#
SPICLK_1
SPI_DO
-1 0111
FP1
SC 1209
SB 1016 change to 20.K0322.006
DY
2
CS#
SO
WP#
GND
8
7
6
5
1
2
SB 1029 reserve for

SW requirement
128KB
U68
1
2
3
4
SPI_DI
SPI_WP#
R640
10KR2J-3-GP
AFTE14P-GP
18 USBPP10
18 USBPN10
-1 0107
ER1
0R0603-PAD
SPI_HOLD#
-1 0107
ER2 1
0R0402-PAD
RN76
SRN10KJ-5-GP
SC4D7P50V2CN-1GP
2
1
33 SPICS#
33 SPIDI
33 SPI_WP#
DY
AFTP53
1
2
R639
2
10KR2J-3-GP
SCD1U16V2ZY-2GP
DY
4
3
3D3V_AUX_S5
EC21
5V_FP_S0
3D3V_S5
C334
SCD1U16V2ZY-2GP
LB46-DY
LB46-DY
Place close to EC
-1 0111
TPAD1
12
SRN33J-5-GP-U
GSENSE_Y
C415
SCD1U10V2KX-4GP
NC#16
33
C424
SCD1U10V2KX-4GP
LB46-DY
ANALOG_AGND
13
R279 1
56KR2J-L1-GP
GSENSE_X_R
16
LIS34ALTR-GP
6
5
4
3
2
LB46-DY
11
TP_L
TP_R
R281 1
56KR2J-L1-GP
LB46-DY
NC#11
NC#4
NC#9
DY
GSENSE_Y_R
10
VOUTX
NC#13
9
1
2
14
15
VOUTZ
VOUTY
NC#1
SA 0904
C408
SCD1U10V2KX-4GP
GSENSE_X 33
TP_CLK
TP_DATA
4
3
-1 0107
ANALOG_AGND
RN21
1
2
R265
0R0402-PAD
GND
GND
GND
LB46-DY
C416
SCD1U10V2KX-4GP
EC7
DY
2
EC10
1
2
4
3
SRN10KJ-5-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
RN19
LB46-DY
5
6
7
C405
SCD1U10V2KX-4GP
ANALOG_AGND
R261
100KR2J-1-GP
GSENSE_Z 33
DY
5V_S0
SA 0914
DY
1
5V_S0
ST
GND
RES
2
3
33 GSENSE_TST
VDD
U30
TOUCH PAD
R273 1
56KR2J-L1-GP
GSENSE_Z_R
R283
100KR2J-1-GP
SB 1024 SWAP
SB 1015 Swap data and clk
G-Sensor
C394
LB46-DY
DY
TPCLK
TPDATA
C391
33 GSENSE_ON#
SRN4K7J-8-GP
33 TPCLK
33 TPDATA
SC10U6D3V5KX-1GP
2
1
PCH_SPI_CLK 14
PCH_SPI_MOSI 14
72.25325.A01
2ND = 72.25Q32.A01
PCH_SPI_HOLD#0
PCH_SPI_WP#0
Q24
PDTA114EE-3-GP-U
PCH_SPI_HOLD#0
2
1
VCC3_ACC
LB46-DY
8
7
6
5
VCC
NC#7
SCK
SI
MX25L3205DM2I-12G-GP
RN39
3
4
2
33R2J-2-GP
CS#
SO
WP#
GND
2 R270
10R3F-GP
R1
3D3V_S0
1
R245
1
2
3
4
PCH_SPI_MOSO
PCH_SPI_WP#0
R2
14 PCH_SPI_CS#0
14 SPI_MOSO_R
3D3V_S0
4MB
U26
SCD1U10V2KX-4GP
2
1
VCC3M_Q34
System BIOS Flash ROM
LB46-DY
74.00034.0BZ
2ND = 74.00335.0BZ
LB46-DY
C417
SCD1U10V2KX-4GP
LB46-DY
ANALOG_AGND
STMicro LIS34AL: 74.00034.0BZ

ADXL335 : 74.00335.0BZ
1
7
ACES-CON6-13-GP
20.K0320.006
SB 1016 change to 20.K0322.006
SC 1203
GOLDEN FINGER FOR DEBUG BOARD

SA 0904
TPAD2
TP_DATA
SB 1202
-1 0111
TP_CLK
AFTP120
1
SC100P50V2JN-3GP
SC100P50V2JN-3GP
DY
EC9
TP_R
TP_L
EC8
DY
AFTE14P-GP
3D3V_S0
2
3
4
5
6
1
1
1
1
TP_DATA
TP_CLK
TP_R
TP_L
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTP55
AFTP56
AFTP57
AFTP58
1
1
1
1
1
1
14,33 LPC_LAD0
14,33 LPC_LAD1
14,33 LPC_LAD2
14,33 LPC_LAD3
14,33 LPC_LFRAME#
5,18,29,31,33,51 PLT_RST#
18 PCLK_FWH
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTP116
AFTP111
AFTP110
AFTP117
AFTP114
AFTP115
AFTE14P-GP
AFTP113
ACES-CON6-13-GP
20.K0320.006
AFTP112
AFTE14P-GP
-1 0114
-1 0107
TP_SW_L
TP_SW_R
TPS1
A
3
TPS2
R667
100R2J-2-GP
LB46-ASM
TP_L
SW-TACT-5P-2-GP
SW-TACT-5P-2-GP
62.40009.B21
LB46-ASM
62.40009.B21
LB46-ASM
R668
100R2J-2-GP
LB46-ASM
TP_R
<Core Design>
Wistron Corporation
Title
35_BIOS & TP & G-Sensor & FP

Size
Document Number
Custom
Rev
SC
LA46 MB DIS
Date:
Sheet
35
of
58
CPU thermal thut down

1D05V_VTT
1
5A
1
R623
2 Z_12V
10KR2J-3-GP
2
R622
Z_12V_G3
1
330KR2J-L1-GP
DY
Z_12V_D4
D25
PDZ9D1B-GP
3D3V_S0
83.9R103.C3F
2ND = 83.9R103.F3F
0814
2
3
4
Z_12V_D3
1
HW_THRMTRIP#
11,33
8
7
6
5
AO4468-GP
84.04468.037
2nd = 84.04800.D37
PM_SLP_S3#
PM_SLP_S3# 5,16,31,33,41,42,43,44
U21
AO3400-1-GP-U
1D5V_S0
DMN66D0LDW-7-GP
0814
D
D
D
D
S
S
G
Q58
D10
3D3V_S5
U63
6.5A 1 S
DY
33,40 S5_ENABLE
R621
100KR2J-1-GP
84.02222.V11
C487
SC2D2U16V3KX-GP
R594
G
C
1
E
H_PWRGD_1
1 C677
330KR2J-L1-GP
10KR2J-3-GP
1 DY
R357
1KR2J-1-GP
8
7
6
5
AO4468-GP
SCD22U25V3KX-GP
R602
PM_THRMTRIP-A# 5,19
5,19 H_PWRGD
D
D
D
D
84.04468.037
2nd = 84.04800.D37
QC = 64.49R95.6DL
MMBT2222A-3-GP
Q29
RUN_POWER_ON
U62
S
S
S
G
SCD1U25V3KX-GP
1 DY 2
2nd = 84.00610.C31
84.S0610.B31
NDS0610-NL-GP
R358
56R2J-4-GP
1
2
3
4
C670
Q56
DY
5V_S5
5V_S0
DCBATOUT
84.DMN66.03F
2ND = 84.27002.F3F
84.03400.A37
2ND = 84.03400.B37
G
SB 1016 change to
84.DMN66.03F
1D5V_S3
1.65A
BAT54PT-GP
83.00054.T81
2ND = 83.00054.Z81
84.03400.B37
Alternate part
SC 1130 for S3 power reduction
3D3V_RUNPWR 1
DY
Q54
2N7002-11-GP
PM_SLP_S3
PM_SLP_S3 8
2
1
5V_RUNPWR
S3_DY
Q53
2N7002-11-GP
Q52
2N7002A-7-GP
S3_DY
PM_SLP_S3
PM_SLP_S3#
G
S
PM_SLP_S3
-1 0114
For Discharge
38,40,41,42,43
ALL_PWRGD
1
R582
1
R581
2 0R2J-2-GP
DY
2
0R0402-PAD
-1 0107
1
2
3
Q37
2N7002-11-GP
PM_SLP_S3
DY
Q38
2N7002-11-GP
B
VCC
A
GND
SCD1U10V2KX-5GP
R605 1
0R0402-PAD
IMVP_VR_EN 38
-1 0107
74LVC1G08GW-1-GP
73.01G08.L04
2ND = 73.7SZ08.DAH
PM_SLP_S4# 16,31,33,41,43
S0_PWR_GOOD
C685
2
U69
33 S0_PWR_GOOD
DY
3D3V_RUNPWR 1
3D3V_S5
DY
PM_SLP_S4
Q19
2N7002-11-GP
R413
100KR2J-1-GP
16,38 CORE_PWRGD
CORE_RUNPWR 1
DY
DY
R535
100KR2J-1-GP
3D3V_S5
R422
100R2J-2-GP
1D5V_RUNPWR 1
1D5V_S3
DY
DY
DY
-1 0114
R254
100R2J-2-GP
PM_SLP_S3
R556
100R2J-2-GP
DY
DY
R567
100R2J-2-GP
DY
Q26
2N7002-11-GP
For Discharge
3D3V_S5
R278
100R2J-2-GP
0D75V_RUNPWR 1
DY
PM_SLP_S3
Q41
2N7002A-7-GP
R246
100R2J-2-GP
GFX_RUNPWR
DY
SA 0901: implement S3
power reduce, ASM
S3_DY
PM_SLP_S3
VCC_CORE
Q17
2N7002-11-GP
3D3V_S0
R443
22R2J-2-GP
1D8V_RUNPWR 1
VTT_RUNPWR
VCC_GFXCORE
5V_S0
S3_DY
Q10
2N7002-11-GP
PM_SLP_S3
DY
1D5V_S0
DY
Q16
2N7002-11-GP
SC 1211
R184
100R2J-2-GP
DY
1
R248
100R2J-2-GP
DY
0D75_S0
1D8V_S0
SC 1130 for S3 power reduction

1D05V_VTT
Run Power
R580
1
DY
R604 1
0R2J-2-GP
DY
PM_PWROK 16
IMVP_VR_EN
0R2J-2-GP
<Core Design>
Wistron Corporation
Title
36_Run PWR
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
36
of
58
<Core Design>
A
Wistron Corporation
Title
37_BLANK
Size
A3
Document Number
Date:
Rev
SA
LA46 MB
Sheet
37
of
58
PM_DPRSLPVR 7
ALL_PWRGD 36,40,41,42,43
IMVP_VR_EN 36
3 VR_CLKEN#
DCBATOUT_62883
H_VID[6..0]
H_VID0
2
LGATE1B 39
LGATE1
LGATE1 39
22
PHASE1
PHASE1 39
UGATE1
1
2
DY
1
2
1
2
1
2
1
2
1
2
1
2
DY
R592
R371
DY
R360
R354
1
2
1
2
1
2
1
2
R508
NTC-10K-27-GP
2
9K76R2F-1-GP
2
1
2
62883_VIN
1
2
1
2
20
19
18
17
16
VSUM-
VSUM- 39
NTC 10K close to Choke of Phase1
15
1
VSUM_RC 2
2
1
R349
1KR2J-1-GP
DY
R348
1KR2J-1-GP
DY
R338
1KR2J-1-GP
R591
1KR2J-1-GP
DY
R544
1KR2J-1-GP
R540
1KR2J-1-GP
DY
R333
1KR2J-1-GP
R537
1KR2J-1-GP
SC 1209
2
1K33R2F-GP
DY
1KR2J-1-GP
R364
0R2J-2-GP
DY
R532
1KR2J-1-GP
R356
R328
1KR2J-1-GP
1
R365
VSUM+ 39
R512
2K61R2F-1-GP
1KR2J-1-GP
C488
SCD01U50V2KX-1GP
C485
R530
1KR2J-1-GP
VSUM+
C486
R523
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
PM_DPRSLPVR
PSI#
1KR2J-1-GP
C651
SC1000P50V3JN-GP-U
SA 0916
1KR2J-1-GP
-1 0107
VSS_SENSE
R520
1KR2J-1-GP
R353
82D5R2F-1-GP
0R0402-PAD
R514
1KR2J-1-GP
C648
11KR2F-L-GP
C653
SC330P50V2KX-3GP
SCD22U25V3KX-GP
UGATE1
UGATE1 39
BOOT1
1
2 BOOT1_PHASE1
IMVP_IMON
R522
2D2R2F-GP
IMVP_IMON 7
DCBATOUT_62883
1 R525
2
0R0402-PAD
5V_S5
R228
C309
SCD033U25V3KX-GP
1
2
1R2F-GP
C647
R539
SCD22U16V3KX-2-GP
0R0402-PAD
1D05V_VTT
C646
-1 0107
SCD22U25V3KX-GP
SC390P50V2KX-GP
Intel support POC (power on current).
21
C645
1KR2J-1-GP
62883_VDD
ISEN1
1
2
SC1U10V2KX-1GP
7 VSS_SENSE
BOOT1
IMON
VIN
VDD
GND
ISUM+
41
PHASE1
ISUM-
C663
C654
SC330P50V2KX-3GP
C644
VSSP1
ISEN2
SC 1209
1
R545
-1 0107
2
FB2
1 R588
2
2K7R2F-GP
7 VCC_SENSE
LGATE2 39
1VSUM_RR
2
C681
262882_FB_VSEN1
2
1
R587
562R2F-GP
R518
0R0402-PAD
LGATE1A
LGATE1B
23
LGATE1B
FB
10
24
COMP
C664
SCD22U25V3KX-GP
31
62882_VCCP
1
R549
VID0
25
ISL62882HRTZ-T-GP
VSUM-
ISEN2
32
VCCP
62882_FB
VSUM-
ISEN1
39 ISEN2
VID1
33
VID2
34
VID3
35
VID4
37
38
36
VID5
VID6
VR_ON
LGATE2
62882_COMP
B
39 ISEN1
H_VID1
H_VID2
H_VID3
1
R561
62882_DPRSLPVR
1
R5501
62882_VR_ON
R5431
R547
62882_VID6
1
R541
62882_VID5
1
R538
62882_VID4
1
R533
62882_VID3
1
R531
62882_VID2
1
R524
62882_VID1
1
R521
62882_VID0
1
R517
39
40
CLK_EN#
LGATE2
26
VW
ISEN2
1
262882_COMP_R
1
2
C680
R586 412KR2F-GP
SC150P50V2JN-3GP
PHASE2 39
NTC
SC10P50V2JN-4GP
1
2
C657
SC22P50V2JN-4GP
PHASE2
27
SCD22U25V3KX-GP
62882_FB2
28
VSSP2
62882_VW
1
1
DY
R596
0R2J-2-GP
PHASE2
C672 SC1000P50V3JN-GP-U
C671
1
RBIAS
62882_NTC
62882_FB2
UGATE2 39
SC1U10V2KX-1GP
UGATE2
SC1U10V2KX-1GP
SCD01U50V2KX-1GP
1
2
R575
8K06R2F-GP
29
11
C676
UGATE2
RTN
DY
PSI#
VR_TT#
R595
62882_NTC_R 1
DY 2
NTC-470K-1-GP
1
2
BOOT2 39
DY
-1 0111
5V_S5
BOOT2
1
2
R600
4K02R2F-GP
TC24
SE100U25VM-11GP
-1 0126 BOM Change
-1 0107
30
VSEN
NTC 470K close to H/S MOSFET of Phase1
TC23
SE100U25VM-11GP
DY
BOOT2
PGOOD
ISEN1
7 PSI#
5 H_PROCHOT#
62882_PGOOD 1
0R0402-PAD
2 62882_PSI#
2
0R0402-PAD
2 62882_RBIAS 3
147KR2F-GP
4
2
62882_VSEN 12
-1 0107
1
R563
1
R564
1
R565
DPRSLPVR
U60
R579
1K91R2F-1-GP
1D05V_VTT
16,36 CORE_PWRGD
DCBATOUT
62882_CLK_EN#
2
3D3V_S0
R566
68R2-GP
DCBATOUT
DY
R562
1K91R2F-1-GP
13
GAP-CLOSE-PWR-2U-GP
62882_ISUM- 14
GAP-CLOSE-PWR-2U-GP
SA 0901
62882_RTN
GAP-CLOSE-PWR-2U-GP
G38
1
2
2
0R0402-PAD
2
0R0402-PAD
2
2 0R2J-2-GP
0R0402-PAD
2
0R0402-PAD
2
0R0402-PAD
2
0R0402-PAD
2
0R0402-PAD
2
0R0402-PAD
2
0R0402-PAD
2
0R0402-PAD
GAP-CLOSE-PWR-2U-GP
G39
1
2
H_VID4
H_VID6
3D3V_S0
GAP-CLOSE-PWR-2U-GP
G37
1
2
G36
1
H_VID5
G35
1
SCD033U16V3KX-GP
2
1
DCBATOUT
DCBATOUT_62883
VSUM_CR 2
DCBATOUT
C492
SCD1U25V3KX-GP
1
2
R366
0R0402-PAD
A
<Core Design>
-1 0107
Wistron Corporation
Title
38_ISL62882_CPU_CORE ( 1 of 2 )
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
38
of
58
4
SC 1210
SC - BOM change
10KR2F-2-GP
2
3K65R3F-GP
1
2
1
2
1
2
1
2
1
2
1
2
1
3
3K65R3F-GP
G19
GAP-CLOSE
TC16
+VCC_CORE_PHASE1
10KR2F-2-GP
PHASE1_R
TP73
TPAD40-GP
1
ISEN1
G21
GAP-CLOSE
7
6
2
1
5
4
3
TP69
TPAD40-GP
TC8
SE470UF2VDM-GP
DY
ST330U2VDM-4-GP
LGATE1_R
B
-1 0108
U32
BSB017N03LX3G-GP
S
S
G
38 ISEN2
SCD1U25V3KX-GP
D
D
D
D
38 VSUM-
SC4D7U25V5MX-1GP
VCC_CORE
SA 0829
38 VSUM+
C432
-1 0108
L24
1
2
L-D36UH-1-GP
1
R345
VSUM+
1
R528
VSUM1
R526
ISEN2
1
R344
C565
DY
-1 0126 BOM Change
38 ISEN1
C493
DY
SC4D7U25V5MX-1GP
C459
DY
SC4D7U25V5MX-1GP
6
5
2
1
C458
DY
SC4D7U25V5MX-1GP
SC4D7U25V5MX-1GP
D
D
D
D
C457
DCBATOUT_62883
-1 0108
UGATE1_R
38 LGATE1B
84.17N03.030
2ND = 84.06725.030
1 R290
2
0R0402-PAD
-1 0108
10KR2F-2-GP
38 PHASE1
38 LGATE1
TC5
DY
84.45N03.A30
2ND = 84.06721.030
SA 0916
Iomax=38A
OCP>60A
1R2F-GP
SA 0829
U36
BSF045N03LQ3G-GP
1
2
1
+VCC_CORE_PHASE2
SC 1210
SC - BOM change
38 UGATE1
2
ISEN1
38 ISEN1
VSUM-
38 VSUM-
PHASE2_R
1
R343
1
R529
1
R527
1
R342
VSUM+
38 VSUM+
1 R513
2
0R0402-PAD
1
2
6
5
2
1
ISEN2
38 ISEN2
7
6
2
1
5
4
3
TP70
TPAD40-GP
G20
GAP-CLOSE
TC20
SE330U2VDM-L-GP
S
S
G
G22
GAP-CLOSE
LGATE2_R
TC10
SE330U2VDM-L-GP
U33
BSB017N03LX3G-GP
84.17N03.030
2ND = 84.06725.030
C642
SCD22U25V3KX-GP
SCD1U25V3KX-GP
VCC_CORE
L23
1
2
L-D36UH-1-GP
2B00T2_R 1
1 R291
2
0R0402-PAD
C431
DY
UGATE2_R
1
38 LGATE2
C489
SE330U2VDM-L-GP
1
R519
2D2R2F-GP
C484
DY
-1 0126 BOM Change
D
D
D
D
38 BOOT2
C454
DY
SC4D7U25V5MX-1GP
DY
38 PHASE2
SA 0916
DCBATOUT_62883
SC4D7U25V5MX-1GP
1 R511
2
0R0402-PAD
38 UGATE2
-1 0108
SC4D7U25V5MX-1GP
84.45N03.A30
2ND = 84.06721.030
C455
SC4D7U25V5MX-1GP
D
D
D
D
U37
BSF045N03LQ3G-GP
C456
SC4D7U25V5MX-1GP
SA 0829
2
2
1R2F-GP
DY
<Core Design>
10KR2F-2-GP
Wistron Corporation
Title
39_ISL62882_CPU_CORE ( 2 of 2 )
Size
A3
Document Number
Date:
Rev
-1
LA46 MB DIS
Sheet
39
of
58
5
DCBATOUT
DCBATOUT
DCBATOUT_51123_5V
G110
1
2
3D3V_PWR
3D3V_S5
G61
1
5V_PWR
5V_S5
G53
2
1
GAP-CLOSE-PWR-2U-GP
G108
1
2
GAP-CLOSE-PWR-2U-GP
G57
1
2
GAP-CLOSE-PWR-2U-GP
GAP-CLOSE-PWR-2U-GP
GAP-CLOSE-PWR-2U-GP
G58
1
2
51123_ENTIP2
C477
SC18P50V2JN-1-GP
GAP-CLOSE-PWR-2U-GP
G54
1
2
51123_ENTIP1
R337
150KR2F-L-GP
DY
GAP-CLOSE-PWR-2U-GP
G111
1
2
R341
150KR2F-L-GP
DY
GAP-CLOSE-PWR-2U-GP
G64
1
2
C478
SC18P50V2JN-1-GP
GAP-CLOSE-PWR-2U-GP
G63
1
2
GAP-CLOSE-PWR-2U-GP
G114
1
2
GAP-CLOSE-PWR-2U-GP
G65
1
2
GAP-CLOSE-PWR-2U-GP
G115
1
2
GAP-CLOSE-PWR-2U-GP
G67
1
2
GAP-CLOSE-PWR-2U-GP
G62
1
2
GAP-CLOSE-PWR-2U-GP
G112
1
2
GAP-CLOSE-PWR-2U-GP
G113
1
2
GAP-CLOSE-PWR-2U-GP
G59
1
2
GAP-CLOSE-PWR-2U-GP
G66
1
2
GAP-CLOSE-PWR-2U-GP
G60
1
2
GAP-CLOSE-PWR-2U-GP
G55
1
2
GAP-CLOSE-PWR-2U-GP
GAP-CLOSE-PWR-2U-GP
DCBATOUT
24
51123_VO1
51123_FB1
23
51123_PGOOD
51123_ENTIP1
3D3V_AUX_S5
2
R379
0R2J-2-GP
2
DY
R375
0R2J-2-GP
Close to VFB Pin (pin5)
R347
0R2J-2-GP
C472
SC18P50V2JN-1-GP
DY
1
2
TC13
ST220U6D3VDM-20GP
C497
B
R346
30K9R2F-GP
51125_FB1_R
SC -BOM change for 5.1V
DY
G107
2
5V_AUX_S5
1
2
Id=7.7A
Qg=8.5~13nC
Rdson=16.5~21mohm
TPAD14-GP
R373
0R0402-PAD
TPS51123RGER-GP
-1 0107
1
R351
1
R374
0R2J-2-GP
ALL_PWRGD 36,38,41,42,43
R330
20KR2F-L-GP
GAP-CLOSE-PWR-3-GP
PWM_RSMRST# 16
0R2J-2-GP
DY
Close to VFB Pin (pin2)
SB 1029 Reserve for SW requirement

S5_ENABLE 33,36
C666
C483
C667
Vout=2*(1+R1/R2)
SC22U6D3V5MX-2GP
2
DY
R378
0R2J-2-GP
TP76
SC 1209
SC10U6D3V5MX-3GP
51123_VREF
51123_VCLK 1
18
GAP-CLOSE-PWR-3-GP
175mA
25
DY
ENC
G56
SKIPSEL
U71
SIS412DN-T1-GE3-GP
GND
5
6
7
8
TONSEL
5V_PWR
L16
1
2
IND-3D3UH-57GP
15
VREG5
GND
G52
SC4D7U6D3V5KX-3GP
1
R327
0R2J-2-GP
VREF
5V_AUX_S5_51123
1
2
3D3V_AUX_S5
2
DY
R334
0R2J-2-GP
TRIP1
3D3V_AUX_S5
51123_VREF
PGOOD
TRIP2
VREG3
14
EN0
17
51123_SKIPSEL
VFB1
VFB2
3D3V_AUX_S5_5_51123 8
51125_FB2_R
DY C470
SC18P50V2JN-1-GP
51123_TONSEL
VO1
2
5
6
7
8
51123_DRVL1
4
3
2
1
19
1
2
VIN
DRVL1
VO2
1 2
R322
0R2J-2-GP
1
1
2
LL1
51123_LL1
Iomax=6A
OCP=9A
-1 0126 BOM Change
4
3
2
1
S
S
S
G
1
2
3
4
S
S
S
G
1
2
3
4
51123_FB2
5
1 R376
2
DCBATOUT
249KR2F-GP
1
2 51123_EN 13
R377 100KR2F-L1-GP
51123_ENTIP2 6
51123_VREF
51123_VREF
3
SCD22U6D3V2KX-1GP
R335
10KR2F-2-GP
51123_DRVH1
20
C
-1 0112
SCD1U10V2KX-5GP
C469
DY
21
U70
SB 1026 delete G68
R329
6K65R2F-GP
16
DRVL2
1
2
8
7
6
5
D
D
D
D
8
7
6
5
12
DRVH1
TC26
GAP-CLOSE-PWR-3-GP
LL2
51123_DRVL2
VBST1
51123_VBST1
S
S
S
G
11
C491
SCD1U25V3KX-GP
-1 0107
1 R362
251123_VBST1_R 1
2
0R0603-PAD
22
D
D
D
D
DY
51123_LL2
D
D
D
D
C496
SIS412DN-T1-GE3-GP
ST220U6D3VDM-20GP
TC14
SCD1U10V2KX-5GP
1
2
IND-3D3UH-57GP
-1 0108
C682
ST5D6U25VBM-1-GP
L17
U67
SIS412DN-T1-GE3-GP
C691
DY
SCD1U25V3KX-GP
-1 0114
C490
-1 0107
SCD1U25V3KX-GP
2
151123_VBST2_R 1 R361
251123_VBST2 9 VBST2
0R0603-PAD
51123_DRVH2
10 DRVH2
3D3V_PWR
C690
DY
S
S
S
G
U45
SA 0829
SC4D7U25V5MX-1GP
U66
SIS412DN-T1-GE3-GP
C495
SCD01U50V2KX-1GP
DY
SC4D7U25V5MX-1GP
SC10U25V5KX-GP
Iomax=6A
OCP=9A
C665
SA 0829
D
D
D
D
SC4D7U25V5MX-1GP
-1 0108
SC 1210
SC - BOM change
C689
DY
2
C688
SC4D7U25V5MX-1GP
DCBATOUT_51123_5V
SC 1210
SC - BOM change
DY
SCD1U25V3KX-GP
-1 0112
C683
TC25
DCBATOUT_51123_3D3V
1 2
-1 0126 BOM Change
ST5D6U25VBM-1-GP
DCBATOUT_51123_3D3V
G109
1
2
GND
SKIPSEL
AUTOSKIP
VREF
PWM
VREG3
00A AUTOSKIP
VREG5
00A AUTOSKIP
<Core Design>
TONSEL
200k/CH1
250k/CH2
245k/CH1
305k/CH2
300k/CH1
375k/CH2
365k/CH1
460k/CH2
Wistron Corporation
Title
40_TPS51123_5V/3D3V
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
40
of
58
G2
2
DCBATOUT_7141_1D5V
SA 0901
1
2
11
EN/DEM
TON
CS
VOUT
PGOOD
GND
PGND
NC#15
3
6
7
8
15
RT8209EGQW-GP
5
6
7
8
R1
30KR2F-GP
7141_VFB
R5
10KR2F-2-GP
74.08209.B73
4
3
2
1
2
R6
0R0402-PAD
C4
DY
R7
30KR2F-GP
C56
-1 0107
SB 1029 change to
84.00460.037
Freq=300KHz
RT8209E for 1D05V

DCBATOUT_RT8209B_1D05V
1D05V_PWR
DCBATOUT_RT8209B_1D05V
-1 0108
SC 1210
SC - BOM change
3D3R3J-L-GP
C439
1
1
2
Iomax=8A
OCP=12A
RT8209EGQW-GP
4
3
2
1
-1 0107
2
RT8209B_VFB
U43
BSZ115N03MSC-G-GP
DY 10KR2F-2-GP
R308
75KR2F-GP
3D3V_S0
SB 1029 change to
64.15025.6DL
C445
ALL_PWRGD 36,38,40,42,43
R312
R307
15KR2F-GP
DY
DY
1
1
2
R313
0R0402-PAD
R306
30KR2F-GP
1D05V_PWR
RT8209B_PGOOD
3
6
7
8
15
SA 0909
VOUT
PGOOD
GND
PGND
NC#15
1
2
IND-1UH-98-GP
C425
1D05V_PWR
GAP-CLOSE-PWR-2U-GP
G28
1
2
TC12
GAP-CLOSE-PWR-2U-GP
G29
1
2
SE330U2VDM-L-GP
DY
EN/DEM
TON
CS
RT8209B_LL
S
S
S
G
C435
SCD1U10V2KX-5GP
RT8209B_EN_PSV 1
RT8209B_TON
2
RT8209B_TRIP 11
12
L15
SCD1U10V2KX-5GP
-1 0107
1 R300
2
200KR2F-L-GP
PHASE
RT8209B_DRVH
RT8209B_DRVL
SC33P50V2JN-3GP
1
2
R296
0R0402-PAD
PM_SLP_S3#
FB
BOOT
13
9
D
D
D
D
5,16,31,33,36,42,43,44
UGATE
LGATE
4
3
2
1
RT8209B_VFB
5
RT8209B_VBST 14
VDD
VDDP
5
6
7
8
4
10
B0530WS-7-F-GP
GAP-CLOSE-PWR-2U-GP
G27
1
2
-1 0126 BOM Change
U42
DY D8
SCD1U25V3KX-GP
GAP-CLOSE-PWR-2U-GP
G23
1
2
RT8209B_LL_1
S
S
S
G
GAP-CLOSE-PWR-2U-GP
GAP-CLOSE-PWR-2U-GP
G26
1
2
5
6
7
8
C438
SC1U10V2KX-1GP
1
1
2
1
R298
C444
SCD1U25V3KX-GP
U39
SI7716ADN-T1-GE3-GP
RT8209B_V5FILT
C434
SC4D7U25V5MX-1GP
5V_S5
D
D
D
D
GAP-CLOSE-PWR-2U-GP
G31
1
2
SA 0829
R299
10R3F-GP
SC4D7U25V5MX-1GP
C453
SC1U10V2KX-1GP
GAP-CLOSE-PWR-2U-GP
G32
1
2
C443
GAP-CLOSE-PWR-2U-GP
G25
1
2
GAP-CLOSE-PWR-2U-GP
G33
1
2
1D05V_S0
G24
5V_S5
G34
1
TC1
Vout=0.75V*(R1+R2)/R2
DCBATOUT
TC3
DY
Panasonic 220uF 2V
ESR=15mOhm
Iripple=2.7A
ALL_PWRGD 36,38,40,42,43
2
R23
6K8R2F-2-GP
U15
SIR460DP-T1-GE3-GP
DY
3D3V_S0
1
R14
249KR2F-GP
1D5V_S3
7141_PGOOD
S
S
S
G
C8
SCD1U10V2KX-5GP
D
D
D
D
1
2
IND-1UH-80-GP
68.1R01B.10A
7141_EN_PSV
7141_TON
7141_TRIP
-1 0107
1
2
R15
0R0402-PAD
L20
3D3R3J-L-GP
SA 0901
7141_LL
12
PHASE
FB
BOOT
5
14
2 7141_DRVH_R
7141_VFB
7141_VBST
7141_DRVH
7141_DRVL
SE220U2VDM-8GP
13
9
SE220U2VDM-8GP
UGATE
LGATE
SCD1U10V2KX-5GP
VDD
VDDP
SC33P50V2JN-3GP
4
10
D12
B0530WS-7-F-GP
1D5V_S3
R22
U5
DY
16,31,33,36,43 PM_SLP_S4#
4
3
2
1
SCD1U25V3KX-GP
3D3R3J-L-GP
Iomax=12A
OCP=18A
C526
1
7141_LL_1
S
S
S
G
C35
2
R17
C504
SC1U10V2KX-1GP
5V_S5
C30
U16
SIR474DP-T1-GE3-GP
7141_V5FILT
GAP-CLOSE-PWR-2U-GP
1
1
2
1
GAP-CLOSE-PWR-2U-GP
G5
1
2
SA 0829
R390
2D2R3-1-U-GP
SCD1U25V3KX-GP
C27
SC4D7U25V5MX-1GP
C518
SC1U10V2KX-1GP
SC4D7U25V5MX-1GP
GAP-CLOSE-PWR-2U-GP
G4
1
2
-1 0108
SC 1210
5V_S5
GAP-CLOSE-PWR-2U-GP
G3
1
2
5
6
7
8
RT8209E for 1D5V
DCBATOUT_7141_1D5V
D
D
D
D
5
DCBATOUT
GAP-CLOSE-PWR-2U-GP
G30
1
2
GAP-CLOSE-PWR-2U-GP
Panasonic330uF 2.5V
ESR=9mOhm
Iripple=3A
SB 1029 change to 84.11503.037
Freq=300KHz
Vout=0.75V*(R1+R2)/R2
<Core Design>
Wistron Corporation
Title
41_RT8209E_1D5V / RT8209E_1D05V
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
41
of
58
DCBATOUT
DCBATOUT_RT8209B_VCCP
G40
1
+VCCP_PWR
GAP-CLOSE-PWR-2U-GP
G41
1
2
GAP-CLOSE-PWR-2U-GP
GAP-CLOSE-PWR-2U-GP
G43
1
2
GAP-CLOSE-PWR-2U-GP
G93
1
2
DCBATOUT_RT8209B_VCCP
GAP-CLOSE-PWR-2U-GP
G100
1
2
Iomax=18A
OCP=27A
R548
PM_SLP_S3#
PHASE
EN/DEM
TON
CS
VOUT
PGOOD
GND
PGND
NC#15
12
RT8209B_VCCP_LL
3
6
7
8
15
R615
24KR2F-GP
SA 0829
1
2
1
2
1
2
RT8209B_VCCP_VFB
DY
SB-BOM change to
79.33719.20L
+VCCP_PWR
RT8209EGQW-GP
GAP-CLOSE-PWR-2U-GP
G97
1
2
GAP-CLOSE-PWR-2U-GP
G102
1
2
VTT_PWRGD
GAP-CLOSE-PWR-2U-GP
G95
1
2
GAP-CLOSE-PWR-2U-GP
G101
1
2
Vout=0.75*(1+R1/R2)
R546
5K76R2F-2-GP
GAP-CLOSE-PWR-2U-GP
VTT_PWRGD 5,33
RT8209B_VCCP_VFB
GAP-CLOSE-PWR-2U-GP
G94
1
2
GAP-CLOSE-PWR-2U-GP
G99
1
2
FB
BOOT
5
6
7
8
UGATE
LGATE
RT8209B_VCCP_DRVH
RT8209B_VCCP_DRVL
4
3
2
1
DY
RT8209B_VCCP_VFB
5
RT8209B_VCCP_VBST
14
2
0R2J-2-GP
VCCP_RUN ON 1
2
0R2J-2-GP
1 R613
2 RT8209B_VCCP_TON
2
200KR2F-L-GP RT8209B_VCCP_TRIP 11
5,16,31,33,36,41,43,44
1
R589
1
R590
VDD
VDDP
13
9
1 2
2
A
ALL_PWRGD
U65
DY
R614
SCD1U25V3KX-GP
3D3R3J-L-GP
4
10
K
36,38,40,41,43
U34
TPCA8028-H-GP
GAP-CLOSE-PWR-2U-GP
G90
1
2
TC9
ST330U2VDM-4-GP
C693
SC1U10V2KX-1GP
C655
RT8209B_VCCP_LL_1 1
10KR2F-2-GP
D22
B0530WS-7-F-GP
RT8209B_VCCP_V5FILT
TC21
ST330U2VDM-4-GP
R570
C637
SCD1U10V2KX-5GP
R618
10R3F-GP
C696
SC18P50V2JN-1-GP
1
2
L-D36UH-1-GP
68.R3610.20A
S
S
S
G
DY
Vout=1.1054(Cal)
D
D
D
D
C652
5V_S5 SC1U10V2KX-1GP
GAP-CLOSE-PWR-2U-GP
G104
1
2
+VCCP_PWR
L25
1
2
3D3R3J-L-GP
5V_S5
GAP-CLOSE-PWR-2U-GP
G103
1
2
4
3
2
1
GAP-CLOSE-PWR-2U-GP
G98
1
2
-1 0126 BOM Change
S
S
S
G
GAP-CLOSE-PWR-2U-GP
GAP-CLOSE-PWR-2U-GP
G96
1
2
C446
5
6
7
8
D
D
D
D
U35
TPCA8030-H-GP
GAP-CLOSE-PWR-2U-GP
G42
1
2
C461
SC4D7U25V5MX-1GP
C448
SC4D7U25V5MX-1GP
GAP-CLOSE-PWR-2U-GP
G45
1
2
-1 0108
SC 1210
SCD1U25V3KX-GP
GAP-CLOSE-PWR-2U-GP
G44
1
2
1D05V_VTT
G91
RT8209E for 1D05V_VTT
1
R616
DY
2
0R2J-2-GP
VTT_SENSE 7
Freq=360KHz
<Core Design>
Wistron Corporation
Title
42_RT8209E_1D05V_VTT
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
42
of
58
Iomax=1.1A
RT9025
for 1D8V_S0
3D3V_S5
G13
1
GAP-CLOSE-PWR-2U-GP
G14
1
2
C261
SC1U6D3V2KX-GP
C281
SC10U6D3V5MX-3GP
DY
5V_S5
C280
SC10U6D3V5MX-3GP
GAP-CLOSE-PWR-2U-GP
G15
1
2
1D8V_LDO
GAP-CLOSE-PWR-2U-GP
G16
1
2
RT9025-25PSP-GP
9025_ADJ
1
74.09025.03D
R216
R188
14K3R2F-GP
1
2
GAP-CLOSE-PWR-2U-GP
C226
DY
DY 10KR2F-2-GP
C225
3D3V_S0
9025_PGOOD
1 R217
2
0R0402-PAD
36,38,40,41,42 ALL_PWRGD
C232
R189
DY
18KR2F-GP
2
GND
5
6
7
8
1D8V_S0
SC10U6D3V5MX-3GP
DY
NC#5
VOUT
ADJ
GND
SC10U6D3V5MX-3GP
C275
SCD1U10V2KX-5GP
VDD
VIN
EN
PGOOD
SC100P50V2JN-3GP
4
3
2
1
-1 0107
U24
9025_EN
1 R218
2
0R0402-PAD
PM_SLP_S3#
Vo(cal.)=1.8069V
5,16,31,33,36,41,42,44
Vo=0.8*((R1+R2)/R2)
-1 0107
5V_S5
Iomax=1.2A
1D5V_S3
U55
-1 0107
C562
SCD1U10V2KX-5GP
DY
S3_DY
RT9026PFP-GP
74.09026.079
G74
1
GAP-CLOSE-PWR-2U-GP
G75
1
2
GAP-CLOSE-PWR-2U-GP
G76
1
2
C556
SC10U6D3V5MX-3GP
GND
C561
SC1U10V2KX-1GP
0D75_S0
DDR_VREF_PWR
GAP-CLOSE-PWR-2U-GP
1
R449
0R2J-2-GP
1
2
3
4
5
11
B
5 CPU_VDDQ_PWRGD
DDR_VREF_S3
VIN
VDDQSNS
S5
VLDOIN
GND
VTT
S3
PGND
VTTREF VTTSNS
SC 1130
9026_S3
R451
0R2J-2-GP
PM_SLP_S3#
5,16,31,33,36,41,42,44
10
9
8
7
6
9026_S5
1 R450
2
0R0402-PAD
1 S3
2
16,31,33,36,41 PM_SLP_S4#
C559
C557
SC10U6D3V5MX-3GP
SCD1U10V2KX-5GP
C560
SC1U6D3V2KX-GP
RT9026 for 0D75V_S3
C558
SC10U6D3V5MX-3GP
SA 0901: LC require to reserve
<Core Design>
Wistron Corporation
Title
43_RT9025_1D8V/ RT9026_0D75
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
43
of
58
5
2
C675
SCD1U25V3KX-GP
2
1
R598
DY
1
R584
DCBATOUT
2
0R2J-2-GP
GAP-CLOSE-PWR-2U-GP
G50
1
2
-1 0108
GFX_VR_EN_62881
2
0R0402-PAD
2
0R0402-PAD
1
R608
2
0R0402-PAD
8 GFX_DPRSLPVR
-1 0108
SC 1210
VID2
1
2
1
2
-1 0126 BOM Change
GAP-CLOSE-PWR-2U-GP
G89
1
2
GAP-CLOSE-PWR-2U-GP
G78
1
2
17
62881_PHASE
15
62881_UGATE
2
L26
IND-D56UH-22-GP
68.R5610.10J
+VGFXCORE_PWR
U41
TPCA8019-H-GP-U
GAP-CLOSE-PWR-2U-GP
G86
1
2
C650
SCD22U16V3KX-2-GP
2 62881_BOOT_1
2D2R2F-GP
C248
SCD022U16V2KX-3GP
GAP-CLOSE-PWR-2U-GP
G80
1
2
4
3
2
1
1
R542
GAP-CLOSE-PWR-2U-GP
G81
1
2
GFX_IMON 8
GAP-CLOSE-PWR-2U-GP
G82
1
2
SB 1026 change to 78.22321.2FL
SB 1026 delete G105, G106
VSS_AXG_SENSE 8
DCBATOUT_62881
R625
10R3F-GP
1
R509
NTC-10K-9-GP
G17
GAP-OPEN-PWR
2
SA 0911
G18
GAP-OPEN-PWR
C674
SCD1U25V3KX-GP
SB-BOM change to 64.28015.6DL
GAP-CLOSE-PWR-2U-GP
2
2KR2F-3-GP
62881_ISUM+_3
SB-BOM change
to 78.33322.2FL
2
2K8R2F-GP
GAP-CLOSE-PWR-2U-GP
G85
1
2
TC19
ST330U2VDM-4-GP
1
R573
11KR2F-L-GP
1
R585
TC22
ST330U2VDM-4-GP
C673
SCD01U25V2KX-3GP
1
R551
GAP-CLOSE-PWR-2U-GP
G84
1
2
R510
2K61R2F-1-GP
R628
10R3F-GP
62881_ISUM+_1
DY R572
0R2J-2-GP
-1 0108
C669
2
0R0402-PAD
SA 0909
1
1
R610
C668
8 VSS_AXG_SENSE
R571
82D5R2F-1-GP
2
0R0402-PAD
1
R627
C679
SC1KP50V2KX-1GP
SCD22U10V2KX-1GP
8 VCC_AXG_SENSE
1
2
R369
1R2F-GP
C494
SCD22U25V3KX-GP
1
C662
SC1U10V2KX-1GP
2
C678
SC330P50V2KX-3GP
SA 0829
-1 0108
GAP-CLOSE-PWR-2U-GP
G83
1
2
5V_S5
C692
SC330P50V2KX-3GP
1 R370
2
0R0402-PAD
GAP-CLOSE-PWR-2U-GP
G79
1
2
5
6
7
8
16
R198
19K6R2F-GP
2
R372
0R0402-PAD
GAP-CLOSE-PWR-2U-GP
G88
1
2
Iomax=15A
OCP>23A
G87
1
GFX_I
SA 0829
BOOT
IMON
+VGFXCORE_PWR VCC_GFXCORE
62881_VIN
SC1U10V2KX-1GP
14
13
VDD
VIN
12
11
ISUM+
10
62881_LGATE
VID3
VID4
VID5
VID6
22
23
24
25
26
28
DPRSLPVR
VR_ON
ISUM9
RTN
SB-BOM change to
64.73215.6DL
62881_VCCP
62881_BOOT
62881_VDD
R619
820KR2F-GP
1 R368
2
0R0402-PAD
1
2
R599
7K32R2F-GP
62881_ISUM+
C698
SC100P50V2JN-3GP
R617
C697
17K8R2F-GP SC100P50V2JN-3GP
2
UGATE
GND
62881_RTN
262881_FB_1 1
VSEN
C649
1
2
19
C462
S
S
S
G
262881_VSEN_11
VSSP
PHASE
C684
SC15P50V2JN-2-GP
ISL62881HRTZ-T-GP
FB
62881_ISUM-
2
1
DY
LGATE
20
18
C566
DY
D
D
D
D
29
27
1
2
1
1
2
62881_VSEN7
2
R620
0R2J-2-GP
VW
COMP
GAP-CLOSE-PWR-2U-GP
SCD1U50V3KX-GP
VCCP
C467
SC4D7U25V5MX-1GP
62881_FB
VID0
RBIAS
62881_COMP
PGOOD
C695
SC1KP50V2KX-1GP
5V_S0
R603
8K06R2F-GP
1 R536
2
0R0402-PAD
21
62881_RBIAS
2
47KR2F-GP
62881_VW
-1 0108
VID1
62881_PGOOD
1
R612
CLK_EN#
U40
TPCA8021-H-GP
SA 0911
C463
SC4D7U25V5MX-1GP
U61
SC4D7U25V5MX-1GP
-1 0108
R611
10KR2F-2-GP
SA 0826
DCBATOUT_62881
SA 0829
1
3D3V_S0
GAP-CLOSE-PWR-2U-GP
G47
1
2
62881_VR_ON
62881_DPRSLPVR
R609
4K7R2J-2-GP
GAP-CLOSE-PWR-2U-GP
G48
1
2
-1 0110
DY
GAP-CLOSE-PWR-2U-GP
G49
1
2
GFX_VID3
GFX_VID2
GFX_VID1
GFX_VID0
-1 0108
8 GFX_VR_EN
1
R597
1
R593
GAP-CLOSE-PWR-2U-GP
G51
1
2
GFX_VID6
GFX_VID5
GFX_VID4
DY
4K7R2J-2-GP
DCBATOUT_62881
G46
5,16,31,33,36,41,42,43 PM_SLP_S3#
SCD033U25V2KX-GP
GFX_VID[6..0] 8
VSS_AXG_SENSE_OUTCAP
VCC_AXG_SENSE_OUTCAP
<Core Design>
Wistron Corporation
Title
44_ISL62881_+VCC_GFXCORE
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
44
of
58
5
DCBATOUT
DCBATOUT_62872_VGA_CORE
ISL62872 FOR VGA_CORE_PWR
G6
1
GAP-CLOSE-PWR-2U-GP
G7
1
2
5V_S0
GAP-CLOSE-PWR-2U-GP
G8
2
GAP-CLOSE-PWR-2U-GP
G9
2
R393
2D2R3-1-U-GP
GAP-CLOSE-PWR-2U-GP
1
2
1
2
1
2
8
1
2
5
6
7
8
3D3V_S0_NV
1
2
TC2
S
S
S
G
U13
TPCA8019-H-GP-U
4
3
2
1
R394
10KR2F-2-GP
R384
18K7R2F-GP
TC15
11
10
L19
1
2
IND-D56UH-22-GP
68.R5610.10J
62872_OCSET
62872_VO
62872_FB
ISL62872HRUZ-T-GP
62872_SET2
C520
262872_BOOT_R 1
2 SCD22U25V3KX-GP
2R3F-GP
R408
1
20
1
LGATE
PVCC
PGOOD
SET2
62872_VCC
62872_BOOT
62872_UGATE
62872_PHASE
2
1
19
18
17
16
15
14
13
12
VCC
BOOT
UGATE
PHASE
NC#15
OCSET
VO
FB
ST330U2VDM-4-GP
PGND
GND
EN
VID1
VID0
SREF
SET0
SET1
ST330U2VDM-4-GP
2
3
4
5
6
7
8
9
VGA_CORE_S0
D
D
D
D
SCD1U50V3KX-GP
U48
R380
20D5R2F-1-GP
10KR2J-3-GP
DGPU_PWROK
DIS
62872_AGND
R382
1
GAP-CLOSE-PWR
3D3V_S0_NV
SCD068U10V2KX-1GP
SA 0623
Iomax=15A
OCP=23A
62872_AGND
MCP_CORE_VID1_R
MCP_CORE_VID0_R
62872_SREF
62872_SET0
62872_SET1
C500
GFX_D
C31
62872_LGATE
G1
62872_AGND
U14
TPCA8021-H-GP
C567
SC4D7U25V5MX-1GP
SC1U16V3KX-2GP
C28
SC4D7U25V5MX-1GP
62872_PVCC
C29
SC4D7U25V5MX-1GP
C503
1
C509
SCD1U10V2KX-4GP
SC1U16V3KX-2GP
GAP-CLOSE-PWR-2U-GP
C508
SC 1210
R385
0R0603-PAD
DCBATOUT_62872_VGA_CORE
G10
1
SB 1026 delete G11
19,50,51
VGA power sequence modify

1
C499
SCD1U25V3KX-GP
R389
31K6R2F-GP
R404
1
262872_FB_C
1
2
C519
SC1KP50V2JN-2GP
100R2F-L1-GP-U
DIS
SA 0909
1
2
R391
294KR2F-1-GP
1
R402
41K2R2F-GP
1
R399
24K9R2F-L-GP
1
2
R409
4K53R2F-1-GP
1
2
C521
SCD1U25V2KX-GP
2
1
2
R403
4K53R2F-1-GP
62872_AGND
3D3V_S5
3
4
SA 0911
RN2
2
1
SRN100KJ-6-GP
66.10436.04L
For 40nm GPU the Core and GPIO5/6 relationship as below:
U2
55 NVVDD_ALTV0
MCP_CORE_VID1_R
MCP_CORE_VID0_R
NVVDD_ALTV1
1
DMN66D0LDW-7-GP
84.DMN66.03F
2ND = 84.27002.F3F
SA 0912 change part
55
GPIO6/VID1
0
0
1
1
GPIO5/VID0
0
1
0
1
Core
0.83V
0.88V
0.93V
1.03V
SB 1031 R380 Change to 64.20R55.6DL

R384 Change to 64.18725.6DL
R389 Change to 64.31625.6DL
to rise up VGA voltage for NV suggestion.
<Core Design>
Wistron Corporation
Title
45_ISL62872_VGA_CORE
Size
Document Number
Custom
Date:
Rev
-1
LA46 MB DIS
Sheet
45
of
58
NEAR
AD+
SA 0829
U47
S
S
S
G
D
D
D
D
1
2
3
4
DCBATOUT
BT+
8
7
6
5
R387
100KR2J-1-GP
SI7129DN-T1-GE3-GP
AD+_TO_SYS
1
2
3
4
AD+
D01R2512F-4-GP
R407
1
U49
S
S
S
G
D
D
D
D
8
7
6
5
AD+_G_2
NC#16
16
VFB
15
2
4
3
2
1
SCD1U50V3KX-GP
1
2
1
2
C525
C524
1
2
2
1
2
1
U7
SIS412DN-T1-GE3-GP
C523
C527
CHG_AGND
BATT_SENSE
BATT_SENSE 47
MAX8731A_CSIP
MAX8731A_CSIN
C32
SCD1U25V2ZY-1GP
74.24745.073
CHG_AGND
C14
SC10U25V6KX-1GP
CHG_AGND
C13
SC10U25V6KX-1GP
R26
1
2
0R0402-PAD
CHG_AGND
BQ24745RHDR-GP
GND
FBO
EAI
EAO
VREF
CE
GND
29
6
BQ24745_EAI
5
BQ24745_EAO
4
BQ24745_VREF
3
BQ24745_CHG_ON 7
12
C502
SC1U10V3KX-3GP
2BQ24745_FBO
4K7R2J-2-GP
1
R8
1
C33
2
C34
SCD1U25V2ZY-1GP
C12
SCD1U50V3KX-GP
17
VICM
G71
SC10U25V6KX-1GP
CSOP
CSON
G72
SC10U25V6KX-1GP
19
18
SC10U25V6KX-1GP
PGND
SC10U25V6KX-1GP
D01R2512F-4-GP
GAP-CLOSE-PWR
1
2
C5
SC56P50V2JN-2GP
BT+_R
GAP-CLOSE-PWR
NC#14
S
S
S
G
1
2
IND-5D6UH-39-GP
68.5R610.10P
24745_LOW_G
D
D
D
D
CHG_AGND
BQ24745_IINP
C2
R11
SC2200P50V2KX-2GP
7K5R2F-1-GP
2
1BQ24745_EAO_RC 2
1
5
6
7
8
C24
SCD1U50V3KX-GP
BQ24745_LX1
LGATE
20
R392
1
23
BT+
L18
PHASE
83.R0203.08F
2nd = 83.R2003.A8M
24745_HIGH_G
1
SDA
SC1U10V3KX-3GP
24
CH520S-30PT-GP
UGATE
-1 0107 ASM for EMI
BQ24745_BST
BQ24745_VDDP
C18
SCD1U25V2ZY-1GP
33,47 BAT_SDA
25
21
C533
1
C17
SCL
BOOT
VDDP
D14
C517
10
C19
SC1U10V3KX-3GP
33,47 BAT_SCL
BQ24745_CSSN
TP1
ACOK
27
26
S
S
S
G
VDDSMB
CSSP
CSSN
ICOUT
C516
4
3
2
1
ACIN
U4
SIS412DN-T1-GE3-GP
C3
C11
SC220P50V2KX-3GP
CHG_AGND
28
5
6
7
8
DCIN
BQ24745_ACIN
13
BQ24745_FBO_RC
R13
1
2
200KR2F-L-GP
SCD1U50V3KX-GP
SC4D7U25V5MX-1GP
22
SC150P50V2JN-3GP
2
-1 0108
SC 1210
SC4D7U25V5MX-1GP
BQ24745_DCIN
14
SC4D7U25V5MX-1GP
U6
CHG_AGND
1 R16
2
0R0402-PAD
1
2
CHG_AGND
BQ24745_ACOK
C9
SCD1U50V3KX-GP
SCD1U50V3KX-GP
CHG_AGND
SC 1211
Q35
BQ24745_VREF
BQ24745_CHG_ON
R650
4
3
3D3V_AUX_S5
RN20
1
2
AC_IN#
BQ24745_CHG_ON
C506
SCD1U10V2KX-4GP
AC_OK
DY
CHG_ON#
AC_IN#
1
DMN66D0LDW-7-GP
2ND = 84.27002.F3F
84.DMN66.03F
SRN100KJ-6-GP
66.10436.04L
AC_IN#
C505
SC1U10V3KX-3GP
33
33
AC_IN# to KBC
R649
3D3V_AUX_S5
AC_OK
100KR2J-1-GP
CHG_ON#
2
100KR2J-1-GP
2
33 AD_IA
D
D
D
D
AC_OK 1
R20 2
0R0402-PAD
DCBATOUT
C512
C507
2
1 BQ24745_CSSP
11
C6
SCD01U50V2KX-1GP
K
1
1
SC1U25V5KX-1GP
R12
49K9R2F-L-GP
GAP-CLOSE-PWR
R386
470KR2J-2-GP
C532
3D3V_AUX_S5
GAP-CLOSE-PWR
83.00400.C1F
2nd = 83.1S400.A2F
G70
AD+
R9
309KR3F-GP
AC_OK
2
3
Q31
DMN66D0LDW-7-GP
84.DMN66.03F
2ND = 84.27002.F3F
DC_IN_D
6
G69
D13
1SS400GPT-GP
SB 1016 change
84.DMN66.03F
ICREF
AD+_G_1
R381
10KR2F-2-GP
C501
SCD1U25V2ZY-1GP
SI7129DN-T1-GE3-GP
AD+
R388
49K9R2F-L-GP
SB 1016 change to
84.DMN66.03F
<Core Design>
Wistron Corporation
Title
46_BQ24745_CHARGER
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
46
of
58
4
1
AFTE14P-GP AFTP139
AFTE14P-GP AFTP132
1
1
DC1
7
Adaptor in to generate DCBATOUT

AFTE14P-GP
AFTE14P-GP
TP4
TP3
AD+
1
2
3
4
A
B
1
2
1
E
C
R411
100KR2J-1-GP
Q30
B
R1
R2
PDTC124EU-1-GP
C529
SC1U50V5ZY-1-GP
PDTA124EU-1-GP
33 AD_OFF
8
7
6
5
R648
34K8R2F-1-GP
D
D
D
D
SI7129DN-T1-GE3-GP
R410
200KR2F-L-GP
Q36
AD_OFF#_JK
AD AD
AD+_2
U50
S
S
S
G
C568
SCD1U50V3ZY-GP
2
1
20.F0735.006
AD_DETECT 33
ACES-CON6-3GP
SCD1U50V3ZY-GP
1
2
D15
P6SBMJ24APT-GP
R1
EC11 C522
R2
R638
200KR2F-L-GP
AD
SCD1U50V3KX-GP
AD_JK
1
2
3
4
5
6
84.00124.H1K
2ND = 84.00124.M1K
SC 1210, BOM change
C
SA 0820
SB 1016 change to 20.81323.007
BATTERY CONNECTOR
AFTP8
AFTE14P-GP
BTY1
RN6
SRN33J-7-GP
4
3
2
1
33 BAT_IN#
33,46 BAT_SDA
33,46 BAT_SCL
9
7
6
5
4
3
2
BAT_IN#_1
BATA_SDA_1
BATA_SCL_1
5
6
7
8
1
8
2
2
46 BATT_SENSE
1
2
1
2
1
2
1
2
EC16
DY
SC10P50V2JN-4GP
EL2
DY
MLVS0402M04-GP
-1 0107 ASM for EMI
EL1
DY
MLVS0402M04-GP
EL3
MLVS0402M04-GP
EC18
SC1000P50V3JN-GP-U
EC5
SC1000P50V3JN-GP-U
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
D1
MMPZ5232BPT-GP-U
EC1
EC17
ALP-CON7-21-GP
SC10P50V2JN-4GP
EC2
BT+
20.81323.007
AFTE14P-GP AFTP137
-1 0107 ASM for EMI

R28
1
2
0R0402-PAD
AFTP136 AFTE14P-GP
AFTP7
AFTE14P-GP
AFTP138 AFTE14P-GP
1
1
1
BAT_IN#_1
BATA_SDA_1
BATA_SCL_1
<Core Design>
Wistron Corporation
Title
47_AD / BATT_CONN
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
47
of
58
H3
HOLE315X315R91-S1-GP
H2
HOLE237R95-GP
ZZ.00PAD.921
H4
HOLE276R178-GP
H5
ZZ.00PAD.581
H6
HT75X825B9X9R24-S-GP
H7
HT75X825B9X9R24-S-GP
ZZ.00PAD.C91
1
SPRING1
SPRING-15-GP
ZZ.00PAD.C91
34.43E25.001
ZZ.00PAD.581
-1 0116
ZZ.00PAD.N11
SC 1130 Remove H2
-1 0110
H9
HT8BE75R24-U-45-GP
H10
STF217R128H83-1-GP
H11
HOLE276R178-GP
34.4Y702.101
H12
HOLE276R178-GP
ZZ.00PAD.N11
H13
HOLE276R178-GP
ZZ.00PAD.N11
ZZ.00PAD.N11
ZZ.00PAD.951
SC 1209
SB 1016 change to
ZZ.00PAD.951
ZZ.00PAD.951
SC 1130 CHECK, H6,H7 change to ZZ.00PAD.C91
H8
HT8BE75R24-U-45-GP
1
1
ZZ.00PAD.921
SB
H1
HOLE237R95-GP
SB 1016 change to
34.4Y702.101
C
34.4GV09.001
H16
H17
HOLE237R95-GP
34.4GV07.001
GNDPAD2
GNDPADS197X138-NP
ZZ.00PAD.ZZZ
SB 1016 change
to ZZ.00PAD.951
SB 1016 change to
34.4Y702.101
GNDPAD4
GNDPADS197X138-NP
ZZ.00PAD.ZZZ
ZZ.00PAD.ZZZ
ZZ.00PAD.ZZZ
GNDPAD3
GNDPADS197X138-NP
34.4Y702.101
GNDPAD1
GNDPADS197X138-NP
ZZ.00PAD.951
34.4GV08.001
1
ZZ.00PAD.921
SB 1016 change to
34.4GV08.001
H23
STF237R117H201-2-GP
H20
STF237R113H63-1-GP
H19
HOLE237R95-GP
ZZ.00PAD.921
SB 1016 change to
34.4GV09.001
SB 1016 change to
34.4GV07.001
H18
HOLE237R95-GP
ZZ.00PAD.921
ZZ.00PAD.581
H22
STF217R128H83-1-GP
34.4GV07.001
H21
HT8BE75R24-U-45-GP
H15
STF237R117H201-1-GP
H14
STF237R117H201-2-GP
SB 1019 Add GND PAD

SB 1016 Add 34.4GV07.001
SC 1211 For RF
DCBATOUT
DCBATOUT
1
2
1
2
1
2
EC36
SCD1U25V2ZY-1GP
ZZ.00PAD.ZZZ
GNDPADSR236
SB 1021 Add GNDPADSR236
EC35
-1 0107 ASM for EMI

1D5V_S0
SB 1021 Add ZZ.00PAD.911
3D3V_S0
<Core Design>
EC37
SC33P50V2JN-3GP
EC38
SC33P50V2JN-3GP
-1 0116
A
Wistron Corporation
ZZ.00PAD.911
SCD1U25V2ZY-1GP
C710
SC33P50V2JN-3GP
EC34
C709
SC33P50V2JN-3GP
DCBATOUT
5V_S5
SCD1U25V2ZY-1GP
5V_S0
H24
HOLE315R95-GP
H25
GNDPADSR236

Title
48_EMI/Spring/Boss
Size
A3
Document Number
Date:
Rev
-1
LA46 MB DIS
Sheet
48
of
58
SB 1016 Add AFTE
Near KB1 Keyboard

AFTP28
AFTP39
AFTP43
AFTP46
AFTP25
AFTP24
AFTP41
AFTP31
AFTP36
AFTP23
AFTP48
AFTP40
AFTP44
AFTP49
AFTP47
AFTP45
AFTP34
AFTP35
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
AFTP29
AFTP30
AFTP42
AFTP33
AFTP32
AFTP37
AFTP27
AFTP38
AFTP26
AFTP22
KROW[8..1]
33
KCOL[16..1]
33
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
1
1
1
1
1
1
1
1
1
1
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
KB_LED_1 33
KB_LED_2 33
KCOL17_Q 33
KCOL18_Q 33
Near FAN1
5V_S0
11 FAN_PWM_C
11 FAN_TACH
AFTE14P-GP AFTP143
1
1
AFTE14P-GP AFTP141
AFTE14P-GP AFTP142
AFTE14P-GP AFTP140
Near RTC1
RTC_BAT
AFTE14P-GP AFTP186
AFTE14P-GP AFTP183
Near CRT_CN1
5V_CRT_S0
AFTE14P-GP AFTP127
23,25 CRT_RED
23,25 CRT_GREEN
23,25 CRT_BLUE
1
1
1
AFTE14P-GP AFTP135
AFTE14P-GP AFTP134
AFTE14P-GP AFTP133
25 CRT_VSYNC1
25 CRT_HSYNC1
1
1
AFTE14P-GP AFTP129
AFTE14P-GP AFTP128
25 CLK_DDC1_5
25 DAT_DDC1_5
1
1
AFTE14P-GP AFTP131
AFTE14P-GP AFTP130
AFTE14P-GP AFTP124
Near HDMI_CN1
5V_S0
26 HDMI_TXC26 HDMI_TXC+
26 TDMS_A_CLK
26 TDMS_A_DAT
26 HDMI_A_HPD_CN
AFTE14P-GP AFTP154
1
1
1
1
1
1
1
1
1
1
1
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP AFTP153
AFTP157
AFTP155
AFTP151
AFTP150
AFTP146
AFTP149
AFTP145
AFTP144
AFTP148
AFTP147
AFTP152
<Core Design>
A
Wistron Corporation
Title
49_AFTE_TP
Size
A3
Document Number
Date:
Rev
-1
LA46 MB DIS
Sheet
49
of
58
AO4468, SO-8
Id=11.6A, Qg=9~12nC
Rdson=17.4~22m ohm
1
2
0R2J-2-GP
DIS
DY
AO4468-GP
DIS 84.04468.037
2nd = 84.04800.D37
DGPU_PWROK 19,45,51
C166
DIS
1
2
C582
SC1U10V2ZY-GP
DIS
74.09091.G3F
DIS
SC1U10V2ZY-GP
C576
G9091-180T11U-GP
DY
3D3V_S0_NV
1D8V_S0_NV
C573
SCD1U10V2KX-4GP
RUN_POWER_ON
1
R643
0R2J-2-GP
U25
S
S
S
G
D
D
D
D
3.6A
1
2
3
4
AO4468-GP
DIS
DIS 84.04468.037
2nd = 84.04800.D37
NDS0610-NL-GP
RUNON_S
RUNON_R
DIS
G
SC 1208
NV suggest to use 200K, need check
8
7
6
5
C164
2ND = 84.00610.C31
84.S0610.B31
Q13
1D8V_S0_NV = IFPA_IOVDD & IFPB_IOVDD, it

should be the latest ramp up rail.
1
2DIS_EN_1D5_RUN_R
R211
330KR2J-L1-GP
R212
DIS
100KR2J-1-GP
R199
330KR2J-L1-GP
2
DIS
2
DIS
DIS_EN_1D5_RUN
Q15
2N7002A-7-GP
DIS
DGPU_PWROK_R
84.2N702.E31
2ND = 84.2N702.D31
C701
SCD01U16V2KX-3GP
DIS
1
R227
0R2J-2-GP
19,45,51 DGPU_PWROK
DIS
1028 SB add for VGA power on sequence
+3VS to 3.3V_DELAY Transfer
SA 0830
2
1
DGPU_3D3V_EN
DY
Q5
2N7002-11-GP
DY
Q11
2N7002-11-GP
DY
Q39
2N7002-11-GP
DY
Q46
2N7002-11-GP
DGPU_3D3V_EN
DGPU_3D3V_EN
DGPU_3D3V_EN
DGPU_3D3V_EN
S
G
S
84.2N702.E31
2ND = 84.2N702.D31
G
1
C703
SC1U6D3V2KX-GP
D
R474
100KR2J-1-GP
Q48
2N7002A-7-GP
DIS
84.2N702.E31
2ND = 84.2N702.D31
19 DGPU_PWR_EN#
DGPU_PWR_EN
DIS
DY
Q47
2N7002A-7-GP
DIS
2
DY
1
2
C702 1028 SB add for 3D3V_S0 Voltage drop

SCD01U16V2KX-3GP
DIS
3D3V_S0
R473
100KR2J-1-GP
DIS
G
R462
100R2J-2-GP
DY
3D3V_S0
DIS
DIS
84.2N702.E31
2ND = 84.2N702.D31
R85
100R2J-2-GP
DY
NV_1D8V_RUNPWR
DGPU_3D3V_DIS
Q43
2N7002A-7-GP
R194
100R2J-2-GP
DY
1
DIS
R434
100R2J-2-GP
NV_VGA_RUNPWR
1D8V_S0_NV
NV_FBV_RUNPWR
Q44
AO3413-GP
R461
470R2J-2-GP
1
FBVDD
NV_1D05V_RUNPWR 1
VDDR3discharge CKT
1D05V_S0_NV
3D3V_S0_NV
VGA_CORE_S0
3.3v (580mA)
DIS
DGPU_PWROK_TO1D8V
1
2
3
4
5
VIN
GND
EN
NC#4
VOUT
C158
SC10U6D3V3MX-GP
1D05V_S0_NV
SA 0902
4.3A
1
2
3
4
SCD1U16V2KX-3GP
U57
R460
U20
S
S
S
G
D
D
D
D
check layout
SC10U6D3V3MX-GP
8
7
6
5
+1.05V to +1.05V_NV Transfer

1D05V_S0
+3VS to 1.8V Transfer

D
FBVDD
1D5V_S3
I=300mA
+1.5V to FBVDD Transfer
SB 1016 change to
84.2N702.E31
SC 1208
NV suggest to ASM 1uF, need check
<Core Design>
Wistron Corporation
system turn on 3D3V_S0_NV --> VGA_CORE_S0

DGPU_PWROK --> FBVDD, 1D05V_S0_NV, 1D8V_S0_NV

Title
50_NV power
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
50
of
58
PEG_TXP6
PEG_TXN6
PEG_RXP7
PEG_RXN7
AE18
AF18
1
DIS
1
DIS
PEG_TXP7
PEG_TXN7
PEG_RXP8
PEG_RXN8
1
DIS
1
DIS
1
DIS
1
DIS
AE24
AF24
2 C168 SCD1U10V2KX-5GP PEX_TXP14AD23

2 C169 SCD1U10V2KX-5GP PEX_TXN14AD24
1
DIS
1
DIS
2 C170 SCD1U10V2KX-5GP PEX_TXP15AE25

2 C171 SCD1U10V2KX-5GP PEX_TXN15AE26
AG24
AF25
PEG_TXP15
PEG_TXN15
AG25
AG26
AF27
AE27
PEX_RX9
PEX_RX9#
PEX_TX10
PEX_TX10#
PEX_RX10
PEX_RX10#
VDD_SENSE
GND_SENSE
VDD_SENSE
GND_SENSE
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
PEX_SVDD_3V3
PEX_RX11
PEX_RX11#
TP21 TPAD14-GP
TP20 TPAD14-GP
1
1
TP22 TPAD14-GP
TP19 TPAD14-GP
A12
B12
C12
D12
E12
F12
120mA
SA 0824
C118
DIS
AG9
120mA
C96
Uner
GPU
PEX_PLLVDD
AF9
DIS
C126
DIS
C104
PEX_TX14
PEX_TX14#
DIS
PEX_RX14
PEX_RX14#
PEX_TERMP
1
2
1
1
NV_RST#
GND
AG10
3D3V_S0_NV
C102
DIS
C122
DIS
Uner GPU
Near GPU
1D05V_S0_NV
L5
DIS
1
2
HCB1608KF-181-GP
C106
DIS
PEX_TX15
PEX_TX15#
PEX_RX15
PEX_RX15#
Near
GPU
PEX_PLLVDD
120mA
PEX_RX13
PEX_RX13#
1
2
1
1
TP79
TP80
PEX_RX12
PEX_RX12#
PEX_TX13
PEX_TX13#
2
1
2
1
2
1
2
1
2
TP77
TP78
E15
E14
PEX_TX12
PEX_TX12#
1
2
1
2
1
2
1
1
W15
W16
3D3V_S0_NV
PEX_TX11
PEX_TX11#
VCC
A
3D3V_S0_NV
DIS
68.00214.051
C111
DIS
SC4D7U6D3V3KX-GP
1
DIS
1
DIS
PEX_TX9
PEX_TX9#
SC4D7U6D3V3KX-GP
2 C163 SCD1U10V2KX-5GP PEX_TXP13AC22

PEX_RX8
PEX_RX8#
DIS
73.01G08.L04
2ND = 73.7SZ08.DAH
SC1U6D3V2KX-GP
1
DIS
1
DIS
PEG_TXP14
PEG_TXN14
PEG_RXP15
PEG_RXN15
2 C172 SCD1U10V2KX-5GP PEX_TXP12AB21

2 C173 SCD1U10V2KX-5GP PEX_TXN12AB22
PEX_TX8
PEX_TX8#
Under GPU
74LVC1G08GW-1-GP
SC4D7U6D3V3KX-GP
1
DIS
1
DIS
PEX_RX7
PEX_RX7#
SCD1U10V2KX-5GP
AF22
AE22
PEG_TXP13
PEG_TXN13
PEG_RXP14
PEG_RXN14

2 C162 SCD1U10V2KX-5GP PEX_TXN11AC21
PEX_TX7
PEX_TX7#
SCD1U10V2KX-5GP
1
DIS
1
DIS
PEX_RX6
PEX_RX6#
5,18,29,31,33,35 PLT_RST#
SCD1U10V2KX-5GP
AG21
AG22
PEG_TXP12
PEG_TXN12
PEG_RXP13
PEG_RXN13

PEX_TX6
PEX_TX6#
U19
1
SCD1U10V2KX-5GP
1
DIS
1
DIS
PEG_TXP11
PEG_TXN11
PEG_RXP12
PEG_RXN12
2 C156 SCD1U10V2KX-5GP PEX_TXP9 AB19

2 C157 SCD1U10V2KX-5GP PEX_TXN9 AB20
AE21
AF21
PEG_TXP10
PEG_TXN10
PEG_RXP11
PEG_RXN11
2 C153 SCD1U10V2KX-5GP PEX_TXP8 AC18

AF19
AE19
PEG_TXP9
PEG_TXN9
PEG_RXP10
PEG_RXN10
2 C148 SCD1U10V2KX-5GP PEX_TXP7 AD17

2 C151 SCD1U10V2KX-5GP PEX_TXN7 AD18
AG18
AG19
PEG_TXP8
PEG_TXN8
PEG_RXP9
PEG_RXN9
2 C144 SCD1U10V2KX-5GP PEX_TXP6 AC16

PEX_RX5
PEX_RX5#
DIS
C141
1
DIS
1
DIS
C123
R77
0R2J-2-GP
1
19 DGPU_HOLD_RST#
PEG_RXP6
PEG_RXN6
AF16
AE16
PEX_TX5
PEX_TX5#
DY
PEG_TXP5
PEG_TXN5
PEX_RX4
PEX_RX4#
AG15
AG16
19,45,50 DGPU_PWROK

PEX_TX4
PEX_TX4#
PEG_RXP5
PEG_RXN5
PEX_RX3
PEX_RX3#
1
DIS
1
DIS
PEG_TXP4
PEG_TXN4
PEX_TX3
PEX_TX3#
DIS

2 C138 SCD1U10V2KX-5GP PEX_TXN4 AC15
PEX_RX2
PEX_RX2#
15690mA
1
DIS
1
DIS
PEX_TX2
PEX_TX2#
AE15
AF15
DIS
C130
PEG_RXP4
PEG_RXN4

DIS
VGA_CORE_S0
1
DIS
1
DIS
PEG_TXP3
PEG_TXN3
DIS
SA-0820
PEG_RXP3
PEG_RXN3
AF13
AE13
PEX_RX1
PEX_RX1#
DIS
Near GPU
J10
J12
J13
J9
L9
M11
M17
M9
N11
N12
N13
N14
N15
N16
N17
N19
N9
P11
P12
P13
P14
P15
P16
P17
R11
R12
R13
R14
R15
R16
R17
R9
T11
T17
T9
U19
U9
W10
W12
W13
W18
W19
W9
PEG_TXP2
PEG_TXN2

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
DIS
PEX_TERMP
1
AG12
AG13
1
DIS
1
DIS
1
2
PEG_RXP2
PEG_RXN2
PEX_TX1
PEX_TX1#
PEG_TXP1
PEG_TXN1
DIS
C117
PEX_RX0
PEX_RX0#
AE12
AF12
DIS
SC4D7U10V3KX-GP

2 C120 SCD1U10V2KX-5GP PEX_TXN1 AC12
DIS
C145
SC10U6D3V3MX-GP
1
DIS
1
DIS
PEX_TX0
PEX_TX0#
DIS
C140
SC10U6D3V3MX-GP
PEG_RXP1
PEG_RXN1
DIS
PEX_REFCLK
PEX_REFCLK#
C115
SC1U6D3V2KX-GP
PEG_TXP0
PEG_TXN0

C110
SC1U6D3V2KX-GP
4 PEG_TXP[15..0]
4 PEG_TXN[15..0]
1
DIS
1
DIS
C105
2
1
C139
SCD1U10V2KX-5GP
PEG_RXP0
PEG_RXN0
DIS
1D05V_S0_NV
SCD1U10V2KX-5GP
AB10
AC10
15 CLK_PCIE_PEG
15 CLK_PCIE_PEG#
4 PEG_RXP[15..0]
4 PEG_RXN[15..0]
DIS
C142
SCD01U16V2KX-3GP
PEX_RST#
DIS
C128
SCD047U16V2KX-1-GP
AD9
DIS
SCD047U16V2KX-1-GP
PEX_RST#
2
0R0402-PAD-1-GP
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#
DIS
SCD047U16V2KX-1-GP
1
R62
AF10
AE10
DIS
C109
SCD01U16V2KX-3GP
NV_RST#
N11M_PEX_TSTCLK_OUT
N11M_PEX_TSTCLK_OUT#
DIS
C127
SCD01U16V2KX-3GP
1
1
DIS
C113
SCD01U16V2KX-3GP
TP94
TP18
AB13
AB16
AB17
AB7
AB8
AB9
AC13
AC7
AD6
AE6
AF6
AG6
Under GPU
C114
SCD01U16V2KX-3GP
TPAD14-GP
TPAD14-GP
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
VGA_CORE_S0
SCD01U16V2KX-3GP
SA 0822
C132
SC10U6D3V3MX-GP
PEX_CLKREQ#
C103
C135
SC10U6D3V3MX-GP
AE9
C121
Near GPU
SC1U6D3V2KX-GP
DIS
2200mA
PEX_CLKREQ
15 PEX_CLKREQ
C94
SC1U6D3V2KX-GP
C93
SCD1U10V2KX-5GP
R47
1D05V_S0_NV
Under GPU
AC9
AD7
AD8
AE7
AF7
AG7
1 OF 12
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
DY 10KR2J-3-GP
SA 0820
1/12 PCI_EXPRESS
PEX_CLKREQ#
is OD.
SCD1U10V2KX-5GP
VGA1A
3D3V_S0_NV
A3? 71.0N11M.C0U
N11M-GE1-S-A2-GP
R81
2K49R2F-GP
DIS
DIS
2
A
<Core Design>
Wistron Corporation
Title
51_N11M(1/6)_PEG
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
51
of
58
4
VGA1B
2/12 FRAME_BUFFER
FBVDD
D25
A18
E18
B24
R22
Y24
AA27
R27
FBA_DEBUG/CAS2
DIS
DIS
F26
J24
F25
M23
N27
M27
K26
J25
J27
G23
G26
J23
M25
K27
G25
L24
K23
K24
G22
K25
H22
M26
H24
F27
J26
G24
G27
M24
K22
J22
L22
FBA_CMD_151
FBA_CMD_0 57
FBA_CMD_1 57,58
FBA_CMD_2 57
FBA_CMD_3 57,58
FBA_CMD_4 57,58
FBA_CMD_5 57,58
FBA_CMD_6 57,58
FBA_CMD_7 57,58
FBA_CMD_8 57,58
FBA_CMD_9 57,58
FBA_CMD_10 57,58
FBA_CMD_11 58
FBA_CMD_12 57,58
FBA_CMD_13 57,58
FBA_CMD_14 57,58
TP24 TPAD14-GP
FBA_CMD_231
FBA_CMD_16 58
FBA_CMD_17 57,58
FBA_CMD_18 57,58
FBA_CMD_19 57,58
FBA_CMD_20 57,58
FBA_CMD_21 57,58
FBA_CMD_22 57,58
TP25 TPAD14-GP
F24
F23
N24
N23
FBA_CLK0
FBA_CLK0#
FBA_CLK1
FBA_CLK1#
M22
FBA_DEBUG
FBA_CMD_24
FBA_CMD_25
FBA_CMD_26
FBA_CMD_27
FBA_CMD_28
FBA_CMD_29
FBA_CMD_30
DIS
DIS
C161
C563
C150
C137
1
2
1
2
DIS
C125
DIS
SC4D7U6D3V3KX-GP
FBADQSN0
FBADQSN1
FBADQSN2
FBADQSN3
FBADQSN4
FBADQSN5
FBADQSN6
FBADQSN7
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
DIS
C160
SCD047U16V2KX-1-GP
57
57
57
57
58
58
58
58
C25
A19
E19
A24
T22
AA24
AA26
T27
FBA_CLK0
FBA_CLK0#
FBA_CLK1
FBA_CLK1#
C564
SCD047U16V2KX-1-GP
FBADQSP0
FBADQSP1
FBADQSP2
FBADQSP3
FBADQSP4
FBADQSP5
FBADQSP6
FBADQSP7
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
A13
B13
C13
D13
D14
E13
F13
F14
F15
F16
F17
F19
F22
H23
H26
J15
J16
J18
J19
L19
L23
L26
M19
N22
U22
Y22
SCD047U16V2KX-1-GP
57
57
57
57
58
58
58
58
C26
B19
D19
D23
T24
AA23
AB27
T26
1.72A
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
SCD01U16V2KX-3GP
FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
SCD01U16V2KX-3GP
D22
E24
E22
D24
D26
D27
C27
B27
A21
B21
C21
C19
C18
D18
B18
C16
E21
F21
D20
F20
D17
F18
D16
E16
A22
C24
D21
B22
C22
A25
B25
A26
U24
V24
V23
R24
T23
R23
P24
P22
AC24
AB23
AB24
W24
AA22
W23
W22
V22
AA25
W27
W26
W25
AB25
AB26
AD26
AD27
V25
R25
V26
V27
R26
T25
N25
N26
SCD01U16V2KX-3GP
FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63
58 FBAD[32..63]
57
57
57
57
58
58
58
58
57 FBAD[0..31]
SA 0916 SWAP
RN18
FBA_CMD_16
FBA_CMD_28
FBA_CMD_0
FBA_CMD_25
4
3
2
1
FBA_CMD_27
5
6
7
8
SRN10KJ-6-GP
DIS
R84
2
10KR2J-3-GP
DIS
57,58
57
57,58
58
57,58
57,58
57,58
FBA_CLK0 57
FBA_CLK0# 57
FBA_CLK1 58
FBA_CLK1# 58
FBA_CLK0 and FBA_CLK0_N + FBA_D[31:0]

FBA_CLK1 and FBA_CLK1_N * FBA_D[63:32]
TP23 TPAD14-GP
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
B
FBVDD
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
B15
FBCAL_PD_VDDQ
A15
FBCAL_PU_GND
B16
FBCAL_TERM_GND
1
RT1
2
2
To compute the drive strength of

the frame buffer pads.
40D2R2F-GP
2
60D4R2F-GP
CHECK
40D2R2F-GP
DIS
1
RT2
DIS
1
R452
DIS
Termination Calibration
R580
N10M use 60.4 ohm 64.60R45.6DL
N10P use 40.2 ohm 64.40R25.6DL
FB_VREF
A16
FB_VREF
FB_DLLAVDD
T19
C146
AC19
N11M-GE1-S-A2-GP
DIS
DIS
DIS
C149
SC4D7U6D3V3KX-GP
FB_PLLAVDD
FB_PLLAVDD
SC1U6D3V2KX-GP
input
R19
TP95
TPAD14-GP
1D05V_S0_NV
FB_PLLAVDD
CHECK
3
2 OF 12
1
2
DIS
FCM1608KF-221T05-GP
L7
68.00217.741
100mA
16~12mils
A
<Core Design>
Wistron Corporation
Title
52_N11M(2/6)_MEM
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
52
of
58
3 OF 12
VGA1C
3/12 DACA
3D3V_S0_NV
L3
DACA_VREF
DACA_RSET
AE1
DACA_RSET
R51
124R2F-U-GP
Set Reference
Current
AD2
AD1
DACA_RED
AE2
NV_CRT_RED 23
DACA_GREEN
AE3
NV_CRT_GREEN 23
DACA_BLUE
AD3
NV_CRT_BLUE 23
DIS
3.3V
DACA_HSYNC
DACA_VSYNC
N11M-GE1-S-A2-GP
DIS
NV_CRT_HSYNC
NV_CRT_VSYNC
25
25
DACA_VDD
AF1
R50
150R2F-1-GP
R49
150R2F-1-GP
R48
150R2F-1-GP
DIS
DIS
DIS
2
AG2
DACA_VREF
1
2
DIS
DACA_VDD
1
2
1
2
DIS
C71
SCD1U10V2KX-5GP
DIS
C75
SC470P50V2KX-3GP
DIS
C76
SC4700P50V2KX-1GP
DIS
C79
SCD1U10V2KX-5GP
DIS
C78
SCD1U10V2KX-5GP
DIS
C77
SCD1U10V2KX-5GP
DIS
C80
SC1U6D3V2KX-GP
C74
SC4D7U6D3V3KX-GP
68.00217.741
DIS
1
2
FCM1608KF-221T05-GP
120mA
4 OF 12
VGA1D
4/12 DACB
C
W5
DACB_VDD
R6
DACB_VREF
V6
DACB_RSET
DACB_VDD
R68
10KR2J-3-GP
DIS
DACB_HSYNC
DACB_VSYNC
U6
U4
DACB_RED
T5
DACB_GREEN
T4
DACB_BLUE
R4
N11M-GE1-S-A2-GP
DIS
<Core Design>
Wistron Corporation
Title
53_N11M(3/6)_DAC
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
53
of
58
IFPA_TXD0#
IFPA_TXD0
IFPAB_PLLVDD
IFPAB_RSET
IFPA_TXD2#
IFPA_TXD2
Y4
W4
GPU_TXAOUT2- 23
GPU_TXAOUT2+ 23
IFPA_TXD3#
IFPA_TXD3
AB5
AB4
TXAOUT3TXAOUT3+
1
1
TP12
TP10
TPAD14-GP
TPAD14-GP
IFPB_TXD4#
IFPB_TXD4
V1
W1
GPU_TXBOUT0- 1
GPU_TXBOUT0+ 1
TP85
TP84
TPAD14-GP
TPAD14-GP
IFPB_TXD5#
IFPB_TXD5
W2
W3
GPU_TXBOUT1- 1
GPU_TXBOUT1+ 1
TP110 TPAD14-GP
TP7
TPAD14-GP
IFPB_TXD6#
IFPB_TXD6
AA3
AA2
GPU_TXBOUT2- 1
GPU_TXBOUT2+ 1
TP6
TPAD14-GP
TP111 TPAD14-GP
IFPB_TXD7#
IFPB_TXD7
AA1
AB1
TXBOUT3TXBOUT3+
TP83
TP82
C551
C555
DIS
IFPA_TXC#
IFPA_TXC
AD4
AC4
IFPB_TXC#
IFPB_TXC
AB2
AB3
B
150mA V3
V2
150mA
SCD1U10V2KX-5GP
DIS
IFPA_IOVDD
Set Reference
Current
DIS
1
1
TPAD14-GP
TPAD14-GP
B4
B3
IFPD_L2#
IFPD_L2
C4
C3
IFPD_L1#
IFPD_L1
D5
E4
IFPD_L0#
IFPD_L0
F4
F5
GPIO19
F2
DIS
CLOCK
Display Port
TP5
TP9
1
1
TPAD14-GP
TPAD14-GP
8 OF 12
VGA1H
8/12 IFPE
IFPEF_PLLVDD
N1
D7
F8
GPIO0
GPU_TXBCLKGPU_TXBCLK+
DIS
IFPE_PLLVDD
IFPE_RSET
R65
10KR2J-3-GP
Set Reference
Current
Display Port
IFPE_AUX_I2CY_SDA#
IFPE_AUX_I2CY_SCL
G6
F7
IFPE_L3#
IFPE_L3
E7
E6
IFPE_L2#
IFPE_L2
B7
B6
IFPE_L1#
IFPE_L1
A7
A6
IFPE_L0#
IFPE_L0
C6
D6
GPIO15
F3
6/12 IFPC
IFPCD_PLLVDD P6
IFPC_RSET
R5
R72
1KR2F-3-GP
Set Reference
Current
J4
H4
J6
IFPC_L2#
IFPC_L2
K4
L4
IFPC_L2#
IFPC_L2
IFPC_L1#
IFPC_L1
M4
M5
IFPC_L1#
IFPC_L1
IFPC_L0#
IFPC_L0
N4
P4
IFPC_IOVDD
C95
1
2
1
2
DIS
IFPC_L3#
IFPC_L3
DIS
SCD1U10V2KX-5GP
C98
SCD1U10V2KX-5GP
DIS
SC1U6D3V2KX-GP
SC4D7U6D3V3KX-GP
DIS
C92
G5
G4
NV_HDMI_DATA 26
NV_HDMI_CLK 26
IFPEF_IOVDD
285mA IFPCD_IOVDD
C91
NV_HDMI_DATA
NV_HDMI_CLK
IFPC_AUX_I2CW_SDA#
IFPC_AUX_I2CW_SCL
GPIO1
G1
IFPC_L3#
IFPC_L3
2
SCD1U10V2KX-5GP
2
SCD1U10V2KX-5GP
2
SCD1U10V2KX-5GP
2
SCD1U10V2KX-5GP
2
SCD1U10V2KX-5GP
2
SCD1U10V2KX-5GP
2
SCD1U10V2KX-5GP
2
SCD1U10V2KX-5GP
DIS C62 1
DIS C61
1
DIS C63 1
DIS C64
1
DIS C66 1
DIS C65
IFPC_L0#
1
IFPC_L0
DIS C67 1
DIS C68
NV_HDMI_DETECT
NV_HDMI_CLKNV_HDMI_CLK+
NV_HDMI_CLK- 26
NV_HDMI_CLK+ 26
NV_HDMI_DATA0- 26
NV_HDMI_DATA0+ 26
NV_HDMI_DATA1- 26
NV_HDMI_DATA1+ 26
NV_HDMI_DETECT
H6
IFPE_IOVDD
DIS
2
DIS
IFPC_PLLVDD
IFPC_RSET
1
2
SCD1U10V2KX-5GP
DIS
C554
SCD1U10V2KX-5GP
DIS
C552
SCD1U10V2KX-5GP
DIS
C101
SC1U6D3V2KX-GP
DIS
C550
SC4D7U6D3V3KX-GP
C549
220mA
R71
10KR2J-3-GP
N11M-GE1-S-A2-GP
DIS
DIS
2
L21
1
2
FCM1608KFG-301T05-GP
6 OF 12
VGA1F
3D3V_S0_NV
GPU_TXACLK- 23
GPU_TXACLK+ 23
DIS
NV_HDMI_DATA2- 26
NV_HDMI_DATA2+ 26
26,33
N11M-GE1-S-A2-GP
DIS
SA 0916 SWAP
SA 0825 Add
RN60
NV_HDMI_DATA0+
NV_HDMI_DATA0NV_HDMI_CLKNV_HDMI_CLK+
1
2
3
4
8
7
6
5
NV_HDMI_R
DIS
3D3V_S0_NV
SRN499F-GP
RN12
SRN4K7J-8-GP
R55
100KR2J-1-GP
DIS
Q40
2N7002A-7-GP
R56
100KR2J-1-GP
R435
0R2J-2-GP
DY
DIS
DIS
2
84.2N702.E31
2ND = 84.2N702.D31
2
2
DY
3D3V_S0_NV
DIS
SRN499F-GP
R438
100KR2J-1-GP
8
7
6
5
1
2
NV_HDMI_DATA
NV_HDMI_CLK
1
1
NV_HDMI_DETECT
1
2
3
4
DIS
NV_HDMI_DATA1+
NV_HDMI_DATA1NV_HDMI_DATA2NV_HDMI_DATA2+
4
3
RN11
68.00217.741
DIS
IFPD_L3#
IFPD_L3
N11M-GE1-S-A2-GP
N11M-GE1-S-A2-GP
1D05V_S0_NV
L4
1
2
FCM1608KF-221T05-GP
D4
D3
IFPB_IOVDD
IFPAB_HPD
68.00217.351
DIS
IFPD_AUX_I2CX_SDA#
IFPD_AUX_I2CX_SCL
SB 1015 change TP
IFPD_PLLVDD
IFPD_RSET
R67
1KR2F-3-GP
DIS
C553
SCD1U10V2KX-5GP
DIS
N6
M6
DATA
SC1U6D3V2KX-GP
C575
7/12 IFPD
IFPCD_PLLVDD
IFPD_RSET
GPU_TXAOUT1- 23
GPU_TXAOUT1+ 23
7 OF 12
VGA1G
220mA
AA4
AA5
Set Reference
Current
IFPAB_IOVDD
SC4D7U6D3V3KX-GP
68.00143.061
DIS
GPU_TXAOUT0- 23
GPU_TXAOUT0+ 23
IFPA_TXD1#
IFPA_TXD1
1D8V_S0_NV
L22
1
2
BLM18PG181SN1D-GP
V4
V5
DIS
AD5
AB6
R69
1KR2F-3-GP
DY
2
DIS
C90
1
2
IFPAB_PLLVDD
IFPAB_RSET
SC1U6D3V2KX-GP
C97
SC4D7U6D3V3KX-GP
68.00143.061
DIS
220mA
1
Display Port
5 OF 12
5/12 IFPAB
1D05V_S0_NV
L6
1
2
BLM18PG181SN1D-GP
LVDS
VGA1E
Direct HDMI Connection

<Core Design>
Wistron Corporation
Title
54_N11M(4/6)_IFP
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
54
of
58
D9
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST#
AF3
AF4
AG4
AE4
AG3
I2CB_SCL
I2CB_SDA
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST#
I2CC_SCL
I2CC_SDA
R2
R3
NV_CRT_DDCCLK
NV_CRT_DDCDATA
VGA I2C-Compatible
NV_I2CB_SCL
NV_I2CB_SDA
A2
B1
NV_LCD_EDID_CLK
NV_LCD_EDID_DAT
R1
T3
R57
10KR2J-3-GP
DIS
DIS
I2CS_SCL
I2CS_SDA
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
N11M_DBG_DATA0
N11M_DBG_DATA1
N11M_DBG_DATA2
N11M_DBG_DATA3
N11M_DBG_DATA4
T6
W6
Y6
AA6
N3
DBG_DATA0
DBG_DATA1
DBG_DATA2
DBG_DATA3
DBG_DATA4
GPIO16
GPIO17
GPIO18
C1
M2
M3
K3
K2
J2
C2
M1
D2
D1
J3
J1
K1
NV_LCD_BL_PWM
G3
G2
F1
NV_FAN_PWM
NVVDD_ALTV0
NVVDD_ALTV1
NV_GPIO8
NV_GPIO9
NV_MEM_VREF
OVERT
ALERT
1
TP79
TPAD14-GP
NV_PWR_LEVEL
TP87
TPAD14-GP
NV_PWR_CTRL1
TP86
TPAD14-GP
TP80
1
BUFRST#
R78
40K2R2F-GP
SRN2K2J-1-GP
DIS
HDCP_CLK
1
HDCP_SDA
1
Pull up? SDA
is input
A3
A4
MULTI_STRAP_REF1_GND
3
4
SA 0826
TP81 TPAD14-GP
1
NV_LCDVDD_ON 24
NV_BLON_IN 23
NVVDD_ALTV0 45
NVVDD_ALTV1 45
2
1
I2CH_SCL
I2CH_SDA
MULTI_STRAP_REF0_GND
STRAP_MIOB F10
B10 GPU_ROM_CS#
A10 GPU_ROM_SI
C10 GPU_ROM_SO
C9 GPU_ROM_SCLK
TP89
TP91
TPAD14-GP
TPAD14-GP
N5
R76
40K2R2F-GP
DIS
DIS
3D3V_S0_NV
NC#N2
N2
SA 0916 SWAP
RN16
NV_I2CB_SDA
NV_I2CB_SCL
F9
2
1
NC#F9
3
4
TESTMODE
AD25
PEX_TESTMODE
T1
T2
ROM_SI
ROM_SO
ROM_SCLK
NV_CRT_DDCDATA
NV_CRT_DDCCLK
SA 0822
1
1
1
1
1
STRAP0
STRAP1
STRAP2
Set reference current

for multilevel straps
STRAP_3V3
F11
RN13
Thermal
TP16
TP14
TP13
TP15
TP88
ROM_CS#
C7
B9
A9
All Other
3D3V_S0_NV
CHECK
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
STRAP0
STRAP1
STRAP2
SA 0916 SWAP
SMBC_Therm_NV
SMBD_Therm_NV
DIS
10/12 MISC
23
23
Debug pin
R446
10KR2J-3-GP
10 OF 12
VGA1K
SA 0904
R58
10KR2J-3-GP
NV_LCD_EDID_CLK
NV_LCD_EDID_DAT
1
3D3V_S0_NV
NV_CRT_DDCCLK 25
NV_CRT_DDCDATA 25
1
1
1
1
1
I2CA_SCL
I2CA_SDA
THERMDP
TP11
TP92
TP90
TP93
TP8
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
THERMDN
GND
SRN2K2J-1-GP
GND
DIS
F6
R458
10KR2J-3-GP
AC6
DIS
N11M-GE1-S-A2-GP
3D3V_S0_NV
input
DIS
TPAD14-GP
RN59
NV_LCD_EDID_CLK
NV_LCD_EDID_DAT
SA 0826
2
1
Debug pin
3
4
SRN2K2J-1-GP
N11M-GE1-S-A2-GP
DIS
DIS
SMBC_Therm_NV
SMBC_Therm 11,33,34
1
1
XTAL_OUTBUFF
XTAL_IN
XTAL_OUT
R82
10KR2J-3-GP
N11M-GE1-S-A2-GP
DIS
DIS
XTALOUTBUFF 1
TP17
TPAD14-GP
R74
10KR2J-3-GP
E10
DIS
XTALIN
if not use, pull down
XTALOUT
R80
39R2J-L-GP
DY
DIS
2
84.DMN66.03F
2ND = 84.27002.F3F
E9
XTAL_SSIN
XTALSSIN D11
D10
DY
when not use
spectrum, pull down
SP_PLLVDD
R75
0R2J-2-GP
DMN66D0LDW-7-GP
SMBD_Therm_NV
L6
45mA
2
R83
0R2J-2-GP
3 VGA_XIN1
SMBD_Therm 11,33,34
DIS
VID_PLLVDD
DIS
3 OSC_SPREAD
DIS
K6
45mA
1
2
Q4
C100
DIS
C73
PLLVDD
DIS
DIS
DIS
1
2
4
3
C59
SC1U6D3V2KX-GP
RN58
SRN4K7J-8-GP
SC4D7U6D3V3KX-GP
68.00143.061
DIS
SP_PLLVDD
C99
DIS
L1
1
2
BLM18PG181SN1D-GP
1D05V_S0_NV
3D3V_S0_NV
C72
60mA
K5
SCD1U10V2KX-4GP
C69
SCD1U10V2KX-4GP
DIS
SC1U6D3V2KX-GP
68.00143.061
11/12 XTAL_PLL
VIO_PLLVDD
SC4D7U6D3V3KX-GP
NV_GPIO9
1
10KR2J-3-GP
11 OF 12
VGA1L
DIS
L2
1
2
BLM18PG181SN1D-GP
3D3V_S0_NV
1D05V_S0_NV
DIS
1
R436
R437
NV_GPIO8
2
10KR2J-3-GP
9/12 I2C_GPIO_THERM_JTAG
D8
1
R79
2
1MR2J-L2-GP
DY
XTALOUT_27
X1
STRAP0
DeviceID
N11P-LM1(0x0A2B) ?
N11M-GE1(0x0A75) 1-0101
USER[0]=1
USER[1]=1
USER[2]=1
USER[3]=1
STRAP1
3GIO_PADCFG[0]=0
3GIO_PADCFG[1]=1
3GIO_PADCFG[2]=1
3GIO_PADCFG[3]=1
STRAP2
PCI_DEVID[0]=1
PCI_DEVID[1]=0
PCI_DEVID[2]=1
PCI_DEVID[3]=0
[0]
[1]
[2]
[3]
N11M-LP1
1
1
0
1
N11M-GE1
1
0
1
0
GPU_ROM_SI
GPU_ROM_SO
VGA_DEVICE
SMB_ALT_ADDR
FB_0_BAR_SIZE
XCLK_417
GPU_ROM_SCLK
PEX_PLL_EN_TERM
SLOT_CLK_CFG
SUB_VENDOR
PCI_DEVID[4]
STRAP0
STRAP1
STRAP2
3D3V_S0_NV
DY
1
DIS
1
DIS
Logical Strap Bit Mapping

Resistor Pull-up Pull-down
5Kohms
1000
0000
10Kohms
1001
0001
15Kohms
1010
0010
20Kohms
1011
0011
25Kohms
1100
0100
30Kohms
1101
0101
35Kohms
1110
0110
45Kohms
1111
0111
=1
=0
=0
=0
=0
=1
=0
=1
[4]
N11M-LP1
0
C107
SC12P50V2JN-3GP
DIS
82.30034.501
2ND = 82.30034.831
DIS
C131
SC15P50V2JN-2-GP
DIS
-1 0126 BOM CHANGE
N11M-GE1
1
GPU_ROM_SI
GPU_ROM_SO
GPU_ROM_SCLK
2 R445
30KR2F-GP
2
for Samsung VRAM

RAM_CFG[0]=1
RAM_CFG[1]=1
RAM_CFG[2]=0
RAM_CFG[3]=0
for Hynix VRAM

RAM_CFG[0]=0
RAM_CFG[1]=1
RAM_CFG[2]=0
RAM_CFG[3]=0
XTAL-27MHZ-62-GP-U
4
9 OF 12
VGA1I
R441
34K8R2F-1-GP
R440
2
45K3R2F-L-GP
2
R444 30KR2F-GP
1
R442 34K8R2F-1-GP
2
R439 2KR2J-1-GP
DIS
DY
1
DY
3D3V_S0_NV
2 R61
15KR2F-GP
DIS
DY
1 R70
10KR2F-2-GP
DY
2 R447
2KR2J-1-GP
DY
2 R60
15KR2F-GP
DIS
2 R73
10KR2F-2-GP
TABLE
KENDO VIDEO MEMORY
2 R448
DIS_S_H 20KR2F-L-GP
R448
SAMSUNG
0011
HYNIX
0010
20KOHM
64.20025.6DL
15KOHM
64.15025.6DL
A
<Core Design>
Wistron Corporation
Title
55_N11M(5/6)_STRAP/ GPIO
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
55
of
58
4
VGA1J
12 OF 12
12/12 GND_NC
AC11
AC14
AC17
AC2
AC20
AC23
AC26
AC5
AC8
AF11
AF14
AF17
AF2
AF20
AF23
AF26
AF5
AF8
B11
B14
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
B17
B2
B20
B23
B26
B5
B8
E11
E17
E2
E20
E23
E26
E5
E8
H2
H5
J11
J14
J17
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
K19
K9
L11
L12
L13
L14
L15
L16
L17
L2
L5
M12
M13
M14
M15
M16
P19
P2
P23
P26
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
P5
P9
T12
T13
T14
T15
T16
U11
U12
U13
U14
U15
U16
U17
U2
U23
U26
U5
V19
V9
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
W11
W14
W17
Y2
Y23
Y26
Y5
GND
GND
GND
GND
GND
GND
GND
NC#C15
NC#D15
NC#J5
C15
D15
J5
<Core Design>
A
Wistron Corporation
N11M-GE1-S-A2-GP
DIS
Title
56_N11M(6/6)_GND
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
56
of
58
4
Mode
DMU
DML
L3
K3
J3
WE#
CAS#
RAS#
52 FBA_CMD_0
G1
F9
E8
E2
D8
D1
B9
B1
G9
52 FBADQM2
52 FBADQM0
52,58 FBA_CMD_19
52,58 FBA_CMD_8
52,58 FBA_CMD_24
FBA_CMD_19
FBA_CMD_8
FBA_CMD_24
K9
DMU
DML
L3
K3
J3
WE#
CAS#
RAS#
K4W1G1646E-HC12-GP
72.41164.H0U
DIS
72.41164.H0U
DIS
DIS
1
2
1
2
1
2
DIS
DIS
C174
DIS
1
2
C179
DIS
DIS
C180
C592
C192
DIS
DIS
1
2
C577
C571
G1
F9
E8
E2
D8
D1
B9
B1
G9
DIS
C596
DIS
C175
DIS
C177
DIS
FBVDD
1
K4W1G1646E-HC12-GP
DIS
DIS
FBA_CMD_29 52,58
DIS
1
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
2
1
2
1
2
DIS
C580
CKE
D3
E7
J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
FBA_CMD_29
C589
CK
CK#
NC#T7
NC#L9
NC#L1
NC#J9
NC#J1
T7
L9
L1
J9
J1
C198
J7
K7
FBA_CMD_0
FBA_CMD_2 52
FBA_CMD_28 52,58
C193
L2
T2
C176
DIS
52 FBA_CLK0
52 FBA_CLK0#
CS#
RESET#
C583
BA0
BA1
BA2
FBA_CMD_25 52
FBA_CMD_2
FBA_CMD_28
243R2F-2-GP
M2
N8
M3
ODT
FBADQSP0 52
FBADQSN0 52
SCD1U10V2KX-5GP
D3
E7
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
R89
FBA_CMD_12
FBA_CMD_9
FBA_CMD_13
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC#M7
DIS
SCD01U50V2KX-1GP
CKE
52,58 FBA_CMD_12
52,58 FBA_CMD_9
52,58 FBA_CMD_13
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7
FBA_CMD_25
DIS
SC1U6D3V2KX-GP
J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1
FBA_CMD_29 52,58
FBA_CMD_7
FBA_CMD_20
FBA_CMD_4
FBA_CMD_14
FBA_CMD_17
FBA_CMD_6
FBA_CMD_26
FBA_CMD_3
FBA_CMD_1
FBA_CMD_10
FBA_CMD_21
FBA_CMD_5
FBA_CMD_22
FBA_CMD_18
FBA_CMD_30
K1
DIS
C579
SCD047U16V2KX-1-GP
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
FBA_CMD_29
FBA_CMD_7
FBA_CMD_20
FBA_CMD_4
FBA_CMD_14
FBA_CMD_17
FBA_CMD_6
FBA_CMD_26
FBA_CMD_3
FBA_CMD_1
FBA_CMD_10
FBA_CMD_21
FBA_CMD_5
FBA_CMD_22
FBA_CMD_18
FBA_CMD_30
F3
G3
DIS
C574
SCD1U10V2KX-5GP
NC#T7
NC#L9
NC#L1
NC#J9
NC#J1
T7
L9
L1
J9
J1
FBA_CMD_2 52
FBA_CMD_28 52,58
52,58
52,58
52,58
52,58
52,58
52,58
52,58
52,58
52,58
52,58
52,58
52,58
52,58
52,58
52,58
DQSL
DQSL#
DIS
C578
SC1U6D3V2KX-GP
L2
T2
FBA_CMD_25 52
VREFDQ
VREFCA
ZQ
DIS
C181
SCD1U10V2KX-5GP
CS#
RESET#
FBA_CMD_2
FBA_CMD_28
DIS
H1
M8
L8
DIS
C572
SCD01U50V2KX-1GP
FBA_CMD_19
FBA_CMD_8
FBA_CMD_24
52,58 FBA_CMD_19
52,58 FBA_CMD_8
52,58 FBA_CMD_24
FBA_CMD_25
R87
1FBA_ZQ1
243R2F-2-GP
DIS
FBADQSP2 52
FBADQSN2 52
C178
SCD01U50V2KX-1GP
52 FBADQM1
52 FBADQM3
ODT
K1
FBA_VREF12
2
C7
B7
C595
SCD01U50V2KX-1GP
52 FBA_CMD_0
K9
FBADQSP3 52
FBADQSN3 52
DQSU
DQSU#
C581
SC1U6D3V2KX-GP
FBA_CMD_0
CK
CK#
F3
G3
FBAD19
FBAD22
FBAD17
FBAD23
FBAD16
FBAD20
FBAD18
FBAD21
DIS
SCD047U16V2KX-1-GP
J7
K7
52 FBA_CLK0
52 FBA_CLK0#
BA0
BA1
BA2
DQSL
DQSL#
D7
C3
C8
C2
A7
A2
B8
A3
C165
SC4D7U6D3V3KX-GP
SCD1U10V2KX-5GP
M2
N8
M3
FBADQSP1 52
FBADQSN1 52
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
FBVDD
SCD1U10V2KX-5GP
FBA_CMD_12
FBA_CMD_9
FBA_CMD_13
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC#M7
C7
B7
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
FBAD1
FBAD7
FBAD0
FBAD6
FBAD3
FBAD4
FBAD2
FBAD5
SCD047U16V2KX-1-GP
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7
DQSU
DQSU#
A8
A1
C1
C9
D2
E9
F1
H9
H2
52
E3
F7
F2
F8
H3
H8
G2
H7
SCD1U10V2KX-5GP
FBA_CMD_7
FBA_CMD_20
FBA_CMD_4
FBA_CMD_14
FBA_CMD_17
FBA_CMD_6
FBA_CMD_26
FBA_CMD_3
FBA_CMD_1
FBA_CMD_10
FBA_CMD_21
FBA_CMD_5
FBA_CMD_22
FBA_CMD_18
FBA_CMD_30
FBAD12
FBAD11
FBAD15
FBAD10
FBAD13
FBAD8
FBAD14
FBAD9
FBAD[0..31]
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
SC1U6D3V2KX-GP
VREFDQ
VREFCA
ZQ
D7
C3
C8
C2
A7
A2
B8
A3
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
SCD1U10V2KX-5GP
52,58 FBA_CMD_12
52,58 FBA_CMD_9
52,58 FBA_CMD_13
H1
M8
L8
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
FBVDD
K8
K2
N1
R9
B2
D9
G7
R1
N9
SCD047U16V2KX-1-GP
FBA_CMD_7
FBA_CMD_20
FBA_CMD_4
FBA_CMD_14
FBA_CMD_17
FBA_CMD_6
FBA_CMD_26
FBA_CMD_3
FBA_CMD_1
FBA_CMD_10
FBA_CMD_21
FBA_CMD_5
FBA_CMD_22
FBA_CMD_18
FBA_CMD_30
FBA_ZQ0
FBAD27
FBAD29
FBAD26
FBAD24
FBAD25
FBAD30
FBAD28
FBAD31
SCD1U10V2KX-5GP
2nd: 72.51G63.C0U (IC SDRAM H5TQ1G63BFR-12C FBGA)
R463
1K05R2F-GP
FBA_VREF12
DIS
R464
1K05R2F-GP
DIS
C585
SC2D2U6D3V3KX-GP
DIS
52,58
52,58
52,58
52,58
52,58
52,58
52,58
52,58
52,58
52,58
52,58
52,58
52,58
52,58
52,58
1
R467
DIS 243R2F-2-GP
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
E3
F7
F2
F8
H3
H8
G2
H7
FBRAM2
FBVDD
SC1U6D3V2KX-GP
A8
A1
C1
C9
D2
E9
F1
H9
H2
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
52
SC1U6D3V2KX-GP
C189
SCD01U50V2KX-1GP
2
1 FBA_VREF12
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
SA 0908: layout swap

FBAD[0..31]
SC1U6D3V2KX-GP
DIS
K8
K2
N1
R9
B2
D9
G7
R1
N9
FBVDD
FBRAM1
SC1U6D3V2KX-GP
FBVDD
C Command Mapping
<Core Design>
A
Wistron Corporation
Title
57_VRAM(1/2)
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
57
of
58
C588
2
1 FBA_VREF34
SCD01U50V2KX-1GP
2
1FBA_ZQ2
243R2F-2-GP
DIS
H1
M8
L8
FBA_CMD_22
FBA_CMD_4
FBA_CMD_20
FBA_CMD_9
FBA_CMD_6
FBA_CMD_17
FBA_CMD_3
FBA_CMD_26
FBA_CMD_1
FBA_CMD_5
FBA_CMD_19
FBA_CMD_10
FBA_CMD_7
FBA_CMD_29
FBA_CMD_13
FBA_CMD_22
FBA_CMD_4
FBA_CMD_20
FBA_CMD_9
FBA_CMD_6
FBA_CMD_17
FBA_CMD_3
FBA_CMD_26
FBA_CMD_1
FBA_CMD_5
FBA_CMD_19
FBA_CMD_10
FBA_CMD_7
FBA_CMD_29
FBA_CMD_13
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC#M7
52,57 FBA_CMD_12
52,57 FBA_CMD_14
52,57 FBA_CMD_30
FBA_CMD_12
FBA_CMD_14
FBA_CMD_30
M2
N8
M3
BA0
BA1
BA2
J7
K7
CK
CK#
K9
CKE
D3
E7
DMU
DML
L3
K3
J3
WE#
CAS#
RAS#
R88
52,57
52,57
52,57
52,57
52,57
52,57
52,57
52,57
52,57
52,57
52,57
52,57
52,57
52,57
52,57
R86
243R2F-2-GP 1
DIS
52 FBA_CLK1
52 FBA_CLK1#
FBA_CMD_27
52 FBA_CMD_27
52 FBADQM5
52 FBADQM7
FBA_CMD_21
FBA_CMD_8
FBA_CMD_24
52,57 FBA_CMD_21
52,57 FBA_CMD_8
52,57 FBA_CMD_24
VREFDQ
VREFCA
ZQ
E3
F7
F2
F8
H3
H8
G2
H7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
FBAD43
FBAD40
FBAD47
FBAD44
FBAD46
FBAD42
FBAD45
FBAD41
DQSU
DQSU#
C7
B7
FBADQSP5 52
FBADQSN5 52
DQSL
DQSL#
F3
G3
FBADQSP7 52
FBADQSN7 52
ODT
K1
FBVDD
FBA_CMD_16
FBA_CMD_16 52
CS#
RESET#
L2
T2
FBA_CMD_11
FBA_CMD_28
FBA_CMD_11 52
FBA_CMD_28 52,57
NC#T7
NC#L9
NC#L1
NC#J9
NC#J1
T7
L9
L1
J9
J1
FBA_CMD_18
FBA_CMD_18 52,57
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
FBA_VREF34
2 R465
1FBA_ZQ3
243R2F-2-GP
DIS
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
H1
M8
L8
VREFDQ
VREFCA
ZQ
FBA_CMD_22
FBA_CMD_4
FBA_CMD_20
FBA_CMD_9
FBA_CMD_6
FBA_CMD_17
FBA_CMD_3
FBA_CMD_26
FBA_CMD_1
FBA_CMD_5
FBA_CMD_19
FBA_CMD_10
FBA_CMD_7
FBA_CMD_29
FBA_CMD_13
FBA_CMD_22
FBA_CMD_4
FBA_CMD_20
FBA_CMD_9
FBA_CMD_6
FBA_CMD_17
FBA_CMD_3
FBA_CMD_26
FBA_CMD_1
FBA_CMD_5
FBA_CMD_19
FBA_CMD_10
FBA_CMD_7
FBA_CMD_29
FBA_CMD_13
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC#M7
52,57 FBA_CMD_12
52,57 FBA_CMD_14
52,57 FBA_CMD_30
FBA_CMD_12
FBA_CMD_14
FBA_CMD_30
M2
N8
M3
BA0
BA1
BA2
J7
K7
CK
CK#
K9
CKE
52,57
52,57
52,57
52,57
52,57
52,57
52,57
52,57
52,57
52,57
52,57
52,57
52,57
52,57
52,57
52 FBA_CLK1
52 FBA_CLK1#
52 FBA_CMD_27
G1
F9
E8
E2
D8
D1
B9
B1
G9
A8
A1
C1
C9
D2
E9
F1
H9
H2
FBA_CMD_27
52 FBADQM4
52 FBADQM6
52,57 FBA_CMD_21
52,57 FBA_CMD_8
52,57 FBA_CMD_24
FBA_CMD_21
FBA_CMD_8
FBA_CMD_24
D3
E7
DMU
DML
L3
K3
J3
WE#
CAS#
RAS#
FBAD[32..63]
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
FBAD51
FBAD53
FBAD48
FBAD52
FBAD50
FBAD55
FBAD49
FBAD54
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
FBAD36
FBAD39
FBAD34
FBAD38
FBAD32
FBAD35
FBAD33
FBAD37
DQSU
DQSU#
C7
B7
DQSL
DQSL#
F3
G3
52
FBADQSP4 52
FBADQSN4 52
FBADQSP6 52
FBADQSN6 52
ODT
K1
FBA_CMD_16
CS#
RESET#
L2
T2
FBA_CMD_11
FBA_CMD_28
FBA_CMD_11 52
FBA_CMD_28 52,57
NC#T7
NC#L9
NC#L1
NC#J9
NC#J1
T7
L9
L1
J9
J1
FBA_CMD_18
FBA_CMD_18 52,57
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
G1
F9
E8
E2
D8
D1
B9
B1
G9
FBA_CMD_16 52
FBVDD
R478
1K05R2F-GP
DIS
FBA_VREF34
R98
1K05R2F-GP
DIS
DIS
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
A8
A1
C1
C9
D2
E9
F1
H9
H2
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
K8
K2
N1
R9
B2
D9
G7
R1
N9
FBVDD
K8
K2
N1
R9
B2
D9
G7
R1
N9
FBAD56
FBAD62
FBAD58
FBAD63
FBAD61
FBAD60
FBAD59
FBAD57
FBRAM4
FBVDD
52
FBVDD
FBAD[32..63]
FBRAM3
DIS
C584
SC2D2U6D3V3KX-GP
2
K4W1G1646E-HC12-GP
K4W1G1646E-HC12-GP
72.41164.H0U
DIS
72.41164.H0U
DIS
<Core Design>
Wistron Corporation

Title
58_VRAM(2/2)
Size
Document Number
Custom
Rev
-1
LA46 MB DIS
Date:
Sheet
58
of
58

Wistron LA46 Rev - 1 Sch-Lenovo b460 v460

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Wistron LA46 Rev - 1 Sch-Lenovo b460 v460

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5

LA46 Switchable Graphics System Schematicshttp://hobi-elektronika.net

204-PIN DDR3 SODIMM

PCIe 16X Gen2

Serial ATA (4 ports)

PCI Rev 2.3

USB 2.0 port?

USB 2.0 CH6

LPC Bus / 33MHz

USB 2.0 CH4

AC97 2.3/Azalia Interface

PCI Express (8 ports)

USB 2.0 (12 ports)

Wednesday, January 27, 2010

Configuration (Default value for each bit is

1: Disabled - No Physical Display Port attached to 1

1: Single PCI-Express Graphics

Reserved Temporarily used

can power after power switch press

Reboot option at power-up

Weak internal pull-down. Do not pull high.

Default Mode: Internal pull-up.

High (1) = Integrated VRM is enabled

Default: Do not pull low.

Enable iTPM: Connect to Vcc3_3 with 8.2-k weak pull-up resistor.

Planar PCB Version

DIS: Before 1D05V_VTT

Weak internal pull-up. Do not pull low.

Low (0): Flash Descriptor Security will be overridden.

Weak internal pull-down. Do not pull high.

Weak internal pull-down. Do not pull high.

Weak internal pull-up. Do not pull low.

Default = Do not connect (floating)

N11M-GE Power Sequence

Wednesday, January 27, 2010

Mount Mount Mount Mount Mount

Low voltage I/O power

FOR CO-LAY SLG8LV595

3.3V LVTTL input for CPU_STOP#. Contains

SB-1015 change to 84.2N702.E31

Make sure that the stubs to the

SB BOM change to 82.30005.A51

03_Clock Generator SLG8SP585

Tuesday, January 26, 2010

PCI EXPRESS -- GRAPHICS

04_CPU (1/7)-PEG / DMI / FDI

Tuesday, January 26, 2010

SKTOCC# (Socket Occupied)

SA 0901 : LC require to reserve

JTAG & BPM

SC 1130 change to 1.5Kohm

SB 1015 change to 84.DMN66.03F

Tuesday, January 26, 2010

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY - B

06_CPU (3/7)-MEM INTERFACE

Tuesday, January 26, 2010

The decoupling capacitors, filter

Please note that the VTT Rail

CPU CORE SUPPLY

PROCESSOR CORE POWER

SB 1019 remove test point

Wednesday, January 27, 2010