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KLE Societys

B.V. Bhoomaraddi College of Engineering and Technology,


Hubli

Design of low voltage operational amplifier


for high speed ADC
COMPANY: SMARTPLAY PVT TECHNOLOGY

Under the guidance of


Dr. R B Shettar
Mentor :
Dr. Ramesh Karmungi
By,
Mr. Abhishek C Math

Overview

Introduction
Objective
Literature survey
Conclusion
References

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REAL WORLD SAMPLED DATA SYSTEMS


CONSIST OF ADCs and DACs
Analog

Digital
ADC

Channel

DSP

Memory

DAC

time
ADC SAMPLED AND
QUANTIZED WAVEFORM

time
DAC
RECONSTRUCTED
WAVEFORM

ADC can be divided into two major groups


1.Nyquist Rate ADC
2.Oversampling ADC

Nyquist Rate ADC

Oversampling ADC
Oversampling ADC converter can also be
called Sigma-Delta ADC converter. It uses
the idea of Oversampling frequency
technology to improve the Signal to Noise
Ratio, then to increase the resolution.

Comparison of operational
amplifier topology

Objective
To design the low power ,high speed folded
cascode amplifier with the gain boosting
amplifier for ADC.

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Specification
Parameter

Target

Vdd

1V

Dc gain

>100dB

UGB

>900MHz

Settling time

10ns

Technology

130nm

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10

Literature survey
Different types of architecture
1.Single stage op amp

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11

2. Cascoded op amp
Limits the output
swing

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12

3.Folded cascode OTA

Higher output swing


than telescopic
amplifier

4.Regulated gain boosting


amplifier

It is the current
voltage feedback
topology

5. Two stage op amp

Output swing is
more, but speed is
less

Proposed Architecture
For high speed ADC we
need the high output
swing and high
bandwidth.
The auxiliary amplifier
used is the folded
cascode amplifier.

Conclusion
The different architecture of Operational Amplifier
Topology is presented. We found that for high
speed ADC we need a high gain ,high output
swing OTA. We choose the folded cascode
amplifier which provides the high gain and high
output swing. To enhance the gain without
affecting the swing we go for the gain boosting
amplifier.

References

[1] K. Bult and G. J. G. M. Geelen, "A Fast-Settling CMOS OpAmp


for
SC Circuits with 90dB DC Gain" Chines journal of semiconductors,
Vol. 27, No. 5, pp. 778-782, 2006.
[2] A.D. Grasso,S. Pennisi, "High-Performance CMOS PseudoDifferential Amplier"' Circuits and Systems, ISCAS 2005. IEEE
InternationalSymposium on, pp. 1569 1572, 23-26 May 2005.
[3] B.J. Hosticka, "Improvement of the Gain of CMOS Ampliers"
IEEE
Journal of Solid-State Circuits, vol. SC-14, Issue 6, Dec.1979,
pp.1111- 1114. 1996.
[4] Behzad Razavi " Design of analog cmos integrated circuits"
McGraw- Hill, 2001.
[5] Phillip E. Allen and Douglas R. Holberg " CMOS analog circuit
Design McGraw-Hill, 2001.

THANK YOU