Adi Maual Service Tableta Motion-LE1600-Tablet-PC

A
http://hobi-elektronika.net
MODEL NAME : EDX20

PCB NO : LA-2481
1
PVT
COMPAL CONFIDENTIAL
2
EDX20 Schematics Document

2005-02-22
REV: 0.5
3
Compal Electronics, Inc.

Title
PROPRIETARY NOTE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
C
COVER SHEET
Document Number
Rev
0.5
EDX20 LA-2481
Sheet
Tuesday, February 22, 2005

E
of
48
Compal confidential
Block Diagram
Dothan-LV
D
uFCBGA CPU
page 5,6
HA#(3..31)
System Bus
Memory BUS
(DDR2)
HD#(0..63)
400MHz
LCD 12.1" SXGA
LVDS Transmitter
HDMI CONN.
page 16
SDVO
CH7308
page 17
Clock Generator
IDT CV140
LVDS
Hydias/Toshiba
LCD 12.1" XGA
page 17
page 15
SO-DIMM X 1
Channel A
Intel 915 GMS (Alviso)
BANK 0
1.8V 400MHz
Fan Control X1
page 14
page 5
page 17
GMCH-M
DVI Controller
SW LED BD
FC-BGA840
SiL1362/CH7307
page 8,9,10,11
page 16
Docking/CRT
DMI
CRT CONN.
page
MINI PCI
BATT IN/+2.5V
page 12,13
1.5V
100MHz
page 42
On Board 512MB (8-Cell)
18
1.05V(+VCCP)
page 44
Mic 1/2/3
page 26
3.3V 33MHz
IDSEL:AD20
(PIRQA/B#,GNT#2,REQ#2)
CardBus Controller
ENE CB712
B
AC-LINK
PCI BUS
IDSEL:AD17
(PIRQF#,GNT#3,REQ#3)
3.3V 24.576MHz
5V/3.3V/15V
ICH6-M
Gigabit Lan
page 41
ATA100
609 BGA
RTL8110SBL
AC97 CODEC
STAC9758
HDD 1.8"
page 23
page 19,20,21,22
page 27
page 24
1.8V / 0.9V
page 42,43
page 29
Pecos USB port0

page 31
Transformer
CardReader
page 25
Slot 0
& RJ45
page 25
page 28
Docking
Pecos USB port1
Docking
page 31
RJ45
Phone/Mic
LLANO USB port2

page 36
3.3V 33MHz
LPC BUS
USB 2.0
48MHz / 480Mb
page 35
SIO
LPC47N217D
page 35
TPM CONN.
Digitizer
FIR
CHARGER
page 39
page 36
page 36
BIOS CONN.
page 34
page 32,33
Travel Dock USB port5

page 36
BT Module
page 36
TPM
SLD9630TT
page 30
LLANO USB port3
Bluetooth USB port6

A
page 45
LLANO USB port4
XBUS
Keyboard Controller
ENE KB910
VCORE
AMP & Phone
MIC
1MB ROM BIOS

SST39VF080
Finger Printer USB port7
FPR brd
page 36

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
Title
Block Diagram
EDX20 LA-2481
Size
Document Number
Date:
Sheet
1
of
Rev
0.5
48
Power Management table
+12VALW
External PCI Devices

D
DEVICE
IDSEL #
REQ/GNT #
Signal
PIRQ
+1.8V
USB PORT TABLE

PORT
+5VS
+5VALW
+3VS
+3VALW
+1.8VS
+2.5VS
Mini-PCI
AD18
G,H
+1.5VS
CARD BUS
AD20
A B
+0.9VS
LAN
AD17
State
+VCCP
FUNCTION
PORT 0
PECOS PORT 0
PORT 1
PECOS PORT 1
PORT 2
LLANO PORT 2
PORT 3
LLANO PORT 0
PORT 4
LLANO PORT 1
PORT 5
TRAVEL DOCKING
PORT 6
BLUETOOTH
PORT 7
FINGER PRINTER
+CPU_CORE
S0
ON
ON
ON
S1
ON
ON
ON
ICH6M SM Bus Address
S3
ON
ON
OFF
DEVICE
S5 S4/AC
ON
OFF
OFF
S5 S4/AC don't exist
OFF
OFF
OFF
Address
Clock Generator
1101 001Xb
DDR2 On Board
1010 000Xb
DDR2 DIMM1
1010 001Xb
Voltage Rails
T PM
Power Plane
EC SM Bus1 Address
DEVICE
Address
Smart Battery 1
0001 011Xb
AT24C16AN-10SI-2.7(U24) 1011 XXX R/W#b
Description
S0-S1
S3
S5
VIN
Adapter power supply (19V)
N/A
N/A
N/A
B+
AC or battery power rail for power circuit
N/A
N/A
N/A
+CPU_CORE
Core voltage for CPU
ON
OFF
OFF
+VCCP
1.05V power rail for Processor I/O and MCH core power
ON
OFF
OFF
+0.9VS
0.9V switched power rail for DDRII Vtt
ON
OFF
OFF
+1.5VS
1.5V switched power rail for PCI-E interface
ON
OFF
OFF
+1.8V
1.8V power rail for DDRII
ON
ON
OFF
+1.8VS
1.8V switched power rail
ON
OFF
OFF
OFF
EC SM Bus2 Address
+2.5VS
2.5V switched power rail for MCH video PLL
ON
OFF
+3VALW
3.3V always on power rail
ON
ON
ON*
DEVICE
+3VS
3.3V switched power rail
ON
OFF
OFF
Address
Smart Battery 2
0001 011Xb
ALS TSL2550T
ADM1032
1001 100Xb
TC74A1-5.0VCT(U34)
1001 001Xb
TC74A2-5.0VCT(U43)
1001 010Xb
+5VALW
5V always on power rail
ON
ON
ON*
+5VS
5V switched power rail
ON
OFF
OFF
+12VALW
12V always on power rail
ON
ON
ON*
RTCVCC
RTC power
ON
ON
ON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

Title
PROPRIETARY NOTE
Size
Date:
3
NOTE&Revision
Document Number
Rev
0.5
EDX20 LA-2481
Sheet
1
of
48
BATSELB_A#
IREF
BATT_A+ PIN1
FSTCHG
FSTCHG
ID PIN2
A Battery
Input Current Sense
P2
D
VIN
B+ CHG_B+
Vin
Detector
PACIN
ACOFF#
PACIN
TS PIN4
MAX1908
Charger
P3
SWITCH
Batt selector
MAX1538
SMC PIN6
ID PIN2
VMB Feedback
B+
B Battery
+3VALW
DC-DC
FAN5234
+5VALW
B/I PIN3
TS PIN4
SMD PIN5
+1.5VALWP
SMC PIN6
OVP
Protector
LM358
PACIN
BATT-OVP
ACIN
VS
+1.2VP
+1.8VP
DC-DC
ISL6227
VIN
RTC
Charger
+VCCP_PWRGD
RTCVREF
VIN
SYSON#
+1.8VPGD
EC_ON#
BATT_A
SMD PIN5
A or B
BATT_A+ PIN1
SYSON
VSB
BATT+
Output Current Sense
VIN
+VS
B/I PIN3
SUSP
ACOFF
LDO
APL5331
SWITCH
+0.9VSP
+VCCPP
SUSP#
BATT_B
B
SUSP#
OVER
TEMP.
PROTECT
VL
MAINPWRON
B+++
+12VALW
Bridge
battery
SPOK
VS
VSB
DC-DC
MAX1902
SUSP#
MAINPWRON
LDO
G965
+3VALWP
+5VALWP
+12VPALWP
+2.5VSP
CPU_B+
VR_ON
PM_DPRSLPVR
H_DPSLP#
DC-DC
MAX1907
+CPU_CORE
REF
+5VALWP
SYSPOK
VGATE
VL
2.5VREF
SPOK
CLKEN#
Title
POWER Tree
Size
Document Number
R ev
0.5
EDX20 LA-2481
Date:
5
Sheet
1
of
48
<8> H_ADSTB#0
<8> H_ADSTB#1
<15>
<15>
R399 @ 0_0402_5%
1
2 CPU_CK_ITP
1
2 CPU_CK_ITP#
R398 @ 0_0402_5%
CLK_CPU_BCLK
CLK_CPU_BCLK#
<15> CLK_CPU_BCLK
<15> CLK_CPU_BCLK#
R153
+VCCP
H_ADSTB#0
H_ADSTB#1
CK_ITP
CK_ITP#
CK_ITP
CK_ITP#
56_0402_5%
<8>
<8>
<8>
<8>
<8>
<8>
<8>
<8>
<8>
H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRDY#
H_HIT#
H_HITM#
<8>
<8>
H_LOCK#
H_RESET#
H_RS#[0..2]
<8>
H_TRDY#
<21> ITP_DBRESET#
<8>
H_DBSY#
<20,45> H_DPSLP#
<20> H_DPRSTP#
<8>
H_DPWR#
<20> H_PWRGOOD
<8,20> H_CPUSLP#
@ 1K_0402_5% 2
@ 1K_0402_5% 2
1
1
R157 TEST1
R187 TEST2
<8,20> H_THERMTRIP#
H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRD Y#
H_HIT#
H_HITM#
H_IERR#
H_LOCK#
H_RESET#
R2
P3
T2
P1
T1
ADSTB0#
ADSTB1#
A16
A15
ITP_CLK0
ITP_CLK1
B15
B14
BCLK0
BCLK1
N2
L1
J3
N4
L4
H2
K3
K4
A4
J2
B11
ADS#
BNR#
BPRI#
BR0#
DEFER#
DRDY#
HIT#
HITM#
IERR#
LOCK#
RESET#
DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#
C23
K24
W25
AE24
C22
L24
W24
AE25
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
A20M#
FERR#
IGNNE#
INIT#
LINT0
LINT1
C2
D3
A3
B5
D1
D4
H_A20M#
H_FERR#
H_IGNNE#
H_INIT#
H_INTR
H_NMI
STPCLK#
SMI#
C6
B4
H_STPCLK#
H_SMI#
HOST CLK
CONTROL GROUP
H_RS#0
H_RS#1
H_RS#2
H_TRDY#
H1
K1
L2
M3
RS0#
RS1#
RS2#
TRDY#
ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
C8
B8
A9
C9
BPM0#
BPM1#
BPM2#
BPM3#
ITP_DBRESET#
H_DBSY#
H_DPSLP#
H_DPRSTP#
H_DPWR#
ITP_BPM#4
ITP_BPM#5
H_PROCHOT#
A7
M2
B7
G1
C19
A10
B10
B17
DBR#
DBSY#
DPSLP#
DPRSTP#
DPWR#
PRDY#
PREQ#
PROCHOT#
H_PW RGOOD E4
H_CPUSLP#
A6
ITP_TCK
A13
ITP_TDI
C12
ITP_TDO
A12
TEST1
C5
TEST2
F23
ITP_TMS
C11
ITP_TRST#
B13
PWRGOOD
SLP#
TCK
TDI
TDO
TEST1
TEST2
TMS
TRST#
MISC
THERMAL
R26
R27
54.9_0402_1%
54.9_0402_1%
H_RESET#
ITP_TDO
+VCCP
ITP_TMS
2
39.2_0603_1%
ITP_TDI
2
150_0402_5%
1
R21
1
R22
R24
R23
1
1
ITP_TRST#
2
680_0402_5%
ITP_TCK
2
27.4_0402_1%
Thermal Sensor
+3VS
C
1
H_THERMDA
C451
0.1U_0402_16V4Z
R394
@ 10K_0402_5%
1
C452
U36
2200P_0402_50V7K
<32,34,36,38> SMB_EC_CK2
<32,34,36,38> SMB_EC_DA2
D+
VDD1
H_THERMDC
D-
ALERT#
SMB_EC_CK2
SCLK
THERM#
SMB_EC_DA2
SDATA
GND
THERM#
G781_SOP8
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
LEGACY CPU
THERMDA DIODE
THERMDC
THERMTRIP#
+VCCP
2
D25
J26
T24
AD20
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
U3
AE5
H_THERMDA B18
H_THERMDC A18
H_THERMTRIP# C17
DINV0#
DINV1#
DINV2#
DINV3#
DATA GROUP
ADDR GROUP
+VCCP
Dothan
A19
A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26
H_D#[0..63] <8>
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
<8> H_REQ#[0..4]
P4
U4
V3
R3
V2
W1
T4
W2
Y4
Y1
U1
AA3
Y3
AA2
AF4
AC4
AC7
AC3
AD3
AE4
AD2
AB4
AC6
AD5
AE2
AD6
AF3
AE1
AF1
U1A
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
<8>
<8>
<8>
<8>
H_DSTBN#[0..3] <8>
B
H_DSTBP#[0..3] <8>
PWM Fan Control circuit

+5VS
H_A20M# <20>
H_FERR# <20>
H_IGNNE# <20>
H_INIT# <20>
H_INTR
<20>
H_NMI
<20>
H_A#[3..31]
1
R93
+5VS
2
@ 10K_0402_5%
H_STPCLK# <20>
H_SMI#
<20>
D2
CH355_SC76
<32> FAN_SPEED1
C86
1
C83
<8>
2
1000P_0402_50V7K
C92
0.1U_0402_16V4Z
2
10U_0805_10V4Z
JP5
1 1
2 2
3 3
2
8.2K_0402_5%
1
2
R106
100_0402_1%
+3VS
1
R73
+3VS
<32> EC_PWM4
MOLEX_53780-0310
FOX_PZ47803-2749-01
Q9
FDN359AN_SOT23
2
G
+VCCP
A
PROCHOT#
PROCHOT# <32>
R400
56_0402_5%
R397
56_0402_5%
2 H_PW RGOOD
200_0402_1%
1
R154
Q37
2SC2411K_SC59
2
B
Title
+VCCP
R396
1K_0402_5%
H_PROCHOT#
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Size
Custom
Date:

Dothan Processor in mFCPGA479 R e v
Document Number
0.5
EDX20 LA-2481
Sheet

1
of
48
+VCC_CORE
R193 1
2@ 0_0805_5%
+1.5VS
R188 1
2 0_0805_5%
C153
0.01U_0402_16V7K
+1.8VS
+1.8VS FOR NON-LV/ULV PROCESSOR

+1.5VS FOR LV/ULV PROCESSOR
C151
10U_1206_6.3V6M
+CPU_VCCA
U1B
VCCSENSE
VSSSENSE
+VCCP
+VCC_CORE
+VCCP
1
<45>
<45>
<45>
<45>
<45>
<45>
R247
1K_0402_1%
+CPU_GTLREF
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
R249
2K_0402_1%
<15> CPU_BSEL0
<15> CPU_BSEL1
C248
220P_0402_50V7K
@
R267
54.9_0402_1%
2
1
R274
27.4_0402_1%
2
1
R224
54.9_0402_1%
1
2
R220
27.4_0402_1%
1
2
Resistor placed within

0.5" of CPU pin.Trace
should be at least 25
miles away from any
other toggling signal.
U1C
VCCSENSE
VSSSENSE
F26
B1
N1
AC26
VCCA0
VCCA1
VCCA2
VCCA3
P23
W4
VCCQ0
VCCQ1
D10
D12
D14
D16
E11
E13
E15
F10
F12
F14
F16
K6
L5
L21
M6
M22
N5
N21
P6
P22
R5
R21
T6
T22
U21
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
D6
D8
D18
D20
D22
E5
E7
E9
E17
E19
E21
F6
F8
F18
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
E1
PSI#
E2
F2
F3
G3
G4
H4
VID0
VID1
VID2
VID3
VID4
VID5
AD26
CPU_BSEL0 C16
CPU_BSEL1 C14
COMP0
COMP1
COMP2
COMP3
C242
1U_0603_10V4Z
@
AE7
AF6
Dothan
POWER, GROUNG, RESERVED SIGNALS AND NC
R278
@ 54.9_0402_1%
1
2
1
2
R279
@ 54.9_0402_1%
GTLREF
BSEL0
BSEL1
P25
P26
AB2
AB1
COMP0
COMP1
COMP2
COMP3
C3
E26
AF7
AC1
RSVD
RSVD
RSVD
RSVD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A2
A5
A8
A11
A14
A17
A20
A23
A26
B3
B6
B9
B12
B16
B19
B22
B25
C1
C4
C7
C10
C13
C15
C18
C21
C24
D2
D5
D7
D9
D11
D13
D15
D17
D19
D21
D23
D26
E3
E6
E8
E10
E12
E14
E16
E18
E20
E22
E25
F1
F4
F5
F7
F9
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
G23
G26
H3
H5
H21
H25
J1
J4
J6
J22
J24
K2
K5
K21
K23
K26
L3
L6
L22
L25
M1
FOX_PZ47803-2749-01
Resistor placed within

0.5" of CPU pin.Trace
should be at least 25
miles away from any
other toggling signal.
T17
T18
T8
T5
F20
F22
G5
G21
H6
H22
J5
J21
K22
U5
V6
V22
W5
W21
Y6
Y22
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AB6
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC9
AC11
AC13
AC15
AC17
AC19
AD8
AD10
AD12
AD14
AD16
AD18
AE9
AE11
AE13
AE15
AE17
AE19
AF8
AF10
AF12
AF14
AF16
AF18
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
M4
M5
M21
M24
N3
N6
N22
N23
N26
P2
P5
P21
P24
R1
R4
R6
R22
R25
T3
T5
T21
T23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Dothan
POWER, GROUND
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
T26
U2
U6
U22
U24
V1
V4
V5
V21
V25
W3
W6
W22
W23
W26
Y2
Y5
Y21
Y24
AA1
AA4
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC21
AC24
AD1
AD4
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE3
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF2
AF5
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF24
FOX_PZ47803-2749-01
PAD
PAD
PAD
PAD
Title
5

Dothan Processor in mFCPGA479
Size
Document Number
Custom EDX20 LA-2481
Date:
Sheet

1
of
48
Rev
0.5
+VCC_CORE
1
C155
10U_1206_6.3V6M
1
C169
10U_1206_6.3V6M
1
C178
10U_1206_6.3V6M
1
C195
10U_1206_6.3V6M
1
C211
10U_1206_6.3V6M
+VCC_CORE
1
C246
10U_1206_6.3V6M
1
C247
10U_1206_6.3V6M
1
C237
10U_1206_6.3V6M
1
C232
10U_1206_6.3V6M
1
C212
10U_1206_6.3V6M
+VCC_CORE
1
C236
10U_1206_6.3V6M
1
C243
10U_1206_6.3V6M
1
C244
10U_1206_6.3V6M
C245
10U_1206_6.3V6M
1
C196
10U_1206_6.3V6M
1
C179
10U_1206_6.3V6M
1
C170
10U_1206_6.3V6M
1
C156
10U_1206_6.3V6M
C162
10U_1206_6.3V6M
+VCC_CORE
1
C231
10U_1206_6.3V6M
+VCC_CORE
+VCC_CORE
1
C161
10U_1206_6.3V6M
1
C160
10U_1206_6.3V6M
1
C183
10U_1206_6.3V6M
1
C184
10U_1206_6.3V6M
1
C210
10U_1206_6.3V6M
1
C227
10U_1206_6.3V6M
1
C273
10U_1206_6.3V6M
@
1
C274
10U_1206_6.3V6M
@
1
C275
10U_1206_6.3V6M
@
C276
10U_1206_6.3V6M
@
+VCC_CORE
H11
HOLEB
H15
HOLEB
H13
HOLEB
H23
HOLEB
CF11
1
CF3
1
CF1
FD4
1
H26
HOLEA
H17
HOLEA
H20
HOLEA
H21
HOLEA
H28
HOLEA
H16
HOLEA
H12
HOLEA
H14
HOLEA
H8
HOLEA
H6
HOLEA
H27
HOLEA
H18
HOLEA
CF7
1
H9
HOLEA
FD5
1
CF6
1
CF2
1
H5
HOLEA
1
H7
HOLEB
H24
HOLEB
B
2
1
H25
HOLEC
9 mOhm 9 mOhm
7343
7343
PS CAP PS CAP
H19
HOLED
H1
HOLEE
H29
HOLEE
H50
HOLEE
CL3
HOLED
CL2
HOLED
H10
HOLED
H22
HOLED
H3
HOLED
FD6
9 mOhm
7343
PS CAP
C238
330U_D2E_2.5VM_R9
FD3
CF5
1
9 mOhm
7343
PS CAP
C252
330U_D2E_2.5VM_R9
C260
330U_D2E_2.5VM_R9
H4
HOLEA
H2
HOLEA
+VCC_CORE
FD2
1
CF4
1
CF9
1
FD1
Near VCORE regulator.
CF8
1
CF10
1
CF12
1
C281
10U_1206_6.3V6M
@
1
C280
10U_1206_6.3V6M
@
1
C279
10U_1206_6.3V6M
@
1
C278
10U_1206_6.3V6M
@
1
C277
10U_1206_6.3V6M
2
@
+VCCP
1
1
+
2
C187
150U_D2_4VM
1
C234
0.1U_0402_16V4Z
1
C215
0.1U_0402_16V4Z
1
C202
0.1U_0402_16V4Z
1
C148
0.1U_0402_16V4Z
1
C149
0.1U_0402_16V4Z
1
C150
0.1U_0402_16V4Z
1
C175
0.1U_0402_16V4Z
1
C188
0.1U_0402_16V4Z
1
C225
0.1U_0402_16V4Z
C139
0.1U_0402_16V4Z
Title
4
CPU Bypass
Size
Document Number
Date:

Rev
0.5
Sheet

1
of
48
U31A
<5>
H_RESET#
<5>
<5>
<5>
<5>
<5>
H_ADS#
H_TRDY#
H_DPWR#
H_DRDY#
H_DEFER#
<5>
<5>
<5>
<5>
<5>
<5>
<5>
H_HITM#
H_HIT#
H_LOCK#
H_BR0#
H_BNR#
H_BPRI#
H_DBSY#
F7
HCPURST#
H_ADS#
H_TRDY#
H_DPWR#
H_DRD Y#
H_DEFER#
G9
E9
G1
A4
E5
HADS#
HTRDY#
HDPWR#
HDRDY#
HDEFER#
C3
B2
C4
F9
E8
B3
F8
C5
A5
B5
C7
HHITM#
HHIT#
HLOCK#
HBREQ0#
HBNR#
HBPRI#
HDBSY#
HCPUSLP#
HRS0#
HRS1#
HRS2#
H_HITM#
H_HIT#
H_LOCK#
H_BR0#
H_BNR#
H_BPRI#
H_DBSY#
H_R_CPUSLP#
H_RS#0
H_RS#1
H_RS#2
ALVISO_BGA840
R78
221_0603_1%
2
1
DMI_RXN0
DMI_RXN1
V26
W31
DMI_TXN0
DMI_TXN1
DMI_RXP0
DMI_RXP1
U26
V31
DMI_TXP0
DMI_TXP1
DDR_CLK0
DDR_CLK1
AE31
AF5
SM_CK0
SM_CK1
DDR_CLK3
DDR_CLK4
AJ29
AH5
SM_CK3
SM_CK4
DDR_CLK0#
DDR_CLK1#
AF31
AE5
SM_CK0#
SM_CK1#
DDR_CLK3#
DDR_CLK4#
AJ28
AJ5
SM_CK3#
SM_CK4#
DDR_CKE0
DDR_CKE1
DDR_CKE2
DDR_CKE3
AC23
AC25
AH21
AJ21
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
DDR_CS0#
DDR_CS1#
DDR_CS2#
DDR_CS3#
AD11
AG13
AL14
AH12
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
M_OCDOCMP0
M_OCDOCMP1
DDR_ODT0
DDR_ODT1
DDR_ODT2
DDR_ODT3
AB27
AE9
AF12
AG12
AK13
AJ12
SMOCDCOMP0
SMOCDCOMP1
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3
SMRCOMPN
SMRCOMPP
DDR_VREF
AD7
AE7
Y30
AE1
Y24
AA25
AC10
AD10
SMRCOMPN
SMRCOMPP
SMVREF0
SMVREF1
SMXSLEWIN
SMXSLEWOUT
SMYSLEWIN
SMYSLEWOUT
High = DMI x 4
<12,13> DDR_CLK0#
<12,13> DDR_CLK1#
<14> DDR_CLK3#
<14> DDR_CLK4#
Layout Note:
Route as short
as possible
+VCCP
+VCCP
+1.8VS
R96
R92
<13>
<13>
<14>
<14>
DDR_CKE0
DDR_CKE1
DDR_CKE2
DDR_CKE3
<13>
<13>
<14>
<14>
DDR_CS0#
DDR_CS1#
DDR_CS2#
DDR_CS3#
<13>
<13>
<14>
<14>
DDR_ODT0
DDR_ODT1
DDR_ODT2
DDR_ODT3
1
1
2 80.6_0402_1%
2 80.6_0402_1%
CFG/RSVD
DMI
DDR MUXING
+VCCP
H_SWNG0
Low = DDR-II
CFG6
High = DDR-I
CFG0
CFG1
CFG2
CFG5
CFG6
D15
E17
F15
G17
H17
RSVD23
RSVD24
RSVD25
RSVD1
H19
F29
E27
W2
CFG0
MCH_CLKSEL1
MCH_CLKSEL0
CFG5
CFG6
*
*
MCH_CLKSEL1 <15>
MCH_CLKSEL0 <15>
+VCCP
CFG0
2
R31
1
10K_0402_5%
CFG5
1
R38
1
R41
2
2.2K_0402_5%
2
2.2K_0402_5%
CFG6
+2.5VS
EC_EXTTS#0 2
R12
BM_BUSY#
EXT_TS0#
THRMTRIP#
PWROK
RSTIN#
J26
J27
J18
W27
W25
PM_BMBUSY#
EC_EXTTS#0
H_THERMTRIP#
VGATE
PLT_RST#
DREF_CLKN
DREF_CLKP
DREF_SSCLKP
DREF_SSCLKN
A22
A21
J31
H31
DREFCLK#
DREFCLK
DREF_SSCLK
DREF_SSCLK#
PM
R75
100_0402_1%
2
1
<12,13> DDR_CLK0
<12,13> DDR_CLK1
<14> DDR_CLK3
<14> DDR_CLK4
H_VREF
H_XRCOMP
H_XSCOMP
H_YRCOMP
H_YSCOMP
H_SWNG0
H_SWNG1
H_RS#[0..2]
R35
221_0603_1%
2
1
J11
K1
E6
L1
K2
J13
L3
C71
0.1U_0402_16V4Z
HVREF
HXRCOMP
HXSCOMP
HYRCOMP
HYSCOMP
HXSWING
HYSWING
DMI_RXP0
DMI_RXP1
CLK
H_RESET#
U24
V29
C52
0.1U_0402_16V4Z
<5>
<21> DMI_RXP0
<21> DMI_RXP1
C56
0.1U_0402_16V4Z
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
HDSTBN0#
HDSTBN1#
HDSTBN2#
HDSTBN3#
HDSTBP0#
HDSTBP1#
HDSTBP2#
HDSTBP3#
HDINV0#
HDINV1#
HDINV2#
HDINV3#
H_SWNG1
R94
40.2_0402_1%
2
1
<5>
<5>
<5>
<5>
G5
K8
U1
AA4
G4
L9
U2
AA5
J6
L7
R7
W5
DMI_TXP0
DMI_TXP1
Low = DMI x 2
CFG5
<21> DMI_RXN0
<21> DMI_RXN1
R44
40.2_0402_1%
2
1
<5> H_DSTBP#[0..3]
HCLKN
HCLKP
<21> DMI_TXP0
<21> DMI_TXP1
R50
100_0402_1%
2
1
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
AA3
Y3
DMI_RXN0
DMI_RXN1
1
10K_0402_5%
PM_BMBUSY# <21>
EC_EXTTS#0 <32>
H_THERMTRIP# <5,20>
VGATE
<15,21,32,45>
PLT_RST# <16,17,19,21,23,35>
DREFCLK# <15>
DREFCLK <15>
DREF_SSCLK <15>
DREF_SSCLK# <15>
ALVISO_BGA840
R48
200_0402_1%
2
1
CLK_MCH_BCLK#
CLK_MCH_BCLK
<15> CLK_MCH_BCLK#
<15> CLK_MCH_BCLK
<5> H_DSTBN#[0..3]
V24
W29
+VCCP
R39
100_0402_1%
2
1
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HADSTB0#
HADSTB1#
DMI_TXN0
DMI_TXN1
<21> DMI_TXN0
<21> DMI_TXN1
C62
220P_0402_50V7K
<5> H_ADSTB#0
<5> H_ADSTB#1
A8
B7
A9
A7
J12
F11
H15
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
R57
54.9_0402_1%
2
1
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_ADSTB#0
H_ADSTB#1
F5
F2
E2
J5
F3
G3
F4
E3
J9
F6
J7
J8
J1
F1
K9
G7
K3
K4
P1
R2
K5
J3
J2
L5
U8
K7
U9
V9
R1
K6
U3
R9
V3
V4
R6
P5
P3
R8
P7
P9
W3
R4
R3
R5
U6
U5
V5
V6
W7
W8
W1
V2
W4
Y2
Y5
AA9
AA8
AA1
V7
AA6
Y6
Y8
W9
Y7
C59
0.1U_0402_16V4Z
<5> H_REQ#[0..4]
H_D#[0..63] <5>
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
Alviso
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
R45
54.9_0402_1%
2
1
C6
G11
E12
B8
C11
B11
C9
A11
D12
F13
E11
A13
C12
G12
G14
J14
G13
H14
B13
A14
C13
J15
H12
E13
C14
F14
E14
D13
B14
R58
24.9_0402_1%
2
1
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
R74
24.9_0402_1%
2
1
H_A#[3..31]
HOST
<5>
Refer to page15 for FSB

frequency select
CFG[2:0]
U31B
+1.8V
R34
DDR_VREF
DDR_VREF
1
<12,13,14> DDR_VREF
1K_0402_1%
H_CPUSLP#
R37
H_R_CPUSLP#
1K_0402_1%
2
<5,20> H_CPUSLP#
R47
0_0402_5%
1
2
MCH-R
Note:
Not install MCH-R for Dothan-A,
Install MCH-R for Dothan-B"
Title
5
Size
Document Number
Date:
Alviso(1 of 4)
Sheet

1
Rev
0.5
8
of
48
Sonoma_Platform_MOW_04WW25
U31F
2
U31C
<12,14> DDR_DQS#[0..7]
<13> DDR_AA[0..12]
T4
PAD
T3
T1
<13> DDR_ACAS#
PAD <13> DDR_ARAS#
PAD
<13> DDR_AWE#
<14> DDR_BBA0
<14> DDR_BBA1
<14> DDR_BBA2
<14> DDR_BA[0..13]
<14> DDR_BCAS#
<14> DDR_BRAS#
<14> DDR_BWE#
AA31
AJ30
AF24
AK24
AJ10
AG7
AL5
AD6
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
DDR_DQS0
DDR_DQS1
DDR_DQS2
DDR_DQS3
DDR_DQS4
DDR_DQS5
DDR_DQS6
DDR_DQS7
AB29
AL28
AF25
AJ23
AK10
AG9
AH3
AE2
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
DDR_DQS#0
DDR_DQS#1
DDR_DQS#2
DDR_DQS#3
DDR_DQS#4
DDR_DQS#5
DDR_DQS#6
DDR_DQS#7
AA30
AK28
AF26
AJ24
AL10
AF9
AG5
AF2
SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#
DDR_AA0
DDR_AA1
DDR_AA2
DDR_AA3
DDR_AA4
DDR_AA5
DDR_AA6
DDR_AA7
DDR_AA8
DDR_AA9
DDR_AA10
DDR_AA11
DDR_AA12
DDR_AA13
AC21
AC20
AC19
AD20
AE19
AE20
AF20
AF21
AE21
AA24
AC11
AB23
AB24
AF13
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
AE12
AG15
AC27
AB26
AJ15
SA_CAS#
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#
DDR_BBA0
DDR_BBA1
DDR_BBA2
AJ14
AG14
AL21
SB_BS0
SB_BS1
SB_BS2
DDR_BA0
DDR_BA1
DDR_BA2
DDR_BA3
DDR_BA4
DDR_BA5
DDR_BA6
DDR_BA7
DDR_BA8
DDR_BA9
DDR_BA10
DDR_BA11
DDR_BA12
DDR_BA13
AC12
AE14
AC15
AD14
AG19
AJ19
AJ20
AK20
AL19
AH20
AF14
AL20
AG20
AL13
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
DDR_BCAS#
DDR_BRAS#
DDR_BWE#
AJ13
AH14
AK14
SB_CAS#
SB_RAS#
SB_WE#
DDR_ACAS#
DDR_ARAS#
TP_MA_RCVENIN#
TP_MA_RCVENOUT#
DDR_AWE#
DDR2_
ADDR_A
DDR_DM0
DDR_DM1
DDR_DM2
DDR_DM3
DDR_DM4
DDR_DM5
DDR_DM6
DDR_DM7
DDR2_DQS
<12,14> DDR_DQS[0..7]
SA_BS0
SA_BS1
SA_BS2
DDR2_ADDR_A
DDR2_DATA
<13> DDR_ABA0
PAD <13> DDR_ABA1
<12,14> DDR_DM[0..7]
AE15
AD13
AB25
DDR2_ADDR_B
T2
DDR_ABA0
DDR_ABA1
DDR_ABA2
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
Y27
Y28
AC29
AE29
AA28
AA29
AB31
AC30
AG29
AG28
AJ26
AL26
AG30
AG31
AL27
AK27
AF29
AE28
AE25
AE24
AE27
AF27
AE23
AC26
AL25
AJ25
AG27
AG26
AK25
AL24
AG23
AG24
AK11
AL11
AJ7
AL9
AL12
AJ11
AH9
AJ9
AG10
AF10
AH7
AF6
AH11
AG11
AG6
AE6
AL7
AK7
AK2
AJ2
AK6
AJ6
AK3
AH2
AH1
AG1
AC6
AC7
AF3
AE3
AD3
AC2
DDR_DQ0
DDR_DQ1
DDR_DQ2
DDR_DQ3
DDR_DQ4
DDR_DQ5
DDR_DQ6
DDR_DQ7
DDR_DQ8
DDR_DQ9
DDR_DQ10
DDR_DQ11
DDR_DQ12
DDR_DQ13
DDR_DQ14
DDR_DQ15
DDR_DQ16
DDR_DQ17
DDR_DQ18
DDR_DQ19
DDR_DQ20
DDR_DQ21
DDR_DQ22
DDR_DQ23
DDR_DQ24
DDR_DQ25
DDR_DQ26
DDR_DQ27
DDR_DQ28
DDR_DQ29
DDR_DQ30
DDR_DQ31
DDR_DQ32
DDR_DQ33
DDR_DQ34
DDR_DQ35
DDR_DQ36
DDR_DQ37
DDR_DQ38
DDR_DQ39
DDR_DQ40
DDR_DQ41
DDR_DQ42
DDR_DQ43
DDR_DQ44
DDR_DQ45
DDR_DQ46
DDR_DQ47
DDR_DQ48
DDR_DQ49
DDR_DQ50
DDR_DQ51
DDR_DQ52
DDR_DQ53
DDR_DQ54
DDR_DQ55
DDR_DQ56
DDR_DQ57
DDR_DQ58
DDR_DQ59
DDR_DQ60
DDR_DQ61
DDR_DQ62
DDR_DQ63
DDR_DQ[0..63] <12,14>
ALVISO_BGA840
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
A10
A2
A29
A3
A30
A31
AA10
AA11
AA12
AA13
AA14
AA15
AA16
AA17
AA18
AA19
AA20
AA21
AA22
AB1
AB10
AB11
AB12
AB13
AB14
AB15
AB17
AB19
AB2
AB20
AB21
AB22
AB3
AB5
AB6
AB7
AB9
AC22
AE22
AF22
AG22
AJ1
AJ22
AJ31
AK1
AK22
AK31
AL1
AL2
AL22
AL29
AL3
AL30
AL31
B1
B10
B31
C1
C10
C31
E10
F10
G10
J10
K10
K11
K12
K13
K14
K15
K17
K18
K19
K20
K21
K22
K23
K25
K26
K27
K29
K30
K31
L10
L11
L12
L13
L14
L15
L16
L17
L18
L19
L20
L21
L22
M10
M11
M12
Y20
Y21
Y22
U31G
A15
A18
A20
A25
A27
AA2
AA23
AA26
AA27
AA7
AB28
AB30
AC24
AC28
AC9
AD12
AD15
AD19
AD2
AD21
AD5
AD9
AE10
AE11
AE13
AE26
AE30
AF11
AF15
AF19
AF23
AF28
AF30
AF7
AG2
AG21
AG25
AG3
AH10
AH13
AH15
AH19
AH6
AJ27
AJ3
AK12
AK15
AK19
AK21
AK23
AK26
AK29
AK5
AK9
B12
B15
B22
B27
B4
B6
B9
C15
C17
C19
C2
C25
C30
C8
D11
D14
U23
U25
U27
V28
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSALVDS
B30
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D18
D19
D25
E15
E21
E23
E26
E29
E30
E4
E7
F12
F17
F23
F27
G15
G2
G21
G22
G25
G29
G31
G6
G8
H11
H13
H18
H20
H23
H26
H30
J17
J20
J22
J4
L2
L25
L27
L29
L4
L6
L8
M23
M25
M27
M29
N25
N27
N29
N31
P2
P23
P25
P27
P29
P4
P6
P8
R16
R24
R25
R26
R27
R29
U15
U17
U7
V1
V25
V30
V8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
R16
10K_0402_5%
M13
M14
M15
M16
M17
M18
M19
M20
M21
M22
N10
N11
N12
N13
N14
N15
N16
N17
N18
N19
N20
N21
N22
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
P21
P22
R10
R11
R12
R13
R14
R18
R19
R20
R21
R22
T11
T12
T13
T14
T18
T19
T20
T21
U10
U11
U12
U13
U14
U18
U19
U20
U21
U22
V10
V11
V12
V13
V14
V15
V16
V17
V18
V19
V20
V21
V22
W10
W11
W12
W13
W14
W15
W16
W17
W18
W19
W20
W21
W22
Y10
Y11
Y12
Y13
Y14
Y15
Y16
Y17
Y18
Y19
AB18
U29
U4
W24
W26
W28
W30
W6
Y23
Y25
Y26
Y29
Y31
Y4
Y9
U31
V27
+2.5VS
ALVISO_BGA840
ALVISO_BGA840
Title
5
Size
Document Number
Date:
Alviso(2 of 4)
Sheet

1
Rev
0.5
9
of
48
+1.5VS_PCIE
R28
2
1
2
1
2
1
150_0402_5%
150_0402_5%
150_0402_5%
39_0402_5%
39_0402_5%
<18> CRT_VSYNC
<18> CRT_HSYNC
<17> GM_PWM_L
<17>
ENVDD
1
R8
ENVDD
TXA0TXA1TXA2-
<17>
<17>
<17>
TXA0+
TXA1+
TXA2+
TXACLKTXACLK+
D27
C27
TXA0TXA1TXA2-
F31
D31
D29
TXA0+
TXA1+
TXA2+
E31
D30
C29
SDVO_INT+
TV
LBKLT_CRTL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL
SDVOB_INT+ <16>
SDVO_RC402
SDVO_GSDVO_BSDVO_CLK-
@2CH
C400
@2CH
C406
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
@2CH
@2CH
C405
2CH_SDVOB_R- <17>
2CH_SDVOB_G- <17>
2CH_SDVOB_B- <17>
2CH_SDVOB_CLK- <17>
C
SDVOB_RED#
SDVOB_GREEN#
SDVOB_BLUE#
SDVOB_BLKN
M30
N26
P30
U30
SDVO_RC31
SDVO_GSDVO_BSDVO_CLK-
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C16
C37
C49
SDVOB_R- <16>
SDVOB_G- <16>
SDVOB_B- <16>
SDVOB_CLK- <16>
+2.5VS
SDVO_R+
C401
SDVO_G+
SDVO_B+
SDVO_CLK+
LACLKN
LACLKP
LADATAN0
LADATAN1
LADATAN2
C40
0.1U_0402_16V4Z
+5VS
@2CH
C399
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
@2CH
C404
C403
@2CH
2CH_SDVOB_R+ <17>
2CH_SDVOB_G+ <17>
2CH_SDVOB_B+ <17>
2CH_SDVOB_CLK+ <17>
ENABLT_R
R5
@2CH
SDVOB_RED
SDVOB_GREEN
SDVOB_BLUE
SDVOB_BLKP
LADATAP0
LADATAP1
LADATAP2
L30
M26
N30
R30
SDVO_R+
C21
SDVO_G+
SDVO_B+
SDVO_CLK+
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C12
C34
C46
R4
Q1
1
D
<17>
<17>
<17>
G26
F26
D26
C26
LDDC_CLK
E25
LDDC_DATA
F25
H25
2
1
R302 LIBG 0_0402_5% F30
1.5K_0402_1%
G30
J29
H29
L28
N28
R28
SDVOB_INT- <16>
TXACLKTXACLK+
DDCCLK
DDCDATA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
VSYNC
HSYNC
REFSET
R36
GM_PWM_L
ENABLT_R
SDVO_TVCLKIN
SDVO_INT
SDVO_FLDSTALL
C43
0.1U_0402_16V4Z
<17>
<17>
R33
R1152
R1153
2
SDVO_INT-
CRT_R
J23
J25
D23
C23
E22
D22
F21
F22
G23
H22
J21
1
220_0402_1%
M28
P28
U28
<18>
R25
SDVO_TVCLKIN#
SDVO_INT#
SDVO_FLDSTALL#
CRT_G
P26
L26
2.2K_0402_5%
ENABKL
<17,32>
<18>
EXP_COMPI
EXP_ICOMPO
LVDS
CRT_B
R32
24.9_0402_1%
1
2
BSS138_SOT23
100K_0402_5%
SDVOB_R+ <16>
SDVOB_G+ <16>
SDVOB_B+ <16>
SDVOB_CLK+ <16>
CRT_DDCCL
CRT_DDCDA
<18>
TVDAC_A
TVDAC_B
TVDAC_C
TV_REFSET
TV_IRTNA
TV_IRTNB
TV_IRTNC
VGA
A17
C18
A19
J19
B17
B18
B19
R388
4.99K_0603_1%
2
1
SDVOCTRL_DATA
SDVOCTRL_CLK
GCLKN
GCLKP
PCI - EXPRESS GRAPHICS
H27
G27
V23
W23
<16> SDVO_SDAT
<16> SDVO_SCLK
<15> CLK_MCH_3GPLL#
<15> CLK_MCH_3GPLL
MISC
U31E
ALVISO_BGA840
LCD_DDCCLK
LCD_DDCCLK <17>
CRT_DDCCL
R1155
2.2K_0402_5%
<BOM Structure>
2
R1154
2.2K_0402_5%
2
1
R19
2.2K_0402_5%
1
<BOM Structure>
2
R20
2.2K_0402_5%
2
1
R1
2.2K_0402_5%
Q54 3
2N7002_SOT23
3VDDCCL
3VDDCCL <18,36>
LCD_DDCDATA
CRT_DDCDA
Q55 3
2N7002_SOT23
3VDDCDA
3VDDCDA <18,36>
LCD_DDCDATA <17>
Q3
3
2N7002_SOT23
+2.5VS
2
+2.5VS
A
LDDC_DATA
Q2
3
2N7002_SOT23
+2.5VS
LDDC_CLK
+3VS
<BOM Structure>
2
R2
2.2K_0402_5%
2
1
+2.5VS
Title
5
Size
Document Number
Date:
Alviso(3 of 4)
Sheet

1
Rev
0.5
10
of
48
Note : All VCCSM pin

shorted internally.
+1.5VS
+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
+1.5VS_MPLL
VCCTX_LVDS
VCCTX_LVDS
A26
B26
+2.5VS
VCCA_3GBG
VSSA_3GBG
M31
L31
VCC_SYNC
H21
VCCA_CRTDAC
VCCA_CRTDAC
VSSA_CRTDAC
C20
D21
D20
C50
0.1U_0402_16V4Z
C20
0.022U_0402_16V7K
C10
0.1U_0402_16V4Z
+1.5VS_PCIE
+1.5VS_3GPLL
1
+1.5VS
L4
BLM18PG600SN1_0603
2 3GRLL_R 2
1
0.5_0805_1%
1
R51
1
@
2
+2.5VS_CRT
1
L2 BLM18PG600SN1_0603
1
2
1
+1.5VS
L34
BLM18PG600SN1_0603
2
1
+1.5VS
L6
BLM18PG600SN1_0603
2
1
+2.5VS_3GBG
VCCD_HMPLL1
VCCD_HMPLL2
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
+2.5VS_CRTDAC
2
C82
0.1U_0402_16V4Z
C65
0.1U_0402_16V4Z
P31
R31
R23
+1.5VS_DDRDLL
AC13
AC14
AL15
VCCA_3GPLL
C45
10U_1206_6.3V6M
VCC3G
VCC3G
C33
0.1U_0402_16V4Z
+2.5VS_CRTDAC
C104
0.1U_0402_16V4Z
+2.5VS
B20
C21
C22
+1.5VS
C26
0.1U_0402_16V4Z
B29
VCCHV
VCCHV
VCCHV
+2.5VS
C27
0.1U_0402_16V4Z
VCCA_LVDS
VCCA_SM
VCCA_SM
VCCA_SM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
AC3
AC5
B21
J30
AD1
AC1
+1.5VS
+1.5VS
C72
10U_1206_6.3V6M
A23
B23
B25
C58
0.1U_0402_16V4Z
AD18
AE17
AE18
AF1
AF17
AF18
AH17
AH18
AJ17
AJ18
AK17
AK18
AK30
AL17
AL18
AL23
AL6
AG17
AG18
AC17
AC18
AC31
AD17
10U_1206_6.3V6M
C433
10U_1206_6.3V6M
C432
220U_D2_4VM
C423
C78
0.1U_0402_16V4Z
C75
0.47U_0402_6.3V4Z
C69
0.47U_0402_6.3V4Z
C73
0.47U_0402_6.3V4Z
C76
0.47U_0402_6.3V4Z
C79
0.47U_0402_6.3V4Z
+1.8V
VCCD_LVDS
VCCD_LVDS
VCCD_LVDS
C15
0.1U_0402_16V4Z
E18
D17
C44
0.22U_0603_10V7K
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VCCD_TVDAC
VCCDQ_TVDAC
C18
0.022U_0402_16V7K
A6
A12
E1
M1
M2
M3
M4
M5
M6
M7
M8
M9
N1
N2
N3
N4
N5
N6
N7
N8
N9
Y1
E19
E20
C407
47U_1210_10V3M
C68
2.2U_0805_16V4Z
C51
0.22U_0603_10V7K
C47
4.7U_0805_10V4Z
C64
0.22U_0603_10V7K
C87
0.47U_0603_10V7K
C57
0.47U_0603_10V7K
Route VSSATVBG gnd from GMCH to

decoupling cap ground lead and
then connect to the gnd plane.
VCCA_TVBG
VSSA_TVBG
POWER
C42
0.1U_0402_16V4Z
VCCA_TVDACA
VCCA_TVDACA
VCCA_TVDACB
VCCA_TVDACB
VCCA_TVDACC
VCCA_TVDACC
22U_1206_16V4Z_V1
C88
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
F18
G18
F19
G19
F20
G20
C77
0.1U_0402_16V4Z
L23
L24
M24
N23
N24
P24
R15
R17
T15
T16
T17
U16
C41
0.022U_0402_16V7K
U31D
C85
10U_1206_6.3V6M
+VCCP
C80
10U_1206_6.3V6M
C81
10U_1206_6.3V6M
+VCCP
+2.5VS
L33
BLM18PG600SN1_0603
2
1
1
C38
0.1U_0402_16V4Z
C8
0.1U_0402_16V4Z
Route VSSA3GBG gnd from GMCH to

decoupling cap ground lead and
then connect to the gnd plane.
CRTDAC: Route caps within

250mil of Alviso. Route FB
within 3" of Alviso.
ALVISO_BGA840
Route VSSACRTDAC gnd from GMCH to

decoupling cap ground lead and then
connect to the gnd plane.
+2.5VS
+2.5VS_CRTDAC
R383
0_0805_5%
1
2
C48
0.1U_0402_16V4Z
RB751V_SOD323
C13
10U_1206_6.3V6M
+2.5VS_CRTDAC
C3
0.1U_0402_16V4Z
+VCCP
C2
0.01U_0402_16V7K
2
2
D14
1
C90
+2.5VS
R384
1K_0805_1%
+VCCP_CRTDAC_D1
2
C6
10U_1206_6.3V6M
+1.5VS_MPLL
L5
BLM18PG600SN1_0603
1
2
C93
C19
C32
+1.5VS
22U_1206_16V4Z_V1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C95
+1.5VS
+1.5VS_HPLL
L7
BLM18PG600SN1_0603
1
2
22U_1206_16V4Z_V1
C101
0.1U_0402_16V4Z
+1.5VS
+1.5VS_DPLLB
L1
BLM18PG600SN1_0603
1
2
22U_1206_16V4Z_V1
+1.5VS_DPLLA
L3
BLM18PG600SN1_0603
1
2
C35
22U_1206_16V4Z_V1
C36
0.1U_0402_16V4Z
+1.5VS
Title

Alviso(4 of 4)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom
Date:
Rev
0.5
EDX20 LA-2481
Sheet
1
11
of
48
<9,14> DDR_DM[0..7]
<9,14> DDR_DQS[0..7]
DDR_SDQS[0..7] <13>
<9,14> DDR_DQS#[0..7]
+1.8V
+1.8V
DDR_SDQS#[0..7] <13>
<9,14> DDR_DQ[0..63]
DDR_SDQ[0..63] <13>
RP28
DDR_SAA[0..13] <13>
RP6
DDR_DQ0
DDR_DQ6
1
2
DDR_DM0
22_0404_4P2R_5%
1
2DDR_SDM0
R257
10_0402_5%
4DDR_SDQ0
3DDR_SDQ6
DDR_DQ1
DDR_DQ5
DDR_DQ2
DDR_DQ3
DDR_DQ13
DDR_DQ9
4
3
2
1
DDR_DM1
22_0804_8P4R_5%
1
2DDR_SDM1
R261
10_0402_5%
4DDR_SDQ1
3DDR_SDQ5
1
2
22_0404_4P2R_5%
1
2 DDR_SDQS0
R236
10_0402_5%
DDR_DQS#0 1
2DDR_SDQS#0
R235
10_0402_5%
RP7
DDR_DQ4 4
5DDR_SDQ4
DDR_DQ7 3
6DDR_SDQ7
DDR_DQ12 2
7DDR_SDQ12
DDR_DQ8 1
8DDR_SDQ8
DDR_DQS0
RP30
5DDR_SDQ2
6DDR_SDQ3
7DDR_SDQ13
8DDR_SDQ9
22_0804_8P4R_5%
1
2 DDR_SDQS1
R238
10_0402_5%
1
2DDR_SDQS#1
R237
10_0402_5%
RP16
DDR_DQ10 2
3DDR_SDQ10
DDR_DQ14 1
4DDR_SDQ14
DDR_DQS1
DDR_DQS#1
RP31
DDR_DQ15 2
DDR_DQ11 1
3DDR_SDQ15
4DDR_SDQ11
22_0404_4P2R_5%
RP29
DDR_DQ21 2
3DDR_SDQ21
DDR_DQ20 1
4DDR_SDQ20
22_0404_4P2R_5%
DDR_DQS2 1
2DDR_SDQS2
R226
10_0402_5%
DDR_DQS#21
2DDR_SDQS#2
R225
10_0402_5%
RP9
DDR_DQ23 4
5DDR_SDQ23
DDR_DQ19 3
6DDR_SDQ19
DDR_DQ26 2
7DDR_SDQ26
DDR_DQ25 1
8DDR_SDQ25
2DDR_SDM2
10_0402_5%
1
R268
RP32
DDR_DQ18
DDR_DQ22
DDR_DQ27
DDR_DQ28
5DDR_SDQ18
6DDR_SDQ22
7DDR_SDQ27
8DDR_SDQ28
4
3
2
1
22_0804_8P4R_5%
DDR_DQS3 1
2 DDR_SDQS3
R263
10_0402_5%
DDR_DQS#31
2DDR_SDQS#3
R262 RP33 10_0402_5%
DDR_DQ31 1
4DDR_SDQ31
DDR_DQ29 2
3DDR_SDQ29
DDR_DM3
DDR_DM5
22_0804_8P4R_5%
1
2DDR_SDM6
R258
10_0402_5%
5DDR_SDQ42
6DDR_SDQ46
7DDR_SDQ48
8DDR_SDQ52
4
3
2
1
22_0804_8P4R_5%
1
2 DDR_SDQS6
R232
10_0402_5%
DDR_DQS#6 1
2DDR_SDQS#6
R231
10_0402_5%
RP12
DDR_DQ50 4
5DDR_SDQ50
DDR_DQ51 3
6DDR_SDQ51
DDR_DQ60 2
7DDR_SDQ60
DDR_DQ56 1
8DDR_SDQ56
22_0804_8P4R_5%
1
2DDR_SDQS7
R260
10_0402_5%
1
2DDR_SDQS#7
R259
10_0402_5%
RP27
DDR_DQ62 1
4DDR_SDQ62
DDR_DQ59 2
3DDR_SDQ59
DDR_DM7
22_0804_8P4R_5%
1
2DDR_SDM7
R233
10_0402_5%
RP14
DDR_DQ63 1
DDR_DQ58 2
22_0404_4P2R_5%
NC
NC
NC
NC
NC
NC
DDR_SDQS4
DDR_SDQS#4
DDR_SDM4
DDR_SDQ32
DDR_SDQ33
DDR_SDQ34
DDR_SDQ35
DDR_SDQ36
DDR_SDQ37
DDR_SDQ38
DDR_SDQ39
F7
E8
F3
G8
G2
H7
H3
H1
H9
F1
F9
LDQS
LDQS#
LDM
LDQ0
LDQ1
LDQ2
LDQ3
LDQ4
LDQ5
LDQ6
LDQ7
DDR_SDQS5
DDR_SDQS#5
DDR_SDM5
DDR_SDQ40
DDR_SDQ41
DDR_SDQ42
DDR_SDQ43
DDR_SDQ44
DDR_SDQ45
DDR_SDQ46
DDR_SDQ47
B7
A8
B3
C8
C2
D7
D3
D1
D9
B1
B9
UDQS
UDQS#
UDM
UDQ0
UDQ1
UDQ2
UDQ3
UDQ4
UDQ5
UDQ6
UDQ7
DDR_VREF
J2
VREF
DDR_SAA0
DDR_SAA1
DDR_SAA2
DDR_SAA3
DDR_SAA4
DDR_SAA5
DDR_SAA6
DDR_SAA7
DDR_SAA8
DDR_SAA9
DDR_SAA10
DDR_SAA11
DDR_SAA12
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
R8
R3
R7
A2
E2
L1
NC
NC
NC
NC
NC
NC
4DDR_SDQ63
3DDR_SDQ58
1
2
DDR_CLK0#
DDR_SODT0
DDR_CLK0
DDR_CLK0#
DDR_SCKE0
DDR_SBA0
DDR_SBA1
CS#
RAS#
CAS#
WE#
L8
K7
L7
K3
DDR_SCS0#
DDR_SRAS#
DDR_SCAS#
DDR_SWE#
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSSDL
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
J7
LDQS
LDQS#
LDM
LDQ0
LDQ1
LDQ2
LDQ3
LDQ4
LDQ5
LDQ6
LDQ7
DDR_SDQS3
DDR_SDQS#3
DDR_SDM3
DDR_SDQ24
DDR_SDQ25
DDR_SDQ26
DDR_SODT0 <13>
DDR_SDQ27
DDR_CLK0 <8,13>
DDR_SDQ28
DDR_CLK0# <8,13>
DDR_SDQ29
DDR_SCKE0 <13>
DDR_SDQ30
DDR_SBA0 <13>
DDR_SDQ31
DDR_SBA1 <13>
B7
A8
B3
C8
C2
D7
D3
D1
D9
B1
B9
UDQS
UDQS#
UDM
UDQ0
UDQ1
UDQ2
UDQ3
UDQ4
UDQ5
UDQ6
UDQ7
DDR_VREF
J2
VREF
DDR_SAA0
DDR_SAA1
DDR_SAA2
DDR_SAA3
DDR_SAA4
DDR_SAA5
DDR_SAA6
DDR_SAA7
DDR_SAA8
DDR_SAA9
DDR_SAA10
DDR_SAA11
DDR_SAA12
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
R8
R3
R7
A2
E2
L1
NC
NC
NC
NC
NC
NC
DDR_SCS0#
DDR_SRAS#
DDR_SCAS#
DDR_SWE#
<13>
<13>
<13>
<13>
C1
C3
C7
C9
E9
G1
G3
G7
G9
A9
A1
E1
J9
M9
R1
J1
ODT
CK
CK#
CKE
BA0
BA1
K9
J8
K8
K2
L2
L3
DDR_SODT0
DDR_CLK0
DDR_CLK0#
DDR_SCKE0
DDR_SBA0
DDR_SBA1
CS#
RAS#
CAS#
WE#
L8
K7
L7
K3
DDR_SCS0#
DDR_SRAS#
DDR_SCAS#
DDR_SWE#
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSSDL
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
J7
DDR_SODT0
DDR_CLK0
DDR_CLK0#
DDR_SCKE0
DDR_SBA0
DDR_SBA1
<13>
<8,13>
<8,13>
<13>
<13>
<13>
DDR_SCS0#
DDR_SRAS#
DDR_SCAS#
DDR_SWE#
<13>
<13>
<13>
<13>
+1.8V
U17
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDDL
C1
C3
C7
C9
E9
G1
G3
G7
G9
A9
A1
E1
J9
M9
R1
J1
ODT
CK
CK#
CKE
BA0
BA1
K9
J8
K8
K2
L2
L3
DDR_SODT0
DDR_CLK1
DDR_CLK1#
DDR_SCKE0
DDR_SBA0
DDR_SBA1
CS#
RAS#
CAS#
WE#
L8
K7
L7
K3
DDR_SCS0#
DDR_SRAS#
DDR_SCAS#
DDR_SWE#
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSSDL
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
J7
DDR_SDQS6
DDR_SDQS#6
DDR_SDM6
DDR_SDQ50
DDR_SDQ49
DDR_SDQ52
DDR_SDQ48
DDR_SDQ51
DDR_SDQ53
DDR_SDQ54
DDR_SDQ55
F7
E8
F3
G8
G2
H7
H3
H1
H9
F1
F9
LDQS
LDQS#
LDM
LDQ0
LDQ1
LDQ2
LDQ3
LDQ4
LDQ5
LDQ6
LDQ7
DDR_SDQS7
DDR_SDQS#7
DDR_SDM7
DDR_SDQ56
DDR_SDQ57
DDR_SDQ58
DDR_SODT0 <13>
DDR_SDQ59
DDR_CLK1 <8,13>
DDR_SDQ60
DDR_CLK1# <8,13>
DDR_SDQ61
DDR_SCKE0 <13>
DDR_SDQ62
DDR_SBA0 <13>
DDR_SDQ63
DDR_SBA1 <13>
B7
A8
B3
C8
C2
D7
D3
D1
D9
B1
B9
UDQS
UDQS#
UDM
UDQ0
UDQ1
UDQ2
UDQ3
UDQ4
UDQ5
UDQ6
UDQ7
DDR_VREF
J2
VREF
DDR_SAA0
DDR_SAA1
DDR_SAA2
DDR_SAA3
DDR_SAA4
DDR_SAA5
DDR_SAA6
DDR_SAA7
DDR_SAA8
DDR_SAA9
DDR_SAA10
DDR_SAA11
DDR_SAA12
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
R8
R3
R7
A2
E2
L1
NC
NC
NC
NC
NC
NC
DDR_SCS0#
DDR_SRAS#
DDR_SCAS#
DDR_SWE#
K4T51163QB-GCCC_FBGA84
<13>
<13>
<13>
<13>
C1
C3
C7
C9
E9
G1
G3
G7
G9
A9
A1
E1
J9
M9
R1
J1
ODT
CK
CK#
CKE
BA0
BA1
K9
J8
K8
K2
L2
L3
DDR_SODT0
DDR_CLK1
DDR_CLK1#
DDR_SCKE0
DDR_SBA0
DDR_SBA1
CS#
RAS#
CAS#
WE#
L8
K7
L7
K3
DDR_SCS0#
DDR_SRAS#
DDR_SCAS#
DDR_SWE#
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSSDL
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
J7
DDR_SODT0 <13>
DDR_CLK1 <8,13>
DDR_CLK1# <8,13>
DDR_SCKE0 <13>
DDR_SBA0 <13>
DDR_SBA1 <13>
DDR_SCS0#
DDR_SRAS#
DDR_SCAS#
DDR_SWE#
<13>
<13>
<13>
<13>
Title
Size
Custom
Date:
4
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDDL
5
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDDL
C531
C535
C289
C284
C295
C291
C288
C283
C296
0.1U_0402_16V4Z
2.2U_0805_16V4Z
C532
R283
100_0402_5%
C302
C524
@
DDR_VREF
0.1U_0402_16V4Z
2.2U_0805_16V4Z
3.3P_0402_50V8C
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C294
0.1U_0402_16V4Z
C290
0.1U_0402_16V4Z
C287
2.2U_0805_16V4Z
2.2U_0805_16V4Z
R8
R3
R7
A2
E2
L1
22_0404_4P2R_5%
DDR_CLK0
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
K9
J8
K8
K2
L2
L3
F7
E8
F3
G8
G2
H7
H3
H1
H9
F1
F9
+1.8V
DDR_DQS#7
VREF
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
DDR_DQS6
5DDR_SDQ54
6DDR_SDQ55
7DDR_SDQ61
8DDR_SDQ57
4
3
2
1
J2
DDR_SAA0
DDR_SAA1
DDR_SAA2
DDR_SAA3
DDR_SAA4
DDR_SAA5
DDR_SAA6
DDR_SAA7
DDR_SAA8
DDR_SAA9
DDR_SAA10
DDR_SAA11
DDR_SAA12
ODT
CK
CK#
CKE
BA0
BA1
DDR_SDQS2
DDR_SDQS#2
DDR_SDM2
DDR_SDQ16
DDR_SDQ17
DDR_SDQ18
DDR_SDQ19
DDR_SDQ20
DDR_SDQ21
DDR_SDQ22
DDR_SDQ23
U16
22_0804_8P4R_5%
1
2DDR_SDM5
R230
10_0402_5%
DDR_DQ42
DDR_DQ46
DDR_DQ48
DDR_DQ52
DDR_DQS7
DDR_VREF
4DDR_SDQ37
3DDR_SDQ32
RP11
RP37
UDQS
UDQS#
UDM
UDQ0
UDQ1
UDQ2
UDQ3
UDQ4
UDQ5
UDQ6
UDQ7
C1
C3
C7
C9
E9
G1
G3
G7
G9
A9
A1
E1
J9
M9
R1
J1
22_0404_4P2R_5%
DDR_DQS4 1
2DDR_SDQS4
R229
10_0402_5%
DDR_DQS#41
2DDR_SDQS#4
R228
10_0402_5%
RP15
DDR_DQ39 4
5DDR_SDQ39
DDR_DQ38 3
6DDR_SDQ38
DDR_DQ41 2
7DDR_SDQ41
DDR_DQ40 1
8DDR_SDQ40
5DDR_SDQ35
6DDR_SDQ34
7DDR_SDQ45
8DDR_SDQ44
4
3
2
1
+1.8V
B7
A8
B3
C8
C2
D7
D3
D1
D9
B1
B9
4DDR_SDQ24
3DDR_SDQ30
DDR_DQ37 1
DDR_DQ32 2
22_0804_8P4R_5%
DDR_DQS5 1
2 DDR_SDQS5
R266
10_0402_5%
DDR_DQS#51
2DDR_SDQS#5
R265
10_0402_5%
RP36
DDR_DQ43 4
5DDR_SDQ43
DDR_DQ47 3
6DDR_SDQ47
DDR_DQ49 2
7DDR_SDQ49
DDR_DQ53 1
8DDR_SDQ53
DDR_DQ54
DDR_DQ55
DDR_DQ61
DDR_DQ57
DDR_SDQS1
DDR_SDQS#1
DDR_SDM1
DDR_SDQ8
DDR_SDQ9
DDR_SDQ10
DDR_SDQ11
DDR_SDQ12
DDR_SDQ13
DDR_SDQ14
DDR_SDQ15
U15
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDDL
RP13
4DDR_SDQ36
3DDR_SDQ33
22_0404_4P2R_5%
1
2DDR_SDM4
R264
10_0402_5%
DDR_DM6
LDQS
LDQS#
LDM
LDQ0
LDQ1
LDQ2
LDQ3
LDQ4
LDQ5
LDQ6
LDQ7
22_0404_4P2R_5%
RP35
F7
E8
F3
G8
G2
H7
H3
H1
H9
F1
F9
RP10
DDR_DQ24 1
DDR_DQ30 2
RP34
DDR_DQ36 1
DDR_DQ33 2
DDR_DQ35
DDR_DQ34
DDR_DQ45
DDR_DQ44
U14
DDR_SDQS0
DDR_SDQS#0
DDR_SDM0
DDR_SDQ0
DDR_SDQ1
DDR_SDQ2
DDR_SDQ3
DDR_SDQ4
DDR_SDQ5
DDR_SDQ6
DDR_SDQ7
22_0804_8P4R_5%
1
2DDR_SDM3
R227
10_0402_5%
22_0404_4P2R_5%
DDR_DM4
<8,13,14> DDR_VREF
22_0404_4P2R_5%
RP8
DDR_DQ16 2
3DDR_SDQ16
DDR_DQ17 1
4DDR_SDQ17
22_0404_4P2R_5%
DDR_DM2
DDR_SDM[0..7] <13>

DDRII-SODIMM
SLOT1
Document Number
Rev
0.5
EDX20 LA-2481
Sheet

1
12
of
48
DDR_SDM[0..7] <12>
DDR_SDQS[0..7] <12>
DDR_SDQ[0..63] <12>
DDR_SAA[0..13] <12>
Layout Note:
Place these resistor
closely JP33,all
trace length<750 mil
RP60
<8> DDR_CKE1
1
2
3
4
DDR_AA6
DDR_AA5
DDR_AA4
DDR_AA3
1
2
3
4
DDR_CKE0
DDR_AA0
DDR_AA1
DDR_AA2
<8> DDR_CKE0
<9> DDR_ABA0
<9> DDR_AWE#
<9> DDR_ARAS#
DDR_CKE1
DDR_AA12
DDR_AA7
DDR_AA8
<8> DDR_CS1#
<9> DDR_ABA1
<8> DDR_ODT0
<8> DDR_ODT1
<9> DDR_ACAS#
<8> DDR_CS0#
1
2
3
4
8
7
6
5
DDR_SCKE1
DDR_SAA12
DDR_SAA7
DDR_SAA8
10_0804_8P4R_5%
RP59
8 DDR_SAA6
7 DDR_SAA5
6 DDR_SAA4
5 DDR_SAA3
+0.9VS
RP38
DDR_CKE1
DDR_AA12
DDR_AA7
DDR_AA8
<8> DDR_CKE1
10_0804_8P4R_5%
RP58
8 DDR_SCKE0
7 DDR_SAA0
6 DDR_SAA1
5 DDR_SAA2
DDR_AA11 1
DDR_ABA0 2
DDR_AWE#3
DDR_ARAS#4
10_0804_8P4R_5%
RP57
8 DDR_SAA11
7 DDR_SBA0
6 DDR_SWE#
5 DDR_SRAS#
DDR_AA9
DDR_CS1#
DDR_ABA1
DDR_ODT0
1
2
3
4
10_0804_8P4R_5%
RP56
8 DDR_SAA9
7 DDR_SCS1#
6 DDR_SBA1
5 DDR_SODT0
DDR_ODT1 1
DDR_ACAS#2
DDR_CS0# 3
DDR_AA10 4
10_0804_8P4R_5%
RP55
8 DDR_SODT1
7 DDR_SCAS#
6 DDR_SCS0#
5 DDR_SAA10
DDR_AA6
DDR_AA5
DDR_AA4
DDR_AA3
RP41
4
3
2
1
DDR_SCKE0 <12>
5
6
7
8
DDR_CKE0
DDR_AA0
DDR_AA1
DDR_AA2
56_0804_8P4R_5%
RP39
RP42
5
6
7
8
56_0804_8P4R_5%
RP40
RP43
5
6
7
8
DDR_CS1# <8>
DDR_ABA1 <9>
DDR_ODT0 <8>
4 DDR_ODT1
3 DDR_ACAS#
2 DDR_CS0#
1 DDR_AA10
5
6
7
8
56_0804_8P4R_5%
DDR_ABA0 <9>
DDR_AWE# <9>
DDR_ARAS# <9>
4 DDR_AA9
3 DDR_CS1#
2 DDR_ABA1
1 DDR_ODT0
5
6
7
8
56_0804_8P4R_5%
4
3
2
1
DDR_SBA1 <12>
DDR_SODT0 <12>
4 DDR_AA11
3 DDR_ABA0
2DDR_AWE#
1 DDR_ARAS#
5
6
7
8
56_0804_8P4R_5%
4
3
2
1
DDR_SBA0 <12>
DDR_SWE# <12>
DDR_SRAS# <12>
<8> DDR_CKE0
+1.8V
+1.8V
U47
DDR_SDQS#[0..7] <12>
<9> DDR_AA[0..13]
DDR_SDQS0
DDR_SDQS#0
DDR_SDM0
DDR_SDQ1
DDR_SDQ0
DDR_SDQ3
DDR_SDQ2
DDR_SDQ5
DDR_SDQ4
DDR_SDQ7
DDR_SDQ6
F7
E8
F3
G8
G2
H7
H3
H1
H9
F1
F9
LDQS
LDQS#
LDM
LDQ0
LDQ1
LDQ2
LDQ3
LDQ4
LDQ5
LDQ6
LDQ7
DDR_SDQS1
DDR_SDQS#1
DDR_SDM1
DDR_SDQ9
DDR_SDQ8
DDR_SDQ11
DDR_SDQ10
DDR_SDQ13
DDR_SDQ12
DDR_SDQ15
DDR_SDQ14
B7
A8
B3
C8
C2
D7
D3
D1
D9
B1
B9
UDQS
UDQS#
UDM
UDQ0
UDQ1
UDQ2
UDQ3
UDQ4
UDQ5
UDQ6
UDQ7
DDR_VREF
J2
VREF
DDR_SAA0
DDR_SAA1
DDR_SAA2
DDR_SAA3
DDR_SAA4
DDR_SAA5
DDR_SAA6
DDR_SAA7
DDR_SAA8
DDR_SAA9
DDR_SAA10
DDR_SAA11
DDR_SAA12
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
R8
R3
R7
A2
E2
L1
NC
NC
NC
NC
NC
NC
DDR_ODT1 <8>
DDR_ACAS# <9>
DDR_CS0# <8>
56_0804_8P4R_5%
U46
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDDL
C1
C3
C7
C9
E9
G1
G3
G7
G9
A9
A1
E1
J9
M9
R1
J1
ODT
CK
CK#
CKE
BA0
BA1
K9
J8
K8
K2
L2
L3
DDR_SODT1
DDR_CLK0
DDR_CLK0#
DDR_SCKE1
DDR_SBA0
DDR_SBA1
CS#
RAS#
CAS#
WE#
L8
K7
L7
K3
DDR_SCS1#
DDR_SRAS#
DDR_SCAS#
DDR_SWE#
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSSDL
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
J7
DDR_SDQS2
DDR_SDQS#2
DDR_SDM2
DDR_SDQ17
DDR_SDQ16
DDR_SDQ19
DDR_SDQ18
DDR_SDQ21
DDR_SDQ20
DDR_SDQ23
DDR_SDQ22
F7
E8
F3
G8
G2
H7
H3
H1
H9
F1
F9
LDQS
LDQS#
LDM
LDQ0
LDQ1
LDQ2
LDQ3
LDQ4
LDQ5
LDQ6
LDQ7
DDR_SDQS3
DDR_SDQS#3
DDR_SDM3
DDR_SDQ25
DDR_SDQ24
DDR_SDQ27
DDR_SDQ26
DDR_CLK0 <8,12>
DDR_SDQ29
DDR_CLK0# <8,12>
DDR_SDQ28
DDR_SDQ31
DDR_SBA0 <12>
DDR_SDQ30
DDR_SBA1 <12>
B7
A8
B3
C8
C2
D7
D3
D1
D9
B1
B9
UDQS
UDQS#
UDM
UDQ0
UDQ1
UDQ2
UDQ3
UDQ4
UDQ5
UDQ6
UDQ7
DDR_VREF
J2
VREF
DDR_SRAS# <12>
DDR_SCAS# <12>
DDR_SWE# <12>
DDR_SAA0
DDR_SAA1
DDR_SAA2
DDR_SAA3
DDR_SAA4
DDR_SAA5
DDR_SAA6
DDR_SAA7
DDR_SAA8
DDR_SAA9
DDR_SAA10
DDR_SAA11
DDR_SAA12
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
R8
R3
R7
A2
E2
L1
NC
NC
NC
NC
NC
NC
1 R178
1
R186
1
2
2@ 10K_0402_5%2
@ 10K_0402_5%3
+3VS
EEPROM
WP
SCL
SDA
VDD
GND
0.1U_0402_16V4Z
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V_DDR_VTT
U10
R185 @ 10K_0402_5%
7
1
2
ICH_SMBDATA
6
ICH_SMBCLK
5
<14,15,17,21,35> ICH_SMBDATA
<14,15,17,21,35> ICH_SMBCLK
C141
SA0
SA1
SA2
@ 24LC256T-I/ST_TSSOP8
+0.9VS
2
C299
C534
C300
C303
C261
C262
C263
C264
C265
C266
C267
C268
C269
C270
C271
0.1U_0402_16V4Z
2.2U_0805_16V4Z
0.1U_0402_16V4Z
+1.8V
1
DDR_CLK1
1
CS#
RAS#
CAS#
WE#
L8
K7
L7
K3
DDR_SCS1#
DDR_SRAS#
DDR_SCAS#
DDR_SWE#
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSSDL
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
J7
DDR_CLK0 <8,12>
DDR_CLK0# <8,12>
DDR_SBA0 <12>
DDR_SBA1 <12>
DDR_SRAS# <12>
DDR_SCAS# <12>
DDR_SWE# <12>
+1.8V
F7
E8
F3
G8
G2
H7
H3
H1
H9
F1
F9
LDQS
LDQS#
LDM
LDQ0
LDQ1
LDQ2
LDQ3
LDQ4
LDQ5
LDQ6
LDQ7
DDR_SDQS5
DDR_SDQS#5
DDR_SDM5
DDR_SDQ41
DDR_SDQ40
DDR_SDQ43
DDR_SDQ42
DDR_SDQ45
DDR_SDQ44
DDR_SDQ47
DDR_SDQ46
B7
A8
B3
C8
C2
D7
D3
D1
D9
B1
B9
UDQS
UDQS#
UDM
UDQ0
UDQ1
UDQ2
UDQ3
UDQ4
UDQ5
UDQ6
UDQ7
J2
VREF
C526
R284
100_0402_5%
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
R8
R3
R7
A2
E2
L1
NC
NC
NC
NC
NC
NC
C1
C3
C7
C9
E9
G1
G3
G7
G9
A9
A1
E1
J9
M9
R1
J1
ODT
CK
CK#
CKE
BA0
BA1
K9
J8
K8
K2
L2
L3
DDR_SODT1
DDR_CLK1
DDR_CLK1#
DDR_SCKE1
DDR_SBA0
DDR_SBA1
CS#
RAS#
CAS#
WE#
L8
K7
L7
K3
DDR_SCS1#
DDR_SRAS#
DDR_SCAS#
DDR_SWE#
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSSDL
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
J7
DDR_SDQS6
DDR_SDQS#6
DDR_SDM6
DDR_SDQ49
DDR_SDQ50
DDR_SDQ48
DDR_SDQ52
DDR_SDQ53
DDR_SDQ51
DDR_SDQ55
DDR_SDQ54
F7
E8
F3
G8
G2
H7
H3
H1
H9
F1
F9
LDQS
LDQS#
LDM
LDQ0
LDQ1
LDQ2
LDQ3
LDQ4
LDQ5
LDQ6
LDQ7
DDR_SDQS7
DDR_SDQS#7
DDR_SDM7
DDR_SDQ57
DDR_SDQ56
DDR_SDQ59
DDR_SDQ58
DDR_CLK1 <8,12>
DDR_SDQ61
DDR_CLK1# <8,12>
DDR_SDQ60
DDR_SDQ63
DDR_SBA0 <12>
DDR_SDQ62
DDR_SBA1 <12>
B7
A8
B3
C8
C2
D7
D3
D1
D9
B1
B9
UDQS
UDQS#
UDM
UDQ0
UDQ1
UDQ2
UDQ3
UDQ4
UDQ5
UDQ6
UDQ7
DDR_VREF
J2
VREF
DDR_SRAS# <12>
DDR_SCAS# <12>
DDR_SWE# <12>
DDR_SAA0
DDR_SAA1
DDR_SAA2
DDR_SAA3
DDR_SAA4
DDR_SAA5
DDR_SAA6
DDR_SAA7
DDR_SAA8
DDR_SAA9
DDR_SAA10
DDR_SAA11
DDR_SAA12
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
R8
R3
R7
A2
E2
L1
NC
NC
NC
NC
NC
NC
DDR_SAA0
DDR_SAA1
DDR_SAA2
DDR_SAA3
DDR_SAA4
DDR_SAA5
DDR_SAA6
DDR_SAA7
DDR_SAA8
DDR_SAA9
DDR_SAA10
DDR_SAA11
DDR_SAA12
U44
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDDL
C1
C3
C7
C9
E9
G1
G3
G7
G9
A9
A1
E1
J9
M9
R1
J1
ODT
CK
CK#
CKE
BA0
BA1
K9
J8
K8
K2
L2
L3
DDR_SODT1
DDR_CLK1
DDR_CLK1#
DDR_SCKE1
DDR_SBA0
DDR_SBA1
CS#
RAS#
CAS#
WE#
L8
K7
L7
K3
DDR_SCS1#
DDR_SRAS#
DDR_SCAS#
DDR_SWE#
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSSDL
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
J7
DDR_CLK1 <8,12>
DDR_CLK1# <8,12>
DDR_SBA0 <12>
DDR_SBA1 <12>
DDR_SRAS# <12>
DDR_SCAS# <12>
DDR_SWE# <12>
Title
Size
Custom
Date:
4
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDDL
DDR_CLK1#
@ 3.3P_0402_50V8C
5
DDR_SODT1
DDR_CLK0
DDR_CLK0#
DDR_SCKE1
DDR_SBA0
DDR_SBA1
C181
C517
C523
C518
C297
C293
C298
C292
C516
C521
C510
C514
C515
C509
C520
C513
C519
C512
150U_D2_4VM
C522
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
DDR_SDQS4
DDR_SDQS#4
DDR_SDM4
DDR_SDQ33
DDR_SDQ32
DDR_SDQ35
DDR_SDQ34
DDR_SDQ37
DDR_SDQ36
DDR_SDQ39
DDR_SDQ38
DDR_VREF
<8,12,14> DDR_VREF
2.2U_0805_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C272
C253
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
K9
J8
K8
K2
L2
L3
U45
ODT
CK
CK#
CKE
BA0
BA1
+1.8V
+3VS
C1
C3
C7
C9
E9
G1
G3
G7
G9
A9
A1
E1
J9
M9
R1
J1
DDR_SCAS# <12>
DDR_SCS0# <12>
10_0804_8P4R_5%
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDDL

DDRII-SODIMM SLOT1
Document Number
Rev
0.5
EDX20 LA-2481
Sheet

1
13
of
48
<9,12> DDR_DQ[0..63]
DDR_DQ4
DDR_DQ7
+1.8V
DDR_DQ12
DDR_DQ8
DDR_CLK3
C250
2
DDR_CLK3#
DDR_DQ10
DDR_DQ14
C251
DDR_CLK4#
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
DDR_DQ16
DDR_DQ17
DDR_DQ23
DDR_DQ19
DDR_DQ26
DDR_DQ25
DDR_DM3
DDR_DQ24
DDR_DQ30
<8>
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V_DDR_VTT
<9>
DDR_CKE2
DDR_BBA2
DDR_CKE2
DDR_BBA2
DDR_BA12
DDR_BA9
DDR_BA8
DDR_BA5
DDR_BA3
DDR_BA1
+0.9VS
<9> DDR_BCAS#
<8> DDR_CS3#
1
<8> DDR_ODT3
DDR_BA10
DDR_BBA0
DDR_BWE#
DDR_BCAS#
DDR_CS3#
DDR_ODT3
DDR_DQ37
DDR_DQ32
DDR_DQS#4
DDR_DQS4
C254
C255
C256
C257
C258
C223
C222
C221
C220
C219
C218
C217
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C216
0.1U_0402_16V4Z
0.1U_0402_16V4Z
<9> DDR_BBA0
<9> DDR_BWE#
DDR_DQ39
DDR_DQ38
DDR_DQ41
DDR_DQ40
DDR_DM5
DDR_DQ42
DDR_DQ46
+0.9VS
DDR_DQ48
DDR_DQ52
RP24
DDR_CKE3
DDR_BA11
DDR_BA7
DDR_BA6
8
7
6
5
RP20
1
2
3
4
8
7
6
5
56_0804_8P4R_5%
8
7
6
5
1
2
3
4
8
7
6
5
DDR_DQ50
DDR_DQ51
1
2
3
4
DDR_BA8
DDR_BA5
DDR_BA3
DDR_BA1
DDR_DQ60
DDR_DQ56
DDR_DM7
DDR_DQ63
DDR_DQ58
56_0804_8P4R_5%
RP26
RP22
1
2
3
4
8
7
6
5
DDR_BA10
DDR_BBA0
DDR_BWE#
DDR_BCAS#
<13,15,17,21,35> ICH_SMBDATA
<13,15,17,21,35> ICH_SMBCLK
ICH_SMBDATA
ICH_SMBCLK
+3VS
56_0804_8P4R_5%
C230
RP23
8
7
6
5
0.1U_0402_16V4Z
1
2
3
4
DDR_DM0
DDR_DQ2
DDR_DQ3
DDR_CS3#
DDR_ODT3
DDR_DM1
DDR_CLK3
DDR_CLK3#
DDR_CLK3 <8>
DDR_CLK3# <8>
DDR_DQ15
DDR_DQ11
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
FOX_ASOA426-M2R-TR
SO-DIMM B
REVERSE
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
DDR_DQ21
DDR_DQ20
DDR_DM2
DDR_DQ18
DDR_DQ22
DDR_DQ27
DDR_DQ28
DDR_DQS#3
DDR_DQS3
DDR_DQ31
DDR_DQ29
DDR_CKE3
DDR_BA11
DDR_BA7
DDR_BA6
DDR_BA4
DDR_BA2
DDR_BA0
DDR_BBA1
DDR_BRAS#
DDR_CS2#
DDR_BBA1 <9>
DDR_BRAS# <9>
DDR_CS2# <8>
DDR_ODT2
DDR_BA13
DDR_ODT2 <8>
DDR_DQ36
DDR_DQ33
DDR_DM4
DDR_DQ35
DDR_DQ34
DDR_DQ45
DDR_DQ44
B
DDR_DQS#5
DDR_DQS5
DDR_DQ43
DDR_DQ47
DDR_DQ49
DDR_DQ53
DDR_CLK4
DDR_CLK4#
DDR_CLK4 <8>
DDR_CLK4# <8>
DDR_DM6
DDR_DQ54
DDR_DQ55
DDR_DQ61
DDR_DQ57
DDR_DQS#7
DDR_DQS7
DDR_DQ62
DDR_DQ59
R273
1

DDRII-SODIMM SLOT2
Size
Document Number
Date:
+3VS
10K_0402_5%
Title
DDR_CKE3 <8>
4
DDR_DQ13
DDR_DQ9
56_0804_8P4R_5%
R272
56_0804_8P4R_5%
1
2
3
4
DDR_DQ0
DDR_DQ6
10K_0402_5%
8
7
6
5
DDR_DQS#6
DDR_DQS6
RP21
56_0804_8P4R_5%
DDR_BRAS#
DDR_CS2#
DDR_ODT2
DDR_BA13
DDR_CKE2
DDR_BBA2
DDR_BA12
DDR_BA9
Layout Note:
Place these resistor
closely JP33,all
trace length<750 mil
56_0804_8P4R_5%
RP25
DDR_BA4
DDR_BA2
DDR_BA0
DDR_BBA1
1
2
3
4
DDR_VREF <8,12,13>
DDR_DQS#2
DDR_DQS2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
10P_0402_50V8J
10P_0402_50V8J
DDR_DQS#1
DDR_DQS1
DDR_CLK4
C497
C197
C496
2.2U_0805_16V4Z
0.1U_0402_16V4Z
C498
C198
2.2U_0805_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C199
C200
C495
0.1U_0402_16V4Z
2.2U_0805_16V4Z
C201
+
C180
150U_D2_4VM
2.2U_0805_16V4Z
2.2U_0805_16V4Z
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
C229
DDR_DQS#0
DDR_DQS0
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
C228
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
DDR_DQ1
DDR_DQ5
<9> DDR_BA[0..13]
DDR_VREF
JP19
2.2U_0805_16V4Z
<9,12> DDR_DQS[0..7]
+1.8V
0.1U_0402_16V4Z
Layout Note:
Place near JP33
<9,12> DDR_DM[0..7]
+1.8V
<9,12> DDR_DQS#[0..7]
Sheet

1
14
of
Rev
0.5
48
C435
0.1U_0402_16V4Z
+3VS
Dothan A step
FSC
FSB
FSA
CLKSEL0
CLKSEL1
CLKSEL2
133
100
33.3
100
100
33.3
Width=40mils
2
L37
CHB2012U121_0805
CPU SRC PCI

MHz MHz MHz
FSB
FSA
CLKSEL2
0
1
0
0
133
1
2
L36
CHB2012U121_0805
CLK-Ra
100
CLK-Rb
V
Place crystal within
500 mils of CK410M
C111
33P_0402_50V8J
2
1
CLK-Rc
0 Ohm
Dothan-A PSB533
OPEN
1K Ohm
OPEN
Dothan-B
0 Ohm
OPEN
OPEN
C110
33P_0402_50V8J
2
1
+VCCP
<24> SD_CLKIN
<21> CLK_48M_ICH
<17> CLK_14M_LVDS
<35> CLK_PCI_TPM
CK_XTAL_IN
CLK_PCI_TPM
<26> CLK_PCI_MINI
CLK_PCI_MINI
<35> CLK_PCI_SIO
CLK_PCI_SIO
2
2
2
R91
R109
CLK_PCI_ICH
CLK_PCI_EC
R70
+3VS
MCH_CLKSEL0 <8>
2
2
R52
R132
1K_0402_5%
1
@ 12_0402_5%
1
R76
1
12_0402_5%
1
12_0402_5%
1
33_0402_5%
1
33_0402_5%
1
33_0402_5%
1
33_0402_5%
1
33_0402_5%
2
10K_0402_5%
<13,14,17,21,35> ICH_SMBCLK
<13,14,17,21,35> ICH_SMBDATA
R126
@ 0_0402_5%
CLK-Ra
1
C443
0.047U_0402_16V4Z
2
C447
0.047U_0402_16V4Z
2
C427
0.047U_0402_16V4Z
2
C428
0.047U_0402_16V4Z
2
C425
0.047U_0402_16V4Z
2
C442
0.047U_0402_16V4Z
2
C426
0.047U_0402_16V4Z
2
CLKSEL0
CLK-Rc
1
1
R130
VDDA
37
GNDA
38
VDDPCI_0
VDDPCI_1
VDDCPU
VDDREF
11
VDD48
50
1 10K_0402_5%
1 12_0402_5%
1 12_0402_5%
R138
0_0402_5%
B
1
C444
0.047U_0402_16V4Z
2
VDDSRC_0
VDDSRC_1
VDDSRC_2
42
48
PCI/SRC_STOP#
55
PM_STP_PCI#
CPU_STOP#
54
PM_STP_CPU#
CK_CPU1 1
R122
CK_CPU1# 1
R121
CLK_MCH_BCLK
2
33_0402_5%
CLK_MCH_BCLK#
2
33_0402_5%
CK_CPU0
1
R124
CK_CPU0# 1
R123
CLK_CPU_BCLK
2
33_0402_5%
CLK_CPU_BCLK#
2
33_0402_5%
CK_CPU2
CK_ITP
2
33_0402_5%
CK_ITP#
2
33_0402_5%
CPUCLKT1
41
CPUCLKC1
40
CPUCLKT0
44
CPUCLKC0
43
XOUT
12
53
FS_A/USB_48MHz
FS_C/TEST_SEL/REF1
CPUCLKT2_ITP/SRCCLKT_7
CPUCLKC2_ITP/SRCCLKC_7
35
33
FS_B/TEST_MODE
1
R120
CK_CPU2# 1
R119
PCICLK5
PCICLK4
PCICLK4
SRCCLKT6/CLKREQA#
PCICLK3
PCICLK3
SRCCLKC6/CLKREQB#
32
PCICLK2
56
SRCCLKT5
31
SRC5
SRCCLKC5
30
SRC5#
PCICLKF0
PCICLK2/SEL_CLKREQ
PCICLK_F1/96*_100MSEL
PCICLK_F0/ITP_EN
SRCCLKT4_SATA
26
ICH_SMBCLK
46
SCLK
SRCCLKC4_SATA
27
ICH_SMBDATA
47
SDATA
CLKIREF
2
475_0402_1%
39
PM_STP_CPU# <21>
CLK_MCH_BCLK <8>
CLK_MCH_BCLK# <8>
CLK_CPU_BCLK <5>
CLK_MCH_BCLK
2 R142 1
49.9_0402_1%
CLK_MCH_BCLK# 2 R141 1
49.9_0402_1%
CLK_CPU_BCLK
CLK_CPU_BCLK# <5>
2 R144 1
49.9_0402_1%
CLK_CPU_BCLK# 2 R143 1
49.9_0402_1%
36
PCICLK5
96*_100MSEL
PM_STP_PCI# <21>
XIN
49
16
R72
2
1
1
R90
<32> CLK_PCI_EC
CLK_14M_LVDS
R7
CLKSEL1
CLK_PCI_LOM
<19> CLK_PCI_ICH
CLK-Rb
CK_XTAL_OUT
R69 2
SD_CLKIN
R68 2
CLK_48M_ICH R87 2
CLK_PCI_PCM
<24> CLK_PCI_PCM
R113
@ 1K_0402_5%
Y2
14.31818MHZ_20P_6X1430004201
R71
<27> CLK_PCI_LOM
+VCCP
10U_1206_6.3V6M
33.3
OPEN
CPU_BSEL0
C434
1
7
OPEN
<6>
1U_0603_10V4Z
33.3
Dothan-A PSB400
CLKSEL0
1
C446
0.047U_0402_16V4Z
2
U8
C431
21
28
34
CPU Type
100
100
1
C445
0.047U_0402_16V4Z
2
Width=40mils
CPU SRC PCI

MHz MHz MHz
10U_1206_6.3V6M
CK_VDD_MAIN2
CLKSEL1
C437
Dothan B step
FSC
CK_VDD_MAIN
CLKSEL0
SRCCLKT3
24
SRCCLKC3
25
1
R118
1
R117
CLK_PCIE_ICH
2
33_0402_5%
CLK_PCIE_ICH#
2
33_0402_5%
CK_ITP
<5>
CK_ITP#
<5>
CK_ITP
2 R140 1
49.9_0402_1%
CK_ITP#
2 R139 1
49.9_0402_1%
CLK_PCIE_ICH
R135 2
1
49.9_0402_1%
CLK_PCIE_ICH#
R134 2
1
49.9_0402_1%
CLK_PCIE_ICH <21>
CLK_PCIE_ICH# <21>
IREF
SRCCLKT2
22
SRCCLKC2
23
+VCCP
19
SCR1
20
SRC1#
SSCLK
SRCCLKT1
SRCCLKC1
13
GND_0
29
GND_1
96_100MSST/SRCCLKT0
17
GND_2
96_100MSSC/SRCCLKC0
18
45
GND_3
51
GND_4
DOTT_96MHz
DOTC_96MHz
14
15
GND_5
R83
@ 1K_0402_5%
R65
1K_0402_5%
R84
0_0402_5%
+3VS
DOT96
DREFCLK
2
33_0402_5%
DREFCLK#
2
33_0402_5%
DOT96#
1
R86
1
R85
CLK_EN#
Q4
2N7002_SOT23 D
R89
10K_0402_5%
@
SS frequency selection
96*_100MSEL
R59
@ 0_0402_5%
DREF_SSCLK
2
33_0402_5%
DREF_SSCLK#
2
33_0402_5%
MCH_CLKSEL1 <8>
CPU_BSEL1
<6>
1
R82
SSCLK# 1
R81
96_100MSST/C
96*_100MSEL
A
IDTCV140PAG_TSSOP56
R60
96 MHZ
HIGH
100 MHZ
10
REF0/FS_D
52
DREF_SSCLK <8>
DREFCLK# <8>
2
G
+3VS
VGATE
R62 2
1
49.9_0402_1%
CLK_MCH_3GPLL# 1
R61 2
49.9_0402_1%
DREF_SSCLK
R64 2
1
49.9_0402_1%
DREF_SSCLK#
R63 2
1
49.9_0402_1%
DREFCLK
R67 2
1
49.9_0402_1%
DREFCLK#
R66 2
1
49.9_0402_1%
DREFCLK <8>
2
10K_0402_5%
REFOUT 1
R131
1
R125
CLK_14M_SIO
2
12_0402_5%
CLK_14M_CODEC
2
12_0402_5%
CLK_14M_ICH
2
12_0402_5%
4
CLK_MCH_3GPLL
DREF_SSCLK# <8>
<8,21,32,45>
CLK_14M_SIO <35>
CLK_14M_CODEC <29>
CLK_14M_ICH <21>
Title
CLK_MCH_3GPLL# <10>
1
R137
1K_0402_5%
L OW
VTT_PWRGD#/PD
1
R88
CLK_MCH_3GPLL <10>
CLKSEL1
CLK_MCH_3GPLL
2
33_0402_5%
CLK_MCH_3GPLL#
2
33_0402_5%
1
R80
1
R79

Clock Generator
Size
Document Number
Date:
Rev
0.5
Sheet

1
15
of
48
DVI CONTROLLER
L38
DVI_DVDD_1.8V
<10> SDVOB_B+
<10> SDVOB_B-
43
44
SDB+
SDB-
HTPLG
29
<10> SDVOB_CLK+
<10> SDVOB_CLK-
46
47
SDC+
SDC-
PVCC1
VCC
11
10
2
1
+3VS
SDSCL
SDSDA
34
35
GND
TEST
GND
SGND
SGND
AGND
AGND
A1
L39
C312
@ 0.1U_0402_16V4Z
C533
DVI_TX2+
DVI_TX1-
L40
DVI_AVDD_3V
C310
@ 0.1U_0402_16V4Z
C304
C542
0.1U_0402_16V4Z
DVI_1362@
DVI_TX2-
1
1
2
0_0603_5%
DVI_1362@
+3VS
C541
10U_0805_10V4Z
2 DVI_1362@
DVI_V6 R432
R437
DVI_V1 R429
R430
1362_SDA_DDC
1362_SCL_DDC
R292
R289
R291
R287
5
4
1
1
1
1
2
2
2
2
DVI_7307@0_0402_5%
DVI_1362@0_0402_5%
DVI_7307@0_0402_5%
DVI_1362@0_0402_5%
1
1
1
1
2
2
2
2
DVI_7307@0_0402_5%
DVI_7307@0_0402_5%
DVI_1362@0_0402_5%
DVI_1362@0_0402_5%
DVI_DDC_CLK
DVI_AVDD_3V
DVI_DDC_DAT
DVI_DVDD_1.8V
SDVO_SDAT
SDVO_SCLK
+2.5VS
SDVO_SDAT
SDVO_SCLK
SDVO_SDAT <10>
SDVO_SCLK <10>
R288 1
R290 1
2 2.7K_0402_5%
2 2.7K_0402_5%
SII1362CLU48_LQFP48
C308
150P_0402_50V8J
2 DVI_DVDD_1.8V
DVI_1362@0_0402_5%
2
1
1362_SDA_DDC
Note:
Install DVI-Ra 1K_0402_5% for SiI1362
Install DVI-Ra 0_0402_5% for CH7307
1
R428
R294
16K_0402_5%
2
DVI_DDC_DAT
2
0_0402_5%
DVI_1362@
1362_SCL_DDC 1
R427
DVI_DDC_CLK
2
0_0402_5%
DVI_1362@
JP8
R424
0_0402_5%
DVI_7307@
R295
16K_0402_5%
I2C_ADD
+5VS
DVI_V3 1
R421
W=20 mils
+5VS
DVI_1362@1K_0402_5%
1
2
+2.5VS
0.1U_0402_16V4Z
DVI_7307@
R297
@ 300_0402_1%
C311
@ 0.1U_0402_16V4Z
1 DVI_7307@0_0603_5%
C530
10U_0805_10V4Z
DVI_7307@
2
C529
R420
R425
1K_0402_5%
DVI_1362@
DVI-Ra
0.1U_0402_16V4Z
DVI_7307@
R426
@ 1K_0402_5%
Note: Address = 0x70

Install DVI-Rb 0_0402_5% for SiI1362
Note: Address = 0x72
Install DVI-Rb 10K_0402_5% for CH7307
DVI_DVDD_2.5V
0.1U_0402_16V4Z
DVI_1362@
9
8
DVI_V4 1
DVI_AVDD_3V
R423
0_0402_5%
DVI_1362@
0.1U_0402_16V4Z
DVI_1362@
DVI_TX0-
R298
@ 300_0402_1%
+1.8VS
R436
10K_0402_5%
DVI_7307@
1
AS
DVI_CLK-
DVI_1362@
R439
0_0402_5%
0_0402_5%
DVI_1362@
R444
R441
10K_0402_5%
DVI_7307@
PGND2
PVCC2
SDADDC
SCLDDC
7
30
31
39
45
18
24
6
DVI_V8 27
DVI_V7 26
DVI-Rb
SPGND
RESET#
EXT_SWING
VCC
EXT_RES
3
2
25
C309
@ 0.1U_0402_16V4Z
SDG+
SDG-
R422
10K_0402_5%
@
DVI_DETECT
<10> SDVOB_G+
<10> SDVOB_G-
+2.5VS
SDI+
SDI-
DVI_CLKDVI_CLK+
DVI_TX0DVI_TX0+
DVI_TX1DVI_TX1+
DVI_TX2DVI_TX2+
SDR+
SDR-
AS
PLT_RST#
R296
@ 300_0402_1%
DVI_TX1+
13
14
16
17
19
20
22
23
40
41
R435
1.2K_0402_5%
DVI_7307@
DVI_DVDD_2.5V
DVI_AVDD_3V
37
38
2 DVI_7307@0_0402_5%
2 DVI_1362@0_0402_5%
<10> SDVOB_R+
<10> SDVOB_R-
<8,17,19,21,23,35> PLT_RST#
2
DVI_1362@300_0402_5%
R417 1
R416 1
TXC#
TXC
TX0#
TX0
TX1#
TX1
TX2#
TX2
R438
DVI_AVDD_3V
DVI_DVDD_2.5V
DVI_DVDD_1.8V
0.1U_0402_16V4Z
2 DVI_7307@0_0402_5%
2 DVI_1362@0_0402_5%
C305
32
33
AGND
VCC
OVCC
AVCC
AVCC
SVCC
SVCC
SPVCC
0.1U_0402_16V4Z
<10> SDVOB_INT+
<10> SDVOB_INT-
C306
DVI_V9
R418 1
R419 1
12
28
1
15
21
36
42
48
U48
C
DVI_V10
2DVI_7307@0_0402_5% DVI_V5
2DVI_1362@0_0402_5%
DVI_TX0+
R299
@ 300_0402_1%
C527
DVI_DVDD_2.5V R443 1
R434 1
DVI_CLK+
DVI_V2
1
2DVI_7307@0_0402_5%
2DVI_1362@0_0402_5%
DVI_AVDD_3V
C528
0.1U_0402_16V4Z
DVI_1362@
1 DVI_1362@0_0603_5%
C525
10U_0805_10V4Z
DVI_1362@
2
DVI_TX0-
DVI_TX0+
DVI_TX1-
DVI_TX1+
A
DVI_TX2-
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
DVI_TX2+
DVI_CLK+
DVI_CLK-
DVI_DDC_DAT
DVI_DDC_CLK
2
R282
+5VS
+5VS
1
10K_0402_5%
DVI_DETECT
JAE_DD2R040HP2
Title
5

DVI CH7307/SiL1362
Size
Document Number
Date:
Sheet

1
16
Rev
0.5
of
48
+LCDVDD
600mA
+2.5VS
1
+12VALW
1
2
R271
100K_0402_5%
2
C479
0.1U_0402_16V4Z
<32> DIGISUSP
<35>
RXDB#
<35>
TXDB
<35>
CTSB#
<35>
DTRB#
<10> LCD_DDCCLK
<10> LCD_DDCDATA
<21>
PID1
1
1
R242
150K_0402_5%
C233
S
2
2N7002_SOT23
ICH_SMBCLK <13,14,15,21,35>
Q18
2
G
3
7308_SMBCLK
2 Q17
G 2N7002_SOT23
3
@ 2N7002_SOT23
Q61
<32>
@ 2N7002_SOT23
<10>
ENVDD
ENVDD
J1 2
J2 2
LCD_DDCCLK
LCD_DDCDATA
PID1
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
1 JOPEN
1 JOPEN
PDCT
PDCT
CLK1+
CLK1-
0.01U_0402_16V7K
22K
JP20
+3VS
ICH_SMBDATA <13,14,15,21,35>
1
2
10U_0805_10V4Z
<32> DIGI_RST#
C488
0.1U_0402_16V4Z
1
1
R269
470_0402_5%
R524
2.2K_0402_5%
2
1
R270
100K_0402_5%
C486
+3VS
Q60
S
@
7308_SMBDATA
+12VALW
R523
2.2K_0402_5%
2
1
+LCDVDD
Q40
AO3402_SOT23
LCD CONN.
+LCDVDD
+3VS
Q19
22K
LVDSA6+
LVDSA6-
DTC124EK_SOT23
3
LVDSA5+
LVDSA5LVDSA4+
LVDSA4PID1
2 R251
R253
@ 100K_0402_5%
+3VS
CLK0+
CLK0-
10K_0402_5%
LVDSA2+
LVDSA2-
@2CH
B
LVDSA1+
LVDSA1LVDSA0+
LVDSA0+3VS
@2CH
2
10U_0805_10V6M
3
56
62
49
16
+3VS
+2.5VS
1
R6
10K_0402_5%
@2CH
2
<10>
<10>
<10>
<10>
<10>
<10>
58
57
55
54
52
51
2CH_SDVOB_B2CH_SDVOB_B+
2CH_SDVOB_G2CH_SDVOB_G+
2CH_SDVOB_R2CH_SDVOB_R+
AVDD_PLL
AVDD
AVDD
DVDD
DVDD
SDVOB_B#
SDVOB_B
SDVOB_G#
SDVOB_G
SDVOB_R#
SDVOB_R
LVDD
LVDD
LVDD
LVDD
44
38
19
25
Chrontel
CH7308
LDCN0
LDCP0
46
45
LVDSA0LVDSA0+
RP51 1
2
64 pin-LQFP
LDCN1
LDCP1
43
42
LVDSA1LVDSA1+
RP52 1
2
LDCN2
LDCP2
40
39
LVDSA2LVDSA2+
RP53 1
2
LDCN3
LDCP3
34
33
LDCN4
LDCP4
30
29
LVDSA4LVDSA4+
LDCN5
LDCP5
27
26
LVDSA5LVDSA5+
LDCN6
LDCP6
24
23
LVDSA6LVDSA6+
LDCN7
LDCP7
21
20
LL1NC
LL1PC
LL2NC
LL2PC
VSWING
37
36
18
17
32
DGND
DGND
LGND
LGND
LGND
LGND
31
13
22
28
35
41
AGND
AGND
AGND_PLL
59
53
8
AS_7308
61
60
48
47
<10> 2CH_SDVOB_CLK<10> 2CH_SDVOB_CLK+
R11
100_0402_5%
@
2
<10,32> ENABKL
ENABKL
ENVDD
1
2
50
64
63
<8,16,19,21,23,35> PLT_RST#
PLT_RST#
AS_7308
7308_SMBCLK
7308_SMBDATA
LCD_DDCCLK
LCD_DDCDATA
5
6
7
ENABKL
ENAVDD
TST3
TST1
TST2
RESET#
AS
SPC
SPD
9
10
11
12
SD_PROM
SC_PROM
SD_DDC
SC_DDC
14
15
XI
XO
@2CH
2
@ 22P_0402_50V8J
4
3
0_0404_4P2R_5%
4
3
0_0404_4P2R_5%
4
3
0_0404_4P2R_5%
TXA0TXA0+
TXA1TXA1+
TXA2TXA2+
TXA0TXA0+
<10>
<10>
TXA1TXA1+
<10>
<10>
TXA2TXA2+
<10>
<10>
B+
1
C564
0.01U_0603_50V4Z
<32>
1
R466
BKOFF#
2
0_0402_5%
JP28
B+
<32>
CLK0CLK0+
CLK1CLK1+
R29 1
C562
0.1U_0603_25V7K
TXACLK4
TXACLK+
3
0_0404_4P2R_5%
RP54 1
2
1
R327
INVT_PWM
2
@ 0_0402_5%
1
2
3
4
5
6
7
DISPOFF#
TXACLK- <10>
TXACLK+ <10>
<32>
DAC_BRIG
Q41
+2.5VS
2 2.4K_0402_5%
@2CH
+3VS
PACDN042_SOT23
@
+3VS
MOLEX_53780-0790
R510
10K_0402_5%
R511
10K_0402_5%
<10> GM_PWM_L
1
D
C1
SDVOB_CLK#
SDVOB_CLK
SDVOB_STALL#
SDVOB_STALL
+3VS
XI
XO
0_0402_5%
XI
IPEX_20143-040E
1
C55
R3@2CH
CLK_14M_LVDS 2
1
<15> CLK_14M_LVDS
1
C54
U6
@2CH @2CH @2CH @2CH
+2.5VS
1
C14
1
C53
@2CH @2CH @2CH @2CH @2CH

2
2
2
2
2
10U_0805_10V6M
1
C24
1
C5
1
C39
1
C23
1
C11
C9
+2.5VS
Q58
2N7002_SOT23
CH7308_LQFP64
Y1
D
XO
2
C22
@ 22P_0402_50V8J
@ 14.31818MHz_20P_1BX14318BE1A

Title
PROPRIETARY NOTE
LCD Conn&Inverter
Size
Date:
5
Document Number
Rev
0.5
EDX20 LA-2481
7
Sheet
17
8
of
48
CRTVCC
+3VS
D15
+5VS
RB491D_SOT23
C563
0.1U_0402_16V4Z
R331
CRT_R_MB
1
1
R346
1 R338
R342
CRTR
CRTG
L41
CRTB
3VDDCDA
CRTG
VSYNC
1
C364
C360
C356
3VDDCCL
<10,36> 3VDDCCL
2
6P_0402_25V8K
6P_0402_25V8K
6P_0402_25V8K
JP10
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
HSYNC
CRTB
C355
2
4.7K_0402_5%
4.7K_0402_5%
M_SEN#
CRTR
M_SEN#
<10,36> 3VDDCDA
L42
R371
10K_0402_5%
150_0402_5%
150_0402_5%
150_0402_5%
L43
C361
2
C366
2
CRT_B_MB
2
CRT_G_MB
R328
FBM-11-201209-170T
FBM-11-201209-170T
FBM-11-201209-170T
<21,36>
D17
@ SFI0603-120E100MP_0603
D18
D16
@ SFI0603-120E100MP_0603
@ SFI0603-120E100MP_0603
6P_0402_25V8K
6P_0402_25V8K
6P_0402_25V8K
2
SUYIN_070112FR015S222XU
C343
100P_0402_50V8J
CRT_HSYNC_MB
+5VS
HSYNC
2
1
FBM-11-160808-121T_0603
SN74AHCT1G125GW_SOT353-5
C567
22P_0402_25V8K
+5VS
1K_0402_5%
CRT_HSYNC_DOCK
Y U44
C25
0.1U_0402_16V4Z
CRT_HSYNC_DOCK <36>
5
1
CRT_VSYNC_MB
P
OE#
1
39_0402_5%
2
R1157
CRT_VSYNC
+5VS
<10>
<10>
<10>
R531
10K_0402_5%
CRT_R
CRT_G
CRT_B
4
7
9
12
8
VCC
DA
DB
DC
DD
GND
EN
IN
15
1
S1A
S2A
S1B
S2B
S1C
S2C
S1D
S2D
2
3
5
6
11
10
14
13
DOCKEN_VGA
CRT_R_MB
CRT_R_DOCK
CRT_G_MB
CRT_G_DOCK
CRT_B_MB
CRT_B_DOCK
DOCKEN_VGA <32,33>
CRT_R_DOCK <36>
CRT_G_DOCK <36>
CRT_B_DOCK <36>
VSYNC
2
1
FBM-11-160808-121T_0603
PI5V330Q_QSOP16
C568
22P_0402_25V8K
1K_0402_5%
5
1
P
OE#
G
CRT_R
CRT_G
CRT_B
L29
1
0: TO MB
U5
R509
DOCKEN_VGA
16
U52
1: TO DOCK
+5VS
<10> CRT_VSYNC
+3VS
L30
4
R508
5
1
P
OE#
U51
Y
1
39_0402_5%
2
R1156
CRT_HSYNC
<10> CRT_HSYNC
P
OE#
5
1
+5VS
Y U24
CRT_VSYNC_DOCK
CRT_VSYNC_DOCK <36>

Title
PROPRIETARY NOTE
LCD Connecter & CRT
Size
Date:
5
Document Number
Rev
0.5
EDX20 LA-2481
7
Sheet
18
8
of
48
RP19
1
2
3
4
8
7
6
5
PCI_DEVSEL#
PCI_PLOCK#
PCI_PERR#
PCI _IRDY#
U38B
<24,26,27> PCI_AD[0..31]
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
8.2K_1206_8P4R_5%
RP18
+3VS
1
2
3
4
8
7
6
5
PCI_STOP#
PCI_TRDY#
PCI_FRAME#
8.2K_1206_8P4R_5%
RP17
+3VS
1
2
3
4
8
7
6
5
PCI_PIRQA#
PCI_PIRQC#
PCI_PIRQB#
PCI_PIRQD#
8.2K_1206_8P4R_5%
RP4
+3VS
C
1
2
3
4
8
7
6
5
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
8.2K_1206_8P4R_5%
E2
E5
C2
F5
F3
E9
F2
D6
E6
D3
A2
D2
D5
H3
B4
J5
K2
K5
D4
L6
G3
H4
H2
H5
B3
M6
B2
K6
K3
A5
L1
K4
AD[0]
AD[1]
AD[2]
AD[3]
AD[4]
AD[5]
AD[6]
AD[7]
AD[8]
AD[9]
AD[10]
AD[11]
AD[12]
AD[13]
AD[14]
AD[15]
AD[16]
AD[17]
AD[18]
AD[19]
AD[20]
AD[21]
AD[22]
AD[23]
AD[24]
AD[25]
AD[26]
AD[27]
AD[28]
AD[29]
AD[30]
AD[31]
REQ[0]#
GNT[0]#
REQ[1]#
GNT[1]#
REQ[2]#
GNT[2]#
REQ[3]#
GNT[3]#
REQ[4]#/GPI[40]
GNT[4]#/GPO[48]
REQ[5]#/GPI[1]
GNT[5]#/GPO[17]
REQ[6]#/GPI[0]
GNT[6]#/GPO[16]
L5
C1
B5
B6
M5
F1
B8
C8
F7
E7
E8
F6
B7
D8
PCI_REQ#0
C/BE[0]#
C/BE[1]#
C/BE[2]#
C/BE[3]#
J6
H6
G4
G2
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
A3
E1
R2
C3
E3
C5
G5
J1
J2
PCI _IRDY#
PCI_PAR
ICH_PCIRST#
PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PLTRST#
PCICLK
PME#
R5
G6
P6
PLTRST#
CLK_PCI_ICH
PCI_PME#
D9
C7
C6
M3
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
PCI
RP5
+3VS
1
2
3
4
8
7
6
5
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
<24,26,27> PCI_FRAME#
<24> PCI_PIRQA#
<24> PCI_PIRQB#
8.2K_1206_8P4R_5%
RP3
+3VS
1
2
3
4
8
7
6
5
PCI_FRAME#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PCI_REQ#4
PCI_REQ#5
PCI_REQ#6
PCI_SERR#
8.2K_1206_8P4R_5%
T12
T11
T16
T14
T6
T7
T10
T9
T15
J3
FRAME#
Interrupt
N2
L2
M1
L3
PIRQ[A]#
PIRQ[B]#
PIRQ[C]#
PIRQ[D]#
PCI_REQ#1
PCI_GNT#1
PCI_REQ#2
PCI_GNT#2
PCI_REQ#3
PCI_GNT#3
PCI_REQ#4
<26>
<26>
<24>
<24>
<27>
<27>
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
<24,26,27>
<24,26,27>
<24,26,27>
<24,26,27>
PCI_REQ#5
PCI_REQ#6
I/F
PIRQ[E]#/GPI[2]
PIRQ[F]#/GPI[3]
PIRQ[G]#GPI[4]
PIRQ[H]#/GPI[5]
PCI_REQ#1
PCI_GNT#1
PCI_REQ#2
PCI_GNT#2
PCI_REQ#3
PCI_GNT#3
PCI_IRDY# <24,26,27>
PCI_PAR <24,26,27>
PCI_DEVSEL# <24,26,27>
PCI_PERR# <24,26,27>
PCI_SERR# <24,26,27>
PCI_STOP# <24,26,27>
PCI_TRDY# <24,26,27>
CLK_PCI_ICH
CLK_PCI_ICH <15>
PCI_PME# <34>
+3VS
R194
@ 10_0402_5%
PCI_PIRQF# <27>
PCI_PIRQG# <26>
PCI_PIRQH# <26>
RESERVED
AC5
AD5
AF4
AG4
AC9
AD9
AF8
AG8
U3
SATA[1]RXN/RSVD[1]
SATA[1]RXP/RSVD[2]
SATA[1]TXN/RSVD[3]
SATA[1]TXP/RSVD[4]
SATA[3]RXN/RSVD[5]
SATA[3]RXP/RSVD[6]
SATA[3]TXN/RSVD[7]
SATA[3]TXP/RSVD[8]
TP[3]/RSVD[9]
C174
@ 10P_0402_50V8J
ICH6_BGA609
+3VS
+3VS
1
C164
14
PCIRST#
PCIRST#
PLTRST#
<24,25,26,27,32>
4
5
74VHC08MTC_TSSOP14
2
R246
1
@ 0_0402_5%
U12B
O
0.1U_0402_16V4Z
PLT_RST#
PLT_RST# <8,16,17,21,23,35>
U12A
14
ICH_PCIRST#
C235
0.1U_0402_16V4Z
74VHC08MTC_TSSOP14
2
R234
1
@ 0_0402_5%
Title
Size
Document Number
Date:

ICH6(1/4)
Sheet

1
Rev
0.5
19
of
48
C484
12P_0402_50V8J
2
1
http://hobi-elektronika.net CPU Type
ENABLE INTEGRATED VCCSUS1.5 VRM

DISABLE INTEGRATED VCCSUS1.5 VRM
C131
R177
@ 10P_0402_50V8J @ 10_0402_5%
1
2
2
1
P2
N3
N5
N4
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LDRQ[0]#
LDRQ[1]#/GPI[41]
N6
P4
LPC_DRQ#0
LPC_DRQ#1
LFRAME#/FWH[4]
P3
LPC_FRAME#
AC97_BITCLK
AC97_SYNC_R
2
R165
AC97_RST_R#
2
R172
1
1K_0402_5%
2
R175
AC97_SDOUT_R
2
33_0402_5%
D12
B12
D11
F13
EE_CS
EE_SHCLK
EE_DOUT
EE_DIN
AF22
AF23
GATEA20
H_A20M#
F12
LAN_CLK
CPUSLP#
AE27
CPUSLP# R46
DPRSLP#/TP[4]
DPSLP#/TP[2]
AE24
AD27
DPRSTP# R105
H_DPSLP#
B11
LAN_RSTSYNC
E12
E11
C13
LANRXD[0]
LANRXD[1]
LANRXD[2]
C12
C11
E13
LANTXD[0]
LANTXD[1]
LANTXD[2]
R214 1
R174
1
56 Ohm
H_IGNNE#
H_IGNNE# <5>
ACZ_SDO
AC2
2 0_0402_5% AC1
SATA_CLKN
SATA_CLKP
AG11
SATARBIAS AF11
SATARBIAS#
SATARBIAS
PDIORDY
IDEIRQ
PDDACK#
PDIOW#
PDIOR#
PDIORDY
IDEIRQ
PDDACK#
PDIOW#
PDIOR#
AF16
AB16
AB15
AC14
AE16
IORDY
IDEIRQ
DDACK#
DIOW#
DIOR#
H_INIT#
H_INTR
1 56_0402_5%
H_INIT#
H_INTR
AD23
KBRST#
KBRST#
<32>
NMI
SMI#
AF25
AG27
H_NMI
H_SMI#
H_NMI
H_SMI#
<5>
<5>
H_STPCLK# <5>
STPCLK#
AE26
THRMTRIP#
AE23
THRMTRIP#
DA[0]
DA[1]
DA[2]
AC16
AB17
AC17
PDA0
PDA1
PDA2
DCS1#
DCS3#
AD16
AE17
PD_CS#1
PD_CS#3
DD[0]
DD[1]
DD[2]
DD[3]
DD[4]
DD[5]
DD[6]
DD[7]
DD[8]
DD[9]
DD[10]
DD[11]
DD[12]
DD[13]
DD[14]
DD[15]
AD14
AF15
AF14
AD12
AE14
AC11
AD11
AB11
AE13
AF13
AB12
AB13
AC13
AE15
AG15
AD13
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
DDREQ
AB14
PDDREQ
H_FERR#
PDA0
PDA1
PDA2
<23>
<23>
<23>
PDCS1#
PDCS3#
<23>
<23>
R104
56_0402_5%
H_DPRSTP#
H_FERR# <5>
MAINPWRON <41,43>
+VCCP
<5>
<5>
RCIN#
H_STPCLK#
SATALED#
SATA[2]RXN
SATA[2]RXP
SATA[2]TXN
SATA[2]TXP
H_DPRSTP# <5>
H_DPSLP# <5,45>
AG26
AE22
AF27
AG24
ACZ_SDIN[0]
ACZ_SDIN[1]
ACZ_SDIN[2]
AD7
2 0_0402_5% AC7
AF6
AG6
H_CPUSLP# <5,8>
0_0402_5% H_DPRSTP#
IGNNE#
INIT3_3V#
INIT#
INTR
F11
F10
B10
SATA[0]RXN
SATA[0]RXP
SATA[0]TXN
SATA[0]TXP
Rc
H_FERR#
1 @ 0_0402_5% H_CPUSLP#
H_PWRGOOD <5>
ACZ_RST#
AE3
2 0_0402_5% AD3
AG2
AF2
Ra
Rb
H_PW RGOOD
R108
+VCCP
R107
56_0402_5%
GATEA20 <32>
H_A20M# <5>
AG25
ACZ_BIT_CLK
ACZ_SYNC
+VCCP
LPC_FRAME# <32,35>
AF24
24.9_0402_1%
<23>
<23>
<23>
<23>
<23>
0 Ohm
LPC_DRQ#0 <35>
LPC_DRQ#1 <35>
FERR#
SATA
R189 1
OPEN
<32,35>
<32,35>
<32,35>
<32,35>
CPUPWRGD/GPO[49]
A10
C9
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
FERR#
C10
B9
AC19
R213 1
A20GATE
A20M#
AC-97/AZALIA
<29> AC97_SDOUT
LAD[0]/FWH[0]
LAD[1]/FWH[1]
LAD[2]/FWH[2]
LAD[3]/FWH[3]
LAN
HIGH
<29> AC97_SDIN0
Dothan-B
INTRUDER#
INTVRMEN
LOW
<29> AC97_RST#
56 Ohm
RTCRST#
AA3
AA5
R191
0_0402_5%
1
33_0402_5%
1
33_0402_5%
2
+3VS
R166
1
33_0402_5%
1
R162
OPEN
AA2
INTRUDER#
INTVRMEN
INTVRMEN
<29> AC97_BITCLK
<29> AC97_SYNC
RTCX1
RTCX2
ICH_RTCRST#
1U_0402_6.3V4Z
0 Ohm
R195
@ 0_0402_5%
C192
Dothan-A
R115
@ 330_0402_5%
1
2
Rc
CMOS_CLR1
SHORT PADS
Rb
U38A
Y1
Y2
ICH_RTCX2
2
20K_0402_5%
2
1M_0402_1%
1
R201
1
R198
RTC
C483
12P_0402_50V8J
2
1
+RTCVCC
Ra
+VCCP
Q36
@ 2SC2411K_SC59
2
B
1
2
C429
@ 1U_0603_10V6K
PIDE
OUT
LPC
IN
NC
CPU
NC
R407
10M_0402_5%
2
1
ICH_RTCX1
Y5
32.768KHZ_12.5P_1TJS125DJ2A073
2
R110
75_0402_1%
THRMTRIP#
1
R111
56_0402_5%
H_THERMTRIP#
H_THERMTRIP# <5,8>
PDDREQ <23>
ICH6_BGA609
<23>
PDD[0..15]
PDD[0..15]
CHGRTC
D1
1
2
R42
1
R43
A
BATT1.1
+RTCVCC
BATT1.2
W=20mils
BATT1
511_0603_1%
100_0603_1% BAS40-04_SOT23
C60
RTCBATT
0.1U_0402_16V4Z
Title
ICH6(2/4)
Size
Document Number
Date:

Rev
0.5
Sheet

1
20
of
48
+3VALW
R222
10K_0402_5%
2
1
SUS_STAT#
R152
2.2K_0402_5%
2
1
SUS_STAT#/LPCPD#
U2
SYS_RESET#
<8> PM_BMBUSY#
PM_BMBUSY#
AD19
BM_BUSY#/GPI[6]
M_SEN#
EC_SMI#
AE19
R1
GPI[7]
GPI[8]
G
3
ICH_SMBCLK
<18,36> M_SEN#
<32> EC_SMI#
2N7002_SOT23
SMBCLK
EC_SCI#
W6
@ 0_0402_5%
USB2P0_SMI# M2
R171 1
2
EC_SWI#
R6
<32> EC_SCI#
<32,39,41> ACIN
<32> EC_SWI#
Q15
PM_STP_PCI#
<15> PM_STP_PCI#
<15> PM_STP_CPU#
PM_STP_CPU#
<26> WL_EN#
<23> IDERST_HD#
WL_EN#
IDERST_HD#
+3VALW
10K_0402_5%
2 R179
LINKALERT#
2 R221
ITP_DBRESET#
<34> EC_FLASH#
<24,26,27,32,35> PM_CLKRUN#
<17>
PID1
2 R215
PM_BATLOW#
1K_0402_5%
2 R196
ICH_PCIE_WAKE#
EC_THRM#
D5
<8,15,32,45> VGATE
10K_0402_5%
2 R159
PM_CLKRUN#
10K_0402_5%
2 R155
SB_THRM#
10K_0402_5%
2 R136
MCH_SYNC#
10K_0402_5%
2@
USB2P0_SMI#
10K_0402_5%
2 R147
1K_0402_5%
2 R145
R180
SIRQ
GPIO[24]
SB_THRM#
2
RB751V_SOD323
VGATE
GPIO[25]
GPIO[27]
GPIO[28]
CLKRUN#/GPIO[32]
GPIO[33]
GPIO[34]
WAKE#
AB20
SERIRQ
AC20
THRM#
AF21
VRMPWRGD
<15> CLK_48M_ICH
CLK_48M_ICH
A27
ICH_SUSCLK
V6
SUSCLK
<32> EC_SLP_S3#
<32> EC_SLP_S4#
<32> EC_SLP_S5#
EC_SLP_S3#
EC_SLP_S4#
EC_SLP_S5#
T4
T5
T6
SLP_S3#
SLP_S4#
SLP_S5#
<32,34> ICH_PWRGD
ICH_PWRGD
AA1
E10
CLK48
PWROK
PM_DPRSLPVR
<32> PM_BATLOW#
PM_BATLOW#
V2
BATLOW#/TP[0]
<32> EC_PBTNOUT#
EC_PBTNOUT#
U1
PWRBTN#
PLT_RST#
V5
LAN_RST#
EC_RSMRST#
Y3
RSMRST#
R218
10K_0402_5%
2
1
AE20
DPRSLPVR/TP[1]
K25
K24
J27
J26
PERn[3]
PERp[3]
PETn[3]
PETp[3]
M25
M24
L27
L26
PERn[4]
PERp[4]
PETn[4]
PETp[4]
P24
P23
N27
N26
DMI[0]RXN
DMI[0]RXP
DMI[0]TXN
DMI[0]TXP
T25
T24
R27
R26
DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0
DMI[1]RXN
DMI[1]RXP
DMI[1]TXN
DMI[1]TXP
V25
V24
U27
U26
DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1
DMI[2]RXN
DMI[2]RXP
DMI[2]TXN
DMI[2]TXP
Y25
Y24
W27
W26
DMI[3]RXN
DMI[3]RXP
DMI[3]TXN
DMI[3]TXP
AB24
AB23
AA27
AA26
DMI_CLKN
DMI_CLKP
AD25
AC25
DMI_ZCOMP
F24
CLK_PCIE_ICH#
CLK_PCIE_ICH
F23
R95
DMI_IRCOMP1
OC[4]#/GPI[9]
OC[5]#/GPI[10]
OC[6]#/GPI[14]
OC[7]#/GPI[15]
C23
D23
C25
C24
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
OC[0]#
OC[1]#
OC[2]#
OC[3]#
C27
B27
B26
C26
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USBP[0]N
USBP[0]P
USBP[1]N
USBP[1]P
USBP[2]N
USBP[2]P
USBP[3]N
USBP[3]P
USBP[4]N
USBP[4]P
USBP[5]N
USBP[5]P
USBP[6]N
USBP[6]P
USBP[7]N
USBP[7]P
C21
D21
A20
B20
D19
C19
A18
B18
E17
D17
B16
A16
C15
D15
A14
B14
USBRBIAS#
USBRBIAS
A22
B22
USBRBIAS 1
<31>
<31>
<33>
<33>
RP2
USBP0USBP0+
USBP1USBP1+
USBP2USBP2+
USBP3USBP3+
USBP4USBP4+
USBP5USBP5+
USBP6USBP6+
USBP7USBP7+
R114
USB_OC#2
USB_OC#1
USB_OC#3
USB_OC#0
<31>
<31>
<31>
<31>
<36>
<36>
<36>
<36>
<36>
<36>
<36>
<36>
<36>
<36>
<36>
<36>
4
3
2
1
5
6
7
8
+3VALW
4.7K_1206_8P4R_5%
RP1
B
USB_OC#4
USB_OC#6
USB_OC#7
USB_OC#5
4
3
2
1
5
6
7
8
4.7K_1206_8P4R_5%
22.6_0402_1%
ICH6_BGA609
+3VS
R255
10K_0402_5%
1
ISOLATE# <27>
Q62
2
G
2N7002_SOT23
A
24.9_0402_1%
2
+1.5VS
USBP0USBP0+
USBP1USBP1+
USBP2USBP2+
USBP3USBP3+
USBP4USBP4+
USBP5USBP5+
USBP6USBP6+
USBP7USBP7+
R103
10_0402_5%
@
<8>
<8>
<8>
<8>
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
ICH_GPIO33
DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1
USB_OC#4 <33>
USB_OC#5 <33>
CLK_48M_ICH
R176
10_0402_5%
@
<8>
<8>
<8>
<8>
CLK_PCIE_ICH# <15>
CLK_PCIE_ICH <15>
Place closely pin A27
CLK_14M_ICH
DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0
DMI_IRCOMP
CLK14
<45> PM_DPRSLPVR
<32> EC_RSMRST#
Place closely pin E10
GPO[21]
GPO[23]
V3
<15> CLK_14M_ICH
<8,16,17,19,23,35> PLT_RST#
WL_EN#
AD20
AD21
CLK_14M_ICH
T13 PAD
+3VS
STP_CPU#/GPO[20]
U5
SIRQ
<24,32,35> SIRQ
<32> EC_THRM#
GPO[19]
AD22
ICH_PCIE_WAKE#
(PCI Express Wake Event)
10K_0402_5%
STP_PCI#/GPO[18]
AB21
P5
R3
T3
AF19
AF20
AC18
EC_FLASH#
PM_CLKRUN#
ICH_GPIO33
PID1
GPI[12]
GPI[13]
AC21
2
1
R526
100K_0402_5%
2
1
R216
10K_0402_5%
10K_0402_5%
SMBALERT#/GPI[11]
PERn[2]
PERp[2]
PETn[2]
PETp[2]
SMBDATA
H25
H24
G27
G26
2.2K_0402_5%
2
1
R158
1
2N7002_SOT23
<13,14,15,17,35> ICH_SMBCLK
W3
ITP_DBRESET#
R164
2.2K_0402_5%
2
1
R149
2.2K_0402_5%
2
1
3
S
ICH_SMBDATA
<13,14,15,17,35> ICH_SMBDATA
SUS_STAT#
<5> ITP_DBRESET#
Q16
SMBCLK
SMBDATA
LINKALERT#
SMLINK[0]
SMLINK[1]
MCH_SYNC#
SPKR
PERn[1]
PERp[1]
PETn[1]
PETp[1]
ICH_SPKR
<35>
Y4
W5
Y5
W4
U6
AG21
F8
PCI-EXPRESS
<29>
SMBCLK
SMBDATA
LINKALERT#
ICH_SMLINK0
ICH_SMLINK1
MCH_SYNC#
ICH_SPKR
SATA[0]GP/GPI[26]
SATA[1]GP/GPI[29]
SATA[2]GP/GPI[30]
SATA[3]GP/GPI[31]
DIRECT MEDIA INTERFACE
+3VALW
+3VS
RI#
AF17
AE18
AF18
AG18
CLOCK
ICH_SMLINK0
ICH_SMLINK1
T2
POWER MGT
+3VS
U38C
I CH_RI#
GPIO
R148
33_0402_5%
2
1
USB
R183
10K_0402_5%
1
2
R184
10K_0402_5%
1
2
+3VALW
@ 39K_0402_5%
SIRQ
1
2
R133
1
C132
@
4.7P_0402_50V8C
C97
4.7P_0402_50V8C
@
Title
ICH6(3/4)
Size
Document Number
Date:

Rev
0.5
Sheet

1
21
of
48
C109
0.1U_0402_16V4Z
VCC1_5[46]
VCC1_5[47]
VCC1_5[48]
VCC1_5[49]
VCC1_5[50]
VCC1_5[51]
VCC1_5[52]
VCC1_5[53]
VCC1_5[54]
VCC1_5[55]
AA7
AA8
AA9
AB8
AC8
AD8
AE8
AE9
AF9
AG9
VCC1_5[56]
VCC1_5[57]
VCC1_5[58]
VCC1_5[59]
VCC1_5[60]
VCC1_5[61]
VCC1_5[62]
VCC1_5[63]
VCC1_5[64]
VCC1_5[65]
ICH6_VCCPLL AC27
E26
VCCDMIPLL
VCC3_3[1]
C166
Near PIN AG5
Near PIN AG9
L35
BLM11A601S_0603
1
2
ICH6_VCCPLL
+3VS
2
Near PIN
AC27
+1.5VS
C191
0.1U_0402_16V4Z
1
C98
0.1U_0402_16V4Z
C430
0.01U_0402_16V7K
C424
0.1U_0402_16V4Z
+1.5VS
C152
+1.5VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.5VS
Near PIN
E26, E27
+3VS
+3VS
1
+3VALW
+3VALW
GND
Vin
G19
VCC1_5[78]
VCC1_5[77]
VCC1_5[76]
VCC1_5[75]
VCC1_5[74]
VCC1_5[73]
VCC1_5[72]
VCC1_5[71]
VCC1_5[70]
VCC1_5[69]
VCC1_5[68]
G20
F20
E24
E23
E22
E21
E20
D27
D26
D25
D24
VCC1_5[67]
G8
VCCSATAPLL
VCC3_3[22]
A13
F14
G13
G14
VCCLAN3_3/VCC3_3[1]
VCCLAN3_3/VCC3_3[2]
VCCLAN3_3/VCC3_3[3]
VCCLAN3_3/VCC3_3[4]
A11
U4
V1
V7
W2
Y7
VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
A17
B17
C17
F18
G17
G18
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
+1.5VR
+1.5VR
Near PIN
A2-A6, D1-H1
+1.5VR
F21
ICH_V5REF_SUS
VCCUSBPLL
VCCSUS3_3[20]
A25
A24
+1.5VS
+3VALW
VCCRTC
AB3
+RTCVCC
VCCLAN1_5/VCC1_5[2]
VCCLAN1_5/VCC1_5[1]
G11
G10
+1.5VS
AG23
AD26
AB22
+VCCP
1
Near PIN AA19
Near PIN AG23

+3VALW
C159
0.1U_0402_16V4Z
1
2
+3VS
0.1U_0402_16V4Z
C112
0.1U_0402_16V4Z
+RTCVCC
C125
0.1U_0402_16V4Z
1
2
C103
0.1U_0402_16V4Z
1
2
Near PIN A24
Near PIN AG10
Title
4
Size
Document Number
Date:
F4
F22
F19
F17
E25
E19
E18
E15
E14
D7
D22
D20
D18
D14
D13
D10
D1
C4
C22
C20
C18
C14
B25
B24
B23
B21
B19
B15
B13
AG7
AG3
AG22
AG20
AG17
AG14
AG12
AG1
AF7
AF3
AF26
AF12
AF10
AF1
AE7
AE6
AE25
AE21
AE2
AE12
AE11
AE10
AD6
AD24
AD2
AD18
AD15
AD10
AD1
AC6
AC3
AC26
AC24
AC23
AC22
AC12
AC10
AB9
AB7
AB2
AB19
AB10
AB1
AA4
AA16
AA13
AA11
A9
A7
A4
A26
A23
A21
A19
A15
A12
A1
ICH6_BGA609
C122
0.1U_0402_16V4Z
1
2
C140
1
2
C144
0.01U_0402_16V7K
1
2
Near PIN AB18
C128
0.1U_0402_16V4Z
1
2
ICH6_BGA609
Near PIN A25
+2.5VS
ICH_V5REF_RUN
G16
G15
F16
F15
E16
D16
C16
C99
0.01U_0402_16V7K
1
2
+1.5VS
AA18
A8
VCCSUS3_3[19]
VCCSUS3_3[18]
VCCSUS3_3[17]
VCCSUS3_3[16]
VCCSUS3_3[15]
VCCSUS3_3[14]
VCCSUS3_3[13]
C102
0.1U_0402_16V4Z
1
2
Near PIN U7
V5REF[2]
V5REF[1]
V_CPU_IO[3]
V_CPU_IO[2]
V_CPU_IO[1]
+3VS
AB18
P7
V5REF_SUS
+1.5VR
VCC2_5[4]
VCC2_5[2]
PCI/IDE RBP
0.1U_0402_16V4Z
VCCSUS1_5[1]
+1.5VR
C106
0.1U_0402_16V4Z
Vout
VCCSUS1_5[3]
VCCSUS1_5[2]
Near PIN A17
U9 APL5301-15DC_3P
2
A
+1.5VR
0.1U_0402_16V4Z
C119
C120
+3VALW
0.1U_0402_16V4Z
Near PIN AE1
AE1
AG10
SATA
AA6
AB4
AB5
AB6
AC4
AD4
AE4
AE5
AF5
AG5
U7
R7
C100
0.1U_0402_16V4Z
1
2
VSS[86]
VSS[85]
VSS[84]
VSS[83]
VSS[82]
VSS[81]
VSS[80]
VSS[79]
VSS[78]
VSS[77]
VSS[76]
VSS[75]
VSS[74]
VSS[73]
VSS[72]
VSS[71]
VSS[70]
VSS[69]
VSS[68]
VSS[67]
VSS[66]
VSS[65]
VSS[64]
VSS[63]
VSS[62]
VSS[61]
VSS[60]
VSS[59]
VSS[58]
VSS[57]
VSS[56]
VSS[55]
VSS[54]
VSS[53]
VSS[52]
VSS[51]
VSS[50]
VSS[49]
VSS[48]
VSS[47]
VSS[46]
VSS[45]
VSS[44]
VSS[43]
VSS[42]
VSS[41]
VSS[40]
VSS[39]
VSS[38]
VSS[37]
VSS[36]
VSS[35]
VSS[34]
VSS[33]
VSS[32]
VSS[31]
VSS[30]
VSS[29]
VSS[28]
VSS[27]
VSS[26]
VSS[25]
VSS[24]
VSS[23]
VSS[22]
VSS[21]
VSS[20]
VSS[19]
VSS[18]
VSS[17]
VSS[16]
VSS[15]
VSS[14]
VSS[13]
VSS[12]
VSS[11]
VSS[10]
VSS[9]
VSS[8]
VSS[7]
VSS[6]
VSS[5]
VSS[4]
VSS[3]
VSS[2]
VSS[1]
C177
0.1U_0402_16V4Z
1U_0603_10V4Z
C154
0.1U_0402_16V4Z
1
2
Near PIN
AG13, AG16
VSS[172]
VSS[171]
VSS[170]
VSS[169]
VSS[168]
VSS[167]
VSS[166]
VSS[165]
VSS[164]
VSS[163]
VSS[162]
VSS[161]
VSS[160]
VSS[159]
VSS[158]
VSS[157]
VSS[156]
VSS[155]
VSS[154]
VSS[153]
VSS[152]
VSS[151]
VSS[150]
VSS[149]
VSS[148]
VSS[147]
VSS[146]
VSS[145]
VSS[144]
VSS[143]
VSS[142]
VSS[141]
VSS[140]
VSS[139]
VSS[138]
VSS[137]
VSS[136]
VSS[135]
VSS[134]
VSS[133]
VSS[132]
VSS[131]
VSS[130]
VSS[129]
VSS[128]
VSS[127]
VSS[126]
VSS[125]
VSS[124]
VSS[123]
VSS[122]
VSS[121]
VSS[120]
VSS[119]
VSS[118]
VSS[117]
VSS[116]
VSS[115]
VSS[114]
VSS[113]
VSS[112]
VSS[111]
VSS[110]
VSS[109]
VSS[108]
VSS[107]
VSS[106]
VSS[105]
VSS[104]
VSS[103]
VSS[102]
VSS[101]
VSS[100]
VSS[99]
VSS[98]
VSS[97]
VSS[96]
VSS[95]
VSS[94]
VSS[93]
VSS[92]
VSS[91]
VSS[90]
VSS[89]
VSS[88]
VSS[87]
GROUND
C114
C145
0.1U_0402_16V4Z
1
2
U38D
E27
Y6
Y27
Y26
Y23
W7
W25
W24
W23
W1
V4
V27
V26
V23
U25
U24
U23
U15
U13
T7
T27
T26
T23
T16
T15
T14
T13
T12
T1
R4
R25
R24
R23
R17
R16
R15
R14
R13
R12
R11
P22
P16
P15
P14
P13
P12
N7
N17
N16
N15
N14
N13
N12
N11
N1
M4
M27
M26
M23
M16
M15
M14
M13
M12
L25
L24
L23
L15
L13
K7
K27
K26
K23
K1
J4
J25
J24
J23
H27
H26
H23
G9
G7
G21
G12
G1
C172
0.1U_0402_16V4Z
P1
M7
L7
L4
J7
H7
H1
E4
B1
A6
+3VS
0.1U_0402_16V4Z
ICH_V5REF_SUS
VCC3_3[11]
VCC3_3[10]
VCC3_3[9]
VCC3_3[8]
VCC3_3[7]
VCC3_3[6]
VCC3_3[5]
VCC3_3[4]
VCC3_3[3]
VCC3_3[2]
C158
0.1U_0402_16V4Z
10_0603_5%
1
D4
RB751V_SOD323
C117
0.1U_0402_16V4Z
R146
AA10
AG19
AG16
AG13
AD17
AC15
AA17
AA15
AA14
AA12
0.1U_0402_16V4Z
+5VALW +3VALW
VCC3_3[21]
VCC3_3[20]
VCC3_3[19]
VCC3_3[18]
VCC3_3[17]
VCC3_3[16]
VCC3_3[15]
VCC3_3[14]
VCC3_3[13]
VCC3_3[12]
C108
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
C193
0.1U_0402_16V4Z
C107
0.1U_0402_16V4Z
1
2
C157
C133
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
C130
0.1U_0402_16V4Z
C134
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
C194
C118
C123
0.1U_0402_16V4Z
1
2
C121
1U_0603_10V4Z
C146
C124
0.1U_0402_16V4Z
1
2
C165
C142
PCIE
+1.5VS
C105
0.1U_0402_16V4Z
ICH_V5REF_RUN
F9
U17
U16
U14
U12
U11
T17
T11
P17
P11
M17
M11
L17
L16
L14
L12
L11
AA21
AA20
AA19
C115
0.1U_0402_16V4Z
0.1U_0402_16V4Z
RB751V_SOD323
1
10_0603_5%
VCC1_5[98]
VCC1_5[97]
VCC1_5[96]
VCC1_5[95]
VCC1_5[94]
VCC1_5[93]
VCC1_5[92]
VCC1_5[91]
VCC1_5[90]
VCC1_5[89]
VCC1_5[88]
VCC1_5[87]
VCC1_5[86]
VCC1_5[85]
VCC1_5[84]
VCC1_5[83]
VCC1_5[82]
VCC1_5[81]
VCC1_5[80]
VCC1_5[79]
CORE
2
D7
VCC1_5[1]
VCC1_5[2]
VCC1_5[3]
VCC1_5[4]
VCC1_5[5]
VCC1_5[6]
VCC1_5[7]
VCC1_5[8]
VCC1_5[9]
VCC1_5[10]
VCC1_5[11]
VCC1_5[12]
VCC1_5[13]
VCC1_5[14]
VCC1_5[15]
VCC1_5[16]
VCC1_5[17]
VCC1_5[18]
VCC1_5[19]
VCC1_5[20]
VCC1_5[21]
VCC1_5[22]
VCC1_5[23]
VCC1_5[24]
VCC1_5[25]
VCC1_5[26]
VCC1_5[27]
VCC1_5[28]
VCC1_5[29]
VCC1_5[30]
VCC1_5[31]
VCC1_5[32]
VCC1_5[33]
VCC1_5[34]
VCC1_5[35]
VCC1_5[36]
VCC1_5[37]
VCC1_5[38]
VCC1_5[39]
VCC1_5[40]
VCC1_5[41]
VCC1_5[42]
VCC1_5[43]
VCC1_5[44]
VCC1_5[45]
IDE
2
R173
AA22
AA23
AA24
AA25
AB25
AB26
AB27
F25
F26
F27
G22
G23
G24
G25
H21
H22
J21
J22
K21
K22
L21
L22
M21
M22
N21
N22
N23
N24
N25
P21
P25
P26
P27
R21
R22
T21
T22
U21
U22
V21
V22
W21
W22
Y21
Y22
PCI
+3VS
+1.5VS
U38E
USB
+5VS
0.1U_0402_16V4Z
C96
2
C89
0.1U_0402_16V4Z
C91
C84
220U_D2_4VM
Near PIN F27(C277),

P27(C278), AB27(C279)
+1.5VS
USB CORE
ICH6(4/4)
Sheet

1
Rev
0.5
22
of
48
+3VS
C173
2
1
U12C
O
7
<21> IDERST_HD#
10
<20>
PIDERST#
PDD[0..15]
74VHC08MTC_TSSOP14
JP21
PIDERST# R408 1
2 22_0402_5%
PDD7
R409
1
2
@ 10K_0402_5% PDD5
PDD6
PDD3
PDD15
PDD9
R239
1
PDD[0..15]
<8,16,17,19,21,35> PLT_RST#
0.1U_0402_16V4Z
14
2
@ 0_0402_5%
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
PDD0
PDD4
PDD2
PDD1
2
2
C505
PDDREQ
1R412
@ 5.6K_0402_5%
<20>
<20>
<20>
<20>
PDIOR#
PDA0
PDCS3#
PDA1
PDIOR#
PDA0
PDCS3#
PDA1
+3VS
1
33P_0402_50V8J
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
PDD10
PDD11
PDD12
PDDREQ
PDIOW#
PDD8
PDDREQ <20>
PDIOW# <20>
PDDACK#
PDD13
PDCS1#
PDD14
PDDACK# <20>
PDCS1#
PDIORDY
IDEIRQ
PDA2
<20>
PDIORDY <20>
IDEIRQ <20>
PDA2
<20>
PCSEL
1
R413
HDD_LED#
2
470_0402_5%
HDD_LED# <36>
SUYIN_127212FA040G200ZX
+3VS
R410 1
R411 1
2 4.7K_0402_5%
2 8.2K_0402_5%
PDIORDY
IDEIRQ
Layout Note: +VPHDD trace

width 60 mil
Placea caps. near HDD

CONN.
+3VS
500mA
1
1
C506
1
C491
10U_0805_10V4Z
2
2
1000P_0402_50V7K
C507
0.1U_0402_16V4Z

Title
PROPRIETARY NOTE
Size
Date:
C
ICH4-M PIDE&ICH Pull-up

Document Number
Rev
0.5
EDX20 LA-2481
D
Sheet
23
of
48
C550
15P_0402_50V8J
@
IDSEL:PCI_AD20
<19,26,27>
<19,26,27>
<19,26,27>
<19,26,27>
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
PCIRST#
<19,25,26,27,32> PCIRST#
<19,26,27> PCI_FRAME#
<19,26,27> PCI_IRDY#
<19,26,27> PCI_TRDY#
<19,26,27> PCI_DEVSEL#
<19,26,27> PCI_STOP#
<19,26,27> PCI_PERR#
<19,26,27> PCI_SERR#
<19,26,27> PCI_PAR
<19> PCI_REQ#2
<19> PCI_GNT#2
<15> CLK_PCI_PCM
+3VS
R454
10K_0402_5%
CLK_PCI_PCM
<19> PCI_PIRQA#
<19> PCI_PIRQB#
<21,32,35> SIRQ
B
PCI_PIRQA#
PCI_PIRQB#
1
R448
R462
2
R460
2
R459
2
R458
2
R457
2
R456
<21,26,27,32,35> PM_CLKRUN#
CBE3#
CBE2#
CBE1#
CBE0#
G4
J4
K1
K3
L1
L2
L3
M1
M2
A1
B1
H1
PCIRST#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
PAR
PCIREQ#
PCIGNT#
PCICLK
L8
L11
<34> PCM_PME#
PCI_AD20
E1
J3
N1
N5
PCM_ID
2
F4
100_0402_5%
1 0_0402_5%
K8
1@ 10K_0402_5% N9
1 0_0402_5%
K9
1 0_0402_5%
N10
1@ 10K_0402_5% L10
N11
1 0_0402_5%
M11
PCIRST#
M10
RIOUT#_PME#
SUSPEND#
2200P_0402_25V7K
CCBE3#/REG#
CCBE2#/A12
CCBE1#/A8
CCBE0#/CE1#
B7
A11
E11
H13
S1_REG#
S1_A12
S1_A8
S1_CE1#
CRST#/RESET
CFRAME#/A23
CIRDY#/A15
CTRDY#/A22
CDEVSEL#/A21
CSTOP#/A20
CPERR#/A14
CSERR#/WAIT#
CPAR/A13
CREQ#/INPACK#
CGNT#/WE#
CCLK/A16
B9
B11
A12
A13
B13
C12
C13
A5
D13
B8
C11
B12
S1_RST
C5
D5
S1_BVD1
S1_WP
D11
S1_A19
CINT#/READY_IREQ#
D6
S1_RDY#
SPKROUT
CAUDIO/BVD2_SPKR#
M9
B5
PCM_SPK#
S1_BVD2
CCD2#/CD2#
CCD1#/CD1#
CVS2/VS2#
CVS1/VS1#
A4
L12
D9
C6
S1_CD2#
S1_CD1#
S1_VS2
S1_VS1
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
CRSV1/D14
CRSV2/A18
CRSV3/D2
D3
H2
L4
M8
K11
F12
C10
B6
J13
E10
A2
CBLOCK#/A19
SDCD#
MSINS#
E9
F6
MSDATA3
MSDATA2
MSDATA1
MSDATA0
E8
H7
F9
G8
H9
G9
VCC_SD
GND_SD
SD
MSPWREN#
SDPWREN33#
MMC_DET#
MFUNC7
MSCLK
SDCLK
<25>
J9
E7
G5
J8
G7
1 0_0402_5%
1
1U_0603_10V4Z
SDCMD
SDWP
SDCLKI
MSBS
+SD3_VCC
2
C536
E5
F8
H5
H8
R461
SD_OC#
RSVD4
RSVD3
RSVD2
RSVD1
H6
J7
J6
J5
SDDAT0
SDDAT1
SDDAT2
SDDAT3
E6
F7
F5
G6
C557
C548
C552
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C560
1
C546
C539
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
S1_A[0..25]
S1_A[0..25] <25>
S1_D[0..15]
S1_D[0..15] <25>
+S1_VCC
Reserved layout
for debug used.
R447
47K_0402_5%
R449
47K_0402_5%
S1_IOWR# <25>
S1_IORD# <25>
S1_OE#
S1_CE2#
<25>
<25>
+S1_VCC
Reserved layout
for debug used.
R451
R433
47K_0402_5% 47K_0402_5%
R440
@ 47K_0402_5%
S1_REG# <25>
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A14
S1_WAIT#
S1_A13
S1_INPACK#
S1_WE#
A16_CLK
S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3
0.1U_0402_16V4Z
S1_CE1#
<25>
S1_RST
<25>
S1_WAIT# <25>
S1_INPACK# <25>
S1_WE# <25>
2
R442
S1_A16
1
1
S1_BVD1 <25>10_0402_5%
S1_WP
<25>
C540
2
@ 10P_0402_50V8J
S1_RDY# <25>
PCM_SPK# <29>
S1_BVD2 <25>
S1_CD2# <25>
S1_CD1# <25>
S1_VS2
S1_VS1
<25>
<25>
C545
10P_0402_50V8J
<25>
C549
0.1U_0402_16V4Z
B2
C3
B3
A3
C4
A6
D7
C7
A8
D8
A9
C9
A10
B10
D10
E12
F10
E13
F13
F11
G10
G11
G12
H12
H10
J11
J12
K13
J10
K10
K12
L13
GRST#
C544
CAD31/D10
CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6
CAD19/A25
CAD18/A7
CAD17/A24
CAD16/A17
CAD15/IOWR#
CAD14/A9
CAD13/IORD#
CAD12/A11
CAD11/OE#
CAD10/CE2#
CAD9/A10
CAD8/D15
CAD7/D7
CAD6/D13
CAD5/D6
CAD4/D12
CAD3/D5
CAD2/D11
CAD1/D4
CAD0/D3
IDSEL
C543
0.1U_0402_16V4Z
Place C871, C872

Close to C694
CSTSCHG/BVD1_STSHG#
CCLKRUN#/WP_IOIS16#
MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6
C547
C558
R450
10_0402_5%
@
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
0.1U_0402_16V4Z
CLK_PCI_PCM
C2
C1
D4
D2
D1
E4
E3
E2
F2
F1
G2
G3
H3
H4
J1
J2
N2
M3
N3
K4
M4
K5
L5
M5
K6
M6
N6
M7
N7
L7
K7
N8
CARDBUS
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
+3VS
0.1U_0402_16V4Z
VCCD1#
VCCD0#
PCI_AD[0..31]
<19,26,27> PCI_AD[0..31]
B4
C8
D12
H11
L9
L6
N4
K2
G1
F3
U21
VCC10
VCC9
VCC8
VCC7
VCC6
VCC5
VCC4
VCC3
VCC2
VCC1
0.1U_0402_16V4Z
Place C877, C878

Close to U9 Bottom Side
D
1
C559
A7
G13
2200P_0402_25V7K
C538
VCCA2
VCCA1
C537
2
+3VS
+3VS
100P_0402_25V8K
VPPD0
VPPD1
VCCD0#
VCCD1#
M12
N12
C551
2
<25>
<25>
<25>
<25>
VPPD1
VPPD0
C553
2
0.1U_0402_16V4Z
1
M13
N13
+S1_VCC
100P_0402_25V8K
1
+S1_VCC
C554
10P_0402_50V8J
Close to CB712
CD1# and CD2#
S1_D14
S1_A18
S1_D2
SD_DAT0
SD_DAT1
SD_DAT2
SD_DAT3
<25>
<25>
<25>
<25>
CB712_ LFBGA_169P
C556
1
2
10P_0402_50V8J
R452
<15> SD_CLKIN
1 0_0402_5%
<25>
<25>
<25>
SD_CLK
SD_CMD
SD_WP
Title
PCMCIA Controller ENE CB1410 & CB712
Size
Document Number
Custom
<25> SD_PWREN#
Date:
R ev
0.5
EDX20 LA-2481
Sheet

1
24
of
48
CARDBUS SOCKET
<24> S1_A[0..25]
<24> S1_D[0..15]
S1_A[0..25]
+SD3_VCC
S1_D[0..15]
<24>
S1_WE#
<24> S1_RDY#
+S1_VCC
+S1_VPP
<24>
S1_WP
S1_A16
S1_A15
S1_A12
S1_A7
S1_A6
S1_A5
S1_A4
S1_A3
S1_A2
S1_A1
S1_A0
S1_D0
S1_D1
S1_D2
S1_WP
2
43K_0402_5%
2
43K_0402_5%
2
43K_0402_5%
S1_OE#
2
43K_0402_5%
S1_CE1#
<24>
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
1
<24>
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
2
43K_0402_5%
JP26
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
S1_D3
S1_D4
S1_D5
S1_D6
S1_D7
S1_CE1#
S1_A10
S1_OE#
S1_A11
S1_A9
S1_A8
S1_A13
S1_A14
S1_WE#
S1_RDY#
R336 R340 R354 R367 R333
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
S1_CD1#
S1_D11
S1_D12
S1_D13
S1_D14
S1_D15
S1_CE2#
S1_VS1
S1_IORD#
S1_IOWR#
S1_A17
S1_A18
S1_A19
S1_A20
S1_A21
S1_A22
S1_A23
S1_A24
S1_A25
S1_VS2
S1_RST
S1_WAIT#
S1_INPACK#
S1_REG#
S1_BVD2
S1_BVD1
S1_D8
S1_D9
S1_D10
S1_CD2#
S1_CD1# <24>
S1_CE2# <24>
S1_VS1
<24>
S1_IORD# <24>
S1_IOWR# <24>
SD SOCKET
JP11
Close to chip
+S1_VCC
+S1_VPP
<24>
S1_VS2
<24>
S1_RST
<24>
S1_WAIT# <24>
S1_INPACK# <24>
S1_REG# <24>
S1_BVD2 <24>
S1_BVD1 <24>
SD_CLK
1
R463
C371
SD_DAT2
SD5
<24>
<24>
SD_DAT3
SD_CMD
<24>
<24>
SD_DAT0
SD_DAT1
1
2
3
4
5
6
7
8
SD1
SD2
Vss1
Vdd
SDCLK
Vss2
SD3
SD4
<24>
MMC_DET#
10
SD_CLK_R
2
22_0402_5%
10P_0402_50V8J
<24>
Wr_Pt
Vss4
Vss3
14
13
12
MMC_DET# Wr_Pt_Vss
11
MOLEX_67600-0001
Close to SD socket
<24>
SD_WP
S1_CD2# <24>
FCI_62597-00B_RB
Close to SD socket
+3VS
+SD3_VCC
2
R300
43K_0402_5%
1
1
<24> SD_PWREN#
PCMCIA Power Controller
C379
0.1U_0402_16V4Z
U18
1
2
3
4
GND
IN
IN
EN#
1
OUT
OUT
OUT
OC#
C363
0.1U_0402_16V4Z
C358
4.7U_0805_10V4Z
8
7
6
5
+3VS
2
TPS2041ADR_SO8
R302
0.1U_0402_16V4Z
U19
C333
10K_0402_5%
+S1_VCC
12V
VCC
VCC
VCC
13
12
11
VPP
10
VCCD0
VCCD1
VPPD0
VPPD1
1
2
15
14
1
2
C325 0.1U_0402_16V4Z
40mil
C323
1
C322
1
C328
1
C332
+S1_VPP
+5VS
0.1U_0402_16V4Z
C326
4.7U_0805_10V4Z
C330
5
6
5V
5V
OC
VCCD0#
VCCD1#
VPPD0
VPPD1
<24>
<24>
<24>
<24>
CP-2211_SSOP16
R303
10K_0402_5%
3.3V
3.3V
SHDN
3
4
GND
C320
16
4.7U_0805_10V4Z
C324
SD_OC# <24>
0.1U_0402_16V4Z
2
1U_0402_6.3V4Z
2
0.01U_0402_25V4Z
2
1U_0603_10V4Z
<BOM Structure>
+3VS
0.1U_0402_16V4Z
20mil
+5VS
<19,24,26,27,32> PCIRST#
PCIRST# 1
R304
2
@ 0_0402_5%
Title

PCMCIA/SD SOCKET
Size
Document Number
CustomEDX20 LA-2481
Date:
R ev
0.5
Sheet
25
of
48
-+5VS limited to 100mA

-+3.3VAUX--Normal:
375mA, D3: 200mA,
-+3VS_MINIPCI: 500mA
for wireless LAN
Q42
PCI_AD18
PCI_AD18_MINI
2
100_0402_5%
1
R519
MMBT3904_SOT23
<21>
PCI_AD[0..31]
WL_EN#
WL_EN#
1
R521
2
1K_0402_5%
PCI_AD[0..31] <19,24,27>
JP29
TIP
LAN RESERVED
<32> WLAN_ACT1
D8
<32>
RFOFF#
2
RB751V_SOD323
PCI_PIRQG#
<19> PCI_PIRQG#
+3VS
W=60mils
<15> CLK_PCI_MINI
CLK_PCI_MINI
<19> PCI_REQ#1
PCI_AD31
PCI_AD29
PCI_AD27
PCI_AD25
<36> WLAN_ACTIVE
<19,24,27> PCI_C/BE#3
PCI_AD23
PCI_AD21
PCI_AD19
PCI_AD17
<19,24,27> PCI_C/BE#2
<19,24,27> PCI_IRDY#
<21,24,27,32,35> PM_CLKRUN#
<19,24,27> PCI_SERR#
<19,24,27> PCI_PERR#
<19,24,27> PCI_C/BE#1
PCI_AD14
PCI_AD12
PCI_AD10
PCI_AD8
PCI_AD7
CLK_PCI_MINI
PCI_AD5
PCI_AD3
+5VS
W=20mils
PCI_AD1
R348
22_0402_5%
@
C374
22P_0402_50V8J
@
+5VS
W=20mils
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
1
KEY
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
2
KEY
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
126
RING
LAN RESERVED
WLAN_ACT2 <32>
W=20mils
PCI_PIRQH#
W=20mils
PCIRST#
+5VS
PCI_PIRQH# <19>
PCIRST#
+3V_MINI
<19,24,25,27,32>
W=60mils
1
R528
2
0_0603_5%
+3V_LAN
+3VS
PCI_GNT#1 <19>
PCI_AD30
WLANPME# <34>
BT_ACTIVE <36>
PCI_AD28
PCI_AD26
PCI_AD24
PCI_AD18_MINI
IDSEL : AD18
PCI_AD22
PCI_AD20
PCI_AD18
PCI_AD16
PCI_PAR <19,24,27>
0.1U_0402_16V4Z
PCI_FRAME# <19,24,27>
PCI_TRDY# <19,24,27>
PCI_STOP# <19,24,27>
PCI_DEVSEL# <19,24,27>
C344
@ 1000P_0402_50V7K
PCI_AD15
PCI_AD13
PCI_AD11
C373
+5VS
C372
C346
@10U_1206_10V4Z
PCI_AD9
0.1U_0402_16V4Z
PCI_C/BE#0 <19,24,27>
PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0
0.1U_0402_16V4Z
1
C368
0.1U_0402_16V4Z
W=20mils
0.1U_0402_16V4Z
+3V_MINI
1
C369
1
C367
0.1U_0402_16V4Z
1
C370
0.1U_0402_16V4Z
1
C349
C350
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C352
+3VS
1
C348
C347
10U_1206_6.3V7K
0.1U_0402_16V4Z
+3V_MINI
AMP_1318916-1
C351
0.1U_0402_16V4Z

Title
PROPRIETARY NOTE
Size
Date:
MiniPCI TYPEIII Slot

Document Number
Rev
0.5
EDX20 LA-2481
Sheet
26
of
48
LAN RTL8110SB(L)
+3V_LAN
U42
LAN_EECS
LAN_EECLK
LAN_EEDI
LAN_EEDO
U39
76
61
63
67
68
69
PAR
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
<19,24,26> PCI_PERR#
<19,24,26> PCI_SERR#
70
75
PERR#
SERR#
<19> PCI_REQ#3
<19> PCI_GNT#3
30
29
REQ#
GNT#
25
INTA#
<19,24,26> PCI_PAR
<19,24,26> PCI_FRAME#
<19,24,26> PCI_IRDY#
<19,24,26> PCI_TRDY#
<19,24,26> PCI_DEVSEL#
<19,24,26> PCI_STOP#
2 LAN_IDSEL
R244
100_0402_1%
<19> PCI_PIRQF#
<34> LAN_PME#
31
PME#
<19,24,25,26,32> PCIRST#
27
RST#
<15> CLK_PCI_LOM
<21,24,26,32,35> PM_CLKRUN#
CLK_PCI_LOM
PM_CLKRUN#
1
2
5
6
LAN_MDI0+
LAN_MDI0LAN_MDI1+
LAN_MDI1-
14
15
18
19
LAN_MDI2+
LAN_MDI2LAN_MDI3+
LAN_MDI3-
28
65
CLK
CLKRUN#
4
17
128
GND/VSS
GND/VSS
GND/VSS
21
38
51
66
81
91
101
119
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
35
52
80
100
GND
GND
GND
GND
121
122
LWAKE
ISOLATE#
RTSET
NC/SMBCLK
NC/SMBDATA
105
23
127
72
74
NC/M66EN
88
NC/AVDDH
AVDDH
10
120
NC/HSDAC+
NC/HG
NC/LG2
11
123
124
AT93C46-10SI-2.7_SO8
+3V_LAN
R404
+3V_LAN
+12VALW
+3VALW
R527
LAN_X1
LAN_X2
<32>
LAN_EN#
LAN_EN#
<28>
<28>
<28>
<28>
R532
10K_0402_5%
LAN_MIDI2+
LAN_MIDI2LAN_MIDI3+
LAN_MIDI3-
10K_0402_5%
<28>
<28>
<28>
<28>
12/23
LAN_MIDI0+
LAN_MIDI0LAN_MIDI1+
LAN_MIDI1-
Q63
@ AO3402_SOT23
LAN_ACT# <28>
LAN_LINK100# <28>
LAN_LINK10# <28>
Q64
2
G
@ 2N7002_SOT23
10mil
R211
R210
R219
R525
10mil
2 1K_0402_5%
+3VS
2 15K_0402_5%
2 2.49K_0402_1%
2@ 2.49K_0402_1%
1
1
1
1
0.01U_0402_16V7K
+3V_LAN
+3V_LAN
+3V_LAN
Y4
9
13
LAN_X1 2
22
48
62
73
112
118
CTRL25
CTRL25
CTRL12
125
CTRL18
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
26
41
56
71
84
94
107
+3V_LAN
AVDDL
AVDDL
AVDDL
AVDDL
3
7
20
16
+LAN_AVDDL
VDD12
VDD12
VDD12
VDD12
VDD12
126
32
54
78
99
0.1U_0402_16V4Z
NC/VDD12
NC/VDD12
NC/VDD12
NC/VDD12
NC/VDD12
24
45
64
110
116
+1.2V_LAN
40mil
C482
27P_0402_50V8J
2SB1188_SC62
LAN_X2
25MHZ_20P
1
NC/GND
NC/GND
NC/GND
NC/GND
NC/GND
NC/GND
CTRL25
C480
27P_0402_50V8J
CTRL18
2SB1188_SC62
Q39
Icmax = 2A
Q38
Icmax = 2A
60mil
40mil
+2.5V_LAN
C470
22U_1206_16V4Z_V1
NC
C575
ISOLATE# <21>
60mil
NC/VSS
NC/VSS
+3VALW
C500
0.1U_0402_16V4Z
IDSEL
LAN_ACT#
LAN_LINK100#
LAN_LINK10#
46
PCI_AD17
117
115
114
113
C/BE#0
C/BE#1
C/BE#2
C/BE#3
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
LED0
LED1
LED2
NC/LED3
X1
X2
LAN I/F
IDSEL: AD17
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
92
77
60
44
<19,24,26>
<19,24,26>
<19,24,26>
<19,24,26>
LAN_EEDO
LAN_EEDI
LAN_EECLK
LAN_EECS
NC/MDI2+
NC/MDI2NC/MDI3+
NC/MDI3-
PCI I/F
108
109
111
106
TXD+/MDI0+
TXD-/MDI0RXIN+/MDI1+
RXIN-/MDI1-
Power
1
2
C208
@ 18P_0402_50V8K
EEDO
AUX/EEDI
EESK
EECS
8
7
6
5
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
VCC
NC
NC
GND
R212
@ 10_0402_5%
104
103
102
98
97
96
95
93
90
89
87
86
85
83
82
79
59
58
57
55
53
50
49
47
43
42
40
39
37
36
34
33
CS
SK
DI
DO
CLK_PCI_LOM
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
R254
3.6K_0402_5%
1
2
1
2
3
4
PCI_AD[0..31]
<19,24,26> PCI_AD[0..31]
0.1U_0402_16V4Z
2
+1.2V_LAN
C471
C462
22U_1206_16V4Z_V1
C465
0.1U_0402_16V4Z
12
40mil
+2.5V_LAN
C476
C475
C474
+3V_LAN
40mil
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C503
C502
1
C472
0.1U_0402_16V4Z
1
C489
0.1U_0402_16V4Z
1
C478
C207
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1.2V for RTL8110SB(L)
20mil
+3V_LAN
0.1U_0402_16V4Z
0.1U_0402_16V4Z
40mil
0.1U_0402_16V4Z
+1.2V_LAN
RTL8110SBL_LQFP128
1
C182
0.1U_0402_16V4Z
C240
C226
0.1U_0402_16V4Z
C504
2
0.1U_0402_16V4Z
C473
C493
0.1U_0402_16V4Z
C485
C481
C186
0.1U_0402_16V4Z
0.1U_0402_16V4Z

Title
5
LAN CONTROLLER
Size
Document Number
Date:
Re v
0.5
EDX20 LA-2481
Sheet
1
27
of
48
1
C203
2
0.01U_0402_16V7K
D
1
C204
2
0.01U_0402_16V7K
1
C205
2
0.01U_0402_16V7K
1
C206
2
R202
2
R203
2
R204
2
R205
2
R206
2
R207
2
R208
2
R209
1
49.9_0402_1%
1
49.9_0402_1%
1
49.9_0402_1%
1
49.9_0402_1%
1
49.9_0402_1%
1
49.9_0402_1%
1
49.9_0402_1%
1
49.9_0402_1%
R256
1
2
0_0805_5%
LAN_MDI0+
LAN_MDI0-
L13 1
2
@ BLM11A601S_0603
+3V_LAN
LAN_MDI1+
C499
LAN_MDI1-
LAN ANALOG
SWITCH
LAN_SW_VCC
1
0.047U_0402_16V7K
C249
2
0.1U_0603_16V7K
U13
LAN_MDI2+
L14
LAN_MDI2-
LAN_MIDI0-
LAN_MDI0-
<27>
LAN_MIDI0+
LAN_MDI0+
<27>
LAN_MIDI1-
LAN_MDI1-
<27>
LAN_MIDI1+
LAN_MDI1+
<27>
LAN_MIDI2-
LAN_MDI2-
<27>
LAN_MIDI2+
LAN_MDI2+
<27>
LAN_MIDI3-
LAN_MDI3-
<27>
LAN_MIDI3+
LAN_MDI3+
<32>
DOCKEN
<27>
LAN_MDI3+
LAN_MDI3-
DOCKEN
1: TO DOCK
LAN_MDI0-R
2
L15 0_0603_5%
2
0_0603_5%
L17
2
L18 0_0603_5%
2
0_0603_5%
L20
2
L21 0_0603_5%
2
0_0603_5%
L23
2
L24 0_0603_5%
2
0_0603_5%
0B1
1B1
48
47
SW_LAN_TXSW_LAN_TX+
43
42
SW_LAN_RXSW_LAN_RX+
A0
LAN_MDI0+R
A1
2B1
3B1
LAN_MDI1-R
A2
4B1
5B1
37
36
SW_LAN_TX2SW_LAN_TX2+
LAN_MDI1+R
A3
6B1
7B1
32
31
SW_LAN_TX3SW_LAN_TX3+
LAN_MDI2-R
11
A4
LAN_MDI2+R
12
A5
0LED1
1LED1
2LED1
22
23
52
LAN_MDI3-R
14
A6
0B2
1B2
46
45
DOCK_LAN_TXDOCK_LAN_TX+
DOCK_LAN_TX- <36>
DOCK_LAN_TX+ <36>
LAN_MDI3+R
15
A7
2B2
3B2
41
40
DOCK_LAN_RXDOCK_LAN_RX+
DOCK_LAN_RX- <36>
DOCK_LAN_RX+ <36>
17
SEL
4B2
5B2
35
34
DOCK_LAN_TX2DOCK_LAN_TX2+
DOCK_LAN_TX2- <36>
DOCK_LAN_TX2+ <36>
19
20
54
LED0
LED1
LED2
6B2
7B2
30
29
DOCK_LAN_TX3- <36>
DOCK_LAN_TX3+ <36>
25
26
51
DOCK_LAN_ACT#
DOCK_LAN_ACT# <36>
DOCK_LAN_LINK100#
DOCK_LAN_LINK100# <36>
DOCKEN
0: TO RJ45
Layout Notice : Place bead as
close PI3L500 as possible
56
50
38
27
18
10
4
2
0.01U_0402_16V7K
Close to Chip side
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0
<27> LAN_ACT#
<27> LAN_LINK10#
<27> LAN_LINK100#
0LED2
1LED2
2LED2
TO
DOCK
NC
GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
TO
RJ45
1
6
9
13
16
21
24
28
33
39
44
49
53
55
PI3L500E_TQFN56
FROM NIC
+2.5V_LAN
R353
0_0603_5%
T19
2
1
C385
SW_LAN_TX+
SW_LAN_TXB
1
C387
SW_LAN_RX+
SW_LAN_RX-
1
C389
SW_LAN_TX2+
SW_LAN_TX2-
1
C396
SW_LAN_TX3+
SW_LAN_TX3-
2
0.01U_0402_16V7K
2
0.01U_0402_16V7K
2
0.01U_0402_16V7K
2
0.01U_0402_16V7K
1
2
3
TCT1
TD1+
TD1-
MCT1
MX1+
MX1-
24
23
22
RJ45_MDI0+
RJ45_MDI0-
4
5
6
TCT2
TD2+
TD2-
MCT2
MX2+
MX2-
21
20
19
RJ45_MDI1+
RJ45_MDI1-
7
8
9
TCT3
TD3+
TD3-
MCT3
MX3+
MX3-
18
17
16
RJ45_MDI2+
RJ45_MDI2-
10
11
12
TCT4
TD4+
TD4-
MCT4
MX4+
MX4-
15
14
13
RJ45_MDI3+
RJ45_MDI3-
1
R368
1
R373
1
R378
1
R379
2
75_0402_1%
2
75_0402_1%
2
75_0402_1%
2
C384
1000P_1206_2KV7K
0.5u_24HST1041A-2
JP15
2
75_0402_1%
SHLD1
RJ45_MDI3-
PR4-
RJ45_MDI3+
PR4+
RJ45_MDI1-
PR2-
RJ45_MDI2-
PR3-
RJ45_MDI2+
PR3+
RJ45_MDI1+
PR2+
RJ45_MDI0-
PR1-
RJ45_MDI0+
PR1+
10
SHLD2
ALLTOP_C10068-10804

Title
LAN CONTROLLER
Size
Date:
Document Number
Rev
0.5
EDX20 LA-2481
Sheet
1
28
of
48
+5VALW
w=40mil
1
C422
4.7U_0805_10V4Z
VDDA
BEEP#
C421
0.1U_0402_16V4Z
1 1
VDDA
EN
VOUT
BYPASS
GND
1
2
C436
C439
4.7U_0805_10V4Z
C438
0.1U_0402_16V4Z
D
2
0.1U_0402_16V4Z
<32,37,38> SUSP#
2K_0402_5%
VIN
TPS793475DBV_SOT23-5
R169
100K_0402_5%
2
C147
1U_0603_10V4Z
R182
<32>
Io= 200mA
Vo= 4.65V ~ 4.85V
w=30mil
U33
PCM_SPK#
ICH_SPKR
2
R199
2
R200
MONO_IN
1
1
2
2K_0402_5% C167 1U_0603_10V4Z
1
1
2
2K_0402_5% C168 1U_0603_10V4Z
<24>
<21>
D6
1SS355_SOD323
C138
0.1U_0402_16V4Z
Iin= 80mA
Iin= 35mA
VDDA
VDDC
+3VS
w=30mil
1
2
C469 0.1U_0402_16V4Z
15
AUX_R
FRONT_R
36
FP_MIC_L
MONO
37
17
FP_MIC_R
REAR_L
39
<30> INT_SPK_L
23
LINE_IN/SUR_L
REAR_R
41
<30> INT_SPK_R
24
LINE_IN/SUR_R
BIT_CLK
1
1
MONO_IN 2
1
R167
51K_0402_5%
R168
4.7K_0402_5%
C463
2700P_0603_50V7K
CD_L
20
CD_R
19
CD_GND
<30>
INT_MIC3
21
MIC1/CTR
<36>
INT_MIC1
22
MIC2/LFE
13
PHONE
12
PC_BEEP
2 C129
0.022U_0402_25V4Z
<20> AC97_RST#
11
RESET#
<20> AC97_SYNC
10
SYNC
SDATA_IN
XTL_IN
XTL_OUT
AFILT1
<20> AC97_SDOUT
VDDA
1
R395
2
4.7K_0402_5%
<30,36> HP_PLUG#
AFILT2
30
28
VDDC
CID1#
47
EAPD/SPDIF_IN
48
1
2
R393 4.7K_0402_5%
4
7
VREF
27
CAP2
32
GPIO0
GPIO1
GPIO2
GPIO3
CENTER
LFE
31
33
34
45
43
44
AVSS1
AVSS2
AVSS3
26
42
40
SDATA_OUT
46
3
29
VREFOUT
FRONT_L
18
SPDIF/ADAT
DVSS1
DVSS2
2
1
@ C113 1000P_0402_50V7K
1
2
@ C116 1000P_0402_50V7K
LINE_OUT_L <30>
LINE_OUT_R <30>
AUX_L
For Internal Speaker
C127
10U_0805_10V4Z
35
16
2
1
C440
0.22U_0603_10V7K
<36> DOCK_MIC
0.1U_0402_16V4Z
14
From Docking MIC Jack
1
C460
2
0_0603_5%
DVDD2
AVDD1
U37
C
1
C453
0.1U_0402_16V4Z
DVDD1
1
C466
10U_0805_10V4Z
38
25
1
C450
0.1U_0402_16V4Z
AVDD2
1
C464
0.1U_0402_16V4Z
1
R151
1
2
@ C448 1000P_0402_50V7K
1
2
@ C449 1000P_0402_50V7K
HP_OUT_L <30,36>
HP_OUT_R <30,36>
1
1
2
R403 33_0402_5%
2
C458
27P_0402_50V8J
AC97_BITCLK <20>
AC97_SDIN0 <20>
XTL_IN
XTL_OUT 1
R402
1
C459
1
C457
1
C461
1
C454
1
R150
1
R156
1
R401
CLK_14M_CODEC
2
0_0402_5%
CLK_14M_CODEC <15>
2
0_0402_5%
2
820P_0603_50V7K
2
820P_0603_50V7K
2
1U_0603_10V4Z
2
1U_0603_10V4Z
2
0_0402_5%
2
0_0402_5%
MIC_SEL <32>
GPIO1
<30>
DIS_INTMIC <36>
INT_MIC3 <30>
INT_MIC2 <36>
STAC9758T-CB!_TQFP48
DIS_INTMIC
(PIN 34)
INT_MIC1
INT_MIC2
INT_MIC3
EAPD
DOCK_MIC
(PIN 16)
(PIN 47)
LINE_IN_L PIN23
LINE_IN_R PIN24
MIC_SEL
INT_MIC1
INT_MIC2
INT_MIC3
(PIN 31)
(PIN 22)
(PIN 44)
(PIN 21,43)
DISABLE
ENABLE
ENABLE
L (Landscape)
ENABLE
DISABLE
ENABLE
ENABLE
DISABLE
DISABLE
H (Portrait)
DISABLE
ENABLE
ENABLE
O MIC1
MIC2
MIC3

Title
PROPRIETARY NOTE
Size
Date:
3
AC97 STAC9758
Document Number
Rev
0.5
EDX20 LA-2481
Sheet
1
29
of
48
Speaker
JP13
INTSPK_R+
INTSPK_R-
INPUT
IMPEDANCE
6dB
90K ohm
10dB
70K ohm
15.6dB
45K ohm
21.6dB
25K ohm
INTSPK_L+
INTSPK_LD9
R248
10K_0402_5%
@ DA204U_SC70
@ DA204U_SC70
D19
@ DA204U_SC70
MOLEX_53780-0290
@ DA204U_SC70
+5VS
R250
@ 10K_0402_5%
R243
10K_0402_5%
2
1
1
2
R320
4.7K_0402_5%
VDDA
Compal P/N: SCVL080C000
BLM21A05_0805
2
+5VALW
INT_MIC_3
1
2 INTMIC_3
L26
FBM11-160808-700T
INT_MIC3
C307 0.22U_0603_10V7K
Q23
AO3413_SOT23
U41
7
2 C494
0.47U_0603_16V4Z
C209
10U_0805_10V4Z
C214
0.1U_0402_16V4Z
17
2 C224
0.1U_0402_16V4Z
<29> INT_SPK_R
<7,29,36>
RIN+
GAIN0
GAIN0
GAIN1
GAIN1
ROUT+
18
INTSPK_R+
RIN-
DVT2 swap pin
VDD
PVDD1
PVDD2
C213
0.1U_0402_16V4Z
16
15
6
C241
0.1U_0402_16V4Z
1
2
3
4
JP25
R318
4.99K_0603_1%
EC_DIS_INTMIC
<32,36> EC_DIS_INTMIC
INTMIC3
W=30mils
1
Internal MIC3
ACES_85201-0405
<29>
+5VAMP
L12 1
R301
@ 0_0402_5%
1
2
D20
1
2
MOLEX_53780-0290
JP16
1 1
2 2
GAIN1
D10
AV(inv)
GAIN0
GAIN1
R245
10K_0402_5%
@
GAIN0
Gain Setting
+5VS
1
2
GNDA
C319
0.22U_0603_10V7K
VDDA
<29,36> HP_PLUG#
14
INTSPK_R-
LOUT+
INTSPK_L+
LOUT-
1
INTSPK_L-
<29,36> HP_OUT_R
<29,36> HP_OUT_L
2
4.99_0402_1%
2
4.99_0402_1%
BYPASS
HP_OUTL
R192
20K_0402_5%
1
C487
C490
1
2
4
L10 FBM-11-160808-700T_0603
1
2 HPOUTR 3
L9 FBM11-160808-700T
1
2 HPOUTL 2
L8 FBM11-160808-700T
1
HP_OUTR
2
1
TPA6017A2_TSSOP20
C171
47U_1210_10V3M
1
2
C143
47U_1210_10V3M
SHUTDOWN
20
13
11
1
12
10
1
R190
1
R181
Please keep EAPD at High level
NC
BYPASS
GND1
GND2
GND3
GND4
<29,36> HP_PLUG#
O
G
MUTE#
19
<32>
VDDA
U35
1 A
HP OUT
JP6
6
5
2
LIN-
R217
4.7K_0402_5%
5
2 C239
0.1U_0402_16V4Z
<29> INT_SPK_L
ROUTLIN+
R197
20K_0402_5%
330P_0603_50V8J
C163
9
2 C492
0.47U_0603_16V4Z
C176
330P_0603_50V8J
1
SUYIN_010030FR006G100ZL
C189
0.1U_0402_16V4Z
NC7ST08P5X_SC70-5
4.7U_0805_10V4Z
0.1U_0402_16V4Z
<29>
GPIO1
VDDA
VDDA
2
2
LINE_OUTL
2
1
C508
0.33U_0603_16V4Z
R276
20K_0402_5%
R277
20K_0402_5%
330P_0603_50V8J
C259
6
5
1
2
4
L22 FBM-11-160808-700T_0603
1
2 LINEOUTR3
L19 FBM11-160808-700T
1
2 LINEOUTL 2
L16 FBM11-160808-700T
1
LINE_OUTR
<29> LINE_OUT_L
2
0_0603_5%
2
0_0603_5%
2
0_0603_5%
2
4.99_0402_1%
2
4.99_0402_1%
1
R170
1
R281
1
R97
1
R415
1
R414
<29> LINE_OUT_R
MIC
JP7
R275
4.7K_0402_5%
C511
0.33U_0603_16V4Z
1
2
R280
4.7K_0402_5%
1
2
SUYIN_010030FR006G100ZL
C282
330P_0603_50V8J
1
C286
0.1U_0402_16V4Z

Title
PROPRIETARY NOTE
Size
Date:
3
AMP & Audio Jack

Document Number
R ev
0.5
EDX20 LA-2481
Sheet
1
30
of
48
500mA
USB Over Current
USB_0S USB_1S
USB Port 0
USB_0S
W=40mils
1
1
+5VS
C61
0.1U_0402_16V4Z
U29
W=40mils
1
1
C408
C409
4.7U_0805_10V4Z
2
1
2
3
4
GND
IN
EN1#
EN2#
OC1#
OUT1
OUT2
OC2#
8
7
6
5
1
R15
2
47_0402_5%
USB_OC#0
1
R14
2
47_0402_5% 1
USB_OC#1
1
C413
150U_D_6.3VM
2
C63
0.001U_0402_50V7M
USB_OC#0 <21>
JP4
TPS2042ADR_SO8
C29
0.1U_0402_16V4Z
USB_OC#1 <21>
C28
0.1U_0402_16V4Z
<21>
<21>
USBP0USBP0+
USBP0USBP0+
1
R390 1
R391
1
USB20_N0_R 2
USB20_P0_R 3
4
2
2 0_0603_5%
0_0603_5%
1
C67
@
15P_0402_50V8D
15P_0402_50V8D
0.1U_0402_16V4Z
SUYIN_020173MR004S556ZL
C74
@
USB Port 1
USB_1S
W=40mils
U55
C
USBP0+
USBP1-
VCC
DD+
GND
AS
SDA
GND
ALERT
VDD
SCL
USBP0-
1
1
+5VS
C4
0.1U_0402_16V4Z
USBP1+
+
2
C398
150U_D_6.3VM
2
C7
0.001U_0402_50V7M
1
@ AD7414ART-0_SOT23-6~D
JP3
<21>
<21>
USBP1USBP1+
USBP1USBP1+
1
R385 1
R387
2
2 0_0603_5%
0_0603_5%
C17
@
15P_0402_50V8D
15P_0402_50V8D
1
USB20_N1_R 2
USB20_P1_R 3
4
1
1
VCC
DD+
GND
SUYIN_020173MR004S556ZL
C30
2 @

Title
PROPRIETARY NOTE
Size
Date:
3
USB Port x2
Document Number
Rev
0.5
EDX20 LA-2481
Sheet

1
31
of
48
BATT_TEMP2
BATT_TEMP1
BATT_OVP
DS_DOCKED_ID
ECAGND
2
47K_0402_5%
C381
0.1U_0402_16V4Z
LRST#
<20>
<20>
JP9
1
2
3
4
5
6
7
8
9
10
EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS
GATEA20
KBRST#
GATEA20
KBRST#
<36>
<36>
<36>
<36>
<36>
<36>
<36>
<36>
Reserved for 87591L

1
2
3
4
5
6
7
8
9
10
5
6
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
71
72
73
74
77
78
79
80
+3VALW
1 R513
10K_0402_5%
R332
10K_0402_5%
2
PSCLK1
PSDAT1
PSCLK2
PSDAT2
PSCLK3
PSDAT3
ROTA90#
CRY1
CRY2
+5VS
RP44
1
2
3
4
PSCLK1
PSDAT1
PSCLK2
PSDAT2
8
7
6
5
10K_0804_8P4R_5%
PSCLK3
1
2
R311 10K_0402_5%
PSDAT3
1
2
R310 10K_0402_5%
3
+3VS
R356
10K_0402_5%
1
R355
10K_0402_5%
GATEA20
KBRST#
GATEA20
KBRST#
<39,40> FSTCHG
<42> VCCP_POK
<8,15,21,45> VGATE
<21> EC_SMI#
<45> SYSPOK
<36>
WL_SW
<21> EC_SWI#
<5> PROCHOT#
KSI0/GPIK0
KSI1/GPIK1
KSI2/GPIK2
KSI3/GPIK3
KSI4/GPIK4
KSI5/GPIK5
KSI6/GPIK6
KSI7/GPIK7
PECOS
URXD
UTXD
PSCLK1
PSDAT1
PSCLK2
PSDAT2
PSCLK3
PSDAT3
110
111
114
115
116
117
PSCLK1
PSDAT1
PSCLK2
PSDAT2
PSCLK3
PSDAT3
C RY1
C RY2
158
160
XCLKI
XCLKO
Key matrix scan
161
159
32
33
37
38
39
40
INVT_PWM
BEEP#
ACOFF
PWM2/GPOW2/FAN1PWM
PWM7/GPOW7/FAN2PWM
FAN/PWM GPIO05/FAN3PWM/TEST_TP
FANFB1/TOUT1/GPIO2E
GPWU7/TIN2/FANFB2
GPIO06/FANFB3/DPLL_TP
36
43
11
171
176
12
VCCP_ON#
EC_DIS_INTMIC
TEST_TP
FAN_SPEED1
SCL1
SDA1
SCL2
SDA2
163
164
169
170
SMB_EC_CK1
SMB_EC_DA1
SMB_EC_CK2
SMB_EC_DA2
GPIO20/E51CS#/ISPEN_TP
GPIO21/E51RXD/ISPCLK
GPIO22/E51TXD/ISPDAT
A20/GPIO23
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO2A
GPIO2B
LRST#/GPIO2C
GPIO2D
TOUT2/GPIO2F
105
106
107
108
109
118
119
148
149
155
156
162
165
168
175
EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS
PME#
EC_EXTTS#0
SYSON
SUSP#
VR_ON
ROTA90#
D DR_ID0
PCIRST#
EC_PBTNOUT#
EC_THRM#
GPWU0
GPWU1
GPWU2
GPWU3
GPWU4
GPWU5
GPWU6/TIN1
2
26
29
30
44
76
172
ON/OFF
ACIN
RING#
EC_SLP_S3#
EC_SLP_S5#
D DR_ID1
EC_SLP_S4#
85
86
91
92
93
94
97
98
PWR_LED#
CHARGE_LED#
RFOFF#
RFON_LED#
BATT_LED#
BTDIS#-BTON#
MUTE#
FPR_PWRON
GPIO2
EC_RSMRST#
DIGI_RST#
DIGISUSP
EC_SCI#
DOCKEN
WLAN_ACT2
KSI_USER
MIC_SEL
PM_CLKRUN#
ENABKL
BKOFF#
WLAN_ACT1
3
4
8
20
21
22
23
24
25
27
28
41
GPIO00/E51IT0
GPIO01/E51IT1
GPIO04
GPIO07
GPIO08
GPIO09
NUMLOCK#/GPIO0A
GPIO0B
CLKRUN#/GPIO0C
GPIO0D
GPIO0E
SCROLLLOCK#/GPIO0F
FSTCHG
VCCP_POK
VGATE
EC_SMI#
SYSPOK
WL_SW
EC_SWI#
PROCHOT#
48
54
55
62
63
69
70
75
GPIO10
CAPLOCK#/GPIO11
FNLOCK#/GPIO12
GPIO13 GPIO1
GPIO14
GPIO15
GPIO16
GPIO17
GPWU or GPI
GPIO0
PWM0/GPOW0
PWM1/GPOW1
PWM3/GPOW3
PWM4/GPOW4
PWM5/GPOW5
PWM6/GPOW6
GPIO18/XIO8CS#
GPIO19/XIO9CS#
GPIO1A/XIOACS#
GPIO1B/XIOBCS#
GPIO1C/XIOCCS#
GPIO1D/XIODCS#
GPIO1E/XIOECS#
GPIO1F/XIOFCS#
BIOS I/F
+3VS
ICH_PWRGD
BATSELB_A#
LAN_EN#
BATT_TEMP1 <38>
DS_DOCKED_ID <36>
BATT_OVP <40>
M/B_ID
FPR_SW <36>
CHARGER_THERM <43>
R319
100K_0402_5%
Ra
BATT_TEMP2 <38>
DAC_BRIG <17>
EN_DFAN1
IREF
<39>
DOCKEN_VGA <18,33>
<33>
<17>
+5VALW
1
2
R360 @ 0_0402_5%
PM_BATLOW# <21>
EC_PWM4 <5>
EC_SMI#
<34,38>
<34,38>
<5,34,36,38>
<5,34,36,38>
KBA5
1
R312
1
R358
RING#
PME#
<34>
EC_EXTTS#0 <8>
SYSON
<37,44>
SUSP#
<29,37,38>
VR_ON
<37,45>
ROTA90# <36>
PCIRST# <19,24,25,26,27>
EC_PBTNOUT# <21>
EC_THRM# <21>
ON/OFF
ACIN
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
+3VALW
8
7
6
5
2
10K_0402_5%
2
100K_0402_5%
WLAN_ACT1
R361 1
2 100K_0402_5%
WLAN_ACT2
R359 1
2 100K_0402_5%
D DR_ID0
D DR_ID1
R517 2
R518 2
1 1K_0402_5%
1 1K_0402_5%
<33>
<21,39,41>
EC_SLP_S3# <21>
EC_SLP_S5# <21>
EC_SLP_S4# <21>
PWR_LED# <36>
CHARGE_LED# <36>
RFOFF# <26>
RFON_LED# <36>
BATT_LED# <36>
BTDIS#-BTON# <36>
MUTE#
<30>
FPR_PWRON <36>
+3VS
For KB910
PCIRST#
1
R345
2
100K_0402_5%
+3VALW
INV_THERM
KBA[0..19]
KBA[0..19] <34>
2
C1359
EC_TINIT#
1
R313
2
100K_0402_5%
TEST_TP
1
R369
1
R357
2
0_0402_5%
2
0_0402_5%
ADB[0..7] <34>
FSEL#
FWR#
FRD#
R1163
0.1U_0402_10V6K
DPLL_TP
<34>
<34>
<34>
Pin8, 22, 54, 82, 84, 89 and 172 is diffrence define with 87591
R181, R191, R192 and R193 are reserved for KB910.
R187 & R176 are reserced for 87591L
BTDIS# signal is reservedfor BT modula,
BTON# signal is reserved for MDC\BT module
C RY1
1
R330
2
2
2
2
10K_0804_8P4R_5%
1
4
1
2
3
4
DPLL_TP
SMB_EC_CK1
SMB_EC_DA1
SMB_EC_CK2
SMB_EC_DA2
1
1
1
1
RP50
FSEL#
FR D#
FAN_SPEED1 <5>
KB910_LQFP176
FSEL#
FWR#
FR D#
C380
15P_0402_50V8D
@
R343
R341
R350
R347
VCCP_ON# <42>
EC_DIS_INTMIC <30,36>
R1162
2.15K_0402_1%
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19
SMB_EC_DA1
SMB_EC_CK1
SMB_EC_DA2
SMB_EC_CK2
10KB_0603_1%_TSM1A103F34D3R~D
C RY2
2
@ 20M_0603_5%
Y6
1
4
2
1
0_0603_5%
1
1 R329
32.768KHZ_12.5PF_6HT3
C565
C566
10P_0402_50V8J
10P_0402_50V8J
2
2
Title
PROPRIETARY NOTE
ENE KB910
Size
Document Number
Rev
0.5
EDX20 LA-2481
Date:
C327
0.1U_0402_16V4Z
LAN_EN# <27>
EC_ON
PDCT
ADB[0..7]
BATSELB_A# <40>
CLK_PCI_EC
R364
33_0402_5%
@
1
R317
0_0402_5%
Rb
3.3V +/- 5%
100K +/- 5%
Rb
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC
M/B_ID
ICH_PWRGD <21,34>
INVT_PWM <17>
BEEP#
<29>
ACOFF
<39>
PDCT
VCCBAT
BATGND
DAC_BRIG
EN_DFAN1
IR EF
SM BUS
PS2 interface
2
10K_0402_5%
99
100
101
102
1
42
47
174
PWM
or GPOW
DS_DOCKED_ID 1
R322
+3VALW
AD0/GPIAD0
AD1/GPIAD1
AD2/GPIAD2
AD3/GPIAD3
AD4/GPIAD4
AD Input or GPI
AD5/GPIAD5
AD6/GPIAD6
AD7/GPIAD7
DA0/GPODA0
DA1/GPODA1
DA2/GPODA2
DA output or GPO DA3/GPODA3
DA4/GPODA4
DA5/GPODA5
DA6/GPODA6
DA7/GPODA7
124
125
126
127
128
131
132
133
143
142
135
134
130
129
121
120
113
112
104
103
<20>
<20>
<21> EC_RSMRST#
<17> DIGI_RST#
<17> DIGISUSP
<21> EC_SCI#
<28> DOCKEN
<26> WLAN_ACT2
<36> KSI_USER
<29> MIC_SEL
<21,24,26,27,35> PM_CLKRUN#
<10,17> ENABKL
<17>
BKOFF#
<26> WLAN_ACT1
FPR_SW1
R1158
BATT_TEMP1
DS_DOCKED_ID
BATT_OVP
M/B_ID
FPR_SW
CHARGER_THERM
INV_THERM
BATT_TEMP2
Host interface
GPIO02/GA20
GPIO03/KBRST#
2
+RTCVCC
@ 0_0402_5%
2
+3VALW
0_0402_5%
81
82
83
84
87
88
89
90
PWR/GND
KSO0/GPOK0
KSO1/GPOK1
KSO2/GPOK2
KSO3/GPOK3
KSO4/GPOK4
KSO5/GPOK5
KSO6/GPOK6
KSO7/GPOK7
KSO8/GPOK8
KSO9/GPOK9
KSO10/GPOK10
KSO11/GPOK11
KSO12/GPOK12
KSO13/GPOK13
KSO14/GPOK14
KSO15/GPOK15
KSO16/GPOK16
KSO17/GPOK17
E&T_96212-1011S
@
+3VALW
SERIRQ
LFRAME#
LAD0/FWH0
LAD1/FWH1
LAD2/FWH2
LAD3/FWH3
LCLK
ECRST#
ECSCI#
49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
153
154
URXD
UTXD
EN_WOL#
+3VALW
VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
7
9
15
14
13
10
18
19
31
A0
A1/XIOP_TP
A2
A3
A4/DMRP_TP
A5/EMWB_TP
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
1
R366
+3VALW
SIRQ
LPC_FRAME#
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
CLK_PCI_EC
LRST#
<21,24,35> SIRQ
<20,35> LPC_FRAME#
<20,35> LPC_AD0
<20,35> LPC_AD1
<20,35> LPC_AD2
<20,35> LPC_AD3
<15> CLK_PCI_EC
95
96
U28
VCCA
AGND
2
@ 10K_0402_5%
D0
D1
D2
D3
D4
D5
D6
D7
1
R363
+3VS
138
139
140
141
144
145
146
147
FBM-L11-160808-601LMT_200mA_10%
1
R334
1
R335
2
1
C354
1U_0603_10V4Z
C317
0.1U_0402_16V4Z
17
35
46
122
167
137
ECAGND
C376
2
GND1
GND2
GND3
GND4
GND6
GND7
1 ECAGND
C321
16
34
45
123
136
157
166
L27
C331
2
2
1000P_0402_50V7K
C365
2
2
0.1U_0402_16V4Z
EC_AVCC
EC_AVCC
1000P_0402_50V7K
1
Vcc
Ra
Board ID
0
1
2
3
4
5
6
7
C383
2
0.1U_0402_16V4Z
1
RD#
WR#
IOCS#
MEMCS#
L28
1
+3VALW
0.1U_0402_16V4Z
1
1
150
151
152
173
FBM-L11-160808-601LMT_200mA_10%
2 C329 ECAGND
0.01U_0402_16V7K
2 C335 ECAGND
0.01U_0402_16V7K
2 C316 ECAGND
0.01U_0402_16V7K
2 C315 ECAGND
0.01U_0402_16V7K
2
4.7K_0402_5%
+3VALW
Sheet

E
32
of
48
PVT
+3VALW
R533
2
SN74LVC32APWLE_TSSOP14
O
USB_OC#2
1
U54A
DOCK_USB_OC#2
<36> DOCK_USB_OC#2
14
10K_0402_5%
1
+3VALW
USB_OC#2 <21>
C576
0.1U_0402_16V4Z
+3VALW
+3VALW
1
2
USB_OC#3 <21>
1
C577
0.1U_0402_16V4Z
HSS110_4P
ON/OFFBTN#
R535
USB_OC#4
1
USB_OC#4 <21>
<32>
EC_ON
EC_ON
1
R382
22K_0402_5%
C578
0.1U_0402_16V4Z
<32>
EC_ON#
<43>
D13
RLZ20A_LL34
C397
2 1000P_0402_50V7K
O
U54C
ON/OFF
DAN202U_SC70
22K
22K
10
DOCK_USB_OC#4
<36> DOCK_USB_OC#4
ON/OFF
R381
22K_0402_5%
2
14
10K_0402_5%
1
3
2
+3VALW
+3VALW
2N7002_SOT23
Q71
SW1
2
G
Power BTN
D12
U54B
USB_OC#3
1
R380
100K_0402_5%
DOCKEN_VGA#
<36> DOCK_USB_OC#3
1
DOCKEN_VGA
DOCK_USB_OC#3
10K_0402_5%
<18,32> DOCKEN_VGA
2
14
R537
2
R534
10K_0402_5%
1
Q33
DTC124EK_SOT23
+3VALW
R536
WHEN R=0,Vbe=1.35V
WHEN R=33K,Vbe=0.8V
13
12
U54D
3
11
USB_OC#5
1
DOCK_USB_OC#5
<36> DOCK_USB_OC#5
14
10K_0402_5%
1
USB_OC#5 <21>
C579
0.1U_0402_16V4Z

Title
PROPRIETARY NOTE
Size
Date:
C
Power ON/OFF SW
Document Number
Rev
0.5
EDX20 LA-2481
Sheet

E
33
of
48
NM24C164 Address definition: 1 A2 A1# A0 B2 B1 B0 R/W#

+3VALW
1
+3VALW
+3VALW
1
<27>
<32,38> SMB_EC_CK1
<32,38> SMB_EC_DA1
LAN_PME#
PME#
<32>
R530
10K_0402_5%
SCLK
SDA
3
2
1
VDD
GND
NC
2
0.1U_0402_16V4Z
TC74A1-5.0VCT_SOT23-5
EC_CK2
C441
1
4
5
Q69
2N7002_SOT23
SMB_EC_CK2
+5VS
U34
R529
10K_0402_5%
<5,32,36,38> SMB_EC_CK2
1
2
3
4
A0
A1
A2
GND
EC I2C Bus Address:

24C164: 1011xxx R/W#
24C16: 1010xxx R/W#
+5VS
<19> PCI_PME#
VCC
WC
SCL
SDA
AT24C16AN-10SI-2.7_SOP
1
2 R305
100_0402_5%
1
2 R308
100_0402_5%
R307
100_0402_5%
1
2
<26> WLANPME#
8
7
6
5
<24> PCM_PME#
U24
R306
100_0402_5%
1
2
R309
10K_0402_5%
R337
100K_0402_5%
1
2
C345
0.1U_0402_16V4Z
2
G
SM BUS Addr. 1001 001
+5VS
Q70
2N7002_SOT23
D
SMB_EC_DA2
+5VS
EC_DA2
U43
4
5
2
G
<5,32,36,38> SMB_EC_DA2
SCLK
SDA
3
2
1
VDD
GND
NC
C501
1
2
0.1U_0402_16V4Z
+5VS
TC74A2-5.0VCT_SOT23-5
SM BUS Addr. 1001 010
+3VALW
<32>
ADB[0..7]
<32>
KBA[0..19]
KBA[0..19]
2
2
+3VALW
R321
100K_0402_5%
D
1
I0
I1
<32>
FW R#
U22
O
Q27
2N7002_SOT23
<21> EC_FLASH#
1
C555
+3VALW
<21,32> ICH_PWRGD
U49
ADB[0..7]
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19
21
20
19
18
17
16
15
14
8
7
36
6
5
4
3
2
1
40
13
37
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
FSEL#
FR D#
FWE#
22
24
9
CE#
OE#
WE#
FWE#
<32>
<32>
TC7SH32FU_SSOP5
FSEL#
FRD#
FWR#
VCC0
VCC1
31
30
D0
D1
D2
D3
D4
D5
D6
D7
25
26
27
28
32
33
34
35
RP#
NC
READY/BUSY#
NC0
NC1
10
11
12
29
38
GND0
GND1
23
39
2
0.1U_0402_16V4Z
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
C336
10U_0805_10V4Z
JP23
KBA14
KBA13
KBA12
KBA11
KBA10
KBA9
KBA8
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
KBA0
BIOS_RST#
+3VALW
R453
1
2
10K_0402_5%
BIOS_RST#
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
FSEL#
FR D#
FWE#
ADB7
ADB6
ADB5
ADB4
ADB3
ADB2
ADB1
ADB0
KBA19
KBA18
KBA17
KBA16
KBA15
+3VALW
SUYIN_127212FA034G200ZX
4
SST39VF080-70_TSOP40
Alternative SA290080100 for U24
Title
PROPRIETARY NOTE
Size
Date:
C
Thermal Sensor & BIOS

Document Number
Rev
0.5
EDX20 LA-2481
Sheet

E
34
of
48
+3VS
C375
4.7U_0805_10V4Z
R375
4.7K_0402_5%
<8,16,17,19,21,23> PLT_RST#
<21> SUS_STAT#
2
<21,24,26,27,32> PM_CLKRUN#
<15> CLK_PCI_SIO
<21,24,32> SIRQ
1
C388
22P_0402_50V8J
@
<15> CLK_14M_SIO
10
12
13
14
LAD0
LAD1
LAD2
LAD3
LPC_FRAME#
LPC_DRQ#0
15
16
LFRAME#
LDRQ#
1
R374
17
18
PCI_RESET#
LPCPD#
19
20
21
6
CLKRUN#
PCI_CLK
SER_IRQ
IO_PME#
2
22_0402_5%
PM_CLKRUN#
CLK_PCI_SIO
CLK_14M_SIO
R362
4.7K_0402_5%
Strap pin
BADDR
Pin #
Description
33
BASE Address Selection
U27
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
CLK14
RXD1
TXD1
DSR1#
RTS1#
CTS1#
DTR1#
RI1#
DCD1#
62
63
64
1
2
3
4
5
IRRX2
IRTX2
IRMODE/IRRX3
37
38
39
INIT#
SLCTIN#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
SLCT
PE
BUSY
ACK#
ERROR#
ALF#
STROBE#
41
42
44
46
47
48
49
50
51
53
55
56
57
58
59
60
61
VTR
VCC
VCC
VCC
VCC
7
11
26
45
54
SERIAL I/F
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
<20,32> LPC_FRAME#
<20> LPC_DRQ#0
R372
33_0402_5%
@
2
R351
33_0402_5%
@
C377
22P_0402_50V8J
@
CLK_PCI_SIO
1
CLK_14M_SIO
<20,32>
<20,32>
<20,32>
<20,32>
FIR
CLOCK
23
24
25
27
28
29
30
31
32
33
34
35
36
40
GPIO40
GPIO41
GPIO42
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47
GPIO10
GPIO11/SYSOPT
GPIO12/IO_SMI#
GPIO13/IRQIN1
GPIO14/IRQIN2
GPIO23
8
22
43
52
VSS
VSS
VSS
VSS
PARALLEL I/F
C362
2
2
1000P_0402_50V7K
LPC I/F
C378
2
2
0.1U_0402_16V4Z
GPIO
C386
+3VALW
1
0.1U_0402_16V4Z
1
POWER
RXDB#
TXDB
<17>
<17>
CTSB#
DTRB#
<17>
<17>
FOR LPC SIO DEBUG PORT

+5VS
IRRX
IRTXOUT
IRMODE
+3VS
JP12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
CLK_14M_SIO
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ#0
PLT_RST#
2
CLK_PCI_SIO
SIRQ
@ ACES_85201-2005
+3VALW
+3VS
LPC47N217_STQFP64
"0": 2E~2F (Default)

"1": 4E~4F
FIR
3
(60mil)
1
<15> CLK_PCI_TPM
<8,16,17,19,21,23> PLT_RST#
R49
33_0402_5%
@
+3VS
2
<13,14,15,17,21> ICH_SMBCLK
+3VS
1
C66
22P_0402_50V8J
@
CLK_PCI_TPM
LPC_FRAME#
PLT_RST#
LPC_AD3
LPC_AD0
ICH_SMBCLK
SUS_STAT#
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
R514 @ 4.7_0603_5%
+IR_ANODE
2
1
C573
22U_1206_10V4Z
JP17
CLK_PCI_TPM
+3VS
TPM
2
4.7_0603_5%
(60mil)
R515
2
U53
+5VS
LPC_AD2
LPC_AD1
+3VS
IRRX
R516
ICH_SMBDATA
SIRQ
PM_CLKRUN#
LPC_DRQ#1
2
1
ICH_SMBDATA <13,14,15,17,21>
C570
@ 10U_0805_10V4Z
LPC_DRQ#1 <20>
2
4
6
8
+IR_3VS
1 (30mil)
47_1206_5%
C571
10U_0805_10V4Z
IRED_A
TXD
SD/MODE
MODE
1
3
5
7
IRTXOUT
IRMODE
IR_VISHAY_TFDU6614-TR4_8P
PCB Footprint : TFDU6101E
C572
0.1U_0402_16V4Z
ACES_88019-2000
IRED_C
RXD
VCC
GND
SD/MODE: SHUTDOWN MODE, HIGH ACTIVE

MODE: HIGH/LOW SPEED SELECT

Title
PROPRIETARY NOTE
Size
Date:
C
Super I/O LPC47N217/TPM/FIR

Document Number
Rev
0.5
EDX20 LA-2481
Sheet

E
35
of
48
BT MODULE CONN
DOCKING BD.
+3VS
WIRELESS SW
C382
1
2
JP30
0.1U_0402_16V4Z
D
JP14
<21>
<21>
<26>
USBP6+
USBP6-
USBP6+
USBP6-
BT_ACTIVE
1
2
3
4
5
6
7
8
<26> WLAN_ACTIVE
<32> BTDIS#-BTON#
BTON_LED
BTONLED
+3VS
10K_0402_5%
1
2
R1151
JP1
<32>
WL_SW
WL_SW
MOLEX_53780-0890
Q32
MMBT3904_SOT23
1
2
<28> DOCK_LAN_TX3<28> DOCK_LAN_TX3+
<28> DOCK_LAN_TX<28> DOCK_LAN_TX+
DOCK_LAN_TXDOCK_LAN_TX+
<28> DOCK_LAN_RX<28> DOCK_LAN_RX+
DOCK_LAN_RXDOCK_LAN_RX+
MOLEX_53780-0290
Bluetooth Cable
BTON_LED
1
2
<28> DOCK_LAN_TX2<28> DOCK_LAN_TX2+
mini_PCI Pin36
BT_ACTIVE JP27.1
mini_PCI Pin43
WLAN_ACTIVE JP27.4
<21>
<21>
USBP2+
USBP2-
<21>
<21>
USBP4+
USBP4-
<21>
<21>
USBP3+
USBP3-
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
<18> CRT_B_DOCK
<18> CRT_G_DOCK
<18> CRT_R_DOCK
<18> CRT_VSYNC_DOCK
<18> CRT_HSYNC_DOCK
<33>
<33>
<33>
<33>
DOCK_USB_OC#5
DOCK_USB_OC#4
DOCK_USB_OC#3
DOCK_USB_OC#2
DOCK_USB_OC#5
DOCK_USB_OC#4
DOCK_USB_OC#3
DOCK_USB_OC#2
<21>
<21>
USBP5+
USBP5-
<28> DOCK_LAN_ACT#
<28> DOCK_LAN_LINK100#
<32> ROTA90#
<18,21> M_SEN#
<10,18> 3VDDCDA
<10,18> 3VDDCCL
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
HP_OUT_L <29,30>
HP_OUT_R <29,30>
HP_PLUG# <29,30>
VDDA
<29,30>
+3VALW
+5VS
1
R1159
2
0_0402_5%
2
R1160
DIS_INTMIC <29>
1
5.1K_0402_5%
DS_DOCKED_ID <32>
DOCK_MIC <29>
GNDA
<7,29,30>
+2.5V_LAN
DOCK_IN
HANNS_802PVS-100415R-P
ALS/MIC board
VDDA
+3VS
JP22
R286
@ 0_0402_5%
1
2
<7,29,30> GNDA
C301
2
1
2
FBM-11-160808-700T_0603
0.22U_0603_10V7K
INT_MIC1
INT_MIC1
L25
S
<29>
<30,32> EC_DIS_INTMIC
19vdc_2.25A
7
6
5
4
3
2
1
SMB_EC_DA2
SMB_EC_CK2
INTMIC1
GNDA
<5,32,34,38> SMB_EC_DA2
<5,32,34,38> SMB_EC_CK2
INTMIC1
DOCK_IN
1
2
C395
0.1U_0805_25V7M
ACES_85201-0705
Q20
AO3413_SOT23
1
2
C394
0.1U_0805_25V7M
BTN Board
EC_DIS_INTMIC
+5VS +5VALW
10K_0402_5%
1
2
R431
<32> PWR_LED#
<32> CHARGE_LED#
<32> BATT_LED#
<23> HDD_LED#
<32> RFON_LED#
Finger Print board

JP27
<21>
<21>
1
<32>
<32> FPR_PWRON
USBP7+
USBP7-
+3VS
USBP7+
USBP7-
FPR_SW
Q57
AO3413_SOT23
C569
@
4.7U_0603_6.3V6M 1
5
4
3
2
1
<32>
<32>
<32>
<32>
<32>
<32>
<32>
<32>
<32>
5
4
3
2
1
E&T_96212-0511S
C357
0.1U_0402_10V6K
C1358
1
2
1
2
FBM-11-160808-700T_0603
0.22U_0603_10V7K
INT_MIC2
+3VS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
L51
S
<29> INT_MIC2
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSI_USER
JP24
PWR_LED#
CHARGE_LED#
BATT_LED#
HDD_LED#
RFON_LED#
BTONLED
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSI_USER
INTMIC2
GNDA
VDDA
Q56
AO3413_SOT23
1
C391
2
2
0.1U_0402_16V4Z
C390
0.1U_0402_16V4Z
+5VS
1
C392
2
2
0.1U_0402_16V4Z
C393
0.1U_0402_16V4Z
A
ACES_87151-2205
EC_DIS_INTMIC

Title
DAUGHTER Brd I/F

PROPRIETARY NOTE
Size
Date:
3
Document Number
Rev
0.5
EDX20 LA-2481
Sheet

1
36
of
48
D Q21
2 SUSP
G 2N7002_SOT23
@
2 SUSP
G 2N7002_SOT23
@
D Q22
2 SYSON#
G 2N7002_SOT23
@
SYSON#
1
D
VR_ON# 2
G
S
Q25
2N7002_SOT23
@
R316
330_0402_5%
@
2
R315
@ 330_0402_5%
2
R293
470_0402_5%
@
2 SUSP
G 2N7002_SOT23
0.1U_0402_16V4Z
2
+VCCP
2
+12VALW
100K_0402_1%
D Q13
C136
1
R99
1
+VCC_CORE
+1.8V
C135
0.1U_0402_16V4Z
AO4422_SO8
C185
10U_1206_6.3V7K
C137
10U_0805_10V4Z
2
2
C190
100U_D2_6.3VM
1
2
3
4
1
S
S
S
G
D
D
D
D
R285
470_0402_5%
@
D Q8
2 SUSP
G 2N7002_SOT23
@
U11
8
7
6
5
R56
470_0402_5%
@
D Q14
2 SUSP
G 2N7002_SOT23
@
+0.9VS
D Q5
2 SUSP
G 2N7002_SOT23
@
+1.5VS
R112
470_0402_5%
@
+1.8VS
D Q7
2 SUSP
G 2N7002_SOT23
@
D Q6
+1.8V to +1.8VS Transfer
+1.8VS
R53
470_0402_5%
@
R55
470_0402_5%
@
2
R54
470_0402_5%
@
+2.5VS
+3VS
+5VS
+1.8V
VR_ON# 2
G
Q26
2N7002_SOT23
@
+5VALW
+5VALW
R102
10K_0402_5%
R101
10K_0402_5%
+3VS
U20
8
7
6
5
1
+
1
C334
100U_D2_6.3VM
D
D
D
D
1
S
S
S
G
Q12
2N7002_SOT23
C313
0.1U_0402_16V4Z
1
R325
1
C314
10U_0805_10V4Z
2
2
AO4422_SO8
C338
10U_1206_6.3V7K
2
G
<29,32,38> SUSP#
2
+12VALW
56K_0402_5%
1
2
3
4
Q11
2N7002_SOT23
2
G
3
+3VALW
SYSON
1
<32,44>
+3VALW to +3VS Transfer
SUSP
SUSP
<42>
SYSON#
D
D Q28
C318
2 SUSP
G 2N7002_SOT23
0.1U_0402_16V4Z
2
+3VALW
+5VALW
R314
@ 100K_0402_5%
1
R522
100K_0402_5%
+5VALW to +5VS Transfer

+5VS
1
C414
100U_D2_6.3VM
1
C412
10U_0805_10V4Z
0.1U_0402_16V4Z
2
2
C410
<32,45>
VR_ON
AO4422_SO8
C416
10U_1206_6.3V7K
1
R389
1
C411
SUSP
Q24
2N7002_SOT23
@
D
Q59
2
G
S 2N7002_SOT23
<42,44>
C574
0.1U_0402_16V4Z
2
2
+12VALW
47K_0402_5%
D Q34
2 SUSP
G 2N7002_SOT23
S
0.1U_0402_16V4Z
2
VR_ON 2
G
3
1
2
3
4
SUSP#P
1
S
S
S
G
1
4
D
D
D
D
U30
8
7
6
5
+5VALW
VR_ON#

Title
PROPRIETARY NOTE
Size
Date:
C
DC/DC Interface
Document Number
Rev
0.5
EDX20 LA-2481
Sheet
E
37
of
48
DOCK_IN
FBM-L18-453215-900LMA90T_1812
PL1
P1
PJPD1
B540C_SMC
PD26
2
1
BATT_A+
PC2
1000P_0402_50V7K
PC1
0.01U_0402_25V7K
1 2
PR1
10_1206_5%
560P_0402_50V7K
PC6
2
1
RLZ24B_LL34
PJP1
SM ART
Batter y:
1.BAT+
2. ID
3 . B/I
4.TS
5.SMD
6. SMC
7 .GND
+12VALW
PQ1
2SA1037AK_SC59
PJPB1 battery connector

1
VSB
PR19
10K_0402_5%
PC9
0.1U_0603_25V7K
SPOK
SPOK
100K_0402_5%
PR21
1
PR14
1K_0402_5%
PJP2
PR15
100K_0402_5%
BATT_TEMP2 <32>
B+
MOLEX_53780-0290
2 BATT_TEMP2
1
2
1000P_0402_50V7K
PC8
PC7
0.01U_0402_25V7K
1
PD4
RB160L-40_SOD106
D
PJPC1
PD3
1SS355_SOD323
PQ4
IRLML5103_SOT23
BATT_B+
PD2
DAN217_SC59
<41>
PL3
HCB4532K-800T90_1812
PQ2
2SC2412K_SC59
2
B
PR13
57.6K_0402_1%
RHU002N06_SOT323
PQ3
2
G
SMB_EC_CK1 <32,34>
PR6
100_0402_5%
BATT_B+
SMB_EC_DA1 <32,34>
100_0402_5%
1
2
BATT_B
PR12
40.2K_0402_1%
2
1
SUYIN_250263MR007G102ZL
+3VALW
PR10
7.32K_0402_1%
PR5
PR4
6.49K_0402_1%
2
2
3 1
2
B
PH1
100K_0603_1%_TH11-4H104FT
1
1
PR9
442_0402_1%
PR8
22.1K_0402_1%
PR7
22.1K_0402_1%
1K_0402_5%
2
1
BATT_TEMP1 <32>
PR2
1K_0402_5%
PR3
1
2
3
4
5
6
7
1
2
3
4
5
6
7
PJPB1 battery connector
PR11
43.2K_0402_1%
2
1
2 BATT_TEMP1
PD1
SINGA_2DC-S028B200
12P_0402_50V8J
PC5
2
1
12P_0402_50V8J
PC4
2
1
G
G
560P_0402_50V7K
PC3
2
1
4
5
P1
BATT_A+
PL2
HCB4532K-800T90_1812
B540C_SMC
PD27
2
1
BATT_A
VIN
SM ART
Batter y:
1.BAT+
2. ID
3 . B/I
4.TS
5.SMD
6. SMC
7 .GND
1
2
3
4
5
6
7
SUYIN_250263MR007G107ZL
1K_0402_5%
PR16
1
1
1
PR17
6.49K_0402_1%
2
2
+3VALW
SMB_EC_DA2 <5,32,34,36>
PR18 100_0402_5%
1
2
SMB_EC_CK2 <5,32,34,36>
PR20
100_0402_5%
PACIN
DTC115EUA_SC70
2
G
PQ7
RHU002N06_SOT323
PQ6
DTC115EUA_SC70
1
SUSP#
<29,32,37> SUSP#
4
PQ5
COMPAL ELECTRONICS, INC

Title
Bridge batt & Batt conn & DC in
PROPRIETARY NOTE
Size
Document Number
Date: Tuesday, February 22, 2005
Rev
EDX20 LA-2481
Sheet
D
0.5
38
of
48
Iadp=0~2.25A(42.75W)
Charger
P2
PC14
@ 0.1U_0603_25V7K
2
DLOV
22
2
CSIP
CSIN
BATT
19
18
16
PC24
1U_0603_10V6K
PGND
CCI
1
PR36
33_1206_5%
1908LDO
PR39
1K_0402_1%
PD9
1SS355_SOD323
2
PC25
1U_0805_25V4Z
MAX1908-CCS
0.1U_0402_16V7K
PC28
2
1
1
1
2
IINP
CCV
1
0_0402_5%
PC27
0.001U_0402_50V7M
BATT+
PR43
0_0402_5%
1
2
Charge voltage
4S CC-CV MODE : 16.8V
1908LDO
PACIN
2
PR47
681K_0402_1%
1
2
VCTL
Change current.
1.043V
1.5809A
1P4S:2250mAH/cell
Batt pack
1.656V
2.5097A
2P4S:1800mAH/cell
Charge mode
VCTL
Change voltage.
Note.
PR48
20K_0402_1%
CC-CV
PR164
@ 0_0402_5%
1908LDO.
16.8V
PR163=0,PR164=@
17.0V
PR163=160K
PR164=100K
1
2
PR184
100K_0402_1%
ICTL
PR46
150K_0402_1%
PR163
0_0402_5%
ICTL
BATSELB_A#
<32>
IREF
PR37
100K_0402_1%
PC29
0.1U_0402_16V7K
VIN
PR44
100K_0402_5%
PR45
10K_0402_5%
1
2
<32,40> FSTCHG
28
7
LDO
2
PR186
PC22
4.7U_1206_25V6K
24
PL5
16UH_D104C-919AS-160M_3.7A_20%
PC19
0.1U_0603_25V7K
PC21
4.7U_1206_25V6K
2
1
BST
BATT+
PR30
0.015_2512_1%
2
ACOK#
SHDN#
ACIN
ICHG
0.001U_0402_50V7M
PC26
2
1
2
1
2
1
2
PQ17
DTC115EUA_SC70
PR42
@ 158K_0603_1%
DLO
PD8
1SS355_SOD323
VCTL
ICTL
11
8
10
9
GND
1
0_0402_5%
PR35
PR41
100K_0402_1%
1
PD29
RLZ4.3B_LL34
23
21
20
10K_0402_5%
PACIN
LX
PQ13
DTC114EKA_SC59
REFIN
15
13
1908LDO
PR40
25
10K
AO4912_SO8
14
ICTL
PR38
22K_0402_5%
1
2
PACIN
PR155
10K_0402_1%
1
2
DHI
2
1
2
3
4
CLS
G2
D2
D1/S2/K
D2
D1/S2/K
G1
D1/S2/K S1/A
REF
CCS
PR32
15K_0402_1%
ACON
26
8
7
6
5
PC20
4.7U_1206_25V6K
2
1
VCTL
CSSN
CELLS
12
PR31
9.31K_0402_1%
2
G
PC23
0.01U_0402_16V7K
1908LDO
17
27
PR33
100K_0402_1%
2
1
RHU002N06_SOT323
2
PQ16
PC18
0.1U_0402_16V7K
2
1
215K_0402_1%
PR29
2
1
PQ14
RHU002N06_SOT323
10K
PQ15
CSSP
PR28
0_0402_5%
2
1
PR27
150K_0402_5%
PC16
0.1U_0603_25V7K
ACOFF
PD6
@1SS355_SOD323
1
PU1
MAX1908ETI_QFN28
1 DCIN
1
1
VIN
PC17
1U_0603_10V6K
ACIN
<32>
ACOFF#
<21,32,41>
PD5
@ RLZ22B_LL34
PD7
PQ12
DTC115EUA_SC70
1SS355_SOD323
PD10
ACOFF# 1
2
VIN
PR26
10K_0402_5%
PR25
47K_0402_5%
2
1
PC13
@ 0.1U_0603_25V7K
8
7
6
5
4
PL4
HCB4532K-800T90_1812
1
2
3
1SS355_SOD323
2
G
3
2
PC12
10U_1206_25V6M
PC11
10U_1206_25V6M
0.01_2512_1%(1W)
<43>
47K
0.1U_0603_25V7K
PC15
2
1
47K
PACIN
PQ10
AO4407_SO8
PR22
8
7
6
5
PR24
200K_0402_1%
DTA144EUA_SC70
PQ11
1
2
3
PR23
47K_0402_5%
2
1
1
2
3
P3
8
7
6
5
VIN
B+
PQ9
AO4407_SO8
PC10
10U_1206_25V6M
PQ8
AO4407_SO8
L-->H
H-->L
Vin Detector
Min.
typ.
V 17.85V
V 16.98V
Pulse charge. 2.0769V
Max.
V
V

Title
Charger
Size
Document Number
Rev
EDX20 LA-2481
Sheet
E
0.5
39
of
48
PACIN
VL
VS
1
1
2
2
PACIN
PD30
1SS355_SOD323
2
PR160
10K_0402_1%
PC122
0.01U_0402_16V7K
PR49
309K_0402_1%
PR166
10K_0402_1%
ADPPWR
13
REVBLK
16
CHRG
BATSEL
RELRN
3
4
OUT2
OUT1
OUT0
8
7
6
EXTLD
PR167
0_0402_5%
1
PR52
@ 0_0402_5%
1
1908LDO
FSTCHG <32,39>
1
ADPBLK
18
17
DISBAT
CHGIN
19
CHGA
20
CHGB
23
DISB
BATSUP
26
24
DISA
21
15
22
NC
NC
BATB
25
BATA
VDD
28
0_0402_5%
PR55
100K_0402_5%
1
2
MINVB
1538VDD
PR56
100K_0402_5%
1
2
PR57
100K_0402_5%
1
2
MAX1538_QFN28
GND
BATSELB_A# <32>
BATT_OUT2
BATT_OUT1
BATT_OUT0
1538VCC
OVP voltage :
1538VDD
27
2
PR53
PR54
0_0402_5%
14
MINVA
BATT+
2
ACDET
12
AIRDET
1U_0805_25V4Z
PC30
ADPIN
PU2
11
10
VIN
PC120
0.01U_0402_16V7K
PD31
1SS355_SOD323
PC31
1U_0805_25V4Z
2
1
PR51
100K_0402_1%
PR165
10K_0402_1%
PU7A
LM393M_SO8
RTCVREF
PC121
0.1U_0402_16V7K
PR50
412K_0603_1%
1
LI-3S :17.8V----BATT-OVP=1.9758V
BATT-OVP=0.111*BATT+
BATT+
BATT_OVP
2
1
1
2
G
PQ25
3
S
RHU002N06_SOT323
1
2
PC36
0.01U_0402_25V7Z
RHU002N06_SOT323
PQ26
PR62
143K_0402_1%
2
G
BATT_UVM <43>
BATT_A
1
BATT_B
PR101
2K_0402_5%
PR93
2K_0402_5%
<32>
PR61
300K_0603_0.1%
2
1
+
0
PR60
845K_0603_1%
PC35
0.01U_0402_25V7K
2
7
PU3A
LM358A_SO8
PU3B
LM358A_SO8
PR91
3K_0402_5%
1
2
VS
2
1
VS
PC34
0.047U_0603_50V7K
1
2
3
4
PR92
3K_0402_5%
1
2
PC33
0.047U_0603_50V7K
PQ19
FDS4935_SO8
S2
G2
S1
G1
D2
D2
D1
D1
8
7
6
5
1U_0603_10V6K
D1
D1
D2
D2
PQ18
FDS4935_SO8
5
6
7
8
PR58
100K_0402_1%
PC32
G1
S1
G2
S2
4
3
2
1
2
PR59
100K_0402_1%

Title
Batt Selector & OVP
Size
Document Number
Rev
EDX20 LA-2481
Sheet
0.5
40
of
48
+3.3V/+5V/+12V
+3VALWP Choke DCR = 26.5m [.

Current limit Threshold Min.=80 mV Mx.=120mV.
OCP Min.= 80mV/1.27K*(1.27K+1.27K)/26.6=6.038A
OCP Max.=120mV/1.27K*(1.27K+1.27K)/26.5=9.056A
PD11
EC11FS2_SOD106
B+
PC37
2.2U_1206_25VFZ
2
PC38
@ 470P_0805_100V7K
PL6
PC39
0.1U_0603_25V7K
BST31
BST51
FLYBACK
PR63
@ 22_1206_5%
SNB
FBM-L18-453215-900LMA90T_1812
8
7
6
5
RUN/ON3
1
2
1
2
2
1
PC48
4.7U_1206_25V6K
1
3
4
5
18
16
17
19
20
14
13
12
15
9
6
11
BST5
PR70
2M_0402_1%
DH5
LX5
2
DL5
2
2.5VREF
PR71
1.54K_0402_1%
12OUT
VDD
BST5
DH5
LX5
DL5
PGND
CSH5
CSL5
FB5
SEQ
REF
SYNC
RST#
PC51
0.47U_0603_16V7K
PR74
698_0402_1%
PR77
0_0402_5%
PC55
4.7U_0805_6.3V6K
+5VALWP
GND
2
28
PC45
10U_1206_25V6M
2.7K_1206_5%
@ PR193
2
1
1
2
TIME/ON5
PQ40
@ RHU002N06_SOT323
21
22
PC47
47P_0402_50V8J
CSH3
CSL3
FB3
SKIP#
SHDN#
VL
1
2
3
10
23
V+
LX3
DL3
MAX1902EAI_SSOP28
PR75
@ 300K_0402_5%
26
24
PC52
100P_0402_25V8K
1
2
PR76
3.57K_0402_1%
1
2
PR73
10K_0402_5%
DH3
SPOK <38>
PD16
SKS10-04AT_TSMA
2
2
1
+
PC57
100P_0402_25V8K
PC56
150U_D2_6.3VM
MAINPWRON <20,43>
PR122
0_0402_5%
2
PR79
10K_0402_1%
VS
PR78
10.2K_0402_1%
2
1
PC54
1000P_0402_50V7K
150U_D2_6.3VM
1
PD15
SKUL30-02AT_SMA
<21,32,39> ACIN
BST3
27
PR66
0_0402_5%
PC44
2200P_0402_50V7K
2
PR72
619_0402_1%
1
0.47U_0603_16V7K
PC50
2
1
25
1
2
3
4
G2
D2
D1/S2/K
D2
D1/S2/K
G1
D1/S2/K S1/A
AO4912_SO8
2
G
PC46
0.1U_0603_25V7K
PU4
2
PR68
1.27K_0402_1%
+3VALWP
ACIN
1
2
PR67
1.27K_0402_1%
PC43
1 1
1
1
2
PR69
1M_0402_1%
2
PC49
47P_0402_50V8J
1
2
1
2
PL8
10UH_D104C-919AS-100M_4.5A_20%
PR185
10_1206_5%
DH3
DL3
8
7
6
5
+12VALWP
4.7U_0805_6.3V6K
PR64
0_0402_5%
PD13
1SS355_SOD323
LX3
PC53 1
PQ21
AO4912_SO8
B+++
VS VL
PC42
10U_1206_25V6M
PC41
@ 2200P_0402_50V7K
D2
G2
D2
D1/S2/K
G1
D1/S2/K
S1/A D1/S2/K
PD12
DAP202U_SOT323
PQ20
1
2
3
4
B+++
PL7
10UH_SDT-1050P-100-118_3.5A_30%
1
PC40
0.1U_0603_25V7K
PR81
10K_0402_1%
PC58
2.2U_0805_10V6K
+5VALWP Choke DCR = 40m.

Current limit Threshold Min.=80 mV Mx.=120mV.
OCP Min.= 80mV/0.698K*(1.54K+0.698K)/40=6.412A
OCP Max.=120mV/0.698K*(0.698K+1.54K)/40=9.593A
PC59
@1U_0805_25V4Z
1
PR168
@47K_0402_5%
RS2(PR64)=RS1(PR58)*RS3(PR61)/(RS1+RS3)
L/RL(DCR)=RS1*RS3(PR61)/(RS1+RS3)*Cs(PC56)
Title
+3VALWP & +5VALWP & +12VALWP
Size
Document Number
Rev
EDX20 LA-2481
Sheet
E
0.5
41
of
48
+1.8V
PU5
VIN
VO
EN
ADJ
NC
VOUT
NC
TP
+2.5VSP
PR156
11K_0402_1%
GND
GND
GND
GND
G965-18P1U_SO8
APL5331KAC-TR_SO8
PR80
0_0402_5%
2
SUSP
PR84
0_0402_5%
PC67
1000P_0402_50V7K
PQ23
RHU002N06_SOT323
2
G
3
<37>
<37,44> SUSP#P
PR157
10K_0402_1%
0.1U_0603_25V7K
PC62
2
1
1
2
PR83
1K_0402_1%
PC119
22U_1206_16V4Z
VREF
PC118
4.7U_0805_6.3V6K
PC60
1U_0603_10V6K
PR82
1K_0402_1%
1
2
PC61
10U_1206_6.3V7K
NC
+2.5VSP
PU12
+3VALW
+3VALW
GND
VCNTL
VIN
S
PJP3
2MM
+3VS
+12VALWP
1
PC64
4.7U_0805_6.3V6K
PR100
47K_0402_5%
PU14
XC61CN0902MR
DH
SS
FB
LX
VCC
DL
GND
BST
1
2
3
4
G2
D2
D1/S2/K
D2
D1/S2/K
G1
D1/S2/K S1/A
+VCCPP
PL17
2
PJP9
3MM
+VCCPP
1
PR196
7.15K_0402_1%
2
1
PR34
750_0402_5%
2
1
PR197
1
30_0402_5%
+
2
+0.9VSP
PC72
330U_D2E_2.5VM
+VCCP
10UH_D104C-919AS-100M_4.5A_20%
2
4.7_0402_5%
PR85
PJP8
3MM
1SS355_SOD323 PC70
0.1U_0603_25V7K
PR114
0_0402_5%
1
+2.5VS
+1.5VS
PC74
0.1U_0603_25V7K
PR198
866_0402_1%
+0.9VS
PJP10
3MM
+1.5VSP
PC68
6800P_0402_25V7K
+5VS @
+2.5VSP
AO4912_SO8
PD14
E
PR195
10K_0402_5%
+1.8V
PJP7
3MM
PC142
1U_0805_25V4Z
PQ41
PQ42
2SC2411K_SC59
2
B
1
2
3300P_0402_50V7K
+1.8VP
+3VALW
PJP6
3MM
MAX8576EUB
4.7U_0805_6.3V6K
PR113
0_0402_5%
8
7
6
5
PC144
C
<32> VCCP_ON#
+5VALW
PJP5
3MM
1
IN
MAX8578_IN
OCSET
1
2
PC143
2
PR199
200K_0402_5%
+3VALWP
VCCP_POK <32>
4.7U_1206_25V6K
PC140
PC139
4.7U_1206_25V6K
1
2
PU6
PR112
0_0402_5%
RTCVREF
PC141
0.01U_0402_25V7Z
10
1
PWDOUT
+5VALWP
2
1
PR111
0_0402_5%
2 MAX8578_IN
VDDIN
PR194
3.32K_0402_1%
1
@
1
PC65
0.1U_0603_25V7K
+5VS
PR107
@ 0_0402_5%
PC88
1000P_0402_50V7K
PC66
2200P_0402_50V7K
2
1
PL16
FBM-L11-322513-151LMAT_1210
2
+12VALW
VSS
+VCCPP
PJP4
3MM
B+
220U_B2_2.5VM
PC63
+0.9VSP
1

Title
+VCCPP & +0.9VSP & +2.5VSP
Size
Document Number
Rev
EDX20 LA-2481
Sheet
1
0.5
42
of
48
VL
VL
VL
PR88
47K_0402_1%
PU13B
LM393M_SO8
0.022U_0402_16V7K
VL
PR90
499K_0402_1%
PC79
100P_0402_50V8J
P
2
G
PR89
499K_0402_1%
2
1
PC78
MAINPWRON
RHU002N06_SOT323
PD17
1N4148_SOD80
2
1
PC73
0.022U_0402_16V7K
1
2
8
+
BATT_B
VL
VIN
PD32
1N4148_SOD80
VL
B+
1
2
PC69
1000P_0402_50V7K
ACIN
RTCVREF
PU9
G920AT24U_SOT89
CHGRTCP
IN
OUT
GND
1
2
PC86
1U_0805_25V4Z
PR109
300_0402_5%
CHGRTC
PACIN
1
1
VL
2
PR208
47K_0402_5%
S
PR209
34K_0402_1%
PR210
66.5K_0402_1%
BATT ONLY
Precharge detector
Min.
typ.
Max.
H-->L 5.044V 5.096V 5.205V
L-->H 6.008V 6.124V 6.243V
PR108
22K_0402_5%
PC146
1000P_0402_50V7K
EC_ON#
Precharge detector
Min.
typ.
Max.
H-->L 14.556V 14.807V 15.372V
L-->H 15.276V 15.836V 16.411V
RHU002N06_SOT323
PQ35
2
1
G
<33>
PR207
634K_0603_1%
PR206
140K_0402_1%
1
2
P
8
PC147
0.1U_0603_25V7K
PD33
RB715F_SOT323
PC83
0.1U_0603_25V7K
PR205
412K_0603_1%
PC85
0.22U_1206_25V7K
PR106
100K_0402_5%
ACON
<39>
VS
PR104
200_0805_5%
1
1
2
1
PU13A
LM393M_SO8
<20,41> MAINPWRON
PQ27
TP0610K_SOT23
S
PR204
10K_0402_5%
PR102
33_1206_5%
1538VCC
PD21
1N4148_SOD80
3
PR192
2M_0402_1%
1
1 1
BATT_B
B+
VS
PD20
1N4148_SOD80
PD19
1N4148_SOD80
PR202
1.5K_1206_5%
1
2
PC71
0.1U_0603_25V7K
PR203
1.5K_1206_5%
1
2
2
2
VIN
1000P_0402_50V7K
PC145
2
1
10KB_0603_1%_TH11-3H103FT
PH3
<32> CHARGER_THERM
PD28
RB751V_SOD323
BATT_A
PR201
1.5K_1206_5%
1
2
PR98
150K_0402_1%
PR99
150K_0402_1%
VSB
PR200
1.5K_1206_5%
1
2
PR187
10K_0402_1%
1U_0603_10V6K
PC77
VL
1000P_0402_50V7K
PC76
2
1
10KB_0603_1%_TH11-3H103FT
PH2
TM_REF1
PU7B
LM393M_SO8
PC75
0.1U_0603_25V7K
1
2
PR96
2.15K_0402_1%
VS
PQ24
2
G
S
PR95
47K_0402_1%
VS
PR97
16.9K_0402_1%
VL
VL
RHU002N06_SOT323
PR94
47K_0402_1%
1
2
PQ22
<40> BATT_UVM
PR86
470K_0402_1%
PR65
100K_0402_5%
PR87
470K_0402_1%
PH2 under CPU botten side :

CPU thermal protection at 80 degree C
Recovery at 44(45) degree C
+5VALW
PQ43
DTC115EUA_SC70
PR110
300_0402_5%
PC87
4.7U_0805_6.3V6K
Title
RTC batt & +1.2VP & OTP
Size
Document Number
Rev
EDX20 LA-2481
Sheet
D
0.5
43
of
48
1845_B+
PJP11
3MM
27
24
28
1
21
BST2
DH2
LX1
LX2
PU10
DL1
DL2
MAX8743EEI_QSOP28 CS2
CS1
OUT1
OUT2
FB2
FB1
ON2
19
18
17
20
16
1
2
1
2
PC151
4.7U_1206_25V6K
PC152
4.7U_1206_25V6K
+1.5VSP
DH2.5
DL2.5
1
+
2
PR214 @
5.1K_0402_1%
15
14
12
1
LX2.5
DH1
PL19
4.7UH_D104C-919AS_4R7N_5.2A_20%
1
2
26
PC156
0.1U_0603_25V7K
1
BST2.5A
VDD
UVP
BST1
VCC
25
2
4
22
V+
1
2
PC158
4.7U_0805_6.3V6K
PC157
150U_D2_6.3VM
2
AO4912_SO8
PR213
0_0402_5%
1
2
+1.8VP
1
1
2
3
4
G2
D2
D1/S2/K
D2
D1/S2/K
G1
D1/S2/K S1/A
PC159
150U_D2_6.3VM
PR211
0_0402_5%
PC155
8
7
6
5
PR212
20_0603_5%
1
2
4.7U_0805_6.3V6K
PC160
2
1
0.1U_0603_25V7K
PL18
4.7UH_D104C-919AS_4R7N_5.2A_20%
PQ45
1U_0805_25V4Z
PC154
0.1U_0603_25V7K
PC153
BST2.5B
AO4912_SO8
D2
G2
D2
D1/S2/K
G1
D1/S2/K
S1/A D1/S2/K
8
7
6
5
PC150
2200P_0402_50V7K
1
PD34
DAP202U_SOT323
PQ44
1
2
3
4
B+
+5VALW
PC100
4.7U_0805_6.3V6K
1
2
PC149
4.7U_1206_25V6K
PC148
2200P_0402_50V7K
2
1
SUSP#P <37,42>
15K_0402_1%
PR217
0_0402_5%
PR218
33K_0402_1%
2
1
PR219
2
1
PR221
100K_0402_1%
PR215
10K_0402_1%
13
3
PC162
0.22U_0603_10V7K
ILIM2
ILIM1
7
5
PR220
100K_0402_1%
2
1
REF
10
GND
SKIP
6
23
PC161
@ 0.01U_0402_25V8K
PR216
0_0402_5%
PGOOD
TON
ON1
OVP
11
<32,37> SYSON
B

Title
+1.5VSP & +1.8VP
Size
Document Number
Rev
EDX20 LA-2481
Sheet
1
0.5
44
of
48
CPU-CORE
B+
10_0402_5%
PR128
1
2
<32,37>
VR_ON
8,15,21,32> VGATE
<32> SYSPOK
PR145
1
35
20
0_0402_5%
2
PR146
1
PR149
1
0_0402_5%
2
0_0402_5%
2
PR151
1
0_0402_5%
2
OAIN+
17
37
SHDN
IMVPOK
36
SYSPOK
38
CLKEN
12
OAINFB
CSP
16
15
18
CSN
19
5
6
7
8
D
D
D
D
PQ34
IRF7832_SO8
PR141
510_0603_1%
PR148
1K_0402_1%
1
2
1K_0402_1%
PR147
2
2
1
D2
D1
D0
D5 = 1
D5 = 0
1.196
1.708
1.180
1.692
1.164
1.676
1.148
1.660
1.132
1.644
1.116
1.628
1.100
1.612
1.084
1.596
PR152
200_0402_1%
1.068
1.580
1.052
1.564
1.036
1.548
1.020
1.532
1.004
1.516
0.988
1.500
0.972
1.484
0.956
1.468
0.940
1.452
0.924
1.436
0.908
1.420
0.892
1.404
0.876
1.388
0.860
1.372
PR154
10K_0402_1%
D3
PR150
200_0402_1%
1
1
PC116
0.22U_0402_10V4Z
1
D4
PR153
90.9K_0402_1%
1
2
PC117
47P_0402_50V8J
PC138
68U_25V_M
1
2
5
6
7
8
PD25
RB051L-40_SOD106
PC115
4700P_0402_25V7K
D
D
D
D
PQ33
IRF7832_SO8
DPSLP
PC114
100P_0402_25V8K
11
28
GND
PGND
SUS
1
2
27
30
DDO
PR138
0.0015_2512_1%
1
PR142 0_0402_5%
1
2
PR143 0_0402_5%
1
2
CC
CLKEN#
B2
PR144
10K_0402_5%
PD24
EC31QS04
<5,20> H_DPSLP#
B1
IN PUTS
29
39
<21> PM_DPRSLPVR
C ONTROL
B0
DL
TIME
M UX
+3VALW
VCC
PR103
0_0402_5%
G
S
S
S
IN PUTS
V OLTAGE
PU11
MAX1907EGL_QFN40
PL15
0.56UH_MPC1040LR56 23_21A_20%
1
+VCC_CORE
D
D
D
D
S2
40 1
PC109
10U_1206_25V6M
PR137
0_0402_5%
G
S
S
S
ILIM
BO OT
10
SLEEP
TON
S1
VCC
D5
S0
DE EPER
1U_0805_25V4Z
CPULX
PR140
100K_0402_1%
21
4
34
33
32
0_0402_5%
REF
PR139
V+
DH
LX
PC111
0.1U_0603_25V7K
4
3
2
1
D4
0_0402_5%
2
G
S
S
S
22
PR136
4
3
2
1
PL14
HCB4532K-800T90_1812
5
6
7
8
<6> CPU_VID4
PC80
4
3
2
1
D3
23
2 0_0402_5%
PR133
2.2_0402_5%
1 PR135
31
1
<6> CPU_VID3
BST
0_0402_5%
PQ32
IRF7821_S08
PC113
2200P_0402_50V7K
D2
<6> CPU_VID2
24
PC112
0.1U_0603_25V7K
D1
PR134
PD23
1SS355_SOD323
PC110
2200P_0402_50V7K
1
PC81
1U_0805_25V4Z
VDD
25
VCC
2 0_0402_5%
1 PR132
NEG
D0
<6> CPU_VID1
<6> CPU_VID5
14
13
26
REF 8
<6> CPU_VID0
2 0_0402_5%
POS
PR131
1
PC108
10U_1206_25V6M
PC137
68U_25V_M
PC107
10U_1206_25V6M
PC106
1U_0603_10V6K
PC136
68U_25V_M
1
2
PR130
2
1.05K_0603_1%
PC105
0.22U_0402_10V4Z
VCC
PR129
100K_0402_1%
1
CPU_B+
+VCC_CORE
+5VALW
Delta I=0.0528A REF MAX=2.01V*10K/(10K+90.2K)=0.2005V

REF Min=1.99V*10K/(10K+90.2K)=0.1986V
Iimit Max=0.2005V*10/1.485m+1/2 Delta=13.528
Iimit Max=0.1986V*10/1.515m+1/2 Delta=13.135
0.844
1.356
0.828
1.340
0.812
1.324
0.796
1.308
0.780
1.292
0.764
1.276
0.748
1.260
0.732
1.244
0.716
1.228
0.700
1.212

Title
+CPU_CORE
Size
Document Number
Rev
EDX20 LA-2481
Sheet
E
0.5
45
of
48
Version change list (P.I.R. List)

Item
Fixed Issue
Reason for change
Rev.
PG#
Page 1 of 1
Modify List
B.Ver#
Phase
Change FAN circuit to PWM contrl
Change FAN design
0.4
Delete unused parts
0.4
Del C285
Change CPU Ref Location name
0.4
Change CPU Ref location name from JP18 to U1
Delete unused parts
0.4
17
Del R252,Del PID0 net on JP20 pin 26
Design Change
0.4
21
Change PID0 net name to ICH_GPIO33

Add Q62(2N7002) to contrl ISOLATE# pin
Design Change
0.4
27
Add net ISOLATE# on U39 pin23
Delete SD card LED
0.4
24
Del D11,R377
Add LAN power control MOSFET
0.4
27
Add Q63(AO3402),Q64(2N7002),R527(10K_0402),C575(0.01uF_0402)
Add MOS on Docking USB_OVC pins
0.4
36
Add Q65,Q66,Q67 on USB_OVC#3, USB_OVC#4, USB_OVC#5
10
ME change cable design to FFC
0.4
36
Swap JP27,JP22 pin assignment
11
ME change cable design to FFC
0.4
30
Swap JP25
12
decrease Audio Gain setting
0.4
30
Save more power in S3 battery mode
Depop R245, Pop R243
13
14
3
15
16
17
18
19
20
21
22
4
23

Title
PIR
A
Size
Document Number
Rev
0.5
EDX20 LA-2481
Date:
Sheet
E
46
of
48

Item
Fixed Issue
Reason for change
Rev.
PG#
Page 1 of 1
Modify List
B.Ver#
Phase
Del MOS on Docking USB_OVC pins
0.5
36
Del Q65,Q66,Q67,Q68 on USB_OVC#3, USB_OVC#4, USB_OVC#5
Add Docking USB_OVC circuit
0.5
33
Add U54,R533,534,R535,R536,R537,C576,C577,C578,C579
Cost-Down
0.5
Del C252
Design Change
0.5
31
Change USB Connector type
External VGA display quality
Design Change
0.5
10
Change R36 to 220 ohm(EE Change List by Motion item 1)
Support new version audio driver
Design Change
0.5
36
Change R1160 to 5.1K ohm(EE Change List by Motion item 2)
Material Change
0.5
32
Change Y6 to KDS_SJ132P7KB10 part.(TXC EOL)
Change CPU to C0 step
31
Change R14,R15 to 47 ohm
7
2
Design Change
0.5
10
11
12
13
14
3
15
16
17
18
19
20
21
22
4
23

Title
PIR
A
Size
Document Number
Rev
0.5
EDX20 LA-2481
Date:
Sheet
E
47
of
48

Item
Fixed Issue
Reason for change
Rev.
PG#
Page 1 of 2
Modify List
B.Ver#
Phase
0.3
DVT
0.3
DVT
0.3
DVT
1.Add the Pre-charge circuit.
Add the pre-charge circuit.
Pre-charge function fail.
0.3
43
To adjust sequence for +5VALWP and +3VALWP.
To adjust sequence for +5VALWP and +3VALWP.
0.3
41
Add the PD32,PR188,PR189,PR190,PR191,PR192,PR182,PD33,

PC71,PC127,PC12,PR194,PR87,PR196,PQ35,PR198,PR199,PR197,
PQ38
1.Delete PC59.
2.Change the PR122 from 100K to 0.
1.Change the control IC of +1.5VALWP from FAN5234 to

MAX8743.
3
Chnage the power solution for +VCCP,+1.8VP

and +1.5VSP.
Solve Digitizer issue.
0.3
42,44
2.Change the control IC of +1.8VP from ISL6227 to

MAX8743.
3.Change the control IC of +VCCPP from ISL6227 to
MAX8576.
4
Delete the circuit of 1.2VP.
Because H/W donot need.
0.3
43
1.Delete the PC100,PQ29,PR121,PR122,PC99,PC101,PR123

,PR127,PQ30,PR158,PC102,PR125,PC103.
0.3
DVT
2
To adjust the input-current limit.
Change the input-cuurrent from 3A to 2.25A
0.3
39
1.Change the PR29 from 150K to 232K.
0.3
DVT
The jumping cursor when CPU_CORE heavy

loading.
Improve Digitizer issue.
0.4
45
1.Change the PL15 form TOKIN .56UH to Panasoic .36UH.
0.4
DVT2
0.4
DVT2
1.Add the 2n7002 on PQ22,PQ24,PQ25 and PQ26.

2. Add the 2K_0402_5% on PR93 and PR101.
0.4
40,43
3. Add the 3K_0402_5% on PR91 and PR92.
4.Add the 470K_0402_5% on PR86 and PR87.
The system has shut down issue when

swap battery.
The max1538 has some issue when sawp battery.

So add the one shot circuit to improve the issue.
5.Add the 100K_0402_5% on PR65.

6.Add the 47K_0402_1% on PR88.
7.Add the 499_0402_1% on PR89 and PR90.
8.Add the 1N4148 on PD17.
9.Add the .022U_0402_16V on PC73 and PC78.
10.Add the 100P_0402_50V on PC79.
Battery drain issue when battery only

on system off.
It did not turn off the +VCCP (1.05V) power no matter

system was ON or OFF.Add pill down resistor.
0.4
42
1.Add the resistor on the PR199 and value is 100K_0402_5%.
0.4
DVT2
The customer request add the cap.
Improve Digitizer issue.
0.4
45
1.Add the 1U_0805_25V on PC80 and PC81.
0.4
DVT2
Disable Vin OVP function.
Disable Vin OVP function.
0.4
39
0.4
DVT2
1.Delete the PD5 RLZ22B_LL34.

10
2.Delete the PD6 1SS355_SOT323.
11.
4
Change Main battery connect.
Because the FDS4935A will phase out.
For ME request.
DVT2
39
1.Change the main battery from SUYIN_250263MR007G102ZL to

SUYIN_250263MR007G110ZR.
0.4
0.4
DVT2
40
1.Change the main battery from SUYIN_250263MR007G102ZL to

SUYIN_250263MR007G110ZR.
0.4
0.4
Because the FDS4935A will phase out.
12.

Title
POWER-PIR
A
Size
Document Number
Rev
0.5
EDX20 LA-2481
Date:
Sheet
E
48
of
48

Adi Maual Service Tableta Motion-LE1600-Tablet-PC

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A

MODEL NAME : EDX20

EDX20 Schematics Document

Compal Electronics, Inc.

Tuesday, February 22, 2005

LCD 12.1" SXGA

Intel 915 GMS (Alviso)

On Board 512MB (8-Cell)

Pecos USB port0

Pecos USB port1

LLANO USB port2

Travel Dock USB port5

LLANO USB port3

Bluetooth USB port6

LLANO USB port4

1MB ROM BIOS

Finger Printer USB port7

Compal Electronics, Inc.

Tuesday, February 22, 2005

External PCI Devices

USB PORT TABLE

ICH6M SM Bus Address

S5 S4/AC don't exist

AT24C16AN-10SI-2.7(U24) 1011 XXX R/W#b

Adapter power supply (19V)

AC or battery power rail for power circuit

Core voltage for CPU

0.9V switched power rail for DDRII Vtt

1.5V switched power rail for PCI-E interface

1.8V power rail for DDRII

1.8V switched power rail

2.5V switched power rail for MCH video PLL

3.3V always on power rail

3.3V switched power rail

5V always on power rail

5V switched power rail

12V always on power rail

Compal Electronics, Inc.

Input Current Sense

Output Current Sense

Tuesday, February 22, 2005

PWM Fan Control circuit

Compal Electronics, Inc.

Tuesday, February 22, 2005

+1.8VS FOR NON-LV/ULV PROCESSOR

Resistor placed within

Resistor placed within

Compal Electronics, Inc.

Tuesday, February 22, 2005

Near VCORE regulator.

Compal Electronics, Inc.

Tuesday, February 22, 2005

Refer to page15 for FSB

Compal Electronics, Inc.

Tuesday, February 22, 2005

Compal Electronics, Inc.

Tuesday, February 22, 2005

PCI - EXPRESS GRAPHICS

Compal Electronics, Inc.

Tuesday, February 22, 2005

Note : All VCCSM pin

Route VSSATVBG gnd from GMCH to

Route VSSA3GBG gnd from GMCH to