Vous êtes sur la page 1sur 33

Internal Use Only

North/Latin America
Europe/Africa
Asia/Oceania

http://aic.lgservice.com
http://eic.lgservice.com
http://biz.lgservice.com

PLASMA TV
SERVICE MANUAL
CHASSIS : PA01A

MODEL : 50PK550

50PK550-AA

CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL62882003(1011-REV01)

Downloaded from www.Manualslib.com manuals search engine

Printed in Korea

CONTENTS

CONTENTS ............................................................................................................................... 2
SAFETY PRECAUTIONS ...........................................................................................................3
SPECIFICATION.........................................................................................................................4
ADJUSTMENT INSTRUCTION ..................................................................................................6
TROUBLESHOOTING GUIDE..................................................................................................11
BLOCK DIAGRAM ...................................................................................................................22
EXPLODED VIEW ...................................................................................................................23
SVC. SHEET ................................................................................................................................

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

-2-

LGE Internal Use Only

SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by
in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this monitor is blown, replace it
with the specified.

Leakage Current Hot Check (See below Figure)


Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.

When replacing a high wattage resistor (Oxide Metal Film Resistor,


over 1W), keep the resistor 10mm away from PCB.

Leakage Current Hot Check circuit

Keep wires away from high voltage or high temperature parts.

AC Volt-meter

Due to high vacuum and large surface area of picture tube,


extreme care should be used in handling the Picture Tube.
Do not lift the Picture tube by it's Neck.

Leakage Current Cold Check(Antenna Cold Check)


With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1M and 5.2M.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

-3-

To Instrument's
exposed
METALLIC PARTS

0.15uF

Good Earth Ground


such as WATER PIPE,
CONDUIT etc.

1.5 Kohm/10W

LGE Internal Use Only

SPECIFICATIONS
NOTE : Specifications and others are subject to change without notice for improvement.
V

Application Range
This spec is applied to the PDP TV used PA01A Chassis.

Specification
Each part is tested as below without special appointment.
1) Temperature : 255C (779F), CST : 405
2) Relative Humidity: 6510%
3) Power Voltage: Standard Input voltage (100-240V~, 50/60Hz)
* Standard Voltage of each product is marked by models.
4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with
SBOM.
5) The receiver must be operated for about 20 minutes prior to the adjustment.

Test Method
1) Performance : LGE TV test method followed.
2) Demanded other specification
Safety : CB specification
EMC : CISPR 13 specification

Test Method
No

Item

1.

Broadcasting system

PAL-B/B, DTV : DVB-T

Specification

2.

Available Channel

1)DTV

Remark

-.VHF : 6 ~ 12
-.UHF : 27 ~ 69
2) ATV
-.VHF : 0 ~ 20
-.UHD : 21 ~ 75
3.

Tuner IF

1) PAL : 38.90MHz(Picture),
34.40MHz(Sound)
2) DVB-T : 36.125MHz

4.

Input Voltage

AC 100 ~ 240 V, 50/60Hz

5.

Screen Size

42 inch XGA(1024 x 768)

Mark : 240V, 50Hz

50 inch Wide(1365 x 768)


50 inch Wide(1920 1080)
60 inch Wide(1920 1080)
6.

Aspect Ratio

16:9

7.

Module

42/50T1, 50/60R1

8.

Operating Environment

1) Temp : 0 ~ 40 deg

9.

Storage Environment

2) Humidity : ~ 80 %
1) Temp : -20 ~ 60 deg
2) Humidity : ~ 85 %

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

-4-

LGE Internal Use Only

Chroma & Brightness

(1) FHD Module (50R1 Module, 38% Glass Filter )


* Warning : When measuring following test items, Dynamic Colour & Dynamic Contrast should be turned off.
No

Item

Min

Typ

Max

Unit

1.

White peak brightness

236

284

cd/m2

Remark
(*) Peak Brightness Mode
-1/100 white Window pattern
(Typically 1% Window size)
-100IRE (255Gray)
-Picture: Vivid (Medium)
-Input: HDMI-PC(1920*1080 60Hz)
*Peak Brightness Condition may Slightly
different between sets.

2.

White average brightness

140

150

44

50

-25/100 white Window pattern


cd/m2

- 100% Window White Pattern


- 100IRE(255Gray)
- Picture: Vivid(Medium )

3.

Brightness uniformity

-10

+10

4.

Color

0.270

0.285

0.300

0.278

0.293

0.303

0.635

0.640

0.318

0.333

0.345

Green

0.242

0.300

0.305

0.595

0.600

Blue

0.150

0.158

0.065

0.075
+0.01

- 85IRE(216Gray) 100% Window White Pattern


- Picture: Vivid(Medium)

White

Coordinate
Red

5.

Color coordinate uniformity

-0.01

Average

6.

Contrast ratio at dark room

100k: 1

1,000k: 1

- White : 85IRE(216Gray) 100% Window


White Pattern
- R/G/B : 100IRE(255Gray) 100% Window
White Pattern
- Picture: Vivid(Medium )
- 100% Window

- 85IRE 100% Window White Pattern


- Picture: Vivid(Medium)
-1/100 white window pattern(Peak mode)
-100IRE(255Gray)
-Picture: Vivid(Medium)
-Input: HDMI-PC (1920*1080 60Hz)

7.

Color

Cool

Temperature
Medium
Warm

0.261

0.276

0.291

- 85IRE 100% Window White Pattern

0.268

0.283

0.298

Warm : ColorGamut => WIDE

0.270

0.285

0.300

Cool : Color temperature C30

0.278

0.293

0.308

Meduum : Color temperature 0

0.298

0.313

0.328

Warm : Color temperature W30

0.314

0.329

0.344

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

-5-

LGE Internal Use Only

ADJUSTMENT INSTRUCTION
1. Application Range
This spec. sheet is applied to all of the PA01A chassis
manufactured at LG TV Plant all over the world.

2. Designation

Caution
- Use 'power on' button of a service R/C to power on TV set.
- Do not connect any external input cable if there is no any
specifics.

3. Update S/W using auto download


through the USB.

Caution: The module keeping condition


1. The module keeping condition: The normal temperature
condition(more than 15C)
-> Immediately the line supply.
2. The module keeping condition: 0C
-> The module must be kept for more than 2 hours at the
normal temperature.
3. The module keeping condition: -20C
-> The module must be kept for more than 3 hours at the
normal temperature.
4. The case of Gu-mi factory at the winter season.
-> The module must be kept for more than 5 minutes at the
heating zone(40C~45C).
(1) The adjustment is according to the order which is
designated and which must be followed, according to the
plan which can be changed only on agreeing.
(2) If there is no specific designation, the adjustment must be
performed in the circumstance of 25 5C of temperature
and 6510% of relative humidity.
(3) The input voltage of the set must keep 100~240V,
50/60Hz.
(4) Input signal Unit: Product Specification Standard.
(5) The set must be operated for about 5 minutes prior to the
adjustment. .

Caution: S/W version of USB file (xxx.epk) must be bigger than


one which is downloaded previously.
1. Insert the USB stick to the USB socket
2. A downloaded file in USB stick will be detected
automatically.
3. If S/W version of USB file (xxx.epk) is bigger than one which
is downloaded previously, the message, Copying files from
memory, will appear.
4. If an update procedure was completed, TV set will be turned
off and on automatically.
5. If TV set is turned on, check an updated version.
* If a downloaded version is more bigger than one of which
TV set had, TV set can lost channel data. In this case,
you have to scan channels again.

4. After downloading S/W, adjust


TOOL OPTION.

* After turning on RGB Full Window pattern in HEAT-RUN


Mode, the receiver must be operated.
* Enter into HEAT-RUN MODE
1) Press the POWER ON button on R/C for adjustment.
2) Press the ADJ button on R/C and enter EZ ADJUST
- Select "7. Test Pattern" by using F / G (CH +/-) and
press ENTER(V)
- Select "White" by using F / G (VOL +/-) and press
ENTER(V)
O

Set heat run should be activated without a signal generator.

Single color patterns (RED / BLUE / GREEN) of HEAT RUN


MODE are used to check a plasma panel.

Caution: If you turn on a still screen more than 20 minutes


(Especially digital pattern, cross hatch pattern), an after
image may be made in the black level part of the screen.

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

-6-

(1) Push "IN-START" button on a service R/C.


(2) Select "Tool Option 1" and Push OK button.
(3) Put the number of a below table in order of a suffix of the
Tool Option(X).
(Each model has a different number.)
Model

Tool Option1 Tool Option2 Tool Option3 Tool Option4

42PJ350-AB

25024

2632

51404

4384

42PJ650-AA

24896

2632

51408

4384

50PJ350-AB

37312

2632

51404

4384

50PJ650-AA

37184

2632

51408

4384

50PK550-AA

36992

2632

51404

4384

60PK550-AA

49280

2632

51404

4384

LGE Internal Use Only

5. ADC Calibration Procedure

6. EDID Download Procedure

(1) Input the component (480i/Horizontal Color Bar) signal to a


TV set.
1) Input Signal Timing : Component 480i
(Other external connection is unnecessary except the
component before executing ADC calibration.)
2) Input Signal Pattern

(1) Push ADJ button on a service R/C.


(2) Enter EDID auto download mode by selecting 8. EDID
D/L.
(3) If you select Start on a dialog box of the screen, EDID
download will be begun automatically.

<Horizontal Color Bar pattern>


@ MODEL: 209 in Pattern Generator(480i Mode)
@ PATTERN : 65 in Pattern Generator(MSPG-925
SERISE)
(2) Push ADJ button on a service R/C.
(3) Enter internal ADC mode by selecting 5. ADC Calibration.
(4) If you select Start on a dialog box of the screen, ADC
calibration will be begun.

(4) Press EXIT button on a service R/C.


(5) EDID Data
1) HDMI (FHD Models, 256 bytes)

Caution: Dont connect any external input cable except the


component input(480i/Horizontal_Color_Bar) to adjust
ADC calibration
O

2) RGB (HD Models, 128 bytes)

Auto ADC Calibration Map(RS-232C)


NO

Item

Enter
Adjust
Adjust MODE Mode In

ADC Adjust

ADC
Adjust

CMD1 CMD2 Data0


When transfer the Made
In, Carry the command.

0 Automatically adjustment

# Adjust Sequence
- aa 00 00 [Enter Adjust Mode]
- xb 00 40 [Component1 Input (480i)]
- ad 00 10 [Adjust 480i Comp1]
- xb 00 60 [RGB Input (1024*768)]
- ad 00 10 [Adjust 1024*768 RGB]
- aa 00 90 End Adjust mode
Copyright 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

-7-

EDID Data detailing (, , , , , )

LGE Internal Use Only

Product ID
MODEL

EDID MODEL

PRODUCT_ID

FUNCTION

ALL Model

LG DTV

0001(0x01, 0x00)

Analog

ALL Model

LG DTV

0001(0x01, 0x00)

Digital

7. POWER Supply Unit PCB Assy


Va/Vs Voltage Adjustment
Caution: Both Vs and Va voltage adjustment are necessary.

7-1. Va/Vs Adjustment Procedure

Serial No
=> Controlled on production line

(1) Connect positive(+) terminal of DMM to Vs/Va pin, connect


negative(-) terminal to GND.
(2) Turning Vs/Va Adjust and adjust Vs/Va voltages to a
value which is written on a right/top label of a module.
(deviation ; 0.5V)

Month, Year
=> Controlled on production line:
Model Name

Checksum
=> Changeable by total EDID data
FHD

HD

HDMI1

0xE2

0xB4

0xAF

0xE2

HDMI2

0xE2

0xA4

0xAF

0xE2

HDMI3

0xE2

0x94

0xAF

0xE2

HDMI4

RGB

0x62

0x2F
Caution
- Each Power Supply Unit PCB assembly must be checked by
check JIG set. (Because power PCB Assy damages to PDP
Module, especially be careful)
- Set up RF mode(noise) before a voltage adjustment.
- Test equipment: DMM 1EA

HDMI Port No.


O

Auto EDID Download Map(RS-232C)


NO

Item

Enter
download
MODE

Download
Mode In

EDID data and


Model option Download
download

CMD1 CMD2 Data0


A

When transfer the Made


In, Carry the command.

Automatically download
00 10 (The use of a internal
Data)

8. White Balance Adjustment


Caution: Press the POWER ON KEY on R/C before W/B
adjustment.
O

Test Equipment
Color Analyzer (CS-1000, CA-100+(CH.10), CA-210(CH.10))

Please adjust CA-100+ / CA-210 by CS-1000 before


measuring
You should use Channel 10 which is Matrix compensated
(White, Red, Green, Blue revised) by CS-1000 and adjust
in accordance with White balance adjustment coordinate.

8-1. Color Temperature Standards According


to CSM and Module(TBD)

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

-8-

CSM

PLASMA

Cool

11000K

Medium

9300K

Warm

6500K

LGE Internal Use Only

8-2. Change Target Luminance and Range


of the Auto Adjustment W/B Equipment
Target luminance

50

Range

20

Auto W/B Adjustment Map(RS-232C)


RS-232C COMMAND
[ CMD ID DATA ]
Wb 00
00
White Balance Start
Wb 00
FF
White Balance End
RS-232C COMMAND
[CMD ID DATA]
Cool

8-3. White Balance Adjustment Coordinate


and Color Temperature
Target luminance

50

Range

20

Warm

Cool

Med

MA X
Warm

R Gain

jg

Ja

jd

00

192

192

192

G Gain

jh

Jb

je

00

192

192

192

255

B Gain

ji

Jc

jf

00

192

192

192

255

64

64

64

128

R Cut
50H3
60H3

8-4. White Balance Adjustment Coordinate


and Color Temperature

Med

CENTER
(DEFAULT)

Min

255

G Cut

64

64

64

128

B C ut

64

64

64

128

8-6. Manual W/B Adjustment


(1) Execute the zero calibration of CA-100+ / CA-210.
(2) Press the ADJ button on a service R/C and enter EZ
ASJUST by selecting 6. White Balance.
(3) Then, 216 gray pattern will appear on the screen.
(4) Change the R/G/B-Gain as passing in 3 color coordinates
and temperatures, COOL, MEDIUM and WARM.
< Temperature: COOL >
- R-Cut / G-Cut / B-Cut is set to 64
- Control R-Gain and G-Gain.
- Each gain is limited to 192
< Temperature: MEDIUM >
- R-Cut / G-Cut / B-Cut is set to 64
- Control R-Gain and G-Gain.
- Each gain is limited to 192

[ PC (for communication through RS-232C) ? UART Baud


rate : 115200 bps

8-5. Automatic W/B Adjustment


(1) Internal PATTERN should be used when W/B is adjusted.
Connect to auto controller like below.

< Temperature: WARM >


- R-Cut / G-Cut / B-Cut is set to 64
- Control G-Gain and B-Gain.
- Each gain is limited to 192
(5) Press EXIT button on a service R/C

(2) Start White-Balance adjustment, then the full white window


pattern will appear on the screen.
(3) Adjust in the place where the influx of light like floodlight
around is blocked.
(illumination is less than 10ux).
(4) Measure and adjust after sticking the Color Analyzer (CA100+, CA210 ) to the side of the module.

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

-9-

LGE Internal Use Only

<Notice> Module Heat-Run Condition for W/B


1. The adjustment must be performed in the circumstance of
255C of temperature and 6510% of relative humidity if
there is no any specifics.
2. Before an W/B adjustment, the module which will be used
should be placed in the circumstance of 15C~25C for
above 2 hours.
3. If a module was placed in the circumstance of below 15C,
it should be placed in the circumstance of 15C~25C for
above 2 hours or be run for above 5 minutes in an aging
environment of 60C.
4. Before an W/B adjustment, TV set should be run for 5
minutes at least.

9. Serial Number Download

9-3. Command Set


[Description]
FOS Default write : <7mode data> write
Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart,
0, Phase
Data write : Model Name and Serial Number write in
EEPROM,.

10. Check Information (Serial No. & Model name)


(1) Push the menu button in DTV mode.
(2) Select the SETUP -> Diagnostics -> To set
(3) Check the Serial Numbe

11. SET factoring condition

9-1. Download Procedure


(1) Press Power on button of a service R/C.(Baud rate :
115200 bps)
(2) Connect RS232-C Signal Cable.
(3) Write Serial number through RS-232C.
(4) Check the serial number at the Diagnostics of SETUP
menu. (Refer to below).

(1) This Adjustment result is set through factory shipment


mode.
(2) Push the IN-STOP button on a service R/C before the
factory shipment and power button mush be pushed.
Caution: If IN-STOP button is pushed, preset CH map will be
lost.

Caution : Dont download HDMI/RGB EEPROM to write a model


name. Model name dois unnecessary because this
model use Tool Option to call a model name.

9-2. Signal TABLE

CMD
LENGTH
ADH
ADL
Data
CS
Delay

: A0h
: 85~94h (1~16 bytes)
: EEPROM Sub Address high (00~1F)
: EEPROM Sub Address low (00~FF)
: Write data
: CMD + LENGTH + ADH + ADL + Data_1 + ... +
Data_n
: 20ms

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

- 10 -

LGE Internal Use Only

TROUBLESHOOTING GUIDE

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

- 11 -

LGE Internal Use Only

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

- 12 -

LGE Internal Use Only

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

- 13 -

LGE Internal Use Only

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

- 14 -

LGE Internal Use Only

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

- 15 -

LGE Internal Use Only

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

- 16 -

LGE Internal Use Only

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

- 17 -

LGE Internal Use Only

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

- 18 -

LGE Internal Use Only

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

- 19 -

LGE Internal Use Only

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

- 20 -

LGE Internal Use Only

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

- 21 -

LGE Internal Use Only

BLOCK DIAGRAM

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

- 22 -

LGE Internal Use Only

EXPLODED VIEW
IMPORTANT SAFETY NOTICE

910

520

A12

310

A2

A21

300

570

LV1

302

A10

303

120

203

202

305

A9

204

207

302

301

201

205

501

580

240

590

206

200

208

209

602

604

900

601

400

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by
in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

- 23 -

LGE Internal Use Only

IC100
LGE3369A (SATURN6 NON RM)

+3.3V_ST

VSS_1

READY

NC_10
CL
10K

AL
PF_ALE
W
/PF_WE
WP
R1239
1K

42
41

40

10

39

11

38

12

37

NC_11
NC_12
NC_13
NC_14
NC_15

AR102

34

16

33

17

32

18

31

19

30

20

29

21

28

22

27

23

26

24

25

I/O7

PCM_A[7]

I/O6

PCM_A[6]

I/O5

PCM_A[5]

I/O4

PCM_A[4]

NC_24
NC_23

AA16

AA15
AC6
Y10

R114
100

Y11
Y12

PCM_A[0-7]

R116
10

PCM_A[0-7]

Y13

S6_Reset
PCM_A[0]

22

NC_25

AC16

DEBUG

C102
4.7uF
10V

NC_26

R115
62K

C101
0.1uF

VSS_2

C105
10uF 6.3V

AC15

PCM_A[2]

AC14

PCM_A[3]

AB14

PCM_A[4]

AC12

PCM_A[5]

AB8

PCM_A[6]

AC13

PCM_A[7]

AA9
AB5

C106

0.1uF

AA4
V4

NC_22

Y4

NC_21

AB9
AA7

NC_20

AD6

AR103
I/O3

PCM_A[3]

I/O2

PCM_A[2]

I/O1

Y5
AB15

PCM_A[0]

AA10
AC8
AC7

NC_18

AA5

NC_17

W4

AR171

T4

NC_16

AE6

/PF_CE0

AF6
AA12

/PF_OE
22

AR101

/PF_WE

AA11

PF_ALE

AC9

PF_WP

Y14
AB11

+3.3V

/F_RB

L101

HOLD#

SCLK

E1

PCMD5/CI_D5

SPI_DO
/SPI_CS

PCMD7/CI_D7

SPI_CK

SI

AE11

33

R1224

SPI_DI

AF12

33

R1230

SPI_DO

AE12

33

R1225

SPI_CS

AD11

33

R1226

SPI_CK

PCM_A0/CI_A0
PCM_A1/CI_A1
PCM_A2/CI_A2
PCM_A3/CI_A3

B5

PCM_A4/CI_A4

USB_DP_1

PCM_A5/CI_A5

USB_DM_1

PCM_A6/CI_A6

USB_DM_2

PCM_A7/CI_A7

USB_DP_2

A5
AC10

USB_DM

AB10

USB_DP
R196
15K
READY

PCM_A8/CI_A8
PCM_A9/CI_A9

USB

R197
15K
READY

PCM_A10/CI_A10
PCM_A11/CI_A11
PCM_A12/CI_A12

R131

PCM_A13/CI_A13

100

R130

WP

SCL

ISP_RXD

C100
0.1uF

1K

1K

R162
R163

R102

R101
C116
100pF
50V

E5
PCM_RST/CI_RST

GPIO_PM0/GPIO134

PCM_CD/CI_CD

GPIO_PM1/GPIO135

/PCM_OE

R164
R165

22

GPIO_PM2/GPIO136

PCM_REG/CI_CLK

GPIO_PM3/GPIO137

PCM_WAIT/CI_WACK

GPIO_PM4/GPIO138

/PCM_IRQA

GPIO_PM5/INT1/GPIO139

/PCM_WE

GPIO_PM6/INT2/GPIO140

PCM_IOWR/CI_WR

GPIO131/LDE/SPI_WPn1

PCM_IOR/CI_RD

GPIO130/LCK

/PCM_CE

GPIO132/LHSYNC/SPI_WPn

/PF_CE0

GPIO60/PCM2_RESET/RX1

/PF_CE1

100

GPIO62/PCM2_CD_N/TX1

D11

22

AB21

22

AC21

22

J1

R141

22

J2

ISP_TXD
DBG_RX

R1297

100

W5

DBG_TX

R1296

100

V5

G5

R185
100

H5

DBG_TX
+5V_ST

AC_DET

10K

LED_R

100 READY R195


10K
100
READY
R160

AC_DET
MODULE_ON
DISP_EN
R186

F6
G6

R134
27K

READY
100

H6

100

RL_ON/PWR_ONOFF

DBG_RX

R187

ISP_TXD

AC17

+3.3V

AB17
AF11

100

R159

AA18

R1235

AA17

R1236
22
+3.3V

PF_ALE
PF_AD15
LHSYNC2/I2S_OUT_MUTE/RX1
LVSYNC/GPIO133
UART2_TX/SCKM

GPIO79/LVSYNC2/TX1

UART2_RX/SDAM

UART2_RX/GPIO84

DDCR_DA

UART2_TX/GPIO85

DDCR_CK

C117
100pF
50V R140

R182

/PF_WE

F8

22

R1294

F5

Flash_WP_1

22

SDA1
SCL1

/PF_OE

UART1_RX/GPIO86
UART1_TX/GPIO87

DDCA_CLK

GPIO42/PCM2_CE_N

DDCA_DA

+3.3V

22
0

SUB_SCL
5V_HDMI_2

22

SUB_SDA

F9
F10

USB_OCD

A6

100

R1277

B6

100

R1276

AF5
AF10

MOD_ROM_RX

H/W Version Opiton(F9)

MOD_ROM_TX

C108 C107
10pF 10pF
50V
50V
READY READY

AV_DET

AA8

UART_TX2

TS0_D0
TS0_D1
LGE3369A

SDA

E7
R1237
AC18 R1286
C6
R1238

GPIO43/PCM2_IRQA_N

UART_RX2

EEPROM_SCL

SPI_CK
VSS

GND

VCC

2K

E2

WP#

Flash_WP_1

PDP_SCL

R124

NC

PDP_SDA

2K

0.1uF
C104

R104
10K

SO

SPI_DO

IC105
M24M01-HRMN6TP

R125

READY

+3.3V

R135 R133
0
4.7K

SPI_CS

VCC

EEPROM_SDA

READY

CS#

+3.3V +3.3V_ST
L102

R1233
4.7K

EEPROM_SCL

IC103
MX25L4005AM2C-12G

SPI_DI

PCMD6/CI_D6

F_RBZ

22
+3.3V
+3.3V

PCMD4/CI_D4

PM GPIO Assignment Recommended by MStar

/PF_CE1

Serial FLASH MEMORY


for BOOT

TESTPIN/GND

PCMD2/CI_D2
PCMD3/CI_D3

PCM_A14/CI_A14

AB18

22

NC_19

E6

PCMD1/CI_D1

AA14

PCM_A[1]

I/O0

18pF

PCMD0/CI_D0

AB16

PCM_A[1]

VDD_2

35

15

PCM_A[0-7]

NC_27

36

14

/PF_CE1

PF_WP

43

13

NC_9

R105
1K

44

NC_28

R1203
4.7K

NC_8
VDD_1

5
6

NC_29

R1202
4.7K

READY

0.1uF

NC_7
C103

R112

1K

/PF_CE0

45

C112

R1279
4.7K

46

C111
18pF

A3

READY

/PF_OE

47

XIN
XOUT

R1278
4.7K

48

X100
12MHz
R193
1M

B3

HWRESET

R1205
4.7K

RB

1K

3.9K

NC_5
NC_6

R111

R1240

/F_RB

NC_4

SW100
TMUE312GAB

NC_2
NC_3

KDS181
D100

NC_1

R103

D4

S6_Reset

/PF_CE0
H : Serial Flash
L : NAND Flash
/PF_CE1
H : 16 bit
L :
8 bit

+3.3V

+3.3V

R1204
4.7K

IC102
NAND512W3A2CN6E

+3.3V

NAND FLASH MEMORY

EEPROM_SDA

TS0_D2
TS0_D3

SPI_DI

TS0_D4
TS0_D5
TS0_D6
TS0_D7
TS0_SYNC
TS0_VLD

Y8
Y9
AB7
AA6
AB6
U4
AC5
AC4
AD5
AB4

TS0_CLK
TS1_D0

HDCP EEPROM

PWM0

AB13

PWM1

AB12

KEY_BUZZER

AD12

MCU BOOT STRAP

+5V

R1287

10 : BOOT 51
11 : BOOT RISC
IC107
CAT24WC08W-T
A0 1

VCC

A1 2

WP

A2 3

SCL

VSS

+3.3V

+3.3V

R110
4.7K
R1257

22

R1258

22

R198

1K

R199

PWM0

B4

KEY2
LED_B

100
0

R1242
R106

F4
E4
C4

IR

1K

TS1_VLD

PWM1

TS1_CLK

PWM2

R1200

R1201

1K

ET_TXD0

SAR0

ET_TX_CLK

SAR1

ET_RXD0

SAR2

ET_RXD1

ET_TXD1

SAR3
IRIN

PWM1

AB19

FE_TS_SERIAL

AA20

FE_TS_SYN

AC19

FE_TS_VAL

AA19

FE_TS_CLK

C10

PWM3

ET_TX_EN
ET_MDC
ET_MDIO

READY
EEPROM_SDA
C114
0.1uF

AA13

PWM0

A4
KEY1

SB_MUTE

READY
EEPROM_SCL

SDA

R1298
10K

R1256
4.7K

100 READY

TS1_SYNC

SIDE_CVBS_DET

B11
A9
C11

+3.3V

C9

R1283

B10

R190

A10

R191

22 R1270
4.7K
0

AMP_RST

R1271
4.7K
HD

R1241
10K

+3.3V
XC5000_RESET

/FE_RESET

D9
D10
D7
E11
E8
E10

ST_AMP_MUTE

R1268
4.7K
FHD
COMP1_DET

D6
D5

READY

4.7K

READY

READY

READY

4.7K

4.7K

4.7K

C5

DSUB_DET

5V Tolerance

COMP2_DET
R1269
4.7K
READY

GPIO44
+3.3V

5V_HDMI_1

B9
A11

ET_COL

AC11

1K

TU_SLEEP_MODE
5V_HDMI_3

GPIO96
GPIO88
GPIO90/I2S_OUT_MUTE
GPIO91
GPIO97
GPIO98
GPIO99
GPIO103/I2S_OUT_SD3
GPIO102
IC100-*1
LGE4369A (SATURN6 NON RM_NON SRS)
D4

B3
HWRESET

XIN

AC6
Y10
Y11
Y12
Y13

PCMD0/CI_D0

R1275

R137

R1299

R1300

AB8
AA9
AB5
AA4
V4
Y4
AB9
AA7
AD6

D4

TESTPIN/GND

AA15
AA16
AC6

AE11
SPI_DI
SPI_DO
/SPI_CS

AF12
AE12
AD11

Y10
Y11
Y12
Y13

Y5

AC8
AC7
AA5
W4
T4
AE6
AF6
AA11
AC9
Y14
AB11

AC15
AC14
AB14
A5
AC10
AB10

AC12
AB8
AC13
AA9
AB5
AA4
V4
Y4
AB9
AA7
AD6

XIN

GPIO131/LDE/SPI_WPn1
GPIO130/LCK
GPIO60/PCM2_RESET/RX1
GPIO62/PCM2_CD_N/TX1

F5
G5
H5
F6
G6
H6
AC17
AB17
AF11
AA18
AA17

E6
TESTPIN/GND

AE11
SPI_DI
SPI_DO
/SPI_CS

Y5

AC8
AC7
AA5
W4
T4
AE6
AF6
AA11
AC9
Y14

E7
LHSYNC2/I2S_OUT_MUTE/RX1
LVSYNC/GPIO133
GPIO79/LVSYNC2/TX1
UART2_RX/GPIO84
UART2_TX/GPIO85
UART1_RX/GPIO86
UART1_TX/GPIO87
GPIO42/PCM2_CE_N

TS0_D0
TS0_D1
LGE4369

TS0_D2
TS0_D3
TS0_D4
TS0_D5
TS0_D6
TS0_D7
TS0_SYNC
TS0_VLD

AB11

B5
USB_DP_1
USB_DM_1
USB_DM_2

E5
GPIO_PM0/GPIO134
GPIO_PM1/GPIO135
GPIO_PM2/GPIO136
GPIO_PM3/GPIO137
GPIO_PM4/GPIO138
GPIO_PM5/INT1/GPIO139
GPIO_PM6/INT2/GPIO140
GPIO131/LDE/SPI_WPn1
GPIO130/LCK
GPIO132/LHSYNC/SPI_WPn
GPIO60/PCM2_RESET/RX1

W5

LVSYNC/GPIO133
GPIO79/LVSYNC2/TX1
UART2_RX/GPIO84
UART2_TX/GPIO85
UART1_RX/GPIO86
UART1_TX/GPIO87
DDCA_CLK

GPIO42/PCM2_CE_N

DDCA_DA

PWM1

TS0_D1

Y9
LGE4368

AB7

TS0_D2
TS0_D3

AA6

TS0_D4

AB6

TS0_D5

U4

TS0_D6

AC5

TS0_D7

AC4

TS0_SYNC

AD5

TS0_VLD

AB4

ET_TXD1
ET_RXD0
ET_RXD1
ET_TX_EN
ET_MDC
ET_MDIO

D7
E11
E8
E10
D6
D5
C5

AD12
AA13

B11
A9
C11
C9
B10
A10

TS1_SYNC
PWM0
PWM1

TS1_VLD

ET_TXD1
ET_RXD0
ET_RXD1
ET_TX_EN
ET_MDC
ET_MDIO

GPIO88

D7

GPIO90/I2S_OUT_MUTE

E11

GPIO91

E8

GPIO97

E10

GPIO98

D6

GPIO99

D5

GPIO103/I2S_OUT_SD3

C5

GPIO96
GPIO88
GPIO90/I2S_OUT_MUTE
GPIO91
GPIO97
GPIO98
GPIO99
GPIO103/I2S_OUT_SD3
GPIO102

GPIO68

R192

100

B11
A9
C11
C9
B10
A10
B9
A11

ET_COL
GPIO44

D9

A7

A7

Y9
AB7
AA6
AB6
U4
AC5
AC4
AD5
AB4

AA20
AC19
AA19
C10

ET_TXD0
ET_TX_CLK

SAR1
SAR2
SAR3
IRIN

AC11

D10

GPIO67

B8

AC18
C6
F9
F10
A6
B6
AF5
AF10

Y8

TS1_CLK

PWM2
PWM3
SAR0

A4
B4
F4
E4
C4

B9
A11

ET_COL

GPIO96

GPIO102

GPIO67

F5
G5
H5
F6
G6
H6

AB19
TS1_D0

GPIO44
D9
D10

AC17

TS0_CLK

AB13
AB12

C10
ET_TXD0
ET_TX_CLK

SAR1
SAR2
SAR3
IRIN

AC11

AB17

AA8
TS0_D0

AA20
AC19
AA19

TS1_CLK

PWM2
PWM3
SAR0

A4
B4
F4
E4
C4

TS1_VLD

AF11

GPIO43/PCM2_IRQA_N

UART_RX2
UART_TX2

AB19
TS1_D0
TS1_SYNC
PWM0

AA18

E7
LHSYNC2/I2S_OUT_MUTE/RX1

UART2_TX/SCKM
UART2_RX/SDAM
DDCR_DA
DDCR_CK

J1
J2
V5

AA17

GPIO62/PCM2_CD_N/TX1

/PF_WE
PF_ALE
PF_AD15

F8
D11
AB21
AC21

Y8

TS0_CLK

AD12

A5
AC10
AB10

USB_DP_2

PCM_RST/CI_RST
PCM_CD/CI_CD
/PCM_OE
PCM_REG/CI_CLK
PCM_WAIT/CI_WACK
/PCM_IRQA
/PCM_WE
PCM_IOWR/CI_WR
PCM_IOR/CI_RD
/PCM_CE
/PF_CE0
/PF_CE1
/PF_OE

F_RBZ

AC18
C6
F9
F10
A6
B6
AF5
AF10
AA8

GPIO43/PCM2_IRQA_N

AB13

AA13

AF12
AE12
AD11

SPI_CK

PCM_A0/CI_A0
PCM_A1/CI_A1
PCM_A2/CI_A2
PCM_A3/CI_A3
PCM_A4/CI_A4
PCM_A5/CI_A5
PCM_A6/CI_A6
PCM_A7/CI_A7
PCM_A8/CI_A8
PCM_A9/CI_A9
PCM_A10/CI_A10
PCM_A11/CI_A11
PCM_A12/CI_A12
PCM_A13/CI_A13

AA14
AB18
AB15
AA10

AA12

/PF_WE
PF_ALE
PF_AD15
F_RBZ
UART2_TX/SCKM
UART2_RX/SDAM
DDCR_DA
DDCR_CK
DDCA_CLK
DDCA_DA
UART_RX2
UART_TX2

AB12

A3

XOUT
PCMD0/CI_D0
PCMD1/CI_D1
PCMD2/CI_D2
PCMD3/CI_D3
PCMD4/CI_D4

PCM_A14/CI_A14
E5
GPIO_PM0/GPIO134
GPIO_PM1/GPIO135
GPIO_PM2/GPIO136
GPIO_PM3/GPIO137
GPIO_PM4/GPIO138
GPIO_PM5/INT1/GPIO139
GPIO_PM6/INT2/GPIO140

GPIO132/LHSYNC/SPI_WPn

J1
J2
W5
V5

PCMD5/CI_D5

AB16

B5
USB_DP_1
USB_DM_1
USB_DM_2
USB_DP_2

PCM_RST/CI_RST
PCM_CD/CI_CD
/PCM_OE
PCM_REG/CI_CLK
PCM_WAIT/CI_WACK
/PCM_IRQA
/PCM_WE
PCM_IOWR/CI_WR
PCM_IOR/CI_RD
/PCM_CE
/PF_CE0
/PF_CE1
/PF_OE

F8
D11
AB21
AC21

+3.3V

PCMD6/CI_D6
PCMD7/CI_D7

SPI_CK

PCM_A0/CI_A0
PCM_A1/CI_A1
PCM_A2/CI_A2
PCM_A3/CI_A3
PCM_A4/CI_A4
PCM_A5/CI_A5
PCM_A6/CI_A6
PCM_A7/CI_A7
PCM_A8/CI_A8
PCM_A9/CI_A9
PCM_A10/CI_A10
PCM_A11/CI_A11
PCM_A12/CI_A12
PCM_A13/CI_A13
PCM_A14/CI_A14

AA14
AB18
AB15
AA10

AA12

B3
HWRESET

AC16
E6

PCMD1/CI_D1
PCMD2/CI_D2
PCMD3/CI_D3
PCMD4/CI_D4
PCMD5/CI_D5
PCMD6/CI_D6
PCMD7/CI_D7

AC15
AC14
AB14
AC12
AC13

IC100-*2
LGE4368A (SATURN6 NO-DIVX_NON SRS)

A3

XOUT

AC16
AA15
AA16

AB16

B8

A7
GPIO67

B8

GPIO68

USB_CTL

GPIO68

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright 2010 LG Electronics Inc. All rights reserved.
Downloaded
from
www.Manualslib.com
manuals search engine
Only for training and
service
purposes

MSD3368EV Platform
FLASH/NVRAM/GPIO

09/11/17
1

10

LGE Internal Use Only

+1.26V_VDDC

C246
0.1uF

C240
470uF
16V

C257
0.1uF

C264
0.1uF

C275
0.1uF

C281
0.1uF

C2000
0.1uF

C2003
0.1uF

C2005
0.1uF

C2034
0.1uF

C2035
0.1uF

C2036
0.1uF

C2037
0.1uF

C2038
0.1uF

C2039
0.1uF

C2040
0.1uF

C277
0.1uF

C283
0.1uF

C291
0.1uF

C296
0.1uF

Audio Mute
+1.26V_VDDC
C2032
0.1uF

D201
ENKMC2838-T112
A1
AMP_MUTE

C2033
0.1uF

C2041
0.1uF

SB_MUTE

C
A2

ST_AMP_MUTE

+3.3V

+3.3V_VDDP

L210
MLB-201209-0120P-N2

C250
0.1uF

C253
0.1uF

C258
0.1uF

C2026
0.1uF

C248
0.1uF

C259
0.1uF

C2004
0.1uF

+1.8V_DDR

IC100
LGE3369A (SATURN6 NON RM)

F1 RXACKP
F2 RXACKN
G2 RXA0P

CK+_HDMI1
CK-_HDMI1
D0+_HDMI1

G3 RXA0N
H3 RXA1P
G1 RXA1N

D0-_HDMI1
D1+_HDMI1
D1-_HDMI1

H1 RXA2P
H2 RXA2N

D2+_HDMI1
D2-_HDMI1
DDC_SDA_1

A1 DDCD_A_DA
B2 DDCD_A_CK

DDC_SCL_1

A2 HOTPLUG_A

1K

LVA0M
LVA1P
LVA1M
LVA2P
LVA2M
LVA3P
LVA3M
LVA4P

RXE0-

AD15

RXE1+

AF16

C3 RXBCKP
B1 RXBCKN

RXE2+

AE15

RXE2-

AD13
AF14
AF13
AE13

LVA4M

CK-_HDMI2
D0+_HDMI2
D0-_HDMI2
D1+_HDMI2
D1-_HDMI2
D2+_HDMI2

HDMI

D2 RXB1P
D3 RXB1N

LVB1P

E1 DDCD_B_DA
F3 DDCD_B_CK
E2 HOTPLUG_B

DDC_SCL_2
R203

HPD2

1K

CK+_HDMI3
CK-_HDMI3
D0+_HDMI3
D0-_HDMI3
D1+_HDMI3
D1-_HDMI3
D2-_HDMI3
DDC_SDA_3

HDMI_CEC

R285

1K

R204

100

COMP1

R211

RXCCKP

AD9

LVBCKP

RXC0P

LVBCKM

DSUB

DSUB_R
DSUB_G
DSUB_B

0.047uF

C201
C203
C204

1000pF

47

R216

47
47

C205

0.047uF
0.047uF

R244
10K

C202

C206

R245
R218

47

R219

47
47
470

R220
R221

0.047uF
0.047uF
0.047uF

COMP2

COMP2_Y
COMP2_Pb

R223
R224
R225

AE19
AD17
AF18
AF17
AE17

C212
C207

22
22
0.047uF

C213

0.047uF
0.047uF

C208

1000pF

47
47

C214
C215

0.047uF

47
470

C216

0.047uF
0.047uF

C209

1000pF

L9
L10
L11

L13

RXO1-

L14

C230

2.2uF

AE1

C2006

2.2uF

AF3

C2007

2.2uF
2.2uF

AUL1

AE3
AUR2
AUL2 AE2
AA1
AUR3
AB1
AUL3
AB2
AUR4
AC2
AUL4
AB3
AUR5
AC3
AUL5

2.2uF

C2008
C2009
C2011
C2012

2.2uF

C2013

2.2uF

C2014

2.2uF

C2015

VDDC_16

GND_16

VDDC_17

GND_17

VDDC_19

GND_18

VDDC_20

RXOCK+

M11

RXOCK-

M12

M16
M17

SIDE_RIN
SIDE_LIN
AV_RIN
AV_LIN
COMP2_RIN
COMP2_LIN

2.2uF

N4
N9
N10
N11
N12
N13

PC_RIN

C2016

2.2uF

0.1uF

R241

W2

C232

0.1uF

R242

N14

R2 GINM

SIF0P

K3 HSYNC1/DSUB_HSYNC
K2 VSYNC1/DSUB_VSYNC

N17
TUNER_SIF

N18
P4

SIF0M

P9
SPDIF_IN

R282

E9

P10

R230

SPDIF_OUT

V1 RIN2P/COMP_PR+
V2 GIN2P/COMP_Y+
U1 BIN2P/COMP_PB+
V3 SOGIN2

P12
P13
P14

AUOUTL1/SC1_LOUT
AUOUTR2/SC2_ROUT

AF2
AD3
AD1
AC1
AD2

AUOUTL2/SC2_LOUT

J5 VSYNC2

CVBS
TV/MNT

SIDE_CVBS_IN
AV_CVBS_IN

TUNER_CVBS

R206
R226

0.047uF

U3 CVBS1/SC1_CVBS
U2 CVBS2/SC2_CVBS
T1 CVBS3/SIDE_CVBS

0.047uF

T2 VCOM1

0.047uF

M1 CVBS4/S-VIDEO_Y
M2 CVBS6/S-VIDEO_C

C210

0.047uF

47

C211

0.047uF

47
47

C217

R227

47

C218

R207

47

C219

R208

47

C220

0.047uF

R235

47

C2024

0.047uF

R236

47

C2019

0.047uF

R228
R209

100
100

C221

0.047uF

C222

0.047uF

N3 CVBS5
M3 CVBS7
W1 CVBS0/RF_CVBS
Y3 VCOM0
Y2 CVBSOUT0/SC2_MNTOUT
AA2

TP203

CVBSOUT1

P15
P16
P17
P18

VDDC_23

GND_22

VDDC_24

GND_23

VDDC_25

GND_24

VDDC_26

R9

I2S_OUT_WS
I2S_OUT_BCK
I2S_OUT_SD

A8

R231

22

B7

R232

22

C7

R233

22

D8
C8

I2S_IN_SD

R234

22

100

R279

C236
22pF
READY

+3.3V
K4
VCLAMP
REFP
REFM

C223

C233

J4
G4

C235

0.1uF

H4

REXT

AE5
AUVRM
AUVRP

0.1uF

0.1uF
R229

390

R13

MS_SCK
MS_LRCH

R14

GND_27

C239
22pF
READY

R15

0.1uF

AF4

C225

10uF

AD4

C226

0.1uF

C227

1uF
4.7uF

C228

R18
T5
T9
T11
T12

W11
W12
W19
W20
W22
Y22

+3.3V_VDDP

GND_28

VDDP_2
VDDP_3

GND_30

VDDP_4

GND_31

VDDP_5
VDDP_6
VDDP_7

GND_33

H10
H11
H12
N20
P20
W9
W10

VDDP_8
+3.3V_AVDD
L209
MLB-201209-0120P-N2

GND_34
GND_35
GND_36

W7
AVDD_AU
+1.8V_DDR

GND_37
GND_38

G12
AVDD_DDR_1
AVDD_DDR_3

GND_40
GND_41
GND_42
GND_43
GND_44

AVDD_DDR_4
AVDD_DDR_5
AVDD_DDR_6
AVDD_DDR_7
AVDD_DDR_8

GND_45

AVDD_DDR_9

GND_46

AVDD_DDR_10

GND_47

AVDD_DDR_11

G13

AVDD_MEMPLL_1
AVDD_MEMPLL_2

GND_50

AVDD_MEMPLL_3

H15
W14
W15
W16
W17

+3.3V

W18

L205
MLB-201209-0120P-N2

T20

C262

V20

T14
T15
T16
T17
T18
W13
Y21

C269

C285

C273

0.1uF 0.1uF

0.1uF

GND_53

GND_57

0.1uF

H16

GND_51

0.1uF
+3.3V

L207
MLB-201209-0120P-N2

R20
AVDD_LPLL

GND_56

C293

0.1uF

H14

GND_52
GND_54

C284

H13

H17
GND_48
GND_49

+3.3V_AVDD_MPLL
C2030
H7
C255

GND_59
0.1uF

GND_60

C2025
10uF
6.3V

C288

C279

0.1uF

AVDD_MPLL

GND_58

0.1uF

0.1uF

C263
0.1uF

GND_61

+3.3V_AVDD

GND_62

L206
MLB-201209-0120P-N2

J7
AVDD_33_1

T13

AA23

GND_64

AVDD_33_2

GND_65

AVDD_33_3

GND_66

AVDD_33_4

GND_67

AVDD_33_5

K7
L7

C241

M7

0.1uF 0.1uF

C286

C242

0.1uF

N7

+3.3V

GND_68
GND_69
GND_70

L208

W8
AVDD_DM

GND_71
GND_72
GND_73

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

V7
V22

R16
R17

U5

Close to IC
as close as possible

U22

H9
VDDP_1

GND_29

GND_55
C238
22pF
READY

U20

GND_25
GND_26

GND_63
C224

AE4

AUVAG

C237
22pF
READY

R12

MS_LRCK

T10
C234
0.1uF

1%
Check
AUCOM

R11
AUDIO_MASTER_CLK

U7

VDDC_27

R4
R10

I2S_OUT_MCK
R205

GND_21

AVDD_DDR_2

AF1
AUOUTR0/HP_ROUT

T22

VDDC_21

P11

AUOUTR1/SC1_ROUT

T7

VDDC_22

SPDIF_OUT

L1 RIN1P/DSUB_R
L3 GIN1P/DSUB_G
K1 BIN1P/DSUB_B
L2 SOGIN1

R7

GND_19

GND_39

PSU_ERR_DET

100

P7

VDDC_14
VDDC_15

GND_20

N15
N16

VDDC_13

VDDC_18

GND_32

PC_LIN

R1 BIN0P/SC1_B
P3 SOGIN0/SC1_CVBS
47
47

M20

GND_15

M18

C231

K20
L20

M9

COMP1_LIN

W3

J20

VDDC_12

L18

COMP1_RIN

2.2uF
2.2uF

H20

VDDC_10
VDDC_11

RXO3-

M14
C229

H19

VDDC_9

RXO4+

M15

AA3

H18

VDDC_7
VDDC_8

GND_13
GND_14

M10

Y1

D20

VDDC_6

L17

GND_12

RXO4-

AD18

D18
D19

VDDC_5

RXO3+

RXC1N

P1 RINM
T3 BINM

GND_10
GND_11

D17

VDDC_3
VDDC_4

L15

AE9

P2 RIN0P/SC1_R
R3 GIN0P/SC1_G

GND_9

D16

VDDC_2

L16

M13

AUR1

GND_7

VDDC_1

RXO2-

RXC0N

DDCD_C_CK

GND_5
GND_6

RXO2+

RXC1P

AUL0

GND_4

L12

RXO1+

AF8

AUR0

GND_2
GND_3

GND_8

AUDIO OUT

COMP2_Pr

AF20
AF19

AE18

AUOUTL0/HP_LOUT
R222

RXO0-

AD19

F11
R246

DSUB_HSYNC
DSUB_VSYNC

C200

47
47

R217
R243
10K

47

470

R215

F7

AF9

HOTPLUG_C
J3 CEC

R213

LVB4P

RXCCKN

AD7

R214

R212

COMP1_Y
COMP1_Pb

LVB3M

AE8

N2 HSYNC0/SC1_ID
N1 VSYNC0/SC1_FB
COMP1_Pr

LVB3P

E18

RXE4-

AUDIO IN

HPD3

LVB2P
LVB2M

AD8

AF7

DDC_SCL_3

LVB1M

E17

RXE4+

RXO0+

AD20

LVB4M

AE10 RXC2P
AD10 RXC2N
AE7 DDCD_C_DA

D2+_HDMI3

LVB0M

E16

RXE3-

RXECK-

AE20
LVB0P

RXE3+

RXECK+

AD14

LVACKM

C1 RXB0P
C2 RXB0N

E3 RXB2P
D1 RXB2N

D2-_HDMI2
DDC_SDA_2

LVACKP

IC100
+1.26V_VDDC
LGE3369A (SATURN6 NON RM)

RXE1-

AF15

AE14
CK+_HDMI2

C266
0.1uF

RXE0+

AD16

LVDS OUT

R258

HPD1

AE16
LVA0P

C245
0.1uF

C2048
470uF
16V

H8
AVDD_USB

+3.3V
MLB-201209-0120P-N2
C287
C292
L202
MLB-201209-0120P-N2
0.1uF
0.1uF
C2044 C2043
10uF 2.2uF
6.3V 10V

C256

C272

0.1uF

0.1uF

MSD3368EV Platform
AV IN_OUT/LVDS/POWER

10

AV IN_OUT/LVDS/POWER

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

LGE Internal Use Only

DDR2 1.8V By CAP - Place these Caps near Memory


+1.8V_S_DDR

+1.8V_DDR

C342

0.1uF

0.1uF
C341

0.1uF

0.1uF
C340

C337

0.1uF
C339

0.1uF

0.1uF
C338

0.1uF
C334

0.1uF
C332

0.1uF
C336

10uF
C330

0.1uF
C331

0.1uF
C328

0.1uF
C329

0.1uF
C327

C324

0.1uF
C326

10uF
C325

0.1uF

0.1uF

0.1uF

C320

C319

0.1uF

0.1uF

C318

0.1uF

C316

C317

0.1uF
C314

0.1uF

10uF
C315

0.1uF

C313

C312

C310

0.1uF

0.1uF

0.1uF

C308

0.1uF

C307

0.1uF

C306

10uF

C305

C303

C302
0.1uF

C323
0.1uF

C304

L300
MLB-201209-0120P-N2

+1.8V_S_DDR

SDDR_D[6]

DQ6

F1

SDDR_D[7]

DQ7

F9

SDDR_D[8]

DQ8

C8

DQ9

SDDR_D[10]

D7

SDDR_D[11]

DQ11

D3

SDDR_D[12]

DQ12

D1

M7

A2

SDDR_A[2]

N2

A3

SDDR_A[3]

N8

A4

SDDR_A[4]

N3

A5

SDDR_A[5]

N7

A6

SDDR_A[6]

P2

A7

SDDR_A[7]

P8

A8

P3
M2

A10/AP

SDDR_A[10]

P7

A11

SDDR_A[11]

R2

A12

DQ13

D9

SDDR_D[14]

DQ14

B1

SDDR_D[15]

DQ15

B9

VDD5

A1

VDD4

E1

VDD3

J9

VDD2

M9

J8

CK

VDD1

R1

K8

CK

K2

CKE

+1.8V_S_DDR

A9

A0
A1
A2
A3
A4

J2

M8
M3
M7
N2
N8

A5

N3

A6

N7

A7
A8

P2
P8

A9

P3

A10/AP

M2

A11

P7

A12

R2

BA0
BA1
BA2

CK

L1

J8
K8
K2

CS
RAS

DQ0

G2

DQ1

H7

DQ2

H3

DQ3

H1

DQ4

H9

DQ5

F1

DQ6

F9

DQ7

C8

DQ8

C2

DQ9

D7

DQ10

D3

DQ11

D1

DQ12

D9

DQ13

B1

DQ14

B9

DQ15

K9
L8

A1

VDD5

E1

VDD4

J9

VDD3

M9

VDD2

R1

VDD1

A9

VDDQ10

C1

VDDQ9

C3

VDDQ8

CAS

L7

C7

VDDQ7

WE

K3

C9

VDDQ6

E9

VDDQ5

G1

VDDQ4

G3

VDDQ3

G7

VDDQ2

G9

VDDQ1

LDQS
UDQS

LDM
UDM

LDQS
UDQS

K7

B7

A3

VSS5

E8

E3

VSS4

A8

J3

VSS3

N1

VSS2

P9

VSS1

R3

NC1
NC2
NC3

HYNIX 1G

F7

F3

R7

A2
E2
R8

VSSDL

J7

VDDL

J1

B2

VSSQ10

B8

VSSQ9

A7

VSSQ8

D2

VSSQ7

D8

VSSQ6

E7

VSSQ5

F2

VSSQ4

F8

VSSQ3

H2

VSSQ2

H8

VSSQ1

IC300-*2
EDE1116AEBG-8E-F
VREF

J2

A0

M8

A1
A2
A3
A4

M3
M7
N2
N8

A5

N3

A6

N7

A7

P2

A8

P8

A9

P3

A10
A11
A12

BA0
BA1
BA2

M2
P7
R2

G8

DQ0

G2

DQ1

H7

DQ2

H3

DQ3

H1

DQ4

H9

DQ5

F1

DQ6

F9

DQ7

C8

DQ8

C2

DQ9

D7

DQ10

D3

DQ11

D1

DQ12

D9

DQ13

B1

DQ14

B9

DQ15

A1

VDD_5

E1

VDD_4

L2
L3
L1

J9

VDD_3

J8

M9

VDD_2

CK

K8

R1

VDD_1

CKE

K2

A9

VDDQ_10

CK

ODT
CS
RAS

K9

C1

L8
K7

CAS

L7

WE

K3

ELPIDA 1G

C3
C7
C9
E9

LDQS
UDQS

G1

F7

G3

B7

G7
G9

LDM

F3

UDM

B3
A3

LDQS
UDQS

E8

E3
J3

A8

N1
NC_5

R3

NC_6

R7

NC_1

P9

B2

A2

NC_2

E2

NC_3

R8

VSSDL

J7

B8
A7
D2
D8

VDDL

J1

ADDR2_A[7]

SDDR_A[7]
AR302

SDDR_A[0]

ADDR2_A[0]

SDDR_A[2]

ADDR2_A[2]

SDDR_A[4]

ADDR2_A[4]

SDDR_A[6]

56

SDDR_A[11]
SDDR_A[8]

SDDR_A[12]

R320

A13

ADDR2_A[5]

A23

ADDR2_A[6]

C12

ADDR2_A[7]

B23

ADDR2_A[8]

B12

ADDR2_A[8]

ADDR2_A[12] A24

L2

BA0

SDDR_BA[0]

56

R303

ADDR2_BA[0]

C24

L3

BA1

SDDR_BA[1]

56

R304

ADDR2_BA[1]

B24

L1

BA2

SDDR_BA[2]
R351
0
READY
SDDR_CK

56

R305

ADDR2_BA[2]

D24

K9

ODT

L8

CS

/SDDR_CK

22

R306

ADDR2_MCLK

B14

22

R307

/ADDR2_MCLK

A14

ADDR2_CKE

D23

56
R308
SDDR_CKE
READY
+1.8V_S_DDR
R346
4.7K
R347

READY
4.7K

SDDR_ODT 56

C3

K7

RAS

/SDDR_RAS

56

R310

/ADDR2_RAS

C7

L7

CAS

/SDDR_CAS

56

R311

/ADDR2_CAS

D12

C9

K3

WE

/SDDR_WE

56

R312

/ADDR2_WE

D22

E9

VDDQ4

G1
G7

VDDQ1

G9

56

R313

ADDR2_DQS0_P

B18

B7

UDQS

SDDR_DQS1_P

56

R314

ADDR2_DQS1_P

C17

F3

LDM

B3

UDM

SDDR_DQM0_P
SDDR_DQM1_P

56
56

E8

LDQS

SDDR_DQS0_N

56

VSS3

J3

A8

UDQS

SDDR_DQS1_N

56

VSS2

N1

VSS1

P9

R315
R316

B8
A7
D2

VSSQ6

D8

VSSQ5

E7

VSSQ4

F2

VSSQ3
VSSQ2
VSSQ1

ADDR2_DQM0_P

C18

ADDR2_DQM1_P

A19

R318

B17

ADDR2_DQS1_N
AR306

R3

NC4

R7

NC5

ADDR2_D[11]

ADDR2_D[0]

B15

SDDR_D[12]

ADDR2_D[12]

ADDR2_D[1]

A21

SDDR_D[9]
56
AR307

A2

NC1

E2

NC2

R8

NC3

SDDR_D[4]
SDDR_D[3]

J7

SDDR_D[15]
+1.8V_S_DDR

SDDR_D[10]

H2
J1

VDDL

56
AR308

A15
B21

ADDR2_D[4]

ADDR2_D[4]

C21

ADDR2_D[3]

ADDR2_D[5]

C14

ADDR2_D[6]
ADDR2_D[15]

SDDR_D[8]
SDDR_D[13]

ADDR2_D[2]
ADDR2_D[3]

ADDR2_D[1]

SDDR_D[1]
SDDR_D[6]

VSSDL

ADDR2_D[9]
ADDR2_D[14]

ADDR2_D[8]
ADDR2_D[10]
56
AR309

ADDR2_D[13]
ADDR2_D[7]

SDDR_D[7]

VDDQ_9

ADDR2_D[6]

C20

ADDR2_D[7]

C15

ADDR2_D[8]

C16

C19
ADDR2_D[9]
ADDR2_D[10] B16
ADDR2_D[11] B20
ADDR2_D[12] A20
ADDR2_D[13] A16

VDDQ_8
VDDQ_7
VDDQ_6
VDDQ_5
VDDQ_4
VDDQ_3
VDDQ_2
VDDQ_1

SDDR_D[0]

ADDR2_D[0]

SDDR_D[2]

ADDR2_D[2]

SDDR_D[5]

ADDR2_D[5]

VSS_5
VSS_4
VSS_3
VSS_2
VSS_1

VSSQ_10
VSSQ_9
VSSQ_8
VSSQ_7
VSSQ_6

E7

VSSQ_5

F2

VSSQ_4

F8

VSSQ_3

H2

VSSQ_2

H8

VSSQ_1

C335 1000pF

R343
1K
1%
B_DDR2_A6
B_DDR2_A7

A_DDR2_A8

B_DDR2_A8

A_DDR2_A9

B_DDR2_A9

A_DDR2_A10

B_DDR2_A10

A_DDR2_A11

B_DDR2_A11

A_DDR2_A12

B_DDR2_A12

A_DDR2_BA0

B_DDR2_BA0

A_DDR2_BA1

B_DDR2_BA1

A_DDR2_BA2

B_DDR2_BA2

/A_DDR2_MCLK

TDDR_A[3]

TDDR_A[0]

A0

M8

BDDR2_A[1]

TDDR_A[1]

TDDR_A[1]

A1

M3

T25

BDDR2_A[2]

AF23

BDDR2_A[3]

T24

BDDR2_A[4]

AE23

BDDR2_A[5]

R26

BDDR2_A[6]

AD22

BDDR2_A[7]

R25

BDDR2_A[8]

AC22

BDDR2_A[9]

AD23 BDDR2_A[10]
R24

56

BDDR2_A[10]

TDDR_A[10]

AR304
BDDR2_A[5]

TDDR_A[5]
TDDR_A[12]

BDDR2_A[12]
56

BDDR2_A[7]
BDDR2_A[0]

TDDR_A[0]
TDDR_A[2]

BDDR2_A[2]

TDDR_A[4]

BDDR2_A[4]
56

BDDR2_A[6]

BDDR2_A[11]

TDDR_A[7]

AR305

BDDR2_A[11] R325

56

R326

56

/B_DDR2_CAS

N2

TDDR_A[4]

A4

N8

TDDR_A[5]

A5

TDDR_A[6]

A6

N7

TDDR_A[7]

A7

P2

TDDR_A[8]

A8

P8

TDDR_A[9]

A9

P3

TDDR_A[10]

A10/AP

M2

TDDR_A[11]

A11

P7

TDDR_A[6]

A12

R2

BDDR2_BA[0]

R327

56

TDDR_BA[0]

BA0

L2

BDDR2_BA[1]

R328

56

TDDR_BA[1]

BA1

L3

BDDR2_A[8]

BDDR2_MCLK

TDDR_A[12]

TDDR_A[8]

V24

/BDDR2_MCLK

R330

R331

BDDR2_CKE

AB23

R332

BDDR2_ODT

R333

22

22
56
READY
R348
56

U25

/BDDR2_RAS

R334

56

U24

/BDDR2_CAS

R335

56

/BDDR2_WE

R336

56

AB24

A_DDR2_DQS0

B_DDR2_DQS0
B_DDR2_DQS1

AB26

BDDR2_DQS0_P

R337

56

AA26

BDDR2_DQS1_P

R338

56

A_DDR2_DQM0

B_DDR2_DQM0

A_DDR2_DQM1

B_DDR2_DQM1

AC25

BDDR2_DQM0_P

R339

56

AC26

BDDR2_DQM1_P

R340

56

AB25

ADDR2_D[14] B19
ADDR2_D[15] A17

A_DDR2_DQSB0

B_DDR2_DQSB0

A_DDR2_DQSB1

B_DDR2_DQSB1

A_DDR2_DQ0

B_DDR2_DQ0

A_DDR2_DQ1

B_DDR2_DQ1

A_DDR2_DQ2

B_DDR2_DQ2

A_DDR2_DQ3

B_DDR2_DQ3

A_DDR2_DQ4

B_DDR2_DQ4

A_DDR2_DQ5

B_DDR2_DQ5

A_DDR2_DQ6

B_DDR2_DQ6

A_DDR2_DQ7

B_DDR2_DQ7

A_DDR2_DQ8

B_DDR2_DQ8

A_DDR2_DQ9

B_DDR2_DQ9

A_DDR2_DQ10

B_DDR2_DQ10

A_DDR2_DQ11

B_DDR2_DQ11

A_DDR2_DQ12

B_DDR2_DQ12

A_DDR2_DQ13

B_DDR2_DQ13

A_DDR2_DQ14

B_DDR2_DQ14

A_DDR2_DQ15

B_DDR2_DQ15

BDDR2_DQS0_N

AA25

BDDR2_DQS1_N

R341

56

TDDR_ODT
4.7K
READY
4.7K
R349

/TDDR_RAS
/TDDR_CAS

R342

56

BDDR2_D[0]

BDDR2_D[11]

TDDR_D[11]

AE26

BDDR2_D[1]

BDDR2_D[12]

TDDR_D[12]

W24

BDDR2_D[2]

BDDR2_D[9]

AF24

BDDR2_D[3]

BDDR2_D[14]

AF25

BDDR2_D[4]

BDDR2_D[4]

V26

BDDR2_D[5]
BDDR2_D[6]
BDDR2_D[7]

AD25
Y25

BDDR2_D[8]
BDDR2_D[9]
BDDR2_D[10]

AE24 BDDR2_D[11]
AD26 BDDR2_D[12]
Y24

TDDR_D[0]

DQ1

TDDR_D[1]

H7

DQ2

TDDR_D[2]

H3

DQ3

TDDR_D[3]

H1

DQ4

TDDR_D[4]

H9

DQ5

TDDR_D[5]

F1

DQ6

F9

DQ7

C8

DQ8

C2

DQ9

D7

DQ10

TDDR_D[10]

D3

DQ11

TDDR_D[11]

D1

DQ12

TDDR_D[12]

D9

DQ13

TDDR_D[13]

B1

DQ14

TDDR_D[14]

B9

DQ15

A1

VDD5

E1

VDD4

TDDR_D[8]
TDDR_D[9]

TDDR_D[15]
+1.8V_S_DDR

J8

J9

VDD3

CK

K8

M9

VDD2

K2

R1

VDD1

ODT

K9

CS

L8

A9

VDDQ10

C1

VDDQ9

C3

VDDQ8

C7

VDDQ7

C9

VDDQ6

E9

VDDQ5

G1

VDDQ4

G3

VDDQ3

G7

VDDQ2

G9

VDDQ1

CK

TDDR_D[6]
TDDR_D[7]

K7

CAS

L7

WE

K3

LDQS

F7

UDQS

B7

TDDR_DQS1_P
LDM

F3

UDM

B3

QIMONDA 512M

TDDR_DQM1_P
LDQS

E8

A3

VSS5

UDQS

A8

E3

VSS4

J3

VSS3

NC4

N1

VSS2

L1

P9

VSS1

B2

VSSQ10

B8

VSSQ9

A7

VSSQ8

D2

VSSQ7

TDDR_DQS1_N

NC5

R3

NC6

R7

NC1

A2

TDDR_D[9]

IC301-*1
H5PS5162FFR-S6C

AE25
W26
Y26

DQ0

G2

CKE

/TDDR_WE

AR310

W25

G8

TDDR_CKE

RAS

/B_DDR2_WE

A_DDR2_DQS1

N3

AB22
V25

U26

/B_DDR2_RAS

M7

A3

AC24

B_DDR2_ODT

/A_DDR2_CAS

A2

TDDR_A[3]

AC23

AE22 BDDR2_A[12]

B_DDR2_CKE

/A_DDR2_RAS

TDDR_A[2]

TDDR_A[11]

B_DDR2_MCLK

/B_DDR2_MCLK

A18

ADDR2_DQS0_N

SDDR_D[11]

F8
H8

A_DDR2_A6
A_DDR2_A7

BDDR2_A[3]

BDDR2_A[1]

TDDR_DQS0_N
R317

SDDR_D[14]

VSSQ7

B_DDR2_A5

BDDR2_A[0]

AF26

TDDR_DQM0_P

E3

VSSQ8

TDDR_A[9]

T26

TDDR_DQS0_P
SDDR_DQS0_P

A3

B2

A_DDR2_A5

/A_DDR2_WE

LDQS

VSS4

VSSQ9

B_DDR2_A3
B_DDR2_A4

D13

F7

VSS5

VSSQ10

A_DDR2_A3
A_DDR2_A4

A_DDR2_ODT

C1

G3

B_DDR2_A2

D14

ADDR2_ODT

VDDQ5

VDDQ2

A_DDR2_A2

A_DDR2_CKE

VDDQ6

VDDQ3

B_DDR2_A0
B_DDR2_A1

A_DDR2_MCLK

VDDQ7

QIMONDA 1G

A_DDR2_A0
A_DDR2_A1

+1.8V_S_DDR

R309

1%

R345
1K
ADDR2_A[4]

ADDR2_A[9]
ADDR2_A[10] B22
ADDR2_A[11] A12

ADDR2_A[11]

56

B13
C22

C23

ADDR2_A[6]
R319 56

C333 0.1uF

1000pF

C311

R321

1K 1%
1%
0.1uF
1K

R322
ADDR2_A[12]

SDDR_A[12]

ADDR2_A[2]
ADDR2_A[3]

VDDQ8

B3

NC5
NC6

A22

VDDQ9

L2
L3

CK
CKE

ODT

G8

C13

ADDR2_A[1]

J2

AR303
BDDR2_A[9]

ADDR2_A[0]

ADDR2_A[9]

IC300-*1
HY5PS1G1631CFP-S6
VREF

A_MVREF

ADDR2_A[3]
ADDR2_A[1]
ADDR2_A[10]

AR301

SDDR_A[9]

C309

1K 1%

ADDR2_A[5]

56

56

SDDR_A[9]

SDDR_A[8]

A9

SDDR_D[13]

VDDQ10

R302 1K 1%
SDDR_A[10]

SDDR_A[5]
SDDR_A[3]

C2

DQ10

SDDR_A[1]

SDDR_A[1]

ADDR2_D[0-15]

SDDR_D[9]

SDDR_A[0]

A1

VREF

TDDR_D[0-15]

H9

A0

M3

TDDR_A[0-12]

DQ5

M8

R344
150

SDDR_D[5]

J2

READY

H1

IC301
HYB18TC512160B2F-2.5

D15

BDDR2_A[0-12]

H3

DQ4

IC100
LGE3369A (Saturn6 Non RM)

BDDR2_D[13]
AD24 BDDR2_D[14]
AA24 BDDR2_D[15]

TDDR_D[14]
AR311

BDDR2_D[0-15]

H7

DQ3

AR300

ADDR2_A[0-12]

G2

DQ2

SDDR_D[3]
SDDR_D[4]

SDDR_A[0-12]

DQ1

SDDR_D[2]

150
R300

G8

SDDR_D[1]

+1.8V_S_DDR

VREF

READY

SDDR_D[0-15]

DQ0

C301

C300 1000pF

IC300
HYB18TC1G160C2F-2.5
SDDR_D[0]

0.1uF

R301

+1.8V_S_DDR

56

BDDR2_D[3]

TDDR_D[4]
TDDR_D[3]

BDDR2_D[1]

TDDR_D[1]

NC2

E2

NC3

R8

VREF

J2

A0

M8

A1
A2
A3
A4

BDDR2_D[15]
BDDR2_D[8]

TDDR_D[6]

ODT
CS
RAS

BDDR2_D[10]

TDDR_D[10]
TDDR_D[13]

L7
K3

VSSDL

D8

VSSQ6

E7

VSSQ5

D3
D1
D9
B1
B9

A1
J9
M9
R1

A9
C1
C3
C7
E9
G1
G3
G7
G9

A3
E3

F2

VSSQ4

R3

NC1
NC2
NC3

+1.8V_S_DDR

J7

F8

VSSQ3

H2

VSSQ2

N1
P9

B2

A2

B8

E2

A7

R8

H8

VSSQ1

VSSDL

J7

VDDL

J1

D2

TDDR_D[7]

VDDL

J1

VREF

DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

VDD5
VDD4
VDD3
VDD2
VDD1

VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1

VSS5
VSS4
VSS3
VSS2
VSS1

VSSQ10
VSSQ9
VSSQ8
VSSQ7
VSSQ6
VSSQ5
VSSQ4

F8

VSSQ3

H2

VSSQ2

H8

VSSQ1

G8

J2

G2

A1

A4
A5
A6

H3

M3

H1

M7

H9

N2

F1
F9

N3

C8

N7
P2
P8

A9

P3

A11

H7

M8

N8

A7
A8
A10

C2
D7
D3
D1

M2

D9

P7

A12

R2

BA0

L2

B1
B9

BA1

L3

CK

J8

J9

K8

M9

K2

R1

A1
E1

CK
CKE

ODT

K9

CS

L8

RAS

K7

CAS
WE

L7

A9
C1
ELPIDA 512M

C3
C7

K3

C9
LDQS

F7

UDQS

B7

E9
G1
G3
G7

LDM
UDM

LDQS

F3

G9

NC_5
NC_6

NC_1

A3

E8

E3

A8

N1

L1

P9

R3

DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

VDD_5
VDD_4
VDD_3
VDD_2
VDD_1

VDDQ_10
VDDQ_9
VDDQ_8
VDDQ_7
VDDQ_6
VDDQ_5
VDDQ_4
VDDQ_3
VDDQ_2
VDDQ_1

VSS_5
VSS_4
VSS_3
VSS_2
VSS_1

R7
B2

A2

NC_2

E2

NC_3

R8

VSSDL

J7

B8
A7
D2
D8
E7
F2

VDDL

DQ0

B3

J3
NC_4

TDDR_D[5]

DQ2

E7
F2

IC301-*2
EDE5116AJBG-8E-E

A0

TDDR_D[2]
56

D7

E8
A8

L1
R7

UDQS

BDDR2_D[5]

C2

C9

TDDR_D[0]

BDDR2_D[2]

C8

HYNIX 512M

F7
B7

F3
B3

NC5

A3

BDDR2_D[0]

F9

K9
L8
K7

WE

NC4
NC6

A2

56

DQ1

F1

L3

J8
K8
K2

CAS

LDM
UDM

LDQS

D8

BDDR2_D[13]
AR313

DQ0

G2

H9

P7
R2

L2

E1
CK
CK
CKE

LDQS
UDQS

J3

TDDR_D[15]
TDDR_D[8]

BDDR2_D[7]

G8

H1

P2
P8
P3
M2

BA1

H3

N2
N8
N3
N7

A7
A8
A9
A11
A12

BA0

H7

M3
M7

A5
A6

A10/AP

UDQS

56
AR312

BDDR2_D[6]

J1

VSSQ_10
VSSQ_9
VSSQ_8
VSSQ_7
VSSQ_6
VSSQ_5
VSSQ_4

F8

VSSQ_3

H2

VSSQ_2

H8

VSSQ_1

56
IC300-*3

IC301-*3

K4T1G164QE-HCE7
VREF

J2

A0

M8

A1

M3

A2

M7

A3

N2

A4

N8

A5

N3

A6

N7

A7
A8

P2
P8

A9

P3

A10/AP

M2

A11

P7

A12

R2

BA0

L2

BA1

L3

BA2

L1

CK

J8

CK
CKE

K4T51163QG-HCE7

G8

DQ0

G2

DQ1

H7

DQ2

H3

DQ3

H1

DQ4

H9

DQ5

F1

DQ6

F9

DQ7

C8

DQ8

C2

DQ9

D7

DQ10

D3

DQ11

D1

DQ12

D9

DQ13

B1

DQ14

B9

DQ15

A1

VDD_5

E1

VDD_4

J9

VDD_3

CK

J8

J9

M9

VDD_2

CK

K8

M9

R1

VDD_1

A9

VDDQ_10

C1

VDDQ_9

VREF

J2

A0

M8

A1

M3

A2

M7

A3

N8
N3

A6

N7

A7
A8

P3
M2

A11
A12

BA0

K8

BA1

CS

K9
L8

C3

VDDQ_8

L7

C7

VDDQ_7

WE

K3

C9

VDDQ_6

E9

VDDQ_5

G1

VDDQ_4

G3

VDDQ_3

G7

VDDQ_2

G9

VDDQ_1

K7

F7
B7

LDM

F3

UDM

LDQS

DQ0
DQ1

H7

DQ2

H3

DQ3

H1

DQ4

H9

DQ5

F1

DQ6

F9

DQ7

C8

DQ8

D7
D3
D1
D9

P7

B1

R2

B9

L3

A1
E1

CKE

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

L2

SS 1G

CS
RAS

R1

K2

VDD_5
VDD_4
VDD_3
VDD_2
VDD_1

K9
A9

L8

C1

K7

CAS

L7

WE

K3

SS 512M

C3
C7
C9

LDQS
UDQS

F7
B7

E9
G1
G3
G7

LDM

F3

UDM

B3

G9

VDDQ_10
VDDQ_9
VDDQ_8
VDDQ_7
VDDQ_6
VDDQ_5
VDDQ_4
VDDQ_3
VDDQ_2
VDDQ_1

B3
A3

VSS_5

E8

E3

VSS_4

A8

J3

VSS_3

N1

VSS_2

P9

VSS_1

B2

VSSQ_10

B8

VSSQ_9

A7

VSSQ_8

D2

VSSQ_7

D8

VSSQ_6

NC_5

R3

NC_6

R7

NC_1

G2

K2

CAS

UDQS

UDQS

G8

C2

P2
P8

A9
A10/AP

ODT
ODT
RAS

LDQS

N2

A4
A5

A2

NC_2

E2

NC_3

R8

VSSDL

J7

VDDL

J1

E7

VSSQ_5

F2

VSSQ_4

F8

VSSQ_3

H2

VSSQ_2

H8

VSSQ_1

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

LDQS
UDQS

E8

A3

A8

E3
J3

NC_4

L1

NC_5

R3

NC_6

R7

NC_1

A2

NC_2

E2

NC_3

R8

N1
P9

B2
B8
A7
D2
D8

VSSDL

J7

VDDL

J1

VSS_5
VSS_4
VSS_3
VSS_2
VSS_1

VSSQ_10
VSSQ_9
VSSQ_8
VSSQ_7
VSSQ_6

E7

VSSQ_5

F2

VSSQ_4

F8

VSSQ_3

H2

VSSQ_2

H8

VSSQ_1

MSD3368EV Platform
DDR2

10

DDR2

Copyright 2010 LG Electronics Inc. All rights reserved.


Downloaded
from
www.Manualslib.com
manuals search engine
Only for training and
service
purposes

LGE Internal Use Only

5V_HDMI1

R612
0

SHIELD

C600
0.1uF
16V

5V_HDMI1

DDC_SDA_1

15

DDC_SCL_1

+5V_ST

A1

16

A2

17

1K

R600

18

READY

19

1K R615

HPD1

20

IC600

ENKMC2838-T112
D600
C

AT24C02BN-10SU-1.8

14

8
7
6
5
4
3
2
1

C603
0.1uF

CK+_HDMI1

A2

D0-

R623
GND

5V_HDMI2

22

DDC_SCL_1

5V_HDMI3

5V_HDMI_2

5V_HDMI_1

18K

SCL

D0-_HDMI1
D0_GND
D0+

R629

R626
18K

5V_HDMI_3

R663
33K

WP

R662
10K

5V_HDMI1

VCC

R660
10K

R661
33K

CK+

R664
10K

A1

R665
33K

EAG59023302

CK-_HDMI1

12
11
10

A0

CEC_REMOTE

13

SDA
R621

D0+_HDMI1

22

DDC_SDA_1

D1D1-_HDMI1
D1_GND
D1+
D1+_HDMI1
D2D2-_HDMI1
D2_GND
D2+
D2+_HDMI1

UI_HW_PORT1

GND
JK600

5V_HDMI2

R613
0
HPD2

5V_HDMI2 +5V_ST

IC602
AT24C02BN-10SU-1.8

16

DDC_SDA_2

15

DDC_SCL_2

ENKMC2838-T112
D602
A0

A1

14

VCC

17

1K

R601

18

A2

C601
0.1uF
16V

1K R616

19

READY

20

C607
0.1uF

WP

CEC_REMOTE

13

A2

CK-_HDMI2

12

7
6

4
3
2
1

18K

DDC_SCL_2
22

SDA
DDC_SDA_2
R642

D0-

22

D0-_HDMI2
D0_GND
GND

D0+
D0+_HDMI2
D1D1-_HDMI2

+3.3V_HDMI_ST

D1_GND
D1+
D1+_HDMI2
R632

D2D2-_HDMI2

R637
READY

CK+_HDMI2

R649

330K

D2_GND
D2+
R624
0
READY

D2+_HDMI2

D605
30V

MMBD301LT1G

EAG59023301

GND

CK+

R646
18K

SCL
R645

11
10

A1

SHIELD

R659
0

CEC_REMOTE

S
D604
READY

UI_HW_PORT2
JK601
GND

27K

HDMI_CEC

BSS83
Q600
READY

SIDE HDMI
5V_HDMI3
5V_HDMI3 +5V_ST

C605
0.1uF
16V

17

A2

DDC_SDA_3

16

A0
DDC_SCL_3

15

A1

14

VCC
C608
0.1uF

WP

8
7
6
5
4
3
2
1

R650

SCL
DDC_SCL_3
R643

R648
18K

18K
A2

CK-_HDMI3

12
EAG42463001

CEC_REMOTE

13

11
10

A1
ENKMC2838-T112
D603

IC603
AT24C02BN-10SU-1.8

1K

R631

18

HPD3

19

READY

20

1K R638

R636
0

JACK_GND

GND

CK+
CK+_HDMI3

SDA
DDC_SDA_3
R644

D0-

22

22

D0-_HDMI3

D0_GND

GND

D0+
D0+_HDMI3

D1-

D1-_HDMI3

D1_GND
D1+

D1+_HDMI3

D2-

D2-_HDMI3

D2_GND
D2+

D2+_HDMI3

UI_HW_PORT4
GND
JK603

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

MSD3368EV Platform
HDMI

10

HDMI

Copyright 2010 LG Electronics Inc. All rights reserved.


Downloaded
from
www.Manualslib.com
manuals search engine
Only for training and
service
purposes

LGE Internal Use Only

Audio Amp
AVSS

18

PDN

19
20

SCLK

21

SDIN

22

R708
22

22K

2200pF

1uF
16V

C730

C703

24

C742
100uF
25V

C743
100uF
25V

C744
100uF
25V
READY

P_17V

PGND_AB_2

47

PGND_AB_1

L705
2S AD-9060 2F

46

OUT_B

1S

45

PVDD_B_2

44

PVDD_B_1

43

BST_B

42

BST_C

41

PVDD_C_2

1F

C704
0.1uF
C740
0.68uF

EAP61008401

C726
0.1uF

50V
C732
0.033uF
0.01uF
C701

C725
0.01uF

SPK_L+

R704
3.3
R705
3.3
C727
0.01uF
@netLa

SPK_LWAFER-ANGLE

40

PVDD_C_1

39

OUT_C

38

PGND_CD_2

37

PGND_CD_1

SPK_L+
50V
0.033uF
C729

L704
2S AD-9060 2F
1S

1F

EAP61008401

C717
0.1uF
C739
0.68uF
C710
0.1uF

SPK_R+

C734
0.01uF

SPK_L-

R709
3.3
R719
3.3
C715
0.01uF

SPK_R+

SPK_R-

1
P700

@netLa

SPK_R-

OUT_D

PVDD_D_2

PVDD_D_1

VREG

BST_D

GVDD_OUT_2

AGND

GND

DVSS_2

DVDD

STEST

C741
100uF
25V
READY

23

RESET

C775
100uF
25V

48

SDA1
SCL1

C721
100uF
25V

OUT_A

PVDD_A_1

PVDD_A_2

BST_A

SSTIMER

GVDD_OUT_1

OC_ADJ

C735
0.1uF

10

NC

C714
0.1uF

36

SCL

35

SDA

R703
22

34

R706
22

33

LRCLK

TAS5709PHPR
IC701

32

MS_LRCK
MS_SCK
MS_LRCH

17

31

R711
READY 33K

PLL_FLTM

0
Q701
2SC3052

10K

C722
4.7uF
10V

16

VR_DIG

30

R710

C718
0.1uF

+3.3V_DVDD

15

29

C
R716 B

C712
1000pF
50V

DVSS_1

28

R725
10K

AMP_MUTE

OSC_RES
18K
R714

R712
1K

+3.3V_AVDD_AMP
120-ohm

L701

14

25

AC_DET

L702
P_17V

13

27

1%

+3.3V

PLL_FLTP

VR_ANA
R713
200

R702
22

11

12
MCLK

26

TESTOUT

C728
0.1uF

AVSS

C733
0.033uF
50V

120-ohm

AVDD

AUDIO_MASTER_CLK

R715
470

470

+3.3V_AVDD_AMP

C723
10uF 16V

+3.3V

R707

R718

0.047uF

Separate DGND AND AVSS

C713

C736

C720

4700pF

0.047uF

AVSS
C702
AVSS

AVSS

R717
0

4700pF

This parts are Located


on AVSS area.

P_17V

+3.3V_DVDD

C738

AMP_RST

0.033uF
50V

C737
0.1uF
C711
10uF 16V

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

C719 C706
0.1uF 0.1uF

1uF
16V

C708

C709
1000pF

C707
0.1uF

MSD3368EV Platform
AUDIO

10

AUDIO

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

LGE Internal Use Only

POWER B/D

P800
SMAW200-H18S1

P_17V

L801
MLB-201209-0120P-N2

10

11

12

13

14

15

16

17

18

C817
100uF
25V

L800
C813
MLB-201209-0120P-N2
10uF
16V

C804
470uF
16V

C820
0.1uF

R804
0

C809
16V
0.1uF
READY

R801
100
C805
0.1uF
16V

READY

+5V_ST

R803
100

R838
10K

+5V_ST

C890
10uF
6.3V
READY

P_+5V
L817

R856
10K
READY

C837
10uF
16V

C862
10uF
16V

Q806
SI4925BDY

R834
10K

C835
C834
100uF
0.1uF
16V
AC_DET

C839
10uF
6.3V
READY

R835
Q803
2SC3052

RL_ON/PWR_ONOFF

C865
0.1uF
16V

L808
S1

D1_2

G1

D1_1

S2

D2_2

G2

D2_1

+5V_ST

C864
10uF
16V

C857
220uF
16V
+5V_GENERAL

C866
0.1uF
16V

C858
220uF
16V

560
C

C812
16V
0.1uF
R828
120K
READY

19

MODULE_ON

+5V_ST

0.1uF

PSU_ERR_DET

+5V_ST
R837
2K
RL_ON/PWR_ONOFF

+5V

P_+5V

C854

+5V

C818
0.1uF
50V

R829
10K
E

C807
0.1uF
16V

+3.3V_TU

L806
MLB-201209-0120P-N2
C826
0.1uF
16V

Stand-by +3.3V

+3.3V_CI

AP2121N-3.3TRE1
VIN

C829
10uF
16V

1
C803
0.1uF
16V

C802
10uF
16V

C806
10uF
16V

GND

C892
10uF
6.3V
READY

+3.3V_HDMI_ST

C808
0.1uF
16V

$0.122
1

40 mA

L814
MLB-201209-0120P-N2

OUTPUT

ADJ/GND

C815
0.1uF
16V

VOUT

MAX 3A
3

R858
0

R866
0

IC802

INPUT

+3.3V_AVDD_MPLL

+3.3V_ST

C828
68uF
10V

GND

IC804
AZ1085S-3.3TR/E1
+3.3V_ST
+5V_ST

C885
0.1uF
16V

+5V

C852
0.1uF
16V

C831
0.1uF

+3.3V

GND
650 mA

R859
0
0
R862

C816
0.1uF
16V

C850
10uF
6.3V

S6 core 1.26 volt

+3.3V_AVDD
320 mA
+3.3V_AVDD

+5V

+3.3V_AVDD

50 mA

IC803

+5V_GENERAL
+1.8V_TU

R865
0

AP1117E18G-13
IN

IC801
AP1117E33G-13

OUT

ADJ/GND

C888
10uF
6.3V

READY

1
2
OUT

10uF

C801
0.1uF
16V

ADJ/GND

465 mA @85% efficiency

L805

2
C814
0.1uF
16V

C810

IN

C842
100uF
16V

C891
10uF
6.3V
READY

GND

GND

C800
10uF
6.3V

C844
0.1uF

C897
220uF
6.3V

C811
0.1uF
16V

C822
10uF
6.3V
READY

C889
10uF
6.3V

C827
0.1uF
16V
READY

C824
0.1uF
16V

C825
100uF
16V

P_+5V

10K

READY
R827

C841
100uF
16V

MAX 3A

R831

Replaced Part

L802
MLB-201209-0120P-N2

+1.26V_VDDC
C899 READY
0.1uF

10K
R2 = R1/(Vout/0.8-1)

16V

READY
50V
100pF
C870

450 mA

+1.8V_DDR

+3.3V

IC805
MP2212DN
R1

1%
R825
620K

R864
0

AZ1085S-ADJTR/E1
INPUT

R824
360K

OUTPUT

TP1451

FB

+1.8V_DDR

IC800

EN/SYNC

1600 mA
L813
3.6uH

R2
GND

1%

SW_2

ADJ/GND

C883
0.1uF
16V

R861
75

C893
10uF
6.3V

C880
10uF
6.3V
READY

1/4W

NR8040T3R6N
IN

Placed on SMD-TOP
C877
0.1uF
16V

BS
C838
10uF
16V

C OUT

SW_1
C843
10uF
6.3V

1
C878
10uF
6.3V

R802
0

VCC

C894
10uF
6.3V

C856
0.1uF

C830
0.01uF
50V

C898
10uF
16V

C896
10uF
6.3V
READY

1%

R860
33

1%
R830
10
1%

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

C836
1uF
10V

MSD3368EV Platform
POWER

10

POWER

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

LGE Internal Use Only

REAR CVBS

JK900

SIDE CVBS

PPJ237-01

C900
100pF
50V

D902
5.6V

R901
470K

C901
100pF
50V

R915
12K

10K
AV_LIN

4A

[YL1]CONTACT

5A

[YL1]O-SPRING

6A

[YL1]E-LUG

R916
12K

C906
47pF
50V

R910
75

AV_DET

C909
0.1uF
16V

D915
30V

R917
0
D900
30V

R940
10K

+3.3V_AVDD
R909

4A

[YL]O-SPRING

3A

[YL]CONTACT

4B

[WH]O-SPRING

3C

[RD]CONTACT

4C

[RD]O-SPRING

5C

[RD]E-LUG

SIDE_CVBS_IN

+3.3V_AVDD
D931
30V

C916
47pF
50V

R937
75

R973
1K
C911
0.1uF
16V

C913
100pF

SIDE_CVBS_DET

PPJ235-01
R933
10K

JK902

AV_CVBS_IN

SIDE_LIN
12K

[WH1]O-SPRING

10K
AV_RIN

R900
470K

R932

5B

R908

D901
5.6V

R963
10K

4C

[RD1]CONTACT

R938
0

470K

[RD1]O-SPRING

[YL]E-LUG

D919
30V

5C

5A

D922

[RD1]E-LUG

R923

6C

SIDE_RIN
12K

C912
100pF

COMP1_RIN

4H

[RD2]CONTACT

5G

[WH2]O-SPRING

5F

[RD2]O-SPRING_1

7F

[RD2]E-LUG-S

D909

R904
470K

C904
1000pF
50V

D911

R905
470K

C905
1000pF
50V

10K

R925
12K

R914
COMP1_LIN

5M

[WH3]O-SPRING

USB

L901

IC902
NL17SZ08DFT2G

0.1uF

R991
10K

IN_2

READY

EN

R999
10K

IN_1

R944
100

USB_CTL

AC_DET

USB_DM

USB_OCD

USB_DP
D932
D933
CDS3C05HDMI1 CDS3C05HDMI1
5.6V
5.6V

D910
30V

GND

C927

1%

R927
75

1%

R929
75

R907
10K

COMP1_DET

READY

D914

READY

R936
1K

R911
COMP2_RIN

[RD3]CONTACT

[RD3]O-SPRING_2

R970
2

5N
4N

KJA-UB-4-0004
JK905

6N

[RD3]E-LUG

COMP1_Y

[GN2]E-LUG

R939
0

+3.3V_AVDD

6D

FLG

1%

[GN2]O-SPRING

C934
470uF
16V

COMP1_Pb

R928
75

[GN2]CONTACT

5D

OUT_1

D913

4D

P_+5V

+3.3V_CI

IC900
AP2191SG-13
NC

OUT_2

USB DOWN STREAM

[BL2]E-LUG-S

SWITCH ADDED

R992
10K

[BL2]O-SPRING

R926
12K
COMP1_Pr

READY

D912

7E

10K

READY

5E

COMP1

R913

R931

[RD2]O-SPRING_2

470K

[RD2]E-LUG

5H

R922

6H

D921

R930
10K

D903

C902
1000pF
50V

R902
470K

10K

R918
12K

COMP2

R912
COMP2_LIN

10K

R919
12K
+5V_GENERAL +5V_GENERAL

IC901
NL17SZ00DFT2G

SPDIF_OUT

GND

1%

R921
75

READY

R964
1K
READY

VCC

COMP2_Pb
Y

JK904

R998
100

JST1223-001

READY
R997
0

R935
0

GND

COMP2_Y

VCC
READY

1%

D934
C926
0.1uF
50V

VINPUT

R924
75

+3.3V_AVDD
R906
10K

D907

READY

6J

[GN3]E-LUG

D908

5J

[GN3]O-SPRING

D904
30V

[GN3]CONTACT

READY

4J

Fiber Optic

[BL3]E-LUG-S

READY

7K

OPTIC

COMP2_Pr

D906

[BL3]O-SPRING

C903
1000pF
50V

R903
470K

5K

D905

1%

[RD3]E-LUG-S
R920
75

[RD3]O-SPRING_1

7L

READY

5L

R934
1K
COMP2_DET

FIX_POLE

GND

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright 2010 LG Electronics Inc. All rights reserved.
Downloaded
from
www.Manualslib.com
manuals search engine
Only for training and
service
purposes

MSD3368EV Platform
JACK

10

LGE Internal Use Only

D1008

GND_2

11

GREEN
BLUE_GND

R1016
10K

BLUE
NC

V_SYNC

14

R1019
1K

GND_1

READY

D1009
30V

DDC_GND

16

SHILED

R1024
4.7K

C1022
0.1uF

R1029
4.7K

R1023
R1032
0
DDC_SCL/UART_RX
R1033
0
DDC_SDA/UART_TX
C1018
18pF
50V

DSUB_DET

DDC_CLOCK

15

100

C1014
4.7pF

SYNC_GND

10
5

DSUB_G

+3.3V_AVDD

H_SYNC

13

DDC_SDA/UART_TX

R1017
22

DDC_DATA

12
8

ENKMC2838-T112
D1012

RED
GREEN_GND

7
2

IC1001
AT24C02BN-10SU-1.8

C1015
4.7pF

RED_GND

6
1

DSUB_R

A1

+5V_VGA +5V_ST

R1018
22

C1001
0.1uF
16V

A2

D1007

D1004

D1003

D1002

+5V_VGA
JK1001
SPG09-DB-010

C1021
18pF
50V

ISP_RXD

C1013
0.1uF
16V

ISP_TXD

R1015
22

C1016
12pF

R1013
1K

C1017
12pF

C1012
4.7pF
R1014
1K

PC AUDIO

DSUB_B

JK1000
PEJ027-01

DSUB_HSYNC

DSUB_VSYNC

E_SPRING

6A

T_TERMINAL1

7A

B_TERMINAL1
PC_RIN

R_SPRING

T_SPRING

D1010

C1020
100pF
50V

5.6V

R1028
10K
R1022
470K

R1027
12K

DDC_SCL/UART_RX
R1010
75

R1007
75

R1005
75

GND

R1011
4.7K

R1012
4.7K

LVDS FFC WAFER

LVDS

7B

B_TERMINAL2

6B

T_TERMINAL2

PC_LIN
C1019
100pF
50V

D1011
5.6V

R1026
10K
R1021
R1025
470K
12K

P401
SMAW200-H26S1

ROM DOWNLOAD FOR PDP

52
51
PC_SER_CLK

50

PC_SER_DATA

49

PDP_SCL

48
MOD_ROM_RX

MOD_ROM_TX

47
PDP_SDA

C1004
220pF
50V
READY

R442
27K
READY

46
45
44

10

RXO0-

11

12

RXO0+

RXO1-

13

14

RXO1+

RXO2-

15

16

RXO2+

RXOCK-

17

18

RXOCK+

RXO3-

19

20

RXO4-

21

22

RXO4+

23

24

PC_SER_DATA

25

26

R407

100

PDP_SCL

PDP_SDA

43

100

42

D1001

41
RXO0-

PC_SER_CLK

RXO0+
RXO1RXO1+
RXO2RXO2+

40
39
38
37
36
35

PC_SER_CLK

34
RXOCK-

RS232C

RXOCK+

RXO3+
C1009
0.1uF
50V

RXO4-

C1+

RXE0RXE0+
RXE1-

RXE2-

16

15

14

13

12

11

10

RXE1+

VCC

GND

DOUT1

RIN1

ROUT1

DIN1

DIN2

RXE2+
ROUT2

SUB Board I/F


P402
12507WS-12L

R402

27

30

L405
MLB-201209-0120P-N2

+3.3V_ST

28
27

R408
10K

FHD

R409
10K

RXECK-

+3.3V_ST

RXECK+

C401
L401
10pF
MLB-201209-0120P-N2

23
22

C1027
10pF
READY

21
20

SUB_SDA
16
+5V

C1028
10pF
READY

+3.3V_ST

R1006
100

R1008
100

PC_SER_DATA

C1030
10pF
50V
READY

0 READY
SUB_SDA

RXE3+
RXE4RXE4+

D1005 READY
30V

14
13
12
11

LED_B

10

+3.3V

DBG_TX
9

DBG_RX
C1005
C1006

220pF
220pF

D1006 READY
30V

50V

50V
6
5

JK1002
SPG09-DB-009

MOD_ROM_TX

10

MOD_ROM_RX

4
3

6
R1035
22

KEY_BUZZER

R1036
22
B

BU400
PKM13EPY-4002-B0

9
R405
0

10
C400
10uF
6.3V

+3.3V_ST
READY

R1040
C1031
10pF
50V
READY

R445 4.7K

READY

RXE3-

C404
10pF

R1034
C102922
10pF
READY

17

L408
NORMAL

0 READY
SUB_SCL

C405
10pF

SUB_SCL

19

100V
READY

PC_SER_CLK

D1015
READY

3
C406
10pF

KEY2

24

15
R1039

R1004
4.7K

L404
MLB-201209-0120P-N2

C402
L403
10pF MLB-201209-0120P-N2

+3.3V

READY

R1002
4.7K

C407
10pF

C403
680pF

KEY1

18
C1011
0.1uF
50V

IR

29

LED_R

$0.179

MAX3232CDR

D1014
READY

R404
27K
READY

32

HD

25

V+

C1-

C2-

V-

C2+

DOUT2

RXO4+

IC1000

R1038
10

DISP_EN

RXO3+

26

RIN2

C1010
0.1uF
50V

R1037
10

R403

READY
RXO3-

C1008
0.1uF
50V

33

31

+3.3V_ST

C1007
0.1uF
50V

100

HD

R401

READY

D1000

D1013
1N4148W_DIODES

C1000 C1002
270pF 220pF
50V
50V
READY READY

L406
GLASS

R1001
10

C1003
270pF
50V
READY

DISP_EN

PC_SER_DATA

R443 4.7K

R1003
10

L400
MLB-201209-0120P-N2

C408
10pF

11
C1025
10uF
6.3V

12
13

C1026
10pF
READY

1
READY
2

C
Q1001
2SC3052

READY
E

2
1

TF05-51S
P403

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

MSD3368EV Platform
RGB,RS232,LVDS

10

LGE Internal Use Only

FE_TS_VAL

FE_TS_SYN

FE_TS_CLK

C1141
0.1uF
16V

READY
R1142
10

FE_TS_SERIAL

+3.3V_TU
/FE_RESET

(TUNER RESET GPIO OPTION)

TU_RESET

XC5000_RESET

+3.3V_TU_CE

10
R1127

READY
R1105
47K

R1103
0

TU_SLEEP_MODE

R1167

R1175

R1183

R1168

R1176

R1184

READY
R1114
33

MDO0

R1113
33

MDO1

MDO2

MDO3

49

MDO4

VDD_5

VSS_10

MDO5

MDO6

51
50

52

53

54

55

56

AGC1

41

AGC2/GPP2

40

VSS_8

SLEEP

10

39

CVDD_4

STATUS

11

38

VSS_7

SADD4

12

37

CVDD_3

VDD_2

13

36

DATA2/GPP1

R1115
10K

VSS_4

14

35

CLK2/GPP0

R1116
10K

SADD3

15

34

RFLEV

SADD2

16

33

VDD_3

IC1100
CE6355

Place the Buffer close to Tuner

+1.8V_TU_CE

+3.3V_TU_CE

32
AGND_2

31
VIN

30
VIN

29
AGND_1

28
AVDD

27
OSCMODE

26

25

24

22

23

XTO

VSS_6

+1.8V_TU_CE

IF_AGC

+5V

C1106
R1122 0.1uF
390
16V

57

42

C1128
0.1uF
50V

READY
R1109
100K

READY
22pF
C1138

R1182

58

READY
22pF
C1136

MDO7

RESET

READY
R1106
10K

R1174

59

GPP3

IRQ
VSS_3

R1104
10K

33 R1111

R1108
33

43

R1117
1K
+3.3V_TU_CE

CVDD_1

To separate chassis ground


R1166

CVDD_5

SMTEST

PLLTEST

R1130
1K
C1133
0.1uF
16V

VSS_11

44

17

READY

MOCLK

XTI

C1176
0.1uF
16V

BKERR

VDD_4

DATA1

16V

L1102
SAM2333

4.7K
R1100
READY

60

45

21

C1119
0.1uF

MICLK

PLLGND

A2[GN]

ACTIVE HIGH

R1102
4.7K

24

0.1uF

61

64
/FE_RESET

A1[RD]

GND_6

GND_5

VDDD_1

VDDC_4

VDDA_6
0.1uF

C1173
18pF

L1101
MLB-201209-0120P-N2

0.1uF

0.1uF
C1124

C1182

TESTMODE

VDDC_3

VSS_9

CLK1
+1.8V_TU_CE

31.875MHz

C1151

+1.8V_TU

C1118

0.1uF

0.1uF

0.1uF
C1169

C1129

MOSTRT

46

C1123
0.1uF

DDI1

C1116

MOVAL

47

20

25

+3.3V_TU

1K
R1153

R1138
1K

12
23

VDDC_5

22

DDI2

26
20

ADDRSEL

27

21

X2

28

11
19

GND_7

29

9
10

+1.8V_TU

48

X1102

30

GND_4
VDDC_2

SDA1

VSS_2

XC5000

SCL1

C1142
1000pF
50V

R1119
22K

VDD_1

PLLVDD

37

C1148

31

VDDC_1

17

0.1uF

GND_3
VDDA_2

0.1uF

VDDA_3

13

C1171

0.1uF
0.1uF

X1

18

C1158

CVDD_6

RESET

EXTREF

100

C1131 C1152
18pF 18pF
50V 50V

62

VI2C
38

32

EXTCHOKE

C1121

63

VDDC_6
39

VDDD_2

C1140
0.1uF
16V

+3.3V_TU_CE

VSS_1

19

VREF_N
40

33

SDA1
SCL1

18

VREF_P
41

100

R1150

VSS_5

VDDC_7
42

IN2

R1155
C1108
18pF

SADD0

VDDC_8
43

SCL

16

C1167

0.1uF

REXT
44

SDA

34

14

820nH
2%
1008CS-821XGLC

TU_RESET

4.99K

VDDA_7
45

GND_8

35

15

L1114

0.1uF

0.1uF

0.1uF
GND_9
46

36

2
3

SIF

390nH
2%

6.8pF

VIF

C1146
120pF

0.1uF

+3.3V_TU

IN1

GND_2
C1109

R1118

+3.3V_TU

+3.3V_TU_CE

IC1104

+3.3V_TU_CE

+1.8V_TU

GND_1

VDDA_1

VAGC

C2

C1134 1000pF

VDDA_5

L1116
0603CS-R39XGLW

RCLAMP0502B D1101
C1

L1111
39pF0603CS-6N8XGLW2%
6.8nH

270nH
2%

L1108
0603CS-R27XGLW

56pF C1126

READY
C1103
50V

C1120

1
2

C1156

1000pF

C1163

VDDC_9
47

KCN-ET-5-0094
JK1101

1%

C1115

C1117

R1152

VDDA_8
48

0.1uF

VDDA_4

C1165

+1.8V_TU_CE

33

16V
0.1uF
C1164

+3.3V_TU
+1.8V_TU

IF_AGC

R1107

C1159
0.1uF

SADD1

: ACTIVE LOW (SOFT RESET)

CVDD_2

16V
0.1uF
C1147

TUNER RESET

TUNER_SIF
R1135
680
0

R1178

R1171

R1179

R1172

R1180

R1173

R1181

R1185

C1135
0.1uF
16V

Q1103

C1139
0.1uF
16V

ISA1530AC1
L1105
MLF1608A2R7J
2.7uH 5%

B
C1161
6.8pF
50V

C1122
27pF
50V

C1127
27pF
50V

+5V
08.10.06 CHANGE LOAD CAP 22pF -> 27pF

R1159
390

C1183
0.1uF
16V

TUNER_IF_N

TUNER_IF_N

R1177

TUNER_IF_P

R1170

0
R1110

R1169

X1100
20.48MHz

+3.3V_TU
E
Q1108
ISA1530AC1
B
C

+5V
L1118

C1180
68uF
10V
FHD

C1185
0.1uF
16V

C1186
0.1uF
16V

C1187
0.1uF
16V

+3.3V_TU_CE

+3.3V_TU
R1101
390

C1168
0.1uF
16V

L1103
MLB-201209-0120P-N2

TUNER_CVBS

16V
0.1uF
C1105

16V
0.1uF
C1107

16V
0.1uF
C1111

16V
0.1uF
C1113

C1130
10uF
6.3V

16V
0.1uF
C1137

16V
0.1uF
C1144

16V
0.1uF
C1149

16V
0.1uF
C1150

R1112
680

Q1102
ISA1530AC1

L1110
MLF1608A2R7J
2.7uH 5%

B
C1104
6.8pF
50V

+5V
+1.8V_TU_CE

+1.8V_TU
R1157
390

L1100
MLB-201209-0120P-N2

C1184
0.1uF
16V

TUNER_IF_P

C1100
10uF
6.3V

C1101
0.1uF
16V

C1102
0.1uF
16V

C1110
10uF
6.3V

C1112
0.1uF
16V

C1114
0.1uF
16V

C1125
0.1uF
16V

C1132
0.1uF
16V

C1143
0.1uF
16V

C1145
0.1uF
16V

E
Q1109
ISA1530AC1
B
C

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes

Downloaded from www.Manualslib.com manuals search engine

MSD3368EV Platform
TUNER

10

10

LGE Internal Use Only

Downloaded from www.Manualslib.com manuals search engine

Vous aimerez peut-être aussi