EE2500 / EE2514 Resit coursework part A Analogue Electronics, Aug 2015

(a) (i) Which region is the transistor in Figure Q1(a) operating in?
[1 mark]
(ii) Design the circuit in Figure Q1(a) to obtain a current ID of 80 Find the value
required for R and find the dc voltage VD. Let the NMOS transistor have Vth = 0.6V,
nCox = 200 A/V2, L = 0.8 m and W = 4 m. Neglect the channel-length
modulation effect (i.e. = 0).
[3 marks]
+1.8V
ID

R
VD

Figure Q1(a)

(b) The NMOS and PMOS transistors in the circuit of Figure Q1(b) are matched with kn
= kp = 1mA/V2 (where kx = xCoxW/L) and Vthn = Vthp = 1V. Assuming = 0 for
both devices, find the drain currents iDn and iDp as well as the voltage vo for:
(i)
vi = 0 V
[4 marks]
(ii)
vi = +2.5 V
[4 marks]
(iii)
vi = -2.5 V
[2 marks]
2.5V

QP
iDp
vi

vo
iDn
10k

QN

-2.5V

Figure Q1(b)

(c) Draw an inverting amplifier with two separate input resistors connected to two
different input voltages V1 and V2. Write the output expression for the circuit,
assuming all resistor values are equal to R. What is this circuit typically called?
[3 marks]
(d) (i) If a single input amplifier with a closed-loop gain |G| = 50 and a non-feedback
resistor equal to 1 k is needed to amplify a signal from a grounded voltage source
with an output impedance of 2 k, would you choose an inverting amplifier or a
non-inverting amplifier design? Why? What is the input impedance of the other
amplifier?
[2 marks]
(ii) What should be the value of the feedback resistor in each case? How would you
implement it (approximately) using resistor values from the E24
range?
[1 marks]

3V

3
2