Académique Documents
Professionnel Documents
Culture Documents
PCA70/61
Sugar Bay
2010/10/1
Issued Date
Security Classification
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Cover Page
Size Document Number
Custom
R ev
0.1
Date:
Sheet
E
of
64
PCI-Express 16X
DDR3 VRAM
512M/1GB(GV)
1GB/2GB(GS)
1
VGA Chip
NV N12P-GV
NV N12P-GS(default)
HDMI(IFPE)
2 ch. LVDS
Conn.
Intel CPU
Sandy Bridge
Desktop
HDMI
(IFPC)
LGA1155
LVDS I/F
FDI X8
DMI X4
2.7GT/s
H1
USB-Port 0
USB-Port 2
Touch Panel
5GT/s
Scale
RTD2482D
DDPC
USB 2.0 X 6
L1
SPI ROM
SPI
SATA port 0
HDMI
HDMI IN conn.
RGB
D-sub IN conn.
2
DDPD
Intel PCH
Cougar Point
H61
SATA port 1
USB 2.0
PCI-E
TV Tuner Card
PCIe 1x
USB3.0 Controller
USB-Port 3
USB 3.0
ASM1042
RJ45
3 in 1 CardReader
conn.
LAN
RTL8111E 10/100/1G
PCIe 1x
PCIe 1x
PCIe 1x
FCBGA-942
USB 2.0
SATA port 4
USB-Port 5
& eSATA
(SD/MMC/SDHC)
3
ALC663
SPI
L1
C
MIC Jack
SPK AMP
SPK AMP
EUA2113
EUA2113
HPOUT
LFEOUT
EC
ENE KB930
FRONT
LPC BUS
SPDIFOUT
CIR
D-Mic.
HD Audio
SPI ROM
USB-Port 4
H1
HP/SPDIF Jack
6W SPK *2
Conn
2.5mm jack
for 10W woofer
2010/10/1
Issued Date
Security Classification
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Block Diagram
Size
Document Number
Rev
0.1
Sheet
of
64
PU16
+VGA_COREP
TPS51212DSCR
Bead
+VGA_CORE
JUMP
+CPU_CORE
+GFX_CORE
+1.8VS
+GFX_CORE
NCP5911MNTBG
1.5V
PU5
APL5610CI
PU6
+CPU_CORE
PU11~PU15
VIN
+1.05VS_VCCIOP
JUMP
TPS51212DSCR
+VCCSAP
+VCCSA
JUMP
CPU
+VCCSA
D
+1.05VS_VCCIO
+1.05VS_VCCIO
JUMP
+1.05VGS
U63
AP4800BGM
PU9
+1.05VSP
+5VALWP
JDCIN1
8205_B+
JUMP
B+
PU2
RT8205EGQW
+1.05VS_VPCH
JUMP
TPS51212DSCR
+3VALWP
JUMP
+5VS
Q61
+5VALW
JUMP
+12VS
AP4800BGM
+3VALW
+1.8VSP
PU6
+5VS
APL5930KAI
SATA HDD
JUMP
+1.8VS
PU7
+1.5VP
TPS51212DSCR
JUMP
+1.5V
+12VS
+1.5V
Q60
U65
AP4800BGM
PU3
PU6
AP4800BGM
TPS54331DR
+5VS
+1.5V
+0.75VS
+0.75VS
+12VALW
B+
+1.8VS
+1.05VS_VPCH
+12VS
MOS
DDR3 SODIMM X 4
+3VS
+1.5VS
JUMP
FAN3
+1.2VUSB
JUMP
MOS
+12VALWP
APL5930KAI
+0.75VP
+1.5VGS
FAN2
PU19
APL5930KAI
+3VS
FAN1
+12VS
+3VALW
LCD
PCH
+3VS
Converter
+3VS
+RTCVCC
+5VALW
RTC
Battery
+5VS
AMP X 2
+1.5VGS
EUA2113
VRAM X 8
+1.05VGS
+USB_VCCB
USB2.0 X 3
USB3.0 X 2
+5VALW
U34
+USB_VCCA
N12P-GT-A1
+1.5VGS
U33
Media card
controller
+VGA_CORE
JMB385
VGA
+USB30_VCCA
U46
MOS
LVDS
ASM1442
+3VGS
+3VS
+3VS
+3VS
+5VALW
+5VALW
+3VALW
U83
MOS
MOS
+5VALW
+3V_LAN
LAN
CRT-IN
RTL8111E
HDMI-IN
+5VS
U23
+3VALW
+3VS +3V_SCA
SW&Power/B
Conn
MOS
MOS
+1.2V_SCA
1.5VS
+3VS +3VS
+1.2VUSB
USB3.0
Scaler
+3VALW
EC
Mini Card x2
RTD2482D
ASM1042
KB930
+LCDVDD
+3VALW
+5VS_L_BCAS
Scaler
LVDS CONN
CIR
B-CAS
+5VS
+5VS
Touchscreen
SATA ODD
+5VS
+3VS
Audio codec
ALC663
+5VS
+3VS
HDMI-OUT
+3VS
CAM
Bluetooth
eSATA/USB
+USB_VCCC
Conn.
Issued Date
Security Classification
2010/10/1
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Power Tree
Size
Document Number
Rev
0.1
Sheet
of
64
Voltage Rails
Power Plane
Description
S0
S3
S5
VIN
N/A
N/A
N/A
B+
N/A
N/A
N/A
+CPU_CORE
ON
OFF
OFF
+GFX_CORE
ON
OFF
OFF
+VCCSA
ON
OFF
OFF
+1.05VS_VCCIO
ON
OFF
OFF
+1.05VS_VPCH
ON
OFF
OFF
+0.75VS
ON
OFF
OFF
+1.5V
ON
ON
OFF
+1.5VS
ON
OFF
OFF
+1.8VS
ON
OFF
OFF
+3VALW
ON
ON
ON
+3V_LAN
ON
ON
OFF
+3VS
ON
OFF
OFF
+3V_SCA
ON
N/A
N/A
+1.2V_SCA
ON
N/A
N/A
+1.2V_USB
ON
OFF
OFF
+5VALW
ON
ON
ON
+5VS
ON
OFF
OFF
+LCDVDD
ON
N/A
N/A
+RTCVCC
RTC power
ON
ON
ON
+3VGS
ON
OFF
OFF
+VGA_CORE
ON
OFF
OFF
+1.05VGS
ON
OFF
OFF
+1.5VGS
ON
OFF
OFF
+12VALW
ON
N/A
N/A
+12VS
ON
OFF
OFF
UHCI1
UHCI3
UHCI4
Device
+3VS
DDR(JDDRL2)
HEX
Address
1010 000X b
+3VS
DDR(JDDRH1)
1010 010X b
Power
Device
Scaler
HEX
UHCI5
UHCI6
3G
Device
0
1
2
3
4
5
Port Device
HDD
ODD
Disabled on H61
Disabled on H61
eSATA+USB Conn
NC
BOARD ID Table
EC SM Bus2 Address
Power
UHCI2
EHCI2
Device
0
1
2
3
4
5
6
7
8
9
10
11
12
13
UHCI0
EHCI1
Address
0000_0101b
Board
ID
* 0
1
2
3
4
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
1
2
3
4
5
6
7
8
NC
USB30
WLAN
TV
Card reader
LAN
Disabled on H61
Disabled on H61
PCB
Revision
0.1
0.2
BTO Item
ME components
VGA-N12P-GS
VGA-N12P-GV
UMA Only
DISCRETE ONLY
USB30
No USB30 SKU
D-sub IN
HDMI IN
HDMI OUT
HDMI OUT from DIS
HDMI OUT from UMA
VGA w/o Senergy
BCAS
VRAM select
VRAM 1G Hynix
X7630488L01
VRAM 1G Samsung
X7630488L02
BOM Structure
CONN@
GS@
GV@
UMA@
DIS@
USB30@
USB20@
VGAIN@
HDMIIN@
HDMIO@
HDMIOD@
HDMIOU@
DISO@
TV@
X76@
X76_HY1G@
X76_SAM1G@
GPIO69_H@
GPIO69_L@
GPIO70_H@
SKU IO Select
GPIO70_L@
GPIO71_H@
GPIO71_L@
Unpop
@
LA-7521P 6 Layer PCB 6LOCB@
LA-7522P 8 Layer PCB 8LPCB@
Device
HEX
Address
1001_1010b
1001_1110b
STATE
SIGNAL
+VALW
+VS
HIGH
HIGH
HIGH
ON
ON
HIGH
HIGH
HIGH
ON
ON
S3 (Suspend to RAM)
LOW
HIGH
HIGH
ON
OFF
S4 (Suspend to Disk)
LOW
LOW
HIGH
ON
OFF
LOW
OFF
OFF
Full ON
S1(Power On Suspend)
S5 (Soft OFF)
LOW
A
LOW
Project Project
_ID0
SKU
Project
_ID1
1
1
1
1
0
0
1
1
0
1
0
1
X
X
X
Security Classification
2010/10/1
Issued Date
UMA
UMA@ USB30@ 8LPCB@
GPIO69_L@ GPIO70_L@ GPIO71_L@
USB30 w/o HDMI
4319D588L03
DIS-Hynix
GS@ DIS@ USB30@ VGAIN@ HDMIO@ HDMIOD@ DISO@ HDMIIN@
PCA70 USB30 w/ HDMI
4319D588L04
GPIO69_L@ GPIO70_L@ GPIO71_H@
X76_HY1G@
8LPCB@
UMA
UMA@ USB30@ VGAIN@ HDMIO@ HDMIOU@ DEBUG@ HDMIIN@
USB30 w/ HDMI
4319D588L05
GPIO69_L@ GPIO70_H@ GPIO71_L@
8LPCB@
DIS-Hynix
GV@ DIS@ USB30@ VGAIN@ HDMIO@ HDMIOD@ DISO@ HDMIIN@
USB30 w/ HDMI
4319D588L11
6LOCB@
GPIO69_L@ GPIO70_H@ GPIO71_H@
PCA61
UMA
UMA@ USB20@ VGAIN@ HDMIO@ HDMIOU@ DEBUG@ HDMIIN@
USB20 w/ HDMI
4319D588L12
6LOCB@
GPIO69_H@ GPIO70_L@ GPIO71_L@
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
Title
Notes List
Size Document Number
Custom
R ev
0.1
Date:
Sheet
E
of
64
JCPU1B
100 MHz
[18,49] H_PECI
+1.05VS_VCCIO
@ R12
C1592
C1593
C1594
C
1
1
1
1
R14
[18] H_THERMTRIP#
H_PECI
2
0.1U_0402_16V4Z
H_SNB_IVB#
2
0.1U_0402_16V4Z
H_PROCHOT#_R
2
0.1U_0402_16V4Z
H_PM_SYNC
2
0.1U_0402_16V4Z
[15] H_PM_SYNC
[18] H_PWRGOOD
0.1U_0402_16V4Z
1 R13
2
1
J35
PECI
1 H_PROCHOT#_R
0_0402_5%
H34
PROCHOT#
2 H_THERMTRIP#_R
0_0402_5%
G35
THERMTRIP#
H_PECI
H_PM_SYNC
E38
PM_SYNC
H_PWRGOOD
J40
UNCOREPWRGOOD
H_PWRGOOD
BUF_CPU_RST#
F36
SM_DRAMPWROK
RESET#
C2
CLOCKS
CATERR#
PM_DRAM_PWRGD_R AJ19
10K_0402_5%
E37
1
51_0402_5%
[49] H_PROCHOT#
C1591
2
R8
SKTOCC#
DDR3
MISC
+1.05VS_VCCIO
AJ33
@ R1070
1K_0402_5%
2
1 H_CATERR#
TP_SKTOCC#
PROC_SEL
THERMAL
T1
K32
PWR MANAGEMENT
PAD
H_SNB_IVB#
MISC
PROC_SELECT#
[18] H_SNB_IVB#
BCLK[0]
BCLK#[0]
W2
W1
CLK_CPU_DMI
CLK_CPU_DMI#
CLK_CPU_DMI [14]
CLK_CPU_DMI# [14]
120 MHz
BCLK_ITP
BCLK_ITP#
C40
D40
CLK_BCLK_ITP
CLK_BCLK_ITP#
CLK_BCLK_ITP [14]
CLK_BCLK_ITP# [14]
XDP_TMS_R
R1
1 51_0402_5%
XDP_TDI_R
R2
1 51_0402_5%
XDP_TDO_R
R3
1 51_0402_5%
XDP_TCK_R
R4
1 51_0402_5%
XDP_TRST#_R
R6
1 51_0402_5%
D
SM_DRAMRST#
AW18
SM_DRAMRST# [11,12]
@ C3
0.1U_0402_16V4Z
PRDY#
PREQ#
K38
K40
TCK
TMS
TRST#
M40
L38
J39
XDP_TCK_R
XDP_TMS_R
XDP_TRST#_R
TDI
TDO
L40
L39
XDP_TDI_R
XDP_TDO_R
DBR#
E39
XDP_DBRESET#_R R23 1
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
H40
H38
G38
G40
G39
F38
E40
F40
R22
2
@
10K_0402_5%
1
+3VS
XDP_DBRESET#
2 0_0402_5%
XDP_DBRESET# [15]
Sandy Bridge_rPGA_Rev1p0
+1.5V
R33
200_0402_5%
1
2PM_DRAM_PWRGD_R
R24
130_0402_5%
1
[15] DRAMPWROK
@ R35
39_0402_5%
1
[51,57] SUSP
2
G
C1
1000P_0402_50V7K
@
Q1
SSM3K7002BF 1N SC59-3
@
1
2
R42
75_0402_5%
2
C1612
0.1U_0402_16V4Z
NC
4BUFO_CPU_RST#
R43
43_0402_1%
1
2
BUF_CPU_RST#
Y
3
PLT_RST#
[17,22,45,49] PLT_RST#
U2
R44
0_0402_5%
@
SN74LVC1G07DCKR_SC70-5
2
C6
0.1U_0402_16V4Z
2010/10/1
Issued Date
Security Classification
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Sandy Bridge_JTAG/XDP/FAN
Size Document Number
Custom
R ev
0.1
Date:
Sheet
1
of
64
[15]
[15]
[15]
[15]
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
[15]
[15]
[15]
[15]
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]
DMI_PTX_CRX_P0
DMI_PTX_CRX_P1
DMI_PTX_CRX_P2
DMI_PTX_CRX_P3
W5
V3
Y3
AA4
DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
V6
W8
Y7
AA8
DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
V7
W7
Y6
AA7
DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
AC7
AC3
AD1
AD3
AD6
AE8
AF2
AG1
FDI_TX#[0]
FDI_TX#[1]
FDI_TX#[2]
FDI_TX#[3]
FDI_TX#[4]
FDI_TX#[5]
FDI_TX#[6]
FDI_TX#[7]
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
AC8
AC2
AD2
AD4
AD7
AE7
AF3
AG2
FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
FDI_TX[3]
FDI_TX[4]
FDI_TX[5]
FDI_TX[6]
FDI_TX[7]
[15] FDI_FSYNC0
[15] FDI_FSYNC1
FDI_FSYNC0
FDI_FSYNC1
AC5
AE5
FDI_FSYNC[0]
FDI_FSYNC[1]
[15] FDI_INT
FDI_INT
AG3
FDI_INT
[15] FDI_LSYNC0
[15] FDI_LSYNC1
FDI_LSYNC0
FDI_LSYNC1
AC4
AE4
FDI_LSYNC[0]
FDI_LSYNC[1]
AE2
AE1
FDI_COMPIO
FDI_ICOMPO
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
+1.05VS_VCCIO
R46
2 24.9_0402_1%
FDI_COMP
7/20 PE_RX[0~3]/PE_RX#[0~3]
PE_TX[0~3]/PE_TX#[0~3] only
use on Server/Workstation.
P3
R2
T4
U2
PE_RX[0]
PE_RX[1]
PE_RX[2]
PE_RX[3]
P4
R1
T3
U1
PE_RX#[0]
PE_RX#[1]
PE_RX#[2]
PE_RX#[3]
P8
T7
R6
U5
PE_TX[0]
PE_TX[1]
PE_TX[2]
PE_TX[3]
P7
T8
R5
U6
PE_TX#[0]
PE_TX#[1]
PE_TX#[2]
PE_TX#[3]
DMI_PTX_CRX_P0
DMI_PTX_CRX_P1
DMI_PTX_CRX_P2
DMI_PTX_CRX_P3
W4
V4
Y4
AA5
DMI
[15]
[15]
[15]
[15]
DMI_PTX_CRX_N0
DMI_PTX_CRX_N1
DMI_PTX_CRX_N2
DMI_PTX_CRX_N3
Intel(R) FDI
DMI_PTX_CRX_N0
DMI_PTX_CRX_N1
DMI_PTX_CRX_N2
DMI_PTX_CRX_N3
PCI-EXPRESS
[15]
[15]
[15]
[15]
PEG_COMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_COMP
B4
B5
C4
1
R47
1
R48
1
R49
1
R50
1
R51
FDI_FSYNC1
A
FDI_LSYNC0
FDI_LSYNC1
@
@
@
@
@
PCIE_GTX_C_CRX_N15
PCIE_GTX_C_CRX_N14
PCIE_GTX_C_CRX_N13
PCIE_GTX_C_CRX_N12
PCIE_GTX_C_CRX_N11
PCIE_GTX_C_CRX_N10
PCIE_GTX_C_CRX_N9
PCIE_GTX_C_CRX_N8
PCIE_GTX_C_CRX_N7
PCIE_GTX_C_CRX_N6
PCIE_GTX_C_CRX_N5
PCIE_GTX_C_CRX_N4
PCIE_GTX_C_CRX_N3
PCIE_GTX_C_CRX_N2
PCIE_GTX_C_CRX_N1
PCIE_GTX_C_CRX_N0
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
B11
D12
C10
E10
B8
C6
A5
E2
F4
G2
H3
J1
K3
L1
M3
N1
PCIE_GTX_C_CRX_P15
PCIE_GTX_C_CRX_P14
PCIE_GTX_C_CRX_P13
PCIE_GTX_C_CRX_P12
PCIE_GTX_C_CRX_P11
PCIE_GTX_C_CRX_P10
PCIE_GTX_C_CRX_P9
PCIE_GTX_C_CRX_P8
PCIE_GTX_C_CRX_P7
PCIE_GTX_C_CRX_P6
PCIE_GTX_C_CRX_P5
PCIE_GTX_C_CRX_P4
PCIE_GTX_C_CRX_P3
PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_P1
PCIE_GTX_C_CRX_P0
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
C14
E13
G13
F11
J13
D7
C3
E5
F7
G9
G6
K8
J6
M7
L5
N6
PCIE_CTX_GRX_N15
PCIE_CTX_GRX_N14
PCIE_CTX_GRX_N13
PCIE_CTX_GRX_N12
PCIE_CTX_GRX_N11
PCIE_CTX_GRX_N10
PCIE_CTX_GRX_N9
PCIE_CTX_GRX_N8
PCIE_CTX_GRX_N7
PCIE_CTX_GRX_N6
PCIE_CTX_GRX_N5
PCIE_CTX_GRX_N4
PCIE_CTX_GRX_N3
PCIE_CTX_GRX_N2
PCIE_CTX_GRX_N1
PCIE_CTX_GRX_N0
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_CTX_C_GRX_N15
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_N13
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_N0
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
C13
E14
G14
F12
J14
D8
D3
E6
F8
G10
G5
K7
J5
M8
L6
N5
PCIE_CTX_GRX_P15
PCIE_CTX_GRX_P14
PCIE_CTX_GRX_P13
PCIE_CTX_GRX_P12
PCIE_CTX_GRX_P11
PCIE_CTX_GRX_P10
PCIE_CTX_GRX_P9
PCIE_CTX_GRX_P8
PCIE_CTX_GRX_P7
PCIE_CTX_GRX_P6
PCIE_CTX_GRX_P5
PCIE_CTX_GRX_P4
PCIE_CTX_GRX_P3
PCIE_CTX_GRX_P2
PCIE_CTX_GRX_P1
PCIE_CTX_GRX_P0
C23
C24
C25
C26
C27
C28
C29
C30
C31
C32
C33
C34
C35
C36
C37
C38
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_CTX_C_GRX_P15
PCIE_CTX_C_GRX_P14
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_P0
PCIE_GTX_C_CRX_P[0..15] [22]
PCIE_CTX_C_GRX_N[0..15] [22]
PCIE_CTX_C_GRX_P[0..15] [22]
2
1K_0402_5%
2
1K_0402_5%
2
1K_0402_5%
2
1K_0402_5%
2
1K_0402_5%
PCIE_GTX_C_CRX_N[0..15] [22]
B12
D11
C9
E9
B7
C5
A6
E1
F3
G1
H4
J2
K4
L2
M4
N2
Close to CPU
FDI_FSYNC0
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
Sandy Bridge_rPGA_Rev1p0
FDI_INT
JCPU1A
2010/10/1
Issued Date
Security Classification
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
Title
Sandy Bridge_DMI/PEG/FDI
Size Document Number
Custom
R ev
0.1
Date:
Sheet
1
of
64
JCPU1C
JCPU1D
[12] DDR_B_D[0..63]
[11] DDR_A_BS0
[11] DDR_A_BS1
[11] DDR_A_BS2
[11] DDR_A_CAS#
[11] DDR_A_RAS#
[11] DDR_A_WE#
AJ3
AJ4
AL3
AL4
AJ2
AJ1
AL2
AL1
AN1
AN4
AR3
AR4
AN2
AN3
AR2
AR1
AV2
AW3
AV5
AW5
AU2
AU3
AU5
AY5
AY7
AU7
AV9
AU9
AV7
AW7
AW9
AY9
AU35
AW37
AU39
AU36
AW35
AY36
AU38
AU37
AR40
AR37
AN38
AN37
AR39
AR38
AN39
AN40
AL40
AL37
AJ38
AJ37
AL39
AL38
AJ39
AJ40
AG40
AG37
AE38
AE37
AG39
AG38
AE39
AE40
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
AY29
AW28
AV20
SA_BS[0]
SA_BS[1]
SA_BS[2]
DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#
AV30
AU28
AW29
SA_CAS#
SA_RAS#
SA_WE#
SA_CK[0]
SA_CK#[0]
SA_CKE[0]
AY25
AW25
AV19
DDRA_CLK0
DDRA_CLK0#
DDRA_CKE0
SA_CK[1]
SA_CK#[1]
SA_CKE[1]
AU24
AU25
AT19
DDRA_CLK1
DDRA_CLK1#
DDRA_CKE1
SA_CK[2]
SA_CK#[2]
SA_CKE[2]
AW27
AY27
AU18
SA_CK[3]
SA_CK#[3]
SA_CKE[3]
AV26
AW26
AV18
SA_CS#[0]
SA_CS#[1]
SA_CS#[2]
SA_CS#[3]
AU29
AV32
AW30
AU33
DDRA_SCS0#
DDRA_SCS1#
SA_ODT[0]
SA_ODT[1]
SA_ODT[2]
SA_ODT[3]
AV31
AU32
AU30
AW33
DDRA_ODT0
DDRA_ODT1
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS#[8]
AK2
AP2
AV4
AW8
AV36
AP39
AK39
AF39
AV12
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_DQS[8]
AK3
AP3
AW4
AV8
AV37
AP38
AK38
AF38
AV13
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AV27
AY24
AW24
AW23
AV23
AT24
AT23
AU22
AV22
AT22
AV28
AU21
AT21
AW32
AU20
AT20
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
SA_ECC_CB[0]
SA_ECC_CB[1]
SA_ECC_CB[2]
SA_ECC_CB[3]
SA_ECC_CB[4]
SA_ECC_CB[5]
SA_ECC_CB[6]
SA_ECC_CB[7]
AU12
AU14
AW13
AY13
AU13
AU11
AY12
AW12
DDRA_CLK0 [11]
DDRA_CLK0# [11]
DDRA_CKE0 [11]
DDRA_CLK1 [11]
DDRA_CLK1# [11]
DDRA_CKE1 [11]
DDRA_SCS0# [11]
DDRA_SCS1# [11]
DDRA_ODT0 [11]
DDRA_ODT1 [11]
DDR_A_DQS#[0..7] [11]
DDR_A_DQS[0..7] [11]
DDR_A_MA[0..15] [11]
[12] DDR_B_BS0
[12] DDR_B_BS1
[12] DDR_B_BS2
[12] DDR_B_CAS#
[12] DDR_B_RAS#
[12] DDR_B_WE#
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
AG7
AG8
AJ9
AJ8
AG5
AG6
AJ6
AJ7
AL7
AM7
AM10
AL10
AL6
AM6
AL9
AM9
AP7
AR7
AP10
AR10
AP6
AR6
AP9
AR9
AM12
AM13
AR13
AP13
AL12
AL13
AR12
AP12
AR28
AR29
AL28
AL29
AP28
AP29
AM28
AM29
AP32
AP31
AP35
AP34
AR32
AR31
AR35
AR34
AM32
AM31
AL35
AL32
AM34
AL31
AM35
AL34
AH35
AH34
AE34
AE35
AJ35
AJ34
AF33
AF35
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
AP23
AM24
AW17
SB_BS[0]
SB_BS[1]
SB_BS[2]
DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#
AK25
AP24
AR25
SB_CAS#
SB_RAS#
SB_WE#
SB_CK[0]
SB_CK#[0]
SB_CKE[0]
AL21
AL22
AU16
DDRB_CLK0
DDRB_CLK0#
DDRB_CKE0
SB_CK[1]
SB_CK#[1]
SB_CKE[1]
AL20
AK20
AY15
DDRB_CLK1
DDRB_CLK1#
DDRB_CKE1
SB_CK[2]
SB_CK#[2]
SB_CKE[2]
AL23
AM22
AW15
SB_CK[3]
SB_CK#[3]
SB_CKE[3]
AP21
AN21
AV15
SB_CS#[0]
SB_CS#[1]
SB_CS#[2]
SB_CS#[3]
AN25
AN26
AL25
AT26
DDRB_SCS0#
DDRB_SCS1#
SB_ODT[0]
SB_ODT[1]
SB_ODT[2]
SB_ODT[3]
AL26
AP26
AM26
AK26
DDRB_ODT0
DDRB_ODT1
DDRB_CLK0 [12]
DDRB_CLK0# [12]
DDRB_CKE0 [12]
DDRB_CLK1 [12]
DDRB_CLK1# [12]
DDRB_CKE1 [12]
D
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
[11] DDR_A_D[0..63]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS#[8]
DDRB_SCS0# [12]
DDRB_SCS1# [12]
DDRB_ODT0 [12]
DDRB_ODT1 [12]
DDR_B_DQS#[0..7] [12]
AH6 DDR_B_DQS#0
AL8 DDR_B_DQS#1
AP8 DDR_B_DQS#2
AN12 DDR_B_DQS#3
AN28 DDR_B_DQS#4
AR33 DDR_B_DQS#5
AM33 DDR_B_DQS#6
AG34 DDR_B_DQS#7
AN15
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
SB_DQS[8]
AH7
AM8
AR8
AN13
AN29
AP33
AL33
AG35
AN16
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
AK24
AM20
AM19
AK18
AP19
AP18
AM18
AL18
AN18
AY17
AN23
AU17
AT18
AR26
AY16
AV16
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
SB_ECC_CB[0]
SB_ECC_CB[1]
SB_ECC_CB[2]
SB_ECC_CB[3]
SB_ECC_CB[4]
SB_ECC_CB[5]
SB_ECC_CB[6]
SB_ECC_CB[7]
AL16
AM16
AP16
AR16
AL15
AM15
AR15
AP15
DDR_B_DQS[0..7] [12]
DDR_B_MA[0..15] [12]
Sandy Bridge_rPGA_Rev1p0
Sandy Bridge_rPGA_Rev1p0
2010/10/1
Issued Date
Security Classification
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Sandy Bridge_DDR3
Size Document Number
Custom
R ev
0.1
Date:
Sheet
1
of
64
22U_0805_6.3V6M
+1.05VS_VCCP Decoupling:
3X 560U (6m ohm), 9X 22U
22U_0805_6.3V6M
D
C43
22U_0805_6.3V6M
1
C44
C45
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C46
C47
22U_0805_6.3V6M
+CPU_CORE Decoupling:
5X 560U (4m ohm), 2X330U, 18X 22U
2
22U_0805_6.3V6M
C48
560U_2.5V_M
C49
+CPU_CORE
C52
560U_2.5V_M
C50
560U_2.5V_M
C51
560U_2.5V_M
560U_2.5V_M
43_0402_1%
@
R53
R54
75_0402_5%
+CPU_CORE
R52
110_0402_5%
H_CPU_SVIDALRT# 1
VR_SVID_CLK_R
1
VR_SVID_DAT_R
1
R1037
2
2
2
0_0402_5%
0_0402_5%
A36
B36
VCCSENSE [58]
VSSSENSE [58]
AB4 VCCIO_SENSE
AB3
VCCIO_SENSE [54]
C55 +
VR_SVID_ALRT# [58]
VR_SVID_CLK [58]
VR_SVID_DAT [58]
330U_D2_2V_Y
@ C56 +
C58
330U_D2_2VM_R6M
2 3
330U_D2_2V_Y
R56
100_0402_1%
22U_0805_6.3V6M
C60
C61
VCC121
VCC122
VCC123
VCC124
VCC125
VCC126
VCC127
VCC128
VCC129
VCC130
VCC131
VCC132
VCC133
VCC134
VCC135
VCC136
VCC137
VCC138
VCC139
VCC140
VCC141
VCC142
VCC143
VCC144
VCC145
VCC146
VCC147
VCC148
VCC149
VCC150
VCC151
VCC152
VCC153
VCC154
VCC155
VCC156
VCC157
VCC158
VCC159
VCC160
VCC161
J24
J25
J27
J28
J30
K15
K16
K18
K19
K21
K22
K24
K25
K27
K28
K30
L13
L14
L15
L16
L18
L19
L21
L22
L24
L25
L27
L28
L30
M14
M15
M16
M18
M19
M21
M22
M24
M25
M27
M28
M30
22U_0805_6.3V6M
1
C62
C63
22U_0805_6.3V6M
1
C64
C65
22U_0805_6.3V6M
1
C66
C67
22U_0805_6.3V6M
1
C68
C69
1
B
22U_0805_6.3V6M
+CPU_CORE
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
2
22U_0805_6.3V6M
+CPU_CORE
22U_0805_6.3V6M
C70
C71
22U_0805_6.3V6M
C72
22U_0805_6.3V6M
1
C73
2
22U_0805_6.3V6M
C74
22U_0805_6.3V6M
1
C75
22U_0805_6.3V6M
C76
22U_0805_6.3V6M
1
C77
22U_0805_6.3V6M
2010/10/1
Issued Date
Security Classification
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Sandy Bridge_rPGA_Rev1p0
5
+ C59
560U_2.5V_M
SVID
VSS_SENSE_VCCIO
2
C53
560U_2.5V_M
VCCIO_SENSE
VSSIO_SENSE
90.9_0402_1%
R1038
VCC_SENSE
VSS_SENSE
1
A37
C37
B37
+1.05VS_VCCIO
R55
VIDALERT#
VIDSCLK
VIDSOUT
C54
560U_2.5V_M
A11
A7
AA3
AB8
AF8
AG33
AJ16
AJ17
AJ26
AJ28
AJ32
AK15
AK17
AK19
AK21
AK23
AK27
AK29
AK30
B9
D10
D6
E3
E4
G3
G4
J3
J4
J7
J8
L3
L4
L7
M13
N3
N4
N7
R3
R4
R7
U3
U4
U7
V8
W3
+1.05VS_VCCIO
22U_0805_6.3V6M
1
1
C41
C42
VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24
VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39
VCCIO40
VCCIO41
VCCIO42
VCCIO43
VCCIO44
VCCIO45
22U_0805_6.3V6M
1
C39
C40
SENSE LINES
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100
VCC101
VCC102
VCC103
VCC104
VCC105
VCC106
VCC107
VCC108
VCC109
VCC110
VCC111
VCC112
VCC113
VCC114
VCC115
VCC116
VCC117
VCC118
VCC119
VCC120
CORE SUPPLY
JCPU1F
A12
A13
A14
A15
A16
A18
A24
A25
A27
A28
B15
B16
B18
B24
B25
B27
B28
B30
B31
B33
B34
C15
C16
C18
C19
C21
C22
C24
C25
C27
C28
C30
C31
C33
C34
C36
D13
D14
D15
D16
D18
D19
D21
D22
D24
D25
D27
D28
D30
D31
D33
D34
D35
D36
E15
E16
E18
E19
E21
E22
E24
E25
E27
E28
E30
E31
E33
E34
E35
F15
F16
F18
F19
F21
F22
F24
F25
F27
F28
F30
F31
F32
F33
F34
G15
G16
G18
G19
G21
G22
G24
G25
G27
G28
G30
G31
G32
G33
H13
H14
H15
H16
H18
H19
H21
H22
H24
H25
H27
H28
H30
H31
H32
J12
J15
J16
J18
J19
J21
J22
POWER
+CPU_CORE
Title
Sandy Bridge_POWER-1
Size Document Number
Custom
Rev
0.1
Date:
Sheet
1
of
64
@
C78
2
+ UMA@
C81
560U_2.5V_M
2
330U_D2_2VM_R6M 560U_2.5V_M
330U_D2_2VM_R6M
C82
UMA@
C83
UMA@
UMA@ 1
C84
UMA@ 1
C85
22U_0805_6.3V6M
22U_0805_6.3V6M
UMA@ 1
C100
22U_0805_6.3V6M
SM_VREF
1
0_0805_5%
SA RAIL
10U_0805_10V6K
AK11
AK12
VCCPLL1
VCCPLL2
1
C105
+
2
C107
@
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VDDQ19
VDDQ20
VDDQ21
VDDQ22
VDDQ23
AJ13
AJ14
AJ20
AJ23
AJ24
AR20
AR21
AR22
AR23
AR24
AU19
AU23
AU27
AU31
AV21
AV24
AV25
AV29
AV33
AW31
AY23
AY26
AY28
R62
100_0402_1%
+1.5V
22U_0805_6.3V6M
C90
C91
C92
22U_0805_6.3V6M
VCCSA_SENSE
VCCSA_VID
T2
P34
FC_AH1
FC_AH4
22U_0805_6.3V6M
1
C93
22U_0805_6.3V6M
+VCCSA
10U_0805_10V6K 10U_0805_10V6K
C101
C102
C103
@
C94
22U_0805_6.3V6M
1
C95
C96
@
22U_0805_6.3V6M
22U_0805_6.3V6M
C97
@
C98
@
C87 +
C88
+1.5V Decoupling:
3X 330U , 9X 22U
C89
@
22U_0805_6.3V6M
330U_D2_2VM_R6M
1
1
22U_0805_6.3V6M
330U_D2_2VM_R6M
C
330U_D2_2VM_R6M
+VCCSA Decoupling:
1X 560U, 2X 10U
1
+ C104
560U_2.5V_M
2
10U_0805_10V6K
VCCSA_VID1
VCCSA_SENSE [56]
VCCSAP_VID1 [56]
AH1 +VREF_DQB_R1
AH4 +VREF_DQA_R1
R66
R67
1
0.1U_0402_16V4Z
Sandy Bridge_rPGA_Rev1p0
VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8
VCCSA9
VCCSA10
VCCSA11
H10
H11
H12
J10
K10
K11
L11
L12
M10
M11
M12
C109
10U_0805_10V6K
+V_SM_VREF
1
C86
C108 0.1U_0402_16V4Z
220U_6.3V_M
C106
MISC
2
R65
R61
100_0402_1%
AJ22
1.8V RAIL
1.5A
B
+V_SM_VREF should
have 20 mil trace width
4.75A
VCCPLL Decoupling:
1X 220U, 2X 10U
+1.8VS_VCCPLL
VCC_AXG_SENSE [58]
VSS_AXG_SENSE [58]
+1.5V
8.8A
+1.8VS
L32
M32
0.1U_0402_16V4Z
22U_0805_6.3V6M
1
VCCAXG_SENSE
VSSAXG_SENSE
UMA@
C1588
+ UMA@
C79
VCCAXG1
VCCAXG2
VCCAXG3
VCCAXG4
VCCAXG5
VCCAXG6
VCCAXG7
VCCAXG8
VCCAXG9
VCCAXG10
VCCAXG11
VCCAXG12
VCCAXG13
VCCAXG14
VCCAXG15
VCCAXG16
VCCAXG17
VCCAXG18
VCCAXG19
VCCAXG20
VCCAXG21
VCCAXG22
VCCAXG23
VCCAXG24
VCCAXG25
VCCAXG26
VCCAXG27
VCCAXG28
VCCAXG29
VCCAXG30
VCCAXG31
VCCAXG32
VCCAXG33
VCCAXG34
VCCAXG35
VCCAXG36
VCCAXG37
VCCAXG38
VCCAXG39
VCCAXG40
VCCAXG41
VCCAXG42
VCCAXG43
VCCAXG44
35A
AB33
AB34
AB35
AB36
AB37
AB38
AB39
AB40
AC33
AC34
AC35
AC36
AC37
AC38
AC39
AC40
T33
T34
T35
T36
T37
T38
T39
T40
U33
U34
U35
U36
U37
U38
U39
U40
W33
W34
W35
W36
W37
W38
Y33
Y34
Y35
Y36
Y37
Y38
C80 +
SENSE
LINES
POWER
VREF
330U_D2_2VM_R6M
1
1
JCPU1G
+GFX_CORE Decoupling:
2X 470U (4m ohm), 12X 22U
Bottom
+GFX_CORE
Socket
Edge
Top Socket Edge
GRAPHICS
2
2
+VCCSA
0.925 V
(Default)
0.85 V
+VREF_DQB
+VREF_DQA
0_0402_5%
0_0402_5%
2010/10/1
Issued Date
Security Classification
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Sandy Bridge_POWER-2
Size Document Number
Custom
R ev
0.1
Date:
Sheet
1
of
64
JCPU1E
B10
B13
B14
B17
B23
B26
B29
B32
B35
B38
B6
C11
C12
C17
C20
C23
C26
C29
C32
C35
C7
C8
D17
D2
D20
D23
D26
D29
D32
D37
D39
D4
D5
D9
E11
E12
E17
E20
E23
E26
E29
E32
E36
E7
E8
F1
F10
F13
F14
F17
F2
F20
F23
F26
F29
F35
F37
F39
F5
F6
F9
G11
G12
G17
G20
G23
G26
G29
G34
G7
G8
H1
H17
H2
H20
H23
H26
H29
H33
H35
H37
H39
H5
H6
H9
J11
J17
J20
J23
J26
J29
J32
K1
K12
K13
K14
K17
K2
K20
K23
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS286
VSS287
VSS288
VSS289
VSS290
VSS291
VSS292
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS
VSS301
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313
VSS314
VSS315
VSS316
VSS317
VSS318
VSS319
VSS320
VSS321
VSS322
VSS323
VSS324
VSS325
VSS326
VSS327
VSS328
VSS329
VSS330
VSS331
VSS332
VSS333
VSS334
VSS335
VSS336
VSS337
VSS338
VSS339
VSS340
VSS341
VSS342
VSS343
VSS344
VSS345
VSS346
VSS347
VSS348
VSS349
VSS350
VSS351
VSS352
VSS353
VSS354
VSS355
VSS356
VSS357
VSS358
VSS359
VSS360
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
K26
K29
K33
K35
K37
K39
K5
K6
L10
L17
L20
L23
L26
L29
L8
M1
M17
M2
M20
M23
M26
M29
M33
M35
M37
M39
M5
M6
M9
N8
P1
P2
P36
P38
P40
P5
P6
R33
R35
R37
R39
R8
T1
T5
T6
U8
V1
V2
V33
V34
V35
V36
V37
V38
V39
V40
V5
W6
Y5
Y8
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
T236PAD
T15 PAD
T16 PAD
T17
T18
T19
T20
T21
T22
T23
T24
T25
T26
T27
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
A4
AV39
AY37
B3
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
AB6
AB7
AD37
AE6
AF4
AG4
AJ11
AJ29
AJ30
AJ31
AN20
AP20
AT11
AT14
AU10
AV34
AW34
AY10
C38
C39
D38
H7
H8
J33
J34
J9
K34
K9
L31
L33
L34
L9
M34
N33
N34
P35
P37
P39
R34
R36
R38
R40
J31
AD34
AD35
K31
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD36
RSVD37
RSVD38
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45
RSVD46
CFG2
CFG3
CFG5
CFG6
R70
@ R71
@ R73
@ R74
1
1
1
1
1K_0402_1%
1K_0402_1%
1K_0402_1%
1K_0402_1%
2
2
2
2
1: Normal Operation
CFG2
CFG3
1: Normal Operation
0:Lane numbers Reversed
*10:
CFG[6:5]
01: Reserved
00: 1 x 8, 2 x 4 : PCI Express
+5VS
NCTF1
NCTF2
NCTF3
NCTF4
NCTF5
VCCIO_SEL
A38
AU40
AW38
C2
D1
P33
AN10
AN11
AN14
AN17
AN19
AN22
AN24
AN27
AN30
AN31
AN32
AN33
AN34
AN35
AN36
AN5
AN6
AN7
AN8
AN9
AP1
AP11
AP14
AP17
AP22
AP25
AP27
AP30
AP36
AP37
AP4
AP40
AP5
AR11
AR14
AR17
AR18
AR19
AR27
AR30
AR36
AR5
AT1
AT10
AT12
AT13
AT15
AT16
AT17
AT2
AT25
AT27
AT28
AT29
AT3
AT30
AT31
AT32
AT33
AT34
AT35
AT36
AT37
AT38
AT39
AT4
AT40
AT5
AT6
AT7
AT8
AT9
AU1
AU15
AU26
AU34
AU4
AU6
AU8
AV10
AV11
AV14
AV17
AV3
AV35
AV38
AV6
AW10
AW11
AW14
AW16
AW36
AW6
AY11
AY14
AY18
AY35
AY4
AY6
AY8
R1576
10K_0402_1%
R1664
0_0402_5%
1
2
VSS
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VCCIO_SEL [54]
Reserve for PW
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
RSVD_NCTF1
RSVD_NCTF2
RSVD_NCTF3
RSVD_NCTF4
R1577
5.1K_0402_1%
AV1
AW2
AY3
B39
A17
A23
A26
A29
A35
AA33
AA34
AA35
AA36
AA37
AA38
AA6
AB5
AC1
AC6
AD33
AD36
AD38
AD39
AD40
AD5
AD8
AE3
AE33
AE36
AF1
AF34
AF36
AF37
AF40
AF5
AF6
AF7
AG36
AH2
AH3
AH33
AH36
AH37
AH38
AH39
AH40
AH5
AH8
AJ12
AJ15
AJ18
AJ21
AJ25
AJ27
AJ36
AJ5
AK1
AK10
AK13
AK14
AK16
AK22
AK28
AK31
AK32
AK33
AK34
AK35
AK36
AK37
AK4
AK40
AK5
AK6
AK7
AK8
AK9
AL11
AL14
AL17
AL19
AL24
AL27
AL30
AL36
AL5
AM1
AM11
AM14
AM17
AM2
AM21
AM23
AM25
AM27
AM3
AM30
AM36
AM37
AM38
AM39
AM4
AM40
AM5
JCPU1I
RESERVED
JCPU1H
VCCIO_SEL
VCCIO
1.00V
1.05V
Sandy Bridge_rPGA_Rev1p0
Sandy Bridge_rPGA_Rev1p0
Sandy Bridge_rPGA_Rev1p0
A
2010/10/1
Issued Date
Security Classification
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Sandy Bridge_GND/RSVD/CFG
Size Document Number
Custom
R ev
0.1
Date:
Sheet
1
10
of
64
R91
1K_0402_1%
2
+1.5V
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
Close to JDDRL.1
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11
DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDRA_CKE0
[7] DDRA_CKE0
DDR_A_BS2
[7] DDR_A_BS2
+0.75VS
DDR_A_MA12
DDR_A_MA9
C134 1
2 10U_0805_6.3V6M
C135 1
21U_0402_6.3V6K
C136 1
21U_0402_6.3V6K
C139 1
21U_0402_6.3V6K
C140 1
21U_0402_6.3V6K
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
DDRA_CLK0
DDRA_CLK0#
[7] DDRA_CLK0
[7] DDRA_CLK0#
[7] DDR_A_BS0
DDR_A_MA10
DDR_A_BS0
[7] DDR_A_WE#
[7] DDR_A_CAS#
DDR_A_WE#
DDR_A_CAS#
DDR_A_MA13
DDRA_SCS1#
[7] DDRA_SCS1#
Layout Note:
Place near JDDRL1
DDR_A_D32
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
+1.5V
+1.5V
C143 1
DDR_A_D34
DDR_A_D35
2 390U_2.5V_M_R10
C145 1
2 10U_0805_6.3V6M
C147 1
2 10U_0805_6.3V6M
C149 1
2 10U_0805_6.3V6M
C151 1
2 10U_0805_6.3V6M
C152 1
2 10U_0805_6.3V6M
C153 1
2 10U_0805_6.3V6M
C144 1
2 0.1U_0402_16V4Z
C146 1
2 0.1U_0402_16V4Z
C148 1
2 0.1U_0402_16V4Z
C150 1
2 0.1U_0402_16V4Z
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
R97
2 10K_0402_5%
+3VS
+0.75VS
R98
10K_0402_5%
205
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
G2
206
G1
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR_A_D13
SM_DRAMRST#
SM_DRAMRST# [5,12]
DDR_A_D14
DDR_A_D15
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
DDRA_CKE1
DDRA_CKE1 [7]
DDR_A_MA15
DDR_A_MA14
C
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
DDRA_CLK1
DDRA_CLK1#
DDRA_CLK1 [7]
DDRA_CLK1# [7]
DDR_A_BS1
DDR_A_RAS#
+1.5V
DDR_A_BS1 [7]
DDR_A_RAS# [7]
DDRA_SCS0#
DDRA_ODT0
DDRA_SCS0# [7]
DDRA_ODT0 [7]
DDRA_ODT1
R94
1K_0402_1%
DDRA_ODT1 [7]
+VREF_CAA
DDR_A_D36
DDR_A_D37
R96
1K_0402_1%
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45
Issued Date
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
close to JDDRL1.126
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
PM_SMBDATA
PM_SMBCLK
PM_SMBDATA [12,14,40]
PM_SMBCLK [12,14,40]
+0.75VS
A
2010/10/1
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
Security Classification
TYCO_2-2013290-1
CONN@
C155
0.1U_0402_16V4Z
C154
2.2U_0603_6.3V6K
CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2
DDR_A_D4
DDR_A_D5
C138
0.1U_0402_16V4Z
CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
C137
2.2U_0603_6.3V6K
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
Layout Note:
Place near JDDRL1.203 and 204
VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26
VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25
DDR_A_D0
DDR_A_D1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
2
[7] DDR_A_D[0..63]
[7] DDR_A_MA[0..15]
C115
2.2U_0603_6.3V6K
[7] DDR_A_DQS#[0..7]
C114
0.1U_0402_16V4Z
R93
1K_0402_1%
[7] DDR_A_DQS[0..7]
+1.5V
JDDRL2
+VREF_DQA
+1.5V
Title
DDRIII-SODIMMA
Size Document Number
Custom
Rev
0.1
Date:
Sheet
11
of
64
+VREF_DQB
R101
1K_0402_1%
2
1
2
C159
0.1U_0402_16V4Z
C158
2.2U_0603_6.3V6K
[7] DDR_B_MA[0..15]
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11
Close to JDDRL2.1
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
[7] DDRB_CKE0
[7] DDR_B_BS2
DDRB_CKE0
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
Layout Note:
Place near JDDRL2.203 and 204
[7] DDRB_CLK0
[7] DDRB_CLK0#
+0.75VS
C179 1
2 1U_0402_6.3V6K
C182 1
2 1U_0402_6.3V6K
C183 1
2 1U_0402_6.3V6K
C184 1
2 1U_0402_6.3V6K
[7] DDR_B_BS0
DDR_B_MA10
DDR_B_BS0
[7] DDR_B_WE#
[7] DDR_B_CAS#
DDR_B_WE#
DDR_B_CAS#
[7] DDRB_SCS1#
DDR_B_MA13
DDRB_SCS1#
DDR_B_D37
DDR_B_D36
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
Layout Note:
Place near JDDRL2
+1.5V
DDR_B_D48
DDR_B_D49
+1.5V
C187 1
2 390U_2.5V_M_R10
C189 1
2 10U_0805_6.3V6M
C191 1
2 10U_0805_6.3V6M
C193 1
2 10U_0805_6.3V6M
C195 1
2 10U_0805_6.3V6M
C196 1
2 10U_0805_6.3V6M
C197 1
2 10U_0805_6.3V6M
C188 1
2 0.1U_0402_16V4Z
C190 1
2 0.1U_0402_16V4Z
C192 1
2 0.1U_0402_16V4Z
C194 1
2 0.1U_0402_16V4Z
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
R107 1
+3VS
C198
2.2U_0603_6.3V6K
2 10K_0402_5%
1
2
R108
+0.75VS
10K_0402_5%
C199
0.1U_0402_16V4Z
VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25
+1.5V
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1
205
VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
G2
206
G1
DDR_B_D4
DDR_B_D5
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D6
DDR_B_D7
DDR_B_D12
DDR_B_D13
SM_DRAMRST#
SM_DRAMRST# [5,11]
DDR_B_D14
DDR_B_D15
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D28
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D30
DDR_B_D31
DDRB_CKE1
DDRB_CKE1 [7]
DDR_B_MA15
DDR_B_MA14
2
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
DDRB_CLK1
DDRB_CLK1#
DDR_B_BS1
DDR_B_RAS#
DDRB_SCS0#
DDRB_ODT0
DDRB_ODT1
DDRB_CLK1 [7]
DDRB_CLK1# [7]
DDRB_SCS0# [7]
DDRB_ODT0 [7]
Issued Date
+VREF_CAB
DDR_B_D32
DDR_B_D33
R106
1K_0402_1%
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45
2
3
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
Close to JDDRL2.126
DDR_B_D52
DDR_B_D53
DDR_B_D50
DDR_B_D51
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
PM_SMBDATA
PM_SMBCLK
PM_SMBDATA [11,14,40]
PM_SMBCLK [11,14,40]
+0.75VS
4
2011/11/01
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
R104
1K_0402_1%
DDRB_ODT1 [7]
TYCO_2-2013311-1
@
Security Classification
+1.5V
DDR_B_BS1 [7]
DDR_B_RAS# [7]
C181
0.1U_0402_16V4Z
2 10U_0805_6.3V6M
DDRB_CLK0
DDRB_CLK0#
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
C180
2.2U_0603_6.3V6K
C178 1
DDR_B_D0
DDR_B_D1
R103
1K_0402_1%
[7] DDR_B_D[0..63]
+1.5V
+1.5V
[7] DDR_B_DQS[0..7]
[7] DDR_B_DQS#[0..7]
Title
DDRIII-SODIMM B
Size Document Number
Custom
Rev
0.1
Date:
Sheet
12
of
64
NC
OSC
1
4
32.768KHZ_12.5PF_Q13MC14610002
2
1
C204
15P_0402_50V8J
RTCX1
PCH_RTCX2
BN39
RTCX2
PCH_RTCRST#
BT41
RTCRST#
PCH_SRTCRST#
BN37
SRTCRST#
SM_INTRUDER#
BM38
INTRUDER#
BN41
INTVRMEN
2 AZ_BITCLK
33_0402_5%
AZ _SYNC
BU22
HDA_BCLK
BP23
HDA_SYNC
PCH_SPKR
BE56
SPKR
BC22
HDA_RST#
PCH_INTVRMEN
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
FWH4 / LFRAME#
BG17
LPC_FRAME#
LDRQ0#
LDRQ1# / GPIO23
BK17
BA20
SERIRQ
AV52
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
AC56
AB55
AE46
AE44
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
AA53
AA56
AG49
AG47
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
AL50
AL49
AL56
AL53
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
AN46
AN44
AN56
AM55
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
AN49
AN50
AT50
AT49
AT46
AT44
AV50
AV49
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
2 AZ_RST#
33_0402_5%
1
R120
[47] AZ_RST_HD#
PCH_INTVRMEN
2
390K_0402_5%
[47] AZ_SDIN0_HD
AZ_SDIN0_HD
+RTCVCC
R121 1
SM_INTRUDER#
2
1M_0402_5%
+3VS
+3VALW
2
10K_0402_5%
1
R133
2
10K_0402_5%
1
1K_0402_5%
HDA_SDIN0
BF22
HDA_SDIN1
BK22
HDA_SDIN2
BJ22
HDA_SDIN3
BT23
HDA_SDO
PCH_GPIO33
[47] AZ_SDOUT_HD
PCH_GPIO13
1
R125
AZ_SDOUT
2
33_0402_5%
PCH_GPIO33
BC25
HDA_DOCK_EN# / GPIO33
PCH_GPIO13
BA25
HDA_DOCK_RST# / GPIO13
PCH_SPKR
BA43
JTAG_TCK
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
+3VS
PCH_JTAG_TMS
BC50
JTAG_TMS
SATAICOMPO
AJ53
PCH_JTAG_TDI
BC52
JTAG_TDI
SATAICOMPI
AJ55
PCH_JTAG_TDO
BF47
JTAG_TDO
@
1
R131
PCH_SPKR
2
1K_0402_5%
HDA_SYNC
This signal has a weak internal pull down
*H=>On Die PLL is supplied by 1.5V (mobile)
L=>On Die PLL is supplied by 1.8V (DT)
Need to pull high for Huron River platform
No mention on SB PDG
but HR mention on PDG
reserve for
Potential Leakage Concern
3
@
Q2
1
+5VS
AZ_SYNC_R
2
33_0402_5%
1
R139
[47] AZ_SYNC_HD
PCH_SPICS#
AZ _SYNC
1
1K_0402_5%
2
@ R136
+3VALW
PCH_SPICLK
AR54
SPI_CLK
AT57
SPI_CS0#
AR56
SPI_CS1#
PCH_SPIDI
AU53
SPI_MOSI
PCH_SPIDO
AT55
SPI_MISO
SATA3RCOMPO
AE52
SATA3COMPI
AE54
SATA3RBIAS
AC52
LPC_FRAME# [49]
SERIRQ
SATA_PRX_C_DTX_N0
SATA_PRX_C_DTX_P0
SATA_PTX_DRX_N0
SATA_PTX_DRX_P0
C206
C207
SATA_PRX_C_DTX_N1
SATA_PRX_C_DTX_P1
SATA_PTX_DRX_N1
SATA_PTX_DRX_P1
C208
C209
SATA_PRX_C_DTX_N0 [41]
SATA_PRX_C_DTX_P0 [41]
2
2 0.01U_0402_25V7K
0.01U_0402_25V7K
1
1
R114 2
1 10K_0402_5%
CR_WAKE#
R116 2
1 10K_0402_5%
GPIO19
R117 1
2 10K_0402_5%
1
1
SATA_PTX_C_DRX_N0 [41]
SATA_PTX_C_DRX_P0 [41]
SATA_PRX_C_DTX_N1 [41]
SATA_PRX_C_DTX_P1 [41]
2
2 0.01U_0402_25V7K
0.01U_0402_25V7K
SATA_PTX_C_DRX_N1 [41]
SATA_PTX_C_DRX_P1 [41]
for EMI
SATA_PRX_C_DTX_N4 [40]
SATA_PRX_C_DTX_P4 [40]
2
2 0.01U_0402_25V7K
0.01U_0402_25V7K
R137
10_0402_5%
@
SATA_PTX_C_DRX_N4 [40]
SATA_PTX_C_DRX_P4 [40]
C214
10P_0402_50V8J
@
1
R128
2
37.4_0402_1%
SATA3_COMP
1
R130
2
+1.05VS_VPCH
49.9_0402_1%
2
750_0402_1%
BF57
SATA_LED#
SATA0GP / GPIO21
BC54
CR_WAKE#
SATA1GP / GPIO19
AY52
GPIO19
1
C210
SATALED#
R1039
1K_0402_5%
D1
2
1
R132
+RTCVCC
RBIAS_SATA3
+1.05VS_VPCH
+RTCBATT
+3VALW
DAN202UT106_SC70-3
0.1U_0402_16V4Z
2
SATA_LED# [50]
CR_WAKE# [44]
BD82CPDS-QMZP-B0_FCBGA942
+3VALW
1
+3VALW
+3VALW
R149
200_0402_5%
@
R148
200_0402_5%
@
PCH_JTAG_TMS
R147
200_0402_5%
@
PCH_JTAG_TDO
PCH_JTAG_TDI
R151
100_0402_1%
0_0402_5% AZ_SDOUT
2 @
ODD
CLK
SATA_PRX_C_DTX_N4
SATA_PRX_C_DTX_P4
SATA_PTX_DRX_N4
1
SATA_PTX_DRX_P4
C1390 1
C1391
ME debug mode,
this signal has a weak internal pull down
= Disable (default)
*Low
High = Enable (flash descriptor security overide)
PWRME_CTRL# 1
R129
2
1K_0402_5%
HDD
HDA_SDO
[49] PWRME_CTRL#
+3VS
SERIRQ [49]
BSS138LT1G_SOT23-3
1
2
R140
0_0402_5%
1
10K_0402_5%
SATA_LED#
JTAG
PCH_JTAG_TCK
SPI
[49]
[49]
[49]
[49]
2
R112
R153
100_0402_1%
R152
100_0402_1%
2
+3VALW
1
R126
2
R124
BD22
SATA
[47] PCH_SPKR
+RTCVCC
R122 1
1
R118
[47] AZ_BITCLK_HD
IHDA
SATA 6G
RC Delay 18~25mS
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
SERIRQ
C205 1
1U_0402_6.3V6K
OSC
BK15
BJ17
BJ20
BG20
3
JME1 CONN@
1
2
2PCH_SRTCRST#
NC
BR39
RC Delay 18~25mS
R115 1
20K_0402_5%
+3VS
PCH_RTCX1
1
15P_0402_50V8J
2
C202
Y1
JCOMS1 CONN@
1
2
C203 1
1U_0402_6.3V6K
iME Setting.
PCH_RTCRST#
LPC
RTC
R111 1
20K_0402_5%
+RTCVCC
U4A
R113
10M_0402_5%
2
1
1
R134 @
PCH_JTAG_TCK
2
51_0402_1%
1
R154
PCH_SPIDI
PCH_SPICLK
PCH_SPICS#
PCH_SPIDO
R143
R144
R145
R146
1
1
1
1
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
2
2
2
2
DI
CLK
CS#
DO
+3VALW
4M Byte
C212
0.1U_0402_16V4Z
2
U6
CS#
DO
A
1
2
3
4
CS#
DO
WP#
GND
VCC
HOLD#
CLK
DI
8
7
6
5
CLK
DI
A
W25Q32BVSSIG_SO8
Socket: SP07000F500/SP07000H900
Please close to U2 PCH
2010/10/1
Issued Date
Security Classification
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
PCH_HDA/JTAG/SATA/SPI/LPC
Size Document Number
Custom
Rev
0.1
Date:
Sheet
13
of
64
U4B
Card reader
[44]
[44]
[44]
[44]
PCIE_PRX_C_RTX_N5
PCIE_PRX_C_RTX_P5
PCIE_PTX_C_CRRX_N5
PCIE_PTX_C_CRRX_P5
[43]
[43]
[43]
[43]
LAN
PCIE_PRX_TVTX_N4
PCIE_PRX_TVTX_P4
PCIE_PTX_C_TVRX_N4
PCIE_PTX_C_TVRX_P4
PERN3
PERP3
PETN3
PETP3
C222 1
C223 1
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
PCIE_PRX_TVTX_N4
PCIE_PRX_TVTX_P4
PCIE_PTX_TVRX_N4
PCIE_PTX_TVRX_P4
P17
M17
F18
E17
PERN4
PERP4
PETN4
PETP4
1 0.1U_0402_16V7K
1 0.1U_0402_16V7K
PCIE_PRX_C_RTX_N5
PCIE_PRX_C_RTX_P5
PCIE_PTX_CRRX_N5
PCIE_PTX_CRRX_P5
N15
M15
B17
C16
PERN5
PERP5
PETN5
PETP5
1 0.1U_0402_16V7K
1 0.1U_0402_16V7K
PCIE_PRX_C_LANTX_N6
PCIE_PRX_C_LANTX_P6
PCIE_PTX_LANRX_N6
PCIE_PTX_LANRX_P6
J15
L15
A16
B15
PERN6
PERP6
PETN6
PETP6
J12
H12
F15
F13
PERN7
PERP7
PETN7
PETP7
H10
J10
B13
D13
PERN8
PERP8
PETN8
PETP8
AE6
AC6
CLKOUT_PCIE0N
CLKOUT_PCIE0P
C224 2
C225 2
PCIE_PRX_C_LANTX_N6
PCIE_PRX_C_LANTX_P6
PCIE_PTX_C_LANRX_N6
PCIE_PTX_C_LANRX_P6
C220 2
C221 2
USB30
WLAN
[45] CLK_USB30#
[45] CLK_USB30
[42] CLK_WLAN#
[42] CLK_WLAN
[42] CLKREQ_WLAN#
[42] CLK_TV#
[42] CLK_TV
TV
Card Reader
LAN
B
[44] CLK_CR#
[44] CLK_CR
[43] CLK_LAN#
[43] CLK_LAN
[43] CLKREQ_LAN#
R168 0_0402_5%
R169 0_0402_5%
1
2
1
2
CLK_USB30#_R AA5
CLK_USB30_R W5
CLKOUT_PCIE1N
CLKOUT_PCIE1P
R190 0_0402_5%
R191 0_0402_5%
1
2
1
2
CLK_WLAN#_R AB12
CLK_WLAN_R AB14
CLKOUT_PCIE2N
CLKOUT_PCIE2P
1
@ R192
R178
1
1
R180
2CLKREQ_WLAN#_R AV43
0_0402_5%
0_0402_5%
CLK_TV#_R
2
AB9
CLK_TV_R
2
AB8
0_0402_5%
R184 0_0402_5%
1
2
1
2
R186 0_0402_5%
R172
R173
1
1
1
@ R175
CLK_CR#_R
CLK_CR_R
0_0402_5%
0_0402_5%
CLK_LAN#_R
2
CLK_LAN_R
2
Y9
Y8
AF3
AG2
2 CLKREQ_LAN#_R BL54
0_0402_5%
AE12
AE11
PCH_SMBDATA
SML0ALERT# / GPIO60
BU49
PCH_GPIO60
SML0CLK
BT51
PCH_SMLCLK0
SML0DATA
BM50
PCH_SMLDATA0
BR46
PCH_GPIO74
SML1CLK / GPIO58
BJ46
PCH_SMLCLK1
SML1DATA / GPIO75
BK46
PCH_SMLDATA1
1 2.2K_0402_5%
2 R156
1 2.2K_0402_5%
PCH_SMBDATA
PCH_SMBCLK
AE2
AF1
BP55
[5] CLK_BCLK_ITP#
[5] CLK_BCLK_ITP
@ R7
@ R5
2
2
1 0_0402_5%
1 0_0402_5%
CLK_CPU_ITP#
CLK_CPU_ITP
R52
N52
PM_SMBDATA [11,12,40]
PM_SMBCLK [11,12,40]
2N7002KDWH_SOT363-6
Q4B
+3VALW
2 R159
1 2.2K_0402_5%
2 R160
1 2.2K_0402_5%
+3VS
PCH_SMLDATA1
EC_SMB_DA2 [23,49,52]
2N7002KDWH_SOT363-6
Q5A
EC_SMB_CK2 [23,49,52]
2N7002KDWH_SOT363-6
Q5B
CL_CLK1
BA50
CL_DATA1
BF50
CL_RST1#
BF49
+3VALW
R165 0_0402_5%
R167 0_0402_5%
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
AG8
AG9
CLK_PCIE_VGA#_R
CLK_PCIE_VGA_R
CLKOUT_DMI_N
CLKOUT_DMI_P
P31
R31
CLK_CPU_DMI#
CLK_CPU_DMI
CLKOUT_DP_N
CLKOUT_DP_P
N56
M55
CLK_DPLL#
CLK_DPLL
CLKIN_DMI_N
CLKIN_DMI_P
P33
R33
PCH_CLK_DMI#
PCH_CLK_DMI
CLKIN_GND0_N
CLKIN_GND0_P
W53
V52
CLKIN_GND0#
CLKIN_GND0
CLKIN_GND1_N CLKIN_GND1_N
CLKIN_GND1_P CLKIN_GND1_P
R27
P27
CLKIN_GND1#
CLKIN_GND1
CLKIN_DOT_96N
CLKIN_DOT_96P
BD38
BF38
CLK_DOT#
CLK_DOT
CLKIN_SATA_N
CLKIN_SATA_P
AF55
AG56
CLK_SATA#
CLK_SATA
PCIECLKRQ2# / GPIO20
CLKOUT_PCIE4N
CLKOUT_PCIE4P
CLKOUT_PCIE5N
CLKOUT_PCIE5P
1
1
2
2
CLK_PCIE_VGA# [22]
CLK_PCIE_VGA [22] VGA
CLK_CPU_DMI# [5]
CLK_CPU_DMI [5]
T65
T66
PAD
PAD
PCH_GPIO11
R161 1
2 10K_0402_5%
PCH_GPIO60
R162 2
1 2.2K_0402_5%
PCH_GPIO74
R163 1
2 10K_0402_5%
PCH_SMLCLK0
R164 2
1 2.2K_0402_5%
PCH_SMLDATA0
R166 2
1 2.2K_0402_5%
PCH_CLK_DMI#
PCH_CLK_DMI
R174 1
R176 1
2 10K_0402_5%
2 10K_0402_5%
CLKIN_GND1#
CLKIN_GND1
R177 1
R179 1
2 10K_0402_5%
2 10K_0402_5%
CLK_DOT#
CLK_DOT
R181 1
R182 1
2 10K_0402_5%
2 10K_0402_5%
CLK_SATA#
CLK_SATA
R183 1
R185 1
2 10K_0402_5%
2 10K_0402_5%
AN8
CLK_14M_PCH
CLK_14M_PCH
R187 1
2 10K_0402_5%
CLK_PCILOOP
CLKIN_GND0#
CLKIN_GND0
R188 1
R189 1
2 10K_0402_5%
2 10K_0402_5%
XTAL25_IN
XTAL25_OUT
AJ3
AJ5
PCH_X1
PCH_X2
XCLK_RCOMP
AL2
XCLK_RCOMP
1
R194
CLKOUTFLEX0 / GPIO64
AT9
CLK_FLEX0
T252
PAD
CLKOUTFLEX1 / GPIO65
BA5
CLK_FLEX1
T176
PAD
CLKOUTFLEX2 / GPIO66
AW5
CLK_FLEX2
T177
PAD
CLKOUTFLEX3 / GPIO67
BA2
CLK_FLEX3
T178
PAD
CLKIN_PCILOOPBACK
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
CLKOUT_PCIE6N
CLKOUT_PCIE6P
CLK_PCILOOP [17]
2
90.9_0402_1%
+1.05VS_VPCH
@
2
R193
PCIECLKRQ6# / GPIO45
CLKOUT_PCIE7N
CLKOUT_PCIE7P
PCIECLKRQ7# / GPIO46
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
R198 2
1 1M_0402_5%
Y2
+3VS
C229
2 10K_0402_5% CLKREQ_WLAN#_R
27P_0402_50V8J
2010/10/1
Issued Date
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
PCH_X2
1 25MHZ_20PF_X5H025000DK1H1
C230
27P_0402_50V8J
A
Security Classification
@
2
1
C228
22P_0402_50V8J
1
10_0402_5%
PCH_X1
For EMI
BD82CPDS-QMZP-B0_FCBGA942
R200 1
BD15
REFCLK14IN
PCIECLKRQ5# / GPIO44
FLEX CLOCKS
AV44
4.7K_0402_5%
4.7K_0402_5%
Q4A
2N7002KDWH_SOT363-6
CLK_PCILOOP
AB3
AA2
R157
R158
PCH_SMLCLK1
CLKOUT_PCIE3N
CLKOUT_PCIE3P
+3VS
1 0.1U_0402_16V7K
1 0.1U_0402_16V7K
H17
J17
E21
B21
PCH_SMBCLK
BR49
SMBUS
C226 2
C227 2
PCIE_PRX_WLANTX_N3
PCIE_PRX_WLANTX_P3
PCIE_PTX_WLANRX_N3
PCIE_PTX_WLANRX_P3
C218 1
C219 1
BT47
SMBDATA
2 R155
[42]
[42]
[42]
[42]
TV
PERN2
PERP2
PETN2
PETP2
Link
WLAN
PCIE_PRX_WLANTX_N3
PCIE_PRX_WLANTX_P3
PCIE_PTX_C_WLANRX_N3
PCIE_PTX_C_WLANRX_P3
P20
R20
C22
A22
BN49
SMBCLK
SMBALERT# / GPIO11
Controller
[42]
[42]
[42]
[42]
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
PCIE_PRX_C_USBTX_N2
PCIE_PRX_C_USBTX_P2
PCIE_PTX_USBRX_N2
PCIE_PTX_USBRX_P2
+3VALW
PCH_GPIO11
CLOCKS
USB30
PCIE_PRX_C_USBTX_N2
PCIE_PRX_C_USBTX_P2
PCIE_PTX_C_USBRX_N2
PCIE_PTX_C_USBRX_P2
PERN1
PERP1
PETN1
PETP1
PCI-E*
[45]
[45]
[45]
[45]
J20
L20
F25
F23
Title
PCH_PCI-E/SMBUS/CLK
Size Document Number
Custom
R ev
0.1
Date:
Sheet
1
14
of
64
2
R204
2
R205
2
R206
1
10K_0402_5%
1
10K_0402_5%
1
10K_0402_5%
SUSWARN#_R
EC_SWI#_R
PCH_GPIO72
PCH_RSMRST#
1
10K_0402_5%
PM_PWROK
1
10K_0402_5%
2
R208
2
R209
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
D33
A36
B37
E37
DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN
[6]
[6]
[6]
[6]
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
B33
B35
C36
F38
DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP
[6]
[6]
[6]
[6]
DMI_PTX_CRX_N0
DMI_PTX_CRX_N1
DMI_PTX_CRX_N2
DMI_PTX_CRX_N3
DMI_PTX_CRX_N0
DMI_PTX_CRX_N1
DMI_PTX_CRX_N2
DMI_PTX_CRX_N3
J36
P38
H38
M41
DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
[6]
[6]
[6]
[6]
DMI_PTX_CRX_P0
DMI_PTX_CRX_P1
DMI_PTX_CRX_P2
DMI_PTX_CRX_P3
DMI_PTX_CRX_P0
DMI_PTX_CRX_P1
DMI_PTX_CRX_P2
DMI_PTX_CRX_P3
H36
R38
J38
P41
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP
E31
DMI_ZCOMP
B31
DMI_IRCOMP
A32
DMI2RBIAS
DMI_COMP
2
49.9_0402_1%
1
R210
+1.05VS_VPCH
RBIAS_CPY
2
750_0402_1%
1
R212
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
C42
F45
H41
C46
B45
B47
J43
M43
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
B43
F43
J41
D47
A46
C49
H43
P43
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_INT
H46
FDI_INT
FDI_FSYNC0
B51
FDI_FSYNC0
FDI_FSYNC1
C52
FDI_FSYNC1
FDI_LSYNC0
E49
FDI_LSYNC0
FDI_LSYNC1
D51
FDI_LSYNC1
DSWVRMEN
BR42
DSWVREN
DPWROK
BT37
PCH_DPWROK
WAKE#
BC44
PCIE_WAKE#
CLKRUN# / GPIO32
BC56
PM_CLKRUN#
SUS_STAT# / GPIO61
BN54
SUS_STAT#
SUSCLK / GPIO62
BA47
SLP_S5# / GPIO63
BH50
PM_SLP_S5#
SLP_S4#
BN52
PM_SLP_S4#
FDI
+3VALW
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI
U4C
[6]
[6]
[6]
[6]
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
PCH_DPWROK
1
@ R207
FDI_INT [6]
+RTCVCC
FDI_FSYNC0 [6]
FDI_FSYNC1 [6]
DSWVREN
XDP_DBRESET# BE52
[5] XDP_DBRESET#
O
IN2
SYS_PWROK
4
R211
10K_0402_5%
PM_PWROK
PWROK_R
2
0_0402_5%
1
@ R215
DRAMPWROK
[5] DRAMPWROK
SUSACK#
SUSWARN#_R
1
0_0402_5%
@
2
R217
SUSACK#
SYS_RESET#
BJ53
SYS_PWROK
BJ38
PWROK
BC46
APWROK
BG46
DRAMPWROK
[49] PCH_RSMRST#
[49] SUSWARN#
[49] PBTN_OUT#
+3VALW
1
R1063
@
1
R219
@
1
R1064
@
2
R220
PCH_RSMRST#_RBK38
2
0_0402_5%
RSMRST#
IN1
[49] PM_PWROK
U9
SN74AHC1G08DCKR_SC70-5
BP45
[49,58] VGATE
SUSACK#
0.1U_0402_16V4Z
1
2
C231
+3VS
SUSCLK_P
FDI_LSYNC1 [6]
T69
PAD
T253
PAD
+3VS
32.768 KHz
@
PM_CLKRUN# R218
+3VALW
PM_SLP_S4# [49]
BM53
PM_SLP_S3#
PBTN_OUT#_R
2
0_0402_5%
BT43
PWRBTN#
SLP_A#
BC41
PM_SLP_A#
T70
PAD
BG43
GPIO31
SLP_SUS#
BD43
PM_SLP_SUS#
T71
PAD
PM_SLP_S3# [49]
PCIE_WAKE#
PCH_GPIO29
R221 1
R222 1
PCH_GPIO72
[49] EC_SWI#
2EC_SWI#_R
0_0402_5%
AV46
BJ48
BATLOW# / GPIO72
PMSYNCH
RI#
SLP_LAN# / GPIO29
F55
H_PM_SYNC
BH49
PCH_GPIO29
H_PM_SYNC
H_PM_SYNC [5]
2 1K_0402_5%
2 10K_0402_5%
1
R1009
2 8.2K_0402_5%
PM_SLP_S5# [49]
BU46
PCH_GPIO31
2 390K_0402_5%
PCIE_WAKE# [42,43,45]
SUSWARN#_R
2
0_0402_5%
1
10K_0402_5%
R213 1
FDI_LSYNC0 [6]
*
SYS_PWROK
PCH_RSMRST#
2
0_0402_5%
2
0.1U_0402_16V4Z
BD82CPDS-QMZP-B0_FCBGA942
B
2010/10/1
Issued Date
Security Classification
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
PCH_DMI/FDI/PM
Size Document Number
Custom
R ev
0.1
Date:
Sheet
1
15
of
64
L_BKLTEN
AG17
L_VDD_EN
AG12
L_BKLTCTL
P22
L31
L33
M38
L36
Y18
Y17
AB18
AB17
BM46
BA27
BC49
AE49
AE41
AE43
AE50
BA36
AY36
Y14
Y12
H31
J27
J25
L22
J31
L27
L25
J22
C29
F28
C26
B25
E29
E27
B27
D25
TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20
TP21
TP22
TP23
TP24
TP25
TP26
TP27
TP28
TP29
TP30
TP31
TP32
TP33
TP34
TP35
TP36
T73
PAD
T74
PAD
PCH_PWM
T75
T76
T77
T78
T80
T82
T83
T84
T85
T86
T88
T89
T91
T93
T95
T97
T99
T101
T103
T105
T106
T107
T108
T109
T110
T111
T112
T113
T114
T115
T116
T117
T118
T119
T120
T121
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
U9
U8
SDVO_STALLN
SDVO_STALLP
U5
W3
SDVO_INTN
SDVO_INTP
T3
U2
PAD
PAD
PAD
UMA_CRT_B
UMA_CRT_G
UMA_CRT_R
AM1
AN2
AN6
CRT_BLUE
CRT_GREEN
CRT_RED
T232
T233
PAD
PAD
UMA_CRT_CLK
UMA_CRT_DATA
AW3
AW1
CRT_DDC_CLK
CRT_DDC_DATA
T234
T235
PAD
PAD
UMA_CRT_HSYNC
UMA_CRT_VSYNC
AR4
AR2
CRT_HSYNC
CRT_VSYNC
CRT_IREF
1
1K_0402_0.5%
AT3
AM6
DAC_IREF
CRT_IRTN
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA
UMA_HDMI_CLK
UMA_HDMI_DATA
PAD
PAD
T199
T200
R9
R8
T1
DDPB_AUXN
DDPB_AUXP
HDMI_HPD
PAD
PAD
PAD
T201
T202
T203
R12
R14
M12
M11
K8
H8
M3
L5
UMA_HDMI_TX2UMA_HDMI_TX2+
UMA_HDMI_TX1UMA_HDMI_TX1+
UMA_HDMI_TX0UMA_HDMI_TX0+
UMA_HDMI_TXCUMA_HDMI_TXC
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
T90
T92
T94
T96
T98
T100
T102
T104
AL12
AL14
PCH_HDMI_CLK
PCH_HDMI_DATA
AL15
AL17
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
T229
T230
T231
2
R246
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_CTRLCLK
SDVO_CTRLDATA
AG18
UMA_ENVDD
U4D
UMA_ENBKL
RSVD
[49] UMA_ENBKL
UMA@
PCH_HDMI_CLK [36]
PCH_HDMI_DATA [36]
R242 2
1 100K_0402_5%
+3VS
DIS@
U12
U14
N2
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_AUXN
DDPC_AUXP
DDPC_HDP
J3
L2
G4
G2
F5
F3
E2
E4
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
CRT
PCH_HDMI_TX2- [36]
PCH_HDMI_TX2+ [36]
PCH_HDMI_TX1- [36]
PCH_HDMI_TX1+ [36]
PCH_HDMI_TX0- [36]
PCH_HDMI_TX0+ [36]
PCH_HDMI_CLK- [36]
PCH_HDMI_CLK+ [36]
AL9
AL8
PCH_HDMIOUT_CLK
PCH_HDMIOUT_DATA
R6
N6
M1
DDPD_AUXN
DDPD_AUXP
DDPD_HDP
B5
D5
D7
C6
C9
B7
B11
E11
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
DDPC_HDP
PAD T204
PAD T205
DDPC_HDP [36]
R243 1
2 100K_0402_5%
HDMI
(To Scale)
PCH_HDMIOUT_CLK [38]
PCH_HDMIOUT_DATA [38]
PAD T220
PAD T221
DDPD_HDP [38]
DDPD_HDP
PCH_HDMIOUT_TX2- [38]
PCH_HDMIOUT_TX2+ [38]
PCH_HDMIOUT_TX1- [38]
PCH_HDMIOUT_TX1+ [38]
PCH_HDMIOUT_TX0- [38]
PCH_HDMIOUT_TX0+ [38]
PCH_HDMIOUT_CLK- [38]
PCH_HDMIOUT_CLK+ [38]
R1586 1
2 100K_0402_5%
HDMI OUT
(To Conn.)
BD82CPDS-QMZP-B0_FCBGA942
2010/10/1
Issued Date
Security Classification
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
PCH_CRT/LVDS/HDMI
Size Document Number
Custom
R ev
0.1
Date:
Sheet
1
16
of
64
PCI PU resistor
+3VS
R253
R254
R255
R256
R259
R260
R261
R262
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
PCI_DEVSEL#
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
@ R250
0_0402_5%
2
PCI_STOP#
PCI_PERR#
PCI_SERR#
PCI_PLOCK#
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
+3VS
D
U4E
1
1
1
1
1
DGPU_HOLD_RST#
PCH_GPIO52
DGPU_PWR_EN
2 8.2K_0402_5%
2 8.2K_0402_5%
2 8.2K_0402_5%
2
2
2
2
PCH_GPIO2
PCH_GPIO3
PCH_GPIO4
CR_CPPE#
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
GPIO19
0
0
1
1
0
1
0
1
FRAME#
BC11
PCI_FRAME#
IRDY#
BF11
PCI_IRDY#
+3VS
TRDY#
BC8
PCI_TRDY#
STOP#
BC12
PCI_STOP#
PAR
BH8
PAR
PERR#
BM3
PCI_PERR#
P
Y
PCIRST#
PLT_RST#
PLT_RST# [5,22,45,49]
R257
100K_0402_5%
+3VS
PAD
T122
1
PCI_SERR#
BR6
AV14
PLOCK#
BA17
PCI_PLOCK#
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
BF36
BD36
BC33
BA33
BM33
BM35
BT33
BU32
BR32
BT31
BN29
BM30
BK33
BJ33
BF31
BD31
BN27
BR29
BR26
BT27
BK25
BJ25
BJ31
BK31
BF27
BD27
BJ27
BK27
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USBRBIAS#
BP25
USBBIAS
USBRBIAS
BM25
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
BM43
BD41
BG41
BK43
BP43
BJ41
BT45
BM45
C1048
0.1U_0402_16V4Z
+3VS
SERR#
NC7SZ08P5X_NL_SC70-5
PCH_PLT_RST#
2
U10
2 B
U57
NC7SZ08P5X_NL_SC70-5
PLT_A_RST# [42,43,44]
1
R276
R277
R278
R279
1
1
1
PCI_DEVSEL#
R1067
100K_0402_5%
2
R270
R271
R272
BH9
DEVSEL#
+3VS
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
BF15
BF17
BT7
BT13
BG12
BN11
BJ12
BU9
BR12
BJ3
BR9
BJ10
BM8
BF3
BN2
BE4
BE6
BG15
BC6
BT11
BA14
BL2
BC4
BL4
BC2
BM13
BA9
BF9
BA8
BF8
AV17
BK12
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCH_REQ0#
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
2
2
2
2
2
PCI
1
1
1
1
1
LPC
Reserved
BN4
C/BE0#
PCI
BP7
C/BE1#
SPI
BG2
C/BE2#
BP13
C/BE3#
*
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCH_REQ0#
DGPU_HOLD_RST#
PCH_GPIO52
DGPU_PWR_EN
[22] DGPU_HOLD_RST#
[26,60] DGPU_PWR_EN
BK10
BJ5
BM15
BP5
BG5
BT5
BK8
AV11
EHCI 1
PIRQA#
PIRQB#
PIRQC#
PIRQD#
REQ0#
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54
Have internal PU
T195
T196
T197
T198
PAD
PAD
PAD
PAD
CR_CPPE#
T123PAD
[14] CLK_PCILOOP
[49] CLK_PCI_EC
PCH_GNT0#
PCH_GNT1#
PCH_GNT2#
PCH_GNT3#
BA15
AV8
BU12
BE2
GNT0#
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55
PCH_GPIO2
PCH_GPIO3
PCH_GPIO4
CR_CPPE#
BN9
AV9
BT15
BR4
PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5
PCI_PME#
AV15
PME#
PCH_PLT_RST#
BK48
PLTRST#
AT11
AN14
AT12
AT17
AT14
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4
T179 PAD
T180 PAD
22_0402_5% 1
2 R281 CLK_PCILOOP_R
22_0402_5% 1
2 R282 CLK_PCI_EC_R
T181 PAD
USB
R263
R264
R266
R267
R269
C1047
0.1U_0402_16V4Z
EHCI 2
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
[46]
[46]
[46]
[46]
[50]
[50]
[50]
[50]
[40]
[40]
[41]
[41]
PAD T254
PAD T255
USB20_N8 [41]
USB20_P8 [41]
USB20_N9 [41]
USB20_P9 [41]
USB20_N10 [42]
USB20_P10 [42]
Reserve
USB_OCI
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
1
R280
2
22.6_0402_1%
USB_OCI [45,46]
USB_OC#2 [40,41]
USB_OC#4 [41]
+3VALW
USB_OCI
USB_OC#1
USB_OC#4
USB_OC#2
USB_OC#3
USB_OC#5
USB_OC#6
USB_OC#7
BD82CPDS-QMZP-B0_FCBGA942
R283 1
R284 1
R285 1
R286 1
R287 1
R288 1
R1011 1
R1012 1
2
2
2
2
2
2
2
2
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
2010/10/1
Issued Date
Security Classification
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
PCH_PCI/USB/NAND
Size Document Number
Custom
R ev
0.1
Date:
Sheet
1
17
of
64
2
2
EC_SMI#
GPIO69_H@
R1031
10K_0402_5%
+3VS
1
+3VS
1
+3VS
GPIO70_H@
R1033
10K_0402_5%
GPIO71_H@
R1035
10K_0402_5%
GPIO69_L@
R1032
10K_0402_5%
PCH_GPIO71
PCH_GPIO70
PCH_GPIO69
GPIO70_L@
R1034
10K_0402_5%
GPIO71_L@
R1036
10K_0402_5%
R300
10K_0402_5%
PROJECT ID TABLE
+3VALW
Project ID
SKU1
SKU2
SKU3
SKU4
x
x
x
x
x
x
x
x
PCH_GPIO0
2
10K_0402_5%
PCH_GPIO1
2
10K_0402_5%
USB30_SMI#_R
2
10K_0402_5%
EC_SCI#
2
10K_0402_5%
PCH_GPIO16
2
10K_0402_5%
VGA_PWROK_R
2
10K_0402_5%
PCH_GPIO22
2
10K_0402_5%
PCH_GPIO34
2
10K_0402_5%
PCH_GPIO38
2
10K_0402_5%
PCH_GPIO39
2
10K_0402_5%
PCH_GPIO49
2
10K_0402_5%
PCH_GPIO35
1
2.2K_0402_5%
1
R307
1
R308
1
R310
1
R311
1
R312
1
R315
1
R317
1
R318
1
R1068
1
R319
1
R321
2
R1030
GPIO8
PCH_GPIO15
1
1K_0402_5%
PCH_GPIO12
2
10K_0402_5%
PCH_GPIO57
2
10K_0402_5%
2
R296
1
R303
1
R298
+3VS
+3VALW
R331
1K_0402_5%
@
+3VS
U4F
2
R325
1
10K_0402_5%
PCH_GPIO27
BT_LED#
BR19
[60] VGA_PWROK
TACH1 / GPIO1
TACH5 / GPIO69
BM18
PCH_GPIO69
GATEA20
TACH2 / GPIO6
TACH6 / GPIO70
BN17
PCH_GPIO70
KB_RST#
[49] EC_SCI#
BR16
TACH3 / GPIO7
TACH7 / GPIO71
BP15
PCH_GPIO71
[49] EC_SMI#
EC_SMI#
BP51
GPIO8
PCH_GPIO12
BK50
LAN_PHY_PWR_CTRL / GPIO12
PCH_GPIO15
BM55
GPIO15
A20GATE
BB57
GATEA20
PCH_GPIO16
AU56
SATA4GP / GPIO16
1
R1065
VGA_PWROK_R
0_0402_5%
PCH_GPIO22
+3VALW
SCLOCK / GPIO22
GPIO24 / MEM_LED
PCH_GPIO27
BJ43
GPIO27
PCH_GPIO28
BJ55
GPIO28
PCH_GPIO34
BL56
STP_PCI# / GPIO34
PCH_GPIO35
BJ57
2
1
BB55
BG53
BE54
SLOAD / GPIO38
PCH_GPIO39
BF55
SDATAOUT0 / GPIO39
AW53
SDATAOUT1 / GPIO48
ISDBT_DET
PCH_PECI_R
BG56
KB_RST#
PROCPWRGD
D53
H_PWRGOOD
THRMTRIP#
E56
PCH_GPIO49
BA56
SATA5GP / GPIO49
PCH_GPIO57
BT53
GPIO57
A4
VSS_NCTF[1]
A6
VSS_NCTF[2]
B2
VSS_NCTF[3]
BM1
VSS_NCTF[4]
BM57
VSS_NCTF[5]
BP1
VSS_NCTF[6]
BP57
VSS_NCTF[7]
BT2
VSS_NCTF[8]
BU4
VSS_NCTF[9]
BU52
VSS_NCTF[10]
BU54
VSS_NCTF[11]
BU6
VSS_NCTF[12]
D1
VSS_NCTF[13]
F1
VSS_NCTF[14]
ISDBT_DET
+3VS
BN56
NC_1
AY20
TS_VSS1
A54
TS_VSS2
A52
TS_VSS3
F57
TS_VSS4
D57
H_PECI [5,49]
KB_RST# [49]
H_PWRGOOD
C1597
H_PWRGOOD [5]
GATEA20
C1596
H_THERMTRIP# [5]
C1613
0.1U_0402_16V4Z
1
1
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
NV_CLE
PWM0
PWM1
PWM2
PWM3
BN21
BT21
BM20
BN19
SST
BC43
RESERVED [29]
RESERVED [28]
RESERVED [27]
RESERVED [26]
RESERVED [25]
RESERVED [24]
RESERVED [23]
RESERVED [22]
RESERVED [21]
RESERVED [20]
RESERVED [19]
RESERVED [18]
RESERVED [17]
RESERVED [16]
RESERVED [15]
RESERVED [14]
RESERVED [13]
RESERVED [12]
RESERVED [11]
RESERVED [10]
RESERVED [9]
RESERVED [8]
RESERVED [7]
RESERVED [6]
RESERVED [5]
RESERVED [4]
RESERVED [3]
RESERVED [2]
RESERVED [1]
+1.8VS
R328
2.2K_0402_5%
NV_CLE
2
R329
M48
K50
K49
AB46
G56
Y44
L53
AB50
Y50
K46
L56
J55
F53
H52
E52
AB49
AB44
U49
R44
U50
U46
U44
H50
Y41
R50
M50
M49
U43
J57
1
1K_0402_5%
H_SNB_IVB# [5]
1
NV_CLE
1
C1598
C243
0.1U_0402_16V4Z
@
2
0.1U_0402_16V4Z
BD82CPDS-QMZP-B0_FCBGA942
ISDBT_DET
R320
10K_0402_5%
2
0_0402_5%
SATA3GP / GPIO37
NCTF
PCH_GPIO36
2
10K_0402_5%
PCH_GPIO37
2
10K_0402_5%
@
1
R306
INIT3_3V#
DF_TVS
1
R1071
1
R1072
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
GATEA20 [49]
H48
PECI
RCIN#
SATA2GP / GPIO36
PCH_GPIO38
1
R297
1
R299
1
R301
GPIO35 / NMI#
PCH_GPIO37
PCH_GPIO28
[42] ISDBT_DET
TACH0 / GPIO17
BP53
PCH_GPIO36
R305
1K_0402_5%
BT17
BA53
T126PAD
R330
1K_0402_5%
@
BT_LED#
BT_LED# [49]
BA22
BU16
USB30_SMI#_R
0_0402_5%
EC_SCI#
1
R1101
TACH4 / GPIO68
For OPT
GPIO28
BMBUSY# / GPIO0
+3VALW
AW55
[45] USB30_SMI#
2PCH_GPIO0
0_0402_5%
PCH_GPIO1
1
@ R1647
CPU/MISC
[38] DGPU_HPD_INT#
GPIO
2010/10/1
Issued Date
Security Classification
R326
47K_0402_5%
@
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
PCH_CPU/GPIO
Size Document Number
Custom
R ev
0.1
Date:
Sheet
1
18
of
64
+1.05VS_VPCH
C258
C254
C255
C256
C257
C297
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
U4G
Near Y20
F20
F30
V25
V27
V31
V33
Y24
Y26
Y30
Y32
Y34
POWER
VCCIO_24
VCCIO_25
VCCIO_26
VCCIO_27
VCCIO_28
VCCIO_29
VCCIO_30
VCCIO_31
VCCIO_32
VCCIO_33
VCCIO_34
AA34
AA36
VCCIO_22
VCCIO_23
V22
Y20
Y22
VCCIO_35
VCCIO_36
VCCIO_37
+1.05VS_VPCH
AC24
AC26
AC28
AC30
AC32
AE24
AE28
AE30
AE32
AE34
AE36
AG32
AG34
AJ32
AJ34
AJ36
AL32
AL34
AN32
AN34
AR32
AR34
VCCCORE_1
VCCCORE_2
VCCCORE_3
VCCCORE_4
VCCCORE_5
VCCCORE_6
VCCCORE_7
VCCCORE_8
VCCCORE_9
VCCCORE_10
VCCCORE_11
VCCCORE_12
VCCCORE_13
VCCCORE_14
VCCCORE_15
VCCCORE_16
VCCCORE_17
VCCCORE_18
VCCCORE_19
VCCCORE_20
VCCCORE_21
VCCCORE_22
1U_0402_6.3V6K
Voltage Rail
1
C244
10U_0603_6.3V6M
C245
2
C246
2
C247
2
1U_0402_6.3V6K
S0 Iccmax
Current (A)
Voltage
V_PROC_IO
1.05
1mA
V5REF
1mA
V5REF_SUS
1mA
2
1U_0402_6.3V6K
VCC3_3
3.3
409mA
VCCADAC
3.3
68mA
VCCADPLLA
1.05
VCCADPLLB
1.05
100mA
100mA
VCCCORE
1.05
1600mA
VCCDMI
1.05
57mA
VCCIO
1.05
4070mA
VCCASW
1.05
1610mA
VCCSPI
3.3
20mA
VCCDSW
3.3
3mA
VCCDFTERM
1.8
200mA
VCCRTC
3.3
6 uA
3.3
97mA
+1.05VS_VPCH
C
+1.05VS_VPCH
+VCCP_VCCDMI
+1.05VS_VPCH
C250
1U_0402_6.3V6K
C306
1U_0402_6.3V6K
VCCIO_8
VCCIO_9
VCCIO_10
AG38
AG40
VCCIO_20
VCCIO_21
AG41
VCCASW_3
VCCASW_2
VCCASW_1
AU34
AV36
AU32
VCCDIFFCLKN_1
VCCDIFFCLKN_2
VCCDIFFCLKN_3
VCCCLKDMI
VCCIO_18
AE15
AE17
AG15
AJ20
AE40
VCCDMI_1
AL40
AN40
AN41
VCCIO_7
+VCCSATAPLL
@ C305
1 C304
1
+1.05VS_VPCH
@ R352
+1.05VS_VPCH
+VCCAPLLEXP
+1.05VS_VPCH
1 @ C252
Near B53
2
L6
2
0_0603_5%
1
@ L1
2
@ R342
@
1U_0402_6.3V6K
10U_0603_6.3V6M
@ C251 1
+1.05VS_VPCH
R348
2
+1.05VS_VPCH
1
@
L3
+VCCSATAPLL
1
10UH_LB2012T100MR_20%
+VCCDPLL_CPY
+VCCAPLLEXP
2
1UH_LB2012T1R0M_20%
+1.05VS_VCCAPLL_FDI
1
0_0603_5%
@ C263
1U_0402_6.3V6K
1
2
0_0603_5%
+VCCACLK
1
2
+VCCAPLL_CPY_PCH
U56
+1.05VS_VPCH
C54
VCCAFDIPLL
VCCIO_13
V36
VCCIO_12
Y36
AL5
VCCACLK
VCCIO_11
AJ38
A19
VCCAPLLDMI2
VCCIO_14
Y28
VCCSusHDA
10mA
VCCVRM
1.5
159mA
VCCCLKDMI
1.05
20mA
VCCSSC
1.05
105mA
VCCDIFFCLKN
1.05
55mA
+1.05VS_VPCH
1
C308
3.3 / 1.5
+1.05VS_VPCH
0_0603_5%
2
+1.05VS_VPCH
AV24
AV26
AY25
AY27
VCCIO_1
VCCIO_2
VCCIO_3
VCCIO_4
VCCSUS3_3
+1.05VS_VPCH
AC20
AE20
VCCAPLLEXP
@ R353
0_0805_5%
@ R367
1
+1.05VS_VCCDIFFCLKN
VCCSSC_1
VCCSSC_2
VCCAPLLSATA
VCCIO_19 PLL
+1.05VS_SSCVCC
B53
BA38
C281
1
C299
1U_0402_6.3V6K
Near AC20
C307
1U_0402_6.3V6K
+1.05VS_VPCH
C282
1
10U_0603_6.3V6M
Near U56
1U_0402_6.3V6K
10U_0603_6.3V6M
C283
1
10U_0805_10V4Z
E41
C253
1U_0402_6.3V6K
C284
1U_0402_6.3V6K
VCCASW_4
VCCASW_5
VCCASW_6
VCCASW_7
VCCASW_8
VCCASW_9
VCCASW_10
VCCASW_11
VCCASW_12
VCCASW_13
VCCASW_14
VCCASW_15
VCCASW_16
VCCASW_17
VCCASW_18
VCCASW_19
VCCASW_20
VCCASW_21
VCCASW_22
VCCASW_23
VCCDMI_2
1U_0402_6.3V6K
+1.05VS_VCCASW
1U_0402_6.3V6K
@ R337
0_0805_5%
AG24
AG26
AG28
AJ24
AJ26
AJ28
AL24
AL28
AN22
AN24
AN26
AN28
AR24
AR26
AR28
AR30
AR36
AR38
AU30
AU36
2
@ R368
0_0603_5%
10UH_LB2012T100MR_20%
BD82CPDS-QMZP-B0_FCBGA942
+1.05VS_VCCDIFFCLKN
+1.05VS_VPCH
+VCCAPLL_CPY_PCH
@ C275
Near A19
@
C259
10U_0603_6.3V6M
1 @ C276
1U_0402_6.3V6K
10U_0603_6.3V6M
C260
1U_0402_6.3V6K
C303
10U_0603_6.3V6M
Near AJ20
C302
1U_0402_6.3V6K
2010/10/1
Near AE15 2
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Security Classification
Issued Date
Title
PCH_POWER-1
Size Document Number
Custom
R ev
0.1
Date:
Sheet
1
19
of
64
U4J
+PCH_V5REF_RUN BF1
@ R374
0_0603_5%
+VCCSUSHDA
2
+3VS
1
C318
0.1U_0402_16V4Z
+3VALW
+3VS
0_0805_5%
2
2
R343
1
1
+3VS_VCCSPI
0_0805_5%
R344 @
C264
1U_0402_6.3V6K
AN52
VCCSPI
VCCPNAND_01
VCCPNAND_02
T55
T57
Near T55
1
VCC3_3_5
VCC3_3_6
AL38
AN38
VCC3_3_2
VCC3_3_3
VCC3_3_4
BC17
BD17
BD20
+3VS
C285
VCC3_3_8
VCC3_3_1
D5
RB751V40_SC76-2
1
Near BD17
+PCH_V5REF_SUS
Near Al38
C298
0.1U_0402_10V7K
C271
1U_0402_6.3V6K
2
1
C290
+3VS
C296
0.1U_0402_10V7K
R1069
100_0402_5%
A12
AF57
+3VALW
+5VALW
C286
Near BC17
+PCH_V5REF_RUN
C262
0.1U_0402_10V7K
Near AU20
C287
1U_0402_6.3V6K
Connect VCCVRM to
--> 1.8V for DT
--> 1.5V for Mobile
R335
0_0603_5%
2
+1.8VS
VCC3_3_9
VCC3_3_10
VCC3_3_7
0.1U_0402_10V7K
C277
AU20
AV20
AU22
D6
RB751V40_SC76-2
100_0402_5%
VCCSUSHDA
+VCCAFDI_VRM
0.1U_0402_10V7K
+3VS
VCCVRM_1
VCCVRM_4
VCCVRM_3
VCCVRM_2
V5REF_SUS
AV28
+1.8VS
AJ1
R2
R54
R56
0.1U_0402_10V7K
Intel suggest
R351
100ohm+1uF
+5VS
1
POWER
V5REF
USB
+3VALW
+PCH_V5REF_SUS BT25
Near A12
+3VALW
Near BT25
VCCDSW3_3
V_PROC_IO
V_PROC_IO_NCTF
+VCCA_DAC
+1.05VS_VCCADPLLA
1
1
C248
@
220U_6.3V_M
C249
1U_0402_6.3V6K
+1.05VS_VCCADPLLB
AT1
VCCADPLLA
AC2
VCCADPLLB
C291
1
@ R350
+3VALW
2
0_0603_5%
+1.05VS_VPCH
Near AV40
C280 0.1U_0402_10V7K
1
2
A39
AA32
+VCCSUS
VCCRTC
BU42
+RTCVCC
DCPRTC
DCPRTC_NCTF
DCPSUS_2
BR54
BT56
AT41
+VCCRTCEXT
DCPSUSBYP
AV41
+VCCDCPSUS
DCPSST
BA46
+VCCSST
VCCADAC
AB1
C272 0.1U_0402_10V7K
1
2
C289
C314
Near A39
+RTCVCC
Near BR54
1
2
C300
0.1U_0402_10V7K
+VCCSUS
Near BA46
C309
0.1U_0402_10V7K
C312
1
C315
1U_0402_6.3V6K
C313
4.7U_0603_6.3V6K
+V_CPU_IO
Near U31
C279
0.1U_0402_10V7K
R332
1_0603_5%
+VCCDSW
D55
B56
0.1U_0402_10V7K
Layout Note:
Close to AT1< 100 mil
AV40
DCPSUS_3
DCPSUS_1
+3VS
U31
Near AV30
C288
1U_0402_6.3V6K
VCCSUS3_3_1
Near BT35
C278
0.1U_0402_10V7K
VCCSUS3_3_9
VCCSUS3_3_10
AT40
AU38
0.1U_0402_10V7K
AV30
AV32
AY31
AY33
BJ36
BK36
BM36
2.2U_0603_10V6K
VCCSUS3_3_2
VCCSUS3_3_3
VCCSUS3_3_4
VCCSUS3_3_5
VCCSUS3_3_6
VCCSUS3_3_7
VCCSUS3_3_8
0.1U_0402_10V7K
VCCSUS3_3_11
BT35
2
@ R371
0_0603_5%
2
B
+1.05VS_VPCH
@ R373
1
2
1
0_0603_5%
B520
not connect?
C274
0.1U_0402_10V7K
@
BD82CPDS-QMZP-B0_FCBGA942
+RTCVCC
+1.05VS_VPCH
L4
10UH_LB2012T100MR_20%
1
2
L5
1
2
10UH_LB2012T100MR_20%
A
C317
0.1U_0402_10V7K
C316
1U_0402_6.3V6K
2
+1.05VS_VCCADPLLB
1
C292 +
220U_B2_2.5VM_R15
Layout Note:
Close to AB1,AC2< 100 mil
Filter no need if int. GFx diisabled
@ R360
0_0603_5%
2
+1.05VS_VCCADPLLA
C293 +
Near BU42
1
C294
C295
1U_0402_6.3V6K
1U_0402_6.3V6K
2
2
2
220U_B2_2.5VM_R15
Issued Date
Security Classification
2010/10/1
2011/11/01
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
PCH_POWER-2
Size Document Number
Custom
Rev
0.1
Date:
Sheet
20
of
64
U4H
AE56
VSS[0]
BR36
C12
AY22
A26
A29
A42
A49
A9
AA20
AA22
AA24
AA26
AA28
AA30
AA38
AB11
AB15
AB40
AB41
AB43
AB47
AB52
AB57
AB6
AC22
AC34
AC36
AC38
AC4
AC54
AE14
AE18
AE22
AE26
AE38
AE4
AE47
AE8
AE9
AF52
AF6
AG11
AG14
AG20
AG22
AG30
AG36
AG43
AG44
AG46
AG5
AG50
AG53
AH52
AH6
AJ22
AJ30
AJ57
AK52
AK6
AL11
AL18
AL20
AL22
AL26
AL30
AL36
AL41
AL46
AL47
AM3
AM52
AM57
AN11
AN12
AN15
AN17
AN18
AN20
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
U4I
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
AN30
AN36
AN4
AN43
AN47
AN54
AN9
AR20
AR22
AR52
AR6
AT15
AT18
AT43
AT47
AT52
AT6
AT8
AU24
AU26
AU28
AU5
AV12
AV18
AV22
AV34
AV38
AV47
AV6
AW57
AY38
AY6
B23
BA11
BA12
BA31
BA41
BA44
BA49
BB1
BB3
BB52
BB6
BC14
BC15
BC20
BC27
BC31
BC36
BC38
BC47
BC9
BD25
BD33
BF12
BF20
BF25
BF33
BF41
BF43
BF46
BF52
BF6
BG22
BG25
BG27
BG31
BG33
BG36
BG38
BH52
BH6
BJ1
BJ15
BK20
BK41
BK52
BK6
BM10
BM12
BM16
BM22
BM23
BM26
BM28
BM32
BM40
BM42
BM48
BM5
BN31
BN47
BN6
BP3
BP33
BP35
BR22
BR52
BU19
BU26
BU29
BU36
BU39
C19
C32
C39
C4
D15
D23
D3
D35
D43
D45
E19
E39
E54
E6
E9
F10
F12
F16
F22
F26
F32
F33
F35
F36
F40
F42
F46
F48
F50
F8
G54
H15
H20
H22
H25
H27
H33
H6
J1
J33
J46
J48
J5
J53
K52
K6
K9
L12
L17
L38
L41
L43
M20
M22
M25
M27
M31
M33
M36
M46
M52
M57
M6
M8
M9
N4
N54
R11
R15
R17
R22
R4
R41
R43
R46
R49
BD82CPDS-QMZP-B0_FCBGA942
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSSADAC
T52
T6
U11
U15
U17
U20
U22
U25
U27
U33
U36
U38
U41
U47
U53
V20
V38
V6
W1
W55
W57
Y11
Y15
Y38
Y40
Y43
Y46
Y47
Y49
Y52
Y6
AL43
AL44
R36
P36
R25
P25
AU2
BD82CPDS-QMZP-B0_FCBGA942
Security Classification
2010/10/1
Issued Date
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
PCH_GND
Size Document Number
Custom
R ev
0.1
Date:
Sheet
1
21
of
64
U58A
PCIE_GTX_C_CRX_P[0..15]
[6] PCIE_GTX_C_CRX_P[0..15]
PCIE_GTX_C_CRX_N[0..15]
[6] PCIE_GTX_C_CRX_N[0..15]
D
PCIE_GTX_C_CRX_P0
PCIE_GTX_C_CRX_N0
PCIE_GTX_C_CRX_P1
PCIE_GTX_C_CRX_N1
PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_N2
PCIE_GTX_C_CRX_P3
PCIE_GTX_C_CRX_N3
PCIE_GTX_C_CRX_P4
PCIE_GTX_C_CRX_N4
PCIE_GTX_C_CRX_P5
PCIE_GTX_C_CRX_N5
PCIE_GTX_C_CRX_P6
PCIE_GTX_C_CRX_N6
PCIE_GTX_C_CRX_P7
PCIE_GTX_C_CRX_N7
PCIE_GTX_C_CRX_P8
PCIE_GTX_C_CRX_N8
PCIE_GTX_C_CRX_P9
PCIE_GTX_C_CRX_N9
PCIE_GTX_C_CRX_P10
PCIE_GTX_C_CRX_N10
PCIE_GTX_C_CRX_P11
PCIE_GTX_C_CRX_N11
PCIE_GTX_C_CRX_P12
PCIE_GTX_C_CRX_N12
PCIE_GTX_C_CRX_P13
PCIE_GTX_C_CRX_N13
PCIE_GTX_C_CRX_P14
PCIE_GTX_C_CRX_N14
PCIE_GTX_C_CRX_P15
PCIE_GTX_C_CRX_N15
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
C1105 1
C1106 1
C1103 1
C1104 1
C1101 1
C1102 1
C1099 1
C1100 1
C1097 1
C1098 1
C1095 1
C1096 1
C1093 1
C1094 1
C1091 1
C1092 1
C1089 1
C1090 1
C1087 1
C1088 1
C1085 1
C1086 1
C1083 1
C1084 1
C1081 1
C1082 1
C1079 1
C1080 1
C1077 1
C1078 1
C1075 1
C1076 1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
PCIE_GTX_CRX_P0
PCIE_GTX_CRX_N0
PCIE_GTX_CRX_P1
PCIE_GTX_CRX_N1
PCIE_GTX_CRX_P2
PCIE_GTX_CRX_N2
PCIE_GTX_CRX_P3
PCIE_GTX_CRX_N3
PCIE_GTX_CRX_P4
PCIE_GTX_CRX_N4
PCIE_GTX_CRX_P5
PCIE_GTX_CRX_N5
PCIE_GTX_CRX_P6
PCIE_GTX_CRX_N6
PCIE_GTX_CRX_P7
PCIE_GTX_CRX_N7
PCIE_GTX_CRX_P8
PCIE_GTX_CRX_N8
PCIE_GTX_CRX_P9
PCIE_GTX_CRX_N9
PCIE_GTX_CRX_P10
PCIE_GTX_CRX_N10
PCIE_GTX_CRX_P11
PCIE_GTX_CRX_N11
PCIE_GTX_CRX_P12
PCIE_GTX_CRX_N12
PCIE_GTX_CRX_P13
PCIE_GTX_CRX_N13
PCIE_GTX_CRX_P14
PCIE_GTX_CRX_N14
PCIE_GTX_CRX_P15
PCIE_GTX_CRX_N15
AL17
AM17
AM18
AM19
AL19
AK19
AL20
AM20
AM21
AM22
AL22
AK22
AL23
AM23
AM24
AM25
AL25
AK25
AL26
AM26
AM27
AM28
AL28
AK28
AK29
AL29
AM29
AM30
AM31
AM32
AN32
AP32
PEX_TX0
PEX_TX0_N
PEX_TX1
PEX_TX1_N
PEX_TX2
PEX_TX2_N
PEX_TX3
PEX_TX3_N
PEX_TX4
PEX_TX4_N
PEX_TX5
PEX_TX5_N
PEX_TX6
PEX_TX6_N
PEX_TX7
PEX_TX7_N
PEX_TX8
PEX_TX8_N
PEX_TX9
PEX_TX9_N
PEX_TX10
PEX_TX10_N
PEX_TX11
PEX_TX11_N
PEX_TX12
PEX_TX12_N
PEX_TX13
PEX_TX13_N
PEX_TX14
PEX_TX14_N
PEX_TX15
PEX_TX15_N
Part 1 of 7
L69
BLM18PG330SN1D_0603
DIS@
1
2
SP_PLLVDD
VID_PLLVDD
R1117
10K_0402_5%
DIS@
2
1
2
1
R1116
10K_0402_5%
DIS@
XTALIN
XTAL_OUT
B1
B2
XTAL_IN
XTAL_OUT
XTALOUT
XTALSSIN
D1
D2
XTAL_OUTBUFF
XTAL_SSIN
2.2K_0402_5% 1
2.2K_0402_5% 1
2 DIS@
2 DIS@
R1122
R1123
I2CB_SCL
I2CB_SDA
G3
G2
I2CB_SCL
I2CB_SDA
CRT
2.2K_0402_5% 1
2.2K_0402_5% 1
2 DIS@
2 DIS@
R1124
R1125
VGA_CRT_CLK G1
VGA_CRT_DATA G4
I2CA_SCL
I2CA_SDA
2.2K_0402_5% 1
2.2K_0402_5% 1
2 DIS@
2 DIS@
R1126
R1128
HDCP_SCL
HDCP_SDA
F6
G6
I2CH_SCL
I2CH_SDA
N12P-GS-A1_BGA_973P
2
100K_0402_5%
2
100K_0402_5%
2
100K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
+3VGS
D
VGA_HDMIOUT_HPD [38]
GPIO Description
GPIO
I/O
ACTIVE
GPIO0
IN
N/A
GPIO1
IN
N/A
GPIO2
OUT
HIGH
GPIO3
OUT
HIGH
GPIO4
OUT
HIGH
GPIO5
OUT
HIGH
NVVDD ALTV0
Y1
Y2
Y3
AB3
AB2
AB1
AC4
AC1
AC2
AC3
AE3
AE2
U6
W6
Y6
GPIO6
OUT
HIGH
NVVDD ALTV1
GPIO7
OUT
HIGH
FBVDDQ ALTV
GPIO8
IN/OUT
LOW
OVERTEMP ALERT
GPIO9
OUT
LOW
THERMAL ALERT
GPIO10
OUT
HIGH
FB_VREF CONTROL
GPIO11
OUT
HIGH
RESERVED
GPIO12
IN
N/A
AC DETECT
GPIO13
OUT
LOW
MIOA_HSYNC_NC
MIOA_VSYNC_NC
N3
L3
GPIO14
OUT
HIGH
LOAD STEP UP
GPIO15
IN
N/A
MIOB_HSYNC_NC
MIOB_VSYNC_NC
W1
W2
GPIO16
IN
N/A
MIOA_DE_NC
MIOA_CTL3_NC
MIOA_VREF_NC
N2
P5
N5
GPIO17
IN
N/A
FAN TACH IN
GPIO18
IN
N/A
RESERVED
MIOB_DE_NC
MIOB_CTL3_NC
MIOB_VREF_NC
Y5
W3
AF1
GPIO19
IN
N/A
GPIO20
IN
N/A
RESERVED
GPIO21
IN
N/A
GPIO22
IN
N/A
RESERVED
GPIO23
IN
N/A
RESERVED
GPIO24
IN
N/A
RESERVED
MIOA_CLKIN_NC
MIOA_CLKOUT_NC
N4
R4
1
R1111
2
DIS@ 10K_0402_5%
MIOB_CLKIN_NC
MIOB_CLKOUT_NC
AE1
V4
1
R1112
2
DIS@ 10K_0402_5%
MIOA_CLKOUT_NC_N
MIOB_CLKOUT_NC_N
T4
W4
MIOACAL_PD_VDDQ_NC
MIOACAL_PU_GND_NC
U5
T5
MIOBCAL_PD_VDDQ_NC
MIOBCAL_PU_GND_NC
AA7
AA6
R1114
150_0402_1%
DIS@ 1
1
1
AM15
AM14
AL14
VGA_CRT_R
VGA_CRT_G
VGA_CRT_B
DACA_HSYNC
DACA_VSYNC
AM13
AL13
VGA_CRT_HSYNC
VGA_CRT_VSYNC
DACA_VDD
DACA_VREF
DACA_RSET
AJ12
AK12
AK13
+DACA_VDD
+DACA_VREF
DACA_RSET
DACA_RED
DACA_GREEN
DACA_BLUE
DACB_RED
DACB_GREEN
DACB_BLUE
AK4
AL4
AJ4
DACB_HSYNC
DACB_VSYNC
AM1
AM2
DACB_VDD
DACB_VREF
DACB_RSET
USAGE
AG7 +DACB_VDD
AK6
AH7
T214
T215
120mA
R1115
150_0402_1%
DIS@
2
2
2
Close to GPU
(Reserve for debug)
R1118
150_0402_1%
DIS@
L70
MMZ1608D301BT_0603
DIS@
1
2
+3VGS
C1117
4.7U_0603_6.3V6K
DIS@
LVDS
CRT
1
DIS@
1
DIS@
1
DIS@
1
DIS@
1
DIS@
1
DIS@
C1116
4.7U_0603_6.3V6K
DIS@
I2CC_SCL
I2CC_SDA
VGA_EDID_CLK E3
VGA_EDID_DATA E4
DIS@
C1119
1U_0402_6.3V6K
DIS@
I2CS_SCL
I2CS_SDA
R1119
R1120
MIOB_D0_NC
MIOB_D1_NC
MIOB_D2_NC
MIOB_D3_NC
MIOB_D4_NC
MIOB_D5_NC
MIOB_D6_NC
MIOB_D7_NC
MIOB_D8_NC
MIOB_D9_NC
MIOBD_10_NC
MIOB_D11_NC
MIOB_D12_NC
MIOB_D13_NC
MIOB_D14_NC
2 10K_0402_5%
C1115
0.1U_0402_16V4Z
DIS@
E2
E1
N1
P4
P1
P2
P3
T3
T2
T1
U4
U1
U2
U3
R6
T6
N6
R1108 1
C1118
0.1U_0402_16V4Z
DIS@
27MHZ_16PF_X5H027000FG1H
DIS@
1
C1120
C1121
DIS@
18P_0402_50V8J
18P_0402_50V8J
DIS@
2
2
AF9
AD9
45mA
1 DIS@
1 DIS@
XTAL_OUT
PLLVDD
2.2K_0402_5% 2
2.2K_0402_5% 2
+3VGS
AE9
45mA
MIOA_D0_NC
MIOA_D1_NC
MIOA_D2_NC
MIOA_D3_NC
MIOA_D4_NC
MIOA_D5_NC
MIOA_D6_NC
MIOA_D7_NC
MIOA_D8_NC
MIOA_D9_NC
MIOA_D10_NC
MIOA_D11_NC
MIOA_D12_NC
MIOA_D13_NC
MIOA_D14_NC
AC DETECT
R1121
124_0402_1%
DIS@
PEX_RST_N
PEX_TERMP
60mA
[23] SMB_CLK_GPU
[23] SMB_DATA_GPU
2
10M_0402_5%
Y8
XTALIN
AM16
AG21
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT_N
K1
K2
K3
H3
H2
H1
H4
H5
H6
J7
K4
K5
H7
J4
J6
L1
L2
L4
M4
L7
L5
K6
L6
M6
M7
C1114
0.1U_0402_16V4Z
DIS@
1
R1130
C1112
0.1U_0402_16V4Z
DIS@
C1111
0.1U_0402_16V4Z
DIS@
C1110
0.1U_0402_16V4Z
DIS@
C1109
0.1U_0402_16V4Z
DIS@
C1107
10U_0603_6.3V6M
DIS@
C1108
10U_0603_6.3V6M
DIS@
150mA
PLTRST_VGA#
1
2
R1113
2.49K_0402_1%
DIS@
+PLLVDD
AJ17
AJ18
PEX_REFCLK
PEX_REFCLK_N
PEX_CLKREQ_N
CLK
+1.05VGS
2 CLK_REQ_GPU#
100K_0402_5%
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#
AR16
AR17
AR13
I2C
DACs
[14] CLK_PCIE_VGA
[14] CLK_PCIE_VGA#
1
+3VGS
R1109 DIS@
R1110
1
2
200_0402_1%
DIS@
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23
GPIO24
[6] PCIE_CTX_C_GRX_N[0..15]
PEX_RX0
PEX_RX0_N
PEX_RX1
PEX_RX1_N
PEX_RX2
PEX_RX2_N
PEX_RX3
PEX_RX3_N
PEX_RX4
PEX_RX4_N
PEX_RX5
PEX_RX5_N
PEX_RX6
PEX_RX6_N
PEX_RX7
PEX_RX7_N
PEX_RX8
PEX_RX8_N
PEX_RX9
PEX_RX9_N
PEX_RX10
PEX_RX10_N
PEX_RX11
PEX_RX11_N
PEX_RX12
PEX_RX12_N
PEX_RX13
PEX_RX13_N
PEX_RX14
PEX_RX14_N
PEX_RX15
PEX_RX15_N
GPIO
PCIE_CTX_C_GRX_N[0..15]
AP17
AN17
AN19
AP19
AR19
AR20
AP20
AN20
AN22
AP22
AR22
AR23
AP23
AN23
AN25
AP25
AR25
AR26
AP26
AN26
AN28
AP28
AR28
AR29
AP29
AN29
AN31
AP31
AR31
AR32
AR34
AP34
PCI EXPRESS
DVO
PCIE_CTX_C_GRX_P[0..15]
[6] PCIE_CTX_C_GRX_P[0..15]
PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_N0
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_N13
PCIE_CTX_C_GRX_P14
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_P15
PCIE_CTX_C_GRX_N15
VGA_SHDMI_HPD
R1517
GPU_VID0
VGA_SHDMI_HPD
R1518
VGA_SHDMI_HPD [36]
VGA_LCD_PWM
GPU_VID1
VGA_LCD_PWM [35]
VGA_ENVDD
R1519
VGA_ENVDD [35]
VGA_BKOFF#_R
VGA_LCD_PWM
VGA_BKOFF#_R [49]
GPU_VID0
R1650
GPU_VID0 [60]
GPU_VID1
VGA_ENVDD
GPU_VID1 [60]
R1651
OVERTEMP ALERT R1520 1
2 100K_0402_5%
+3VGS VGA_BKOFF#_R
R1652
DIS@
THERM#_VGA_R [23]
2
1
R1127
10K_0402_5%
DIS@
GS@
R1625
100_0402_1%
1
2
DIS@
PLTRST_VGA#
DIS@
Security Classification
R1626
100K_0402_5%
DIS@
2009/01/01
Issued Date
Deciphered Date
2010/01/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NC7SZ08P5X_NL_SC70-5
4
1
U95
Y
G
[17] DGPU_HOLD_RST#
[5,17,45,49] PLT_RST#
+3VS
Title
Size
Document Number
R ev
0.1
Sheet
22
of
64
U58D
Part 4 of 7
Display Port/eDP
LinkE
LinkF
[36] VGA_SHDMI_ETXD2+
[36] VGA_SHDMI_ETXD2[36] VGA_SHDMI_ETXD1+
[36] VGA_SHDMI_ETXD1[36] VGA_SHDMI_ETXD0+
[36] VGA_SHDMI_ETXD0[36] VGA_SHDMI_ETXC+
[36] VGA_SHDMI_ETXC-
To HDMI OUT
R1578 1
R1579 1
2 2.2K_0402_5% DIS@
2 2.2K_0402_5% DIS@
AM7
AM6
AL5
AM5
AM3
AM4
AP1
AR2
IFPC_L0
IFPC_L0_N
IFPC_L1
IFPC_L1_N
IFPC_L2
IFPC_L2_N
IFPC_L3
IFPC_L3_N
AR8
AR7
AP7
AN7
AN5
AP5
AR5
AR4
IFPD_L0
IFPD_L0_N
IFPD_L1
IFPD_L1_N
IFPD_L2
IFPD_L2_N
IFPD_L3
IFPD_L3_N
AH6
AH5
AH4
AG4
AF4
AF5
AE6
AE5
IFPE_L0
IFPE_L0_N
IFPE_L1
IFPE_L1_N
IFPE_L2
IFPE_L2_N
IFPE_L3
IFPE_L3_N
AL2
AL3
AJ3
AJ2
AJ1
AH1
AH2
AH3
IFPF_L0
IFPF_L0_N
IFPF_L1
IFPF_L1_N
IFPF_L2
IFPF_L2_N
IFPF_L3
IFPF_L3_N
AP2
AN3
IFPC_AUX_I2CW_SCL
IFPC_AUX_I2CW_SDA_N
AP4
AN4
IFPD_AUX_I2CX_SCL
IFPD_AUX_I2CX_SDA_N
STRAP3
STRAP4 [33]
STRAP3 [33]
VPGOOD
1
R1643
2
10K_0402_5%
GV@
STRAP_REF2
1
R1646
2
40.2K_0402_1%
GV@
+3VGS
To VGA
U60
C1122
THERM_D+
1
VDD_SENSE_0
VDD_SENSE_1
VDD_SENSE_2
D35
P7
AD20
VGA_SENSE [60]
GND_SENSE_0
GND_SENSE_1
GND_SENSE_2
AD19
E35
R7
GND_SENSE [60]
2
@
1
1
0.1U_0402_16V4Z VDD
2 D+
3
THERM_DC1123 @
2200P_0402_50V7K
DTHERM#
SCLK
SMB_CLK_GPU
SMB_DATA_GPU
SDATA
ALERT#
GND
+3VGS
AE4
AD4
[38] VGA_HDMI_ECLK
[38] VGA_HDMI_EDATA
AF3
AF2
IFPE_AUX_I2CY_SCL
IFPE_AUX_I2CY_SDA_N
IFPF_AUX_I2CZ_SCL
IFPF_AUX_I2CZ_SDA_N
TEST
TESTMODE
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST_N
TESTMODE
AP35
AP14
AN14
AN16
AR14
AP16
1
R1141
T216
T217
T218
T219
2
10K_0402_5%
DIS@
SMB_CLK_GPU
R1140
10K_0402_5%
DIS@
SMB_DATA_GPU
A4
W5
W7
V7
[33] STRAP0
[33] STRAP1
[33] STRAP2
ROM_SI [33]
ROM_SO [33]
ROM_SCLK [33]
2 DIS@
1 36K_0402_1%
A5
N9
R1143 1
2 DIS@ 40.2K_0402_1%
MULTI_STRAP_REF1_GND
M9
R1145 1
2 DIS@ 40.2K_0402_1%
THERMDP
THERMDN
B5
B4
CEC
N12P-GS-A1_BGA_973P
R1627
NC/SPDIF_NC
MULTI_STRAP_REF0_GND
BUFRST_N
STRAP0
STRAP1
STRAP2
+3VGS
R754 1
R750 1
U54
@
2 4.7K_0402_5%
@
2 4.7K_0402_5%
@
ROM_CS#
SPI_WP#_VGA
SPI_HOLD#_VGA
GS@
1
3
7
4
CE#
WP#
HOLD#
VSS
VDD
SCK
SI
SO
8
6
5
2
ROM_SCLK
ROM_SI
ROM_SO
MX25L1005AMC-12G_SOP8
@
Issued Date
2010/01/01
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
C1447
0.1U_0402_16V4Z
@
R379
10K_0402_5%
THERM_D+
THERM_D-
Security Classification
To EC
EC_SMB_DA2 [14,49,52]
GENERAL
AB5
EC_SMB_CK2 [14,49,52]
Q75A DIS@
2N7002KDWH_SOT363-6
3
R1144
10K_0402_5%
DIS@
2
Q75B DIS@
2N7002KDWH_SOT363-6
ROM_CS#
ROM_SI
ROM_SO
ROM_SCLK
C3
D3
C4
D4
SERIAL
ROM_CS_N
ROM_SI
ROM_SO
ROM_SCLK
+3VGS
R1136
2.2K_0402_5%
DIS@
2 2.2K_0402_5% DIS@
2 2.2K_0402_5% DIS@
R1135
2.2K_0402_5%
DIS@
+3VGS
To HDMI OUT
R1138 1
R1139 1
THERM#_VGA_R [22]
+3VGS
R1134 DIS@
100K_0402_5%
+3VGS
SMB_DATA_GPU [22]
2
ADM1032ARMZ-2REEL_MSOP8
@
[36] VGA_SHDMI_ECLK
[36] VGA_SHDMI_EDATA
SMB_CLK_GPU [22]
+3VGS
[38] VGA_HDMI_ETXD2+
[38] VGA_HDMI_ETXD2[38] VGA_HDMI_ETXD1+
[38] VGA_HDMI_ETXD1[38] VGA_HDMI_ETXD0+
[38] VGA_HDMI_ETXD0[38] VGA_HDMI_ETXC+
[38] VGA_HDMI_ETXC-
IFPB_TXC
IFPB_TXC_N
IFPB_TXD4
IFPB_TXD4_N
IFPB_TXD5
IFPB_TXD5_N
IFPB_TXD6
IFPB_TXD6_N
IFPB_TXD7
IFPB_TXD7_N
STRAP4
LinkD
AP13
AN13
AN8
AP8
AP10
AN10
AR11
AR10
AN11
AP11
A2
A7
B7
C5
C7
D5
D6
D7
E5
E7
F4
G5
H32
J25
J26
P6
U7
V6
Y4
AA4
AB4
AB7
AC5
AD6
AF6
AG6
AG20
AJ5
AK15
AL7
Display Port/HDMI
NC_0
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
NC_25
NC_26
NC_27
NC_28
NC_29
LinkC
NC
LinkB
IFPA_TXC
IFPA_TXC_N
IFPA_TXD0
IFPA_TXD0_N
IFPA_TXD1
IFPA_TXD1_N
IFPA_TXD2
IFPA_TXD2_N
IFPA_TXD3
IFPA_TXD3_N
LVDS/TMDS
LinkA
AM11
AM12
AM8
AL8
AM10
AM9
AK10
AL10
AK11
AL11
Channel B
Interface Support
LVDS(Single Link or Dual Link
with IFPB)
Channel A
Display
Title
Size
Document Number
R ev
0.1
Sheet
1
23
of
64
+VGA_CORE
+VGA_CORE
+
2
1
+
2
C1130
330U_2.5V_M_R17
DIS@
C1129
330U_2.5V_M_R17
DIS@
C1128
22U_0603_6.3V6M
DIS@
C1127
22U_0603_6.3V6M
DIS@
C1126
22U_0603_6.3V6M
DIS@
+VGA_CORE
+VGA_CORE
+VGA_CORE
U58G
+VGA_CORE
C
C1141
0.022U_0402_25V7K
DIS@
C1140
0.022U_0402_25V7K
DIS@
C1139
0.022U_0402_25V7K
DIS@
C1138
0.01U_0402_25V7K
DIS@
+VGA_CORE
C1146
0.1U_0402_16V7K
DIS@
C1145
0.1U_0402_16V7K
DIS@
C1144
0.047U_0402_25V6K
DIS@
C1143
0.047U_0402_25V6K
DIS@
POWER
C1136
0.01U_0402_25V7K
DIS@
C1135
0.01U_0402_25V7K
DIS@
C1134
0.01U_0402_25V7K
DIS@
C1133
0.01U_0402_25V7K
DIS@
+VGA_CORE
B
C1154
22U_0805_6.3V6M
DIS@
C1153
10U_0603_6.3V6M
DIS@
C1152
10U_0603_6.3V6M
DIS@
C1151
4.7U_0603_6.3V6K
DIS@
C1150
1U_0402_6.3V6K
DIS@
C1149
0.022U_0402_25V7K
DIS@
C1148
0.022U_0402_25V7K
DIS@
C1147
0.022U_0402_25V7K
DIS@
P21
P23
P25
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
T12
T14
T16
T18
T20
T22
T24
V11
V13
V15
V17
V19
V21
V23
V25
W11
W12
W13
W14
W15
W16
W17
W18
W19
W20
W21
W22
W23
W24
W25
Y12
Y14
Y16
Y18
Y20
Y22
Y24
C1142
0.047U_0402_25V6K
DIS@
N12P-GS-A1_BGA_973P
VDD_56
VDD_57
VDD_58
VDD_59
VDD_60
VDD_61
VDD_62
VDD_63
VDD_64
VDD_65
VDD_66
VDD_67
VDD_68
VDD_69
VDD_70
VDD_71
VDD_72
VDD_73
VDD_74
VDD_75
VDD_76
VDD_77
VDD_78
VDD_79
VDD_80
VDD_81
VDD_82
VDD_83
VDD_84
VDD_85
VDD_86
VDD_87
VDD_88
VDD_89
VDD_90
VDD_91
VDD_92
VDD_93
VDD_94
VDD_95
VDD_96
VDD_97
VDD_98
VDD_99
VDD_100
VDD_101
VDD_102
VDD_103
VDD_104
VDD_105
VDD_106
VDD_107
VDD_108
VDD_109
VDD_110
C1137
0.01U_0402_25V7K
DIS@
Part 7 of 7
C1132
0.01U_0402_25V7K
DIS@
VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16
VDD_17
VDD_18
VDD_19
VDD_20
VDD_21
VDD_22
VDD_23
VDD_24
VDD_25
VDD_26
VDD_27
VDD_28
VDD_29
VDD_30
VDD_31
VDD_32
VDD_33
VDD_34
VDD_35
VDD_36
VDD_37
VDD_38
VDD_39
VDD_40
VDD_41
VDD_42
VDD_43
VDD_44
VDD_45
VDD_46
VDD_47
VDD_48
VDD_49
VDD_50
VDD_51
VDD_52
VDD_53
VDD_54
VDD_55
C1131
0.01U_0402_25V7K
DIS@
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB25
AC11
AC12
AC13
AC14
AC15
AC16
AC17
AC18
AC19
AC20
AC21
AC22
AC23
AC24
AC25
AD12
AD14
AD16
AD18
AD22
AD24
L11
L12
L13
L14
L15
L16
L17
L18
L19
L20
L21
L22
L23
L24
L25
M12
M14
M16
M18
M20
M22
M24
P11
P13
P15
P17
P19
GS@
Security Classification
2009/01/01
Issued Date
Deciphered Date
2010/01/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Size
Document Number
R ev
0.1
Sheet
1
24
of
64
U58E
2500mA
+1.5VGS
1
2
PEX_SVDD_3V3
PEX_SVDD_3V3_NC
AG19
F7
R1631 1
2 10K_0402_5%
AG9
AG10
IFPA_IOVDD
IFPB_IOVDD
220mA
285mA
AJ8
IFPC_PLLVDD
IFPC_RSET
DIS@
R1630
@ R1653
+IFPE_IOVDD
AJ6
AL1
285mA
AE7
AD7
285mA
+1.05VGS
L75
2
1 DISO@
BLM18PG181SN1D_0603
1
R1633
10K_0402_5%
DIS@
GS@
+3VGS
R1634
10K_0402_5%
DIS@
R1635
10K_0402_5%
OPT@
1
2
R1636
10K_0402_5%
OPT@
C1213
0.1U_0402_16V4Z
DISO@
R1637
10K_0402_5%
OPT@
C1226
0.1U_0402_16V4Z
DISO@
C1225
1U_0402_6.3V6K
DISO@
C1224
0.1U_0402_16V4Z
DISO@
C1223
0.1U_0402_16V4Z
DISO@
+IFPE_IOVDD
C1222
4.7U_0603_6.3V6K
DISO@
+IFPEF_PLLVDD
C1231
0.1U_0402_16V4Z
DISO@
+1.05VGS
L76
2
1 DISO@
BLM18PG181SN1D_0603
1
AA9
AB9
W9
Y9
C1230
0.1U_0402_16V4Z
DISO@
C1229
0.1U_0402_16V4Z
DISO@
C1228
4.7U_0603_6.3V6K
DISO@
C1217
0.1U_0402_16V4Z
DISO@
C1216
0.1U_0402_16V4Z
DISO@
C1215
1U_0402_6.3V6K
DISO@
+3VGS
MIOB_VDDQ_NC_0
MIOB_VDDQ_NC_1
MIOB_VDDQ_NC_2
MIOB_VDDQ_NC_3
IFPE_IOVDD
IFPF_IOVDD
N12P-GS-A1_BGA_973P
C1214
4.7U_0603_6.3V6K
DISO@
IFPEF_PLLVDD
IFPEF_RSET
+IFPC_IOVDD
1
+3VGS
+1.05VGS
@
R1632
0_0603_5%
1
2
2
1K_0402_1%
1 0_0603_5%
1 0_0603_5%
2
2
C1204
4.7U_0603_6.3V6K
DIS@
R1149 1
DIS@
P9
R9
T9
U9
IFPD_IOVDD
220mA
+IFPEF_PLLVDD
C1203
1U_0402_6.3V6K
DIS@
AK8
IFPD_PLLVDD
IFPD_RSET
MIOA_VDDQ_NC_0
MIOA_VDDQ_NC_1
MIOA_VDDQ_NC_2
MIOA_VDDQ_NC_3
C1202
0.1U_0402_16V4Z
DIS@
AC6
AB6
285mA
C1201
0.1U_0402_16V4Z
DIS@
DIS@ R1655 1
2
2 1K_0402_1%
1K_0402_1%
2
1K_0402_1%
J10
J11
J12
J13
J9
C1200
0.1U_0402_16V4Z
DIS@
DIS@ R1654 1
@
R1148 1
+PEX_SVDD_3V3
IFPC_IOVDD
220mA
+1.05VGS
AJ9
AK7
2
1 DIS@
MBC1608121YZF_0603
+IFPC_PLLVDD
2
1K_0402_1%
+IFPC_IOVDD
+PEX_PLLVDD
120mA
VDD33_0
VDD33_1
VDD33_2
VDD33_3
VDD33_4
C1186
1U_0402_6.3V6K
DIS@
DIS@
C1187
1U_0402_6.3V6K
DIS@
IFPAB_PLLVDD
IFPAB_RSET
C1175
22U_0805_6.3V6M
DIS@
C1194
4.7U_0603_6.3V6K
DIS@
AK9
AJ11
C1167
22U_0805_6.3V6M
DIS@
C1185
4.7U_0603_6.3V6K
DIS@
2 10K_0402_5%
2 1K_0402_1%
C1174
10U_0603_6.3V6M
DIS@
120mA
AG14
C1166
10U_0603_6.3V6M
DIS@
C1173
4.7U_0603_6.3V6K
DIS@
PEX_PLLVDD
+1.05VGS
C1193
0.1U_0402_16V4Z
DIS@
R1629 1
R1146 1
C1165
4.7U_0603_6.3V6K
DIS@
120mA
DIS@
DIS@
R1147 1
DIS@
L71
C1172
1U_0402_6.3V6K
DIS@
AK16
AK17
AK21
AK24
AK27
C1164
1U_0402_6.3V6K
DIS@
PEX_IOVDD_0
PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
C1183
0.1U_0402_16V4Z
DIS@
R1628
10K_0402_5%
OPT@
C1212
0.1U_0402_16V4Z
DIS@
C1211
0.1U_0402_16V4Z
DIS@
C1210
1U_0402_6.3V6K
DIS@
C1209
0.1U_0402_16V4Z
DIS@
+IFPC_PLLVDD
C1208
4.7U_0603_6.3V6K
DIS@
L74
2
1 DIS@
BLM18PG181SN1D_0603
C1171
1U_0402_6.3V6K
DIS@
+3VGS
C1163
1U_0402_6.3V6K
DIS@
+1.05VGS
1
C1170
0.1U_0402_16V4Z
DIS@
C1182
0.1U_0402_16V4Z
DIS@
C1181
0.1U_0402_16V4Z
DIS@
C1180
0.1U_0402_16V4Z
DIS@
C1179
0.1U_0402_16V4Z
DIS@
C1178
0.1U_0402_16V4Z
DIS@
C1177
0.1U_0402_16V4Z
DIS@
C1176
0.1U_0402_16V4Z
DIS@
AG11
AG12
AG13
AG15
AG16
AG17
AG18
AG22
AG23
AG24
AG25
AG26
AJ14
AJ15
AJ19
AJ21
AJ22
AJ24
AJ25
AJ27
AK18
AK20
AK23
AK26
AL16
C1169
0.1U_0402_16V4Z
DIS@
+1.5VGS
PEX_IOVDDQ_0
PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8
PEX_IOVDDQ_9
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13
PEX_IOVDDQ_14
PEX_IOVDDQ_15
PEX_IOVDDQ_16
PEX_IOVDDQ_17
PEX_IOVDDQ_18
PEX_IOVDDQ_19
PEX_IOVDDQ_20
PEX_IOVDDQ_21
PEX_IOVDDQ_22
PEX_IOVDDQ_23
PEX_IOVDDQ_24
C1162
0.1U_0402_16V4Z
DIS@
FBVDDQ_0
FBVDDQ_1
FBVDDQ_2
FBVDDQ_3
FBVDDQ_4
FBVDDQ_5
FBVDDQ_6
FBVDDQ_7
FBVDDQ_8
FBVDDQ_9
FBVDDQ_10
FBVDDQ_11
FBVDDQ_12
FBVDDQ_13
FBVDDQ_14
FBVDDQ_15
FBVDDQ_16
FBVDDQ_17
FBVDDQ_18
FBVDDQ_19
FBVDDQ_20
FBVDDQ_21
FBVDDQ_22
FBVDDQ_23
FBVDDQ_24
FBVDDQ_25
FBVDDQ_26
FBVDDQ_27
FBVDDQ_28
FBVDDQ_29
FBVDDQ_30
FBVDDQ_31
FBVDDQ_32
FBVDDQ_33
FBVDDQ_34
FBVDDQ_35
FBVDDQ_36
FBVDDQ_37
C1161
0.1U_0402_16V4Z
DIS@
C1159
0.1U_0402_16V4Z
DIS@
C1156
1U_0402_6.3V6K
DIS@
C1158
1U_0402_6.3V6K
DIS@
C1155
4.7U_0603_6.3V6K
DIS@
C1157
4.7U_0603_6.3V6K
DIS@
J23
J24
J29
AA27
AA29
AA31
AB27
AB29
AC27
AD27
AE27
AJ28
B18
E21
G17
G18
G22
G8
G9
H29
J14
J15
J16
J17
J20
J21
J22
N27
P27
R27
T27
U27
U29
V27
V29
V34
W27
Y27
POWER
Part 5 of 7
7.2A
Security Classification
2009/01/01
Issued Date
Deciphered Date
2010/01/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size
Document Number
R ev
0.1
Sheet
1
25
of
64
+3.3VS TO +3.3VGS
1
1
R1154
49.9K_0402_1%
DIS@
1
2
C1232
10U_0603_6.3V6M
DIS@
C1233
1U_0603_10V6K
DIS@
R1151
470_0603_5%
DIS@
2
2 R1156
0_0402_5%
DIS@
Q89B
2N7002KDWH_SOT363-6
DIS@
2 DGPU_PWR_EN#
Q89A
2N7002KDWH_SOT363-6
DIS@
C1238
0.1U_0603_25V7K
DIS@
+3VALW
R1160
100K_0402_5%
DIS@
DGPU_PWR_EN
1
C1243
0.1U_0603_25V7K
DIS@
2
IN
GND
OUT
DGPU_PWR_EN#
Q84
DTC124EKAT146_SC59-3
DIS@
[17,60] DGPU_PWR_EN
+1.5V TO +1.5VGS
+1.5V
+1.5VGS
C1245
10U_0805_10V6K
DIS@
C1246
1U_0603_10V6K
DIS@
DGPU_PWR_EN
R1163
470_0603_5%
DIS@
VDD33
+3VGS
D
S
C1244
D
S
10U_0805_10V6K
D
G
DIS@
2
AP4800BGM-HF_SO8
DIS@
+12VS
6 2
1
2
3
4
U65
8
7
6
5
DGPU_PWR_EN#
2 R1165
0_0402_5%
DIS@
Q85B
2N7002KDWH_SOT363-6
DIS@
R1164
150K_0402_1%
DIS@
1
PEX_VDD
DGPU_PWR_EN#
2
Q85A
2N7002KDWH_SOT363-6
DIS@
C1247
0.1U_0603_25V7K
DIS@
+1.05VGS
NVVDD
+VGA_CORE
IFPAB_IOVDD
+1.8VGS
FBVDDQ
+1.5VGS
GS@
Security Classification
2009/01/01
Issued Date
Deciphered Date
2010/01/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
DGPU_PWR_EN#
R1155
10K_0402_5%
DIS@
DGPU_PWR_EN#
2
Q77A
2N7002KDWH_SOT363-6
DIS@
DGPU_PWR_EN 5
1
C1237
0.1U_0603_25V7K
Q77B
DIS@
2
2N7002KDWH_SOT363-6
DIS@
4
N12P-GS-A1_BGA_973P
R1152
470_0603_5%
DIS@
+3VS
R1153
20K_0402_5%
DIS@
Q76
SI2301BDS-T1-E3_SOT23-3
DIS@
GND
V18
V20
V22
V24
V31
Y11
Y13
Y15
Y17
Y19
Y21
Y23
Y25
AA2
AA5
AA11
AA12
AA13
AA14
AA15
AA16
AA17
AA18
AA19
AA20
AA21
AA22
AA23
AA24
AA25
AA34
AB12
AB14
AB16
AB18
AB20
AB22
AB24
AC9
AD2
AD5
AD11
AD13
AD15
AD17
AD21
AD23
AD25
AD31
AD34
AE11
AE12
AE13
AE14
AE15
AE16
AE17
AE18
AE19
AE20
AE21
AE22
AE23
AE24
AE25
AG2
AG5
AG31
AG34
AK2
AK5
AK14
AK31
AK34
AL6
AL9
AL12
AL15
AL18
AL21
AL24
AL27
AL30
AN2
AN34
AP3
AP6
AP9
AP12
AP15
AP18
AP21
AP24
AP27
AP30
AP33
GND_97
GND_98
GND_99
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_174
GND_175
GND_176
GND_177
GND_178
GND_179
GND_180
GND_181
GND_182
GND_183
GND_184
GND_185
GND_186
GND_187
GND_188
GND_189
GND_190
GND_191
GND_192
+1.05VS_VPCH
+1.05VGS
U63
8 D
S 1
7 D
1
1
1
S 2
C1234
C1235
C1236
6 D
S 3
10U_0805_10V6K
10U_0805_10V6K
1U_0603_10V6K
5 D
G 4
DIS@
DIS@
DIS@
2
2
2
AP4800BGM-HF_SO8
DIS@
+12VS
Part 6 of 7
S
+1.05VS_VCCIO TO +1.05VGS
+3VGS
+3VS
GND_0
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
GND_95
GND_96
U58F
B3
B6
B9
B12
B15
B21
B24
B27
B30
B33
C2
C34
E6
E9
E12
E15
E18
E24
E27
E30
F2
F31
F34
F5
J2
J5
J31
J34
K9
L9
M2
M5
M11
M13
M15
M17
M19
M21
M23
M25
M31
M34
N11
N12
N13
N14
N15
N16
N17
N18
N19
N20
N21
N22
N23
N24
N25
P12
P14
P16
P18
P20
P22
P24
R2
R5
R31
R34
T11
T13
T15
T17
T19
T21
T23
T25
U11
U12
U13
U14
U15
U16
U17
U18
U19
U20
U21
U22
U23
U24
U25
V2
V5
V9
V12
V14
V16
6 2
Title
Size
Document Number
R ev
0.1
Sheet
1
26
of
64
U58B
MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
+1.5VGS
R1166
1.1K_0402_1%
@
+FB_VREF
12mil
1
R1167
1.1K_0402_1%
@
C1248
0.01U_0402_25V7K
@
200mA
B
+FB_AVDD0
+FB_AVDD1
DIS@
R1168 2
R1169 2
+1.5VGS
L32
N33
L33
N34
N35
P35
P33
P34
K35
K33
K34
H33
G34
G33
E34
E33
G31
F30
G30
G32
K30
K32
H30
K31
L31
L30
M32
N30
M30
P31
R32
R30
AG30
AG32
AH31
AF31
AF30
AE30
AC32
AD30
AN33
AL31
AM33
AL33
AK30
AK32
AJ30
AH30
AH33
AH35
AH34
AH32
AJ33
AL35
AM34
AM35
AF33
AE32
AF34
AE35
AE34
AE33
AB32
AC35
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
AG27
AF27
FB_DLLAVDD_0
FB_PLLAVDD_0
100mA
J19
J18
+FB_VREF
J27
1 60.4_0402_1% T30
1 10K_0402_5% T29
DIS@
MEMORY INTERFACE
A
Part 2 of 7
MDA[0..63]
[29,30] MDA[0..63]
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
U30
V30
U31
V32
T35
U33
W32
W33
W31
W34
U34
U35
U32
T34
T33
W30
AB30
AA30
AB31
AA32
AB33
Y32
Y33
AB34
AB35
Y35
W35
Y34
Y31
Y30
W29
Y29
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
P32
H34
J30
P30
AF32
AL32
AL34
AF35
DQMA0
DQMA1
DQMA2
DQMA3
DQMA4
DQMA5
DQMA6
DQMA7
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
L35
G35
H31
N32
AD32
AJ31
AJ35
AC34
DQSA#0
DQSA#1
DQSA#2
DQSA#3
DQSA#4
DQSA#5
DQSA#6
DQSA#7
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
L34
H35
J32
N31
AE31
AJ32
AJ34
AC33
DQSA0
DQSA1
DQSA2
DQSA3
DQSA4
DQSA5
DQSA6
DQSA7
FBA_WCK0
FBA_WCK0_N
FBA_WCK1
FBA_WCK1_N
FBA_WCK2
FBA_WCK2_N
FBA_WCK3
FBA_WCK3_N
P29
R29
L29
M29
AG29
AH29
AD29
AE29
CMDA0 [29]
CMDA4
CMDA5
CMDA6
CMDA7
CMDA8
CMDA9
CMDA10
CMDA11
CMDA12
CMDA13
CMDA14
CMDA15
CMDA21
CMDA22
CMDA23
CMDA24
CMDA25
CMDA26
CMDA27
CMDA28
CMDA29
CMDA30
CMDA2 [29]
CMDA3 [29]
CMDA4 [29,30]
CMDA5 [29,30]
CMDA6 [29,30]
CMDA7 [29,30]
CMDA8 [29,30]
CMDA9 [29,30]
CMDA10 [29,30]
CMDA11 [29,30]
CMDA12 [29,30]
CMDA13 [29,30]
CMDA14 [29,30]
CMDA15 [29,30]
CMDA16 [30]
CMDA18
CMDA19
CMDA20
CMDA21
CMDA22
CMDA23
CMDA24
CMDA25
CMDA26
CMDA27
CMDA28
CMDA29
CMDA30
DQMA0
DQMA1
DQMA2
DQMA3
DQMA4
DQMA5
DQMA6
DQMA7
DQSA#0
DQSA#1
DQSA#2
DQSA#3
DQSA#4
DQSA#5
DQSA#6
DQSA#7
DQSA0
DQSA1
DQSA2
DQSA3
DQSA4
DQSA5
DQSA6
DQSA7
[30]
[30]
[29,30]
[29,30]
[29,30]
[29,30]
[29,30]
[29,30]
[29,30]
[29,30]
[29,30]
[29,30]
[29,30]
[29]
[29]
[29]
[29]
[30]
[30]
[30]
[30]
[29]
[29]
[29]
[29]
[30]
[30]
[30]
[30]
[29]
[29]
[29]
[29]
[30]
[30]
[30]
[30]
FB_DLLAVDD_1
FB_PLLAVDD_1
FB_VREF_NC
FBA_DEBUG0
FBA_DEBUG1
N12P-GS-A1_BGA_973P
FBA_CLK0
FBA_CLK0_N
T32
T31
CLKA0 [29]
CLKA0# [29]
FBA_CLK1
FBA_CLK1_N
AC31
AC30
CLKA1 [30]
CLKA1# [30]
GS@
+1.05VGS
+FB_AVDD0
1
C1251
1U_0402_6.3V6K
DIS@
C1250
10U_0603_6.3V6M
DIS@
L78
1
2 DIS@
BLM18PG330SN1D_0603
2
2
C1249
10U_0603_6.3V6M
DIS@
1
1
C1252
0.1U_0402_16V4Z
DIS@
+1.05VGS
A
C1253
10U_0603_6.3V6M
DIS@
+FB_AVDD1
C1255
1U_0402_6.3V6K
DIS@
C1254
10U_0603_6.3V6M
DIS@
L79
1
2 DIS@
BLM18PG330SN1D_0603
C1256
0.1U_0402_16V4Z
DIS@
Security Classification
2009/01/01
Issued Date
Deciphered Date
2010/01/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
Title
Size
Document Number
R ev
0.1
Sheet
1
27
of
64
MDB[0..63]
[31,32] MDB[0..63]
U58C
+1.5VGS
B13
D13
A13
A14
C16
B16
A17
D16
C13
B11
C11
A11
C10
C8
B8
A8
E8
F8
F10
F9
F12
D8
D11
E11
D12
E13
F13
F14
F15
E16
F16
F17
D29
F27
F28
E28
D26
F25
D24
E25
E32
F32
D33
E31
C33
F29
D30
E29
B29
C31
C29
B31
C32
B32
B35
B34
A29
B28
A28
C28
C26
D25
B25
A25
FBC_D0
FBC_D1
FBC_D2
FBC_D3
FBC_D4
FBC_D5
FBC_D6
FBC_D7
FBC_D8
FBC_D9
FBC_D10
FBC_D11
FBC_D12
FBC_D13
FBC_D14
FBC_D15
FBC_D16
FBC_D17
FBC_D18
FBC_D19
FBC_D20
FBC_D21
FBC_D22
FBC_D23
FBC_D24
FBC_D25
FBC_D26
FBC_D27
FBC_D28
FBC_D29
FBC_D30
FBC_D31
FBC_D32
FBC_D33
FBC_D34
FBC_D35
FBC_D36
FBC_D37
FBC_D38
FBC_D39
FBC_D40
FBC_D41
FBC_D42
FBC_D43
FBC_D44
FBC_D45
FBC_D46
FBC_D47
FBC_D48
FBC_D49
FBC_D50
FBC_D51
FBC_D52
FBC_D53
FBC_D54
FBC_D55
FBC_D56
FBC_D57
FBC_D58
FBC_D59
FBC_D60
FBC_D61
FBC_D62
FBC_D63
R1170
2 40.2_0402_1%
DIS@
K27
FBCAL_PD_VDDQ
R1171
2 40.2_0402_1%
DIS@
L27
FBCAL_PU_GND
R1172
+1.5VGS
M27
2 60.4_0402_1% DIS@
DIS@
R1173 2
1 60.4_0402_1% G19
R1174 2
10K_0402_5%
G16
1
DIS@
MEMORY INTERFACE C
Part 3 of 7
MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63
FBCAL_TERM_GND
FBC_DEBUG0
FBB_DEBUG1
N12P-GS-A1_BGA_973P
FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CMD29
FBC_CMD30
FBC_CMD31
F18
E19
D18
C17
F19
C19
B17
E20
B19
D20
A19
D19
C20
F20
B20
G21
F22
F24
F23
C25
C23
F21
E22
D21
A23
D22
B23
C22
B22
A22
A20
G20
FBC_DQM0
FBC_DQM1
FBC_DQM2
FBC_DQM3
FBC_DQM4
FBC_DQM5
FBC_DQM6
FBC_DQM7
A16
D10
F11
D15
D27
D34
A34
D28
DQMB0
DQMB1
DQMB2
DQMB3
DQMB4
DQMB5
DQMB6
DQMB7
FBC_DQS_RN0
FBC_DQS_RN1
FBC_DQS_RN2
FBC_DQS_RN3
FBC_DQS_RN4
FBC_DQS_RN5
FBC_DQS_RN6
FBC_DQS_RN7
B14
B10
D9
E14
F26
D31
A31
A26
DQSB#0
DQSB#1
DQSB#2
DQSB#3
DQSB#4
DQSB#5
DQSB#6
DQSB#7
FBC_DQS_WP0
FBC_DQS_WP1
FBC_DQS_WP2
FBC_DQS_WP3
FBC_DQS_WP4
FBC_DQS_WP5
FBC_DQS_WP6
FBC_DQS_WP7
C14
A10
E10
D14
E26
D32
A32
B26
DQSB0
DQSB1
DQSB2
DQSB3
DQSB4
DQSB5
DQSB6
DQSB7
FBC_WCK0
FBC_WCK0_N
FBC_WCK1
FBC_WCK1_N
FBC_WCK2
FBC_WCK2_N
FBC_WCK3
FBC_WCK3_N
G14
G15
G11
G12
G27
G28
G24
G25
FBC_CLK0
FBC_CLK0_N
E17
D17
CLKB0 [31]
CLKB0# [31]
FBC_CLK1
FBC_CLK1_N
D23
E23
CLKB1 [32]
CLKB1# [32]
CMDB0 [31]
CMDB4
CMDB5
CMDB6
CMDB7
CMDB8
CMDB9
CMDB10
CMDB11
CMDB12
CMDB13
CMDB14
CMDB15
CMDB21
CMDB22
CMDB23
CMDB24
CMDB25
CMDB26
CMDB27
CMDB28
CMDB29
CMDB30
CMDB2 [31]
CMDB3 [31]
CMDB4 [31,32]
CMDB5 [31,32]
CMDB6 [31,32]
CMDB7 [31,32]
CMDB8 [31,32]
CMDB9 [31,32]
CMDB10 [31,32]
CMDB11 [31,32]
CMDB12 [31,32]
CMDB13 [31,32]
CMDB14 [31,32]
CMDB15 [31,32]
CMDB16 [32]
CMDB18
CMDB19
CMDB20
CMDB21
CMDB22
CMDB23
CMDB24
CMDB25
CMDB26
CMDB27
CMDB28
CMDB29
CMDB30
DQMB0
DQMB1
DQMB2
DQMB3
DQMB4
DQMB5
DQMB6
DQMB7
DQSB#0
DQSB#1
DQSB#2
DQSB#3
DQSB#4
DQSB#5
DQSB#6
DQSB#7
DQSB0
DQSB1
DQSB2
DQSB3
DQSB4
DQSB5
DQSB6
DQSB7
[32]
[32]
[31,32]
[31,32]
[31,32]
[31,32]
[31,32]
[31,32]
[31,32]
[31,32]
[31,32]
[31,32]
[31,32]
[31]
[31]
[31]
[31]
[32]
[32]
[32]
[32]
[31]
[31]
[31]
[31]
[32]
[32]
[32]
[32]
[31]
[31]
[31]
[31]
[32]
[32]
[32]
[32]
GS@
Security Classification
2009/01/01
Issued Date
Deciphered Date
2010/01/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Size
Document Number
R ev
0.1
Sheet
1
28
of
64
MDA[0..63] [27,30]
CMDA[30..0] [27,30]
DQMA[7..0] [27,30]
+1.5VGS
U66
+FBA_VREFCA0
R1176
1.1K_0402_1%
DIS@
C1257
0.01U_0402_25V7K
DIS@
+1.5VGS
R1177
1.1K_0402_1%
DIS@
CMDA7
CMDA10
CMDA24
CMDA6
CMDA22
CMDA26
CMDA5
CMDA21
CMDA8
CMDA4
CMDA25
CMDA23
CMDA9
CMDA12
CMDA14
CMDA30
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
CMDA29
CMDA13
CMDA27
M2
N8
M3
BA0
BA1
BA2
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
MDA1
MDA5
MDA0
MDA3
MDA4
MDA7
MDA2
MDA6
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
MDA29
MDA26
MDA30
MDA24
MDA27
MDA25
MDA31
MDA28
C1258
0.01U_0402_25V7K
DIS@
CMDA0
CMDA2
CMDA11
CMDA15
CMDA28
DQSA0
DQSA3
[27] DQSA0
[27] DQSA3
DQMA0
DQMA3
[27] DQMA0
[27] DQMA3
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
B2
D9
G7
K2
K8
N1
N9
R1
R9
E7
D3
DQSL
DQSU
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
DML
DMU
G3
B7
DQSL
DQSU
CMDA20
T2
RESET
Group3
L8
ZQ/ZQ0
J1
L1
J9
L9
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
R1179
10K_0402_5%
1 DIS@ 2
R1180
10K_0402_5%
DIS@
CMDA7
CMDA10
CMDA24
CMDA6
CMDA22
CMDA26
CMDA5
CMDA21
CMDA8
CMDA4
CMDA25
CMDA23
CMDA9
CMDA12
CMDA14
CMDA30
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
CMDA29
CMDA13
CMDA27
M2
N8
M3
BA0
BA1
BA2
[27] DQSA2
[27] DQSA1
CLKA0
CLKA0#
CMDA3
J7
K7
K9
CMDA0
CMDA2
CMDA11
CMDA15
CMDA28
K1
L2
J3
K3
L3
F3
C7
DQMA2
DQMA1
[27] DQMA2
[27] DQMA1
[27] DQSA#2
[27] DQSA#1
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
MDA22
MDA19
MDA23
MDA16
MDA20
MDA18
MDA21
MDA17
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
MDA14
MDA9
MDA12
MDA11
MDA13
MDA8
MDA15
MDA10
DQSA#[7..0] [27,30]
Group2
GB2-128
Mode E - Mirror Mode Mapping
DATA Bus
Group1
+1.5VGS
64Mx16
E7
D3
CK
CK
CKE/CKE0
ODT/ODT0
CS/CS0
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSA#2
DQSA#1
G3
B7
DQSL
DQSU
CMDA20
T2
RESET
R1186
243_0402_1%
DIS@
L8
ZQ/ZQ0
J1
L1
J9
L9
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
64Mx16
96-BALL
SDRAM DDR3
K4W1G1646G-BC11_FBGA96
X76@
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
1
2
A7
A6
CMD24
A2
A1
CMD23
A11
A9
CMD26
A5
A4
CMD7
A0
A12
CAS#
Deciphered Date
2010/01/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
CMD15
CAS#
CMD13
BA1
A3
CMD4
A9
A11
CS0#_H
CMD29
BA0
BA0
CMD27
BA2
A15
CMD6
A3
BA1
CS1#_H
ODT_H
CMD22
A4
A5
CMD12
A13
A14
CMD28
WE#
A10
CMD10
A1
A2
CMD25
A10
WE#
CMD9
A12
A0
CMD1
CS1#_L
RAS#
CMD0
ODT_L
CMD5
A6
RAS#
A7
CKE_H
CMD20
RST
RST
CMD14
A14
A13
CMD30
A15
BA2
Issued Date
CMD21
CMD11
C1273
0.1U_0402_16V4Z
DIS@
Security Classification
A8
A8
CS0#_L
CMD19
C1272
0.1U_0402_16V4Z
DIS@
C1271
0.1U_0402_16V4Z
DIS@
C1270
0.1U_0402_16V4Z
DIS@
C1269
0.1U_0402_16V4Z
DIS@
32..63
CMD16
C1268
1U_0402_6.3V6K
DIS@
C1267
1U_0402_6.3V6K
DIS@
C1266
0.1U_0402_16V4Z
DIS@
C1265
0.1U_0402_16V4Z
DIS@
C1264
0.1U_0402_16V4Z
DIS@
C1263
0.1U_0402_16V4Z
DIS@
C1262
0.1U_0402_16V4Z
DIS@
CKE_L
CMD17
+1.5VGS
C1261
1U_0402_6.3V6K
DIS@
CLKA0#
C1260
1U_0402_6.3V6K
DIS@
DIS@
80.6_0402_1%
R1181
DIS@
80.6_0402_1%
1
2
R1183
2
C1259
0.01U_0402_25V7K
@
1
CMD3
CMD18
CLKA0
R1182
160_0402_1%
@
0..31
CMD2
96-BALL
SDRAM DDR3
K4W1G1646G-BC11_FBGA96
X76@
+1.5VGS
Address
CMD8
DQSA2
DQSA1
1
R1185
243_0402_1%
DIS@
R1184
10K_0402_5%
DIS@
F3
C7
ODT/ODT0
CS/CS0
RAS
CAS
WE
K1
L2
J3
K3
L3
CK
CK
CKE/CKE0
DQSA#0
DQSA#3
[27] DQSA#0
[27] DQSA#3
J7
K7
K9
Group0
DQSA[7..0] [27,30]
VREFCA
VREFDQ
CLKA0
CLKA0#
CMDA3
[27] CLKA0
[27] CLKA0#
R1178
1.1K_0402_1%
DIS@
+FBA_VREFCA0 M8
+FBA_VREFDQ0 H1
+1.5VGS
+FBA_VREFDQ0
VREFCA
VREFDQ
+FBA_VREFCA0 M8
+FBA_VREFDQ0 H1
R1175
1.1K_0402_1%
DIS@
U67
Title
Size
Document Number
R ev
0.1
Sheet
1
29
of
64
U68
+FBA_VREFCA1
+FBA_VREFDQ1
+FBA_VREFCA1
R1187
1.1K_0402_1%
DIS@
C1274
0.01U_0402_25V7K
DIS@
+1.5VGS
R1189
1.1K_0402_1%
DIS@
+FBA_VREFDQ1
R1190
1.1K_0402_1%
DIS@
M8
H1
VREFCA
VREFDQ
CMDA9
CMDA24
CMDA10
CMDA13
CMDA26
CMDA22
CMDA21
CMDA5
CMDA8
CMDA23
CMDA28
CMDA4
CMDA7
CMDA14
CMDA12
CMDA27
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
CMDA29
CMDA6
CMDA30
M2
N8
M3
BA0
BA1
BA2
CLKA1
CLKA1#
CMDA16
[27] CLKA1
[27] CLKA1#
C1275
0.01U_0402_25V7K
DIS@
J7
K7
K9
CMDA19
CMDA18
CMDA11
CMDA15
CMDA25
DQSA4
DQSA5
[27] DQSA4
[27] DQSA5
DQMA4
DQMA5
[27] DQMA4
[27] DQMA5
DQSL
DQSU
E7
D3
DML
DMU
DQSA#4
DQSA#5
G3
B7
DQSL
DQSU
CMDA20
T2
RESET
L8
ZQ/ZQ0
J1
L1
J9
L9
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
MDA38
MDA33
MDA39
MDA32
MDA37
MDA34
MDA36
MDA35
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
MDA41
MDA45
MDA42
MDA44
MDA43
MDA46
MDA40
MDA47
+FBA_VREFCA1
+FBA_VREFDQ1
CMDA9
CMDA24
CMDA10
CMDA13
CMDA26
CMDA22
CMDA21
CMDA5
CMDA8
CMDA23
CMDA28
CMDA4
CMDA7
CMDA14
CMDA12
CMDA27
Group4
Group5
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
VREFCA
VREFDQ
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
R1191
10K_0402_5%
1 DIS@ 2
R1192
10K_0402_5%
DIS@
CLKA1
CLKA1#
CMDA16
J7
K7
K9
CMDA19
CMDA18
CMDA11
CMDA15
CMDA25
K1
L2
J3
K3
L3
DQSA7
DQSA6
[27] DQSA7
[27] DQSA6
F3
C7
DQMA7
DQMA6
[27] DQMA7
[27] DQMA6
[27] DQSA#7
[27] DQSA#6
E7
D3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
MDA51
MDA52
MDA48
MDA53
MDA49
MDA54
MDA50
MDA55
DQMA[7..0] [27,29]
DQSA[7..0] [27,29]
DQSA#[7..0] [27,29]
Group7
DATA Bus
Group6
R1196
243_0402_1%
DIS@
CK
CK
CKE/CKE0
ODT/ODT0
CS/CS0
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSA#7
DQSA#6
G3
B7
DQSL
DQSU
CMDA20
T2
RESET
64Mx16
R1197
243_0402_1%
DIS@
L8
ZQ/ZQ0
J1
L1
J9
L9
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
64Mx16
96-BALL
SDRAM DDR3
K4W1G1646G-BC11_FBGA96
X76@
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
1
2
CMD21
A7
A6
CMD24
A2
A1
CMD23
A11
A9
CMD26
A5
A4
CMD7
A0
A12
CAS#
CMD15
CAS#
CMD13
BA1
A3
CMD4
A9
A11
CS0#_H
CMD29
BA0
BA0
CMD27
BA2
A15
CMD6
A3
BA1
CS1#_H
ODT_H
CMD22
A4
A5
CMD12
A13
A14
CMD28
WE#
A10
CMD10
A1
A2
CMD25
A10
WE#
CMD9
A12
A0
CMD1
CS1#_L
CMD11
C1290
0.1U_0402_16V4Z
DIS@
RAS#
CMD0
ODT_L
CMD5
A6
RAS#
A7
CKE_H
CMD20
RST
RST
CMD14
A14
A13
CMD30
A15
BA2
Security Classification
2009/01/01
Issued Date
Deciphered Date
2010/01/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
A8
A8
CS0#_L
CMD19
C1289
0.1U_0402_16V4Z
DIS@
C1288
0.1U_0402_16V4Z
DIS@
C1287
0.1U_0402_16V4Z
DIS@
C1286
0.1U_0402_16V4Z
DIS@
32..63
CMD16
C1285
1U_0402_6.3V6K
DIS@
C1284
1U_0402_6.3V6K
DIS@
C1283
0.1U_0402_16V4Z
DIS@
C1282
0.1U_0402_16V4Z
DIS@
C1276
0.01U_0402_25V7K
@
CLKA1#
A
C1281
0.1U_0402_16V4Z
DIS@
C1280
0.1U_0402_16V4Z
DIS@
C1279
0.1U_0402_16V4Z
DIS@
CKE_L
CMD17
+1.5VGS
C1278
1U_0402_6.3V6K
DIS@
C1277
1U_0402_6.3V6K
DIS@
R1194
160_0402_1%
@
CMD3
CMD18
CLKA1
DIS@
80.6_0402_1%
R1193
DIS@
80.6_0402_1%
R1195
0..31
CMD2
96-BALL
SDRAM DDR3
K4W1G1646G-BC11_FBGA96
X76@
+1.5VGS
Address
CMD8
BA0
BA1
BA2
GB2-128
Mode E - Mirror Mode Mapping
+1.5VGS
M8
H1
CMDA29
M2
CMDA6
N8
CMDA30 M3
[27] DQSA#4
[27] DQSA#5
ODT/ODT0
CS/CS0
RAS
CAS
WE
F3
C7
E3
F7
F2
F8
H3
H8
G2
H7
+1.5VGS
CK
CK
CKE/CKE0
K1
L2
J3
K3
L3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
R1188
1.1K_0402_1%
DIS@
CMDA[30..0] [27,29]
U69
Title
Size
Document Number
R ev
0.1
Sheet
1
30
of
64
MDB[0..63] [28,32]
CMDB[30..0] [28,32]
DQMB[7..0] [28,32]
+1.5VGS
DQSB[7..0] [28,32]
U71
+FBA_VREFCA2
+FBA_VREFDQ2
R1198
1.1K_0402_1%
GS@
CMDB7
CMDB10
CMDB24
CMDB6
CMDB22
CMDB26
CMDB5
CMDB21
CMDB8
CMDB4
CMDB25
CMDB23
CMDB9
CMDB12
CMDB14
CMDB30
+FBA_VREFCA2
R1199
1.1K_0402_1%
GS@
C1291
0.01U_0402_25V7K
GS@
M8
H1
VREFCA
VREFDQ
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
MDB3
MDB5
MDB2
MDB4
MDB1
MDB6
MDB0
MDB7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
MDB31
MDB25
MDB29
MDB24
MDB28
MDB26
MDB30
MDB27
CMDB29
CMDB13
CMDB27
R1200
1.1K_0402_1%
GS@
BA0
BA1
BA2
+FBA_VREFDQ2
R1201
1.1K_0402_1%
GS@
M2
N8
M3
CLKB0
CLKB0#
CMDB3
[28] CLKB0
[28] CLKB0#
C1292
0.01U_0402_25V7K
GS@
J7
K7
K9
CMDB0
CMDB2
CMDB11
CMDB15
CMDB28
[28] DQSB0
[28] DQSB3
[28] DQMB0
[28] DQMB3
[28] DQSB#0
[28] DQSB#3
CK
CK
CKE/CKE0
K1
L2
J3
K3
L3
DQSB0
DQSB3
F3
C7
DQMB0
DQMB3
E7
D3
+FBA_VREFCA2
+FBA_VREFDQ2
CMDB7
CMDB10
CMDB24
CMDB6
CMDB22
CMDB26
CMDB5
CMDB21
CMDB8
CMDB4
CMDB25
CMDB23
CMDB9
CMDB12
CMDB14
CMDB30
Group0
Group3
+1.5VGS
+1.5VGS
U70
ODT/ODT0
CS/CS0
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSB#0
DQSB#3
G3
B7
CMDB20
T2
RESET
L8
ZQ/ZQ0
J1
L1
J9
L9
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
DQSL
DQSU
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
CMDB29
CMDB13
CMDB27
R1202
10K_0402_5%
GS@
[28] DQSB2
[28] DQSB1
[28] DQMB2
[28] DQMB1
[28] DQSB#2
[28] DQSB#1
VREFCA
VREFDQ
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
CK
CK
CKE/CKE0
K1
L2
J3
K3
L3
DQSB2
DQSB1
F3
C7
DQMB2
DQMB1
E7
D3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
MDB16
MDB17
MDB19
MDB18
MDB20
MDB21
MDB22
MDB23
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
MDB13
MDB9
MDB14
MDB11
MDB12
MDB8
MDB15
MDB10
GB2-128
Mode E - Mirror Mode Mapping
Group2
DATA Bus
ODT/ODT0
CS/CS0
RAS
CAS
WE
DQSL
DQSU
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
DML
DMU
DQSB#2
DQSB#1
G3
B7
CMDB20
T2
RESET
L8
ZQ/ZQ0
J1
L1
J9
L9
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
CLKB0
R1209
243_0402_1%
GS@
DQSL
DQSU
64Mx16
96-BALL
SDRAM DDR3
K4W1G1646G-BC11_FBGA96
X76@
CMD21
A7
A6
CMD24
A2
A1
CMD23
A11
A9
CMD26
A5
A4
CMD7
A0
A12
CMD15
CAS#
CAS#
CMD13
BA1
A3
CMD4
A9
A11
CS0#_H
CMD29
BA0
BA0
CMD27
BA2
A15
CMD6
A3
BA1
CS1#_H
ODT_H
CMD22
A4
A5
CMD12
A13
A14
A10
CMD28
WE#
CMD10
A1
A2
CMD25
A10
WE#
CMD9
A12
A0
CMD1
CS1#_L
CMD11
RAS#
CMD0
ODT_L
CMD5
A6
RAS#
A7
CKE_H
CMD16
96-BALL
SDRAM DDR3
K4W1G1646G-BC11_FBGA96
X76@
+1.5VGS
CMD20
RST
RST
CMD14
A14
A13
CMD30
A15
BA2
GS@
GS@
GS@
GS@
GS@
GS@
GS@
C1307
0.1U_0402_16V4Z
GS@
C1306
0.1U_0402_16V4Z
GS@
C1305
0.1U_0402_16V4Z
C1304
0.1U_0402_16V4Z
GS@
C1303
0.1U_0402_16V4Z
C1302
1U_0402_6.3V6K
GS@
C1301
1U_0402_6.3V6K
C1300
0.1U_0402_16V4Z
GS@
C1299
0.1U_0402_16V4Z
C1293
0.01U_0402_25V7K
@
C1298
0.1U_0402_16V4Z
GS@
GS@
C1297
0.1U_0402_16V4Z
CLKB0#
1
2
R1206 80.6_0402_1%
C1296
0.1U_0402_16V4Z
GS@
C1295
1U_0402_6.3V6K
A8
A8
CS0#_L
2
R1204 80.6_0402_1%
C1294
1U_0402_6.3V6K
R1205
160_0402_1%
@
32..63
CMD19
+1.5VGS
CKE_L
CMD17
64Mx16
CMD3
CMD18
1
2
R1208
243_0402_1%
GS@
0..31
CMD2
R1207
10K_0402_5%
GS@
Address
CMD8
Group1
+1.5VGS
BA0
BA1
BA2
J7
K7
K9
CMDB0
CMDB2
CMDB11
CMDB15
CMDB28
1
R1203
10K_0402_5%
GS@
M8
H1
M2
N8
M3
CLKB0
CLKB0#
CMDB3
DQSB#[7..0] [28,32]
GS@
Security Classification
2009/01/01
Issued Date
Deciphered Date
2010/01/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
R ev
0.1
Date:
Sheet
1
31
of
64
+1.5VGS
+FBA_VREFCA3
+FBA_VREFDQ3
R1211
1.1K_0402_1%
GS@
+FBA_VREFCA3
R1210
1.1K_0402_1%
GS@
C1308
0.01U_0402_25V7K
GS@
CMDB[30..0] [28,31]
U72
M8
H1
VREFCA
VREFDQ
CMDB9
CMDB24
CMDB10
CMDB13
CMDB26
CMDB22
CMDB21
CMDB5
CMDB8
CMDB23
CMDB28
CMDB4
CMDB7
CMDB14
CMDB12
CMDB27
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
CMDB29
CMDB6
CMDB30
M2
N8
M3
BA0
BA1
BA2
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
MDB37
MDB35
MDB36
MDB34
MDB38
MDB32
MDB39
MDB33
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
MDB41
MDB46
MDB42
MDB47
MDB44
MDB45
MDB40
MDB43
+FBA_VREFCA3
+FBA_VREFDQ3
Group4
Group5
+1.5VGS
M8
H1
VREFCA
VREFDQ
CMDB9
CMDB24
CMDB10
CMDB13
CMDB26
CMDB22
CMDB21
CMDB5
CMDB8
CMDB23
CMDB28
CMDB4
CMDB7
CMDB14
CMDB12
CMDB27
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
CMDB29
CMDB6
CMDB30
M2
N8
M3
BA0
BA1
BA2
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
MDB63
MDB57
MDB61
MDB59
MDB60
MDB56
MDB62
MDB58
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
MDB48
MDB55
MDB49
MDB52
MDB51
MDB54
MDB50
MDB53
DQMB[7..0] [28,31]
DQSB[7..0] [28,31]
D
DQSB#[7..0] [28,31]
Group7
GB2-128
Mode E - Mirror Mode Mapping
DATA Bus
Group6
+1.5VGS
+1.5VGS
R1212
1.1K_0402_1%
GS@
CLKB1
CLKB1#
CMDB16
[28] CLKB1
[28] CLKB1#
+FBA_VREFDQ3
J7
K7
K9
C1309
0.01U_0402_25V7K
GS@
CMDB19
CMDB18
CMDB11
CMDB15
CMDB25
K1
L2
J3
K3
L3
DQSB4
DQSB5
[28] DQSB4
[28] DQSB5
[28] DQSB#4
[28] DQSB#5
A1
A8
C1
C9
D2
E9
F1
H2
H9
DQSL
DQSU
E7
D3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
DML
DMU
DQSB#4
DQSB#5
G3
B7
DQSL
DQSU
CMDB20
T2
RESET
L8
ZQ/ZQ0
J1
L1
J9
L9
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
R1214
10K_0402_5%
GS@
1
2
J7
K7
K9
CMDB19
CMDB18
CMDB11
CMDB15
CMDB25
2
R1215
10K_0402_5%
GS@
[28] DQSB#7
[28] DQSB#6
ODT/ODT0
CS/CS0
RAS
CAS
WE
F3
C7
DQMB7
DQMB6
[28] DQMB7
[28] DQMB6
CK
CK
CKE/CKE0
K1
L2
J3
K3
L3
DQSB7
DQSB6
[28] DQSB7
[28] DQSB6
DQSL
DQSU
E7
D3
DML
DMU
DQSB#7
DQSB#6
G3
B7
DQSL
DQSU
CMDB20
T2
RESET
L8
ZQ/ZQ0
J1
L1
J9
L9
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
64Mx16
R1220
243_0402_1%
GS@
R1219
243_0402_1%
GS@
64Mx16
96-BALL
SDRAM DDR3
K4W1G1646G-BC11_FBGA96
X76@
+1.5VGS
0..31
CMD3
CKE_L
CMD8
CLKB1
CLKB1#
CMDB16
ODT/ODT0
CS/CS0
RAS
CAS
WE
F3
C7
DQMB4
DQMB5
[28] DQMB4
[28] DQMB5
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
CK
CK
CKE/CKE0
R1213
1.1K_0402_1%
GS@
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
A8
CS0#_L
CMD21
A7
A6
CMD24
A2
A1
CMD23
A11
A9
CMD26
A5
A4
A0
A12
CMD15
CAS#
CAS#
CMD13
BA1
A3
CMD4
A9
A11
CS0#_H
CMD29
BA0
BA0
CMD27
BA2
A15
CMD6
A3
BA1
CMD17
CS1#_H
ODT_H
CMD19
CMD22
A4
A5
CMD12
A13
A14
CMD28
WE#
A10
CMD10
A1
A2
CMD25
A10
WE#
CMD9
A12
A0
CMD1
CS1#_L
CMD11
RAS#
CMD0
ODT_L
CMD5
A6
1
2
GS@
GS@
GS@
GS@
GS@
C1325
0.1U_0402_16V4Z
GS@
C1324
0.1U_0402_16V4Z
GS@
C1323
0.1U_0402_16V4Z
GS@
C1322
0.1U_0402_16V4Z
GS@
C1321
0.1U_0402_16V4Z
C1310
0.01U_0402_25V7K
@
C1320
1U_0402_6.3V6K
80.6_0402_1%
R1218
C1319
1U_0402_6.3V6K
GS@
C1318
0.1U_0402_16V4Z
CLKB1#
GS@
C1317
0.1U_0402_16V4Z
GS@
80.6_0402_1%
R1217
GS@
C1316
0.1U_0402_16V4Z
C1315
0.1U_0402_16V4Z
GS@
C1314
0.1U_0402_16V4Z
R1216
160_0402_1%
@
C1313
1U_0402_6.3V6K
CLKB1
A
C1312
1U_0402_6.3V6K
GS@
GS@
RAS#
A7
CKE_H
CMD16
1
CMD7
CMD18
96-BALL
SDRAM DDR3
K4W1G1646G-BC11_FBGA96
X76@
+1.5VGS
32..63
A8
CMD2
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
Address
CMD20
RST
RST
CMD14
A14
A13
CMD30
A15
BA2
+1.5VGS
1
2
C1311
330U_2.5V_M_R17
GS@
Security Classification
2009/01/01
Issued Date
Deciphered Date
2010/01/01
Title
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
R ev
0.1
Date:
Sheet
1
32
of
64
Pull-up to +3VGS
Pull-down to Gnd
R869
45.3K_0402_1%
XCLK_417
Logical
Strapping Bit2
FB_0_BAR_SIZE
+3VGS
FB[1]
FB[0]
+3VGS
PCI_DEVID[4]
SUB_VENDOR
Power
Rail
Logical
Strapping Bit3
Logical
Strapping Bit1
Logical
Strapping Bit0
SMB_ALT_ADDR
VGA_DEVICE
5K
1000
0000
10K
1001
0001
15K
1010
0010
20K
1011
0011
25K
1100
0100
ROM_SI
+3VGS
RAMCFG[3]
RAMCFG[2]
RAMCFG[1]
RAMCFG[0]
30K
1101
0101
STRAP0
+3VGS
USER[3]
USER[2]
USER[1]
USER[0]
35K
1110
0110
STRAP1
+3VGS
3GIO_PADCFG[3]
3GIO_PADCFG[2]
3GIO_PADCFG[1]
3GIO_PADCFG[0]
45K
1111
0111
STRAP2
+3VGS
PCI_DEVID[3]
PCI_DEVID[2]
PCI_DEVID[1]
R1226
24.9K_0402_1%
GS@
PCI_DEVID[0]
STRAP3
+3VGS
SOR3_EXPOSED
SOR2_EXPOSED
SOR1_EXPOSED
SOR0_EXPOSED
STRAP4
+3VGS
RESERVED
RESERVED
PCIE_MAX_SPEED
DP_PLL_VDD33V
+3VGS
GS
ROM_SO
GV
GS
ROM_SCLK
SLOT_CLK_CFG
GV
PEX_PLL_EN_TERM
PCI_DEVID[5]
D
R1235
4.99K_0402_1%
DIS@
[23] STRAP0
[23] STRAP1
[23] STRAP2
R1224
45.3K_0402_1%
@
Physical
Strapping pin
R1222
34.8K_0402_1%
@
R1221
45.3K_0402_1%
DIS@
Resistor Values
+3VGS
R1641
10K_0402_5%
@
STRAP4
XCLK_417
277MHz (Default)
Reserved
[23] STRAP4
SUB_VENDOR
R1226
4.99K_0402_1%
GV@
+3VGS
FB_0_BAR_SIZE
R1229
15K_0402_1%
GS@
256MB (Default)
Reserved
User [3:0]
EDID is used
1920x1080
1111
+3VGS
1000-1100
Customer defined
R1228
10K_0402_1%
GV@
R1227
4.99K_0402_1%
@
R1644
20K_0402_5%
GV@
R1232
15K_0402_1%
@
PEX_PLL_EN_TERM
3GIO_PADCFG[3:0]
R1645
15K_0402_5%
@
0000
RESERVED
Disable (Default)
0110
Notebook Default
Enable
R1231
10K_0402_1%
GS@
STRAP3
[23] STRAP3
R378
15K_0402_1%
X76@
R1642
15K_0402_1%
GV@
R1229
4.99K_0402_1%
GV@
2
2
[23] ROM_SI
[23] ROM_SO
[23] ROM_SCLK
SLOT_CLOCK_CFG
R378
34.8K_0402_1%
X76@
SMBUS_ALT_ADDR
GPU
N12P-GS
N12P-GS
Frenq.
Memory Size
900 MHz
64M* 16* 8
1GB
900 MHz
64M* 16* 8
1GB
N12P-GV
900 MHz
N12P-GV
900 MHz
64M* 16* 4
512MB
N12P-GV
800 MHz
128M* 16* 4
1GB
64M* 16* 4
512MB
Memory Config
strap0
strap1
strap2
Hynix (0x2)
H5TQ1G63DFR-11C
SA000041S60
Samsung (0x3)
K4W1G1646G-BC11
SA00004GS30
Hynix (0x2)
H5TQ1G63DFR-11C
SA000041S60
Samsung (0x3)
K4W1G1646G-BC11
SA00004GS30
Hynix (0x6)
H5TQ2G63BFR-12C
SA00003VS30
1111
R1221
PU 45K
1111
R1221
PU 45K
1111
R1221
PU 45K
1111
R1221
PU 45K
1111
R1221
PU 45K
0000
R1235
PD 5K
0000
R1235
PD 5K
0000
R1235
PD 5K
0000
R1235
PD 5K
0000
R1235
PD 5K
0100
R1226
PD 25K
0100
R1226
PD 25K
0000
R1226
PD 5K
0000
R1226
PD 5K
0000
R1226
PD 5K
strap3
strap4
NC
NC
NC
1010
R1642
PU 15K
1010
R1642
PU 15K
1010
R1642
PU 15K
NC
0011
R1644
PD 20K
0011
R1644
PD 20K
0011
R1644
PD 20K
ROM_SI
ROM_SO
ROM_SCLK
0010
R453
PD 15K
0011
R378
PD 20K
0010
R378
PD 15K
0011
R378
PD 20K
0110
R378
PD 35K
0001
R1231
PD 10K
0001
R1231
PD 10K
1001
R1228
PU 10K
1001
R1228
PU 10K
1001
R1228
PU 10K
1010
R1229
PU 15K
1010
R1229
PU 15K
1000
R1229
PU 5K
1000
R1229
PU 5K
1000
R1229
PU 5K
VGA_DEVICE
0x9E (Default)
3D Device
PCIE_MAX_SPEED
DP_PLL_VDD33V
Default
Default
GPU
Package
DeviceID
PCI_DEVID[5..0]
N12P-GS
GB2-128
0x0DF4
(..1111 0100)
N12P-GV-B
GB2b-128
0x1050
(..0101 0000)
Security Classification
Issued Date
2009/01/01
Deciphered Date
2010/01/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Re v
0.1
Sheet
1
33
of
64
+3V_SCA
+3VALW
To AMP Input
[48]
[48]
[47]
[47]
S_LINE_OUTL
S_LINE_OUTR
S_HP_OUT_L
S_HP_OUT_R
+AD_VDD
+3V_SCA
[49] AD1
[49] AD2
To HP Out
R539
@ R540
@ R542
To EC ADC
+3V_SCA @ R545 1
[49] S_ENVDD
R1047 1
+3V_SCA
R1048 1
[40] CRT_DDC_CLK_IN
[40] CRT_DDC_DAT_IN
2
2
38
39
40
41
C540
42
10U_0603_6.3V6M
43
1
2
44
S_LINE_OUTL_R
45
S_LINE_OUTR_R
46
S_HP_OUT_L_R
47
S_HP_OUT_R_R
48
+AD_VDD 49
1
2 4.7K_0402_5%
50
AD1_R 51
1
2 0_0402_5%
AD2_R 52
1
2 0_0402_5%
53
T170
2 4.7K_0402_5% T171
54
S_ENVDD
55
4.7K_0402_5%EESDA
56
4.7K_0402_5%EESCL
57
58
59
60
+1.2V_SCA
1
RTD2472D-GR_LQFP128_20X14
2
1
1
2
R517
1
R518
1
R519
1
R520
1
R1042
1
4.7K_0402_5%
2
4.7K_0402_5%
2
4.7K_0402_5%
2
4.7K_0402_5%
2
4.7K_0402_5%
2
TXE3+ [35]
TXE3- [35]
TXEC+ [35]
TXEC- [35]
TXE2+ [35]
TXE2- [35]
TXE1+ [35]
TXE1- [35]
TXE0+ [35]
TXE0- [35]
TXO3+ [35]
TXO3- [35]
TXOC+ [35]
TXOC- [35]
TXO2+ [35]
TXO2- [35]
TXO1+ [35]
TXO1- [35]
TXO0+ [35]
TXO0- [35]
1
RB751V40_SC76-2
PNL_STAT [47,48,49]
HDMI_CABLE_DET# [37,49]
2
+3V_SCA
+3V_SCA
C535
0.1U_0402_16V4Z
1
2
LVDS
4.7K_0402_5%
A0
A1
A2
GND
VCC
WP
SCL
SDA
R528 47_0402_5%
1
2
8
7
6
5
WP_PRO
R529 2 0_0402_5%
EESCL
R530 2 0_0402_5%
EESDA
AT24C16AN-10SI-2.7_SO8
+3VS
R532 4.7K_0402_5%
1
2
+3V_SCA
S_BKOFF
S_INVT_PWM
LED1
T168
LED2
T169
S_INVT_PWM [35]
FLASH_WP
I2C_INT_SCR_R @ R534 1
2 0_0402_5%
R1053
4.7K_0402_5%
B
I2C_INT_SCR [49]
WP_PRO
HDCP_CLK
@ R536 1
2 0_0402_5%
HDMI
1
EC_SMB_CK1 [49]
HDCP_DAT
@ R537 1
2 0_0402_5%
EC_SMB_DA1 [49]
HDMI_TV_HPD
@ C541
HDMI_TV_HPD
[37]
S_CLK
0.1U_0402_16V4Z
2
SD IN
+1.2V_SCA
SDOUT
CE
R538
4.7K_0402_5%
C542
0.1U_0402_16V4Z
1
2
+3V_SCA
1
2
HDMI_TV_SCLK_R
R541
75_0402_1%
HDMI_TV_SCLK [37]
HDMI-IN
HDMI_TV_SDATA_R
R543
75_0402_1%
HDMI_TV_SDATA [37]
S_HDMI_DATA_R
R544 1
2 0_0402_5%
S_HDMI_DATA [36]
S_HDMI_CLK_R
R546 1
PCH
2 0_0402_5%
S_HDMI_CLK [36]
S_RESETB
2
1
+3V_SCA
1 R547
T172
XO
4.7K_0402_5%
XI
@ C543
@
10U_0603_6.3V6M
change to 75 ohm for HDCP protect. 2
HDMI_HPD_LS [36]
Port0 HPD
+3V_SCA
+3V_SCA
R1073
4.7K_0402_5%
R548
4.7K_0402_5%
C545 22P_0402_50V8J
2
1
88mA
+AD_VDD
Q31
2
G
S_BKOFF
Y4
27MHZ_16PF_X5H027000FG1H
SSM3K7002BF 1N SC59-3
R552
1M_0402_5%
@
+3V_SCA
U26
1
2
3
4
@ R551
0_0402_5%
1
2
S_BKOFF#
S_BKOFF# [49]
XI
C548 22P_0402_50V8J
1
C546
0.1U_0402_16V4Z
2010/10/1
Issued Date
Security Classification
C547
10U_0603_6.3V6M
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
PNL_STAT2
0
0
1
VGA_IN_DET# [40,49]
PNL_STAT2 [49]
+1.2V_SCA
HDMI_STAT
High: OSD OFF
1 C536
Low : OSD ON
0.1U_0402_16V4Z
PVCC
PVCC
PVCC
106
84
62
TXE3+
TXE3TXEC+
TXECTXE2+
TXE2TXE1+
TXE1TXE0+
TXE0TXO3+
TXO3TXOC+
TXOCTXO2+
TXO2TXO1+
TXO1TXO0+
TXO0-
D9 RB751V40_SC76-2
2
1
2
D37
22_0402_5%
22_0402_5%
PNL_STAT
0
1
0
Mode
PC
HDMI
VGA
C544
0.1U_0402_16V4Z
S_AMP_PD#
PNL_STAT
HDMI_CABLE_DET#_D
S_DIS/UMA
VGA_IN_DET#_D
PNL_STAT2
2S_CLK
2SD IN
R511
R512
T207
T208
2
1 DIS@ +3V_SCA
R525 10K_0402_5%
2
1 UMA@
R527 10K_0402_5%
S_DIS/UMA
VGA_GND_BLUE
VGA_BLUE_IN
VGA_GND_GREEN
VGA_GREEN_IN
VGA_SOG
VGA_GND_RED
VGA_RED_IN
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
0.1U_0402_16V4Z
10U_0603_6.3V6M
[40]
[40]
[40]
[40]
[40]
[40]
[40]
TCON[1][8]/PWM2/GPIO
SD0/SPDIF0/TCON[0][7]/GPIO/IrDA
WS/TCON[7][1]/GPIO/PWM1/BB3P
ABLU7/SCK/TCON[4][2]/GPIO/BB3N
ABLU6/MCK/TCON[5][9]/GPIO/BB2P
ABLU5/SD0/SPDIF0/TCON[13][3]/GPIO/BB2N
ABLU4/SPDIF1/SD1/TCON[ 7][3]/GPIO/IICSCL/BB1P
ABLU3/SPDIF2/SD2/TCON[ 9][11]/GPIO/IICSDA/BB1N
ABLU2/SPDIF3/SD3/TCON[10][8]/GPIO/PWM1/PWM5/BCLKP
TCON[6][12]/GPIO/PWM3/BCLKN
VCCK
ABLU1/ GPIO/ABLU7/TXO3+_8b/TXO4+_10b/BG3P
ABLU0/ GPIO/ABLU6/TXO3-_8b/TXO4-_10b/BG3N
AGRN7/GPIO/ABLU5/TXOC+_8b/TXO3+_10b/BG2P
AGRN6/GPIO/ABLU4/TXOC-_8b/TXO3-_10b/BG2N
AGRN5/GPIO/ABLU3/TXO2+_8b/TXOC+_10b/BG1P
AGRN4/GPIO/ABLU2/TXO2-_8b/TXOC-_10b/BG1N
AGRN3/GPIO/AGRN7/TXO1+_8b/TXO2+_10b/BR3P
AGRN2/GPIO/AGRN6/TXO1-_8b/TXO2-_10b/BR3N
AGRN1/GPIO/AGRN5/TXO0+_8b/TXO1+_10b/BR2P
AGRN0/GPIO/AGRN4/TXO0-_8b/TXO1-_10b/BR2N
ARED7/AGRN3/TXE3+_8b/TXO0+_10b/BR1P
AVS0
ARED6/AGRN2/TXE3-_8b/TXO0-_10b/BR1N
AHS0
ARED5/ARED7/TXEC+_8b/TXE4+_10b/AB3P
ADC_VDD
ARED4/ARED6/TXEC-_8b/TXE4+_10b/AB3N
B0ARED3/ARED5/TXE2+_8b/TXE3+_10b/AB2P
B0+
ARED2/ARED4/TXE2-_8b/TXE3-_10b/AB2N
G0ARED1/ARED3/TXE1+_8b/TXEC+_10b/AB1P
G0+
ARED0/ARED2/TXE1-_8b/TXEC-_10b/AB1N
SOG0
DENA/TXE0+_8b/TXE2+_10b/ACLKP
R0DHS/TXE0-_8b/TXE2-_10b/ACLKN
R0+
DCLK/GPIO/PWM0/TXE1+_10b/AG3P
GPI/B1- / V8_7
DVS/GPIO/PWM1/TXE1-_10b/AG3N
GPI/B1+ / V8_6
GPIO/PWM2/TXE0+_10b/AG2P
GPI/G1- / V8_5
GPIO/PWM3/TCON[11][6]/TXE0-_10b/AG2N
GPI/G1+ / V8_4
GPIO/PWM4/TCON[12][3]/AG1P
GPI/SOG1 / V8_3
GPIO/PWM5/TCON[0]/AG1N
GPI/R1-/V8_2
SD3/ SPDIF3/TCON[10]/GPIO/PWM0/AR3P
GPI/R1+/V8_1
SD2/SPDIF2/TCON[8]/GPIO/IICSCL/PWM1/AR3N
SD1/SPDIF1/TCON[5]/GPIO/IRQ/IICSDA/AR2P
SD0 / SPDIF0 / TCON[9] / GPIO / AR2N
ADC_GND
MCK/TCON[7]/GPIO/AR1P
GPI/V8_0/AHS1
SCK/TCON[3]/GPIO/AR1N
VCLK/AVS1
WS/TCON[6]/GPIO/SDT
V8_7/GPIO
SD0/SPDIF0/TCON[4]/GPIO/SPDIF1
LINE_INL/V8_6/IICSCL/GPIO
SD1/ SPDIF1/TCON[9]/GPIO/WS
LINE_INR/V8_5/IICSDA/GPIO
SD2/SPDIF2/TCON[1][11]/GPIO/IrDA/SCK
SPDIF3/AUDIO_REF/V8_4/WS/GPIO
SD3/SPDIF3/TCON[13]/GPIO/VCLK/MCK
AUDIO_SOUTL/V8_3/SCK/GPIO
SPI_SCLK/SeriesData
AUDIO_SOUTR/V8_2/MCK/GPIO
SI/MCU_SCLK
AUDIO_HOUTL/V8_1/SD0/GPIO
SO/SCSB
AUDIO_HOUTR/V8 _0/PWM0/GPIO
CEB/IRQB
LS_ADC_VDD
GPIO/PWM5/SPDIF1
A-ADC0/VCLK/GPIO
VCCK
A-ADC1/GPIO
DDCSCL3/GPIO/AUX-CH_P1
DVT add test point
For Port1 DDCSDA3/GPIO/AUX-CH_N1
A-ADC2/GPIO
for Scalar dubug.
A-ADC3/GPIO
For Port0 DDCSDA2/GPIO/AUX-CH_N0
A-ADC4/GPIO
DDCSCL2/GPIO/AUX-CH_P0
TCON[0][5]/BADC0/PWM1/PWM5/GPIO
RESETB
TCON[1][4]/B-ADC1/IICSCL/GPIO
CEC/GPIO/PWM1/SPDIF2
TCON[9][11]/B-ADC2/IICSDA/GPIO
XO
TCON[7][10]/DDCSCL1/GPIO
XI
TCON[3][5]/DDCSDA1/GPIO
Thermal pad
VCCK
For EMI
+1.2V_SCA_ADC
1 C538 1 C539
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
[40] VGA_VSYNC_IIN
[40] VGA_HSYNC_IN
DP_VDD/TMDS_VDD
TMDS_REXT
LANE0P/RX2P_0
LANE0N/RX2N_0
LANE1P/RX1P_0
LANE1N/RX1N_0
HDMI-Port0
LANE2P/RX0P_0
LANE2N/RX0N_0
LANE3P/RXCP_0
LANE3N/RXCN_0
DP_GND/TMDS_GND
LANE0P/RX2P_1
LANE0N/RX2N_1
LANE1P/RX1P_1
LANE1N/RX1N_1
HDMI-Port1
LANE2P/RX0P_1
LANE2N/RX0N_1
LANE3P/RXCP_1
LANE3N/RXCN_1
DP_VDD/TMDS_VDD2
1 C1055
@
0.1U_0402_16V4Z
+3VALW
0.67mA
EXTERNAL
D-Sub-IN
+1.2VALW=1+R533/R535
S_CLK_R
1
1
C528@
10PF_0402_50V9
+3V_SCA
+3V_SCA
8
7
6
5
W25X10BVSNIG_SO8
R514
4.7K_0402_5%
C537
0.1U_0402_16V4Z
1
2
R508 22_0402_5%
R509 22_0402_5%
R510 0_0402_5% U24
2
1 CS#
VCC
2
2 DO(IO1) HOLD#(IO3)
2
3 WP#(IO2)
CLK
4 GND
DI(IO0)
1
1
1
R513
4.7K_0402_5%
C523
0.1U_0402_16V4Z
EXTERNAL
HDMI-IN
HDMI_D0HDMI_D0+
HDMI_D1HDMI_D1+
HDMI_D2HDMI_D2+
HDMI_CK+
HDMI_CK-
CE
SDOUT
FLASH_WP
8
7
6
5
PGND
PGND
PGND
[37]
[37]
[37]
[37]
[37]
[37]
[37]
[37]
GND
GND
GND
GND
G9141P11U_SO8
600mA
SHDN
IN
OUT
SET
107
85
61
INTERNAL
HDMI
1
TMDS_REXT
2
HDMI_C_TX03
HDMI_C_TX0+
4
HDMI_C_TX15
HDMI_C_TX1+
6
HDMI_C_TX27
HDMI_C_TX2+
8
HDMI_C_CLK+ 9
HDMI_C_CLK- 10
11
HDMI_D012
HDMI_D0+
13
HDMI_D114
HDMI_D1+
15
HDMI_D216
HDMI_D2+
17
HDMI_CK+
18
HDMI_CK19
20
U23
1
2
3
4
[36]
[36]
[36]
[36]
[36]
[36]
[36]
[36]
R523 6.2K_0402_5%
1
2
HDMI_C_TX0HDMI_C_TX0+
HDMI_C_TX1HDMI_C_TX1+
HDMI_C_TX2HDMI_C_TX2+
HDMI_C_CLK+
HDMI_C_CLK-
U25
C527 1
4.7U_0603_10V6K
R521 6.2K_0402_5%
1
2
0.1U_0402_16V4Z
+3V_SCA
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V4Z
1 C1056
@
0.1U_0402_16V4Z
10U_0603_6.3V6M
R531
0_0402_5%
116mA
1 C529 1 C530 1 C531 1 C532
58mA
+1.2V_SCA
10U_0603_6.3V6M
+3V_SCA
+3V_SCA
C524
1U_0402_6.3V6K
2
1
R507
20_0402_1%
C526 1
L29
1
2
BLM18PG181SN1D_0603
+1.2V_SCA_L
C525 1U_0402_6.3V6K
1
2
PMV65XP 1P SOT23 TMOS
+3V_SCA_R
C533
10U_0603_6.3V6M
BLM18PG181SN1D_0603
R1040
1
R1041
1
R516
1
@ R506
0_0805_5%
4.7K_0402_5%
2
4.7K_0402_5%
2
4.7K_0402_5%
2
Q46
151mA
2
L28
1 C534
+3V_SCA_R
@ R1046
4.7K_0402_5%
+1.2V_SCA
+3V_SCA_R
2
100_0402_1%
+3V_SCA
@ R1045
4.7K_0402_5%
R504
10K_0402_5%
G
1
R505
[49] SCALER_ON#
+3V TO +1.2VALW
1
1
C522
0.1U_0402_16V4Z
Title
Scaler RTD2472/82D
Size
Document Number
R ev
0.1
Sheet
1
34
of
64
TXO0+
TXO0-
[34] TXO0+
[34] TXO0-
TXO1+
TXO1-
[34] TXO1+
[34] TXO1-
TXO2+
TXO2-
[34] TXO2+
[34] TXO2-
+LCDVDD
1
C553
0.1U_0402_16V4Z
2
680P_0402_50V7K
TXO3+
TXO3-
[34] TXO3+
[34] TXO3-
1
32
C552
2
31
31
6 2
2N7002KDWH_SOT363-6
TXE0+
TXE1TXE2+
TXEC+
TXE3+
EC
1
R567
[49] EC_ENVDD
2
0_0402_5%
R563
1
2
1.5M_0402_5%
Q32B
2
2
C549
1
32
Q32A
TXO0TXO1TXO2TXOC+
TXO3+
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
1000P_0402_50V7K
120mil
+LCDVDD
TXE0TXE1+
TXE2TXECTXE3-
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
TXOC+
TXOC-
[34] TXOC+
[34] TXOC-
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
+5VALW
VGA
1
R1044
[22] VGA_ENVDD
2N7002KDWH_SOT363-6
R570
100K_0402_5%
2
0_0402_5%
C550
4.7U_0603_10V6K
TXO0+
TXO1+
TXO2+
TXOCTXO3-
TXE3+
TXE3-
[34] TXE3+
[34] TXE3-
R556
1M_0402_5%
JLVDS1
TXE2+
TXE2-
[34] TXE2+
[34] TXE2-
R555
100_0805_5%
TXE1+
TXE1-
[34] TXE1+
[34] TXE1D
TXE0+
TXE0-
[34] TXE0+
[34] TXE0-
+5VALW
2
+LCDVDD
TXEC+
TXEC-
[34] TXEC+
[34] TXEC-
+LCDVDD
C551
0.1U_0402_16V4Z
ACES_50255-03001-001
CONN@
C554
0.1U_0402_16V4Z
Converter
B+
L30
1
2
FBMA-L11-201209-221LMA30T_0805 1
INVPWR_B+
[49] BKOFF#
R586 0_0402_5%
2
R1049
100K_0402_5%
LCD_PWM
Scaler
[34] S_INVT_PWM
R591 0_0402_5%
1
2
EC
[49] INVT_PWM
@ R594 0_0402_5%
1
2
LCD_BKOFF#
LCD_PWM
1
@ C557
680P_0402_50V7K
VGA
[22] VGA_LCD_PWM
R1050 0_0402_5%
2
2010/10/1
Deciphered Date
1
2
3
4
5
6
7
8
9
10
11
12
13
14
GND1
GND2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
1
2
3
4
5
6
7
8
9
10
11
12
ACES_50224-01201-001
CONN@
Security Classification
Issued Date
C555
680P_0402_50V7K
JCON1
463mA
LCD_BKOFF#
1
EC
2
2
C556
680P_0402_50V7K
Title
LVDS
Size Document Number
Custom
R ev
0.1
Date:
Sheet
1
35
of
64
DIS only
1
[23] VGA_SHDMI_ETXC+
[23] VGA_SHDMI_ETXC[23] VGA_SHDMI_ETXD0+
[23] VGA_SHDMI_ETXD0[23] VGA_SHDMI_ETXD1+
[23] VGA_SHDMI_ETXD1[23] VGA_SHDMI_ETXD2+
[23] VGA_SHDMI_ETXD2-
VGA_SHDMI_ETXC+
VGA_SHDMI_ETXC-
DIS@ C1556
DIS@ C1557
1
1
2 0.1U_0402_10V7K
2 0.1U_0402_10V7K
HDMI_C_CLK+
HDMI_C_CLK-
HDMI_C_CLK+ [34]
HDMI_C_CLK- [34]
VGA_SHDMI_ETXD0+
VGA_SHDMI_ETXD0-
DIS@ C1558
DIS@ C1559
1
1
2 0.1U_0402_10V7K
2 0.1U_0402_10V7K
HDMI_C_TX0+
HDMI_C_TX0-
HDMI_C_TX0+ [34]
HDMI_C_TX0- [34]
VGA_SHDMI_ETXD1+
VGA_SHDMI_ETXD1-
DIS@ C1560
DIS@ C1561
1
1
2 0.1U_0402_10V7K
2 0.1U_0402_10V7K
HDMI_C_TX1+
HDMI_C_TX1-
HDMI_C_TX1+ [34]
HDMI_C_TX1- [34]
VGA_SHDMI_ETXD2+
VGA_SHDMI_ETXD2-
DIS@ C1562
DIS@ C1563
1
1
2 0.1U_0402_10V7K
2 0.1U_0402_10V7K
HDMI_C_TX2+
HDMI_C_TX2-
HDMI_C_TX2+ [34]
HDMI_C_TX2- [34]
PCH_HDMI_CLK+
PCH_HDMI_CLK-
UMA@ C1564
UMA@ C1565
1
1
2 0.1U_0402_10V7K
2 0.1U_0402_10V7K
PCH_HDMI_TX0+
PCH_HDMI_TX0-
UMA@ C1566
UMA@ C1567
1
1
2 0.1U_0402_10V7K
2 0.1U_0402_10V7K
PCH_HDMI_TX1+
PCH_HDMI_TX1-
UMA@ C1568
UMA@ C1569
1
1
2 0.1U_0402_10V7K
2 0.1U_0402_10V7K
PCH_HDMI_TX2+
PCH_HDMI_TX2-
UMA@ C1570
UMA@ C1571
1
1
2 0.1U_0402_10V7K
2 0.1U_0402_10V7K
UMA@ R635
680_0402_5%
UMA@ R636
HDMI_C_TX0+ UMA@ R637
HDMI_C_TX0UMA@ R638
HDMI_C_TX1+ UMA@ R639
HDMI_C_TX1UMA@ R640
HDMI_C_TX2+ UMA@ R642
HDMI_C_TX2UMA@ R643
680_0402_5%
680_0402_5%
HDMI_C_CLK+
HDMI_C_CLK-
680_0402_5%
680_0402_5%
DIS@
DIS@
DIS@
R642
499_0402_5%
R643
499_0402_5%
R639
499_0402_5%
R640
499_0402_5%
DIS@
DIS@
DIS@
DIS@
680_0402_5%
680_0402_5%
680_0402_5%
+3VS
D
2
G
S
Q36
SSM3K7002BF 1N SC59-3
UMA@
R635
499_0402_5%
R636
499_0402_5%
R637
499_0402_5%
R638
499_0402_5%
R618 UMA@
2.2K_0402_5%
R619
4.7K_0402_5%
R620
4.7K_0402_5%
PCH_HDMI_DATA
[16] PCH_HDMI_DATA
[23] VGA_SHDMI_EDATA
0_0402_5% UMA@
2
2
0_0402_5% DIS@
R1582
1
1
R1583
0_0402_5% UMA@
2
2
0_0402_5% DIS@
PCH_HDMI_CLK
[16] PCH_HDMI_CLK
[23] VGA_SHDMI_ECLK
[16] DDPC_HDP
[22] VGA_SHDMI_HPD
DDPC_HDP
UMA@
VGA_SHDMI_HPD
DIS@
S_HDMI_DATA
S_HDMI_DATA [34]
Q35A
2N7002KDW_SOT363-6
R1580
1
1
R1581
UMA@ R617
2.2K_0402_5%
+5VS
+3VS
+3VS
S_HDMI_CLK
S_HDMI_CLK [34]
Q35B
2N7002KDW_SOT363-6
HDMI_HPD_LS
1
2
R641
0_0402_5%
HDMI_HPD_LS [34]
1
2
R1584
0_0402_5%
Issued Date
Security Classification
2010/10/1
2011/11/01
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
R ev
0.1
Date:
G
Sheet
36
H
of
64
+HDMI_EDID_5V
1
4
3
3 R676
0_0402_5%
HDMIIN@
2
[34] HDMI_CK-
[34] HDMI_D0+
R677
0_0402_5%
HDMIIN@
1
2
[34] HDMI_D0-
[34] HDMI_D1+
R681
0_0402_5%
HDMIIN@
1
2
4
1
[34] HDMI_D2+
R684
0_0402_5%
HDMIIN@
1
2
F2
D16
1.1A_6V_SMD1812P110TF RB491D_SOT23
HDMIIN@
HDMIIN@
1
+HDMI_5V_IN
C581
0.1U_0402_16V4Z
HDMIIN@
HDMI_R_CK-
D18
HDMI_R_CK- 1 1
HDMI_R_D0+
109
HDMI_R_CK-
HDMI_R_CK+ 2 2
98
HDMI_R_CK+
HDMI_R_D0-
4 4
77
HDMI_R_D0-
HDMI_R_D0+ 5 5
66
HDMI_R_D0+
+HDMI_EDID_5V
HDMI-in Connector
R679
4.7K_0402_5%
HDMIIN@
3 3
HDMI_R_D0-
R680
4.7K_0402_5%
HDMIIN@
JHDMI1
HDMI_TV_SDATA
HDMI_TV_SCLK
HDMI_TV_HPD
[34] HDMI_TV_SDATA
[34] HDMI_TV_SCLK
HDMI_R_D1+
HDMI_R_D1-
HDMI_R_D1-
D19
1 1
109
HDMI_R_D1-
HDMI_R_D1+ 2 2
98
HDMI_R_D1+
HDMI_R_D2-
4 4
77
HDMI_R_D2-
HDMI_R_D2+ 5 5
66
HDMI_R_D2+
HDMI_R_CKHDMI_R_CK+
HDMI_R_D0HDMI_R_D0+
HDMI_R_D1HDMI_R_D1+
HDMI_R_D2HDMI_R_D2+
D20
PJDLC05C_SOT23-3
HDMIIN@
(Cj=5pF)
+HDMI_5V_IN
8
YSCLAMP0524P_SLP2510P8-10-9
HDMIIN@
3
3 R683
0_0402_5%
HDMIIN@
2
C580
0.1U_0402_16V4Z
HDMIIN@
L36
WCM-2012-900T_0805
@
2 2
[34] HDMI_D1-
L35
WCM-2012-900T_0805
@
2 2
3
3 R678
0_0402_5%
HDMIIN@
2
+5VALW
1
HDMI_TV_HPD
[34] HDMI_TV_HPD
HDMI_R_CK+
L34
WCM-2012-900T_0805
@
2 2
18
16
15
19
+5V
SDA
SCL
HP_DET
12
10
9
7
6
4
3
1
CKCK+
D0D0+
D1D1+
D2D2+
CEC
Reserved
13
14
GND
GND
GND
GND
GND
GND
GND
GND
DDC/CEC_GND
2
5
8
11
20
21
22
23
17
HDMI_CABLE_DET# [34,49]
SUYIN_100042GR019M12RZR
CONN@
[34] HDMI_CK+
+HDMI_EDID_5V
D15
RB491D_SOT23
HDMIIN@
R674
1K_0402_1%
HDMIIN@
R673
0_0402_5%
HDMIIN@
1
2
3 3
HDMI_R_D2+
L37
WCM-2012-900T_0805
@
2 2
YSCLAMP0524P_SLP2510P8-10-9
HDMIIN@
HDMI_TV_HPD
HDMI_CABLE_DET#
[34] HDMI_D2-
HDMI_R_D2-
R685
0_0402_5%
D21
PJDLC05C_SOT23-3
HDMIIN@
HDMIIN@
Security Classification
2010/10/1
Issued Date
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
R ev
0.1
Sheet
E
37
of
64
DIS only
[23] VGA_HDMI_ETXD1+
[23] VGA_HDMI_ETXD1[23] VGA_HDMI_ETXC+
[23] VGA_HDMI_ETXC-
1
1
2 0.1U_0402_10V7K
2 0.1U_0402_10V7K
HDMIOUT_TX2+
HDMIOUT_TX2-
HDMIOUT_TX2+ [39]
HDMIOUT_TX2- [39]
HDMIOD@ C1574
HDMIOD@ C1575
1
1
2 0.1U_0402_10V7K
2 0.1U_0402_10V7K
HDMIOUT_TX1+
HDMIOUT_TX1-
HDMIOUT_TX1+ [39]
HDMIOUT_TX1- [39]
HDMIOD@ C1576
HDMIOD@ C1577
1
1
2 0.1U_0402_10V7K
2 0.1U_0402_10V7K
HDMIOUT_CLK+
HDMIOUT_CLK-
HDMIOUT_CLK+ [39]
HDMIOUT_CLK- [39]
2 0.1U_0402_10V7K
2 0.1U_0402_10V7K
HDMIOUT_TX0+
HDMIOUT_TX0-
HDMIOUT_TX0+ [39]
HDMIOUT_TX0- [39]
HDMIOD@ C1572
HDMIOD@ C1573
[23] VGA_HDMI_ETXD2+
[23] VGA_HDMI_ETXD2-
HDMIOD@ C1578
HDMIOD@ C1579
[23] VGA_HDMI_ETXD0+
[23] VGA_HDMI_ETXD0-
1
1
HDMIOD@
HDMIOD@
HDMIOD@
HDMIOD@
R1593
499_0402_5%
R1594
499_0402_5%
R1591
499_0402_5%
R1592
499_0402_5%
HDMIOD@
HDMIOD@
HDMIOD@
HDMIOD@
R1587
499_0402_5%
R1588
499_0402_5%
R1589
499_0402_5%
R1590
499_0402_5%
UMA only
PCH_HDMIOUT_TX2+ HDMIOU@ C1580
PCH_HDMIOUT_TX2- HDMIOU@ C1581
[16] PCH_HDMIOUT_TX2+
[16] PCH_HDMIOUT_TX2[16] PCH_HDMIOUT_TX1+
[16] PCH_HDMIOUT_TX1[16] PCH_HDMIOUT_CLK+
[16] PCH_HDMIOUT_CLK[16] PCH_HDMIOUT_TX0+
[16] PCH_HDMIOUT_TX0-
1
1
2 0.1U_0402_10V7K HDMIOUT_TX2+
2 0.1U_0402_10V7K HDMIOUT_TX2-
1
1
2 0.1U_0402_10V7K HDMIOUT_TX1+
2 0.1U_0402_10V7K HDMIOUT_TX1-
1
1
2 0.1U_0402_10V7K HDMIOUT_CLK+
2 0.1U_0402_10V7K HDMIOUT_CLK-
1
1
2 0.1U_0402_10V7K HDMIOUT_TX0+
2 0.1U_0402_10V7K HDMIOUT_TX0-
HDMIOU@
HDMIOU@
R1587 680_0402_5%
R1588 680_0402_5%
HDMIOU@ R1589 680_0402_5%
HDMIOU@
R1590 680_0402_5%
HDMIOU@ R1591 680_0402_5%
HDMIOU@
R1592 680_0402_5%
HDMIOU@ R1593 680_0402_5%
HDMIOU@
R1594 680_0402_5%
1
+3VS
D
2
G
S
Q93
SSM3K7002BF 1N SC59-3
HDMIO@
+3VS
+HDMIOUT_EDID_5V
R1487
2.2K_0402_5%
HDMIOU@
R1464
2.2K_0402_5%
HDMIO@
2 0_0402_5%
2
0_0402_5%
[16] PCH_HDMIOUT_CLK
[23] VGA_HDMI_ECLK
2 0_0402_5%
2
0_0402_5%
HDMIOUT_SDATA
HDMIOUT_SDATA [39]
Q94A
2N7002KDW_SOT363-6
HDMIO@
[16] PCH_HDMIOUT_DATA
[23] VGA_HDMI_EDATA
R1463
2.2K_0402_5%
HDMIO@
R1486
2.2K_0402_5%
HDMIOU@
+3VS
HDMIOUT_SCLK
HDMIOUT_SCLK [39]
Q94B
2N7002KDW_SOT363-6
HDMIO@
DIS only
UMA only
+3VGS
+3VS
2
G
Q96
SSM3K7002F_SC59-3
HDMIOD@
HDMIOUT_HPD_R
3
1
Q97
SSM3K7002F_SC59-3
1
HDMIOU@
R1598
HDMIOU@
100K_0402_5%
2
HDMIOU@
[16] DDPD_HDP
Issued Date
2010/10/1
2011/11/01
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Security Classification
HDMIOUT_HPD_R [39]
220P_0402_25V8J
C1529
[18] DGPU_HPD_INT#
R1597
10K_0402_5%
HDMIOD@
R1596
1M_0402_5%
HDMIOU@
[22] VGA_HDMIOUT_HPD
HDMIOUT_HPD_R
2
100K_0402_5%
HDMIOD@
R1595
2
B
C
Q95
MMBT3904_SOT23-3
E
HDMIOD@
Title
R ev
0.1
Date:
G
Sheet
38
H
of
64
+HDMIOUT_EDID_5V
D55
RB491D_SOT23
HDMIO@
HDMIOUT_TX2+
HDMIOUT_TX2-
[38] HDMIOUT_TX2+
[38] HDMIOUT_TX2-
F1
+5VS
HDMIOUT_TX1+
HDMIOUT_TX1-
[38] HDMIOUT_TX1+
[38] HDMIOUT_TX1-
HDMIO@
HDMIOUT_CLK+
HDMIOUT_CLK-
[38] HDMIOUT_CLK+
[38] HDMIOUT_CLK-
C1434
0.1U_0402_16V4Z
HDMIO@
HDMIOUT_TX0+
HDMIOUT_TX0-
[38] HDMIOUT_TX0+
[38] HDMIOUT_TX0-
1.1A_6V_SMD1812P110TF
HDMI-OUT Connector
+HDMIOUT_EDID_5V
JHDMI2
R1465
0_0402_5%
@
1
2
D56
PJDLC05C_SOT23-3
HDMIO@
(Cj=5pF)
HDMIOUT_CLK-
HDMIOUT_TX0+
R1467
0_0402_5%
@
1
2
4
1
HDMIOUT_TX1+
R1469
0_0402_5%
@
1
2
HDMIOUT_TX1-
1
4
HDMIOUT_TX2-
3
3 R1468
0_0402_5%
@
D57
HDMIOUT_R_CK-1 1
HDMIOUT_R_D0-
CKCK+
D0D0+
D1D1+
D2D2+
13
14
GND
GND
GND
GND
GND
GND
GND
GND
DDC/CEC_GND
2
5
8
11
20
21
22
23
17
SUYIN_100042GR019M12RZR
CONN@
HDMIOUT_HPD_R
109
HDMIOUT_R_CK-
HDMIOUT_R_CK+2 2
9 8 HDMIOUT_R_CK+
HDMIOUT_R_D0- 4 4
77
HDMIOUT_R_D0-
HDMIOUT_R_D0+5 5
66
HDMIOUT_R_D0+
D58
PJDLC05C_SOT23-3
HDMIO@
3 3
HDMIOUT_R_D1+
L94
WCM-2012-900T_0805
HDMIO@
2 2
3
3 R1470
0_0402_5%
@
2
D59
HDMIOUT_R_D1- 1 1
HDMIOUT_R_D1-
HDMIOUT_R_D2+
YSCLAMP0524P_SLP2510P8-10-9
HDMIO@
L95
WCM-2012-900T_0805
HDMIO@
2 2
12
10
9
7
6
4
3
1
CEC
Reserved
HDMIOUT_R_D0+
R1471
0_0402_5%
@
1
2
HDMIOUT_TX2+
HDMIOUT_R_CK-
L93
WCM-2012-900T_0805
HDMIO@
2 2
HDMIOUT_TX0-
HDMIOUT_R_CKHDMIOUT_R_CK+
HDMIOUT_R_D0HDMIOUT_R_D0+
HDMIOUT_R_D1HDMIOUT_R_D1+
HDMIOUT_R_D2HDMIOUT_R_D2+
3
3 R1466
0_0402_5%
@
2
+5V
SDA
SCL
HP_DET
18
16
15
19
HDMIOUT_R_CK+
L92
WCM-2012-900T_0805
HDMIO@
2 2
HDMIOUT_SDATA
HDMIOUT_SCLK
HDMIOUT_HPD_R
109
HDMIOUT_R_D1-
HDMIOUT_R_D1+2 2
98
HDMIOUT_R_D1+
HDMIOUT_R_D2- 4 4
77
HDMIOUT_R_D2-
HDMIOUT_R_D2+5 5
66
HDMIOUT_R_D2+
HDMIOUT_CLK+
[38] HDMIOUT_SDATA
[38] HDMIOUT_SCLK
[38] HDMIOUT_HPD_R
3 3
8
YSCLAMP0524P_SLP2510P8-10-9
HDMIO@
3
HDMIOUT_R_D2-
2
R1472
0_0402_5%
@
Security Classification
2010/10/1
Issued Date
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
R ev
0.1
Sheet
E
39
of
64
L31 VGAIN@
1
2
FCM1608KF-110T05 0603
RED_IN
JCRT1
2
2
3
BAV99_SOT23-3
VGAIN@
VGAIN@
C564
VGAIN@
5P_0402_50V8C
R649 VGAIN@
100_0603_1%
VGA_GNDR
1
2
R651 VGAIN@
1K_0402_5%
1
2
PAD
VGA_DDC_DAT_IN
GREEN_IN
JVGA_HS
BLUE_IN
VGA_GND_RED [34]
C567
VGAIN@
0.022U_0402_25V7K
VGA_SOG_R
1
2
CRT_DDC_DAT_IN [34]
100_0402_1%
@ R652
1M_0402_5%
JVGA_VS
VGA_IN_DET# [34,49]
R650
CRT_DDC_CLK_IN [34]
L32 VGAIN@
1
2
FCM1608KF-110T05 0603
GREEN_IN
100_0402_1%
VGAIN@ R655
75_0402_1%
2
1
C571
0.1U_0402_25V6
L33 VGAIN@
1
2
FCM1608KF-110T05 0603
BLUE_IN
1
1
D12 VGAIN@
RB491D_SOT23
R656 VGAIN@
100_0603_1%
VGA_GNDG
1
2
C572 VGAIN@
0.047U_0402_16V7K
1
2
VGA_GND_GREEN [34]
R657 VGAIN@
100_0603_1%
BLUE_IN_R
1
2
C573 VGAIN@
0.047U_0402_16V7K
1
2
VGA_BLUE_IN [34]
C575
VGAIN@
5P_0402_50V8C
R659 VGAIN@
100_0603_1%
VGA_GNDB
1
2
C577 VGAIN@
0.047U_0402_16V7K
1
2
VGA_GND_BLUE [34]
BLUE_IN_B
U30
C574 VGAIN@
0.1U_0402_16V4Z
VGAIN@ R658
75_0402_1%
2
1
1
C576
0.1U_0402_25V6
VGAIN@ D13
PSOT24C_SOT23-3
BAV99_SOT23-3
VGAIN@
VGAIN@
+5VALW
C570 VGAIN@
5P_0402_50V8C
+3VS
D11 VGAIN@
RB491D_SOT23
2
1
+VGA_5V_IN
BAV99_SOT23-3
VGAIN@
VGAIN@
+VGA_5V
VGA_GREEN_IN [34]
U29
D10 VGAIN@
PSOT24C_SOT23-3
R654 VGAIN@
C568 VGAIN@
100_0603_1%
0.047U_0402_16V7K
GREEN_IN_R
1
2
1
2
GREEN_IN_B
1
C569 VGAIN@
100P_0402_50V8J
VGA_DDC_CLK_IN
CH_13-12201527CP
CONN@
VGA_SOG [34]
R653
C566 VGAIN@
0.047U_0402_16V7K
1
2
T256
RED_IN
VGA_RED_IN [34]
+3VS
NC_CRT
16 G
17 G
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
C565
0.1U_0402_25V6
R648 4.7K_0402_5%
VGAIN@ R646
75_0402_1%
1
1
C563 VGAIN@
0.047U_0402_16V7K
1
2
R647 4.7K_0402_5%
VGA_DDC_CLK_IN
1
2
VGA_DDC_DAT_IN
1
2
R645 VGAIN@
100_0603_1%
RED_IN_R
1
2
RED_IN_B
U28
+VGA_5V
+3VS
[11,12,14] PM_SMBDATA
Q100A
VGAIN@ R669
2K_0402_5%
CRT_DDC_DAT_IN
2N7002KDWH_SOT363-6
D14 VGAIN@
PSOT24C_SOT23-3
VGA_VSYNC_IIN [34]
R670 VGAIN@
2K_0402_5%
C578 VGAIN@
22P_0402_50V8J
C579 VGAIN@
22P_0402_50V8J
S
4
[11,12,14] PM_SMBCLK
2
G
@ Q107
SSM3K7002BF 1N SC59-3
[49] SCFW_UPDATE#
R1615 0_0402_5%
VGA_HSYNC_IN [34]
4.7K_0402_5%
2
1
1
2
@ R1614
JVGA_VS
100K_0402_5%
R1616
+3VS
R666 VGAIN@
100_0402_1%
1
2
R668 VGAIN@
100_0402_1%
1
2
JVGA_HS
Scaler FW update
CRT_DDC_CLK_IN
3
Q100B
2N7002KDWH_SOT363-6
+USB_VCCC
1
R695
[41,49] USB1_EN#
+USB_VCCC
2
C1393
8
7
6
5
AP2301SG-13 SO 8P
C1396
4.7U_0603_10V6K
1
1000P_0402_50V7K
[17] USB20_N4
USB20_N4_R
[13] SATA_PRX_C_DTX_N4
C1399
C1398
1
1
2 SATA_PRX_DTX_P4
0.01U_0402_25V7K
2 SATA_PRX_DTX_N4
0.01U_0402_25V7K
USB20_P4_R
4
[17] USB20_P4
USB_OC#2 [17,41]
[13] SATA_PTX_C_DRX_P4
WCM-2012-900T_0805
[13] SATA_PTX_C_DRX_N4
10
1
9
2
4
3
6
5
7
1
R696
C1397
4.7U_0603_10V6K
B+
VBUS
BDGND
D+
A+
GND
A-
GND
GND
GND
GND
GND
GND
8
11
12
13
14
15
TAIWI_EU091-117CRL-TW
CONN@
2
0_0402_5% @
GND VOUT
VIN VOUT
VIN VOUT
EN
FLG
JSATA1
[13] SATA_PRX_C_DTX_P4
L41
For EMI
U83
1
2
3
4
USB1_EN#
2.5A
+5VALW
R1414
100K_0402_5%
W=60mils
+3VALW
2
0_0402_5% @
+USB_VCCC
D25
PJDLC05C_SOT23-3
C1395
0.1U_0402_25V6
C1394
150U_B2_6.3VM_R35M
2010/10/1
Issued Date
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Security Classification
Title
Size
Date:
Document Number
Custom
R ev
0.1
Sheet
E
40
of
64
+5VS
1.2A
1
C582
10U_0805_10V4Z
C583
0.1U_0402_16V4Z
+5VS
C584
0.1U_0402_16V4Z
C585
0.1U_0402_16V4Z
1.1A
1
C594
10U_0805_10V4Z
+12VS
C595
10U_0805_10V4Z
1
C596
@
1U_0603_10V6K
1
C597
0.1U_0402_16V4Z
C598
0.1U_0402_16V4Z
D
C586
10U_0805_25V6K
C587
0.1U_0402_25V6
C588
0.1U_0402_25V6
C589
0.1U_0402_25V6
JHDD1
1
2
3
4
5
6
7
8
9
10
11
12
1
2
3
4
5
6
7
8
9
10
11
12
GND1
GND2
13
14
JODD1
SATA_PTX_C_DRX_P0
SATA_PTX_C_DRX_N0
SATA_PRX_DTX_N0
SATA_PRX_DTX_P0
SATA_PTX_C_DRX_P0 [13]
SATA_PTX_C_DRX_N0 [13]
C591 1
C593 1
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
SATA_PRX_C_DTX_N0 [13]
SATA_PRX_C_DTX_P0 [13]
Close to JHDD
+5VS
+12VS
SATA_PTX_C_DRX_P1
SATA_PTX_C_DRX_N1
0.01U_0402_25V7K
C590
SATA_PRX_DTX_N1 1
2
SATA_PRX_DTX_P1 1
2
0.01U_0402_25V7K
C592
1
2
3
4
5
6
7
8
9
10
11
12
1
2
3
4
5
6
7
8
9
10
GND1
GND2
SATA_PTX_C_DRX_P1 [13]
SATA_PTX_C_DRX_N1 [13]
SATA_PRX_C_DTX_N1 [13]
SATA_PRX_C_DTX_P1 [13]
+5VS
ACES_50224-01001-001
CONN@
ACES_50224-01201-001
CONN@
C
2.5A
+5VALW
+USB_VCCB
GND VOUT
VIN VOUT
VIN VOUT
EN
FLG
2
C603
8
7
6
5
WCM-2012-900T_0805
@
1
R690
C602
4.7U_0603_10V6K
USB20_N5_R
USB20_P5_R
VCC
D-
D+
2
0_0402_5%
GND
0_0402_5%
2
+USB_VCCA
1
GND
GND
C604
C1067
0.1U_0402_25V6
[17] USB20_N9
USB20_N9_R
[17] USB20_P9
USB20_P9_R
2
2
150U_B2_6.3VM_R35M
WCM-2012-900T_0805
1
R693
+USB_VCCA
JUSB3
L39
ACON_UAS2C-4K1921
CONN@
D22
PJDLC05C_SOT23-3
R691
@
1
+USB_VCCB
VCC
D-
D+
GND
GND
GND
C606
4.7U_0603_10V6K
JUSB6
[17] USB20_P5
1
1000P_0402_50V7K
USB_OC#4 [17]
C1073 AP2301SG-13 SO 8P
4.7U_0603_10V6K
+USB_VCCB
[17] USB20_N5
For EMI
2
C599
8
7
6
5
0_0402_5%
2
2
GND VOUT
VIN VOUT
VIN VOUT
EN
FLG
L38
1
USB1_EN#
1
1000P_0402_50V7K
USB_OC#2 [17,40]
C1074 AP2301SG-13 SO 8P
4.7U_0603_10V6K
R689
@
1
For EMI
U34
1
2
3
4
1
2
3
4
W=60mils
2.5A
+5VALW
R688
100K_0402_5%
USB1_EN#
+USB_VCCA
U33
+3VALW
[40,49] USB1_EN#
W=60mils
2
0_0402_5%
ACON_UAS2C-4K1921
CONN@
C600
C1068
0.1U_0402_25V6
2
2
150U_B2_6.3VM_R35M
D23
PJDLC05C_SOT23-3
R692
@
1
+USB_VCCA
0_0402_5%
2
+USB_VCCA
JUSB4
L40
[17] USB20_P8
1
4
2
3
USB20_N8_R
USB20_P8_R
@
1
R694
WCM-2012-900T_0805
[17] USB20_N8
VCC
D-
D+
GND
GND
GND
2
0_0402_5%
1
+
C601
ACON_UAS2C-4K1921
CONN@
C1070
0.1U_0402_25V6
2
2
150U_B2_6.3VM_R35M
D24
PJDLC05C_SOT23-3
2010/10/1
Issued Date
Security Classification
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
SATA-HDD/ODD/USB
Size
Document Number
R ev
0.1
Sheet
1
41
of
64
40 mils
0.1U_0402_16V4Z
1
1
C610
C612
47P_0402_50V8J
2
2
2
0.01U_0402_25V7K
4.7U_0603_10V6K
@ R698
1
1
T182PAD @
T183PAD @
BT_COEX1
BT_COEX2
[14] CLKREQ_WLAN#
[14] CLK_WLAN#
[14] CLK_WLAN
[14] PCIE_PRX_WLANTX_N3
[14] PCIE_PRX_WLANTX_P3
[14] PCIE_PTX_C_WLANRX_N3
[14] PCIE_PTX_C_WLANRX_P3
WLAN/ WiFi
1
R709
+3VS
+1.5VS_WLAN
C607 39P_0402_50V8J
1
2
+3VS
0_0603_5%
JWLAN1
[15,43,45] PCIE_WAKE#
+1.5VS
Mini Card Slot 2---TV tuner Currecnt: 3.3 : 1000mA, 1.5: 500mA
+1.5VS_WLAN
C611
2
C609
For SED
1
+3VS
2
0_0603_5%
For SED
C616
47P_0402_50V8J
2
2
2
@
0.01U_0402_25V7K
4.7U_0603_10V6K
2
For AW-NE139H
@ R716 0_0402_5%
1
2
1
2
@ R717
0_0402_5%
[49] E51_TXD
[49] E51_RXD
0.1U_0402_16V4Z
1
2
@ R714
1
1
1
@
0_0603_5% @
@
C613
C614
C615
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
GND1
CONN@
2 2
4 4
6 6
8 8
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
GND2
@ R697
1
XBCLKM
BCCDET
[15,43,45] PCIE_WAKE#
TV_CLKREQ#
T173PAD @
[14] CLK_TV#
[14] CLK_TV
0_0402_5%
BCRSTM
1
2
@ R701
WL_OFF# [49]
PLT_A_RST# [17,43,44]
PLT_A_RST#
+3VS
0_0603_5%
2
SIM_DET
BCPWON
[14] PCIE_PRX_TVTX_N4
[14] PCIE_PRX_TVTX_P4
[14] PCIE_PTX_C_TVRX_N4
[14] PCIE_PTX_C_TVRX_P4
+3VS
WLAN_LED# [49]
[49] TMPTU2_SXP
R715 1
R1440 1
R1441 1
+3VS
[49] E51_TXD
[49] E51_RXD
R1098
100K_0402_5%
TMPTU2_SXP_R
2
2 0_0402_5%
2 0_0402_5%
0_0402_5%
54
JMINI1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
C617
BELLW_80003-1021
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
CONN@
2 2
4 4
6 6
8 8
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
GND1
GND2
C608
39P_0402_50V8J
+3VS
+1.5VS
SIM_VCC
SIM_DATA
SIM_CLK
SIM_RESET
COMMON
R702 1
@
2
R704 1
0_0402_5%
2
PLT_A_RST#
0_0402_5%
+3VS_MINI_R
@ 1 R705
2 0_0402_5%
USB20_N10_R
USB20_P10_R
CPLGP1
TMPTU1_SXP_R
ISDBT_DET [18]
1 R707
1 R708
2 0_0402_5%
2 0_0402_5%
USB20_N10 [17]
USB20_P10 [17]
1 R713
@
2 0_0402_5%
TMPTU1_SXP [49]
54
1
BELLW_80003-8041
C618
39P_0402_50V8J
39P_0402_50V8J
2
2
B-CAS Circuit
1 @
R718
2
470_0402_5%
+5VS
+5VALW
+3VS
1
+1.5VS
100K_0402_5%
2
G
C630 TV@
4.7U_0603_6.3V6K
C620
0.1U_0402_16V7K
C628
TV@
0.1U_0402_16V4Z
2
+5VS_L_BCAS
L42 TV@
1
2
1 FBMA-L11-201209-221LMA30T_0805
C621
Max 0.5A
4.7U_0603_6.3V6K
C622
C623
C624
0.1U_0402_16V4Z
0.01U_0402_16V7K
0.1U_0402_16V4Z
C625
4.7U_0603_6.3V6K
C629 TV@
1U_0402_6.3V6K
+5VS_BCAS
0.01U_0402_16V7K
+5VS_L_BCAS
TV@ R724
2.2K_0402_5%
TV@
C626
S
SSM3K7002BF 1N SC59-3
TV@ R723
10K_0402_5%
Max 2.38W
Q38 TV@
AO3413_SOT23-3
47K_0402_5%
1
TV@
TV@
C627
2
0.01U_0402_25V7K
Q39 D
BCPWON
R722
2
current = 0A
TV@R721
Inrush
1 TV@
C619
0.1U_0402_16V7K
+5VS_L_BCAS
IN1
IN2
U35 TV@
1
BCRSTM 2
B_R_BCRST 1 TV@
R728
B_BCRST
2
100_0402_5%
COMMON
1 @
R727
2 BCIO
0_0402_5%
B_BCRST
1 @
R730
2 SIM_RESET
0_0402_5%
B_XBCCLK
1 @
R732
2 SIM_CLK
0_0402_5%
BCIO
1 @
R734
2 SIM_DATA
0_0402_5%
U36 TV@
IN1
IN2
1
XBCLKM
SN74AHC1G08DCKR_SC70-5
B_R_XBCCLK1 TV@
R733
SIM_VCC
1
R725
+5VS
1
R726
2 +VCC_SIM
0_0603_5%
2 +VCC_SIM
0_0603_5%
B_XBCCLK
2
100_0402_5%
SN74AHC1G08DCKR_SC70-5
R729
1
0_0402_5%
2 DET1
SIM_DATA
SIM_DET 1
2 DET2
R731
0_0402_5%
20mA Max
JSIM1
4
5
6
7
GND
VPP
I/O
DET
R736 TV@
1
2
2
1
R737 TV@
10K_0402_5%
1
10K_0402_5%
1
2
R738
TV@
1.5K_0402_5%
Q41
SSM3K7002BF 1N SC59-3
TV@
BCIO
GND0
GND1
8
9
+VCC_SIM
SIM_RESET
SIM_CLK
LCN_CAF98-06206-S100
CONN@
2
G
3
CPLGP1
2
B
1
2
R735
TV@
10K_0402_5%
Q40 TV@
BCW68GLT1G PNP SOT23-3
1
2
3
+5VS_L_BCAS
+5VS_L_BCAS
VCC
RST
CLK
Security Classification
Issued Date
2010/10/1
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
PCIe-WLAN/TV_B-CAS
Size
Document Number
R ev
0.1
Sheet
42
of
64
U37
[14] PCIE_PRX_C_LANTX_P6
C631 1
2 0.1U_0402_16V7K PCIE_PRX_LANTX_P6
22
HSOP
[14] PCIE_PRX_C_LANTX_N6
C632 1
2 0.1U_0402_16V7K PCIE_PRX_LANTX_N6
23
HSON
[14] PCIE_PTX_C_LANRX_P6
[14] PCIE_PTX_C_LANRX_N6
PCIE_PTX_C_LANRX_P6 17
PCIE_PTX_C_LANRX_N6 18
[14] CLKREQ_LAN#
16
[17,42,44] PLT_A_RST#
D
+3V_LAN
2 10K_0402_5%
CLKREQ_LAN#
[15,42,45] PCIE_WAKE#
1
R742
+3VS
2
1K_0402_5%
R743
15K_0402_5%
+3V_LAN
NC
NC
10K ohm PD
Pin38
NC
1K ohm PU
MDIP0
MDIN0
MDIP1
MDIN1
NC/MDIP2
NC/MDIN2
NC/MDIP3
NC/MDIN3
1
2
4
5
7
8
10
11
LAN_MDI0+
LAN_MDI0LAN_MDI1+
LAN_MDI1LAN_MDI2+
LAN_MDI2LAN_MDI3+
LAN_MDI3-
DVDD10
DVDD10
DVDD10
13
29
41
+LAN_VDD10
R739 1
R740 1
CKXTAL1
CKXTAL2
PCIE_WAKE#
28
LANWAKEB
ISOLATE#
26
ISOLATEB
DVDD33
DVDD33
27
39
+3V_LAN
14
15
38
NC/SMBCLK
NC/SMBDATA
GPO/SMBALERT
AVDD33
AVDD33
AVDD33
AVDD33
12
42
47
48
+3V_LAN
EVDD10
21
+LAN_EVDD10
AVDD10
AVDD10
AVDD10
AVDD10
3
6
9
45
+LAN_VDD10
REGOUT
36
R744
1
1
10K_0402_5%
LAN_SMBDATA
2
LAN_SMBALERT
2
R745
1K_0402_5%
33
34
35
2
46
2.49K_0402_1%
24
49
ENSWREG
VDDREG
VDDREG
RSET
GND
PGND
+3V_LAN
Layout
within
C705 &
200mil
+LAN_REGOUT
L43
1
2
2.2UH +-5% NLC252018T-2R2J-N 1
C650
4.7U_0603_6.3V6K
LAN_MDI0+
+LAN_EVDD10
1
2
R747 0_0603_5%
1
C646
4.7U_0603_6.3V6K
C647
0.1U_0402_16V4Z
C648
1U_0402_6.3V6K
C649
Close to Pin 21
1
C651
0.1U_0402_16V4Z
D52
10
9
8
7
6
LAN_MDI2-
10
9
8
7
6
LAN_MDI1+
LAN_MDI2+
LAN_MDI1-
C658
27P_0402_50V8J
1
2
3
4
5
1
2
3
4
5
10
9
8
7
6
10
9
8
7
6
20mil
LAN_MDI3+
D53
MCT1
LAN_MDI3-
D54
MCT2
D63
RCLAMP3304N.TCT_SLP2626P10-10
11
RCLAMP3304N.TCT_SLP2626P10-10
11
C657
27P_0402_50V8J
1
2
3
4
5
GND
1
2
3
4
5
LAN_X2
+LAN_VDD10
D51
LAN_MDI0-
Y5
25MHZ_20PF_X5H025000DK1H
2
LAN_X1
+LAN_VDDREG
1
2
R746 0_0603_5%
+LAN_VDD10
60 mils
+LAN_VDD10
C689, C691,C693 close to pin 13,29,45, respectively
C695 close to pin 3, respectively
C697,C699,C700 close to pin 6,9,41, respectively
1
2
C634
0.1U_0402_16V4Z
1
2
C636
0.1U_0402_16V4Z
1
2
C638
0.1U_0402_16V4Z
1
2
C640
0.1U_0402_16V4Z
1
2
C642
0.1U_0402_16V4Z
1
2
C644
0.1U_0402_16V4Z
1
2
C645
0.1U_0402_16V4Z
SPEC:
3.3V, 70mA (Max)
1.05V, 300mA (Max)
RTL8111E-VL-CGT_QFN48_6X6
Crystal
+3V_LAN
C688, C690, C692, C694 close to Pin 27,39,47,48
C696, C698 close to Pin 12,42
1
2
C633
0.1U_0402_16V4Z
1
2
C635
0.1U_0402_16V4Z
1
2
C637
0.1U_0402_16V4Z
1
2
C639
0.1U_0402_16V4Z
1
2
C641
0.1U_0402_16V4Z
1
2
C643
0.1U_0402_16V4Z
2 10K_0402_5%
2 10K_0402_5%
44
RTL8111E
NC
LAN_EECS
LAN_EEDI
43
ENSWREG
Pin14
30
32
LAN_X2
+LAN_VDDREG
Pin15
REFCLK_P
REFCLK_N
EECS
EEDI
LAN_X1
1
R748
RTL8105E
PERSTB
31
37
40
0.1U_0402_16V4Z
CLKREQB
LED3/EEDO
LED1/EESK
LED0
GND
R741 1
PLT_A_RST# 1
2PLT_RST#_LAN 25
@ R1014 0_0402_5%
CLK_LAN
19
[14] CLK_LAN
CLK_LAN#
20
[14] CLK_LAN#
HSIP
HSIN
MCT3
D64
MCT4
B88069X9231T203_4P5X3P2-2
1
B88069X9231T203_4P5X3P2-2
B88069X9231T203_4P5X3P2-2
B88069X9231T203_4P5X3P2-2
LAN
Conn.
JLAN1
RTL8105E-VC RTL8105E-VC
RTL8111E-VB
PWM Mode
LDO Mode
R751 0 ohm
NC
(Pull High)
R751
0_0402_5%
ENSWREG
NC
R753
0_0402_5%
@
0 ohm
(Pull Down)
R753
U38
1
2
3
LAN_MDI2LAN_MDI2+
4
5
6
LAN_MDI1LAN_MDI1+
7
8
9
LAN_MDI0LAN_MDI0+
10
11
12
+3VALW
MCT1
MX1+
MX1-
24
23
22
MCT1
RJ45_MIDI3RJ45_MIDI3+
TCT2
TD2+
TD2-
MCT2
MX2+
MX2-
21
20
19
MCT2
RJ45_MIDI2RJ45_MIDI2+
TCT3
TD3+
TD3-
MCT3
MX3+
MX3-
18
17
16
MCT3
RJ45_MIDI1RJ45_MIDI1+
MCT4
MX4+
MX4-
15
14
13
MCT4
RJ45_MIDI0RJ45_MIDI0+
TCT1
TD1+
TD1-
TCT4
TD4+
TD4-
MCT1
MCT2
LG-2446S-1
1
2
R759 47K_0402_5%
[49] WOL_EN#
Vgs=-4.5V,Id=3A,Rds<97mohm
PR4-
PR4+
RJ45_MIDI1-
PR2-
RJ45_MIDI2-
PR3-
RJ45_MIDI2+
PR3+
RJ45_MIDI1+
PR2+
RJ45_MIDI0-
PR1-
RJ45_MIDI0+
PR1+
2
R755 75_0805_1%
1
2
1
C660 1000P_0402_50V7K
2
R756 75_0805_1%
MCT4
1
2
1
C661 1000P_0402_50V7K
2
R757 75_0805_1%
RJ45_GND 1
2
C1607
1000P_1808_3KV7K
10
LANGND
1
C1608
C1610
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C1609
C1611
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
+3V_LAN
0.01U_0402_25V7K 1
1
C664
4.7U_0603_10V6K
@ 2
C665
1U_0402_6.3V6K
Security Classification
2010/10/1
Issued Date
GND
Q42
2
C663
GND
SANTA_130455-1
CONN@
C662
0.1U_0402_16V7K
1
2
1
C659 1000P_0402_50V7K
2
R752 75_0805_1%
RJ45_MIDI3RJ45_MIDI3+
R758
100K_0402_5%
1
2
1
C656 1000P_0402_50V7K
MCT3
+3VALW
LAN_MDI3LAN_MDI3+
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Title
R ev
0.1
Sheet
1
43
of
64
+3VS
40mil
C6721
1
C671
10U_0603_6.3V6M
C673
1
C674
1
C675
1
C676
0.1U_0402_16V4Z
+3VS_CR
C677
10U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z
+1.8VS_APVDD
40mil
0.1U_0402_16V4Z
1
C670
XDWP_SDWP
R760
SDCMD_MSBS_XDWE# 1
R762
1000P_0402_50V7K
PCIE_PTX_C_CRRX_N5
PCIE_PTX_C_CRRX_P5
[14] PCIE_PTX_C_CRRX_N5
[14] PCIE_PTX_C_CRRX_P5
1
C678 1
C679
[14] PCIE_PRX_C_RTX_N5
[14] PCIE_PRX_C_RTX_P5
PCIE_PRX_RTX_N5
PCIE_PRX_RTX_P5
2
2 0.1U_0402_16V7K
0.1U_0402_16V7K
15mil
APCLKN
APCLKP
XD_CLE
9
8
APRXN
APRXP
11
12
APTXN
APTXP
15mil
2 APREXT
9.1K_0603_5%
1
R767
APREXT
JMB385
39
R770
[17,42,43] PLT_A_RST#
100_0402_5%
2
1
C682
0.1U_0402_10V7K
PLT_RST#_CR
CPPE#
XDCD2#
XDCD1#_MSCD#
XDCD0#_SDCD#
D26
[13] CR_WAKE#
1
2
SEEDAT
XRSTN
XTEST
13
CPPE_N
14
15
16
CR1_CD2N
CR1_CD1N
CR1_CD0N/WAKEN
17
CR1_PCTLN
RB751V-40_SOD323-2
+3VS_CR
MC_PWREN#
@ R771
0_0805_5%
40 mil
21
CR1_LEDN
APVDD
APV18
5
10
+1.8VS_APVDD
DV33
DV33
DV33
DV18
DV18
19
20
44
18
37
+3VS
MDIO0
MDIO1
MDIO2
MDIO3
MDIO4
MDIO5
MDIO6
MDIO7
MDIO8
MDIO9
MDIO10
MDIO11
MDIO12
MDIO13
MDIO14
48
47
46
45
43
42
41
40
29
28
27
26
25
23
22
NC
NC
NC
NC
NC
34
35
36
30
38
APGND
GND
GND
GND
GND
XDCD2#
+1.8VS_APVDD
2
10K_0402_5%
2
1K_0402_5%
2
1K_0402_5%
XDCD0#_SDCD#
1
R766
2
1K_0402_5%
XD_ALE
R768
1
R769
XDCD1#_MSCD#
1
R765
R764
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
SDCMD_MSBS_XDWE#
XDCE_SDCLK_MSCLK_R
XDWP_SDWP
XD_CLE
2
1K_0402_5%
D
+3VS
R763
3
4
2
10K_0402_5%
U43
[14] CLK_CR#
[14] CLK_CR
2
200K_0402_5%
2 XDCE_SDCLK_MSCLK
22_0402_5%
1
@ C680
2
22P_0402_50V8J
XD_ALE
XDCD0#_SDCD# 1
@ C683
2
0.1U_0402_10V7K
C
6
24
31
32
33
JMB385-LGEZ0C_LQFP48_7X7
[17] CR_CPPE#
@ R772 1
2 0_0402_5%
CPPE#
0.1U_0402_16V4Z
1
C688
0.1U_0402_16V4Z
1
C687
1
C686
2
10U_0603_6.3V6M
JSD1
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
XDCD0#_SDCD#
XDWP_SDWP
0_0402_5% 2
0_0402_5% 2
1 R787
1 R786
SD CD
SDWP
SDCMD_MSBS_XDWE#
XDCE_SDCLK_MSCLK
0_0402_5% 2
0_0402_5% 2
1 R776
1 R781
SDCMD
SDCLK
2
2
2
2
1
1
1
1
R784
R785
R773
R774
SDDAT0
SDDAT1
SDDAT2
SDDAT3
VDD
7
8
9
1
DAT0
DAT1
DAT2
DAT3
11
10
CD
WP
2
5
CMD
CLK
3
6
VSS1
VSS2
GND
GND
12
13
TAITW_PSDBTC-09GLBS1N14N0
CONN@
Security Classification
2010/10/1
Issued Date
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
R ev
0.1
Date:
Sheet
1
44
of
64
+1.2VUSB
+3VS
+5VS
+3VS
R809
R826
D3 Hot
Mount
D3 Cold
Mount
USB_PPON_A R810 1
USB_OCI
R814 1
2 100K_0402_5% @
2 4.7K_0402_5% @
USB_PE_REXT R822 1
USB_UREXT
R824 1
2 12.1K_0402_1% USB30@
2 12.1K_0402_1% USB30@
USB30_XT1
update PEPWRDET at D3
hot mode pull low
C690 2
USB30_XT2
C692 2
R825
@
+1.2VUSB
2 0_0402_5%
USB30@
R834 2
1 4.7K_0402_5%
USB30@
2 0_0402_5%
USB30@
1 USB30@
1U_0402_6.3V6K
USB_PORST#_R R835 1
C698 2
[46] U2DN_B
[46] U2DP_B
+3VS
+1.2VUSB
[46] U2DN_A
[46] U2DP_A
[15,42,43] PCIE_WAKE#
[46] USB_PPON_A
[17,46] USB_OCI
+3VS
[5,17,22,49] PLT_RST#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
USB_SPISCK
USB_SPISI
USB_SPICS#
USB_SPISO
USB_PORST#
T174PAD @
T175PAD @
U2DN_B
U2DP_B
+USB_3V3
R838
1USB30@ 2
+USB_1V2
0_0402_5%
1
2
R1665 USB30@ 0_0402_5% U2DN_A
U2DP_A
USB30@
R839
0_0402_5%
USB_PPON_A
USB_OCI
14.7K_0402_5% PLT_RST#_USB30
USB_TEST_EN
2
0_0402_5%
USB30@ 1
C1614
C700
0.1U_0402_16V4Z
0.1U_0402_16V4Z
@
2
@ R840 2
R1018 1
1
Q45
MMBT3904_SOT23-3
USB30@
2 10K_0402_5%
USB30@
2 0.1U_0402_16V4Z
@
U44
USB_GPIO1
USB30_SMI#
USB_GPIO2
USB_PESEL
USB_PEPWRDET
CLKREQ_USB30#
+3VS
Q43
SSM3K7002FU_SC70-3
USB30@
+1.2VUSB
Mount
R1017 1
PAD @
+3VS
[18] USB30_SMI#
T184
2
B
1 22P_0402_50V8J
@
USB_PESEL
Mount
USB_PORST#_R
2
G
C693
R808
R817
2.2K_0402_5%
USB30@
1 22P_0402_50V8J
@
R830 1
Other applaction
R816
2.2K_0402_5%
@
Y6
20MHZ_12PF_X5H020000FC1H-X
USB30@
1
1
C691
15P_0402_50V8J
USB30@
R815
2.2K_0402_5%
USB30@
USB_GPIO1
USB30_SMI#
USB_GPIO2
USB_PESEL
USB_PEPWRDET
CLKREQ_USB30#
USB_TEST_EN
USB_GPIO0
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1
1
R818
R821
R823
R825
R826
R827
R828
R829
@
@
@
@
USB30@
@
USB30@
@
USB_PEPWRDET
For WAKE Function
USB_PESEL
USB_PEPWRDET
USB_TEST_EN
2 4.7K_0402_5%
2 4.7K_0402_5%
2 4.7K_0402_5%
R808 1
R809 1
R811 1
+3VS
USB30@
@
@
GPIO1
SMI#
GPIO2
PE_SEL
PE_PWRDET
PE_CLKREQ#
VCC33_1
SPI_CLK
SPI_DO
SPI_CS#
SPI_DI
GND1
PORST#
UART_RX
UART_TX
VCC12_1
U2DN_B
U2DP_B
VSUS33_1
VSUS12_1
U2DN_A
U2DP_A
VSUS33_2
PE_WAKE#
PPON_A
PPON_B
OCI_A#
OCI_B#
PE_RST#
TEST_EN
VCC33_2
VCC12_2
GPIO0
GND3
VCC12_3
PE_REXT
VCC33P
PE_TXN
PE_TXP
GNDA3
PE_RXN
PE_RXP
VDD12P
XI
XO
PE_CLKN
PE_CLKP
VCC12_4
VDD12U_2
U3RXN_A
U3RXP_A
GNDA2
U3TXN_A
U3TXP_A
UREXT
VCC33U
U3TXN_B
U3TXP_B
GNDA1
U3RXN_B
U3RXP_B
VDD12U_1
VSUS12_2
GND2
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
GND4
65
ASM1042
(TQFN 64)
USB_GPIO0
Close to ASM1042
USB_PE_REXT
+VDD33U
+VDD33U
PCIE_DTX_PRX_N2 C696 2
PCIE_DTX_PRX_P2 C697 2
1 0.1U_0402_16V7K USB30@
1 0.1U_0402_16V7K USB30@
Power Sequence
PCIE_PRX_C_USBTX_N2 [14]
PCIE_PRX_C_USBTX_P2 [14]
PCIE_PTX_C_USBRX_N2 [14]
PCIE_PTX_C_USBRX_P2 [14]
USB30_XT1
USB30_XT2
+VDD12U
CLK_USB30# [14]
CLK_USB30 [14]
U3RXDN_A
U3RXDP_A
+VDD12U
U3RXDN_A [46]
U3RXDP_A [46]
U3TXDN_A_C
U3TXDP_A_C
USB_UREXT
U3TXDN_A_C [46]
U3TXDP_A_C [46]
U3TXDN_B_C
U3TXDP_B_C
+VDD33U
U3TXDN_B_C [46]
U3TXDP_B_C [46]
U3RXDN_B
U3RXDP_B
+VDD12U
+USB_1V2
U3RXDN_B [46]
U3RXDP_B [46]
+VDD12U
ASM1042_TQFN64_9X9
USB30@
R844
4.7K_0402_5%
USB30@
U45
USB_SPICS#
C707
0.1U_0402_16V4Z
USB30@
1
3
7
4
CS#
WP#
HOLD#
GND
VCC
SCLK
SI
SO
8
6
5
2
USB_SPISCK
USB_SPISI
USB_SPISO
2
MX25L5121EMC-20G SOP 8P
USB30@
C708
0.1U_0402_16V4Z
USB30@
+VDD12U
+1.2VUSB
+VDD12U
C724
0.1U_0402_16V4Z
USB30@
C723
0.1U_0402_16V4Z
USB30@
C722
0.1U_0402_16V4Z
USB30@
C721
0.1U_0402_16V4Z
USB30@
+3VS
C720
0.1U_0402_16V4Z
USB30@
+VDD33U
C725
0.1U_0402_16V4Z
USB30@
C716
0.1U_0402_16V4Z
USB30@
C715
0.1U_0402_16V4Z
USB30@
C718
0.1U_0402_16V4Z
USB30@
2
L45
FBMA-L11-201209-221LMA30T_0805 1
USB30@
+1.2VUSB
R843
4.7K_0402_5%
USB30@
2
+3VS
+3VS
+VDD33U
C734
0.1U_0402_16V4Z
USB30@
C733
0.1U_0402_16V4Z
USB30@
C732
0.1U_0402_16V4Z
USB30@
C735
0.1U_0402_16V4Z
USB30@
C727
0.1U_0402_16V4Z
USB30@
C730
0.1U_0402_16V4Z
USB30@
L46
FBMA-L11-201209-221LMA30T_0805 1
USB30@
2010/10/1
Issued Date
Security Classification
2011/11/01
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
USB3.0
Size Document Number
Custom
R ev
0.2
Date:
Sheet
1
45
of
64
1
R879
[17] USB20_N1
USB20@ R880 1
2 0_0402_5%
[45] U2DN_A
USB30@ R881 1
2 0_0402_5%
USB20_N1_R
[17] USB20_P1
USB20@ R882 1
2 0_0402_5%
USB20_P1_R
[45] U2DP_A
USB30@ R883 1
2 0_0402_5%
D27
USB20_N1_L
+USB30_VCCA
I/O4
I/O1
REF2 REF1
I/O3
I/O2
L49
1
USB20_N1_L
USB20_P1_L
USB20_P1_L
1
R884
1
R885
D38
1 1
109
U3TXDP_A_R
U3TXDN_A_R
2 2
98
U3TXDN_A_R
U3RXDP_A_R_0 4 4
77
U3RXDP_A_R_0
U3RXDN_A_R_0 5 5
66
U3RXDN_A_R_0
+USB30_VCCA
W=60mils
WCM-2012-900T_0805
USB30@
Layout placement as
close as possable
PJUSB208H_SOT23-6
2
0_0402_5% @
USB3.0 Port A
Connector
2
0_0402_5% @
2
0_0402_5% @
L50 USB30@
[45] U3RXDN_A
U3RXDN_A_R_0
[45] U3RXDP_A
U3RXDP_A_R_0
+USB30_VCCA
JUSB1
9
1
8
2
7
3
6
4
5
SSTX+
VBUS
SSTXDGND
D+
SSRX+
GND
SSRX-
1
C765
150U_B2_6.3VM_R35M
GND
GND
GND
GND
10
11
12
13
1
R888
1
R889
[45] U3TXDN_A_C
USB30@ C767 2
1 0.1U_0402_16V7K
U3TXDN_A
[45] U3TXDP_A_C
USB30@ C768 2
1 0.1U_0402_16V7K
U3TXDP_A
2
0_0402_5%
2
0_0402_5%
USB2.0 Connector
Co-lay with JUSB1
When USB30 not used
@
@
U3TXDN_A_R
U3TXDP_A_R
+USB30_VCCA
USB20_N1_L
USB20_P1_L
WCM-2012-900T_0805
+USB30_VCCA
I/O4
I/O1
REF2 REF1
I/O3
I/O2
USB20_P0_L
1
R890
2
0_0402_5% @
1
R891
2
0_0402_5% @
[17] USB20_N0
USB20@ R892 1
2 0_0402_5%
[45] U2DN_B
USB30@ R893 1
2 0_0402_5%
USB20_N0_R
[17] USB20_P0
USB20@ R894 1
2 0_0402_5%
USB20_P0_R
[45] U2DP_B
USB30@ R895 1
2 0_0402_5%
USB20_N0_L
USB20_P0_L
W=60mils
U3TXDP_B_R
U3TXDN_B_R
109
U3TXDP_B_R
2 2
98
U3TXDN_B_R
U3RXDP_B_R_1 4 4
77
U3RXDP_B_R_1
U3RXDN_B_R_1 5 5
1
R896
1
R897
2
0_0402_5% @
2
0_0402_5% @
66
U3RXDN_B_R_1
[45] U3RXDN_B
U3RXDN_B_R_1
[45] U3RXDP_B
U3RXDP_B_R_1
1
R900
1
R901
YSCLAMP0524P_SLP2510P8-10-9
USB30@
[45] U3TXDN_B_C
USB30@ C769
[45] U3TXDP_B_C
USB30@ C770
1 0.1U_0402_16V7K
U3TXDN_B
1 0.1U_0402_16V7K
U3TXDP_B
2
0_0402_5%
2
0_0402_5%
4
1
1
R902
+USB30_VCCA
GND
GND
GND
GND
10
11
12
13
+
2
C1072
0.1U_0402_25V6
OCTEK_USB-09EAEB
CONN@
USB2.0 Connector
Co-lay with JUSB2
When USB30 not used
@
@
U3TXDN_B_R
U3TXDP_B_R
+USB30_VCCA
USB20_N0_L
USB20_P0_L
WCM-2012-900T_0805
GND
GND
GND
GND
C766
150U_B2_6.3VM_R35M
L54 USB30@
SSTX+
VBUS
SSTXDGND
D+
SSRX+
GND
SSRX-
WCM-2012-900T_0805
3 3
5
6
7
8
JUSB2
9
1
8
2
7
3
6
4
5
L53 USB30@
1
2
3
4
USB3.0 Port B
Connector
+USB30_VCCA
WCM-2012-900T_0805
USB30@
Layout placement as
close as possable
JUSB7
1
2
3
4
OCTEK_USB-04APEB
CONN@
L52
PJUSB208H_SOT23-6
D39
1 1
OCTEK_USB-09EAEB
CONN@
L51 USB30@
YSCLAMP0524P_SLP2510P8-10-9
USB30@
C1071
0.1U_0402_25V6
WCM-2012-900T_0805
3 3
USB20_N0_L
2
0_0402_5% @
JUSB8
1
2
3
4
1
2
3
4
5
6
7
8
GND
GND
GND
GND
OCTEK_USB-04APEB
CONN@
+3VALW
1
R1019
0_0402_5%
2
USB2_EN# [49]
2.5A
+5VALW
2
USB_PPON_A
1
[45] USB_PPON_A
2
D
2
G
8
7
6
5
W=60mils
USB_OCI
RT9715BGS_SO8
[17,45] USB_OCI
Q49
SSM3K7002FU_SC70-3
USB30@
C712
1000P_0402_50V7K
USB_PPON_A#
C713
1U_0603_10V6K
GND VOUT
VIN VOUT
VIN VOUT
EN
FLG
C711
0.1U_0402_16V4Z
1
2
3
4
C710
4.7U_0805_10V4Z
@
USB20@
USB_PPON_A#
+USB30_VCCA
U46
R1020
100K_0402_5%
Security Classification
2010/10/1
Issued Date
2011/11/01
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
USB3.0 CONN
Size
Document Number
R ev
0.1
Sheet
1
46
of
64
0.1U_0402_16V4Z
SHDN
BYP
EC Beep
4.75V
40mil
40mil
C1452
10U_0805_10V6K
1
2
C1451
0.01U_0402_25V7K
G9191-475T1U_SOT23-5
L98
2
1
MBK1608121YZF_0603
+3VS
1
[49] EC_BEEP#
+3VS_VDD
C1453
0.1U_0402_16V7K
15mil
[13] PCH_SPKR
1
C1454
10U_0805_10V6K
R1521
C1457
10U_0805_10V6K
1
C1458
0.1U_0402_16V7K
SURR_L
39
17
MIC2_R
SURR_R
41
GPIO1
HPOUT-L
33
HP_LEFT
HP_RIGHT
21
MIC1_L
22
MIC1_R
12
PCBEEP-IN
11
RESET#
LINE1-L
23
[13] AZ_SYNC_HD
10
SYNC
LINE1-R
24
[13] AZ_SDOUT_HD
L114
1
SDATA_OUT
45
46
13
34
INT_DMIC_CLK_R
2 FBMA-L10-160808-301LMT_2P
MIC_SENSE#
SENSEA
20K_0402_1%2 R1533 1
1
HP_DET#
SENSEB
5.1K_0402_1% 1 R1534 2
WOOFER_DET#_Q 10K_0402_1%1 R1638 2
@ C1471
27P_0402_50V8J
[49] EAPD
2
SPDIFO2
DMIC_CLK1/2
SENSE A
SENSE B
47
EAPD
48
SPDIFO1
For EMI
2 0.1U_0402_16V4Z
C1482 1
2 0.1U_0402_16V4Z
28
VREF
27
JDREF
40
GPIO0/DMIC_DATA1/2MONO-OUT
37
4
7
DVSS
DVSS
26
42
AVSS1
AVSS2
10mil
2
1 1
1 1
1
SINGA_2SJ-0960-D11
CONN@
C1469
2
PL
R1545
100_0402_5%
C @
Q91
BC847B_SOT23-3
2
B
[49] HP_MUTE
2
B
@
R1546
100_0402_5%
@
Q92
BC847B_SOT23-3
+5VALW
C1603
1U_0603_25V6K
HP JACK
R1666
0_0402_5%
C1476
330P_0402_50V7K
Codec Signals
HP_LEFT
9
2
5.1K
10K
HP_RIGHT
7
4
1
5
0:PC MODE
1:HDMI MODE
[34,48,49] PNL_STAT
5.1K
10K
NC1
NO1
V+
C1479
COM1
10
HP_L
COM2
HP_R
GND
NC2
NO2
IN1
IN2
1
C1478
HP_L_0
2
R1537
L103
56.2_0603_1%
FBMA-L11-160808-700LMT_2P
1
2HP_L_1
1
2
HP_R_0
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2HP_R_1
R1536
56.2_0603_1%
C1477
330P_0402_50V7K
JHP1
2
6
1
PL
2
PR
L102
FBMA-L11-160808-700LMT_2P
3
4
5
TS5A23157RSER_QFN10_2X1P5
@ C1604
1U_0603_25V6K
D67
PJDLC05C_SOT23-3
HP_DET#
[34,49] HP_DET#
SINGA_2SJ-0960-D11
CONN@
4
SENSE B
C1468
PR
1
[34] S_HP_OUT_R
Q104
SSM3K7002BF 1N SC59-3
3
Security Classification
Issued Date
20K
WOOFER_DET#_Q
10K//5.1K LFE+HP-OUT
2010/10/1
2011/11/01
Deciphered Date
Title
HDA-ALC272/HP/MIC
+MIC1_VREFO
[34] S_HP_OUT_L
39.2K
D60
PJDLC05C_SOT23-3
20K
AZ_SDIN0_HD [13]
U97
SENSE A
6
1
2
+VREF
GNDA
Impedance
1 MIC1_L_R1
1K_0402_5%
1 MIC1_R_R1
1K_0402_5%
BLM15AG121SN1D_L0402_2P
2
R1528
MIC1_R
2
R1529
Sense Pin
18
MIC1-VREFO
ALC663-GR_LQFP48_7X7
2
0_0603_5%
2
0_0603_5%
2
0_0603_5%
2
0_0603_5%
2
0_0603_5%
2
0_0603_5%
GND
LINE1-VREFO
MIC1_L
19
20
2
R1531
33_0402_5%
1
R1540
1
R1542
1
R1543
1
R1659
1
@ R1660
1
@ R1661
[50] INT_DMIC_DATA
MIC2-VREFO
LINE2-VREFO
HDA_SDIN0_AUDIO 1
MIC
JACK
JMIC1
BLM15AG121SN1D_L0402_2P
L100
MIC1_L_R
1
2
L101
MIC1_R_R
1
2
C1481 1
<EMI>
<EMI>
SDATA_IN
MIC_SENSE#
BITCLK
R1526
4.7K_0402_5%
MIC1_L_C
2
4.7U_0805_25V6-K
MIC1_R_C
2
4.7U_0805_25V6-K
MONO_IN
R1527
0_0402_5%
AMP_WOOFER_R 1
2
44
AMP_WOOFER [48]
@ R1639 22_0402_5% C1466
22P_0402_50V8J
1
2 1
2
6
AZ_BITCLK_HD [13]
2.2U_0603_6.3V6K
C1474
R1525
4.7K_0402_5%
0.1U_0402_16V7K
C1473
1
2
C1467
LFE
R1524
0_0402_5%
CPVEE
D66
CH751H-40PT_SOD323-2
AMP_RIGHT [48]
31
220P_0402_50V7K
43
D65
CH751H-40PT_SOD323-2
AMP_LEFT [48]
220P_0402_50V7K
CENTER
C1460
0.1U_0402_16V7K
MIC2_L
HPOUT-R
MIC1_R
DVDD
16
CBN
MIC1_L
@ C1470
0.01U_0402_25V7K
DVDD_IO
AMP_LEFT_R 1
CBP
C1464
2.2U_0805_25V6K
C1456
0.1U_0402_16V4Z
25
36
30
C1465
[50] INT_DMIC_CLK
35
FRONT_R
C BN
@ R1530
4.7K_0402_5%
[13] AZ_RST_HD#
FRONT_L
LINE2-R
32
+3VS
LINE2-L
15
29
+MIC1_VREFO
R1523
0_0402_5%
1
2
14
CBP
C1461
1
2.2U_0805_25V6K
R1535
20K_0402_1%
2
1
MONO_IN
2
0.1U_0402_16V4Z
47K_0402_5%
R852
4.7K_0402_5%
C1459
10U_0805_10V6K
2
@
AMP_LEFT_L
[49] CODEC_MUTE#
AVDD2
AVDD1
U87
38
+3VS_VDD
MONO_IN_1 1
C1448
47K_0402_5%
C1455
0.1U_0402_16V7K
PCI Beep
R1522
+AVDD_HDA
2
2
0.1U_0402_16V4Z
C1450
C1449
60mil
@ L97
1
2
FBMA-L11-160808-800LMT_0603
U86
1 IN
OUT 5
2 GND
+5VS
39.2K
A
[48,49] WOOFER_PD#
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Size
Document Number
R ev
0.1
Date:
G
Sheet
47
H
of
64
18
OUTPR
OUTNR
20
OUTNR
BSNR
21
RINN
BSNR
GAIN0
PBTL
14
GIN1
GAIN1
PLIMIT
10
PLIMIT
+GVDD
2
R1549
28.7K_0402_1%
C1495
470P_0805_50V8J
SD#
FAULT#
+GVDD
GVDD
PGND
PGND
AGND
24
19
8
R1554
100K_0402_5%
13
29
NC
GND
C1496
1000P_0603_50V7K
SPKR+
SPKRSPKL+
SPKL-
JSPK1
1
2
3
4
5
6
L107
HCB2012KF-121T50_0805
1
2
OUTPR
R1553
10K_0402_1%
5A/120ohm/100MHz
TPA3113D2PWPR_HTSSOP28
1
2
3
4
G1
G2
ACES_50228-00471-001
+GVDD
@
AMP_PD#_R
SPKL1
R1550
10_1206_5%
CONN@
D62
PJSOT24CH_SOT23-3
C1504
470P_0805_50V8J
SPKR+
1
C1505
1000P_0603_50V7K
BSPL
BSNL
BSPR
BSNR
R1555
10_1206_5%
Close to U90
Pin15,16
2
Close to U90
Pin27,28
5A/120ohm/100MHz
GIN0
L105
HCB2012KF-121T50_0805
1
2
OUTNL
17
RINP
BSPR
BSPR
OUTPR
D61
PJSOT24CH_SOT23-3
C1492
0.22U_0603_25V7K
LINN
C1489
0.22U_0603_25V7K
1
2
1
2
R1552
0_0402_5%
1
2
[49] AMP_PD#
BSNL
Speaker Conn.
R1548
10_1206_5%
C1498
0.22U_0603_25V7K
R1551
100K_0402_5%
@
1
2
+3VALW
11
22
C1486
1000P_0603_50V7K
2 0.22U_0402_10V6K
BSNL
LINP
OUTNL
C1485
470P_0805_50V8J
SPKL+
1
C1497
23
1
2
GND
OUTNL
C1503
1U_0603_25V6K
2 0.22U_0402_10V6KAMP_R_C12
OUTPL
C1502
1U_0603_25V6K
C1501
1U_0603_25V6K
C1500
1U_0603_25V6K
AMP_R C1494
+12V1_PVCC
C1499
220U_16V_M
C1507
1U_0603_25V6K
C1506
1U_0603_25V6K
L106
FBMA-L11-160808-121LMA30T_0805
1
2
10
TS5A23157RSER_QFN10_2X1P5
@ C1590
1U_0603_25V6K
+12V1_PVCC
2 0.22U_0402_10V6K
COM2
IN1
IN2
+12VALW
2 0.22U_0402_10V6KAMP_L_C 3
25
1
5
[34,47,49] PNL_STAT
C1491
26
COM1
C1490
BSPL
BSPL
OUTPL
5A/120ohm/100MHz
NC2
NO2
AMP_L
PVCCR
PVCCR
PVCCL
PVCCL
7
4
15
16
27
28
[47] AMP_RIGHT
[34] S_LINE_OUTR
V+
+12V1_PVCC
AVCC
NC1
NO1
C1484
0.22U_0603_25V7K
1
2
9
2
+12V1_AVCC
R1663
0_0402_5%
U96
[47] AMP_LEFT
[34] S_LINE_OUTL
U90
L104
HCB2012KF-121T50_0805
1
2
OUTPL
+5VALW
C1589
1U_0603_25V6K
0:PC MODE
1:HDMI MODE
+12V1_AVCC
Close to U94
Pin8
C1487
1U_0603_25V6K
2 10_0603_5%
C1551
0.1U_0402_16V7K
R1547
1
1
C1550
10U_1206_25V6M
+12VALW
@ C1615
@ C1616
@ C1617
@ C1618
1
1
1
1
2
2
2
2
1000P_0603_50V7K
1000P_0603_50V7K
1000P_0603_50V7K
1000P_0603_50V7K
36dB
9Kohm
1
[34] S_LINE_OUTR
GIN0_W
R1563
100K_0402_1%
R1618
16.2K_0402_1%
1
2
C1548
0.033U_0402_16V7K
GIN1_W
2 10_0603_5% +12V2_AVCC
+12V2_PVCC
C1511
1U_0603_25V6K
15
16
27
28
C1549
0.01U_0402_25V7K
R1560
10_1206_5%
+IN
-IN
OUT
SW OOFER
+3VALW
U94B
TLV272IDR SOIC 8P
R1657
1M_0402_5%
R1622
0_0402_5%
L110
HCB2012KF-121T50_0805
SPKW1
2
OUTL_W
2
AVCC
PVCCR
PVCCR
PVCCL
PVCCL
LINP
4
2
0.22U_0402_10V6K
LINN
26
25
OUTNL
23
BSNL
22
BSPR
17
OUTPR
18
BSPL_W
C1510
0.47U_0603_16V7K
C1512
470P_0805_50V8J
+3VALW
1
2
1
2
C1513
1000P_0603_50V7K
WOOFER_ID
R1567
100K_0402_5%
@
2
R1569
0_0402_5%
1
2
RINP
OUTNR
20
11
RINN
BSNR
21
GIN0_W
GAIN0
PBTL
14
GIN1_W
GAIN1
PLIMIT
10
GVDD
PGND
PGND
AGND
24
19
8
SD#
Close to U91
Pin15,16
BSPR_W
2
13
29
FAULT#
NC
GND
C1520
0.47U_0603_16V7K
C1521
470P_0805_50V8J
@ R1624
0_0402_5%
1
2
+12V2_AVCC
PLIMIT_W
+GVDD1
R1568
2
+GVDD1
20.5K_0402_1%
+3VALW
[49] WOOFER_ID
R1570
10K_0402_1%
WOOFER_ID
D68
3
WOOFER_DET
SPKW+
4
3
2
1
7
SPKW-
2011/04/14
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
CONN@
SINGA_2SJ2270-000111
PJSOT24CH_SOT23-3
D69
PJSOT24CH_SOT23-3
Woofer
Conn.
JWOFER1
R1640 10K_0402_5%
1
2
Security Classification
C1522
1000P_0603_50V7K
R1571
10_1206_5%
TPA3113D2PWPR_HTSSOP28
Issued Date
WOOFER_DET
3
OUTR_W
+GVDD1
AMP_PD1#_R 1
R1572
100K_0402_5%
L113
HCB2012KF-121T50_0805
SPKW+
1
2
1 5A/120ohm/100MHz1
2 0.22U_0402_10V6K
12
C1516 1
AMP_W
Q106
SSM3K7002BF 1N SC59-3
2 0.22U_0402_10V6K
C1524
1U_0603_25V6K
[47,49] WOOFER_PD#
2 0.22U_0402_10V6K
C1515 1
C1523
1U_0603_25V6K
C1519
1U_0603_25V6K
C1518
1U_0603_25V6K
C1517
220U_16V_M
+12VALW
+12V2_PVCC
L111
FBMA-L11-160808-121LMA30T_0805
1
2
1
C1514 1
2
G
R1566
10_1206_5%
[47] AMP_WOOFER
R1658
10K_0402_1%
WOOFER_DET# [49]
WOOFER_DET
5A/120ohm/100MHz1
0.22U_0402_10V6K
3
2
BSPL
OUTPL
Close to U91
Pin27,28
C1526
1U_0603_25V6K
C1525
1U_0603_25V6K
R1620
22.6K_0402_1%
2
U94A
TLV272IDR SOIC 8P
SW OOFER
1
C1606
-IN
R1619
2.05K_0402_1%
2
U91
R1565
+12V2_PVCC
OUT
2 0.22U_0603_25V7K
+12VALW
R1564
100K_0402_1%
+IN
R1621
10K_0402_1%
@
C1605
@
R1559
100K_0402_1%
R1617
1.91K_0402_1%
1
2
C1547
R1668
0.22U_0402_10V6K100K_0402_5%
GIN1
R1562
100K_0402_1%
@
R1558
100K_0402_1%
GIN0
R1561
100K_0402_1%
@
R1557
100K_0402_1%
2 1
2 1
2 1
@
R1556
100K_0402_1%
+12VALW
2 1
+12VALW
C1545 1
+12VALW
C1554
0.1U_0402_16V7K
1
2
[34] S_LINE_OUTL
C1509
1000P_0603_50V7K
15Kohm
32dB
2 0.1U_0402_16V7K
C1544 1
R1667
100K_0402_5%
C1546
0.22U_0402_10V6K
1
2
1
2
30Kohm
26dB
C1508
470P_0805_50V8J
SPKR-
5A/120ohm/100MHz
60Kohm
20dB
OUTNR
L108
HCB2012KF-121T50_0805
1
2
AV(inv)
GAIN0
GAIN1
INPUT
IMPEDANCE
Title
Rev
1.0
LA-7521P M/B
Sheet
48
of
64
[18] GATEA20
[18] KB_RST#
[13] SERIRQ
[13] LPC_FRAME#
[13] LPC_AD3
[13] LPC_AD2
[13] LPC_AD1
[13] LPC_AD0
[17] CLK_PCI_EC
[5,17,22,45] PLT_RST#
R945
47K_0402_5%
2
1
2
C818
[18] EC_SCI#
CLK_PCI_EC
PLT_RST#
ECRST#
EC_SCI#
ECRST#
T224
T225
T226
T227
+3VALW
R949 47K_0402_5%
R950 47K_0402_5%
1
1
HP_DET#_EC
KSI4
KSI5
KSI6
KSI7
KSO1
KSO2
KSO3
2
2
T228
WOOFER_DET#
CODEC_MUTE#
[48] WOOFER_DET#
[47] CODEC_MUTE#
[56] VCCSA_PG
[35] EC_ENVDD
[42] WLAN_LED#
[18] BT_LED#
R1051
0_0402_5%
1 DIS@ 2
VGA_BKOFF#_R
EC_ENVDD
WLAN_LED#
BT_LED#
WOOFER_PD#
VGA_UMA_BKOFF#
SCFW_UPDATE#
[47,48] WOOFER_PD#
[40] SCFW_UPDATE#
PCH
1
R1052
[16] UMA_ENBKL
1
1
1
1
+3VALW
+3VS
R955
R956
R957
R958
[34]
[34]
[14,23,52]
[14,23,52]
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
21
23
26
27
BATT_TEMP/AD0/GPI38
BATT_OVP/AD1/GPI39
ADP_I/AD2/GPI3A
AD3/GPI3B
AD Input
AD4/GPI42
AD5/GPI43
63
64
65
66
75
76
12
13
37
20
38
DAC_BRIG/DA0/GPO3C
EN_DFAN1/DA1/GPO3D
IREF/DA2/GPO3E
DA3/GPO3F
68
70
71
72
CLK_PCI_EC/PCICLK
PCIRST#/GPIO05
EC_RST#/ECRST#
EC_SCI#/GPIO0E
CLKRUN#/GPIO1D
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
[15] SUSWARN#
[35] INVT_PWM
[51] FAN_SPEED1
[51] FAN_SPEED2
[42] E51_TXD
[42] E51_RXD
[50] ON/OFF
[50] PWR_ON_LED
[34] S_ENVDD
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
77
78
79
80
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
EC_MUTE#/PSCLK1/GPIO4A
KSI4/GPIO34
USB_EN#/PSDAT1/GPIO4B
KSI5/GPIO35
CAP_INT#/PSCLK2/GPIO4C
PS2
Interface
KSI6/GPIO36
PSDAT2/GPIO4D
KSI7/GPIO37
TP_CLK/PSCLK3/GPIO4E
KSO0/GPIO20
TP_DATA/PSDAT3/GPIO4F
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
SDICS#/GPXIOA00
KSO4/GPIO24
WOL_EN/SDICLK/GPXIOA01
KSO5/GPIO25 Int. K/B
ME_EN/SDIMOSI/GPXIOA02
KSO6/GPIO26 Matrix
LID_SW#/GPXIOD00
SPI Device I/F
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
SPIDI/MISO
KSO10/GPIO2A
SPIDO/MOSI
SPI Flash ROM SPICLK/GPIO58
KSO11/GPIO2B
KSO12/GPIO2C
SPICS#
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
GPIO40
KSO16/GPIO48
H_PECI/GPIO41
GPIO
KSO17/GPIO49
FSTCHG/GPIO50
BATT_CHG_LED#/GPIO52
CAPS_LED#/GPIO53
EC_SMB_CK1/SCL0/GPIO44
BATT_LOW_LED#/GPIO54
EC_SMB_DA1/SDA0/GPIO45
PWR_LED#/GPIO55
EC_SMB_CK2/SCL1/GPIO46
SYSON/GPIO56
EC_SMB_DA2/SDA1/GPIO47
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
83
84
85
86
87
88
HP_MUTE
EC_BEEP#
PM_SLP_S3#
6
14
EC_SMI#
15
16
17
18
SUSWARN#
19
INVT_PWM
25
FAN_SPEED1
28
FAN_SPEED2
29
E51_TXD
30
E51_RXD
31
ON /OFF
32
PWR_ON_LED 34
S_ENVDD_R
1
2
36
R959
0_0402_5%
E51_TXD
2
100K_0402_5%
122
123
PM_SLP_S3#/GPIO04
EC_RSMRST#/GPXIOA03
PM_SLP_S5#/GPIO07
EC_LID_OUT#/GPXIOA04
EC_SMI#/GPIO08
EC_ON/GPXIOA05
GPIO0A
EC_SWI#/GPXIOA06
GPIO0B
ICH_PWROK/GPXIOA07
GPIO
GPIO0C
BKOFF#/GPXIOA08
GPO RF_OFF#/GPXIOA09
SUS_PWR_DN_ACK/GPIO0D
INVT_PWM/PWM2/GPIO11
GPXIOA10
FAN_SPEED1/FANFB0/GPIO14
GPXIOA11
FANFB1/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
PM_SLP_S4#/GPXIOD01
ON_OFF/GPIO18
ENBKL/GPXIOD02
SUSP_LED#/GPIO19
EAPD/GPXIOD03
GPI EC_THERM#/GPXIOD04
NUM_LED#/GPIO1A
SUSP#/GPXIOD05
PBTN_OUT#/GPXIOD06
EC_PME#/GPXIOD07
XCLK1
XCLK0
V18R
11
24
35
94
113
GND
GND
GND
GND
GND
CRY1
CRY2
TMPTU2_SXP [42]
AD1_KBC [50]
1
2
TMPTU1_SXP
R942 10K_0402_5%
1
2
TMPTU2_SXP
R943 10K_0402_5%
1
2
AD_BID
TMPTU1_SXP [42]
EN_DFAN1
EN_DFAN2
R1662
0_0402_5%
AMP_PD#_EC0 1
2
USB1_EN#
EN_DFAN1 [51]
EN_DFAN2 [51]
AD2 [34]
AD1 [34]
AMP_PD#
97
98
99
109
VGATE
WOL_EN#
PWRME_CTRL#
SCALER_ON#
119
120
126
128
EC_SI_SPI_SO
EC_SO_SPI_SI
SPI_CLK
SPI_CS#
SYSON
R944 1
2 4.7K_0402_5%
SUSP#
R946 2
1 10K_0402_5%
VR_ON
R948 2
1 10K_0402_5%
AMP_PD# [48]
+3VALW
USB1_EN# [40,41]
H_PROCHOT#_EC
PNL_STAT
HDMI_STAT
PNL_STAT [34,47,48]
HDMI_STAT [34]
R951
100K_0402_5%
Ra
VGATE [15,58]
WOL_EN# [43]
PWRME_CTRL# [13]
SCALER_ON# [34]
AD_BID
C
R1103
73
74
89
90
91
92
93
95
121
127
100
101
102
103
104
105
106
107
108
110
112
114
115
116
117
118
124
R953
8.2K_0603_1%
Rb
1 10K_0402_5%
+3VALW
CIR_IN [50]
2 43_0402_1%
H_PECI [5,18]
I2C_INT_SCR [34]
S_AMP_PD# [34]
EC_PECI
R954 1
I2C_INT_SCR
VR_ON
VGA_IN_DET# [34,40]
SYSON
VR_ON
C1600
SYSON [57]
VR_ON [58]
PNL_STAT2 [34]
PCH_RSMRST#
2
0.1U_0402_16V4Z
1
C1601
PCH_RSMRST# [15]
2
0.1U_0402_16V4Z
PM_PWROK
BKOFF#
S_BKOFF#
HDMI_CABLE_DET#
SUSP#
PBTN_OUT#
PM_SLP_S4# [15]
S_BKOFF# [34]
EAPD [47]
HDMI_CABLE_DET# [34,37]
SUSP# [51,54,55,56,57]
PBTN_OUT# [15]
+3VALW
+EC_V18R
1
KB930QF-A1_LQFP128_14X14
C821
4.7U_0603_10V6K
C822
0.1U_0402_16V4Z
20mils
U52
R962
CRY1
C816
47P_0402_50V8J
+3VS
TV tuner
temperature
HP_MUTE [47]
EC_BEEP# [47]
SM Bus
[15] PM_SLP_S3#
[15] PM_SLP_S5#
[18] EC_SMI#
[48] W OOFER_ID
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
1
R961
PWM
PWM0/GPIO0F
BEEP#/PWM1/GPIO10
Output
FANPWM0/GPIO12
ACOFF/FANPWM1/GPIO13
2
0_0402_5%
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
2
2
2
2
GATEA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LPC_FRAME#/LFRAME#
LPC_AD3/LAD3
LPC_AD2/LAD2
LPC_AD1/LAD1
LPC_AD0/LAD0
DA Output
1
0.1U_0402_16V4Z
[34,47] HP_DET#
VGA [22]
1
2
3
4
5
7
8
10
2
G
Q57
2N7002K_SOT23
AGND
+3VALW
GATEA20
KB_RST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
H_PROCHOT#_EC
VCC
VCC
VCC
VCC
VCC
VCC
1
R941
10_0402_5%
@
1
1
1000P_0402_50V7K
U51
CLK_PCI_EC
H_PROCHOT# [5]
0.1U_0402_16V4Z
C815
1000P_0402_50V7K
2
2
0.1U_0402_16V4Z
C814
C813
R940
0_0402_5%
2
1
[58] VR_HOT#
C812
C809
1
2
C811
0.1U_0402_16V4Z
For EMI
0.1U_0402_16V4Z
1
2
67
AVCC
C810
C817
22P_0402_50V8J
@
+3VALW
0.1U_0402_16V4Z
1
1
0.1U_0402_16V4Z
+3VALW
69
C1599
GATEA20
9
22
33
96
111
125
VCC
HOLD
SPI_CS#
SPI_CLK
EC_SO_SPI_SI
CRY2
10M_0402_5%
VSS
EC_SI_SPI_SO
EN25F20-100GCP SOP 8P
SPI_CLK
C825
Y7
1
C823
2
10P_0402_50V8J
A
For EMI
2010/10/1
Issued Date
Security Classification
32.768KHZ_12.5PF_Q13MC14610002
2011/11/01
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
1 R964
2
10_0402_5%
18P_0402_50V8J
OSC
OSC
NC
3
NC
18P_0402_50V8J
1
1
1
C824
Title
LPC-EC-KB930
Size
Document Number
R ev
0.1
Sheet
1
49
of
64
Screw Hole
H6
H_3P3
@
H7
H_3P3
@
H8
H_3P3
@
H9
H_3P3
@
H_3P3
@
1
H5
H_3P3
@
H4
H_3P3
@
H3
H_3P3
@
H2
H_3P3
@
H1
Touchscreen
Power Button
JTCS1
3
C826
0.1U_0402_25V6
@
BAV70W_SOT323-3
SW3
1
H20
H21
H23
H17
H_4P5
@
H18
H_4P5
@
H_4P5
@
1
H19
H16
H_4P5
@
H15
H_4P5
@
H14
H_3P3
@
1
C1555
0.1U_0402_16V7K
TOP side
For debug
BTM side
ACES_50224-00501-001
CONN@
H12
H_3P3
@
H_4P5
@
H_4P5
@
H_3P8
@
H_4P3X3P8
@
1
ON/OFFBTN# 1
1
H11
H_3P3
@
ON/OFF [49]
H10
7
+3VALW
1 GND
2
3
4
5 GND
1
2
3
4
5
USB20_N2
USB20_P2
D33
+5VS
[17] USB20_N2
[17] USB20_P2
100K_0402_5%
1
R967
6
5
SMT1-05-A_4P
@D40
I/O3
I/O2
H28
H29
H_3P8N
@
PJUSB208H_SOT23-6
H30
H_3P8N
@
H_3P8N
@
FD2
@
FD3
@
FD4
@
1
USB20_P2
1
2
I/O1
REF2 REF1
I/O4
+5VS
USB20_N2
ISPD
CIR
+3VALW
C
ZZZ1
6LPCB@
ZZZ4
8LPCB@
U58 GV@
JCIR1
1
2
3
4
5
6
[49] CIR_IN
2
C829 @
1
1000P_0402_50V7K
1
2
3
4
G1
G2
ACES_50228-00471-001
CONN@
PCB LA-7521P
PCB LA-7522P
N12P-GV-B-A1_FCBGA_973P
U66 X76@
U67 X76@
U68 X76@
U69 X76@
H5TQ1G63DFR-11C
H5TQ1G63DFR-11C
H5TQ1G63DFR-11C
H5TQ1G63DFR-11C
U70 X76@
U71 X76@
U72 X76@
U73 X76@
H5TQ1G63DFR-11C
H5TQ1G63DFR-11C
H5TQ1G63DFR-11C
H5TQ1G63DFR-11C
CAM
ZZZ2
1st
ZZZ3
2nd
+3VS_CAM
+3VS
+3VS_CAM
@ R973
0_0603_5%
1
2
1
C827
JCAM1
USB20_N3
USB20_P3
INT_DMIC_CLK
INT_DMIC_DATA
[17] USB20_N3
[17] USB20_P3
[47] INT_DMIC_CLK
[47] INT_DMIC_DATA
C828
2
1U_0402_6.3V6K 0.1U_0402_16V7K
SATA_LED#
+3VS
ON/OFFBTN#
PWR_ON_LED
[49] PWR_ON_LED
+3VALW
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
G11
G12
7
8
GND
GND
X76
X76
X76_HY1G@
X76_SAM1G@
@D41
11
12
USB20_N3
ACES_50228-01071-001
CONN@
1
2
3
4
5
6
ACES_50228-0067N-001
CONN@
JSW1
+3VALW
[49] AD1_KBC
[13] SATA_LED#
1
2
3
4
5
6
+3VS
INT_DMIC_DATA
I/O4
I/O1
REF2 REF1
I/O3
I/O2
USB20_P3
INT_DMIC_CLK
PJUSB208H_SOT23-6
SATA_LED#
PWR_ON_LED
ON/OFFBTN#
2
2
2
1
1
1
2010/10/1
Issued Date
2011/11/01
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Security Classification
@ C1064 1000P_0402_50V7K
C1062 470P_0402_50V7K
C1602 470P_0402_50V7K
Title
PWR/Cap./TP/LED/LP/LS/Screw
Size
Document Number
R ev
0.1
Sheet
1
50
of
64
+3VALW TO +3VS
+12V1 TO +12VS
+5VALW TO +5VS
+12VALW
2
1
1
3
0.1U_0402_16V4Z
0.1U_0402_16V4Z
470_0805_5%
3 1
SUSP
Q74B
2N7002KDWH_SOT363-6
R88
143K_0402_1%
C110
4.7U_0805_25V6-K
1
20mil +FAN1
1
2
3
4
[49] EN_DFAN1
1
C845
0.1U_0402_25V6
C112
10U_0805_10V6K
VOUT
VIN
VEN
VSET
GND
GND
GND
GND
Thermal Pad
+FAN1
2
5
6
7
8
9
JFAN1
1A
20mil
U3
1.5VS_GATE
Q74A
2N7002KDWH_SOT363-6
SUSP
1
6
SUSP#
Q66B
2N7002KDWH_SOT363-6
R984
100K_0402_5%
1
2
3
C111
1000P_0402_50V7K
@
4
5
1
2
3
GND
GND
ACES_50273-0030N-001
CONN@
G9941F11U_SO8
R89
R90
2
100K_0402_5%
10K_0402_5%
1
+3VS
FAN_SPEED1 [49]
Q66A
2N7002KDWH_SOT363-6
1 C1006
+12VS
+5VALW
SUSP# 2
1
C836
R981
4.7U_0603_10V6K 1U_0402_6.3V6K
2
2
1 R987
2
47K_0402_5%
470_0603_5%
20K_0402_5%
C837
AP2301GN-HF_SOT23-3
C839
R1027
+1.5VS
1
2
1
C844
4.7U_0603_10V6K
Q65A
2N7002KDWH_SOT363-6
+12VALW
2
Q65B
2N7002KDWH_SOT363-6
470_0805_5%
Q62
3
SUSP
C838
C1005
1U_0603_25V6K
+1.5V to +1.5VS
+1.5V
@
R986
+12VALW
AO4423_SO8
R1028
1 R983
2
47K_0402_5%
R980
8
7
6
5
D
D
D
D
For EMI
S
S
S
G
AP4800BGM-HF_SO8
1
1
4.7U_0603_10V6K C842
C843
C834
1U_0603_10V6K
3 1
1
2
3
4
S
S
S
G
1
2
3
4
+5VS
0.1U_0603_25V7K
Q64B
2N7002KDWH_SOT363-6
D
D
D
D
200K_0402_5%
SUSP
2
5
Q64A
2N7002KDWH_SOT363-6
+12VALW
8
7
6
5
Q105
4.7U_0603_10V6K
1
C835
Q61
R985
2
330K_0402_5%
1 R982
2
47K_0402_5%
1U_0402_6.3V6K
AP4800BGM-HF_SO8
1
1
4.7U_0603_10V6K C840
C841
+5VS
0.01U_0402_25V7K
1
2
3
4
S
S
S
G
+12VS
Vgs=10V,Id=9A,Rds=18.5mohm
+5VALW
C833
4.7U_0603_10V6K
2
R979
C832
0.022U_0402_25V7K
D
D
D
D
8
7
6
5
Vgs=10V,Id=9A,Rds=18.5mohm
Q60
+3VS
470_0805_5%
+3VALW
(PMOS)
Vgs=20V,Id=15A,Rds=7mohm
C113
0.01U_0402_25V7K
@
+12VS
R1601
143K_0402_1%
1
R978
470_0805_5%
Q71
SSM3K7002BF 1N SC59-3
SUSP
2
G
Q63
SSM3K7002BF 1N SC59-3
SUSP
2
G
1
2
3
4
C1533
10U_0805_10V6K
1
2
3
VOUT
VIN
VEN
VSET
GND
GND
GND
GND
Thermal Pad
5
6
7
8
9
C1532
1000P_0402_50V7K
@
4
5
1
2
3
GND
GND
ACES_50273-0030N-001
CONN@
G9941F11U_SO8
R1602
100K_0402_5%
R1603 10K_0402_5%
1
+3VS
FAN_SPEED2 [49]
Q68
SSM3K7002BF 1N SC59-3
SUSP
2
G
Q98
SSM3K7002BF 1N SC59-3
SUSP
2
G
JFAN2
1A
20mil
+FAN2
2
U92
20mil +FAN2
R992
470_0805_5%
[49] EN_DFAN2
D
C1531
4.7U_0805_25V6-K
2
1
R991
22_0805_5%
R1604
470_0805_5%
+1.8VS
+1.05VS_VCCIO
+0.75VS
+1.05VS_VPCH
2
Discharge circuit
C1534
0.01U_0402_25V7K
@
+5VALW
R990
100K_0402_5%
Q73
SSM3K7002BF 1N SC59-3
SUSP
[5,57] SUSP
Security Classification
2010/10/1
Issued Date
3
2
G
[49,54,55,56,57] SUSP#
2011/11/01
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Title
DC-DC INTERFACE
Size
Document Number
R ev
0.1
Sheet
E
51
of
64
B+
PL1
SMB3025500YA_2P
1
2
CONN@
ACES_88299-0610
1
2
1
2
PC114
0.1U_0402_25V6
JDCIN1
PC4
100P_0402_50V8J
PC3
100P_0402_50V8J
1
2
1
2
1
2
PC2
220P_0402_50V7K
VIN+
8
7
6
5
4
3
2
1
PC113
0.1U_0402_25V6
GND
GND
6
5
4
3
2
1
DC_IN_S1
PR153
VIN-
0.01_2512_1%
PC5
220P_0402_50V7K
VL
2
PR8381
2 0_0402_5%
+3VS
2
PR3
9.53K_0402_1%
@
PU1
PU803
1
2
3
4
VIN+
VINGND
VS
A1
A0
SDA
SCL
8
7
6
5
VIN_A1
VIN_A0
EC_SMB_DA2
EC_SMB_CK2
VCC TMSNS1
GND RHYST1
OT1 TMSNS2
OT2 RHYST2
EC_SMB_DA2 [14,23,49]
EC_SMB_CK2 [14,23,49]
HPA00900AIDCNR_SOT23-8
PH1 @
100K_0402_1%_NCP15WF104F03RC
2
2
VIN-
PC806
@ PR2
10K_0402_1%
2 0_0402_5%
PR1
20.5K_0402_1%
@
PC805
PR8301
0.1U_0402_16V7K
2
1
PR834 0_0402_5%
0.1U_0402_16V7K
PC1
.1U_0402_16V7K
VIN+
G718TM1U_SOT23-8
@
+3VS
[49,53] CPU_OT
PR832
0_0402_5%
1
PR836
0_0402_5%
VIN_A0
VIN_A1
PR841
0_0402_5%
@
PR831
0_0402_5%
+RTCBATT
LOTES_AAA-BAT-054-K01
CONN@
Issued Date
Security Classification
2010/10/1
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
P51_PWR_DC-IN
Size
Document Number
R ev
0.1
Sheet
D
52
of
64
PC6
1U_0603_10V6K
2VREF_8205
PR10
13K_0402_1%
1
2
PR11
30K_0402_1%
1
2
PR12
20K_0402_1%
1
2 FB3
PR13
20K_0402_1%
FB5 1
2
8205_B+
8205_B+
LG_3V
12
LGATE2
LGATE1
19
LG_5V
1
2
3
2
1
2
1
RT8205EGQW_WQFN24_4X4
8205_B+
2VREF_8205
+5VALWP
1
+
2
PC19
4.7U_0805_10V6K
VL
1
2
PC18
1U_0402_6.3V6K
1
2
SI7716ADN-T1-GE3_POWERPAK8-5
PQ7
3
2
1
18
VIN
17
16
15
PL3
4.7UH_PCMC063T-4R7MN_5.5A_20%
1
2
PC15
330U_6.3V_M
LX_5V
20
SIS412DN-T1-GE3_POWERPAK8-5
PC17
@ PR20
680P_0603_50V7K 4.7_1206_5%
PHASE1
PQ2
SPOK [61]
PC13
.1U_0402_16V7K
BST5A 1
2
NC
PHASE2
VREG5
UG_5V
11
GND
21
LX_3V
13
PC9
10U_1206_25V6M
2
FB1
ENTRIP1
REF
4
TONSEL
UGATE1
0_0402_5%
@
22
UGATE2
PR21
499K_0402_1%
1
2
PR22
100K_0402_1%
PR24
1
[49,52] CPU_OT
BOOT1
PR18
0_0603_5%
BST_5V 1
2
10
EN
B+
23
UG_3V
4
SI7716ADN-T1-GE3_POWERPAK8-5
PQ25
VO1
PGOOD
BOOT2
PC11
2200P_0402_50V7K
2
1
ENTRIP2
FB2
VREG3
PR202
10K_0402_1%
24
BST_3V
1
2
0_0603_5%
VO2
2
1
PC20
0.1U_0603_25V7K
BST3A
PC12
.1U_0402_16V7K
1
2
3
@ PR19
4.7_1206_5%
2
1
PC16
680P_0603_50V7K
2
1
PC14
330U_6.3V_M
+3VALWP
P PAD
SKIPSEL
1
2
3
PL2
4.7UH_PCMC063T-4R7MN_5.5A_20%
1
2
ENTRIP2
25
PR17
SIS412DN-T1-GE3_POWERPAK8-5
PR16
174K_0402_1%
2
+3VALWP
PU2
PQ26
14
PR15
110K_0402_1%
1
2
PC10
4.7U_0805_10V6K
PC8
10U_1206_25V6M
PC76
1U_0603_25V6K
+3VLP
@ JUMP_43X118
PC7
2200P_0402_50V7K
B+
ENTRIP1
PJ8
PJ402
+3VALWP
+3VALW
@ JUMP_43X118
PJ403
+5VALWP
2
@
+3.3VALWP
Ipeak=5.71A ; 1.2Ipeak=6.852A; Imax=3.997A
f=375KHz, L=4.7UH
Rdson=15~18m ohm
1/2Delta I = 1/2 *(19-3.3)*(3.3/19)/(375KHz*4.7UH)=0.773A
Vlimit=10*10^-6*110Kohm/10=0.11V
Ilimit=0.11/(18m*1.2)~0.11/(15m)=6.34A~9.13A
Iocp=7.113A~10.073A (7.113A>6.852A -> ok) -DVT-
+5VALW
+5VALWP
Ipeak=7.376A ; 1.2Ipeak=8.85A; Imax=5.16A
f=300KHz, L=4.7UH,Rentrip=174k ohm
Rdson=15~18m ohm
1/2Delta I = 1/2 *(19-5)*(5/19)/(300KHz*4.7UH)=1.306A
Vlimit=10*(10^-6)*174Kohm/10=0.174V
Ilimit=0.174/(18m*1.2)~0.174/(15m)=8.055~11.6A
Iocp=9.361~12.906A (9.361>8.85 -> OK)
2010/10/1
Issued Date
Security Classification
2011/11/01
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
JUMP_43X118
Title
P52-PWR-+3VALW/+5VALW
Size
Document Number
R ev
0.1
Sheet
1
53
of
64
PJ31
+1.05Vin_VCCIO
B+
PQ5
PC39
PR38
BST_VCCIO 1
2
1
2
0_0603_5%
0.22U_0603_25V7K
9
UG_VCCIO
SW_VCCIO
EN
SW
VFB
V5IN
RF
DRVL
PL6
1.0UH_PCMC104T-1R0MN_20A_20%
1
2
+5VALW
LG_VCCIO
PC41
1U_0603_6.3V6M
TPS51212DSCR_SON10_3X3
@ PR41
4.7_1206_5%
1
11
2
TP
+1.05VS_VCCIOP
TPCA8065-H_PPAK56-8-5
@ PC44
3
2
1
470K_0402_5%
680P_0603_50V7K
PR43
PC42
560U_2.5V_M
10
DRVH
VBST
TRIP
PR42
0_0402_5%
RF_VCCIO
PGOOD
PC40
0.1U_0402_16V7K
EN_VCCIO
FB_VCCIO
[49,51,55,56,57] SUSP#
PR40
1
2
0_0402_5%
TRIP_VCCIO2
3
2
1
1
PR39
1
2
102K_0402_1%
PU6
PC38
4.7U_0805_25V6-K
2
1
PC37
4.7U_0805_25V6-K
2
1
PC36
4.7U_0805_25V6-K
2
1
JUMP_43X118
PQ6
TPCA8059-H_SOP-ADV8-5
PR44
PR45
10_0402_5%
2
1
VCCIO_SENSE [8]
5.1K_0402_1%
2
1
PR46
11.8K_0402_1%
PR165
75K_0402_1%
PQ40
VCCIO_SELECT
2
G
+VCCIO
VCCIO_SEL [10]
SSM3K7002FU_SC70-3
1V
1.05V
<Vo=1.05V> VFB=0.7V
V=0.7*(1+5.1K/10.1958K)=1.05V
Fsw=290KHz
Cout ESR=10m ohm Rdson(max)=4.8 mohm Rdson(typ)=3.8 mohm.
Ipeak=17.3A, Imax=12.11A, Iocp=1.2*Ipeak=20.76A
Delta I=((19-1.05)*(1.05/19))/(L*Fsw)=3.42A
=>1/2Delta I=1.71A
Vtrip=Itrip*Rtrip, Iocp=Vtrip/(8*Rds(on))
Iocpmax=((102K*11uA)/(8*0.0038))+1.71A=38.617A
Iocpmin=((102K*9uA)/(8*0.0048))+1.71A=25.616A
Iocp=25.616A~38.617A
+1.05VS_VCCIOP
@ PJ5
2 2
JUMP_43X118
@ PJ7
2 2
<Vo=1.0V> VFB=0.7V
V=0.7*(1+5.1K/11.8K)=1.0V
Fsw=290KHz
+1.05VS_VCCIO
JUMP_43X118
@ PJ10
2 2
JUMP_43X118
+1.05VS_VPCH
+1.05VSP
@ PJ12
2 2
2009/11/13
Issued Date
Security Classification
JUMP_43X118
2009/04/28
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
+1.05VSP
Size
Document Number
R ev
0.1
Sheet
1
54
of
64
@ PJ34
2 2
+1.05Vin
B+
FB_1.05V
RF_1.05V
10
DRVH
UG_1.05V
SW_1.05V
EN
SW
VFB
V5IN
RF
DRVL
3
2
1
VBST
TRIP
+5VALW
LG_1.05V
@ PR164
4.7_1206_5%
PC144
1U_0603_6.3V6M
Maho@
2
1
PQ39
Maho@
Maho@
+1.05VSP
Maho@
@ PC134
680P_0603_50V7K
PL15
1.0UH_PCMC104T-1R0MN_20A_20%
1
2
Maho@
11
TPS51212DSCR_SON10_3X3
Maho@
AO4406AL_SO8
1
TP
Maho@
EN_1.05V
PGOOD
Maho@
PC146
0.1U_0402_16V7K
TRIP_1.05V 2
5
6
7
8
1
2
0_0402_5%
[49,51,54,56,57] SUSP#
1
2
78.7K_0402_1%
Maho@
PQ38
Maho@
1
2
1
2
0_0603_5%
0.22U_0603_25V7K
Maho@
PR156
PC145
PC135
330U_6.3V_M
BST_1.05V
PU9 Maho@
Maho@
PR157
PR167
PC136
4.7U_0805_25V6-K
2
1
Maho@
Maho@
PC147
4.7U_0805_25V6-K
2
1
PC148
4.7U_0805_25V6-K
2
1
5
6
7
8
JUMP_43X118
PR169
2
3
2
1
470K_0402_5%
AO4456_SO8
PR166
5.1K_0402_1%
2
1
Maho@
PR170
10.2K_0402_1%
Maho@
2010/10/1
Issued Date
Security Classification
2011/11/01
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
P54_PWR-+1.05VSP
Size
Document Number
R ev
0.1
Sheet
1
55
of
64
+3VALW
Ipeak=1.26A, Imax=0.882A
Vo=0.8(1+Rt/Rb)=1.827 V
+5VALW
PJ6
@ JUMP_43X79
PR47
0.01U_0402_25V7K
2
1.54K_0402_1%
PC43
FB
2
2
@
PC52
.1U_0402_16V7K
3
4
PJ27
+1.8VSP
+1.8VS
JUMP_43X79
APL5930KAI-TRG_SO8
+1.8VSP
PC58
22U_0805_6.3V6M
EN
POK
VOUT
VOUT
8
7
VCNTL
VIN
VIN
PR70
@ 47K_0402_5%
PR25
0_0402_5%
1
2
PU4
6
5
9
GND
PC63
4.7U_0805_6.3V6K
[49,51,54,55,57] SUSP#
PC27
1U_0402_6.3V6K
PR82
1.2K_0402_1%
2
FB=0.8V
C
PC30
4.7U_0805_10V6K
2
EN VCC
GND DRV
1
@
PC29
4.7U_0805_6.3V6K
5
PR27
1
2
3 FB POK 4
.1U_0402_16V7K
APL5610CI-TRG_SOT23-6
10K_0402_1%
PC31 @
+3VALW
PQ3
3
2
1
0_0402_5%
PC28
4.7U_0805_6.3V6K
5
6
7
8
1
2
2
JUMP_43X118
IRF8736TRPBF_SO8
PU5
PR26
1
[49,51,54,55,57] SUSP#
+1.05VS_VCCIO
PJ30
+5VALW
Ipeak=8.8A
Imax=6.2A
Toatal Capacitor ??u
ESR=15mohm
Vout=0.8(1+Rt/Rb)
VCCSA_PG [49]
+VCCSAP
+VCCSAP
@ PJ3
2 2
49.9K_0402_1%
PR31
PR30
10_0402_5%
2
1
VCCSA_SENSE [9]
4.7K_0402_1%
75K_0402_1%
PR32
+3VALW
+3VALW
+VCCSA
PR28
0_0402_5%
47P_0402_50V8J
PR29
1
2
PC32
330U_6.3V_M
JUMP_43X118
1
PC33
VCCSA_VID
PC34
.1U_0402_16V7K
DMN66D0LDW-7_SOT363-6
0.925V
0.85V
+VCCSAP
DMN66D0LDW-7_SOT363-6
10K_0402_1%
PQ4B
2
PR37
1K_0402_1%
2
[9] VCCSAP_VID1
10K_0402_1%
PR36
PQ4A
2
PR35
2
10K_0402_1%
PR34
10K_0402_1%
PR33
PC35
.1U_0402_16V7K
Security Classification
2010/01/25
Issued Date
Deciphered Date
2009/04/28
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
+VCCSA/+1.8VSP
Size Document Number
Custom
R ev
0.1
Date:
Sheet
1
56
of
64
PJ32
+1.5Vin
B+
PU7
FB_1.5V
RF_1.5V
VBST
10
TRIP
DRVH
UG_1.5V
EN
SW
SW_1.5V
VFB
V5IN
RF
DRVL
3
2
1
PGOOD
+5VALW
LG_1.5V
1
11
TP
SIS412DN-T1-GE3_POWERPAK8-5
PL7
1.0UH_PCMC104T-1R0MN_20A_20%
1
2
PC50
0.1U_0402_16V7K
EN_1.5V
PR51
4.7_1206_5%
PQ9
PC51
1U_0603_6.3V6M
PC53
330U_6.3V_M
2
1
TPS51212DSCR_SON10_3X3
+1.5VP
PR50
1
2
0_0402_5%
[49] SYSON
TRIP_1.5V
PR49
1
2
143K_0402_1%
[49,51,54,55,56] SUSP#
PC49
PR48
1
2
1
2
0_0603_5%
0.22U_0603_25V7K
BST_1.5V
@ PR214
0_0402_5%
SUSP#1
2
PC48
4.7U_0805_25V6-K
2
1
PQ8
PC47
4.7U_0805_25V6-K
2
1
PC46
4.7U_0805_25V6-K
2
1
PC45
4.7U_0805_25V6-K
2
1
JUMP_43X118
PC54
680P_0603_50V7K
PR52
FDMC7692S_MLP8-5
3
2
1
470K_0402_5%
C
PR53
PR54
10K_0402_1%
1
2
Ipeak=10.24A Imax=7.168A
Iocp >=1.2*Ipeak=12.288A
2
11.5K_0402_1%
PJ20
JUMP_43X118
1 1
2 2
+1.5VP
<Vo=1.5V> VFB=0.7V
Vo=VFB*(1+Rtop/Rdown)=1.505V
Fsw=290 KHz
Cout ESR=15m ohm Rdson(max)=5.6m ohm, Rdson(typ)=4.5 mohm
+1.5V
PJ23
JUMP_43X118
1
2 2
+1.5V
+1.5V
PJ33
JUMP_43X79
PJ38
JUMP_43X79
@
+5VALW
TP
2
+0.75VP
S PQ10
SSM3K7002FU_SC70-3
PC59
0.1U_0402_16V7K
[49,51,54,55,56] SUSP#
PR59
1K_0402_1%
PC60
10U_0805_6.3V6M
Imax=1.4A
Ipeak=2A
6
5
9
VCNTL
VIN
VIN
8
7
EN
POK
VOUT
VOUT
3
4
FB
+1.2VUSB
1
PC162
0.1U_0603_25V7K
2
1
2
D
SUSP#
PR210
0_0402_5%
1
2
PC61
0.1U_0402_16V7K
APL5336KAI-TRL_SOP8P8
2
G
Imax=0.39A
Ipeak=0.558A
PU19
PR213
@ 47K_0402_5%
PR212
12K_0402_1%
APL5930KAI-TRG_SO8
22U_0805_6.3V6M
PC159
2
1
NC
PC160
1U_0402_6.3V6K
VOUT
PC161
4.7U_0805_6.3V6K
1
PR55
1K_0402_1%
PR56
0_0402_5%
1
2
[5,51] SUSP
PC56
1U_0603_6.3V6M
VREF VCNTL
GND
+3VALW
PC55
4.7U_0805_6.3V6K
NC
NC
GND
VIN
PU8
PC158
0.01U_0402_25V7K
@
PR211
24K_0402_1%
A
+0.75VP
PJ9
1
+0.75VS
2010/01/25
Issued Date
Security Classification
JUMP_43X79
Deciphered Date
2009/04/28
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
1.5VP/+1.2VALWP/+0.75VS
Size Document Number
Custom
R ev
0.1
Date:
Sheet
1
57
of
64
PR69
95W@
CSSUM
PR63 75K_0402_1%
2
1
220K_0402_5%_ERTJ0EV224J2
PH2
2
1
PR69 24K_0402_1%
PC74
0.1U_0402_25V6K
1
2
65W@
1
2
PC75 PR83 24K_0402_1%
1000P_0402_50V8-J
2
UMA@
1
PR1162
1.24K_0402_1%
2
2
1
PC807
0.1U_0402_16V4Z
1
2
31
UMA@
PC93
4700P_0402_25V7K
UMA@
GFX OCP:42A
29
PWMA/IMAXA
28
VBOOTA
27
+5VALW
PR101
PWM2
PR179
PR104
0_0402_5%
10K_0402_1% UMA@
DIS@ 1
2
PC85
1000P_0402_50V8-J
PR180
1
2
UMA@
0_0402_5%
CSNA_A 1
2
UMA@
0_0402_5%
PR178
UMA@
DIS@
CSPA
1
2
PR111
PR110 6.98K_0402_1%
UMA@ 24K_0402_1%
PR111
2
1
PWMA
95W@
VCORE
VBOOT
SET AT
0V
CSNA [59]
PR106
27.4K_0402_1%
UMA@
V_GT
IMAX SET
AT 35A
CSPA [59]
3
Iout_MAX=35A
PWM1
2
1
UMA@ PC91
.1U_0402_16V7K
PR119
DIS@
95W@
0_0402_5%
UMA@
PR122
2
10_0402_1%
PC94 UMA@
820P_0402_50V7K
1 1
2
PWM
ADDRESS
CSNA_A
PR124
PR118
10K_0402_1%
VCORE
IMAX SET
AT 112A
88.7K_0402_1%
2
1
3.3K_0402_1%
UMA@
IMAX
UMA@
PR129
PR128
39.2K_0603_1%
1 CSSUMA 2
1CSPA
165K_0402_1%
UMA@
1
2
PC97 UMA@
680P_0402_50V7K
1
2
PC98
1200P_0402_50V7K
PR127 UMA@
75K_0402_1%
2
1
2
2
UMA@
VCORE
IMAX SET
AT 75A
65W@
59K_0402_1%
PR174
UMA@
PR177
1
0_0402_5%
0_0402_5%
DIS@
PWM4 [59]
PWMA [59]
2 DIS@
220K_0402_5%_ERTJ0EV224J
PH5
PR121
95W@ PR181
PWM2 [59]
0_0402_5%
IMAX 1
2
CSNA
26
CSSUMA
CSPA
25
CSSUMA 24
IOUTA
23
CSCOMPA
CSCOMOA 22
ILIMA
DROOPA
21
20
COMPA
19
FBA
PWM3 [59]
30
PWM4
65W@
VCORE
VBOOT
SET AT
0V
PWM1 [59]
32
PWM3/IMAX
PWM3
CSP1 [59]
33
34
CSP1
DRON
CSN1 [59]
CSN4
35
CSN3 [59]
CSP3 [59]
PR119
10K_0402_1%
40
41
42
CSP4
CSREF
IOUT
43
CSCOMP
CSSUM
45
44
CSSUM
46
DROOP
48
49
47
ILIM
COMP
CSCOMP
CSN1
PC86
0.047U_0402_16V7K
2
1
UMA@
2
1
1
UMA@
36
PR113
100_0402_1%
0_0402_5%
UMA@
CSN2 [59]
CSP2 [59]
UMA@
VR_ON_R
50
FBA
+GFX_CORE
PR109
887_0402_1%
CS N2
0.047U_0402_16V7K
PC78
1
2 CSP2
PR90 6.98K_0402_1%
CS N3
0.047U_0402_16V7K
PC79
CSP3
1
2
PR91 6.98K_0402_1%
CS N1
PC80
0.047U_0402_16V7K
1
2 CSP1
PR95 6.98K_0402_1%
DRVON [59]
0_0402_5%
CSP3
PWM2/VBOOT
UMA@
UMA@
PR114
PC89
412_0402_1% 4700P_0402_25V7K
1
2 2
1
[9] VCC_AXG_SENSE
PC87
1000P_0402_50V8-J
DIS@
0_0402_5%
PR175
DIS@
1
2
PR112
0_0402_5%
[9] VSS_AXG_SENSE
PR108
0_0402_5%
1
2
TRBSTA
TSENSEA
18
13
0.01U_0402_50V7K
UMA@
PR107
100_0402_1%
1
2
DIS@
FB
VRMP
PR107
PR103
TRBST
51
ROSC
PC83
65W@
DIFFOUTA
TSENSEA
1U_0603_6.3V6M
38
37
PWM1/ADDR
NCP6131S52MNR2G_QFN52_6X6
FBA
PC82
2
CSP2
CSN3
VCC
14
PR102 1K_0402_1%
1
2
UMA@
PC84
0.1U_0402_25V6
2
UMA@
8.25K_0402_1%
PR103
1
Vin
VSN
ENABLE
12
PU10
16
95W@
NCP6151S52MNR2G_QFN52_6X6
DIFFOUTA 17
PR100
65W@
39
CSN2
CSN4 [59]
VR_RDYA
24.3K_0402_1%
CSP4 [59]
PR83
95W@
VR_RDY
CS REF
2
ALERT#
95W@
95W@
6.98K_0402_1%
PR151
CSP4
1
2
PC133
PR184
0.047U_0402_16V7K
95W@
0_0402_5%
0_0402_5% 95W@
65W@
1
2
PR185
PR171
10_0402_5%2
1
6
11
1
2
9.09K_0402_1%
52
SCLK
95W@
CS N1
2
1
PR75 10_0402_1%
CS N2
1
PR76 10_0402_1%
CS N3
2
1
PR81 10_0402_1%
CS N4
2
1
PR15410_0402_1%
PR78 1
2
8.2K_0402_1%
0_0402_5%
1
PC88
220P_0402_50V8J
4.02K_0402_1%
2200P_0402_50V7K
UMA@
2
1
2
1
2 2
1
UMA@ PC95 UMA@ PR115
1
2
1
2
PC90
UMA@
UMA@ PR125 1K_0402_1%
10P_0402_50V8J
PR1171
2
26.7K_0402_1%
UMA@
1
22
1
UMA@ PR120
1K_0402_1% PC92 820P_0402_50V7K
CSCOMOA
1
2
UMA@ PR121 1.82K_0402_1%
PR99 2.2_0603_5%
53
SDIO
DIS@ PR176
2
DIFFOUT
10
+5VALW
FLAG / GND
VR_HOT#
UMA@
PR126
47_0402_1%
DIFFOUTA
1
2
0_0402_5%
TSENSE
CSP4
CSP3
PC72
1500P_0402_50V7K
D IFFOUT
1
PR98
[49] VR_ON
VR_ON_R
VSPA
+3VS
[8] VR_SVID_CLK
2
75_0402_1%
[8] VR_SVID_ALRT#
2
10K_0402_1%
[15,49] VGATE
1
PR94
1
PR97
VSP
15
1
2
PC81
0.1U_0402_25V6
+1.05VS_VCCIO
VSNA
+1.05VS_VCCIO
TSENSEA
100K_0402_1%_NCP15WF104F03RC
PH4
UMA@
1
2
PC77
1000P_0402_50V8-J
TSENSE
[49] VR_HOT#
PR88
51_0402_5%
1
2
PR92 110_0402_1%
1
2
PR93 54.9_0402_1%
[8] VR_SVID_DAT
1
2
1
2
PR87
100_0402_1%
+1.05VS_VCCIO
TSENSE
8.25K_0402_1%
PR96
2
1
100K_0402_1%_NCP15WF104F03RC
PH3
1
2
0_0402_5%
2
PR1521
95.3K_0603_1%
PR72 820P_0402_50V7K
2
1 1
2
10_0402_1%
PC70
PR89
1
[8] VCCSENSE
PU10
[8] VSSSENSE
+CPU_CORE
0_0402_5%
PR86
2
CSP2
PC68 1200P_0402_50V7K
D IFFOUT
PR85
100_0402_1%
1
2
CSP1
PR65 1
95.3K_0603_1%
PR66 1
95.3K_0603_1%
4700P_0402_25V7K
1 PR77
2
1
2
PC71
412_0402_1%
1
2
1
2
2.8K_0402_1%
1.5K_0402_1%
PR79
PC73
PR80
4700P_0402_25V7K
1
2 PR73
1
1K_0402_1%
2 PC69
10P_0402_50V8J
PR62 1
95.3K_0603_1%
65W@
1
2
PC65 470P_0402_50V7K
1
1
2
47_0402_1%
PR71
2 1
2
1K_0402_1%
2
1
PR74 4.7K_0402_1%
PC66
PC67
220P_0402_50V8J
1000P_0402_50V7K
1
2
1
2 1
2
5.49K_0402_1%
PR68
PR67
PR64 165K_0402_1%
2
1
CSCOMP
PR105
10K_0402_1%
36.5K_0402_1%
2
0_0402_5%
DIS@
2010/01/25
Issued Date
Security Classification
Deciphered Date
2009/04/28
Title
CPU_CORE_1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Size
C
Date:
G
Document Number
Rev
0.1
Sheet
58
H
of
64
VIN
LX_CPU2
VCC
GND
DRVL
DL_CPU2
PC108
1U_0603_25V6K
1
2
1
2
PC104
2
1
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
PQ19
+CPU_CORE
PL9
[58] CSP2
VIN
1U_0603_25V6K
PQ18
NCP5911MNTBG_DFN8-9
PC105
10U_1206_25V6M
SW
1
2
PR172
4.7_1206_5%
DH_CPU2
EN
3
2
1
[58] CSN1
DH_CPU2
[58] CSP1
DRVH
PR135
2.2_0603_1%
+5VALW
FLAG
PWM
BST
PC106
10U_1206_25V6M
[58] CSN2
PC149
1000P_0603_50V7K
3
2
1
PC107
1U_0603_25V6K
TPCA8059-H_PPAK56-8-5
NCP5911MNTBG_DFN8-9
DRVON [58]
PQ17
3
2
1
PQ16
95W@
2 PR134 1 4.02K_0402_1%
[58] DRVON
PU12
TPCA8059-H_PPAK56-8-5
DL_CPU1
0.22U_0603_25V7K
PR131
2.2_0603_1%
1
2
3
2
1
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
1
4
+CPU_CORE
PQ15
DRVL
2.74K_0402_1%
[58] PWM2
TPCA8065-H_PPAK56-8-5
PQ14
3
2
1
GND
TPCA8065-H_PPAK56-8-5
PC103
65W@
LX_CPU1
1
2
PR173
4.7_1206_5%
PR133
2.2_0603_1%
DH_CPU1
VCC
SW
3
2
1
DRVH
PR134
PC102
10U_1206_25V6M
PL8
EN
DH_CPU1
PWM
3
2
1
FLAG
TPCA8059-H_PPAK56-8-5
1 4.02K_0402_1%
BST
1U_0603_25V6K
PU11
1
3
2
1
PR130
2.2_0603_1%
1
2
PC100
2
1
0.22U_0603_25V7K
[58] PWM1
95W@
2 PR132
+5VALW
2
PQ13
2.74K_0402_1%
TPCA8065-H_PPAK56-8-5
PQ12
PC150
1000P_0603_50V7K
TPCA8059-H_PPAK56-8-5
65W@
TPCA8065-H_PPAK56-8-5
PC99
D
2
1
PC101
10U_1206_25V6M
VIN
PR132
VCC
DH_CPU4
SW
LX_CPU4
GND
DRVL
DL_CPU4
PQ34
PC132
1U_0603_25V6K
95W@
PQ29
95W@
95W@
LX_GFX
EN
VCC
SW
GND
DRVL
DL_GFX
PQ30
3
2
1
UMA@
PQ31
+GFX_CORE
PC123
UMA@
10U_1206_25V6M
PL13
PC124
68U_25V_M
2
1
+
PC125
68U_25V_M
2
1
+
PC126
68U_25V_M
2
1
2
VIN
1
+
PC153
68U_25V_M
2
UMA@
2010/01/25
Issued Date
Security Classification
Deciphered Date
2009/04/28
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
[58] CSN4
1
2
1U_0603_25V6K
PC120
2
1
2
[58] CSP4
[58] CSPA
[58] CSNA
UMA@
HCB4532KF-800T90_1812
PL14
2
1
1
4
95W@
HCB4532KF-800T90_1812
PL12
2
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
1
PL11
B+
DH_GFX
+CPU_CORE
PC122
10U_1206_25V6M
2
1
PC121
10U_1206_25V6M
DRVH
TPCA8059-H_PPAK56-8-5
FLAG
PWM
UMA@
BST
TPCA8065-H_PPAK56-8-5
NCP5911MNTBG_DFN8-9
UMA@
PC127
1U_0603_25V6K
UMA@
DRVON [58]
UMA@
3
2
1
PR144
2.2_0603_1%
A
UMA@ PR143
2
1 49.9_0402_1%
+5VALW
2
1
PU15
3
2
1
[58] PWMA
PQ28
0.22U_0603_25V7K
UMA@
PR142
2.2_0603_1%
1
2
UMA@
TPCA8059-H_PPAK56-8-5
PC119
VIN
1U_0603_25V6K
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
1
NCP5911MNTBG_DFN8-9
95W@
DRVON [58]
PC118
10U_1206_25V6M
3
2
1
DRVH
1
2
PR183
4.7_1206_5%
95W@
[58] CSN3
EN
PC129
2
1
95W@
[58] CSP3
2
1
PC130
10U_1206_25V6M
2
1
+5VALW
PR150
2.2_0603_1%
PWM
95W@
PR1491 4.02K_0402_1%
FLAG
BST
PC152
1000P_0603_50V7K
95W@
3
2
1
PL10
PU14
1
TPCA8059-H_PPAK56-8-5
PC117
1U_0603_25V6K
PQ23
[58] PWM4
PQ22
NCP5911MNTBG_DFN8-9
+CPU_CORE
3
2
1
DL_CPU3
DH_CPU4
TPCA8059-H_PPAK56-8-5
DRVL
3
2
1
PQ36
PQ37
95W@
0.22U_0603_25V7K
PR148
2.2_0603_1%
1
2
TPCA8065-H_PPAK56-8-5
3
2
1
SW
GND
95W@
LX_CPU3
VCC
TPCA8065-H_PPAK56-8-5
PC131
1
EN
1
2
PR182
4.7_1206_5%
95W@
95W@
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
DH_CPU3
PC151
1000P_0603_50V7K
TPCA8059-H_PPAK56-8-5
DRVH
VIN
PC112
10U_1206_25V6M
3
2
1
PWM
TPCA8059-H_PPAK56-8-5
3
2
1
FLAG
BST
1
2
PR138
2.2_0603_1%
DRVON [58]
DH_CPU3
PU13
95W@ PR137
2
1 4.02K_0402_1%
+5VALW
2
1
PQ20
0.22U_0603_25V7K
PR136
2.2_0603_1%
1
2
[58] PWM3
PQ21
3
2
1
2.74K_0402_1%
1U_0603_25V6K
TPCA8065-H_PPAK56-8-5
5
PC110
2
1
TPCA8065-H_PPAK56-8-5
PC109
65W@
2
1
PC111
10U_1206_25V6M
PR137
Title
CPU_CORE_2
Size Document Number
Custom
Date:
R ev
0.1
Sheet
1
59
of
64
HCB4532KF-800T90_1812
+VGA_Vin
PQ33
DIS@
SW_VGA
VFB
V5IN
RF
DRVL
0.36UH_MMD-12CE-R36M-M1L_34A_20%
1
2
LG_VGA
+
@ PR159
4.7_1206_5%
@ PC138
DIS@
4
1
PQ35
2
TPS51212DSCR_SON10_3X3
DIS@
PQ32
PC62
1U_0603_6.3V6M
DIS@
1
11
TP
+VGA_CORE
DIS@ PL20
+5VALW
PR162 DIS@
470K_0402_5%
1
+
2
DIS@ PC143
560U_2.5V_M
SW
DIS@ PC141
560U_2.5V_M
UG_VGA
EN
PR160
0_0402_5%
DIS@
3
2
1
10
3
2
1
DRVH
DIS@
RF_VGA
VBST
TRIP
DIS@
FB_VGA
PGOOD
TPCA8065-H_PPAK56-8-5
DIS@
EN_VGA
DIS@ PC140
0.1U_0402_16V7K
TRIP_VGA
DIS@
1
[17,26] DGPU_PWR_EN
PU16
DIS@
DIS@
PC57
PR161
1
2
1
2
2.2_0603_5%
0.22U_0603_25V7K
UG_VGA
BST_VGA
[18] VGA_PWROK
PR60
1
2
53.6K_0402_1%
PQ11
PR235
100K_0402_5%
DIS@
DIS@ PR158
1
2
150K_0402_1%
TPCA8065-H_PPAK56-8-5
D
B+
DIS@
PC142
10U_1206_25V6M
2
1
PC137
10U_1206_25V6M
2
1
+3VS
PC139
10U_1206_25V6M
2
1
PL21
3
2
1
3
2
1
680P_0603_50V7K
ESR=10m ohm
TPCA8057-H_PPAK56-8-5
TPCA8057-H_PPAK56-8-5
DIS@
DIS@
PR57 DIS@
PR58 DIS@
10_0402_5%
2
1
2.87K_0402_1%
2
1
+3VS
1
VFB=0.7V
V=0.7*(1+Rtop/Rbottom)
Fsw=350KHz
2
3
DIS@ PR226
10K_0402_1%
2
1
GPU_VID1 [22]
PC177
4700P_0402_16V7K
DIS@
B
DIS@ PR163
10_0402_5%
2
1
[23] GND_SENSE
DIS@ PR228
10K_0402_1%
PQ47B
DMN66D0LDW-7_SOT363-6
DIS@
PR61
16K_0402_1%
1
2
PR225
13.3K_0402_1%
DIS@
DIS@
DIS@
+3VS
PR231
82K_0402_1%
VGA_SENSE [23]
(Default)
PC178
4700P_0402_16V7K
DIS@ PR234
10K_0402_1%
DIS@ PR233
10K_0402_1%
2
1
PQ47A DIS@
DMN66D0LDW-7_SOT363-6
GPU_VID0
NVIDIA/N12P-GS
GPU_VID0 [22]
DIS@
0.825V
0.85
0.975
1.00
2010/01/25
Issued Date
Security Classification
Deciphered Date
2009/04/28
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
VGA_CORE
Size Document Number
Custom
R ev
0.1
Date:
Sheet
1
60
of
64
Imax=1.862A
Ipeak=2.66A
PH_12V
VIN
GND
3
4
EN
COMP
SS
VSENSE
PL4
10UH_PCMB063T-100MS_4A_20%
1
2
PD1
S SCH DIO SX34 SMA
1
2
+
2
PC26
15P_0402_50V8J
1
2
PC64
0.01U_0402_16V7K
PC115
470P_0402_50V7K
TPS54331DR_SO8
+12VALWP
1
1
PH
BOOT
12V_EN_R
PC128
330P_0402_50V7K
PU3
PC25
100U_25V_M
0_0402_5%
2
PC21
0.1U_0603_25V7K
BOOT_12V_1
1
2
PR146
0_0603_5%
1
2
BOOT_12V
PC24
4.7U_0805_25V6-K
2
[53] SPOK
PR842
1
2+12V_B+
JUMP_43X79
@
PC23
4.7U_0805_25V6-K
B+
PC22
0.1U_0603_25V7K
PJ11
D
2
PR140
226K_0402_1%
PC116
180P_0402_50V8J
+12VALWP
+12VALW
JUMP_43X118
FB_12V
VFB=0.8V
@ PJ13
2 2
2
C
PR141
30K_0402_1%
2
PR145
2.1K_0402_1%
2010/10/1
Issued Date
Security Classification
2011/11/01
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
P60_PWR-+12V
Size
Document Number
R ev
0.1
Sheet
1
61
of
64
NO
DATE
PAGE
MODIFICATION LIST
PURPOSE
---------------------------------------------------------------------------------------------------------------------------------------1
2010/09/30
P48~49
2010/10/01
P48
2010/10/28
P50
Remove PC126
2010/10/28
P49
2010/10/28
P49
2010/10/28
P49
2011/01/27
P58
2011/01/27
P61
material shoretage
2011/01/27
P59
material shoretage
10
2011/02/09
P52
change for EC
11
2011/02/16
P53
12
2011/03/07
P60
2011/03/07
P57
13
2011/03/25
P60
14
2011/03/30
P60
15
2011/03/30
P52
change PR153 from 15m ohm to 10m ohm for Inrush concern
16
2011/03/30
P59
17
2011/03/30
18
2011/04/06
P52
19
2011/04/08
P58
change PC101/102/105/106/111/112/118/121/122/123/130/137/139/142
part number from SE142106K80 to SE142106M80
Remove JDCIN1 pin.7 and pin.8 from GND
Layout modification
20
2011/04/08
P60
Issued Date
Security Classification
2010/10/1
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Power PIR
Size
Document Number
Rev
0.1
Sheet
62
of
64
Security Classification
2010/10/1
Issued Date
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
HW-PIR
Size
Document Number
Rev
0.1
Sheet
1
63
of
64
B+
Adapter
NPC6151(95W/UMA)
NPC6131(65W/DIS)
19V
B+
TPS51212
0.975V
35.32A
0.885V
112A
+CPU_CORE
0.95V
35A
+GFX_CORE
+VGA_COREP
B+
TPS51212
1.5V
10.24A
+1.5VP
B+
19V
1.5V
1.5V
B+
B+
B+
TPS51212
TPS51212
(Maho Bay)
RT8205L
1.05V
17.3A
+1.05VS_VCCIOP
1.05V
7.3A
1.2V
0.558A
APL5930
APL5336
0.75V
2A
1.05V
APL5610
+1.2VUSB
+0.75VP
0.925V
8.8A
+VCCSAP
+1.05VS_VSP
(Maho Bay)
3.3V
5.71A
+3VALWP
5V
7.37A
+5VALWP
3.3V
APL5930
1.8V
1.26A
+1.8VSP
B+
B+
TPS54331
12V
2.66A
+12VALWP
Converter
Issued Date
Security Classification
2010/10/28
Deciphered Date
2011/11/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Power Rail
Size
D ate:
Document Number
R ev
0.1
Sheet
64
of
64