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Monday,December8,2014

PreviousGATEQuestionsonShiftRegisterswith
Solutions(1987TillDate)

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1992
4.Theinitialcontentsofthe4bitserialinserialout,rightshift,shiftregister
showninfigure,are0110.Afterthreeclockpulsesareapplied,thecontentsofthe
shiftregisterwillbe

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a.0000
b.0101
c.1010
d.1111

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Solution:https://www.youtube.com/watch?v=0VtDZLpnhOM

1996
Adsense

2.Apulsetraincanbedelayedbyafinitenumberofclockperiodsusinga
a.SerialInSerialOutshiftregister
b.SerialInParallelOutshiftregister
c.ParallelInserialOutshiftregister
d.ParallelInparallelOutshiftregister
Solution:

11.A4bitshiftregister,whichshifts1bittotherightateveryclockpulse,is
initializedtovalues1000for(Q0Q1Q2Q3).TheDinputisderivedfromQ0,Q2and
Q3throughtwoXORgatesasshowninfigure.

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2015(34)
2014(143)

a.Writethe4bitvalues(Q0Q1Q2Q3)aftereachclockpulsetillthepattern
(1000)reappearson(Q0Q1Q2Q3).

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1/14/2016

GATEPaper.in:PreviousGATEQuestionsonShiftRegisterswithSolutions(1987TillDate)

December(14)
GATEStudyMaterialsforECE,EIE,CSE,CSIT
andE...
PreviousGATEQuestionsonShiftRegisters
withSo...

b.Towhatvaluesshouldtheshiftregisterbeinitializedsothatthepattern
(1001)occursafterthefirstclockpulse?
Solution:https://www.youtube.com/watch?v=wZTa4Udk0

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Amplifiers...
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Amplifiers...
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(198...
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(198...
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&Mi...

1997
15.CircuitshowninthefigureisanNMOSshiftregister.AlltransistorsareNMOS
enhancementtypewiththresholdvoltageVT=1volt.SupplyusedisVDD=5volts.

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Amplifiers(...
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Amplf...
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(1987...
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Analys...
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Frequency&Hi...
November(12)
October(20)
September(7)
August(8)
July(5)

Twononoverlappingclocks1and2areasshowninthefigureisandhavelarge
pulsewidths.
AllcapacitorsareinitiallydischargedandtheVin=0voltsisapplied.Ifvaluesof
capacitorsareC1=2pFandC2=1pF.FindoutvoltageVC2oncapacitorC2after
2goeslow.NeglectbodyeffectonVTinyourevaluation.
Solution:https://www.youtube.com/watch?v=fa7OqcOcap0

June(6)
May(20)
April(27)
March(24)

2004
4.ChoosethecorrectonefromamongthealternativesA,B,C,Daftermatchingan
itemfromGroup1withthemostappropriateiteminGroup2.
Group1
Group2
P:ShiftRegister
1:Frequencydivision
Q:Counter
2:Addressinginmemorychips
R:Decoder
3:SerialtoParalleldataconversion
a.P3,Q2,R1
b.P3,Q1,R2
c.P2,Q1,R3
d.P1,Q2,R2
Solution:https://www.youtube.com/watch?v=2d9lEnp3x8

2006
4.Forthecircuitshown,two4bitparallelinserialoutshiftregistersloadedwith
thedatashownareusedtofedthedatatoafulladder.Initially,alltheflipflopsare
inclearstate.Afterapplyingtwoclockpulses,theoutputssumandcarryofthefull
addershouldberespectively.

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1/14/2016

GATEPaper.in:PreviousGATEQuestionsonShiftRegisterswithSolutions(1987TillDate)

a.0,0
b.0,1
c.1,0
d.1,1
Solution:https://www.youtube.com/watch?v=8xaQJ8NM_p4

PostedbyGATEpaperat15:14

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