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ABasicAnalysisofInterwireCapacitanceinUltraMicronTechnologies
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ABSTRACT
Asthetechnologynodedecreases,meetinginterwireorcoupling
capacitancebecomesextremelycriticalandchallenginginSOCdesign.
Shrinkingtechnologynodeleadstoincreaseindielectricvalues,thus
leadingtohighercapacitanceandhenceanincreaseininaccuraciesand
power.Inthispaper,weproposeeffectivewaystoreduceinterconnect
capacitanceinultramicrontechnologies.
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INTRODUCTION
Asthetechnologynodedecreases,thechallengesforthelayoutdesigner
alsoincrease.Shrinkingtechnologynodeleadstoanincreaseindielectric
values,whichleadstoanincreaseincapacitance.Transistorscanbe
scaleddowninsizesuchthatthedevicedelaydecreasesindirect
proportiontothedevicedimensions.Butthecaseisnotthesamewith
interconnects.Forsubmicrongeometrychips,itistheinterconnectdelays,
ratherthanthedevicedelaysthatdeterminechipperformance.Ifthe
interconnectsarescaleddown,itresultsinRCdelaysthatbeginto
dominatethechipperformance.
Inthisarticlewediscussthedifferenttypesofcapacitancesencounteredin
ultramicrontechnologybetweeninterconnects.Wealsodescribeindetail
theshieldingofanalogrouteswiththeeffectofcapacitanceandafew
waystoreducethecapacitance.Wealsoprovideanideaconcerningmetal
layerusagetopologyinaccordancebasedonneedandtheapplication.
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FIG1.ParallelPlateCapacitor
Insubmicrontechnologies(greaterthan90nm),onlyareacapacitanceis
takenintocalculationandweignorecouplingandfringecapacitance,butin
deepsubmicrontechnologies(lessthan65nm)2D3Dfringe,couplingand
areacapacitanceisalsoincluded.
WHYCAPACITANCEINCREASESWITHDECREASINGTECHNOLOGY
NODE
SiO2hasbeenthepreferredgateinsulatorforsiliconMOSFETsincethe
1960s.Overtheyears,theoxidethicknesshasbeenreducedfrom300nm
for10mtechnologyto1.2nmfor65nmtechnology.
Therearetworeasonsfortherelentlessdrivetoreducetheoxide
thickness.
1.Athinneroxide,i.e.alargerCoxraisesIon.AlargeIonisdesirable
Methodologytolowersupplyvoltageof
standardcelllibraries
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4.
MixedSignalIPDesignChallengesin
28nmandBeyond
5.
UsingSystemVerilogAssertionsinRTL
Code
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ABasicAnalysisofInterwireCapacitanceinUltraMicronTechnologies
formaximizingthecircuitspeed.
2.TocontrolVtrolloff(andthereforethesubthresholdleakage)
Code
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FIG2.DecreasingTrendinOxideThicknesswithDecreasingTechnology
EFFECTSOFINCREASINGCAPACITANCE
1.INCREASEINPOWERIncreaseincapacitanceleadstoincreasein
RC,andhenceincreaseinchippower.
2.INCREASEDCROSSTALKBETWEENANALOGSIGNALSAsthe
capacitanceofagivensignalshootsitsrequiredspecifications,its
accuracyalsoincreases.
3.DIEAREAIMPACTInordertomeetcapacitancespecifications,the
signalsneedtobespacedasfaraspossible.Thisrequirementcan
leadtoanincreaseindiearea.
TYPESOFCAPACITANCEFORMEDBETWEENINTERCONNECTS
1.SELFCAPACITANCE(MetaltoSubstratecapacitance)
Thesimpleststructureexaminedhereisanisolatedmetallineoverthe
siliconsubstrate.Thecapacitanceformedbetweenthesubstrateandany
metallayeraboveiscalledselforareacapacitance.Thusthiscapacitance
isalwaysformed.Thevalueofthiscapacitanceisdependentontwo
factors,lengthandmetallayerused.Metaloxidesiliconcapacitancehas
slightlydifferentcharacteristicsthanmetaloxidemetal.Smallchangesin
capacitancecanresultduetoinversioninthefieldregionsorother
substrateeffects.Thisisaninherentadvantageofmeasurementinthe
caseofmetaltosubstratecapacitances.
2.MutualCouplingCapacitance(INTERWIRECAPACITANCES)
Capacitancebetweenmetallinesofthesamelayerisreferredtoasinter
wireorcouplingcapacitance.Thisisamajorproblemindeepsubmicron
technologiesduetotighterpitchandhighermetalaspectratios.An
undesiredvoltagespikeresultingfromthiscapacitivecouplingis
commonlyreferredtoascrosstalk.Thepresenceofanothernearbyline
willincreasethetotalcapacitanceoftheisolatedline.Thisadded
capacitancemustbetakenintoaccountwhenroutingglobalsignalssuchas
clocks,determiningdriversizesandlinewidths/spacingetc.
3.FringeCapacitance
Fringecapacitanceisformedbetweennonoverlappingsidewallofone
conductorandsurface/sidewallofasecondconductoronthesameor
differentlayerfromthefirstone.Thistypeofcapacitancebecomes
significantaswerouteinhigherlayersbecausehigherlayersarethicker.
Forhighermetallayers,interwireeffectsaremorepronounceddueto
increasedmetalheightsandlessenedsubstrateeffects.Sincemostsignals
areroutedonlowerlevels,crosstalkislesscriticalinhigherlayers
normallycarryingpowerandground.Butsometimeswhileroutinganalog
nets,signalshavingspecialrequirements(likelessresistance,crosstalk)
needtoberoutedinhighermetallayers.Themethodusedtoshieldthe
specialsignalroutesistocovertheupperandlowerareaofthesignal
routebyothergroundedmetalplanes.Although,thisaffectscoupling
capacitance,ithelpsinreducinganycrosstalkwithanyothersignalroute.
Thegroundedmetalplaneattractsallthedisturbancesintheformof
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ABasicAnalysisofInterwireCapacitanceinUltraMicronTechnologies
electricfieldswhichcouldhavehamperedtheoriginalsignaloriginally.
Thisisatradeoffbetweentotalcapacitanceandnoiseimputation.
FIG3.TypesOfInterconnectCapacitances
WAYSOFSHIELDINGINTERCONNECTS
Themethodologyusedpresentlyforshieldingisthatshieldwiresaretied
staticallytoVddorground.Inthisarticle,weexplaintheconceptof
couplingcapacitanceintermsofaggressorandvictim.Manycasesare
explainedherewhichwillhelpindeeplyanalyzingthechangein
capacitanceasthesetupischanged.Eachtypeofsetupdescribedbelow
hasitsownbenefitsintermofreductionofcrosstalkandcoupling
capacitance,butatthesametimeitcanseriouslyaffectmetalavailability
forrouting.
SETUP1:Whenthereisonlyonenetdrawninlayern
Ascanbeseenfromthefigure,thesignalrouteisinthedesigninlayern.
Thecapacitancevalueobtainedforthisrouteisbecauseoftheselfarea
capacitance(metaltosubstratecapacitance).Thereisnootherroutein
anyothermetallayersothereisnocouplingandnofringecapacitance
present.Asstatedearlier,eliminatingthistypeofcapacitanceisdifficult.
Thissetupismostpronetonoiseandcrosstalk,sosensitivesignalsare
alwaysshielded.
Ctotal=Cself
SETUP2:Whenlateralshieldingisperformedinthedesign
Asseenfromthefigure,thereisasensitiverouteinlayernwhichis
shieldedfrombothsidesinthesamemetallayern.Inthistypeofsetup,
selfareacapacitance,fringeandcouplingcapacitancecomeintoaction.
Theselfareacapacitanceisduetotheformationofcapacitancebetween
therouteandsubstrate.Thecouplingcapacitanceisduetotheshields
placedinthesamemetallayern.Distanceisindirectlyproportionaltothe
capacitance,soasthedistancebetweensignalandshieldwiresincreases,
couplingcapacitancedecreases.However,thisphenomenonvanishesafter
afixeddistancebetweenthesensitiveroutesandshields,thusthereisno
furtherdecreaseinthecouplingcapacitanceevenafterincreasingthe
spacingbetweenshieldlineandsignalwire.Inthissetupthesusceptible
netisshieldedinthesamemetalonboththesideseliminatinganynoise
fromtheadjacentsignaltogglinginthesamemetallayer.Thisisshownin
thegraphbelow.
Ctotal=Cself+Ccoupling(sidemetal)+Cfringe(sidemetal)
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ABasicAnalysisofInterwireCapacitanceinUltraMicronTechnologies
FIG4.Axial/LateralShielding
SETUP3:Whentubshieldingisperformedinthedesign
Inthissetup,thesensitiverouteisshieldedfromthesidesaswellasfrom
thebottom,whicheliminatesanynoisefromthesidesandbottomlayer.In
thefigure,thesensitiverouteinlayernisshieldedfromboththesidesin
thesamemetalinlayernaswellasfromtheadjacentlowerlayern1.
Alltypesofcapacitanceexistinthissetup.Thecapacitancevalueismore
thanthatforsetup2becausethecouplingandfringecapacitancefromthe
layerbelowisalsoaddedtothecalculation.Inthissetup,wedetermined
byexperimentthattheeffectofcouplingissignificantuptotwolayers
beloworabovethesensitivemetallayer.
CCtotal=Cself+Coupling(sidemetal)+Cfringe(sidemetal)+
Coupling(lowermetal)+Cfringe(lowermetal)
FIG5.TubShielding
SETUP4:Whencoaxialshieldingisperformedinthedesign
Inthis,sensitivesignalisroutedliketubshieldingsetupinadditiontoan
adjacentlayeraboveitlayern+1.Thissetuphelpsincompletelyisolating
thesensitiveroutefromanynoiseorcrosstalk.
Butasmorelayersareusedforshielding,therecanbeaproblemof
routingresourceavailability.
Figurebelowshowsthissetup.
SETUP5:Whentubshieldingisperformedonlyontheshields
Thereisanothercasewherebesidesaxialshieldingbeingperformedin
layern,theshieldwiresarecoveredonlywithlayern1atthebottom.In
thiscasethesignalrouteisnottubshielded.Thus,theareacapacitance
nullifiedbetweensignalinlayernandshieldbelowinlayern1.Buta
seriousdisadvantageofthismethodisthatthesignalremainsexposedat
thebottomtoanynoisysignalinlayern1.
Thetablebelowshowsthevalueoftotalcapacitanceinallthesetups
explainedabove.
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ABasicAnalysisofInterwireCapacitanceinUltraMicronTechnologies
SetupShieldinlayern1ShieldinlayernShieldinLayern+1Total
Capacitance(fF)
Setup
1
2
3
4
5
Shieldinlayer
n1
No
No
Yes
Yes
Yes
Shieldin
layern
No
Yes
Yes
Yes
Yes
ShieldinLayer TotalCapacitance
n+1
(fF)
No
251.5
No
427.3
No
620.2
Yes
887.6
No
514.7
CONCLUSION
Thereisalwayssometradeoffinvolvedinchoosingbetweenshieldingand
meetingcapacitancespecificationsforanalogroutes.Ifwetrytoshieldthe
signalwell,weendupincreasingcapacitanceandalsoeatuprouting
resources.Ifwestartincreasingspacingbetweensignalsinorderto
improvecapacitance,wemightblowupthediesize.Thedesignerthushas
toweighallsituationsandcombinationsbeforemakingadecision.
REFERENCES
1.http://wwwinst.eecs.berkeley.edu/
2.
http://www.eecs.berkeley.edu/~hu/PUBLICATIONS/Hu_papers/Hu_Melvyl/Hu_Melvyl_97_03.pdf
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