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  • DDR VS DDR2

    Transféré par

    Baskaran Ds
    15 vues1 page
    DDR2 Advantage Enables better electrical performance and speed reduces memory system power demand High-density components enable large memory subsystems 1GB and higher DDR2 devices will have 8 banks for better performance Provides reduced core speed dependency for better yields Mainly used in server applications to improve command bus efficiency improves command bus efficiency ODT for both memory and controller improves signaling and reduces system cost improves system timing margin by reducing strobe crosstalk.

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    DDR2 Advantage Enables better electrical performance and speed reduces memory system power demand High-density components enable large memory subsystems 1GB and higher DDR2 devices will have 8 banks for better performance Provides reduced core speed dependency for better yields Mainly used in server applications to improve command bus efficiency improves command bus efficiency ODT for both memory and controller improves signaling and reduces system cost improves system timing margin by reducing strobe crosstalk.

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    Attribution Non-Commercial (BY-NC)
    Téléchargez comme DOC, PDF, TXT ou lisez en ligne sur Scribd
    Signaler comme contenu inapproprié
    15 vues1 page

    DDR VS DDR2

    Transféré par

    Baskaran Ds
    DDR2 Advantage Enables better electrical performance and speed reduces memory system power demand High-density components enable large memory subsystems 1GB and higher DDR2 devices will have 8 banks for better performance Provides reduced core speed dependency for better yields Mainly used in server applications to improve command bus efficiency improves command bus efficiency ODT for both memory and controller improves signaling and reduces system cost improves system timing margin by reducing strobe crosstalk.

    Droits d'auteur :

    Attribution Non-Commercial (BY-NC)
    Téléchargez comme DOC, PDF, TXT ou lisez en ligne sur Scribd
    Signaler comme contenu inapproprié
    sur 1

    Feature/Opti

    DDR DDR2 DDR2 Advantage


    on
    Enables better
    Package TSOP (66 pins) FBGA only electrical performance
    and speed
    2.5V 1.8V Reduces memory
    Voltage
    2.5V I/O 1.8V I/O system power demand
    High-density
    components enable
    Densities 128MB¨C1GB 256MB¨C2GB
    large memory
    subsystems
    1GB and higher DDR2
    Internal devices will have 8
    4 4 and 8
    Banks banks for better
    performance
    Prefetch Provides reduced core
    (MIN WRITE 2 4 speed dependency for
    Burst) better yields
    200 MHz,
    400 MHz,
    266 MHz,
    Speed (Data 533 MHz, Migration to higher bus
    333 MHz,
    Pin) and speed
    and
    667 MHz
    400 MHz
    Eliminating one-half
    clock settings helps
    READ speed internal DRAM
    CL + AL
    Latency logic and improves
    2, 2.5, 3 CLK CL = 3, 4, 5
    yields
    Additive
    N/A AL options
    Latency Mainly used in server
    0, 1, 2, 3, 4
    (Posted CAS) applications to
    improve command bus
    efficiency
    WRITE Improves command
    1 clock READ latency - 1
    Latency bus efficiency
    DRAM on-die ODT for both memory
    termination (ODT), and controller
    Motherboard parallel
    Termination optional improves signaling and
    to VTT
    onmotherboard reduces
    termination system cost
    Improves system
    Differential or timing margin by
    Data Strobes Single-ended
    single-ended reducing strobe
    crosstalk
    184-pin DIMM 240-pin DIMM
    unbuffered unbuffered
    Improved layout and
    Modules registered registered
    power delivery design
    200-pin SODIMM 200-pin SODIMM
    172-pin MicroDIMM 214-pin MicroDIMM
    Chipset All DTs, NBs, and All DTs, NBs, and All major chipset
    Support servers servers providers

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