Vous êtes sur la page 1sur 12

EXPERIMENT NO.

Aim: To design and simulate transistor as an amplifier.

Circuit diagram:

EXPERIMENT NO.2

Aim : To design and simulate full wave rectifier.

Circuit diagram:
EXPERIMENT NO.3

Aim : To design and simulate diode and transistor realization of AND , OR , NOT
gates.

Circuit diagrams :

AND gate:

OR gate:

NOT gate:
EXPERIMENT NO.4

Aim: To design and simulate integrator and differentiator using IC UA 741.

Circuit diagram:

Differentiator:

Integrator:
EXPERIMENT NO.5

Aim: To design and simulate inverting and non-inverting amplifier using op amp.

Circuit diagram:

Non-Inverting amplifier:

Inverting amplifier:
EXPERIMENT NO .6

Aim: To design and simulate BCD to Excess code converter using gates.
Truth table :

BCD INPUT EXCESS 3 OUTPUT


A B C D Y0 Y1 Y2 Y3
0 0 0 0 0 0 1 1
0 0 0 1 0 1 0 0
0 0 1 0 0 1 0 1
0 0 1 1 0 1 1 0
0 1 0 0 0 1 1 1
0 1 0 1 1 0 0 0
0 1 1 0 1 0 0 1
0 1 1 1 1 0 1 0
1 0 0 0 1 0 1 1
1 0 0 1 1 1 0 0
1 0 1 0 X X X X
1 0 1 1 X X X X
1 1 0 0 X X X X
1 1 0 1 X X X X
1 1 1 0 X X X X
1 1 1 1 X X X X

Boolean Expression:

Y0=A+BC+BD

Y1= (B) XOR (C+D)

Y2= (C) XNOR (D)

Y3= D’
Circuit Diagram:

Aim: To design and simulate BCD to Excess 3 converter using NAND gates.

Circuit diagram:
EXPERIMENT NO.7

Aim: To design and simulate BCD to Excess 3 converter using 8:1 MUX.

Truth table:

A B C D Y0 Y1 Y2 Y3 R0 R1 R2 R3
0 0 0 0 0 0 1 1 0 D D’ D’
0 0 0 1 0 1 0 0
0 0 1 0 0 1 0 1 0 1 D D’
0 0 1 1 0 1 1 0
0 1 0 0 0 1 1 1 D D’ D’ D’
0 1 0 1 1 0 0 0
0 1 1 0 1 0 0 1 1 0 D D’
0 1 1 1 1 0 1 0
1 0 0 0 1 0 1 1 1 D D’ D’
1 0 0 1 1 1 0 0

Circuit diagram:
EXPERIMENT NO.8

Aim: To design and simulate BCD to Gray code converter using 8:1 MUX.
Truth table:

BCD INPUT GRAY CODE OUTPUT MUX OUTPUT


A B C D Y0 Y1 Y2 Y3 F0 F1 F2 F3
0 0 0 0 0 0 0 0 0 0 0 D

0 0 0 1 0 0 0 1

0 0 1 0 0 0 1 1 0 0 1 D’
0 0 1 1 0 0 1 0

0 1 0 0 0 1 1 0 0 1 1 D

0 1 0 1 0 1 1 1

0 1 1 0 0 1 0 1 0 1 0 D’
0 1 1 1 0 1 0 0

1 0 0 0 1 1 0 0 1 1 0 D

1 0 0 1 1 1 0 1
1 0 1 0 1 1 1 1 1 1 1 D’

1 0 1 1 1 1 1 0

1 1 0 0 1 0 1 0 1 0 1 D
1 1 0 1 1 0 1 1

1 1 1 0 1 0 0 1 1 0 0 D’

1 1 1 1 1 0 0 0
Circuit diagram:

EXPERIMENT NO.9
Aim: to design and simulate Gray code to BCD converter using 4:1 MUX.
Truth table:

A B C D Y0 Y1 Y2 Y3 F0 F1 F2 F3

0 0 0 0 0 0 0 0 0 0 C C’D+CD’

0 0 0 1 0 0 0 1

0 0 1 1 0 0 1 0

0 0 1 0 0 0 1 1

0 1 1 0 0 1 0 0 0 1 C’ C’D’+CD

0 1 1 1 0 1 0 1

0 1 0 1 0 1 1 0

0 1 0 0 0 1 1 1

1 1 0 0 1 0 0 0 1 0 C C’D+CD’

1 1 0 1 1 0 0 1

1 1 1 1 1 0 1 0

1 1 1 0 1 0 1 1

1 0 1 0 1 1 0 0 1 1 C’ C’D’+CD

1 0 1 1 1 1 0 1

1 0 0 1 1 1 1 0

1 0 0 0 1 1 1 1

Circuit diagram:
EXPERIMENT NO.10

Aim: To design and simulate a square wave generator using 7414 IC.
Circuit diagram:

Vous aimerez peut-être aussi