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Lecture # 23

DMA Cascading

DMA Programming Model

Base Register
Count Register
Higher Address Nibble/Byte is placed in Latch B.
Internal Registers

Register Number Width


Starting Addre ss 4 16
Counter 4 16
Current Addre ss 4 16
Current Counter 4 16
Temporary Addre ss 1 16
Temporary Counter 1 16
Status 1 8
Command 1 8
Intermediate Memory 1 8
Mode 4 8
Mask 1 8
Request 1 8
DMA Modes
DMA Status Register

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