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A

D45/D46 Block Diagram


4

CLK GEN.
ICS9LPRS365YGLFT-GP
3

Mobile CPU
Penryn
4, 5

Project code: 91.4J001.001--D45 91.4K001.001--D46 PCB P/N : 07248 REVISION : SA


20

SYSTEM DC/DC
TPS51125
INPUTS
DCBATOUT 3D3V_S5(5A)

34 OUTPUTS

5V_S5(5A)

G7921
PCB STACKUP
TOP

SYSTEM DC/DC
TPS51124
INPUTS
DCBATOUT 1D8V_S3(10A)

36

RTM875T-606-VD-GRT

OUTPUTS
1D05V_M(11A)

HOST BUS

667/800/1066MHz@1.05V
LVDS

VCC S

RT9026
1D8V_S3

35
DDR_VREF_S0 (1.5A) DDR_VREF_S3

DDR2 socket
12,13

800/667MHz

Cantiga AGTL+ CPU I/F


DDR Memory I/F INTEGRATED GRAHPICS LVDS, CRT I/F 71.CNTIG.00U

ATI
PCI-EG M82M VRAMx4 256MB
41~47
RGB CRT S-Video

WXGA/SXGA+ 15"LCD 14 CRT 13

S GND BOTTOM

DDR2 socket
3
12,13

Headphone Out

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800/667MHz
3D3V_S0 2D5V_S0 (300mA)

G9131

35

6,7,8,9,10,11

X4 DMI 400MHz

S-Video 13

C-Link0

APL5912

35

1D8V_S3

1D5V_S0

Codec

AZALIA

ALC269

ICH9M
6 PCIe ports ACPI 1.1 4 SATA 12 USB PCI/PCI BRIDGE

NB DC/DC
INPUTS

29

PCI-E/USB 2.0 New card

G577

MIC In
29

25

25

ISL6263A

37

OUTPUTS GFX_CORE

PCI-E

USB Cardreader
JMICRO380

INT.MIC
29

26

MS/MS Pro/ MMC/SD


4 in 1

DCBATOUT

26

1394
High Definition Audio

CHARGER
BQ24745 INPUTS 24
DCBATOUT

38

PCI-E

INT.SPKR

LPC I/F Serial Peripheral I/F

LAN
TRL8111C

23

TXFM24 Mini Card


Kedron a/b/g/n

RJ45

OUTPUTS CHG_PWR
18V 5V 4.0A 100mA

PCI-E /USB 2.0 PCI-E /USB 2.0

25 25

UP+5V

Mini Card
UMTS(3G)

RJ11

MODEM MDC Card


22

71.ICH9M.00U

16,17,18,19

LPC BUS

CPU DC/DC
ISL6266A 33

SATA

USB0

USB

SATA

SATA

BlueTooth

22

Winbond
WPC773 28

KBC

SPI I/F

BIOS
4M byte 28

LPC
DEBUG CONN. 27
<Core Design>

INPUTS
DCBATOUT

OUTPUTS VCC_CORE_S0
0~1.3V 47A

HDD

21

CDROM
21

eSATA /USB 22

USB 3 Port22

CAMERA
14

Touch Pad 27

INT. KB 27

Title Size A3

Document Number

Date: Friday, March 14, 2008

Digitally signed by dd 1 Wistron Corporation DN: cn=dd, o=dd, ou=dd, email=dddd@yahoo. BLOCK DIAGRAM com, c=US PD Date: 2009.12.04 D45/D46 19:36:51 +07'00' E
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Rev 47 Sheet 1 of

B
page 92

ICH9M Functional Strap Definitions Rev.1.5 ICH9 EDS 642879


Signal HDA_SDOUT Usage/When Sampled Comment

ICH9M Integrated Pull-up and Pull-down Resistors


ICH9 EDS 642879

Cantiga chipset and ICH9M I/O controller Hub strapping configuration


Rev.1.5
Pin Name CFG[2:0]

Montevina Platform Design guide 22339


page 218 Strap Description FSB Frequency Select Configuration 000 = FSB1067 011 = FSB667 010 = FSB800 others = Reserved

0.5

Allows entrance to XOR Chain testing when TP3 XOR Chain Entrance/ PCIE Port Config1 bit1, pulled low.When TP3 not pulled low at rising edge of PWROK,sets bit1 of RPC.PC(Config Registers: Rising Edge of PWROK offset 224h). This signal has weak internal pull-down PCIE config1 bit0, Rising Edge of PWROK. PCIE config2 bit2, Rising Edge of PWROK. Reserved This signal has a weak internal pull-down. Sets bit0 of RPC.PC(Config Registers:Offset 224h) This signal has a weak internal pull-up. Sets bit2 of RPC.PC2(Config Registers:Offset 0224h) This signal should not be pulled high.

SIGNAL
CL_CLK[1:0] CL_DATA[1:0] CL_RST0# DPRSLPVR/GPIO16 ENERGY_DETECT HDA_BIT_CLK HDA_DOCK_EN#/GPIO33 HDA_RST# HDA_SDIN[3:0] HDA_SDOUT HDA_SYNC GLAN_DOCK# GPIO[20]
GNT[3:0]#/GPIO[55,53,51]

Resistor Type/Value
PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-DOWN 20K PULL-DOWN 20K PULL-DOWN 20K

HDA_SYNC GNT2#/ GPIO53 GPIO20 GNT1#/ GPIO51

CFG[4:3] CFG8 CFG[15:14] CFG[18:17] CFG5 CFG6

Reserved

DMI x2 Select iTPM Host Interface Intel Management engine Crypto strap

ESI Strap (Server Only) ESI compatible mode is for server platforms only. This signal should not be pulled low for desttop Rising Edge of PWROK and mobile. Top-Block Swap Override. Rising Edge of PWROK. Sampled low:Top-Block Swap mode(inverts A16 for all cycles targeting FWH BIOS space). Note: Software will not be able to clear the Top-Swap bit until the system is rebooted without GNT3# being pulled down. Controllable via Boot BIOS Destination bit (Config Registers:Offset 3410h:bit 11:10). GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC. Sample low: the Integrated TPM will be disabled. Sample high: the MCH TPM enable strap is sampled low and the TPM Disable bit is clear, the Integrated TPM will be enable.

0 = DMI x2 1 = DMI x4 (Default) 0= The iTPM Host Interface is enabled(Note2) 1=The iTPM Host Interface is disalbed(default) 0 = Transport Layer Security (TLS) cipher suite with no confidentiality 1 = TLS cipher suite with confidentiality (default) 0 = Reverse Lanes,15->0,14->1 ect.. 1= Normal operation(Default):Lane Numbered in order 0 = Enable (Note 3) 1= Disabled (default) 00 10 01 11 = = = =

CFG7

GNT3#/ GPIO55

The pull-up or pull-down active when configured for native CFG9 GLAN_DOCK# functionality and determined by LAN controller

PCIE Graphics Lane

GNT0#: SPI_CS1#/ GPIO58 SPI_MOSI

Boot BIOS Destination Selection 0:1. Rising Edge of PWROK. Integrated TPM Enable, Rising Edge of CLPWROK

PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 15K PULL-UP 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-UP 20K PULL-DOWN 15K
L_DDC_DATA Local Flat Panel (LFP) Present SDVO_CTRLDATA SDVO Present CFG10 PCIE Loopback enable XOR/ALL

3
GPIO49

DMI Termination Voltage, The signal is required to be low for desktop Rising Edge of PWROK. applications and required to be high for mobile applications. PCI Express Lane Reversal. Rising Edge of PWROK. No Reboot. Rising Edge of PWROK.

SATALED# SPKR

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GPIO[49]
CFG[13:12]

LDA[3:0]#/FHW[3:0]# LAN_RXD[2:0] LDRQ[0] PME#

Reserve XOR mode Enabled ALLZ mode Enabled (Note 3) Disabled (default)

CFG16

FSB Dynamic ODT

0 = Dynamic ODT Disabled 1 = Dynamic ODT Enabled (Default)

LDRQ[1]/GPIO23 PWRBTN#

CFG19

DMI Lane Reversal

0 = Normal operation(Default): Lane Numbered in Order

Signal has weak internal pull-up. Sets bit 27 of MPC.LR(Device 28:Function 0:Offset D8)

SATALED# SPI_MOSI SPI_MISO SPKR

1 = Reverse Lanes DMI x4 mode[MCH -> ICH]:(3->0,2->1,1->2and0->3) DMI x2 mode[MCH -> ICH]:(3->0,2->1) 0 = Only Digital Display Port or PCIE is operational (Default) 1 =Digital display Port and PCIe are operting simulataneously via the PEG port 0 =No SDVO Card Present (Default) 1 = SDVO Card Present 0 = LFP Disabled (Default) 1= LFP Card Present; PCIE disabled

If sampled high, the system is strapped to the "No Reboot" mode(ICH9 will disable the TCO Timer system reboot feature). The status is readable via the NO REBOOT bit. This signal should not be pull low unless using XOR Chain testing.

SPI_CS1#/GPIO58/CLGPIO6

PULL-DOWN 20K

CFG20

Digital Display Port (SDVO/DP/iHDMI) Concurrent with PCIe

TP3

XOR Chain Entrance. Rising Edge of PWROK.

TACH_[3:0]
GPIO33/ HDA_DOCK _EN# Sampled low:the Flash Descriptor Security will be Flash Descriptor Security Override Strap overridden. If high,the security measures will be in effect.This should only be enabled in manufacturing Rising Edge of PWROK environments using an external pull-up resister.

TP[3] USB[11:0][P,N]

NOTE: 1. All strap signals are sampled with respect to the leading edge of the (G)MCH Power OK (PWROK) signal. 2. iTPM can be disabled by a 'Soft-Strap' option in the Flash-decriptor section of the Firmware. This 'Soft-Strap' is activated only after enabling iTPM via CFG6. Only one of the CFG10/CFG/12/CFG13 straps can be enabled at any time.

SMBus
SMBC_G792

Thermal MXM

KBC
BAT_SCL

PCI Routing
IDSEL TI7412 INT

page 17

USB Table
USB Pair 0 1 2 3 4 Device Combo(ESATA/USB) NC USB2 USB4 USB3 BLUETOOTH WEBCAM FT MINICARD NEW1 ICH9M
SMB_CLK

BATTERY

REQ

GNT 0

G:CARDBUS 0 AD22 B:1394 F:Flash Media G:SD Host

LAN

UMA

PCIE Routing
LANE2 LANE3 MiniCard WLAN NewCard WLAN

5 6 7 8 9

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

SMBC_ICH

CK505
Size Document Number

Reference
Rev

DDR
Date: Friday, March 14, 2008

D45/D46
Sheet 2 of 47

PD

3D3V_S0 3D3V_S0 3D3V_S0 3D3V_CLKGEN_S0 1 1 1 1 1 1 SC4D7U6D3V3KX-GP 2 1 R582 3D3V_48MPWR_S0 2 0R0603-PAD C730 C721 1 SC1U16V3ZY-GP 3D3V_CLKPLL_S0 1 1 1 1 1 1 1 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP EC110 C704 C400 SC4D7U10V5ZY-3GP C702 C724 C718 2 SCD1U16V2ZY-2GP C722 1 R2820R0603-PAD C399 1 2 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP C393 SC4D7U10V5ZY-3GP C719 C723 C703 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP 1 SCD1U16V2ZY-2GP C701 2 R2790R0603-PAD C397 1 2 SCD1U16V2ZY-2GP

DY
2

PD

DY

3D3V_S0 3D3V_CLKGEN_S0 3D3V_48MPWR_S0 2 2 2 2 9 16 61 39 55 3D3V_CLKPLL_S0 PCLKCLK2 PCLKCLK3 PCLKCLK4 PCLKCLK5 7 R284 10KR2J-3-GP CLK_MCH_OE# 2 2 2 2 R283 1 12 20 26 36 45 49 1 3 4 5 6 7

U18 VDDPCI VDD48 VDDPLL3 VDDREF VDDSRC VDDCPU VDD96_IO VDDPLL3_IO VDDSRC_IO VDDSRC_IO VDDSRC_IO VDDCPU_IO PCI0/CR#_A PCI1/CR#_B PCI2/TME PCI3 SDATA SCLK SRCT0/DOTT_96 SRCC0/DOTC_96 27MHZ_NONSS/SRCT1/SE1 27MHZ_SS/SRCC1/SE2 SRCT2/SATAT SRCC2/SATAC SRCT3/CR#_C SRCC3/CR#_D SRCT4 SRCC4 63 64 13 14 17 18 21 22 24 25 27 28 38 37 SMBD_ICH 12,19 SMBC_ICH 12,19 DREFCLK_1 DREFCLK#_1 DREFSSCLK_1 DREFSSCLK#_1 4 3

DY
1

VGA_27M_PH R296 R294


10KR2J-3-GP 1 10KR2J-3-GP 1

DY R292
10KR2J-3-GP 1

UMA
1 RN39 2 SRN0J-6-GP RN40 3 4 SRN0J-6-GP 3 4 3 4 3 4 RN41 SRN0J-6-GP RN42 SRN0J-6-GP RN43 SRN0J-6-GP DREFCLK 7 DREFCLK# 7 DREFSSCLK 7 DREFSSCLK# 7 CLK_PCIE_SATA 16 CLK_PCIE_SATA# 16 CLK_MCH_3GPLL 7 CLK_MCH_3GPLL# 7 CLK_PCIE_MINI1 25 CLK_PCIE_MINI1# 25

2 R286 10KR2J-3-GP

UMA

2 1 2 1 2 1 2 1

CLK_PCIE_SATA_1 CLK_PCIE_SATA_1# CLK_MCH_3GPLL_1 CLK_MCH_3GPLL_1# CLK_PCIE_MINI_12 CLK_PCIE_MINI_12#

DY

475R2F-L1-GP 2

PCLKCLK0 PCLKCLK1 PCLKCLK2 PCLKCLK3 PCLKCLK4 PCLKCLK5

R289 10KR2J-3-GP 1 1

R288 10KR2J-3-GP

DY

R287 10KR2J-3-GP 1

DY

TP127 TP68

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27 28 17 PCLK_FWH PCLK_KBC PCLK_ICH R291 2 R293 2 R295 2 C382 SC27P50V2JN-2-GP 1 2 1

UMA

CL=20pF0.2pF

1 22R2J-2-GP 1 22R2J-2-GP 1 22R2J-2-GP

PCI_STOP# CPU_STOP# SRCT6 SRCC6

PM_STPPCI# 17 PM_STPCPU# 17 1 2 1 2 1 2 1 2 1 2

PCI4/27_SELECT PCI_F5/ITP_EN X2 X1

41 40

CLK_PCIE_ICH_1 CLK_PCIE_ICH_1#

4 3 4 3 4 3 4 3 4 3

RN35 SRN0J-6-GP RN60 SRN0J-6-GP RN34 SRN0J-6-GP RN33 SRN0J-6-GP RN32 SRN0J-6-GP

GEN_XTAL_IN

R268 2 1 17 4,7 4,7 4,7

1 DYR26710MR2J-L-GP 2 0R0402-PAD

GEN_XTAL_OUT

59 60 10 57 62 8 11 15 19 23 42 52 58 29

SRCT7/CR#_F SRCC7/CR#_E

44 43

CLK_PCIE_CARD_R CLK_PCIE_CARD#_R

SB

CLK_PCIE_ICH 17 CLK_PCIE_ICH# 17

CLK_PCIE_CARD 26 CLK_PCIE_CARD# 26 CLK_PCIE_MINI2 25 CLK_PCIE_MINI2# 25 CLK_MCH_BCLK 6 CLK_MCH_BCLK# 6 CLK_CPU_BCLK 4 CLK_CPU_BCLK# 4

C381 1 2

X4 X-14D31818M-35GP

GEN_XTAL_OUT_R

CLK48_ICH CPU_SEL0 CPU_SEL1 CPU_SEL2

R298 2 2 R273 2 R274 2

1 33R2J-2-GP CLK48 R299 1 2K2R2J-2-GP

USB_48MHZ/FSLA

CPUT2_ITP/SRCT8 CPUC2_ITP/SRCC8 CPUT1_F CPUC1_F CPUT0 CPUC0

47 46

CLK_CPU_XDP_R CLK_CPU_XDP#_R

FSLB/TEST_MODE

SC27P50V2JN-2-GP

17

CLK_ICH14

1 10KR2J-3-GP 1 33R2J-2-GP

CPU_SEL2_R

51 50 54 53 56 48

CLK_MCH_BCLK_1 CLK_MCH_BCLK_1# CLK_CPU_BCLK_1 CLK_CPU_BCLK_1#

REF0/FSLC/TEST_SEL GNDPCI GND48 GND GND GNDSRC GNDSRC GNDCPU GNDREF GNDSRC

CK_PWRGD/PD# NC#48 SRCT9 SRCC9 SRCC11/CR#_G SRCT11/CR#_H

CLK_PWRGD 17 1

3D3V_S0

PCLK_FWH PCLK_KBC PCLK_ICH CLK48_ICH CLK_ICH14 1 1 1 1 EC51 EC52 EC53 EC54 EC49 1

DY

30 31 32 33 34 35

CLK_PCIE_NEW_R CLK_PCIE_NEW#_R CLK_PCIE_LAN_R CLK_PCIE_LAN#_R CLK_PCIE_PEG_1 CLK_PCIE_PEG_1#

R270 2 10KR2J-3-GP 2 1 2 1 2 1

RN44 3 4 SRN0J-6-GP RN38 3 4 SRN0J-6-GP

CLK_PCIE_NEW 25 CLK_PCIE_NEW# 25 CLK_PCIE_LAN 23 CLK_PCIE_LAN# 23 CLK_PCIE_PEG 41 CLK_PCIE_PEG# 41

SC15P50V2JN-2-GP 2

SC15P50V2JN-2-GP 2

SC15P50V2JN-2-GP 2

SC15P50V2JN-2-GP 2

SC15P50V2JN-2-GP 2

PD
CLK_PCIE_MINI2 CLK_PCIE_MINI2# ICS9LPRS365YGLFT-GP 71.09365.00W 1 1

SRCT10 SRCC10

VGA

RN36 3 4 SRN0J-6-GP

VGA_27M
R581 DREFSSCLK_1 1 2 33R2J-2-GP VGA_XIN1 VGA_XIN1 42

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

ICS9LPRS365YGLFT setting table PIN NAME DESCRIPTION PCI0/CR#_A


Byte 5, bit 7 0 = PCI0 enabled (default) 1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair Byte 5, bit 6 0 = CR#_A controls SRC0 pair (default), 1= CR#_A controls SRC2 pair Byte 5, bit 5 0 = PCI1 enabled (default) 1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair Byte 5, bit 4 0 = CR#_B controls SRC1 pair (default) 1= CR#_B controls SRC4 pair 0 = Overclocking of CPU and SRC Allowed 1 = Overclocking of CPU and SRC NOT allowed

DY
2

C372 DY 2

C375

SB
DREFSSCLK#_1

VGA_27MSS
R580 1 2 33R2J-2-GP OSC_SPREAD OSC_SPREAD 42

PD

PIN NAME SRCC3/CR#_D SRCC7/CR#_E

DESCRIPTION
Byte 5, bit 1 0 = SRC3 enabled (default) 1= CR#_D enabled. Byte 5, bit 0 controls whether CR#_D controls SRC1 or SRC4 pair Byte 5, bit 0 0 = CR#_D controls SRC1 pair (default) 1= CR#_D controls SRC4 pair Byte 6, bit 7 0 = SRC7# enabled (default) 1= CR#_F controls SRC6 Byte 6, bit 6 0 = SRC7 enabled (default) 1= CR#_F controls SRC8 Byte 6, bit 5 0 = SRC11# enabled (default) 1= CR#_G controls SRC9 Title Byte 6, bit 4 0 = SRC11 enabled (default) 1= CR#_H controls SRC10

SEL2 SEL1 SEL0 FSC FSB FSA 1 0 0 0 0


UMA

CPU
100M 133M 166M 200M 266M

FSB
X 533M 667M 800M 1067M
1

PCI1/CR#_B PCI2/TME PCI3


1

0 0 1 1 0

1 1 1 0 0

PCI4/27M_SEL PCI_F5/ITP_EN SRCT3/CR#_C

0 = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96# 1 = Pin17 as 27MHz, Pin 18 as 27MHz_SS, Pin13 as SRC-0, Pin14 as SRC-0# 0 =SRC8/SRC8# 1 = ITP/ITP# Byte 5, bit 3 0 = SRC3 enabled (default) 1= CR#_C enabled. Byte 5, bit 2 controls whether CR#_C controls SRC0 or SRC2 pair Byte 5, bit 2 0 = CR#_C controls SRC0 pair (default), 1= CR#_C controls SRC2 pair

SRCT7/CR#_F SRCC11/CR#_G SRCT11/CR#_H

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Clock Generator
Document Number Rev

Size

D45/D46
Date: Tuesday, March 18, 2008
A B C D

PD
3 of 47

Sheet
E

H_A#[35..3]

H_A#[35..3] H_DINV#[3..0] U35A 1 OF 4 H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 J4 L5 L4 K5 M3 N2 J1 N3 P5 P2 L2 P4 P1 R1 M1 K3 H2 K2 J3 L1 Y2 U5 R3 W6 U4 Y5 U1 R4 T5 T3 W2 W5 Y4 U2 V4 W3 AA4 AB2 AA3 V1 A6 A5 C4 A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# ADSTB0# REQ0# REQ1# REQ2# REQ3# REQ4# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# A32# A33# A34# A35# ADSTB1# A20M# FERR# IGNNE# ADS# BNR# BPRI# H1 E2 G5 H5 F21 E1 F1 D20 B3 H4 C1 F3 F4 G3 G2 G6 E4 AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20 XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3 XDP_BPM#4 XDP_BPM#5 XDP_TCK XDP_TDI XDP_TDO XDP_TMS XDP_TRST# XDP_DBRESET# H_RS#0 H_RS#1 H_RS#2 H_TRDY# 6 H_HIT# H_HITM# TP3 TP2 TP4 TP7 TP6 TP5 TP8 TP12 TP11 TP9 TP10 TP26 6 6 H_THERMDC 2 TP20 H_ADS# H_BNR# H_BPRI# 6 6 6 1D05V_S0 H_DSTBN#[3..0] H_DSTBP#[3..0] H_D#[63..0] 1 H_DINV#[3..0] H_DSTBN#[3..0] H_DSTBP#[3..0] H_D#[63..0] 6
4

6 6 6

ADDR GROUP 0

CONTROL

DEFER# DRDY# DBSY# BR0# IERR# INIT# LOCK# RESET# RS0# RS1# RS2# TRDY# HIT# HITM#

H_DEFER# 6 H_DRDY# 6 H_DBSY# 6 H_BREQ#0 6 H_IERR# H_INIT# 16,27 2

R93 56R2J-4-GP

Place testpoint on H_IERR# with a GND 0.1" away

TP25

6 6

H_ADSTB#0 H_REQ#[4..0]

H_LOCK# 6 H_CPURST# 6 H_RS#[2..0] 6 H_THERMDA 1 C113 SC2200P50V2KX-2GP H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 E22 F24 E26 G22 F23 G25 E25 E23 K24 G24 J24 J23 H22 F26 K22 H23 J26 H26 H25

U35B 2 OF 4 D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# DSTBN0# DSTBP0# DINV0# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# DSTBN1# DSTBP1# DINV1# GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 BSEL0 BSEL1 BSEL2 D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# DSTBN2# DSTBP2# DINV2# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63# DSTBN3# DSTBP3# DINV3# COMP0 COMP1 COMP2 COMP3 DPRSTP# DPSLP# DPWR# PWRGOOD SLP# PSI# Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

DY

6 16 16 16 16

H_A20M# H_FERR# H_IGNNE# H_INTR H_NMI H_SMI#

THERMTRIP#

C7

R98 1 0R0402-PAD

PM_THRMTRIP-A# 7,16

H_STPCLK# 16 16 16

R95 1 H_STPCLK#_R D5 0R2J-2-GP C6 B4 A3 RSVD_CPU_1 RSVD_CPU_2 RSVD_CPU_3 RSVD_CPU_4 RSVD_CPU_5 RSVD_CPU_6 RSVD_CPU_7 RSVD_CPU_8 RSVD_CPU_9 RSVD_CPU_10 RSVD_CPU_11 M4 N5 T2 V3 B2 C3 D2 D22 D3 F6 B1

STPCLK# LINT0 LINT1 SMI# RSVD#M4 RSVD#N5 RSVD#T2 RSVD#V3 RSVD#B2 RSVD#C3 RSVD#D2 RSVD#D22 RSVD#D3 RSVD#F6 KEY_NC

HCLK

BCLK0 BCLK1

A22 A21

CLK_CPU_BCLK 3 CLK_CPU_BCLK# 3 PM_THRMTRIP# should connect to ICH9 and MCH without T-ing ( No stub) 1D05V_S0 2 6 6 6 H_DSTBN#1 H_DSTBP#1 H_DINV#1

R387 2KR2F-3-GP

SC1KP50V2KX-1GP 2 1

TP18 TP17 TP16 TP13 TP31 TP29 TP24 TP30 TP27 TP22 TP32

DATA GRP3

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XDP/ITP SIGNALS ADDR GROUP 1
6 H_DSTBN#0 6 H_DSTBP#0 6 H_DINV#0 H_DSTBN#2 6 H_DSTBP#2 6 H_DINV#2 6 2

BPM0# BPM1# BPM2# BPM3# PRDY# PREQ# TCK TDI TDO TMS TRST# DBR#

DATA GRP2

DATA GRP0

THERMAL

R92 1 68R2-GP

1D05V_S0

H_ADSTB#1

PROCHOT# THRMDA THRMDC

D21 A24 B25

CPU_PROCHOT#_R

CPU_PROCHOT#_R

32

H_THERMDA 20 H_THERMDC 20

RESERVED

1 1

Layout Note: "CPU_GTLREF0" 0.5" max length.

R386 1KR2F-3-GP

H_D#16 N22 H_D#17 K25 H_D#18 P26 H_D#19 R23 H_D#20 L23 H_D#21 M24 H_D#22 L22 H_D#23 M23 H_D#24 P25 H_D#25 P23 H_D#26 P22 H_D#27 T24 H_D#28 R24 H_D#29 L25 H_D#30 T25 H_D#31 N25 L26 M26 N24

AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20 R26 U26 AA1 Y1 E5 B5 D24 D6 D7 AE6

H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

DATA GRP1

BGA479-SKT6-GPU3

62.10079.001

SB use 62.10053.401
XDP_TMS XDP_TDI XDP_BPM#5 XDP_TDO H_CPURST# R67 R75 R60 R72 R97 1 1 1 1 1

ICH

H_DSTBN#3 6 H_DSTBP#3 6 H_DINV#3 6 COMP0 COMP1 COMP2 COMP3 R404 R403 R79 R80 1 1 1 1 2 2 2 2 27D4R2F-L1-GP 54D9R2F-L1-GP 27D4R2F-L1-GP 54D9R2F-L1-GP

CPU_GTLREF0

DY C475

TP28 TP78 TP86

AD26 TEST1 C23 TEST2 D25 RSVD_CPU_12 C24 TEST4 AF26 RSVD_CPU_13 AF1 RSVD_CPU_14 A26 B22 B23 C21

MISC

3,7 3,7 3,7

CPU_SEL0 CPU_SEL1 CPU_SEL2

H_DPRSTP# 7,16,32 H_DPSLP# 16 H_DPWR# 6 H_PWRGD 16 H_CPUSLP# 6 PSI# 32

1D05V_S0

BGA479-SKT6-GPU3 2 TEST1 1KR2J-1-GP Layout Note: Comp0, 2 connect with Zo=27.4 ohm, make trace length shorter than 0.5" . Comp1, 3 connect with Zo=55 ohm, make trace length shorter than 0.5" .

2 54D9R2F-L1-GP 2 54D9R2F-L1-GP 2 54D9R2F-L1-GP DY 2 54D9R2F-L1-GP

1 R99

DY

1 R411

2 TEST2 DY 1KR2J-1-GP

TEST4 2 1 C471DY SCD1U10V2KX-4GP

Net "TEST4" as short as possible, make sure "TEST4" routing is reference to GND and away other noisy signals

DY

2 54D9R2F-L1-GP 3D3V_S0

XDP_DBRESET# R96
1

DY

2 150R2F-1-GP

ZZZZ

XDP_TCK XDP_TRST#

R64 R74

1 1

2 54D9R2F-L1-GP 2 54D9R2F-L1-GP Title

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

All place within 2" to CPU

CPU (1 of 2)
Size Document Number Rev

D45/D46
Date: Friday, March 14, 2008
A B C D

PD
4 of 47

Sheet
E

VCC_CORE VCC_CORE
4

U35D VCC_CORE A4 A8 A11 A14 A16 A19 A23 AF2 B6 B8 B11 B13 B16 B19 B21 B24 C5 C8 C11 C14 C16 C19 C2 C22 C25 D1 D4 D8 D11 D13 D16 D19 D23 D26 E3 E6 E8 E11 E14 E16 E19 E21 E24 F5 F8 F11 F13 F16 F19 F2 F22 F25 G4 G1 G23 G26 H3 H6 H21 H24 J2 J5 J22 J25 K1 K4 K23 K26 L3 L6 L21 L24 M2 M5 M22 M25 N1 N4 N23 N26 P3 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

4 OF 4 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25

U35C 3 OF 4 1 1 1 A7 A9 A10 A12 A13 A15 A17 A18 A20 B7 B9 B10 B12 B14 B15 B17 B18 B20 C9 C10 C12 C13 C15 C17 C18 D9 D10 D12 D14 D15 D17 D18 E7 E9 E10 E12 E13 E15 E17 E18 E20 F7 F9 F10 F12 F14 F15 F17 F18 F20 AA7 AA9 AA10 AA12 AA13 AA15 AA17 AA18 AA20 AB9 AC10 AB10 AB12 AB14 AB15 AB17 AB18 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20 C54 SCD1U10V2KX-4GP C105 SCD1U10V2KX-4GP C106 SCD1U10V2KX-4GP 1 2 C55 SCD1U10V2KX-4GP SCD1U10V2KX-4GP

DY
2

VCC_CORE

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2 2 2 2 2 2 2 2 2 1D05V_S0 VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCA VCCA VID0 VID1 VID2 VID3 VID4 VID5 VID6 VCCSENSE VSSSENSE G21 CPU_G21 CPU_V6 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21 B26 C26 AD6 AF5 AE5 AF4 AE3 AF3 AE2 AF7 AE7 1 R65 100R2F-L1-GP-U 2 H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6 H_VID[6..0] VCC_CORE 1 32 1 R94 2 0R0402-PAD 1 2 R81 0R0402-PAD C69 SCD1U10V2KX-4GP SCD1U10V2KX-4GP 1 1 1 C104 SCD1U10V2KX-4GP 2 2 2 TC16 ST220U6D3VDM-15GP 1D05V_S0

DY

DY

DY

C100 SC22U6D3V5MX-L2GP

C91 SC22U6D3V5MX-L2GP SC22U6D3V5MX-L2GP

C486 SC22U6D3V5MX-L2GP

C487 SC22U6D3V5MX-L2GP

C491 SC22U6D3V5MX-L2GP

C80 SC22U6D3V5MX-L2GP SC22U6D3V5MX-L2GP

C490 SC22U6D3V5MX-L2GP

C97 SC22U6D3V5MX-L2GP

C81 SC22U6D3V5MX-L2GP

layout note: "1D5V_VCCA_S0" as short as possible


1 1 1 1 1 1 1 1D5V_S0 1D5V_VCCA_S0 L21 2 1 2 HCB1608KF121T30-GP C501 SC10U6D3V5MX-3GP C77 SCD1U10V2KX-4GP C84 SCD1U10V2KX-4GP C82 SCD1U10V2KX-4GP C102 SCD1U10V2KX-4GP C67 SCD1U10V2KX-4GP C78 SCD1U10V2KX-4GP C99 SC4D7U6D3V3KX-GP 1 2 C94 SC4D7U6D3V3KX-GP

C500 SCD01U16V2KX-3GP

R58 100R2F-L1-GP-U 2

TP77

VCC_SENSE 32 VSS_SENSE 32 Layout Note: VCCSENSE and VSSSENSE lines should be of equal length.

TP79 TP33

BGA479-SKT6-GPU3

Layout Note: Provide a test point (with no stub) to connect a differential probe between VCCSENSE and VSSSENSE at the location where the two 54.9ohm resistors terminate the 55 ohm transmission line.
1

TP87

BGA479-SKT6-GPU3

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

CPU (2 of 2)
Size Document Number Rev

D45/D46
Date: Friday, March 14, 2008
A B C D

PD
5 of 47

Sheet
E

U43A 4 H_D#[63..0] H_D#[63..0] H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 F2 G8 F8 E6 G2 H6 H2 F6 D4 H3 M9 M11 J1 J2 N12 J6 P2 L2 R2 N9 L6 M5 J3 N2 R1 N5 N6 P13 N8 L7 N10 M3 Y3 AD14 Y6 Y10 Y12 Y14 Y7 W2 AA8 Y9 AA13 AA9 AA11 AD11 AD10 AD13 AE12 AE9 AA2 AD8 AA3 AD3 AD7 AE14 AF3 AC1 AE3 AC3 AE11 AE8 AG2 AD6 H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63

1 OF 10 H_A#[35..3] H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8 H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35 A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20 H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 H_A#[35..3] 4

H_SWING routing Trace width and Spacing use 10 / 20 mil H_SWING Resistors and Capacitors close MCH 500 mil ( MAX )
1

1D05V_S0 1 R438 221R2F-2-GP 2

H_SWING C519 SCD1U10V2KX-4GP 1 R437 100R2F-L1-GP-U 2

H_RCOMP routing Trace width and Spacing use 10 / 20 mil


1 R138

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H_ADS# H_ADSTB#_0 H_ADSTB#_1 H_BNR# H_BPRI# H_BREQ# H_DEFER# H_DBSY# HPLL_CLK HPLL_CLK# H_DPWR# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY# H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9 H_ADS# 4 H_ADSTB#0 4 H_ADSTB#1 4 H_BNR# 4 H_BPRI# 4 H_BREQ#0 4 H_DEFER# 4 H_DBSY# 4 CLK_MCH_BCLK 3 CLK_MCH_BCLK# 3 H_DPWR# 4 H_DRDY# 4 H_HIT# 4 H_HITM# 4 H_LOCK# 4 H_TRDY# 4 2 H_RCOMP 24D9R2F-L-GP

HOST

H_DINV#[3..0] H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3 H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3 H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3 H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4 H_RS#_0 H_RS#_1 H_RS#_2 J8 L3 Y13 Y1 L10 M7 AA5 AE6 L9 M8 AA6 AE5 B15 K13 F13 B13 B14 B6 F12 C8 H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3 H_DSTBN#[3..0] H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#[3..0] H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_RS#0 H_RS#1 H_RS#2

H_DINV#[3..0]

Place them near to the chip ( < 0.5")

H_DSTBN#[3..0]

H_DSTBP#[3..0]

1D05V_S0 2 H_SWING H_RCOMP R445 1KR2F-3-GP 1 4 4 H_AVREF 1 R444 2 0R0402-PAD 1 R442 2KR2F-3-GP 2 H_DVREF H_CPURST# H_CPUSLP# C5 E3 C12 E11 A11 B11 H_SWING H_RCOMP H_CPURST# H_CPUSLP# H_AVREF H_DVREF

H_REQ#[4..0]

H_RS#[2..0]

DY

C524 SCD1U16V2ZY-2GP

PD

CANTIGA-GM-GP-U-NF 71.CNTIG.00U

D45 SB use 71.CNTIG.H0U D46 SB use 71.CNTIG.G0U


Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number
A

Cantiga (1 of 6) D45/D46
1

Rev

PD
6 of 47

Date: Friday, March 14, 2008


5 4 3 2

Sheet

U43B

2 OF 10

1D8V_S3

R452 80D6R2F-L-GP

Cantiga
2
M_RCOMPP M_RCOMPN

TP48 TP49 TP46 TP51

ME_JTAG_TCK ME_JTAG_TDI ME_JTAG_TDO ME_JTAG_TMS

RESERVED#M36 RESERVED#N36 RESERVED#R33 RESERVED#T33 RESERVED#AH9 RESERVED#AH10 RESERVED#AH12 RESERVED#AH13 RESERVED#K12 RESERVED#AL34 RESERVED#AK34 RESERVED#AN35 RESERVED#AM35 RESERVED#T24

DDR CLK/ CONTROL/COMPENSATION

M36 N36 R33 T33 AH9 AH10 AH12 AH13 K12 AL34 AK34 AN35 AM35 T24 B31 B2 M1 AY21

U43C

3 OF 10

1D05V_S0

SA_CK_0 SA_CK_1 SB_CK_0 SB_CK_1 SA_CK#_0 SA_CK#_1 SB_CK#_0 SB_CK#_1 SA_CKE_0 SA_CKE_1 SB_CKE_0 SB_CKE_1 SA_CS#_0 SA_CS#_1 SB_CS#_0 SB_CS#_1 SA_ODT_0 SA_ODT_1 SB_ODT_0 SB_ODT_1 SM_RCOMP SM_RCOMP# SM_RCOMP_VOH SM_RCOMP_VOL SM_VREF SM_PWROK SM_REXT SM_DRAMRST#

AP24 AT21 AV24 AU20 AR24 AR21 AU24 AV20 BC28 AY28 AY36 BB36 BA17 AY16 AV16 AR13 BD17 AY17 BF15 AY13 BG22 BH21 BF28 BH28 AV42 AR36 BF17 BC36 B38 A38 E41 F41 F43 E43

M_CLK_DDR0 M_CLK_DDR1 M_CLK_DDR2 M_CLK_DDR3

12 12 12 12

TP45 28 GMCH_BL_ON TP44 TP47 14 CLK_DDC_EDID 14 DAT_DDC_EDID

LBKLT_CTRL LCTLA_CLK LCTLB_DATA CLK_DDC_EDID DAT_DDC_EDID

L32 G32 M32 M33 K33 J33

L_BKLT_CTRL L_BKLT_EN L_CTRL_CLK L_CTRL_DATA L_DDC_CLK L_DDC_DATA L_VDD_EN LVDS_IBG LVDS_VBG LVDS_VREFH LVDS_VREFL LVDSA_CLK# LVDSA_CLK LVDSB_CLK# LVDSB_CLK LVDSA_DATA#_0 LVDSA_DATA#_1 LVDSA_DATA#_2 LVDSA_DATA#_3 LVDSA_DATA_0 LVDSA_DATA_1 LVDSA_DATA_2 LVDSA_DATA_3 LVDSB_DATA#_0 LVDSB_DATA#_1 LVDSB_DATA#_2 LVDSB_DATA#_3 LVDSB_DATA_0 LVDSB_DATA_1 LVDSB_DATA_2 LVDSB_DATA_3

PEG_COMPI PEG_COMPO PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8 PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15

T37 T36 H44 J46 L44 L40 N41 P48 N44 T43 U43 Y43 Y48 Y36 AA43 AD37 AC47 AD39 H43 J44 L43 L41 N40 P47 N43 T42 U42 Y42 W47 Y37 AA42 AD36 AC48 AD40

PEG_CMP

2 R225

1 49D9R2F-GP

FOR Cantiga:49.9 ohm Teenah: 24.9 ohm


PEG_RXN[15..0] 41

M_CLK_DDR#0 12 M_CLK_DDR#1 12 M_CLK_DDR#2 12 M_CLK_DDR#3 12 M_CKE0 M_CKE1 M_CKE2 M_CKE3 M_CS0# M_CS1# M_CS2# M_CS3# M_ODT0 M_ODT1 M_ODT2 M_ODT3 M_RCOMPP M_RCOMPN SM_RCOMP_VOH SM_RCOMP_VOL DDR_VREF_S3 12,13 12,13 12,13 12,13 12,13 12,13 12,13 12,13 12,13 12,13 12,13 12,13

R450 80D6R2F-L-GP

Cantiga
2

RESERVED#B31 RESERVED#B2 RESERVED#M1 RESERVED#AY21

GMCH_LCDVDD_ON M29 14 GMCH_LCDVDD_ON LIBG C44 L_LVBG TP97 B43 E37 E38 C41 14 GMCH_TXACLKC40 14 GMCH_TXACLK+ B37 14 GMCH_TXBCLKA37 14 GMCH_TXBCLK+

3D3V_S0 R196 1 R183 1 R177 1

RESERVED#BG23 RESERVED#BF23 RESERVED#BH18 RESERVED#BF18

GRAPHICS

BG23 BF23 BH18 BF18

1D8V_S3

TP96

H47 14 GMCH_TXAOUT0E46 14 GMCH_TXAOUT1G40 14 GMCH_TXAOUT2GMCH_TXAOUT3-A40

PEG_RXN0 PEG_RXN1 PEG_RXN2 PEG_RXN3 PEG_RXN4 PEG_RXN5 PEG_RXN6 PEG_RXN7 PEG_RXN8 PEG_RXN9 PEG_RXN10 PEG_RXN11 PEG_RXN12 PEG_RXN13 PEG_RXN14 PEG_RXN15 PEG_RXP0 PEG_RXP1 PEG_RXP2 PEG_RXP3 PEG_RXP4 PEG_RXP5 PEG_RXP6 PEG_RXP7 PEG_RXP8 PEG_RXP9 PEG_RXP10 PEG_RXP11 PEG_RXP12 PEG_RXP13 PEG_RXP14 PEG_RXP15

RSVD

LVDS LVDS

PEG_RXP[15..0] 41

R238 1KR2F-3-GP

DY DY DY

2 2K21R2F-GP CFG18 2 4K02R2F-GP CFG19 2 4K02R2F-GP CFG20

DY

H48 14 GMCH_TXAOUT0+ D45 14 GMCH_TXAOUT1+ F40 14 GMCH_TXAOUT2+ GMCH_TXAOUT3+ TP95 B40 A41 14 GMCH_TXBOUT0H38 14 GMCH_TXBOUT1G37 14 GMCH_TXBOUT2GMCH_TXBOUT3- J37 B42 14 GMCH_TXBOUT0+ G38 14 GMCH_TXBOUT1+ F37 14 GMCH_TXBOUT2+ GMCH_TXBOUT3+ K37

SM_REXT 1 R446 DDR3_DRAMRST# DREFCLK DREFCLK# DREFSSCLK DREFSSCLK#

2 499R2F-2-GP
TP50 DREFCLK 3 DREFCLK# 3 DREFSSCLK 3 DREFSSCLK# 3

TP53 R237

R156 1 R155 1 R185 1 R168 1 R167 1 R178 1 R166 1 R173 1 R158 1


C

DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY

2 2K21R2F-GP CFG3 2 2K21R2F-GP CFG4 2 2K21R2F-GP CFG5

TP52

PCI-EXPRESS

DPLL_REF_CLK DPLL_REF_CLK# DPLL_REF_SSCLK DPLL_REF_SSCLK# PEG_CLK PEG_CLK#

1KR2F-3-GP

DY

PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8 PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15 PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9 PEG_TX#_10 PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15 PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8 PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15

PEG_TXN[15..0] 41

2 2K21R2F-GP CFG6 2 2K21R2F-GP CFG7 2 2K21R2F-GP CFG8 2 2K21R2F-GP CFG9

CLK_MCH_3GPLL 3 CLK_MCH_3GPLL# 3

R159 1 R160 1 R157 1 R169 1 R180 1 R179 1

GRAPHICS VID

www.kythuatvitinh.com
2 2K21R2F-GP CFG10 2 2K21R2F-GP CFG11 2 2K21R2F-GP CFG12 2 2K21R2F-GP CFG13 2 2K21R2F-GP CFG14 2 2K21R2F-GP CFG15 2 2K21R2F-GP CFG16 2 2K21R2F-GP CFG17 DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3 AE41 AE37 AE47 AH39
DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 17 17 17 17

TV_DACA TV_DACB TV_DACC

F25 H25 K25 H24

TVA_DAC TVB_DAC TVC_DAC TV_RTN

3,4 3,4 3,4

CPU_SEL0 CPU_SEL1 CPU_SEL2

CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20

T25 R25 P25 P20 P24 C25 N24 M24 E21 C23 C24 N21 P21 T21 R20 M20 L21 H21 P29 R28 T28

CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 CFG_16 CFG_17 CFG_18 CFG_19 CFG_20

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

AE40 AE38 AE48 AH40

DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3

DMI_TXP0 17 DMI_TXP1 17 DMI_TXP2 17 DMI_TXP3 17

1 R206 1 R218

2 0R2J-2-GP 2 0R2J-2-GP

TV_DCONSEL0 TV_DCONSEL1

C31 E32

TV_DCONSEL_0 TV_DCONSEL_1

J41 GTXN0 M46 GTXN1 M47 GTXN2 M40 GTXN3 M42 GTXN4 R48 GTXN5 N38 GTXN6 T40 GTXN7 U37 GTXN8 U40 GTXN9 Y40 GTXN10 AA46 GTXN11 AA37 GTXN12 AA40 GTXN13 AD43 GTXN14 AC46 GTXN15 J42 GTXP0 L46 GTXP1 M48 GTXP2 M39 GTXP3 M43 GTXP4 R47 GTXP5 N37 GTXP6 T39 GTXP7 U36 GTXP8 U39 GTXP9 Y39 GTXP10 Y46 GTXP11 AA36 GTXP12 AA39 GTXP13 AD42 GTXP14 AD46 GTXP15

DMI

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3

AE35 AE43 AE46 AH42

DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3

1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA

2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2

C325 C598 C596 C327 C335 C604 C338 C321 C340 C324 C341 C594 C320 C344 C329 C602 C326 C599 C597 C328 C336 C603 C337 C322 C339 C323 C342 C595 C319 C343 C330 C601

SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP

PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7 PEG_TXN8 PEG_TXN9 PEG_TXN10 PEG_TXN11 PEG_TXN12 PEG_TXN13 PEG_TXN14 PEG_TXN15

CLK

TV TV

DMI_RXN0 17 DMI_RXN1 17 DMI_RXN2 17 DMI_RXN3 17 DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3

15

GMCH_BLUE

GMCH_BLUE

E28

CRT_BLUE

15 GMCH_GREEN 15 GMCH_RED

GMCH_GREEN GMCH_RED

G28 J28

CRT_GREEN CRT_RED

DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

AD35 AE44 AF46 AH43

DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3

17 17 17 17

G29

CRT_IRTN

15 GMCH_DDCCLK 15 GMCH_DDCDATA 15 GMCH_HSYNC 15 GMCH_VSYNC

GMCH_DDCCLK GMCH_DDCDATA

GFX_VID[4..0]

36

H32 J32 J29 E29 L29

SB

CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC CRT_TVO_IREF CRT_VSYNC

17 PM_SYNC# 4,16,32 H_DPRSTP# 3D3V_S0 17,32 VGATE_PWRGD RN18

4 3

1 2
SRN10KJ-5-GP

PM_EXTTS#0 PM_EXTTS#1

17,20 17,25,26,27,28

PWROK PLT_RST1#

H_DPRSTP#_MCH 2 0R0402-PADPM_EXTTS#0 PM_EXTTS#1 PWROK_GD 2 DY 1 R234 0R2J-2-GP RSTIN# NB_THERMTRIP# 1 2 R232 0R0402-PAD PM_DPRSLPVR 2 1 R152 100R2J-2-GP

1 R440

R29 B7 N33 P32 AT40 AT11 T20 R32

PM_SYNC# PM_DPRSTP# PM_EXT_TS#_0 PM_EXT_TS#_1 PWROK RSTIN# THERMTRIP# DPRSLPVR

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4

B33 B32 G33 F33 E33

GFX_VID0 GFX_VID1 GFX_VID2 GFX_VID3 GFX_VID4

1 R207

CRT_IREF 2 1K02R2F-1-GP

PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7 PEG_TXP8 PEG_TXP9 PEG_TXP10 PEG_TXP11 PEG_TXP12 PEG_TXP13 PEG_TXP14 PEG_TXP15

PEG_TXP[15..0] 41

CFG PM

VGA VGA

UMA

CANTIGA-GM-GP-U-NF

FOR Cantiga: 1.02k_1% ohm Teenah: 1.3k ohm


C34
GFXVR_EN 1.25V_1.05V_CANTIGA

GFX_VR_EN

CRT_IREF routing Trace width use 20 mil

UMA UMA
GMCH_BL_ON GMCH_BLUE

ME

DY C166
3D3V_S0

SC100P50V2JN-3GP

RN16

4 3
B

1 LCTLA_CLK 2 LCTLB_DATA
SRN10KJ-5-GP

4,16 PM_THRMTRIP-A# 17,32 PM_DPRSLPVR

1 R164

2 0R0402-PAD

UMA

3D3V_S0

HDA

R215 10KR2J-3-GP

BG48 BF48 BD48 BC48 BH47 BG47 BE47 BH46 BF46 BG45 BH44 BH43 BH6 BH5 BG4 BH3 BF3 BH2 BG2 BE2 BG1 BF1 BD1 BC1 F1 A47

NC#BG48 NC#BF48 NC#BD48 NC#BC48 NC#BH47 NC#BG47 NC#BE47 NC#BH46 NC#BF46 NC#BG45 NC#BH44 NC#BH43 NC#BH6 NC#BH5 NC#BG4 NC#BH3 NC#BF3 NC#BH2 NC#BG2 NC#BE2 NC#BG1 NC#BF1 NC#BD1 NC#BC1 NC#F1 NC#A47

CL_CLK CL_DATA CL_PWROK CL_RST# CL_VREF

AH37 AH36 AN36 CLPWROK_MCH 1 AJ35 AH34 MCH_CLVREF

CL_CLK0 17 CL_DATA0 17 R229 2 PWROK 17,20 0R0402-PAD CL_RST#0 17

R230 1KR2F-3-GP

UMA
1 R214 1 UMA R197 2
100KR2J-1-GP

UMA-VGA
1 R198 2 150R2F-1-GP

GMCH_LCDVDD_ON LIBG

2
100KR2J-1-GP

FOR Cantiga:500 ohm Teenah: 392 ohm


R223 499R2F-2-GP 1D8V_S3 R456 1KR2F-3-GP 2 1 GMCH_RED SM_RCOMP_VOH GMCH_GREEN

C311

SCD1U10V2KX-4GP 2 1

UMA-VGA
1 R201 2 150R2F-1-GP

UMA
1 R479 2
2K37R2F-GP
B

MISC

DDPC_CTRLCLK DDPC_CTRLDATA SDVO_CTRLCLK SDVO_CTRLDATA CLKREQ# ICH_SYNC# TSATN#

1D05V_S0

C549

N28 M28 G36 E36 K36 H36 B12

UMA-VGA
1 R202 2 150R2F-1-GP

CLK_MCH_OE#

CLK_MCH_OE# 3 MCH_ICH_SYNC# 17

TP56 TP62 TP108 TP132 TP135

C543

PD

NC

C552 SC2D2U6D3V3MX-1-GP SM_RCOMP_VOL C542 R186

TSATN#

1 R447

2 56R2J-4-GP

R457 3K01R2F-3-GP

SCD01U16V2KX-3GP

FOR Discrete change R97, R101& R104 to 0 ohm

HDA_BCLK HDA_RST# HDA_SDI HDA_SDO HDA_SYNC

B28 B30 B29 C29 A28

HDA_BCLK HDA_RST# HDA_SDI HDA_SDO HDA_SYNC

R454 1KR2F-3-GP

2
SCD01U16V2KX-3GP SC2D2U6D3V3MX-1-GP

1 1 1

TV_DACA TV_DACB TV_DACC

UMA_DIS R187 75R2J-1-GP


2

UMA_DIS R188 75R2J-1-GP


EC98 SC22P50V2JN-4GP

CANTIGA-GM-GP-U-NF CLK_MCH_OE# 71.CNTIG.00U

DY

UMA_DIS

75R2J-1-GP

FOR Discrete change R113, R115& R116 to 0 ohm DIS


1 R204 2 0R2J-2-GP

GMCH_HSYNC

DREFCLK 1 R228 DREFCLK#1 R227 DREFSSCLK 1 R233 DREFSSCLK# 1 R235

DY
2 0R2J-2-GP
3D3V_S0

GMCH_VSYNC 1 R203 CRT_IREF

DIS
2 0R2J-2-GP

DY
2 0R2J-2-GP 1
DY R659 30KR2F-GP

DIS
1 R199 2 0R2J-2-GP

DY
GFXVR_EN

2 0R2J-2-GP

DY
2 0R2J-2-GP 2
DY R657 100KR2F-L1-GP

GFXVR_EN 36

PD

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

Cantiga (2 of 6)
Size Document Number Rev

D45/D46
Date: Tuesday, March 25, 2008
5 4 3 2 1

PD
7 of 47

Sheet

U43D 12 M_A_DQ[63..0] M_A_DQ[63..0] M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 AJ38 AJ41 AN38 AM38 AJ36 AJ40 AM44 AM42 AN43 AN44 AU40 AT38 AN41 AN39 AU44 AU42 AV39 AY44 BA40 BD43 AV41 AY43 BB41 BC40 AY37 BD38 AV37 AT36 AY38 BB38 AV36 AW36 BD13 AU11 BC11 BA12 AU13 AV13 BD12 BC12 BB9 BA9 AU10 AV9 BA11 BD9 AY8 BA6 AV5 AV7 AT9 AN8 AU5 AU6 AT5 AN10 AM11 AM5 AJ9 AJ8 AN12 AM13 AJ11 AJ12 SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63

4 OF 10 SA_BS_0 SA_BS_1 SA_BS_2 SA_RAS# SA_CAS# SA_WE# BD21 BG18 AT25 BB20 BD20 AY20 12 M_B_DQ[63..0] M_A_BS#0 12,13 M_A_BS#1 12,13 M_A_BS#2 12,13 M_A_RAS# 12,13 M_A_CAS# 12,13 M_A_WE# 12,13 M_B_DQ[63..0] M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63 AK47 AH46 AP47 AP46 AJ46 AJ48 AM48 AP48 AU47 AU46 BA48 AY48 AT47 AR47 BA47 BC47 BC46 BC44 BG43 BF43 BE45 BC41 BF40 BF41 BG38 BF38 BH35 BG35 BH40 BG39 BG34 BH34 BH14 BG12 BH11 BG8 BH12 BF11 BF8 BG7 BC5 BC6 AY3 AY1 BF6 BF5 BA1 BD3 AV2 AU3 AR3 AN2 AY2 AV1 AP3 AR1 AL1 AL2 AJ1 AH1 AM2 AM3 AH3 AJ3

U43E SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

5 OF 10 SB_BS_0 SB_BS_1 SB_BS_2 SB_RAS# SB_CAS# SB_WE# BC16 BB17 BB33 AU17 BG16 BF14 M_B_BS#0 12,13 M_B_BS#1 12,13 M_B_BS#2 12,13 M_B_RAS# 12,13 M_B_CAS# 12,13 M_B_WE# 12,13
D

M_A_DM[7..0] SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7 SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7 SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8 SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14 AM37 AT41 AY41 AU39 BB12 AY6 AT7 AJ5 AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7 AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8 M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 M_A_DQS[7..0] M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DM[7..0] 12

M_B_DM[7..0] SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7 SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7 SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8 SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14 AM47 AY47 BD40 BF35 BG11 BA3 AP1 AK2 AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6 AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5 M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7 M_B_DQS[7..0] M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DM[7..0] 12

M_A_DQS[7..0] 12

M_B_DQS[7..0]

12

MEMORY

M_A_DQS#[7..0]

M_A_DQS#[7..0]

12

MEMORY

M_B_DQS#[7..0]

M_B_DQS#[7..0]

12

DDR

DDR

www.kythuatvitinh.com
SYSTEM
BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A[14..0] 12,13

SYSTEM

M_A_A[14..0]

M_B_A[14..0]

AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14

M_B_A[14..0] 12,13

CANTIGA-GM-GP-U-NF 71.CNTIG.00U

CANTIGA-GM-GP-U-NF 71.CNTIG.00U

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number

Cantiga (3 of 6) D45/D46
Sheet
1

Rev

PD
8 of 47

Date: Friday, March 14, 2008


5 4 3 2

7 OF 10 1D8V_S3 U43G

VCC_GFXCORE R244 1 2 0R3-0-U-GP

C222 SC1U10V2KX-1GP

C230 SCD1U10V2KX-4GP 2 1

C190 SCD47U6D3V2KX-GP 2 1

C189 SCD22U10V2KX-1GP

POWER

C246 SC22U6D3V5MX-L2GP SC22U6D3V5MX-L2GP

C197 SC22U6D3V5MX-L2GP

C191 SC22U6D3V5MX-L2GP

C204 SC22U6D3V5MX-L2GP

C227 SC22U6D3V5MX-L2GP

C207 SC22U6D3V5MX-L2GP SC22U6D3V5MX-L2GP

C226 SC10U6D3V5MX-3GP

1 2

C186 SCD1U10V2KX-4GP

C267 SC10U6D3V5MX-3GP

VCC_GFXCORE

C350 SCD1U10V2KX-4GP

VCC GFX NCTF

Coupling CAP

POWER

BA36 BB24 BD16 BB21 AW16 AW13 AT13


VCC_GFXCORE

VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC

C253 SCD1U10V2KX-4GP

AP33 AN33 BH32 BG32 BF32 BD32 BC32 BB32 BA32 AY32 AW32 AV32 AU32 AT32 AR32 AP32 AN32 BH31 BG31 BF31 BG30 BH29 BG29 BF29 BD29 BC29 BB29 BA29 AY29 AW29 AV29 AU29 AT29 AR29 AP29

VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM

FOR VCC SM

1D8V_S3

C252 SCD1U10V2KX-4GP 2 1

C282 SCD1U10V2KX-4GP

C215 SCD1U10V2KX-4GP

TC21 C254 ST330U6VDM-2-GP ST330U6VDM-2-GP SC22U6D3V5MX-L2GP

C255 SC22U6D3V5MX-L2GP SC22U6D3V5MX-L2GP

VCC GFX

Place on the Edge

VCC SM LF

C178 SCD1U10V2KX-4GP 2 1

C170 SCD1U10V2KX-4GP 2 1

VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF

AV44 SM_LF1_GMCH BA37 SM_LF2_GMCH AM40 SM_LF3_GMCH AV21 SM_LF4_GMCH AY5 SM_LF5_GMCH AM10 SM_LF6_GMCH BB13 SM_LF7_GMCH 1
SCD22U10V2KX-1GP 2 1 SCD47U16V2ZY-GP 2 1 SC1U10V2KX-1GP 2 1 C312 1 SCD22U10V2KX-1GP 2 C303 C313 SC1U10V2KX-1GP C147 C216

CANTIGA-GM-GP-U-NF 71.CNTIG.00U

VCC NCTF

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Y26 AE25 AB25 AA25 AE24 AC24 AA24 Y24 AE23 AC23 AB23 AA23 AJ21 AG21 AE21 AC21 AA21 Y21 AH20 AF20 AE20 AC20 AB20 AA20 T17 T16 AM15 AL15 AE15 AJ15 AH15 AG15 AF15 AB15 AA15 Y15 V15 U15 AN14 AM14 U14 T14 VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG

VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF

W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16

VGA

1D05V_S0

FOR VCC CORE


AG34 AC34 AB34 AA34 Y34 V34 U34 AM33 AK33 AJ33 AG33 AF33 AE33 AC33 AA33 Y33 W33 V33 U33 AH28 AF28 AC28 AA28 AJ26 AG26 AE26 AC26 AH25 AG25 AF25 AG24 AJ23 AH23 AF23 T32

U43F

6 OF 10

C248 SCD1U10V2KX-4GP 2 1

C273 SCD22U10V2KX-1GP 2 1

VCC_GFXCORE

C261 SCD22U10V2KX-1GP 2 1

C281 SCD1U10V2KX-4GP

C265 SC22U6D3V5MX-L2GP SC22U6D3V5MX-L2GP

C228 SC22U6D3V5MX-L2GP

C266 SC22U6D3V5MX-L2GP

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

VCC SM

Coupling CAP
1 1

Place on the Edge

VCC CORE

Coupling CAP 370 mils from the Edge

NEAR RN39

1D05V_S0

1 R220 2VCC_GMCH_35 0R0402-PAD

Place CAP where LVDS and DDR2 taps

VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF

AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23

36 VCC_AXG_SENSE 36 VSS_AXG_SENSE

CANTIGA-GM-GP-U-NF 71.CNTIG.00U

U93 close to U3

AJ14 AH14

VCC_AXG_SENSE VSS_AXG_SENSE

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number

Cantiga (4 of 6) D45/D46
Sheet
1

Rev

PD
9 of 47

Date: Monday, March 24, 2008


5 4 3 2

5V_S0

Imax = 300 mA
U39 1 2 3 VIN GND EN/EN# VOUT NC#4 5 4

3D3V_S0_DAC 3D3V_S0_DAC

73mA
SCD1U10V2KX-4GP C518 SC2D2U6D3V3MX-1-GP 2 1 1 U43H R459 0R2J-2-GP 8 OF 10 C149 SC4D7U6D3V3KX-GP 2 1 C514 SC4D7U6D3V3KX-GP 2 1 1 VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT U13 T13 U12 T12 U11 T11 U10 T10 U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1 C512 SC4D7U6D3V3KX-GP C163 SCD47U6D3V2KX-GP SCD01U16V2KX-3GP

1D05V_S0

UMA
2 SC4D7U6D3V3KX-GP SC1U16V3ZY-GP 1 1 C784 3D3V_S0_DAC 2 BC2 2 2

UMA

1 2

C175 SCD1U10V2KX-4GP

UMA L28 2 1 3D3V_CRTDAC_S0 C551 HCB1608K-181T20GP C550

VGA
2

B27 A26 A25 B25

VCCA_CRT_DAC VCCA_CRT_DAC VCCA_DAC_BG VSSA_DAC_BG

CRT

BC1

RT9198-33PBR-GP 74.09198.G7F

2.68mA
UMA
L27 1 1 1 SCD01U16V2KX-3GP

M_VCCA_DAC_BG

TC17 ST220U6D3VDM-15GP

852mA

C546 HCB1608K-181T20GP

SCD1U10V2KX-4GP

1D05V_S0 1

1.25V_1.05V_CANTIGA R126 2 0R0603-PAD

M_VCCA_DPLLB M_VCCA_HPLL M_VCCA_MPLL 1

L48 AD1 AE1

UMA

VCCA_DPLLB VCCA_HPLL VCCA_MPLL VCCA_LVDS VSSA_LVDS

VTT

PLL

1.25V_1.05V_CANTIGA

65mA
SCD1U10V2KX-4GP

C606

SCD1U10V2KX-4GP

C610

2 R486 1 0R3-0-U-GP C609


C

M_VCCA_DPLLB

1.25V_1.05V_CANTIGA 1

A PEG

UMA

PD

1.25V_1.05V_CANTIGA 1

R429 1D05V_SUS_MCH_PLL2 0R0603-PAD 2

120ohm 100MHz
SC4D7U6D3V3KX-GP 1

24mA

C251 SCD1U10V2KX-4GP

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50mA
SC1U10V3KX-3GP C600 1 C532 SC1U10V3KX-3GP 1 C214 R484 0R2J-2-GP 2 2 2 1 1 1 C194 SC1U10V3KX-3GP 1 C199 R128 2 0R0603-PAD C133 C139 SC22U6D3V5MX-L2GP SC22U6D3V5MX-L2GP 1D05V_RUN_PEGPLL 1D05V_SM AA48 VCCA_PEG_PLL VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM

65mA

VGA

1 R488 2 0R2J-2-GP

VCCA_PEG_BG C614 SCD1U10V2KX-4GP

2 R240 1 0R3-0-U-GP C331

C316

C317

1D5V_S0 R236 0R2J-2-GP

VGA
AD48 VCCA_PEG_BG

1.25V_1.05V_CANTIGA

322mA

R448 1 0R0603-PAD

UMA

UMA

UMA

VGA

480mA DY

1.25V_1.05V_CANTIGA 1

R184 2 0R0603-PAD C247 SC22U6D3V5MX-L2GP

1D05V_SM_CK

A SM

AR20 AP20 AN20 AR17 AP17 AN17 AT16 AR16 AP16

POWER

C238

1D8V_SUS_SM_CK

C534 SC10U6D3V5MX-3GP

SC1KP50V2KX-1GP

A LVDS

UMA

UMA UMA
SC22U6D3V5MX-L2GP SC22U6D3V5MX-L2GP

UMA M_VCCA_DPLLA

UMA

UMA

R638 13.2mA 0R2J-2-GP J47

1D8V_TXLVDS J48

3 BAT54-7-F-GP

R481 0R2J-2-GP 1

R470 1 0R0402-PAD

C565 SCD1U10V2KX-4GP

AXF

C515

C531 SCD1U10V2KX-4GP

A CK

120ohm 100MHz

C516 C513 SCD1U10V2KX-4GP SC10U6D3V5MX-3GP

3D3V_S0_DAC

3D3VTVDAC SCD1U10V2KX-4GP SCD1U10V2KX-4GP

SM CK

L22 2 FCM1608KF-1-GP

M_VCCA_MPLL

139.2mA
UMA

1.25V_1.05V_CANTIGA

HV

VGA
1

TV

220ohm 100MHz
L8 1 2 BLM18BB221SN1D-GP 1 1D05V_RUN_PEGPLL C334 SCD1U10V2KX-4GP

R468 2 1 0R2J-2-GP

D TV/CRT

UMA

VGA
1 1D5VRUN_TVDAC 1D5VRUN_QDAC M25 L28 AF1 1 1 C145 SCD1U10V2KX-4GP SCD1U10V2KX-4GP C333 SCD1U10V2KX-4GP 1D05V_RUN_PEGPLL AA47 M38 L37 VCCD_TVDAC VCCD_QDAC VCCD_HPLL VCCD_PEG_PLL VCCD_LVDS VCCD_LVDS

C621 SC4D7U6D3V3KX-GP

R467 0R2J-2-GP

HDA

UMA C561
SCD1U10V2KX-4GP

VCC_HDA

A32

UMA
V48 U48 V47 U47 U46 AH48 AF48 AH47 AG47

VCC_HDA

1D05V_S0

VCC_PEG VCC_PEG VCC_PEG VCC_PEG VCC_PEG VCC_DMI VCC_DMI VCC_DMI VCC_DMI

1782mA
1 1 1 C623 SC22U6D3V5MX-L2GP C624 SC22U6D3V5MX-L2GP 2 2 2

PEG

C628 SC22U6D3V5MX-L2GP SC22U6D3V5MX-L2GP

1D05V_SUS_MCH_PLL2

VCC_HDA

50mA

VCC_HV VCC_HV VCC_HV

1D5V_S0

R453 0R2J-2-GP

B24 A24

VCC_TX_LVDS VCCA_TV_DAC VCCA_TV_DAC

K47 C35 B35 A35

3D3V_HV_S0

C593 SC22U6D3V5MX-L2GP

180ohm 100MHz

UMA

L26 2 1 HCB1608K-181T20GP

VCC_SM_CK VCC_SM_CK VCC_SM_CK VCC_SM_CK

BF21 BH20 BG20 BF20

1D8V_TXLVDS_S3

1D5V_S0 2

58.7mA
1D5VRUN_TVDAC R189 1 0R0603-PAD C235 1 2 SCD01U16V2KX-3GP 1 C237

157.2mA
2

DMI

SCD1U10V2KX-4GP

VTTLF

50mA

C612

C618 SC10U6D3V5MX-3GP

LVDS

SCD1U10V2KX-4GP

VTTLF VTTLF VTTLF

C141 SCD47U6D3V2KX-GP

C144 SCD47U6D3V2KX-GP

1D8V_S3

1 71.CNTIG.00U 1 2

1 2

1 2

180ohm 100MHz

C250

C249

C785

2 SCD1U10V2KX-4GP

UMA SCD01U16V2KX-3GP

UMA
1

R195 0R2J-2-GP

60.3mA

L5 UMA 1 2 HCB1608K-181T20GP

1D5VRUN_QDAC

SC4D7U6D3V3KX-GP

2 R231 11D8V_SUS_DLVDS 0R3-0-U-GP C304 SCD1U10V2KX-4GP SCD1U10V2KX-4GP

UMA

C522 SCD47U6D3V2KX-GP

CANTIGA-GM-GP-U-NF

ZZZZ

SC1U16V3ZY-GP

UMA

M_VCCA_DAC_BG C545

UMA

M_VCCA_DPLLA R455 0R2J-2-GP

F47

VCCA_DPLLA

VGA

1D05V_S0 D21 1 3D3V_S0 10R2J-2-GP 1D05V_HV_S0 2 1 2 R471 3D3V_HV_S0

1D8V_TXLVDS_S3

L23 2 FCM1608KF-1-GP

SC22U6D3V5MX-L2GP SC22U6D3V5MX-L2GP

SC4D7U6D3V3KX-GP SC4D7U6D3V3KX-GP SC2D2U6D3V3MX-1-GP SC2D2U6D3V3MX-1-GP

1D8V_S3

M_VCCA_HPLL C517 SCD1U10V2KX-4GP

24mA

DY

C538

AP28 AN28 AP25 AN25 AN24 AM28 AM26 AM25 AL25 AM24 AL24 AM23 AL23

VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF

VCC_AXF VCC_AXF VCC_AXF

B22 B21 A21

200mA
1 R449 1R2F-GP 2 C528 1 2

R451 1 0R0603-PAD

SC10U6D3V5MX-3GP

119mA 106mA
C607 SC1KP50V2KX-1GP

1D8V_S3 R480 0R3-0-U-GP UMA 1 R482 0R2J-2-GP


B

UMA

VGA

1D05V_S0

456mA
VTTLF1 VTTLF2 VTTLF3

C615 SC10U6D3V5MX-3GP

A8 L1 AB2

0R2J-2-GP 2 1

UMA

UMA

C301 SC10U6D3V5MX-3GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3

VGA

VGA

R224

UMA

Cantiga (5 of 6)
Document Number Rev

D45/D46
Sheet
1

PD
10 of 47

Date: Monday, March 17, 2008


5 4 3 2

U43I AU48 AR48 AL48 BB47 AW47 AN47 AJ47 AF47 AD47 AB47 Y47 T47 N47 L47 G47 BD46 BA46 AY46 AV46 AR46 AM46 V46 R46 P46 H46 F46 BF44 AH44 AD44 AA44 Y44 U44 T44 M44 F44 BC43 AV43 AU43 AM43 J43 C43 BG42 AY42 AT42 AN42 AJ42 AE42 N42 L42 BD41 AU41 AM41 AH41 AD41 AA41 Y41 U41 T41 M41 G41 B41 BG40 BB40 AV40 AN40 H40 E40 AT39 AM39 AJ39 AE39 N39 L39 B39 BH38 BC38 BA38 AU38 AH38 AD38 AA38 Y38 U38 T38 J38 F38 C38 BF37 BB37 AW37 AT37 AN37 AJ37 H37 C37 BG36 BD36 AK15 AU36 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

9 OF 10 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23 AJ6 BG21 L12 AW21 AU21 AP21 AN21 AH21 AF21 AB21 R21 M21 J21 G21 BC20 BA20 AW20 AT20 AJ20 AG20 Y20 N20 K20 F20 C20 A20 BG19 A18 BG17 BC17 AW17 AT17 R17 M17 H17 C17 BA16

U43J VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

10 OF 10 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS AH8 Y8 L8 E8 B8 AY7 AU7 AN7 AJ7 AE7 AA7 N7 J7 BG6 BD6 AV6 AT6 AM6 M6 C6 BA5 AH5 AD5 Y5 L5 J5 H5 F5 BE4 BC3 AV3 AL3 R3 P3 F3 BA2 AW2 AU2 AR2 AP2 AJ2 AH2 AF2 AE2 AD2 AC2 Y2 M2 K2 AM1 AA1 P1 H1 U24 U28 U25 U29 AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17 BH48 BH1 A48 C1 A3 E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48

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VSS VSS
AU16 AN16 N16 K16 G16 E16 BG15 AC15 W15 A15 BG14 AA14 C14 BG13 BC13 BA13 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF Y11 N11 G11 C11 BG10 AV10 AT10 AJ10 AE10 AA10 M10 BF9 BC9 AN9 AM9 AD9 G9 B9 BH8 BB8 AV8 AT8 NCTF TEST PIN: A3,C1,A48,BH1,BH48

VSS NCTF

AN13 AJ13 AE13 N13 L13 G13 E13 BF12 AV12 AT12 AM12 AA12 J12 A12 BD11 BB11 AY11 AN11 AH11

VSS SCB

NCTF_VSS_SCB#BH48 NCTF_VSS_SCB#BH1 NCTF_VSS_SCB#A48 NCTF_VSS_SCB#C1 NCTF_VSS_SCB#A3 NC#E1 NC#D2 NC#C3 NC#B4 NC#A5 NC#A6 NC#A43 NC#A44 NC#B45 NC#C46 NC#D47 NC#B47 NC#A46 NC#F48 NC#E48 NC#C48 NC#B48

TP99 TP91 TP98 TP89 TP90

NC

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number

CANTIGA-GM-GP-U-NF CANTIGA-GM-GP-U-NF 71.CNTIG.00U 71.CNTIG.00U

Cantiga (6 of 6) D45/D46
Sheet
1

Rev

PD
11 of 47

Date: Friday, March 14, 2008


5 4 3 2

A
SB
DDR_VREF_S3_TP K2

B
SB
1 1
TPAD79

C
DY DY

DDR_VREF_S3_TP

DDR_VREF_S3_TP

K3 TPAD79 1D8V_S3 DDR_VREF_S3_1 TPAD79 K1

1
DDR_VREF_S3_TP SMBC_ICH SMBD_ICH R614 0R2J-2-GP R610 0R2J-2-GP R245 0R3-0-U-GP

1 2 C354 SCD1U16V2ZY-2GP

K4 7,13 7,13 7,13 7,13 8,13 8,13 8,13 7,13 7,13

1 2 C356 SC2D2U6D3V3MX-1-GP

1 2 C353 SCD1U16V2ZY-2GP

1 2 C355 SC2D2U6D3V3MX-1-GP

DDR2-200P-23-GP-U1 62.10017.A71

DDR2-200P-22-GP-U2 62.10017.A61

DY

DY

1
M_CLK_DDR0 C349 SC10P50V2JN-4GP

196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133 132 128 127 122 121 78 77 72 71 66 65 60 59 54 53 48 47 42 41 40 39 34 33 28 27 24 21 18 15 12 9 8 3 2 VREF ODT1 ODT0 SDA SCL WE# CAS# RAS# CKE1 CKE0 CS1# CS0# NC#163/TEST NC#120 NC#83 NC#69 NC#50 163 120 83 69 50 109 113 108 80 79 115 110 195 197 119 114 GND 201 MH2
M_CLK_DDR2 M_CLK_DDR3 C351 SC10P50V2JN-4GP C138 SC10P50V2JN-4GP M_CLK_DDR#2 M_CLK_DDR#3

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133 132 128 127 122 121 78 77 72 71 66 65 60 59 54 53 48 47 42 41 40 39 34 33 28 27 24 21 18 15 12 9 8 3

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

3D3V_S0

2
C128 SCD1U16V2ZY-2GP

62.10017.G31

118 117 112 111 104 103 96 95 88 87 82 81 VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD_SPD 200 198 166 164 32 30 SA1 SA0 CK1# CK1 CK0# CK0 199

3,19 SMBC_ICH 3,19 SMBD_ICH

118 117 112 111 104 103 96 95 88 87 82 81 1


10KR2J-3-GP C124 R116

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD 2

163 120 83 69 50
8,13 8,13 8,13 M_A_BS#2 M_A_BS#0 M_A_BS#1

NC#163/TEST NC#120 NC#83 NC#69 NC#50 200 198 199 197 195
7 7 7 7

SA1 SA0 VDDSPD BA1 BA0 106 107 SCL SDA 185 170 147 130 67 52 26 10
M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

DM7 DM6 DM5 DM4 DM3 DM2 DM1 DM0


M_CLK_DDR0 M_CLK_DDR#0 M_CLK_DDR1 M_CLK_DDR#1 7 7 7 7

185 170 147 130 67 52 26 10


M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

DM7 DM6 DM5 DM4 DM3 DM2 DM1 DM0 166 164 32 30 80 79 MH2 MH1 MH2 MH1 115 110 113 109 108 CK1# CK1 CK0# CK0 CKE1 CKE0 CS1# CS0# CAS# WE# RAS#
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14

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M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14

186 167 146 129 68 49 29 11 188 169 148 131 70 51 31 13


M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

DQS7# DQS6# DQS5# DQS4# DQS3# DQS2# DQS1# DQS0# DQS7 DQS6 DQS5 DQS4 DQS3 DQS2 DQS1 DQS0

A16_BA2 A15 A14 A13 A12 A11 A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

85 84 86 116 89 90 105 91 93 92 94 97 98 99 100 101 102

BA1 BA0 A16/BA2 A15 A14 A13 A12 A11 A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

106 107 85 84 86 116 89 90 105 91 93 92 94 97 98 99 100 101 102

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

DQ63 DQ62 DQ61 DQ60 DQ59 DQ58 DQ57 DQ56 DQ55 DQ54 DQ53 DQ52 DQ51 DQ50 DQ49 DQ48 DQ47 DQ46 DQ45 DQ44 DQ43 DQ42 DQ41 DQ40 DQ39 DQ38 DQ37 DQ36 DQ35 DQ34 DQ33 DQ32 DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ23 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

194 192 182 180 191 189 181 179 176 174 160 158 175 173 159 157 154 152 142 140 153 151 143 141 136 134 126 124 137 135 125 123 76 74 64 62 75 73 63 61 58 56 46 44 57 55 45 43 38 36 22 20 37 35 25 23 16 14 6 4 19 17 7 5

DQ63 DQ62 DQ61 DQ60 DQ59 DQ58 DQ57 DQ56 DQ55 DQ54 DQ53 DQ52 DQ51 DQ50 DQ49 DQ48 DQ47 DQ46 DQ45 DQ44 DQ43 DQ42 DQ41 DQ40 DQ39 DQ38 DQ37 DQ36 DQ35 DQ34 DQ33 DQ32 DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ23 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

194 192 182 180 191 189 181 179 176 174 160 158 175 173 159 157 154 152 142 140 153 151 143 141 136 134 126 124 137 135 125 123 76 74 64 62 75 73 63 61 58 56 46 44 57 55 45 43 38 36 22 20 37 35 25 23 16 14 6 4 19 17 7 5

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

DQS7# DQS6# DQS5# DQS4# DQS3# DQS2# DQS1# DQS0#

186 167 146 129 68 49 29 11

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

TPAD79

C126

SC2D2U6D3V3MX-1-GP SC2D2U6D3V3MX-1-GP

5
1
DM2 DM1 M_CS0# M_CS1# M_CKE0 M_CKE1 M_A_RAS# M_A_CAS# M_A_WE# M_ODT0 M_ODT1

7,13 7,13

202 GND 1 MH2 GND MH1 GND VSS VREF OTD1 OTD0 DQS7 DQS6 DQS5 DQS4 DQS3 DQS2 DQS1 DQS0

201

M_ODT2 M_ODT3

DDR_VREF_S3_TP

MH1 202 2 1 119 114 188 169 148 131 70 51 31 13

Place near DM1

Place near DM2

4 DDR SOCKET

4
DY
M_CLK_DDR1 M_CLK_DDR#0 K5

DY

C137 SC10P50V2JN-4GP

M_CLK_DDR#1

D45 46 use
1
TPAD79 1D8V_S3

3D3V_S0

3D3V_S0

1D8V_S3

C123 SC2D2U6D3V3MX-1-GP

DIM_SA1

SCD1U16V2ZY-2GP

8,13 8,13 8,13

3 2
Title Document Number Size Date: Friday, March 14, 2008

M_B_BS#2 M_B_BS#0 M_B_BS#1

M_CLK_DDR#2 M_CLK_DDR2

M_CLK_DDR#3 M_CLK_DDR3

M_B_RAS# M_B_WE# M_B_CAS# M_CS2# M_CS3# M_CKE2 M_CKE3

8,13 8,13 8,13 7,13 7,13 7,13 7,13

M_A_DQ[63..0]

M_A_DQS[7..0] 8

M_A_DQS#[7..0] 8

M_A_DM[7..0] 8

M_A_A[14..0] 8,13

M_B_DQ[63..0]

M_B_DQS[7..0]

M_B_DQS#[7..0]

M_B_DM[7..0] 8

M_B_A[14..0] 8,13

DDR2 Socket

D45/D46
Sheet 12 of 47

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Wistron Corporation

Rev

PD

PARALLEL TERMINATION
DDR_VREF_S3

Decoupling Capacitor
Put decap near power(0.9V) and pull-up resistor
DDR_VREF_S3 1 C306 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP DDR_VREF_S3 1 C264 1 C233 1 C205 1 C305 1 C256 1 C202 1 C236 1 C259 1 C213 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP DDR_VREF_S3 1 C232 1 C258 1 C231 1 C187 1 C229 1 C288 1 C272 1 C240 1 C192 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP

Put decap near power(0.9V) and pull-up resistor


RN25

8 7 6 5

1 2 3 4 SRN56J-5-GP

M_B_A12 M_B_A9

M_CKE2 M_B_BS#2

7,12 8,12

R172 R171 R209 R190 R208 R222

1 1 1 1 1 1

2 2 2 2 2 2

56R2J-4-GP 56R2J-4-GP 56R2J-4-GP 56R2J-4-GP 56R2J-4-GP 56R2J-4-GP

M_A_A8 M_B_A10 M_A_A14 M_B_A14

M_CS1# M_ODT3

7,12 7,12

1 C196 1 C309 1 C257 1 C302 1 C201 1 C212 1 C289

M_A_A[14..0] 8,12 RN22 8 7 6 5 1 2 3 4 M_B_A8 M_B_A5 M_B_A1 M_B_A3 M_B_A[14..0] 8,12

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8 7 6 5 M_ODT2 M_CS2# M_B_RAS# 7,12 7,12 8,12 8 7 6 5 SRN56J-5-GP RN19 1 2 M_B_A0 3 M_B_A2 4 M_B_A4 M_B_BS#1 8,12 DDR_VREF_S3

SRN56J-5-GP RN12 1 M_B_A13 2 3 4

PD

8 7 6 5

SRN56J-5-GP RN23 1 M_B_A6 2 M_B_A7 3 M_B_A11 4 SRN56J-5-GP RN14 1 2 3 4 SRN56J-5-GP RN13 1 M_A_A13 2 3 4 SRN56J-5-GP RN20 1 2 M_A_A0 3 M_A_A2 4 M_A_A4 SRN56J-5-GP RN15 1 2 3 4 SRN56J-5-GP RN26 1 2 3 M_A_A12 4 M_A_A9 SRN56J-5-GP RN24 1 M_A_A6 2 M_A_A7 3 M_A_A11 4 SRN56J-5-GP RN21 1 M_A_A5 2 M_A_A3 3 M_A_A1 4 M_A_A10 SRN56J-5-GP

EC47

EC48

EC130

DY
SCD1U16V2ZY-2GP

DY
SCD1U16V2ZY-2GP

1 2

DY
SCD1U16V2ZY-2GP

M_CKE3

7,12

8 7 6 5

M_B_BS#0 M_B_WE# M_B_CAS# M_CS3#

8,12 8,12 8,12 7,12

Place these Caps near DM1


M_ODT0 M_CS0# M_A_RAS# 7,12 7,12 8,12 1D8V_S3 1 C260 1 C299 1 C548 1 C558 M_A_BS#0 M_A_WE# M_A_CAS# M_ODT1 8,12 8,12 8,12 7,12 1 C535 1 C527 1 C567 1 C270 1 C554 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SC2D2U6D3V3MX-1-GP 2 SC2D2U6D3V3MX-1-GP 2 SC2D2U6D3V3MX-1-GP 2 SC2D2U6D3V3MX-1-GP 2 SC2D2U6D3V3MX-1-GP

Place these Caps near DM2


1D8V_S3 1 C239 1 C560 1 C544 1 C211 1 C555 1 C541 1 C562 1 C526 1 C536 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SC2D2U6D3V3MX-1-GP 2 SC2D2U6D3V3MX-1-GP 2 SC2D2U6D3V3MX-1-GP 2 SC2D2U6D3V3MX-1-GP 2 SC2D2U6D3V3MX-1-GP

8 7 6 5

8 7 6 5

M_A_BS#1

8,12

8 7 6 5

8 7 6 5

M_CKE0 M_A_BS#2

7,12 8,12

8 7 6 5

M_CKE1

7,12

8 7 6 5

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

DDR2 Termination Resistor


Size Document Number Rev

D45/D46
Date: Wednesday, March 19, 2008 Sheet 13 of 47

PD

LCD CONNECTOR
DCBATOUT 1 C87 SC10U25V6KX-1GP 1 C90 SCD1U25V3KX-GP ACES-CONN40C-1-GP-U2 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 3D3V_S0 EC24 1 LCD1 42 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 TXACLKTXACLK+ TXAOUT0TXAOUT0+ TXAOUT1TXAOUT1+ TXAOUT2TXAOUT2+ TXBCLKTXBCLK+ TXBOUT0TXBOUT0+ TXBOUT1TXBOUT1+ TXBOUT2TXBOUT2+ 2 2
D

42 ATI_TXAOUT042 ATI_TXAOUT0+ 42 ATI_TXAOUT142 ATI_TXAOUT1+ 42 ATI_TXAOUT242 ATI_TXAOUT2+

RN9 1 SRN0J-6-GP 2

4 3 4 3 4 3 3 4

TXAOUT0TXAOUT0+ TXAOUT1TXAOUT1+ TXAOUT2TXAOUT2+ TXACLKTXACLK+

1 2 1 2 1 2 2 1

4 RN10 3 SRN0J-6-GP

VGA
RN51 1 SRN0J-6-GP 2

UMA
4 RN50 3 SRN0J-6-GP

GMCH_TXAOUT0- 7 GMCH_TXAOUT0+ 7 GMCH_TXAOUT1- 7 GMCH_TXAOUT1+ 7 GMCH_TXAOUT2- 7 GMCH_TXAOUT2+ 7 GMCH_TXACLK- 7 GMCH_TXACLK+ 7

VGA
RN53 1 SRN0J-6-GP 2

UMA
4 RN52 3 SRN0J-6-GP

5V_CAM_S0 C103 SCD1U16V2ZY-2GP ID_CLK ID_DAT 28 BRIGHTNESS 28 BLON_OUT 1 17 17 2 USBPN6 USBPP6 1

TOP VIEW
42 ATI_TXACLK42 ATI_TXACLK+

VGA
RN48 2 SRN0J-6-GP 1

UMA
RN49 3 4 SRN0J-6-GP

20

21
42 ATI_TXBOUT042 ATI_TXBOUT0+ 42 ATI_TXBOUT142 ATI_TXBOUT1+ 42 ATI_TXBOUT242 ATI_TXBOUT2+ 42 ATI_TXBCLK42 ATI_TXBCLK+

VGA

UMA

RN57 2 SRN0J-6-GP 1

3 4 3 4 4 3 3 4

TXBOUT0TXBOUT0+ TXBOUT1TXBOUT1+ TXBOUT2TXBOUT2+ TXBCLKTXBCLK+

2 1 2 1 1 2 2 1

RN56 3 4 SRN0J-6-GP

R102 10KR2F-2-GP

VGA
RN29 2 SRN0J-6-GP 1

UMA
RN30 3 4 SRN0J-6-GP

GMCH_TXBOUT0- 7 GMCH_TXBOUT0+ 7 GMCH_TXBOUT1- 7 GMCH_TXBOUT1+ 7 GMCH_TXBOUT2- 7 GMCH_TXBOUT2+ 7 GMCH_TXBCLK- 7 GMCH_TXBCLK+ 7

VGA
RN27 1 SRN0J-6-GP 2

UMA
4 RN28 3 SRN0J-6-GP

40

VGA
RN55 2 SRN0J-6-GP 1

UMA
RN54 3 4 SRN0J-6-GP

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2 SCD1U16V2ZY-2GP

VGA

UMA

LCDVDD_S0

RN6

C116

C117

2 1

3 4

3D3V_S0

SB

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SRN10KJ-5-GP

LCDVDD_S0

42 ATI_EDID_CLK 42 ATI_EDID_DATA

RN17 1 SRN0J-6-GP 2

4 3

ID_CLK ID_DAT

1 2

4 RN11 3 SRN0J-6-GP

VGA

UMA

CLK_DDC_EDID DAT_DDC_EDID

7 7

1 U12 3D3V_S0 1 C110 SCD1U16V2ZY-2GP 5 6 7 8 9 IN#5 IN#6 IN#7 IN#8 GND 2 C112 SC1U10V2KX-1GP

DIS
GND EN OUT IN#1 4 3 2 1 LCDVDD_ON 1 1 2 R108UMA 0R2J-2-GP 1 2 0R2J-2-GP R107 ATI_LCDVDD_ON 42 7 GMCH_LCDVDD_ON

G5281RC1U-GP 74.05281.093 2
B

R106 100KR2J-1-GP

WEBCAM POWER
U10 5V_S0 1 C86 SCD1U16V2ZY-2GP 5 6 7 8 9 IN#5 IN#6 IN#7 IN#8 GND
B

GND EN OUT IN#1

4 3 2 1

CAMERA_EN 28 5V_CAM_S0 1

R343 3D3V_S0 1 2 WLAN_LED# A 1KR2J-1-GP R344 1 2

3D3V_S0

PWR_LED#1

LED-O-16-GP PWRLED1 2 LED-G-62-GP STBYLED1 K

PWR_LED#

28

3D3V_S5

150R2J-L1-GP-U R345 1 2 STBY_LED#1 1KR2J-1-GP R338 1 2 150R2J-L1-GP-U

STDBY_LED# 28

3D3V_S0

HDD_LED#

LED-O-16-GP HDDLED1 1 2 LED-G-62-GP

MEDIA_LED# 16

PD
A

CHGLED1 3D3V_S5 1 R341 2 CHG_LED#1 A K LED-O-16-GP CAPSLED1 2 CHARGE_LED# 28 2K2R2J-2-GP R339 1 2 CAPS_LED#1 150R2J-L1-GP-U R340 1 2 NUM_LED#1 150R2J-L1-GP-U

LED Location and Sequence ( The edge of PCB,Top view )


PWR ON Left side MEDIA CAP. Right side

ZZZZ

WIRELED1 K

WLAN_TEST_LED# 28

G5281RC1U-GP 74.05281.093

R91 100KR2J-1-GP

C101 SC1U10V2KX-1GP

Wistron Corporation
CAP_LED# 28 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title NUM_LED# 28 WLAN STDBY CHARGER NUM. Size A3 Document Number

3D3V_S0

3D3V_S0

LED-G-62-GP NUMLED1 1 2 LED-G-62-GP

LCD CONN / LED / WEBCAM D45/D46


Sheet
1

Rev

PD
14 of 47

Date: Friday, March 14, 2008


5 4 3 2

Layout Note: Place these resistors close to the CRT-out connector

Ferrite bead impedance: 10 ohm@100MHz PD use 22 ohm 68.00215.211


L14 CRT_R1 1 2 CRT_R

CRT I/F & CONNECTOR


CRT1 17 11 DAT_DDC1_5 12 13 14 15 16 1 1 1 EC4 SC15P50V2JN-2-GP EC1 SC15P50V2JN-2-GP EC3 SC100P50V2JN-3GP SC100P50V2JN-3GP 1 EC2 SC100P50V2JN-3GP SC100P50V2JN-3GP 6 1 7 2 8 3 9 4 10 5 CRT_R 5V_CRT_S0 CRT_G CRT_B
4

GMCH_RED

R357 1 R363 1

UMA VGA UMA VGA UMA VGA

2 0R2J-2-GP 2 0R2J-2-GP

42 ATI_CRT_RED
4

FCM2012CF-220T05-GP L13

7 GMCH_GREEN 42 ATI_CRT_GREEN

R356 1 R362 1

2 0R2J-2-GP 2 0R2J-2-GP

CRT_G1

CRT_G

PD
FCM2012CF-220T05-GP L12

JVGA_HS JVGA_VS

GMCH_BLUE

R355 1 R361 1

2 0R2J-2-GP 1 1 1 2 0R2J-2-GP

CRT_B1

CRT_B

CLK_DDC1_5

42 ATI_CRT_BLUE

FCM2012CF-220T05-GP R350 150R2F-1-GP 1 1 1 1 1 EC65 SC1P50V2CN-1GP EC64 SC1P50V2CN-1GP EC63 SC1P50V2CN-1GP EC61 SC1P50V2CN-1GP EC60 SC1P50V2CN-1GP 1 EC59 SC1P50V2CN-1GP

R352 150R2F-1-GP

R351 150R2F-1-GP

DY
2

DY

C1 SCD01U50V2ZY-1GP

Layout Note: * Must be a ground return path between this ground and the ground on the VGA connector. Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.

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3D3V_S0 1 3D3V_S0 R1 10KR2F-2-GP 5V_S0 D15 BAV99-5-GP 2 2 1 C442 CRT_R 3

VIDEO-15-42-GP-U 20.20378.015

DY

5V @ ext. CRT side

14

Hsync & Vsync level shift


UMA VGA
2 0R2J-2-GP 2 0R2J-2-GP HSYNC_4

SCD1U16V2ZY-2GP

D14

7 GMCH_DDCDATA 42 ATI_DDCDATA

R2 R4

1 1

UMA VGA

2 0R2J-2-GP 2 0R2J-2-GP

CRT_DAT

DAT_DDC1_5

BAV99-5-GP 2

Q1 2N7002-11-GP

42

7 GMCH_HSYNC ATI_HSYNC

R365 1 R364 1

HSYNC_5

1 R360 2 JVGA_HS 0R0402-PAD

CRT_G 3

DY

14

U23A TSAHCT125PW-GP D13 VSYNC_5 1 R346 2 JVGA_VS 0R0402-PAD CRT_B 3

1 BAV99-5-GP 2

7 GMCH_DDCCLK 42 ATI_DDCCLK

R3 R5

1 1

UMA VGA

2 0R2J-2-GP CRT_CLK S 2 0R2J-2-GP RN1 2 1

Q2 2N7002-11-GP D 3D3V_S0

CLK_DDC1_5 42

7 GMCH_VSYNC ATI_VSYNC

R348 1 R349 1

UMA VGA

2 0R2J-2-GP 2 0R2J-2-GP

VSYNC_4

6 U23B TSAHCT125PW-GP

DY
1

SRN10KJ-5-GP 3 4 3 4 SRN10KJ-5-GP EC66 SC15P50V2JN-2-GP

F1 5V_S0 1 2 A FUSE-1D1A6V-4GP-U
2

D16 K RB751V-40-2-GP RN2 5V_CRT_S0 2 1

EC67 SC15P50V2JN-2-GP

PD

TV CONN
3D3V_S0

VGA
C438 1 2 SC33P50V2JN-3GP LUMA_1 1 C434 SC270P50V2KX-1GP 5 1 3 4 2 6 GND GND LUMA CRMA GND GND CRMA_1 MINDIN4-29-GP 22.10021.E91 3 TVOUT1 LUMA_1 3

D12

BAV99-5-GP 2

42 ATI_TV_LUMA 2 1 R359 75R2F-2-GP

L16 1 2 IND-1D2UH-5-GP

DY
1 D11 BAV99-5-GP 2

PD
1

VGA
1

VGA
C437 1 L15

C440 SC150P50V2JN-3GP

VGA

VGA
2 SC33P50V2JN-3GP

DY
1
1

VGA
CRMA_1 1 C433 SC270P50V2KX-1GP

42 ATI_TV_CRMA 2 1 R358 75R2F-2-GP

1 2 IND-1D2UH-5-GP

VGA

VGA
1

VGA

C439 SC150P50V2JN-3GP

VGA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number

VGA

CRT/TV Connector D45/D46


E

Rev

PD
15 of 47

Date: Tuesday, March 18, 2008


A B C D

Sheet

C368 1

SC10P50V2JN-4GP 2

RTC_X1

3D3V_AUX_S5
D

D25 2 3 1 RTC_AUX_S5 SC1U16V3ZY-GP

X-32D768KHZ-38GPU

1 R250 10MR2J-L-GP 1 2 1D05V_S0 1

X3

C728 2 C362 1 SC10P50V2JN-4GP 2 RTC_X2 C23 C24 A25 F20 C22 B22 A22 E25 LAN_RSTSYNC TP109 C13 F14 G13 D14 D13 D12 E13 B10 B28 B27 U57A RTCX1 RTCX2 1 OF 6 FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3 FWH4/LFRAME# LDRQ0# LDRQ1#/GPIO23 A20GATE A20M# K5 K4 L6 K2 K3 J3 J1 N7 AJ27 AJ25 AE23 H_DPRSTP# H_FERR#_R LDRQ0# 3D3V_LDRQ1_S0 LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3 LPC_LFRAME# 27,28 TP66 TP125 KA20GATE 28 H_A20M# 4 H_DPRSTP# 4,7,32 H_DPSLP# 4 1D05V_S0 1 LPC_LAD[0..3] LPC_LAD[0..3] 27,28

RTC_BAT_R

BAS40CW-GP

RTC1 PWR GND NP1 NP2 1 2 NP1 NP2 RTC_BAT 1 R566

DY
H_DPSLP# 2

R307 56R2J-4-GP

C711 SCD1U16V2ZY-2GP

20

INTRUDER#

INTVRMEN LAN100_SLP

BAT-CON2-1-GP-U

DY

INTVRMEN LAN100_SLP GLAN_CLK LAN_RSTSYNC LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2

62.70001.011

RTC LPC

2 1KR2J-1-GP

R517 1 R254 1 1

2 20KR2J-L2-GP 2 20KR2J-L2-GP R525 2 1MR2J-1-GP C366 C657 SC1U16V3ZY-GP SC1U16V3ZY-GP

RTC_RST# SRTC_RST# INTRUDER#

RTCRST# SRTCRST# INTRUDER#

29

www.kythuatvitinh.com
FERR# AJ26 1 R604 2 56R2J-4-GP 2 H_FERR# 4

GLAN_COMP place within 500 mil of ICH9M DY

LAN / GLAN CPU

DPRSTP# DPSLP#

R603 56R2J-4-GP

CPUPWRGD IGNNE# INIT# INTR RCIN# NMI SMI#

AD22

H_PWRGD 4 H_IGNNE# 4

1D05V_S0

PD

22 ACZ_BTCLK_MDC

EC56 1 2 SC12P50V2JN-3GPR320 22R2J-2-GP 1 2 R321 22R2J-2-GP 1 2 1

AF25

3D3V_S5 1D5V_S0

1 R265 1 R261

GLAN_DOCK# 10KR2J-3-GP 2 GLAN_COMP 24D9R2F-L-GP 2

GLAN_DOCK#/GPIO56 GLAN_COMPI GLAN_COMPO HDA_BIT_CLK HDA_SYNC HDA_RST#

AE22 AG25 L3 AF23 AF24

H_INIT# 4,27 H_INTR 4 KBRCIN# 28

H_PWRGD 1 R308

DY

2 200R2F-L-GP

PD

ACZ_BITCLK

ACZ_BIT_CLK

EC57

22,29 ACZ_SYNC

DY

TP144 22,29 ACZ_SDATAOUT 1 R305 2 33R2J-2-GP ACZ_SDATAOUT_R

3D3V_S0

PD
AG5 AG7 AE8 AG8

IHDA

22,29 ACZ_RST# 29 ACZ_SDATAIN0 22 ACZ_SDATAIN1

R304 2 33R2J-2-GP R322 1 2 33R2J-2-GP

PD

ACZ_SYNC_R

AF6 AH4

H_SMI#_R

H_NMI 4 1 2 R311 0R2J-2-GP H_STPCLK# 4 1 R306

H_SMI# 4

1D05V_S0

ACZ_RST#_R

AE7

STPCLK#

AH27

ACZ_SDIN2

AF4 AG4 AH3 AE5

THRMTRIP# PECI SATA4RXN SATA4RXP SATA4TXN SATA4TXP SATA5RXN SATA5RXP SATA5TXN SATA5TXP

AG26

H_THERMTRIP_R ICH_TP8

HDA_SDIN0 HDA_SDIN1 HDA_SDIN2 HDA_SDIN3

2 54D9R2F-L1-GP

1 R315 R313 1

2 56R2J-4-GP 2 0R2J-2-GP

SC22P50V2JN-4GP

PM_THRMTRIP-A# 4,7

AG27

TP75

DY

Layout note: R373 needs to placed within 2" of ICH9, R379 must be placed within 2" of R373 w/o stub

HDA_SDOUT

HDA_DOCK_RST# TP71 14 3D3V_S0 R597 1 2 10KR2J-3-GP


B

HDA_DOCK_EN# 1 DY 2 R303 8K2R2J-3-GP

HDA_DOCK_EN#/GPIO33 HDA_DOCK_RST#/GPIO34 SATALED#

AH11 AJ11 AG12 AF12 AH9 AJ9 AE10 SATA_TXN5_C AF10 SATA_TXP5_C AH18 AJ18 AJ7 AH7 SATARBIAS

E-SATA
SATA_RXN5_C SATA_RXP5_C SCD01U25V2KX-3GP2 SCD01U25V2KX-3GP2 CLK_PCIE_SATA# 3 CLK_PCIE_SATA 3 2 R596 1 24D9R2F-L-GP
B

MEDIA_LED# SATA_RXN0_C SATA_RXP0_C SATA_TXN0 SATA_TXP0

MEDIA_LED#

C761 1 C760 1

SATA

21 21 21 21

SATA-HDD SATA_RXN0_C
SATA_RXP0_C SCD01U25V2KX-3GP 2 SCD01U25V2KX-3GP 2

AJ16 AH16 SATA_TXN0_C AF17 SATA_TXP0_C AG17 SATA_RXN1_C SATA_RXP1_C SATA_TXN1_C SATA_TXP1_C AH13 AJ13 AG14 AF14

SATA0RXN SATA0RXP SATA0TXN SATA0TXP SATA1RXN SATA1RXP SATA1TXN SATA1TXP

1 C758 1 C759

SATA_RXN5_C 22 SATA_RXP5_C 22 SATA_TXN5 22 SATA_TXP5 22

SATA_CLKN SATA_CLKP SATARBIAS# SATARBIAS

21 SATA_RXN1_C 21 SATA_RXP1_C 21 SATA_TXN1 21 SATA_TXP1

C756 1 C757 1

SCD01U25V2KX-3GP 2 SCD01U25V2KX-3GP 2

SATA-ODD

Place within 500 mils of ICH9 ball

ICH9M-GP-NF 71.ICH9M.00U

D4546

SB use

71.ICH9M.E0U

RTC_AUX_S5 1

RTC_AUX_S5 1

R523 330KR2F-L-GP 2 INTVRMEN R524 0R2J-2-GP 2

R502 330KR2F-L-GP

integrated VccSus1_05,VccSus1_5,VccCL1_5
A

LAN100_SLP R510 0R2J-2-GP

INTVRMEN LAN100_SLP

High=Enable High=Enable

Low=Disable Low=Disable
Title Size Document Number

integrated VccLan1_05VccCL1_05

DY
2

DY
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

ICH9-M (1 of 4) D45/D46
1

Rev

PD
16 of 47

Date: Tuesday, March 25, 2008


5 4 3 2

Sheet

U57C U57B D11 C8 D9 E12 E9 C9 E10 B7 C7 C5 G11 F8 F11 E7 A3 D2 F10 D5 D10 B3 F7 C3 F3 F4 C1 G7 H7 D1 G5 H6 G1 H3 INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD# J5 E1 J6 C4 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 PIRQA# PIRQB# PIRQC# PIRQD# 2 OF 6 REQ0# GNT0# REQ1#/GPIO50 GNT1#/GPIO51 REQ2#/GPIO52 GNT2#/GPIO53 REQ3#/GPIO54 GNT3#/GPIO55 C/BE0# C/BE1# C/BE2# C/BE3# IRDY# PAR PCIRST# DEVSEL# PERR# PLOCK# SERR# STOP# TRDY# FRAME# PLTRST# PCICLK PME# F1 G4 B6 A7 F13 F12 E6 F6 D8 B4 D6 A5 PCI_REQ#0 PCI_GNT#0 PCI_REQ#1 PCI_GNT#1 PCI_REQ#2 PCI_GNT#2 PCI_REQ#3 PCI_GNT#3 PCI_C/BE#0 PCI_C/BE#1 PCI_C/BE#2 PCI_C/BE#3 19,25 SMB_CLK 19,25 SMB_DATA TP102 TP107 TP65 TP112 TP115 TP104 TP103 TP106 3D3V_S5 3D3V_S0 1 1 R262 1 1 R506 G16 A13 SMB_LINK_ALERT# E17 SMLINK0 C17 2 10KR2J-3-GP SMLINK1 B18 2 10KR2J-3-GP PM_RI# F19 TP67 R251 M6 SMB_ALERT# A17 A14 E19 28 PM_CLKRUN# 23,25,26 PCIE_WAKE# 28 INT_SERIRQ 20 THRM# L4 E20 M5 AJ23 D21 A20 PM_SUS_STAT# DBRESET# R4 G19 SMBCLK SMBDATA LINKALERT#/GPIO60/CLGPIO4 SMLINK0 SMLINK1 RI# SUS_STAT#/LPCPD# SYS_RESET# PMSYNC#/GPIO0 SMBALERT#/GPIO11

3 OF 6 SATA0GP/GPIO21 SATA1GP/GPIO19 SATA4GP/GPIO36 SATA5GP/GPIO37 CLK14 CLK48 SUSCLK SLP_S3# SLP_S4# SLP_S5# S4_STATE#/GPIO26 AH23 AF19 AE21 AD20 H1 AF3 P1 C16 E16 G17 C10 G20 M2 B13 R3 D20 D22 R5 R6 B16 PM_SLP_M# F24 B19 C_LINK_CLK F22 C19 C_LINK_DAT C25 A19 PWROK TP113 CL_CLK0 7 C_LINK_CLK 25 CL_DATA0 7 C_LINK_DAT 25 CL_VREF0_ICH CL_VREF1_ICH SATA0GP SATA1GP ICH_GPIO36 ICH_GPIO37 CLK_ICH14 CLK48_ICH 3 3 8 7 6 5 2

RN45 ICH_GPIO37 ICH_GPIO36 SATA1GP SATA0GP

3D3V_S0 1 2 3 4 SRN10KJ-6-GP 1

PCI

SMB

Clocks

SATA GPIO

R601 10KR2J-3-GP

PM_SUS_CLK 20 PM_SLP_S3# 20,25,28,30,34,35,36,37 PM_SLP_S4# 25,28,34,35 TP64 S4_STATE# TP117 PWROK PM_DPRSLPVR_R PM_BATLOW#_R PWRBTN#_ICH PM_LAN_ENABLE RSMRST#_SB 2 CLK_PWRGD 7,20 3 7,20 R562 1 2 0R2J-2-GP R560 1 2 DY 100KR2J-1-GP 1 D26 3 BAS16-1-GP

DY
2

R513

10KR2J-3-GP 7 PM_SYNC# 10KR2J-3-GP 2

DY

SLPS5#

D3 E3 R1 C6 E4 C2 J4 A4 F5 D7

3 3 PCI_IRDY# PCI_PAR TP124 PCIRST# 1 R565 2 PCIRST1# 23,25,41 PCI_DEVSEL# 56R2J-4-GP PCI_PERR# PCI_LOCK# PCI_SERR# PCI_STOP# PCI_TRDY# PCI_FRAME# R260 PLT_RST#_R 2 1 PLT_RST1# 7,25,26,27,28 0R2J-2-GP C14 1 2 C380 DY SC100P50V2JN-3GP D4 R2 PCLK_ICH 3 ICH_PME TP126

SYS GPIO Power MGT

PM_STPPCI# PM_STPCPU#

STP_PCI# STP_CPU# CLKRUN# WAKE# SERIRQ THRM# VRMPWRGD SST TACH1/GPIO1 TACH2/GPIO6 TACH3/GPIO7 GPIO8 LAN_PHY_PWR_CTRL/GPIO12 ENERGY_DETECT/GPIO13 TACH0/GPIO17 GPIO18 GPIO20 SCLOCK/GPIO22 GPIO27 GPIO28 SATACLKREQ#/GPIO35 SLOAD/GPIO38 SDATAOUT0/GPIO39 SDATAOUT1/GPIO48 GPIO49 GPIO57/CLGPIO5 SPKR MCH_SYNC# TP3 PWM0 PWM1 PWM2

PWROK DPRSLPVR/GPIO16 BATLOW# PWRBTN# LAN_RST# RSMRST# CK_PWRGD CLPWROK SLP_M# CL_CLK0 CL_CLK1

PM_DPRSLPVR

7,32

3D3V_S0

SB

UMA DY_RTL

7,32 VGATE_PWRGD 1 R520

VGATE_PWRGD

PM_PWRBTN# 28

R290 R559 R599 10KR2J-3-GP 10KR2J-3-GP CLK_SEL 10KR2J-3-GP 28 28 PCB_VER3 SB_ECSCI# ECSWI# 2 1 1

DY2 ICH_TP7 0R2J-2-GP


SB_ECSCI#

ECSWI#

GAP-OPEN 1 2

Interrupt I/F
PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5

PCI_REQ#0 INT_PIRQB# PCI_PERR# PCI_LOCK#


C

3D3V_S5 1

C654 SCD1U10V2KX-4GP 2 1

3D3V_S0

INT_SERIRQ 3D3V_S0

ICH9_GPIO57

3D3V_S5

3D3V_S5

SRN8K2J-2-GP-U

R521 100KR2J-1-GP

PCI_REQ#2 PM_CLKRUN#

www.kythuatvitinh.com
ICH9M-GP-NF

DIS 10KR2J-3-GP ICS 10KR2J-3-GP


1 1

2 10KR2J-3-GP

MISC GPIO Controller Link

H4 K6 F2 G2

INT_PIRQE# INT_PIRQF# INT_PIRQG# INT_PIRQH#

G38

3D3V_S0 R558 R598

R637

CL_DATA0 CL_DATA1 CL_VREF0 CL_VREF1 CL_RST0# CL_RST1#

SB

71.ICH9M.00U 3D3V_S0

1 2 3 4 5

10 9 8 7 6

INT_PIRQE# INT_PIRQH# INT_PIRQA# INT_PIRQC#

INT_PIRQD# PCI_IRDY# PCI_REQ#3 PCI_TRDY#

3D3V_S0

1 2 3 4 5

10 9 8 7 6

INT_PIRQG# PCI_SERR# INT_PIRQF# SB_ECSCI#

ICH_TP3

TP58

RP5

RP2

3D3V_S0

GPIO49 should be pulled down to GND only when using Teenah. When using Cantiga, this ball should be left as No Connect.

29 ACZ_SPKR 7 MCH_ICH_SYNC#

M7 AJ24 B21 AH20 AJ20 AJ21

GPIO24/MEM_LED GPIO10/SUS_PWR_ACK GPIO14/AC_PRESENT GPIO9/WOL_EN

A16 C18 C11 C20

ICH9_GPIO24 SUS_PWR_ACK ICH9_GPIO14 ICH9_GPIO9

TP105

R495 3K24R2F-GP

25

C373 SCD1U10V2KX-4GP 2

R602 DY 1 1KR2J-1-GP

F21 D18 C_LINK_RST

CL_RST#0 7 C_LINK_RST

3D3V_S5

2 R256 453R2F-1-GP

TP74

AG19 AH21 AG21 A21 C12 C21 AE18 ICH9_GPIO18 K1 ICH9_GPIO20 AF8 SCLOCK AJ22 A9 D19 L1 PCB_VER0 AE19 PCB_VER1 AG22 SDATAOUT1 AF21 ICH9_GPIO49 AH24 ICH9_GPIO57 A8

3D3V_S0

R255 3K24R2F-GP

SRN8K2J-2-GP-U RP1

SRN8K2J-2-GP-U

R253

1 2 3 4 5

3D3V_S0 10 9 PCI_STOP# 8 PCI_DEVSEL# PCI_REQ#1 7 6 PCI_FRAME#

DY 10KR2J-3-GP

R522

71.ICH9M.00U

ICH9M-GP-NF

R266 10KR2J-3-GP 100KR2J-1-GP

R499 453R2F-1-GP

3D3V_S5 RP4 ECSWI# USB_OC#1 USB_OC#0 USB_OC#5 3D3V_S5 1 2 3 4 5 SRN10KJ-L3-GP 10 9 8 7 6 RN37 3D3V_S5 SUS_PWR_ACK SMB_LINK_ALERT# SMB_ALERT# PM_BATLOW#_R USB_OC#9 USB_OC#10 USB_OC#8 8 7 6 5 SRN10KJ-6-GP 1 2 3 4

Layout Note: PCIE AC coupling caps need to be within 250 mils of the driver.

USB_OC#11 1 R281 U57D 4 OF 6 DMI0RXN DMI0RXP DMI0TXN DMI0TXP DMI1RXN DMI1RXP DMI1TXN DMI1TXP DMI2RXN DMI2RXP DMI2TXN DMI2TXP DMI3RXN DMI3RXP DMI3TXN DMI3TXP V27 V26 U29 U28 Y27 Y26 W29 W28 AB27 AB26 AA29 AA28 AD27 AD26 AC29 AC28 T26 T25 AF29 AF28 AC5 AC4 USBPN1 AD3 USBPP1 AD2 AC1 AC2 AA5 AA4 AB2 AB3 AA1 AA2 W5 W4 USBPN7 Y3 USBPP7 Y2 W1 W2 V2 V3 U5 U4 U1 U2 DMI_RXN0 DMI_RXP0 DMI_TXN0 DMI_TXP0 DMI_RXN1 DMI_RXP1 DMI_TXN1 DMI_TXP1 DMI_RXN2 DMI_RXP2 DMI_TXN2 DMI_TXP2 DMI_RXN3 DMI_RXP3 DMI_TXN3 DMI_TXP3 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 1D5V_S0 RP3 USB_OC#3 PCIE_WAKE# PM_RI# DBRESET# 1 2 3 4 5 SRN10KJ-L3-GP 1 10 9 8 7 6 3D3V_S5 USB_OC#2 USB_OC#6 USB_OC#7 USB_OC#4

2 10KR2J-3-GP

GLAN
23 23 23 23

C709 C708

SCD1U16V2KX-3GP 2 SCD1U16V2KX-3GP 2

1 1

WWAN CARD
25 25 25 25 25 25 25 25 25 25 25 25 26 26 26 26

MINICARD
PCIE_RXN3 PCIE_RXP3 PCIE_TXN3 PCIE_TXP3 PCIE_RXN4 PCIE_RXP4 PCIE_TXN4 PCIE_TXP4 PCIE_RXN5 PCIE_RXP5 PCIE_TXN5 PCIE_TXP5 C696 C697 SCD1U10V2KX-5GP 2 SCD1U10V2KX-5GP 2 1 1 TXN3 TXP3

PCIE_RXN2 PCIE_RXP2 PCIE_TXN2 PCIE_TXP2

C706 C705

SCD1U10V2KX-5GP 2 SCD1U10V2KX-5GP 2

1 1

TXN2 TXP2

L29 L28 M27 M26 J29 J28 K27 K26 G29 G28 H27 H26 E29 E28 F27 F26 C29 C28 D27 D26

Direct Media Interface

PCIE_RXN1 PCIE_RXP1 PCIE_TXN1 PCIE_TXP1

N29 N28 GLAN_TXN_C P27 GLAN_TXP_C P26

PERN1 PERP1 PETN1 PETP1 PERN2 PERP2 PETN2 PETP2

SB

3D3V_S5

3D3V_S0
B

10KR2J-3-GP

PCI-Express

NEW CARD

PERN3 PERP3 PETN3 PETP3 PERN4 PERP4 PETN4 PETP4 PERN5 PERP5 PETN5 PETP5 PERN6/GLAN_RXN PERP6/GLAN_RXP PETN6/GLAN_TXN PETP6/GLAN_TXP

R301

R309 10KR2J-3-GP 2

PCB_VER0 PCB_VER1

CARD READER
C792 C793 SCD1U10V2KX-5GP 2 SCD1U10V2KX-5GP 2 1 1 TXN5 TXP5

C694 C692

SCD1U10V2KX-5GP 2 SCD1U10V2KX-5GP 2

1 1

TXN4 TXP4

DMI_CLKN DMI_CLKP

CLK_PCIE_ICH# 3 CLK_PCIE_ICH 3 DMI_IRCOMP_R USBPN0 22 USBPP0 22 TP72 TP73 USBPN2 22 USBPP2 22 USBPN3 22 USBPP3 22 USBPN4 22 USBPP4 22 USBPN5 22 USBPP5 22 USBPN6 14 USBPP6 14 TP130 TP131 USBPN8 25 USBPP8 25 USBPN9 25 USBPP9 25 USBPN10 25 USBPP10 25 2

SB

DMI_ZCOMP DMI_IRCOMP

3D3V_S0 ACZ_SPKR SDATAOUT1 1 DY 2 R280 1KR2J-1-GP 1 DY 2 10KR2J-3-GP R312 1 R600 2 10KR2J-3-GP 1 R264

DY

DY

TP59 TP61 TP57 TP60 22 22 USB_OC#0 USB_OC#2

SPI

SPI_MOSI SPI_MISO USB_OC#0 USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7 USB_OC#8 USB_OC#9 USB_OC#10 USB_OC#11

0 1 2 SB 3 4 5 6 7 8 9 10

USB1 NC USB2 USB3 USB4 BLUETOOTH WEBCAM NC MINICARD UMTS NEW CARD

PWROK PM_LAN_ENABLE

D25 E23 N4 N5 N6 P6 M1 N2 M4 M3 N3 N1 P5 P3

1 2 R278 10KR2J-3-GP 1 R252 2 0R2J-2-GP

DY

2 0R2J-2-GP

1 R269 10KR2J-3-GP 10KR2J-3-GP 2 2 1 3 R272 100KR2J-1-GP 1 RSMRST#_SB

SPI_CLK SPI_CS0# SPI_CS#1

D23 D24 F23

R590 2 1 22D6R2F-L1-GP R259 3D3V_S0 1

USB_RBIAS_PN AG2 AG1

USBP0N USBP0P USBP1N USBP1P SPI_CLK USBP2N SPI_CS0# USBP2P SPI_CS1#/GPIO58/CLGPIO6 USBP3N USBP3P SPI_MOSI USBP4N SPI_MISO USBP4P USBP5N OC0#/GPIO59 USBP5P OC1#/GPIO40 USBP6N OC2#/GPIO41 USBP6P OC3#/GPIO42 USBP7N OC4#/GPIO43 USBP7P OC5#/GPIO29 USBP8N OC6#/GPIO30 USBP8P OC7#/GPIO31 USBP9N OC8#/GPIO44 USBP9P OC9#/GPIO45 USBP10N OC10#/GPIO46 USBP10P OC11#/GPIO47 USBP11N USBP11P USBRBIAS USBRBIAS#

USB Pair Device

R300 24D9R2F-L-GP

No Reboot Strap SPKR LOW = Defaule High=No Reboot

R302 10KR2J-3-GP

R310

PlanarID (1,0) SA: 0,0 SB: 0,1 SC: 1,1

10KR2J-3-GP

SCLOCK

3D3V_S5

D10

USB

28 RSMRST#_KBC

BOOT BIOS Strap


BAT54-7-F-GP

PCI_GNT#0 SPI_CS#1

BOOT BIOS Location

A16 swap override strap PCI_GNT#3

0 1 1

1 0 1

SPI PCI LPC(Default)


ZZZZ

ICH9M-GP-NF 2 SPI_MOSI 71.ICH9M.00U

low = A16 swap override enable high = default


PCI_GNT#0 1 R501 SPI_CS#1 1 R277 PCI_GNT#3 1 R514 1KR2J-1-GP 2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Date: Document Number

DY

DY DY DY

1KR2J-1-GP 2 1KR2J-1-GP 2

1KR2J-1-GP

ICH9-M (2 of 4) D45/D46
1

Rev

PD
17 of 47

Friday, March 14, 2008

Sheet

RTC_AUX_S5

U57F

6 OF 6 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCCDMIPLL VCCDMI VCCDMI V_CPU_IO V_CPU_IO VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 A15 B15 C15 D15 E15 F15 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18 R29 W23 1D05V_DMI_ICH_S0 Y23 AB23 AC23

6uA in G3
C669 SCD1U10V2KX-4GP SCD1U10V2KX-4GP 1 V5REF_S0 V5REF_S5 2

A23 A6 AE1 AA24 AA25 AB24 AB25 AC24 AC25 AD24 AD25 AE25 AE26 AE27 AE28 AE29 F25 G25 H24 H25 J24 J25 K24 K25 L23 L24 L25 M24 M25 N23 N24 N25 P24 P25 R24 R25 R26 R27 T24 T27 T28 T29 U24 U25 V24 V25 U23 W24 W25 K23 Y24 Y25 AJ19

VCCRTC V5REF V5REF_SUS VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B

1.634A
Layout Note: Place near ICH9M 1 1 1 1 1 1 C370 SCD1U10V2KX-4GP C398 SCD1U10V2KX-4GP C391 SCD1U10V2KX-4GP C396 SCD1U10V2KX-4GP C407 SCD1U10V2KX-4GP

1D05V_S0

C663 SCD1U10V2KX-4GP

646mA
1D5V_S0
D

C418 SCD1U10V2KX-4GP

C417 SCD1U10V2KX-4GP

TC26

ST22U6D3VBM-1GP

ST220U6D3VDM-15GP

ST22U6D3VBM-1GP

DY
2

DY
2 2

TC12 2 2

C383 TC13 SC2D2U10V3KX-1GP SC2D2U10V3KX-1GP

1 R258 2 0R0603-PAD

ST220U6D3VDM-15GP

DY
2

TC29 2

1D5V_DMIPLL_ICH_S0

PD

23mA

1D5V_S0

CORE

PD

C716 SCD01U16V2KX-3GP

2 1 IND-1D2UH-5-GP L34 C712 SC10U6D3V5MX-3GP 1D05V_S0

C412

C410

C405

R285 1 0R0603-PAD

SCD1U10V2KX-4GP

SC4D7U6D3V3MX-2GP SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP

*Within a given well, 5VREF needs to be up before the corresponding 3.3V rail

DY
2 2

48mA
1D05V_S0

2mA
V5REF_S0
C

Layout Note: Place near ICH9

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1 1 1 1 AG29 AJ6 C401 SCD1U10V2KX-4GP SCD1U10V2KX-4GP C413 SCD1U10V2KX-4GP 1 2 3D3V_S0 2 5V_S0 1 1D5V_S0 L35 1D5V_APLL_S0 3D3V_S0 C404 2 1 CH751H-40PT D22 R518 100R2J-2-GP 1 2 C764 SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP C762 SC1U10V2KX-1GP SC1U10V2KX-1GP AC10 2

47mA

2mA
SC4D7U6D3V3MX-2GP

VCC3_3=308mA
1 C422 2

VCCP_CORE

C390 SCD1U10V2KX-4GP SCD1U10V2KX-4GP

C377 SCD1U10V2KX-4GP

C388 SCD1U10V2KX-4GP SCD1U10V2KX-4GP

C670 SC1U10V2KX-1GP

AD19 AF20 AG24 AC20 B9 F9 G3 G6 J2 J7 K7

3D3V_VCCPCORE_ICH_S0

3D3V_S0

3D3V_S0 R297 1 0R0603-PAD

1 2 IND-1D2UH-5-GP

C747 C425 SCD1U10V2KX-4GP SCD1U10V2KX-4GP

C411 SCD1U10V2KX-4GP

VCCA3GP

3D3V_S0

SCD1U10V2KX-4GP

2 2

1 R607 1D5V_S0 0R2J-2-GP

DY

11mA

3.3V_1.5V_HDA

C755 SCD1U10V2KX-4GP

DY 1 R609 0R2J-2-GP

3D3V_S5 2

5V_S5 1

SB

3D3V_S5

2mA
1 V5REF_S5 1

CH751H-40PT D29 2

R585 100R2J-2-GP

PCI

1D5V_S0

1.342A
1 1 C423 SC1U10V2KX-1GP C416 SC1U10V2KX-1GP 2

VCCHDA VCCSUSHDA VCCSUS1_05 VCCSUS1_05

AJ4 AJ3

3.3V_1.5V_HDA 3.3V_1.5V_SUS_HDA

VCCSATAPLL VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCCUSBPLL VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCCLAN1_05 VCCLAN1_05 VCCLAN3_3 VCCLAN3_3 VCCGLANPLL GLAN POWER VCCGLAN1_5 VCCGLAN1_5 VCCGLAN1_5 VCCGLAN1_5 VCCGLAN3_3 ICH9M-GP-NF USB CORE VCCPUSB

11mA

1 R606 1D5V_S0 0R2J-2-GP 1 R608 0R2J-2-GP

C754 SCD1U10V2KX-4GP SCD1U10V2KX-4GP

3.3V_1.5V_SUS_HDA

C737 SC1U10V2KX-1GP

AC16 AD15 AD16 AE15 AF15 AG15 AH15 AJ15 AC11 AD11 AE11 AF11 AG10 AG11 AH10 AJ10 AC9

AC8 VccSus1_05[1] F17 VccSus1_05[2] AD8 VccSus1_5[1] 1 F18 A18 D16 D17 E22 AF1 T1 T2 T3 T4 T5 T6 U6 U7 V6 V7 W6 W7 Y6 Y7 T7 VccSus1_5[2]

TP69 TPAD28 TP63 TPAD28 TP70 TPAD28 C392 SCD1U10V2KX-4GP

DY

SB

ARX

VCCSUS1_5 VCCSUS1_5 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCCL1_05 VCCCL1_5 VCCCL3_3 VCCCL3_3

3D3V_S5

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

VCCPSUS

C385

C374

C424 SCD1U10V2KX-4GP

C415 SCD1U10V2KX-4GP

ATX

C389 SCD1U10V2KX-4GP

DY

DY

212mA
B

3D3V_S5

DY

DY

C406

C402 SCD022U16V2KX-3GP SCD022U16V2KX-3GP

1 2

AC18 AC19 AC21 G10 G9 AC12 AC13 AC14 AJ5

SCD1U10V2KX-4GP

C403 SCD022U16V2KX-3GP

1D5V_S0

USBPLL=11mA
1 1 1 C409 SCD1U10V2KX-4GP SCD1U10V2KX-4GP C408 SCD1U10V2KX-4GP SCD1U10V2KX-4GP

1 1

G22 VccSus1_05[3] G23 VccSus1_5[3] A24 B24 3D3V_ICH_CL_S5 2

C395 SCD1U10V2KX-4GP

3D3V_S0 1 R509 2 0R0603-PAD C672 1 SCD1U10V2KX-4GP 2

19mA in S0;78mA in S3/S4/S5


C671 SCD1U10V2KX-4GP 1

19mA

3D3V_S0 R515 1 0R0603-PAD

DY
2

C376

VccLan1D05 SCD1U10V2KX-4GP

A10 A11 A12 B12 A27 D28 D29 E26 E27 A26

DY
2

C661 2 2

L33 2 1 IND-1D2UH-5-GP

23mA
1D5VGLANPLL_ICH SC2D2U10V3KX-1GP C658 SC10U6D3V5MX-3GP

1D5V_S0

C414 SCD1U10V2KX-4GP

DY

AA7 AB6 AB7 AC6 AC7

C394 SCD1U10V2KX-4GP

1D5V_S0

80mA
1 1 C686

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

SCD1U10V2KX-4GP

C685 SC4D7U6D3V3KX-GP

3D3V_S0

DY
2 2

1mA
2 R516 3D3V_GLAN_S0 1 0R0603-PAD

71.ICH9M.00U

ICH9-M (3 of 4)
Size Document Number Rev

D45/D46
Date: Friday, March 14, 2008 Sheet
1

PD
18 of 47

U57E AA26 AA27 AA3 AA6 AB1 AA23 AB28 AB29 AB4 AB5 AC17 AC26 AC27 AC3 AD1 AD10 AD12 AD13 AD14 AD17 AD18 AD21 AD28 AD29 AD4 AD5 AD6 AD7 AD9 AE12 AE13 AE14 AE16 AE17 AE2 AE20 AE24 AE3 AE4 AE6 AE9 AF13 AF16 AF18 AF22 AH26 AF26 AF27 AF5 AF7 AF9 AG13 AG16 AG18 AG20 AG23 AG3 AG6 AG9 AH12 AH14 AH17 AH19 AH2 AH22 AH25 AH28 AH5 AH8 AJ12 AJ14 AJ17 AJ8 B11 B14 B17 B2 B20 B23 B5 B8 C26 C27 E11 E14 E18 E2 E21 E24 E5 E8 F16 F28 F29 G12 G14 G18 G21 G24 G26 G27 G8 H2 H23 H28 H29 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

5 OF 6 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS H5 J23 J26 J27 AC22 K28 K29 L13 L15 L2 L26 L27 L5 L7 M12 M13 M14 M15 M16 M17 M23 M28 M29 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 P12 P13 P14 P15 P16 P17 P2 P23 P28 P29 P4 P7 R11 R12 R13 R14 R15 R16 R17 R18 R28 T12 T13 T14 T15 T16 T17 T23 B26 U12 U13 U14 U15 U16 U17 AD23 U26 U27 U3 V1 V13 V15 V23 V28 V29 V4 V5 W26 W27 W3 Y1 Y28 Y29 Y4 Y5 AG28 AH6 AF2 B25

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3D3V_S5 3D3V_S0 8 7 6 5 SRN4K7J-10-GP SRN4K7J-10-GP RN31 1 2 3 4 5V_S0 17,25 SMB_CLK 3 2 1 4 5 6 Q7 2N7002DW-1-GP SMBC_ICH 3,12 17,25 SMB_DATA SMBD_ICH 3,12

Q13 & Q14 connect SMLINK and SMBUS in S) for SMBus 2.0 compliance

SMBUS

NCTF TEST PIN: A1,A2,B1,A28,A29,B29 AH1,AJ1,AJ2,AH29,AJ28,AJ29

NCTF_VSS#A1 NCTF_VSS#A2 NCTF_VSS#B1 NCTF_VSS#A29 NCTF_VSS#A28 NCTF_VSS#B29 NCTF_VSS#AJ1 NCTF_VSS#AJ2 NCTF_VSS#AH1 NCTF_VSS#AJ28 NCTF_VSS#AJ29 NCTF_VSS#AH29

A1 A2 B1 A29 A28 B29 AJ1 AJ2 AH1 AJ28 AJ29 AH29

TP110 TP111 TP122 TP114 TP116 TP121 TP136 TP143 TP133 TP145 TP137 TP134

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

ICH9-M (4 of 4)
Size Document Number Rev

ICH9M-GP-NF 71.ICH9M.00U
A B C D

D45/D46
Date: Friday, March 14, 2008 Sheet
E

PD
19 of 47

Digital Output Data Bits TEMP. Sign +127.875 +126.375 +25.5 +1.75 +0.5 +0.125 -0.125 -1.125 -25.5 -55.25 -65.000 0 0 0 0 0 0 1 1 1 1 1 MSB 111 111 001 000 000 000 111 111 110 100 011 LSB 1111 1110 1001 0001 0000 0000 1111 1110 0110 1000 1111 EXT 111 011 100 110 100 001
1 5V_S0

111 111
FAN1_VCC

FAN1_VCC R383 10KR2J-3-GP

100 110

*Layout* 15 mil
2 ACES-CON3-GP-U1 FAN1_FG1 5 3 2 1 1 4 C465 SC1KP50V2KX-1GP 1 1 3 C93 C95 SC4D7U6D3V3KX-GP 1 2 SCD1U16V2ZY-2GP C45 SC2200P50V2KX-2GP

000

D7 BAS16-1-GP 1 2

*Layout* 15 mil

FAN1

5V_S0

R90

1 2 10R3J-3-GP

Setting T8 as 90 Degree

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5V_S0 U8 2

*Layout* 30 mil

H_THERMDA 4

G792_RESET# G792_32K

1 2

5V_G792_S0

VCC

C62

C96

C57

20 7 9 11 15 16 18 19

DVCC DXP1 DXP2 DXP3

C58

FAN1 RESET# FG1 CLK

1 2 4 14

V_DEGREE =(((Degree-72)*0.02)+0.34)*VCC

G7921SF1U-GP 2 2 2 74.07921.079 G14 G15 G792_DXP3

2.System Sensor, Put between CPU and NB.


2 1 C71 SC2200P50V2KX-2GP 1 C70

R88 49K9R2F-L-GP

NC#19

DGND DGND

5 17

C511 B SC470P50V3JN-2GP SC2200P50V2KX-2GP 2

C92

3D3V_S5

U66 5 7,17 PWROK 4 B VCC A Y GND 1 2 3 PM_SLP_S3# 17,25,28,30,34,35,36,37 G792_RESET# G792_DXN3

74LVC1G08GW-1-GP

SB

R73 10KR2J-3-GP

32K suspend clock output


U5 17,25,28,30,34,35,36,37 17 PM_SLP_S3# PM_SUS_CLK 1 2 3 B VCC A Y GND 5 4

3D3V_S5 ALERT# R77 10R2J-2-GP 1 2 1 R71 100KR2J-1-GP 3D3V_AUX_S5 2 1 2 G792_THERM# G792_32K 3D3V_AUX_S5 2 R76 1 0R2J-2-GP 1 0R2J-2-GP 2 THRM# 17 EC_RST# 28

DY
2 R78

74LVC1G08GW-1-GP

SB

R66 D4 10KR2J-3-GP 2 EC_RST# 1

SB
1N4148W-7-F-GP U6 1 B VCC A Y GND 2 5 4 PWR_S5_EN 33

SC1U16V3ZY-GP

C85 SC2200P50V2KX-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SC4D7U10V5ZY-3GP

R89 4K99R2F-L-GP

G792_DXP2 G792_DXP3 ALERT#

THERM# THERM_SET SGND SGND SGND

13 3

G792_THERM# V_DEGREE

H_THERMDC 4

1.For CPU Sensor

V_DEGREE

28 28

SMBD_G792 SMBC_G792

ALERT# SDA SCL

8 10 12

G792_DXN2 G792_DXN3

G792_DXP2

Q14 MMBT3904-3-GP

G10 1 VGA_G792_P 42

DXP1:108 Degree (CPU) DXP2:H/W Setting 100(System) DXP3:105 Degree (SYSTEM)

GAP-CLOSE GAP-CLOSE

SC470P50V2KX-3GP G11 2 1 VGA_G792_N 42

Place near chip as close as possible

3.VGA SENSOR

R86 100KR2J-1-GP

3D3V_S0

28 S5_ENABLE

2 3

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number

74LVC1G08GW-1-GP

DY

C63 SC1U10V3ZY-6GP

R69 1 0R2J-2-GP

INTRUDER#

16

Thermal/Fan Controllor D45/D46 Sheet


20 of

R68 2 0R2J-2-GP

(dummy, KBC already delay)

Rev

DY

PD
47

Date: Friday, March 14, 2008

SATA HD Connector
SATA1 45 NP1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 46 CON44+15P+S7-2GP

ODD Connector
ODD1 8 S1 S2 S3 S4 S5 S6 S7 ODD_DP P1 P2 P3 ODD_MD P4 P5 P6 9 NP1

16 SATA_TXP0 16 SATA_TXN0 16 SATA_RXN0_C 16 SATA_RXP0_C SCD01U25V2KX-3GP C725 1 SCD01U25V2KX-3GP C717 1 2 2 SATA_RXN0 SATA_RXP0

S1 S2 S3 S4 S5 S6 S7

CLOSE TO ODD
16 SATA_RXN1_C 16 SATA_RXP1_C SCD01U25V2KX-3GP SCD01U25V2KX-3GP 5V_S0 C559 2 C557 2

16 SATA_TXP1 16 SATA_TXN1 1 1 SATA_RXN1 SATA_RXP1

CLOSE TO SATA HDD

TP92 R458 10KR2J-3-GP 1 TC19 SC10U10V5ZY-1GP

D20 SSM24PT-GP 2

C529 SCD1U16V2ZY-2GP 2

NP2

SSM24PT-GP

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K 1 C379 SCD1U16V2ZY-2GP TC10 SC10U10V5ZY-1GP D9 2 A 2 1 NP2

20.F0885.001

LAUNCH BUTTON
3D3V_AUX_S5 1

WIRELESS BUTTON
3D3V_S0

R369 100KR2J-1-GP 2 PWR_BUTTON WB1 2 PWR1 1 3 5 2 SW-TACT-91-GP 4 2 1 R368 2 1 C443 SCD1U16V2ZY-2GP KBC_PWRBTN# 28 470R2J-2-GP 1 2 3 4 5 6 7 8 NP1 NP2 SW-SLIDE61-GP-U 10KR2J-3-GP 1 R342

WIRELESS_BTN# 28 1 C432 SCD1U16V2ZY-2GP

62.40009.561

5V_S0

1A 2A 3A 4A 5A 6A 7A 8A 9A 10A 11A 12A 13A 14A 15A

DY
A

SKT-SATA7P+6P-14-GP-U1

62.40018.351

ZZZZ

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size

HDD / CDROM / LAUNCH


Document Number Rev

D45/D46
Date: Friday, March 14, 2008 Sheet 21 of 47

PD

USB BOARD CONN


5V_S5 USBCN1 21 1 U42 2 SCD1U16V2ZY-2GP 1 3 2 5 4 IN#3 IN#2 OC# EN/EN# OUT#8 OUT#7 OUT#6 GND 8 7 6 1 C539 SC4D7U10V5ZY-3GP 1 C533 1 5V_S5 C450 SCD1U16V2ZY-2GP

100 mil
1 1 C537 SCD1U16V2ZY-2GP

5V_USB1_S3

EC96 SC1KP50V2KX-1GP SC1KP50V2KX-1GP

TC20 ST100U10VCM-GP

17 USB_OC#0 28 USB_PWR_EN#

G545A2P8U-GP

PD

DY

74.00545.A79

2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 22 ACES-CON20-2-GP

USB_PWR_EN#

USBPN2 USBPP2 USBPN3 USBPP3 USBPN4 USBPP4 USB_OC#2

17 17 17 17 17 17 17

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Bluetooth
BLUETOOTH1 9 1 2 3 4 5 6 7 8 5V_USB1_S3 17 USBPP5 17 USBPN5 25 WIFI_BUSY 28 BLUETOOTH_EN 25 BT_BUSY ESATA1 8 NP1 1A 2A 3A USB_0+ 4A NP2 9 10 1 2 3 4 5 6 7 3D3V_BT_S0 17 USBPN0 R373 1 1 R464 2 0R0402-PAD USB_0-

20.K0261.020

CLOSE TO E-SATA CONNECTOR


SCD01U25V2KX-3GP 2 SCD01U25V2KX-3GP 2

10

0R3-0-U-GP

DY

EC128 SC5P50V2CN-2GP 1 R466 2 0R0402-PAD

SATA_RXP5 C553 1 SATA_RXN5 C556 1

SATA_RXP5_C 16 SATA_RXN5_C 16

SATA_TXN5 SATA_TXP5

SATA_TXN5 16 SATA_TXP5 16

DY
U26 3D3V_S0 C446 SCD1U16V2ZY-2GP 1 5 6 7 8 9 IN#5 IN#6 IN#7 IN#8 GND

change BT cable
ACES-CON8-4-GP-U

17

USBPP0 1

DY
2

EC129 SC5P50V2CN-2GP

11 SKT-SATA+USB11P-2-GP

GND EN OUT IN#1

4 3 2 1

3D3V_BT_S0 R374 10KR2J-3-GP 1 1 EC74

BLUETOOTH_EN 28

PD USE 22.10218.Z71
SC220P50V2JN-3GP

G5281RC1U-GP 74.05281.093

eSATA/USB

MDC
MDC1 NP1 14 15 2 4 6 8 10 12 18 17 NP2 TYCO-CONN12A-4-GP

SC4D7U10V5ZY-3GP

13 1 16,29 ACZ_SDATAOUT 16,29 ACZ_SYNC 16 ACZ_SDATAIN1 16,29 ACZ_RST# ACZ_SDATAOUT ACZ_SYNC 1 2ACSDATAIN1_A ACZ_RST# R538 39R2J-L-GP 1 3 5 7 9 11 16

C699

3D3V_S5

ACZ_BTCLK_MDC 16 1 1 1 C700 SC4D7U10V5ZY-3GP

C689 SC22P50V2JN-4GP

R539 100KR2J-1-GP

C690 DUMMY-C2 2

ZZZZ

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number

PD

USB / MDC / BLUETOOTH D45/D46


Sheet 22 of

Rev

PD
47

Date: Friday, March 14, 2008

R61 3D3V_S0 1

10KR2J-3-GP 2

3D3V_LAN_S5 R43 1 2

AVDD33

DY

20 mils
1 C50 2

They are for U5 AVDD33 pin-2 and 59


1 2 C43 SCD1U16V2ZY-2GP PD

DY
17,25,41 PCIRST1# 1

R70 2 47R2J-2-GP U4 1 2 3 A B GND VCC Y

LAN_PERSTB 3D3V_S5 3D3V_S0 1

PD

0R0603-PAD G13

G12 2 GAP-CLOSE-PWR 3D3V_LAN_S5

SCD1U16V2ZY-2GP

5 4

60 ~ 100 mils
1 1 1 1 1

GAP-CLOSE-PWR VDD33 C79 C83 C88 SCD1U16V2ZY-2GP C37 SCD1U16V2ZY-2GP C76 SCD1U16V2ZY-2GP 1 2 1 C40 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP C41 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

SB
SC22U6D3V5MX-L2GP

VDD33 NC7S08M5X-NL-GP

C72 SCD1U16V2ZY-2GP

PD
1 R85 3K6R3-GP 2 2 1 R82 10KR2J-3-GP

SCD1U16V2ZY-2GP

DY

PD

SB
VDD33 U9 C98 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

DY
LAN_EECS LAN_EESK LAN_EEDI LAN_EEDO 1 2 3 4 CS SK DI DO VCC DC ORG GND 8 7 6 5

They are for U5 VDD33 pin-16,37,46 and 53

AT93C46DN-SH-B-GP

VDD33

8101E REMOVE 8111B REMOVE 8111C STUFF

R59

ACT_LED# LINK100 LINK1G

24 24 24

SC15P50V2JN-2-GP

SC22U6D3V5MX-L2GP

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C52

EEPROM LED OPTION USE '01' (DEFINED IN SPEC) => LED0 : ACT => LED1 : LINK (BOTH 10/100 AND GIGA CHIP)

Only For 8111C Closing chip pin1


L1 CTRL18 1

FB12

They are for U5 AVDD18 pin-5,8,11 and 14

AVDD18

SC15P50V2JN-2-GP

C48

82.30020.851

C39 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

1 1 2 2

X1 XTAL-25MHZ-102-GP

40 mils

R39

40 mils

AVDD18

IND-4D7UH-113-GP

0R3-0-U-GP

C27 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

C34 SCD1U16V2ZY-2GP

R63 0R2J-2-GP

SB

C42

LINK1G VDD33 DVDD15

DVDD15

2K49R2F-GP

RTL_RSET_1 CTRL15/VDD33 GVDD LAN_X2 LAN_X1 AVDD33 DVDD15 ACT_LED# LINK100

They are for U5 EVDD18 pin-22 and 28


2

R47 1 0R3-0-U-GP

20 mils
1

8101E mount 2K 8111B,8111C mount 2.49k

EVDD18 C51 SCD1U16V2ZY-2GP C56 SCD1U16V2ZY-2GP

PD USE 71.08111.E03
65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 U7 1 GND RSET VDDSR ENSR CKTAL2 CKTAL1 AVDD33 AVDD12 LED0 LED1 LED2 LED3 VDD33 DVDD12 OGPIO IGPIO DVDD12

Only For 8111C


48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 LAN_EESK LAN_EEDI VDD33 LAN_EEDO LAN_EECS DVDD15 DVDD15 DVDD15 VDD33 ISOLATE# 2

R48 0R3-0-U-GP

24 24 24 24 24 24 24 24

MDIP0 MDIN0 MDIP1 MDIN1 MDIP2 MDIN2 MDIP3 MDIN3

NC#17 NC#18 LANWAKE# PERST# DVDD12 EVDD12 HSIP HSIN EGND REFCLK_P REFCLK_N EVDD12 HSOP HSON EGND DVDD12

CTRL18 AVDD33 MDIP0 MDIN0 AVDD18/FB12 MDIP1 MDIN1 AVDD18 MDIP2 MDIN2 AVDD18 MDIP3 MDIN3 AVDD18 DVDD15 VDD33

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

SROUT12 AVDD33 MDIP0 MDIN0 FB12 MDIP1 MDIN1 AVDD12 MDIP2 MDIN2 AVDD12 MDIP3 MDIN3 AVDD12 NC#15 VDD33

EESK EEDI/AUX VDD33 EEDO EECS DVDD12 NC#42 NC#41 NC#40 NC#39 DVDD12 VDD33 ISOLATE# NC#35 NC#34 CLKREQB

3D3V_S0

They are for U5 DVDD15 pin-15,21,32,33,38,41,43,49,52 and 58


R83 1KR2J-1-GP 1 1

40 mils
1 1 1

DVDD15 1 1 1 1 C73 SCD1U16V2ZY-2GP C74 SCD1U16V2ZY-2GP C75 SCD1U16V2ZY-2GP C66 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP C60 SCD1U16V2ZY-2GP C53 SCD1U16V2ZY-2GP 1 Rev 2 47

DY
SCD1U16V2ZY-2GP

C38

C49 SCD1U16V2ZY-2GP

C68 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

DY

DY

C36 SCD1U16V2ZY-2GP

R84 15KR2F-GP 2

AGND

RTL8111C-VB-GR-GP

17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

G9 GAP-CLOSE-PWR

AVDD18/FB12

1 R49

2 0R2J-2-GP

FB12

EVDD18 PCIE_RXP1_1 PCIE_RXN1_1 AGND DVDD15

DVDD15 EVDD18

CTRL15/VDD33

AGND

17,25,26 PCIE_WAKE# 17 PCIE_TXP1 17 PCIE_TXN1 3 CLK_PCIE_LAN 3 CLK_PCIE_LAN# 17 PCIE_RXP1 17 PCIE_RXN1

C61 C64

2 2

1 1

SCD1U10V2KX-5GP SCD1U10V2KX-5GP

C30 D3 0R3-0-U-GP SC22U6D3V5MX-L2GP MMPZ5226BPT-GP SCD1U16V2ZY-2GP DY C47 2 A

1 R56 2 0R0402-PAD

PCIE_WAKE#_R LAN_PERSTB PCIE_TXP1 PCIE_TXN1 CLK_PCIE_LAN CLK_PCIE_LAN# PCIE_RXP1 PCIE_RXN1

SB
1

R52 2

PD VDD33

ZZZZ

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

LAN RTL8111C
Size Document Number

Layout - 1:0.1u first,2: 22u,3:D33


Date: Friday, March 14, 2008

D45/D46Sheet

PD
23 of

Lan Conn
RJ1 2 CONN_PWR_1 470R2J-2-GP 2 CONN_PWR_2 470R2J-2-GP 23 23 LINK100 LINK1G LINK100 CONN_PWR_1 LINK1G RJ45_1 RJ45_2 RJ45_3 RJ45_4 RJ45_5 RJ45_6 RJ45_7 RJ45_8 CONN_PWR_2 23 ACT_LED# ACT_LED# EC62 SC1KP50V2JN-2GP 1 9 A1 A2 A3 1 2 3 4 5 6 7 8 B1 B2 10 3D3V_LAN_S5 1 R367 1 R347 XF1 23 23 MDIP2 MDIN2 MDIP2 MDIN2 5 6 4 9 10 3 TD+ TDCT CT CT CT TX+ TXRD+ RDRX+ RX8 7 1 2 12 11 RJ45_4 RJ45_5 MDIP3 MDIN3 RJ45_7 RJ45_8 MDIP3 MDIN3 23 23 1 1 LINK100 LINK1G

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CT 2 2 1 C16 1 C13

MCT3 MCT4

DY

DY

DY

EC69 SC1KP50V2JN-2GP

EC68 SC1KP50V2JN-2GP

RJ45-125-GP-U1

22.10277.021

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

XFORM-230-GP

XF2

23 23

MDIP0 MDIN0

MDIP0 MDIN0

5 6

TD+ TDCT CT CT CT

TX+ TX-

8 7

RJ45_1 RJ45_2

MCT1 MCT2

4 9 10 3

RD+ RD-

1 2

MDIP1 MDIN1

EML2

MDIP1 MDIN1

23 23

MDC_TIP

SB

RX+ RX-

12 11

RJ45_3 RJ45_6

MDC2

HFB1608VF-102-GP

RJ2

4 2

C14 SCD01U16V2KX-3GP

C15 SCD01U16V2KX-3GP XFORM-230-GP

MDC_TIP_L MDC_RING_L 1

NP1 1 2 NP2

EML1 2 HFB1608VF-102-GP MDC_RING

1000Mbps Lan Transformer


ETY-CON2-10-GP 20.F0984.002

4 RJ11-10-GP

SB 62.10044.201

RN3 MCT4 MCT3 MCT2 MCT1 1 2 3 4 SRN75J-1-GP 8 7 6 5 LAN_TERMINAL 1 C6 2 SC1KP3KV8KX-GP

1.route on bottom as differential pairs. 2.Tx+/Tx- are pairs. Rx+/Rx- are pairs. 3.No vias, No 90 degree bends. 4.pairs must be equal lengths. 5.6mil trace width,12mil separation. 6.36mil between pairs and any other trace. 7.Must not cross ground moat,except RJ-45 moat.

ZZZZ

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number

LAN Connector D45/D46


Sheet
1

Rev

PD
24 of 47

Date: Friday, March 14, 2008


5 4 3 2

Newcard Frame

Newcard Head
NEWCARD1

Mini Card Connector


WLAN1 1D5V_S0 3D3V_S5
4

SKT1

2
CARDBUS2P-15-GP 21.H0146.001

3D3V_NEW_S0 C364 SC10U10V5ZY-1GP C363 SCD1U16V2ZY-2GP 17 17 17 17 PCIE_TXP4 PCIE_TXN4 PCIE_RXP4 PCIE_RXN4

6 2 28 48

1.5V 3.3V +1.5V +1.5V +3.3V +3.3VAUX RESERVED#3 RESERVED#5 RESERVED#8 RESERVED#10 RESERVED#12 RESERVED#14 RESERVED#16 RESERVED#17 RESERVED#19 RESERVED#20 RESERVED#37 RESERVED#39 RESERVED#41 RESERVED#43 RESERVED#45 RESERVED#47 RESERVED#49 RESERVED#51 LED_WWAN# LED_WLAN# LED_WPAN#

REFCLK+ REFCLKPERN0 PERP0 PETN0 PETP0 USB_DUSB_D+ SMB_CLK SMB_DATA WAKE# CLKREQ# PERST# GND GND GND GND GND GND GND GND GND GND GND GND GND GND

13 11 23 25 31 33 36 38 30 32 1 7 22 4 9 15 18 21 26 27 29 34 35 40 50 53 54
SMB_CLK SMB_DATA

CLK_PCIE_MINI1 3 CLK_PCIE_MINI1# 3 PCIE_RXN3 PCIE_RXP3 PCIE_TXN3 PCIE_TXP3 USBPN8 USBPP8 17 17 17 17 17 17

PCIE_TXN4 PCIE_TXP4 PCIE_RXN4 PCIE_RXP4 USBPN10 USBPP10

PD
52 24
BT_BUSY WIFI_BUSY

3 CLK_PCIE_NEW 3 CLK_PCIE_NEW# TP101

CPPE# CONN_CLKREQ# PERST# 0R2J-2-GP

DY

C842 DY SC15P50V2JN-2-GP

C843 DY SC15P50V2JN-2-GP

C844 DY SC15P50V2JN-2-GP

C845 DY SC15P50V2JN-2-GP

C846 DY SC15P50V2JN-2-GP

C847 SC15P50V2JN-2-GP 3D3V_NEW_S5

R728 17,23,26 PCIE_WAKE# C361 SCD1U16V2ZY-2GP

22 22

BT_BUSY WIFI_BUSY

R557 10KR2J-3-GP

DY
28 WIRELESS_EN 28 28 WIRELESS_EN E51_RxD E51_TxD E51_RxD E51_TxD

17 C_LINK_CLK 17 C_LINK_DAT 17 C_LINK_RST

WWAN Connector
Check power trace
3D3V_S5 GAP-CLOSE-PWR G120 1 1D5V_S0 WWAN1

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2 1 1 1 1 1
C652 SC10U10V5ZY-1GP C727 SCD1U16V2ZY-2GP C688 SC10U10V5ZY-1GP C720 SCD1U16V2ZY-2GP C634 SCD1U16V2ZY-2GP SMB_CLK 5V_AUX_S5 TP120 TP119 TP118

C_LINK_CLK C_LINK_DAT C_LINK_RST

R654 0R2J-2-GP 2 DY R655 0R2J-2-GP 2 DY R656 0R2J-2-GP 2

DY

1C_LINK_CLK_1 1C_LINK_DAT_1 1C_LINK_RST_1

3 5 8 10 12 14 16 17 19 20 37 39 41 43 45 47 49 51 42 44 46

2
SMB_DATA SMB_CLK CONN_TP2 CONN_TP3 CPUSB#

MINI_WAKE# MINI_REQ# PLT_RST1#_WLAN

1 R547 2 0R0402-PAD

TP129 TP128

17,19 SMB_DATA 17,19 SMB_CLK TP55 TP54 17 17 USBPP10 USBPN10

PCIRST1#

17,23,41

PD

PD
1D5V_NEW_S0

28 NP2 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 NP1 27
CARDBUS26P-7GP 62.10024.861

C358 SC10U10V5ZY-1GP

1 2

3D3V_S5

1D5V_S0 3D3V_S5

C360 SCD1U16V2ZY-2GP

PD

NP1 NP2

LED_WWAN# LED_WLAN# LED_WPAN#

DY

EC50 SC22P50V2JN-4GP

Place them Near to Chip


1

NP1 NP2

SKT-MINI52P-5-GP-U

1D5V_S0

CLK_PCIE_NEW# CLK_PCIE_NEW

C359 SCD1U16V2ZY-2GP

PD

SC15P50V2JN-2-GP

D5 FTZ6D8E-GP

SC15P50V2JN-2-GP

(ROBISON RESERVE)
REFCLK+ REFCLKPERN0 PERP0 PETN0 PETP0 USB_DUSB_D+ SMB_CLK SMB_DATA WAKE# CLKREQ# PERST# GND GND GND GND GND GND GND GND GND GND GND GND GND GND 13 11 23 25 31 33 36 38 30 32 1 7 22 4 9 15 18 21 26 27 29 34 35 40 50 53 54
SMB_CLK SMB_DATA WWAN_MIC1P WWAN_SPK1N PLT_RST1#_WWAN TP84 CLK_PCIE_MINI2 3 CLK_PCIE_MINI2# 3 PCIE_RXN2 PCIE_RXP2 PCIE_TXN2 PCIE_TXP2 USBPN9 USBPP9 17 17 17 17 17 17 3D3V_S0 SIM_CCRST

DY

C848 DY

C643 SCD1U16V2ZY-2GP

SIM_CCCLK

SIM_CCVCC

3D3V_NEW_S0

1D5V_NEW_S0

C642 SCD1U16V2ZY-2GP

C849

SIM
3 4 5

3D3V_S5 3D3V_S0 C635 SCD1U16V2ZY-2GP C633 SCD1U16V2ZY-2GP

6 2 28 48 52 24

2 3 12 11 17 15

1.5V 3.3V +1.5V +1.5V +3.3V +3.3VAUX RESERVED#3 RESERVED#5 RESERVED#8 RESERVED#10 RESERVED#12 RESERVED#14 RESERVED#16 RESERVED#17 RESERVED#19 RESERVED#20 RESERVED#37 RESERVED#39 RESERVED#41 RESERVED#43 RESERVED#45 RESERVED#47 RESERVED#49 RESERVED#51 LED_WWAN# LED_WLAN# LED_WPAN#

WLANPW

G122 GAP-CLOSE-PWR 1 2 SB

SIM_CCIO R493 7,17,26,27,28 PLT_RST1#

3_3VIN 3_3VOUT 1_5VIN 1_5VOUT AUXIN AUXOUT

U50

TP85 TP83 SIM_CCCLK

STBY# RCLKEN OC# GND

WWAN_MIC1N WWAN_SPK1P SIM_CCVCC SIM_CCIO SIM_CCRST

DY
2

C369 SC15P50V2JN-2-GP 28 WWAN_EN

R402 10KR2J-3-GP

DY
1

ST100U10VCM-GP

3 5 8 10 12 14 16 17 19 20 37 39 41 43 45 47 49 51 42 44 46

R652 DUMMY-R2 CLK_PCIE_MINI2# CLK_PCIE_MINI2

17,28,34,35 PM_SLP_S4#

1 2 R396 0R0402-PAD

TP82 PLT_RST1#

DY

1 18 19 21

G577BR91U-GP 17,20,28,30,34,35,36,37 PM_SLP_S3#

DY C838 SC15P50V2JN-2-GP

C839 SC15P50V2JN-2-GP

GND

3D3V_S5

DY
2 1
RN58

PD
WLANPW TP100 NEWCARD_OC#

SRN10KJ-5-GP

2PLT_RST1#_577 CPPE# CPUSB# 0R0402-PAD PERST#

6 10 9 8 20

SYSRST# CPPE# CPUSB# PERST# SHDN#

3_3VIN 3_3VOUT 1_5VOUT 1_5VIN NC#16

4 5 13 14 16

3D3V_NEW_S5 3D3V_S0 3D3V_NEW_S0 1D5V_NEW_S0 1D5V_S0 C637 SCD1U16V2ZY-2GP

3 4

CPPE# CPUSB#

PD
1 1 1 1 1
C493 SC10U10V5ZY-1GP C469 SCD1U16V2ZY-2GP TC14 C803 SCD1U16V2ZY-2GP C804 C805 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

SIM_CCVCC SIM1 SIM_CCRST SIM_CCCLK C457 SC4D7U6D3V3KX-GP SIM_CCIO R380 SIM_DET

DY

DY DY
1
C461 SCD01U16V2KX-3GP

NP1 NP2

1D5V_S0

NP1 NP2

SB

SKT-MINI52P-5-GP-U

SIM

SIM
3D3V_S0

C458 SC10U10V5ZY-1GP

C480 SCD1U16V2ZY-2GP

FOR MINICARD 1.2 SPEC


2

10KR2J-3-GP

1 2 3 5 6 7 8 9 10 NP1 NP2

VCC RST CLK GND VPP I/O GND GND CD NP1 NP2

ZZZZ

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number

SIM

Mini Card/New Card D45/D46 Sheet


E

CARD-PUSH-7P-GP-U2

Rev

PD
25 of 47

Date: Monday, March 24, 2008


C D

3D3V_S0

POWER TRACE >40 MIL


1

Close to Pin 18,19


1 1 1 SCD1U10V2KX-4GP SCD1U10V2KX-4GP SC10U10V5KX-2GP C768 C763 2 C766 2

R633 2 TAV33 0R0603-PAD 1 SCD1U10V2KX-4GP 0R3-0-U-GP 1 1 R615 R631 1 C772 SCD33U10V3KX-3GP R621 2 1

PD

C744 2

Place L40, L42close to SK1

CLOSE TO CHIP
TPBIAS0 TPA0P TPA0N TPB0P TPB0N

56R2F-1-GP 2

56R2F-1-GP 2

L40 DLW21HN900SQ2LGP R626 2 0R3-0-U-GP TPA0+ TPA0TPB0+ TPB03 4

SKT-1394-4P-35-GP-U1 6 4 3 2 1 5 1394

DVDD18 L41 2 1 BLM15BB121SN-GP 1 1 SCD1U10V2KX-4GP C746 2 APVDD C769 1 SC10U10V5KX-2GP SC10U10V5KX-2GP

POWER TRACE >40 MIL


C787 1 SCD1U10V2KX-4GP C788 1 C773 SCD1U10V2KX-4GP

DY
1

C745 1 SCD1U10V2KX-4GP

PUT UP ALL COMPONENT ON 0 OHM IF CHIP IS JMB385

R628 5K11R2F-L1-GP 2 1

R630 56R2F-1-GP L42 2 1 DLW21HN900SQ2LGP

SC1KP50V2JN-2GP

R629 2 0R3-0-U-GP

DY
3 4 1 R622 2 C771 1 2 R623 1 56R2F-1-GP 2 0R3-0-U-GP

SC220P50V2KX-3DLGP

DVDD18

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R632 12KR2J-L-GP Q24 AO3403-GP 1

DY

3D3V_CARD

JMB380

3D3V_S0

30mil Trace

TREXT TPBIAS0 TPA0P TPA0N TPB0P TPB0N TAV33

MDIO12

DY

CR1_PCTLN

R648 1KR2-N5

R593 2 0R0603-PAD C775 1 SCD1U10V2KX-4GP

C782 SC10U10V5KX-2GP SC10U10V5KX-2GP

36 35 34 33 32 31 30 29 28 27 26 25

U64

TREXT TPBIAS_1 TPA1P TPA1N TPB1P TPB1N TAV33 MDIO8 MDIO9 MDIO10 MDIO11 MDIO12

C790

PD

JMB385 CHANGE 400 K OHM TO 0 OHM


R658 1 2

For SD/MS Card Power

XIN XOUT MDIO7 MDIO6 MDIO5 MDIO4 MDIO3 MDIO2 MDIO1 MDIO0

3D3V_S0

37 38 39 40 41 42 43 44 45 46 47 48 49

DV18 TXIN/TOSC TXOUT MDIO7 MDIO6 MDIO5 MDIO4 DV33 MDIO3 MDIO2 MDIO1 MDIO0 GND

TCPS MDIC13 MDIC14 CR1_LEDN_GPIO0 DV33 DV33 DV18 CR1_PCTLN_GPIO1 CR1_CD0N_GPIO2 CR1_CD1N_GPIO3 SEECLK SEEDAT

24 23 22 21 20 19 18 17 16 15 14 13

MDIO13 MDIO14

402KR2F-GP

3D3V_S0 CR1_PCTLN CR1_CD0N CR1_CD1N DVDD18 A D40 K 1 RB751V-40-2-GP R726

DY 0R2J-2-GP
2 PCIE_WAKE# 17,23,25 3D3V_CARD

SCD1U10V2KX-4GP

DY
XRST# XTEST APCLKN APCLKP APVDD APGND APREXT APRXP APRXN APV18 APTXN APTXP

USE 71.00380.003
C786 1 C783 1 SCD1U10V2KX-5GP 2 SCD1U10V2KX-5GP 2 PCIE_RXP5 17 PCIE_RXN5 17 3D3V_S0 PCIE_TXN5 PCIE_TXP5 17 17

C781

C778

MS / MS PRO SD / MMC
C777 CARD1 MDIO0 MDIO1 MDIO2 MDIO3 MDIO4 CR1_CD1N MDIO5_R

1 2 3 4 5 6 7 8 9 10 11 12

JMB380-QGAZ0A-GP

SCD1U16V2ZY-2GP SC1U10V3ZY-6GP SCD1U16V2ZY-2GP PCIE_RXP5_C PCIE_RXN5_C 9 16 MDIO0 MDIO1 MDIO2 MDIO3 R591 2 R592 2 CR1_CD0N CR1_CD1N MDIO7 CR1_CD0N 1 R651 MDIO5_R MDIO4 MDIO6 2 1 19 17 6 14

APVDD

0R2J-2-GP 2

7,17,25,27,28

PLT_RST1#

3 CLK_PCIE_CARD# 3 CLK_PCIE_CARD R594 8K2R2F-1-GP

APVDD

R727

SD_VCC MS_VCC SD_DAT0 SD_DAT1 SD_DAT2 SD_DAT3 SD_CLK SD_CMD SD_WP_SW SD_CD_SW NP1 NP2 NP3

MS_DATA0 MS_DATA1 MS_DATA2 MS_DATA3 MS_BS MS_INS MS_SCLK

8 7 10 13 5 12 15

4K7R2F-GP 1 4K7R2F-GP 1

R650 1 10KR2J-3-GP 2 3D3V_CARD 3D3V_S0 R662 1 10KR2J-3-GP 2 XIN R635 1 1MR2F-GP XOUT 2 10KR2J-3-GP 1 10KR2J-3-GP 1

DY
R605 MDIO6 2 R611 MDIO13 2

20 2 21 0R2J-2-GP NP1 NP2 NP3

SD_GND SD_GND MS_GND MS_GND GND GND

3 11 4 18 22 23

1 R636

CR1_CD0N 0R2J-2-GP

JMB385
1

JMB380
X6 2 X-24D576MHZ-63GP 2 C789 MDIO5 200KR2J-L1-GP 1 200KR2J-L1-GP 1 R595 2 R634 2 MDIO12 MDIO14 1 R738 2 22R2J-2-GP MDIO5_R

MEMCARD-21P-1-GP-U 20.I0033.011

JMB380
1 SC20P50V2JN-1GP

JMB380
1

2 C791

JMB380
SC20P50V2JN-1GP

MDIO0 1

MDIO1 1

MDIO2 1

MDIO3 1

MDIO4 1

CR1_CD1N 1

MDIO5_R 1 SC15P50V2JN-2-GP SC15P50V2JN-2-GP C813DY 2 2 C814

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

PD
CR1_CD0N CR1_CD1N

DY

PD

C840 SC100P50V2JN-3GP

DY

C841 SC100P50V2JN-3GP

SC15P50V2JN-2-GP

DY
2

C808 DY 2

C809DY 2

C810DY 2

C811DY 2

C812DY

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Custom Date:

USB Card Reader JM380


Document Number Sheet 26 of Rev 47

PD

Monday, March 24, 2008

Internal KeyBoard Connector


KROW[1..8] KCOL[1..18] 28,40 28,40 5V_S0

TouchPad Connector
5V_S0

3 4

C495 SCD1U16V2ZY-2GP

1 13 14 1 2 2

C496 SC1U10V2KX-1GP

KB1 27 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 KCOL4 KCOL5 KCOL7 KROW8 KROW7 KROW6 KROW5 KROW4 KROW3 KROW2 KROW1 KCOL2 KCOL3 KCOL6 KCOL8 KCOL9 KCOL10 KCOL11 KCOL13 KCOL14 KCOL15 KCOL16 KCOL1 KCOL12 KCOL17 KCOL18

RN47 SRN10KJ-5-GP 1 2 1 2 3 4 5 6 7 8 9 10 11 12

TPAD1

28 28

TPDATA TPCLK RIGHT# EC87 SC33P50V2JN-3GP LEFT#

EC88 SC33P50V2JN-3GP

Touch Pad the same as Y40/Y41/Y45/Y46


12 1

ACES-CON12-4-GP-U

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TP35 TP34

26

28

ACES-CON26-GP-U 20.K0204.026

15'' TOUCHPAD BUTTON SWITCH


5V_S0 1 5V_S0

GOLDEN FINGER FOR DEBUG BOARD


SW1 LPC_LAD[0..3] LPC_LAD[0..3] 16,28 1 3 5 5V_S0 PLT_RST1# LPC_LFRAME# PCLK_FWH FWH_INIT# LPC_LAD3 LPC_LAD2 LPC_LAD1 LPC_LAD0 EXT_FWH# 3D3V_S0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 U19 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 FOX-GF30 ZZ.GF030.XXX B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 5V_S0 2 4 SW-TACT-91-GP 62.40009.561 2

R325 10KR2J-3-GP

R323 10KR2J-3-GP

DY
SW2 LEFT# 1 3 5 2 4 SW-TACT-91-GP 62.40009.561

DY

RIGHT#

TOP VIEW
PLT_RST1# LPC_LFRAME# PCLK_FWH FWH_INIT# LPC_LAD3 LPC_LAD2 LPC_LAD1 LPC_LAD0 EXT_FWH# 3D3V_S0

7,17,25,26,28 PLT_RST1# 16,28 LPC_LFRAME# 3 PCLK_FWH

A15 A14

(B1) (B2) ....

....

TP123

A2 A1

(B14) (B15)

COVER SWITCH
COVER1 1 COVER_SW 1 2 3 R6 100R2F-L1-GP-U

3D3V_AUX_S5 1 R7 10KR2J-3-GP 2 LID_CLOSE# 1 C2 SCD22U16V3KX-2-GP 28

3D3V_S0 1D05V_S0 3 4

(BOTTOM VIEW)
3D3V_S0

2 4 ETY-CON2-5-GP-U 20.D0196.102

RN59 SRN10KJ-5-GP 2 1 1 1 FWHINIT C681 SCD1U16V2ZY-2GP

C677 SCD1U16V2ZY-2GP

C707

FWH_INIT# 2 G

DY

DY
2

DY
2

SC10U10V5ZY-1GP

ZZZZ

4,16

H_INIT#

Q15 D 2N7002-11-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

KeyBoard/TPAD/Debug
Size Custom Document Number Rev

D45/D46
Sheet 27 of 47

PD

Date: Tuesday, March 25, 2008

3D3V_AUX_S5

3D3V_S0

3D3V_AUX_S5_KBC

SCD1U16V2ZY-2GP

EC23 SCD1U16V2ZY-2GP SC10U10V5ZY-1GP

C65

3D3V_AUX_S5

C89 SC10U10V5ZY-1GP

C497 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

C498 SCD1U16V2ZY-2GP

C485 SCD1U16V2ZY-2GP

8 7 6 5

C59

1 2

C489 SCD1U16V2ZY-2GP

1 2 3 4

KBC_AVCC SCD1U16V2ZY-2GP SC1U16V3ZY-GP

BAT_SCL BAT_SDA
4

THER_SCL THER_SDA

1 2 BLM11P600S

3D3V_AUX_S5_KBC

C492

SRN4K7J-10-GP 3D3V_S0 10KR2J-3-GP

DY

RN7

R408 0R3-0-U-GP L20

C301,C295 colse to Pin VDD

C494

3D3V_S0

7,17,25,26,27

PLT_RST1#

1 R400

2PLT_RST1#_1 100R2J-2-GP
C484 39 BAT_IN# SC27P50V2JN-2-GP

KROW[1..8]

27,40 27,40

80

102

19 46 76 88 115

KCOL[1..18]

U11A

1KBC_XO_R2

DY
10KR2J-3-GP

R405 2

E51_RxD

C107 SC15P50V2JN-2-GP X2 RESO-32D768KHZ-GP

1
C108 SC15P50V2JN-2-GP

GPIO41

VDD

AVCC

VCC VCC VCC VCC VCC

R406 2

E51_TxD 3 PCLK_KBC 16,27 LPC_LFRAME# 16,27 LPC_LAD0 16,27 LPC_LAD1 16,27 LPC_LAD2 16,27 LPC_LAD3 17 INT_SERIRQ 17 PM_CLKRUN# 16 KBRCIN# 16 KA20GATE 42 ATI_BL_ON

DY
4K7R2J-2-GP

2
R407

E51_TxD

DY
C483

R399 0R2J-2-GP

SC4D7P50V2CN-1GP

2PCLK_KBC_RC

FOR KBC DEBUG

TP146 TP142 TPAD28 TPAD28

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THERMAL-----> BATTERY----->
5V_AUX_S5 THER_SDA THER_SCL 38,39 BAT_SDA 38,39 BAT_SCL

DY

ECSCI#_KBC ATI_BL_ON ECSWI#_KBC

124 7 2 3 126 127 128 1 125 8 122 121 29 9 123

GPIO10/LPCPD# LRESET# LCLK LFRAME# LAD0 LAD1 LAD2 LAD3 SERIRQ GPIO11/CLKRUN# KBRST# GA20 ECSCI#/GPIO54 GPIO65/SMI# GPIO67/PWUREQ#

VREF

104 97 98 99 100 108 96


AD_IA 38

2 R409 1
U11B

1 10KR2J-3-GP

2
R101 33KR2J-3-GP

A/D LPC

GPI90/AD0 GPI91/AD1 GPI92/AD2 GPI93/AD3 GPIO05/AD4 GPIO04/AD5

82.10026.021

DY
KBSOUT0/JENK# KBSOUT1/TCK KBSOUT2/TMS KBSOUT3/TDI KBSOUT4/JEN0# KBSOUT5/TDO KBSOUT6/RDY# KBSOUT7 KBSOUT8 KBSOUT9 KBSOUT10 KBSOUT11 KBSOUT12/GPIO64 KBSOUT13/GPIO63 KBSOUT14/GPIO62 KBSOUT15/GPIO61/XOR_OUT GPIO60/KBSOUT16 GPIO57/KBSOUT17 53 52 51 50 49 48 47 43 42 41 40 39 38 37 36 35 34 33 54 55 56 57 58 59 60 61
KCOL1 KCOL2 KCOL3 KCOL4 KCOL5 KCOL6 KCOL7 KCOL8 KCOL9 KCOL10 KCOL11 KCOL12 KCOL13 KCOL14 KCOL15 KCOL16 KCOL17 KCOL18 KROW1 KROW2 KROW3 KROW4 KROW5 KROW6 KROW7 KROW8 TP36 TP39 TP41 TP38 TP37 TP40

KBC_MATRIX1 KBC_MATRIX0

TP19 TP23

R103

1
10MR2J-L-GP

KBC_XI

77

32KX1/32KCLKIN

D/A

GPI94/DA0 GPI95/DA1 GPI96/DA2 GPI97/DA3

101 105 106 107

KBC_XO 29 AMP_SHUTDOWN# TP21 17 PM_PWRBTN# 38 CHG_ON# KBC_BEEP TP80 14 BRIGHTNESS KBC_CIR

79 30 63 117 31 32 118 62

32KX2 GPIO55/CLKOUT GPIO14/TB1 GPIO20/TA2 GPIO56/TA1 GPIO15/A_PWM GPIO21/B_PWM GPIO13/C_PWM

KBC

68 67 69 70

GPIO74/SDA2 GPIO73/SCL2 GPIO22/SDA1 GPIO17/SCL1

SMB

14

NUM_LED#

81

GPIO66/G_PWM

SP

22 BLUETOOTH_EN

21 WIRELESS_BTN# 14 WLAN_TEST_LED#

84 83 82 91

GPIO77/SPI_DI GPIO76/SPI_DO/SHBM GPIO75/SPI_CLK GPIO81

SPI

GPIO

R100 4K7R2J-2-GP

25 25

E51_TxD E51_RxD

E51_TxD 111 E51_RxD 113 CCD_ON 112

TP81

GPO83/SOUT_CR/BADDR1 GPIO87/SIN_CR GPO84/BADDR0 GPIO16 GPIO34 GPIO36/TB3

20 S5_ENABLE RN8 S5_ENABLE THER_SCL

114 14 15

SER/IR

GPIO01/TB2 GPIO03/AD6 GPIO06 GPIO07/AD7 GPIO23/SCL3 GPIO24 GPIO30 GPIO31/SDA3 GPIO32/D_PWM GPIO33/H_PWM GPIO40/F_PWM GPIO42/TCK GPIO43/TMS GPIO44/TDI GPIO45/E_PWM GPIO46/TRST# GPIO47/SCL4 GPIO50/TDO GPIO51/TA3 GPIO52/RDY# GPIO53/SDA4 GPIO70 GPIO71 GPIO72 GPO82/TRIS#

64 95 93 94 119 6 109 120 65 66 16 17 20 21 22 23 24 25 26 27 28 73 74 75 110

PM_SLP_S3# 17,20,25,30,34,35,36,37 KBC_PWRBTN# 21 AC_IN# 38 LID_CLOSE# 27 CAMERA_EN 14 WWAN_EN 25 PWR_LED# 14 STDBY_LED# 14 CAP_LED# 14 AD_OFF 39 RSMRST#_KBC 17 PM_SLP_S4# 17,25,34,35 CHARGE_LED# 14

29

CHG_I_PWM

27 27

TPDATA TPCLK

TPDATA TPCLK

13 12 11 10 71 72

GPIO12/PSDAT3 GPIO25/PSCLK3 GPIO27/PSDAT2 GPIO26/PSCLK2 GPIO35/PSDAT1 GPIO37/PSCLK1

TP15 TP14

PS/2

SPIDI SPIDO SPICS# SPICLK

86 87 90 92

KBC for INTEL

F_SDI F_SDO F_CS0# F_SCK

FIU

KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7

BLON_OUT 14 WIRELESS_EN 25

R397 10KR2J-3-GP

VCC_POR#

85

ECRST#

WPC775L-0DG-GP-U

USB_PWR_EN#

22 RN5

AGND

3D3V_S0

GND GND GND GND GND GND

5 6 7 8

4 3 2 1
SRN10KJ-6-GP

VCORF

44

VCORF

3D3V_AUX_S5

SRN10KJ-6-GP 20 EC_RST#

5 18 45 78 89 116

103

WPC775L-0DG-GP-U 71.00775.00G

Q3 B

5
THER_SDA

DY
2
D6

5 6 7 8

SMBC_G792 20 SMBD_G792 20

EC83

SCD1U16V2ZY-2GP

SRN10KJ-6-GP RN46

3D3V_AUX_S5

3D3V_S0 17 SB_ECSCI#

4 3 2 1

6 5 4

1 2

ECSCI#_KBC AC_IN# CHG_ON#

3D3V_AUX_S5

Q4 2N7002DW-1-GP

USE 71.00773.00G

3D3V_AUX_S5

MMBT3906-3-GP

C488 SCD1U16V2ZY-2GP

ATI_BL_ON

UMA
1 R401 2 0R2J-2-GP
GMCH_BL_ON 7

3D3V_S0

5 6 7 8

4 3 2 1

ECRST# KA20GATE KBRCIN#

C499 SC1U10V3KX-3GP
2

SPI_HOLD#

2 R410 1 10KR2J-3-GP 2 R398 1 10KR2J-3-GP 2


U36 SPICS# SPIDI ER4 0R2J-2-GP SPIDI_R 2 SPI_WP# SPI_VCC SPI_HOLD# SPICLK_R SPIDO_R

ER1 0R3-0-U-GP

17

ECSWI#

ECSWI#_KBC

PD
ER2 ER3

DY
SDM03MT40A-7-F-GP

1 2 3 4

DY EC86

PD

CS# DO WP# GND

VCC HOLD# CLK DIO

8 7 6 5

1 1

0R2J-2-GP 0R2J-2-GP 2 2

SPICLK SPIDO

SC47P50V2JN-3GP

PD

EC84 SC47P50V2JN-3GP

2M Bits SPI FLASH ROM

DY

W25X16VSSIG-GP SC4D7P50V2CN-1GP

DY EC85

KBC
SPICS# SPIDI_R SPI_WP#

SKT FOR DEBUG


SKT2

1 2 3 4

8 7 6 5
SKT-SPI8P-GP-U

SPI_VCC SPI_HOLD# SPICLK_R SPIDO_R

DY

Homa

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A2
A

KBC WPC775/BIOS
Document Number

D45/D46
Sheet 28 of

Rev

PD
47

Date: Friday, March 14, 2008

3D3V_S0

AUD_3VD

MIC_IN_INT

1 R567 2 0R0603-PAD 1

MICIN_DETECT# 2 20KR2F-L-GP 1 HP_DETECT# 2 39K2R2F-L-GP

1 R577

SENSE_A C732 SC4D7U10V3KX-GP

PD
C731 SC4D7U10V3KX-GP MIC_IN_R MIC_IN_L SPKR_LMIC2_L 2 SPK1 4 2 1 1 1 EC6 MLVS0402M04-GP 3

Internal Speaker
SPK2 4 SPKR_RSPKR_R+ 1 1 EC90 ETY-CON2-10-GP 20.F0984.002 EC91 MLVS0402M04-GP 2 1 3 ETY-CON2-10-GP 20.F0984.002
D

PD

C710

SC10U10V5ZY-1GP

C714 SCD1U10V2KX-4GP

1 R579 SPKR_R+ SPKR_RSPKR_LSPKR_L+

CLOSE to CODEC

MIC2_R

PD USE 71.00269.A03
AUD_5VA 15 14 24 23 AUD_3VD U59 ALC269Q-GR-GP AUD_5VD

SPKR_L+ EC5

MLVS0402M04-GP 2

SPK_OUT_R+ SPK_OUT_RSPK_OUT_LSPK_OUT_L+

R586 2 1 0R3-0-U-GP 1 1 HP_OUT_L HP_OUT_R SENSE_A C748 SCD1U10V2KX-4GP AUD_PC_BEEP 32 33 13 18 12 20 7 26 37 5V_S0 AUD_5VD 42 43 49 HPOUT_L HPOUT_R SENSE_A SENSE_B PCBEEP MONO_OUT DVSS AVSS1 AVSS2 PVSS1 PVSS2 GND

PD
SC2D2U6D3V3MX-1-GP DVDD DVDD_IO AVDD1 AVDD2 PVDD1 PVDD2 CPVEE 1 9 25 38 39 46 34 30 28 29 35 36 27 31 19 MIC1_VREFO_R MIC1_VREFO_L MIC2_VREFO AUD_VREF C750 AUD_CPVEE 1

PD

DY

C743

SC10U10V5ZY-1GP

DY
AUD_AGND

AUD_AGND AUD_CBN

SC2D2U10V3ZY-1GP

SDATA_IN SDATA_OUT

1 R583 2 0R0603-PAD

C729

48 47 11 10 AUD_BIT-CLK 6 4

3 2

8 5

SC10U10V5ZY-1GP

C735 SCD1U10V2KX-4GP

EC121 SC1KP50V2KX-1GP

AUD_AGND

PD

cap close to pin39, pin46

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AUD_CBP GPIO1/DMIC_CLK GPIO0/DMIC_DATA HP1 HP_OUT_L R618 1 R619 1 2 75R2F-2-GP 2 75R2F-2-GP HP_OUT_L1 AUD_JDREF HP_OUT_R HP_OUT_R1 C752 SC10U10V5KX-2GP EC122 SC1KP50V2KX-1GP 1 2 6 3 4 5 NP1 NP2 SPDIFO EAPD/SPDIFO2 RESET# SYNC BCLK PD# 2 2 PHONE-JK241-GP-U AUD_AGND 16,22 ACZ_RST# 16,22 ACZ_SYNC 1 AUD_SDIN R584 20KR2F-L-GP AUD_AGND AUD_AGND HP_DETECT# 16 ACZ_BITCLK 1 R572 2 22R2J-2-GP C715 1 2 2 AUD_AGND

MIC1_VREFO_R MIC1_VREFO_L MIC2_VREFO CBN CBP VREF CPVREF JDREF

C749 1

Headphone OUT

5V_S0

AUD_5VA

MLVS0402M04-GP 2

45 44 41 40

17 16 22 21 MIC2_R MIC2_L MIC1_R MIC1_L

LINE2_R LINE2_L LINE1_R LINE1_L

PD

1 R589

2 0R0603-PAD AUD_AGND

28 AMP_SHUTDOWN#

R573 1 0R2J-2-GP

SC22P50V2JN-4GP 2 AUD_SD# 2 22R2J-2-GP 1 R571

ACZ_SDATAOUT 16,22 ACZ_SDATAIN0 16 4K7R2J-2-GP MIC1_VREFO_L R616 1 R617 1 2 2 PHONE-JK241-GP-U NP2 NP1 5 4 3 6 2 1 MIC1 EC120 SC1KP50V2KX-1GP AUD_AGND EC119 SC1KP50V2KX-1GP 1 1 2

1 R588 R625 1 R575 1

2 0R0603-PAD 2 0R3-0-U-GP 2 0R3-0-U-GP

MIC IN/LINE IN
MICIN_DETECT#

DY DY

MIC1_VREFO_R

4K7R2J-2-GP C739 1 1 C736 4 2K2R2J-2-GP MIC_IN_INT 2 1 3 INMIC1 C428 SC100P50V2JN-3GP 1 AUD_AGNDAUD_AGND SC4D7U6D3V3KX-GP MIC_IN_R_1 2 2 MIC_IN_L_1 1KR2F-3-GP R613 2 1 1KR2F-3-GP R612 2 1

Internal MIC
R328 R568 17 28
B

MIC_IN_R MIC_IN_L ETY-CON2-5-GP-U

MIC_IN_R_2 MIC_IN_L_2

PD
2

SC4D7U6D3V3KX-GP

MIC2_VREFO 10KR2J-3-GP AUD_PC_BEEP_R 2 10KR2J-3-GP 2 1 2 C713 1 2 AUD_PC_BEEP

ACZ_SPKR KBC_BEEP

1 R569 1

EC112 R570 1KR2J-1-GP SC100P50V2JN-3GP

SCD1U10V2KX-4GP

DY

AUD_AGND

5V_S0 U67 1 2 3 SHDN# GND IN SET OUT 5 4 1 C837 SCD1U16V2ZY-2GP 2 2 1 C800 SC10U10V5ZY-1GP AUD_5VA

C738 SC1U10V3ZY-6GP

G923-475T1UF-GP

AUD_AGND

SB

ZZZZ

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom

ALC269 / AUDIO JACK D45/D46 Sheet


1

Rev

PD
29 of 47

Date: Friday, March 14, 2008


5 4 3 2

Aux Power
5V_AUX_S5

3D3V_AUX_S5

I min = 150 mA
U65 1 2 3 VIN GND SHDN# VOUT NC#4 5 4

3D3V_AUX_S5

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Run Power
5V_S0 5V_S5 PD Q17 NDS0610-NL-GP DCBATOUT

C726 SCD1U25V3KX-GP

DY

2 R564 R561 100R5J-3-GP

Z_12V_G3 1 330KR2F-L-GP 1

R578 10KR2J-3-GP 2

3D3V_S0 1 2 3 4 U62 S S S G AO4468-GP 84.04468.037 D D D D 8 7 6 5

3D3V_S0

D27 R576 330KR3J-L-GP RLZ12B-1-GP

3D3V_RUNPWR 2

Z_12V_D3

PD VGA

SC1U16V3ZY-GP

SC1U16V3ZY-GP SC1U16V3ZY-GP

BC3 2

G909-330T1U-GP 74.00909.03F

1 BC4 2

84.00610.C31 TP0610K-T1-GP
D

RUN_POWER_ON

C734 1

DY

SCD1U25V3KX-GP

1 R563

2 Z_12V 10KR2J-3-GP

1 2 3 4

U61 S S S G

D D D D

8 7 6 5

SCD1U25V3KX-GP

C733

AO4468-GP 84.04468.037

DY

3D3V_S5

R574 100KR2J-1-GP

Z_12V_D4

4 5

3 2 1

U58 2N7002DW-1-GP 1D8V_S0 1 2 3 4 U38 S S S G AO4468-GP 84.04468.037 C505 SCD22U10V2KX-1GP D D D D 8 7 6 5 1D8V_S3

DY

Q16 2N7002-11-GP G

Z_12V_D3

R418 1 2 VGA_PWROK 47KR2F-GP PM_SLP_S3# 17,20,25,28,34,35,36,37

84.27002.D3F

VGA

VGA

ZZZZ

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size

RUN POWER and 3D3V_AUX_S5


Document Number Rev

Date: Friday, March 14, 2008

D45/D46 Sheet

PD
30 of 47

CPU_CORE ISL6266A
VID0
D

TPS51125 5V/3D3V
Input Power VGATE_PWRGD DCBATOUT_51125 VIN Input Signal EN0 Output Signal PGOOD 5V_S5 1D8V_S3 Output Power 5V(O) 5V_S5 (6A) 1D8V_S3 VIN

APL5912

1D5V_S0
1D5V(O) 1D5V_S0 (2.5A)
D

VID Setting VID0(I / 3.3V) VID1(I / 3.3V) VID2(I / 3.3V) VID3(I / 3.3V) VID4(I / 3.3V) VID5(I / 3.3V) VID6(I / 3.3V) Input Signal

Output Signal PGOOD

VID1 VID2 VID3 VID4 VID5 VID6

PM_SLP_S4# Output Power VCC_CORE_PWR(O) VCC_CORE(Imax=38A) ALW_PWRGD_3V_5V

3D3V(O)

3D3V_S5 (6A)

PM_SLP_S3#

EN

POK

CPUCORE_ON

0D9V_S0
VIN VLDOIN S3 S5 VTT 0D9V_S3 (1A)

GFX_CORE ISL6263A
VID0 VID Setting Output Signal VID0(I / 3.3V) VID1(I / 3.3V) VID2(I / 3.3V) VID3(I / 3.3V) VID4(I / 3.3V) Input Power VDD VIN Input Signal VR_ON VGFXCORE (O) PGOOD CPUCORE_ON

PM_SLP_S4#

CPUCORE_ON
C

VTTREF

0D9V_S3_1

VCC_SENSE VSS_SENSE

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EN (I / 3.3V) Voltage Sense VID1

TPS51100

VSEN(I / Vcore) RGND(I / Vcore)

VID2 VID3 VID4

2D5V_S0

3D3V_S0

INPUT

OUT

2D5V_S0(0.3A)

Input Power VCC(I) VCC(I) VCC(I)

DCBATOUT_6266A 5V_S0 3D3V_S0


B

5V_S0 DCBATOUT

Output Power

APL5913

VCC_GFXCORE(5.5A)

Charger BQ24750
Input Signal CHG_ON# CHGEN# CELLS Output Signal ACGOOD# SRSET AC_IN#
B

PM_SLP_S3#

TPS51124 1D8V/1D05V
5V_S5 DCBATOUT_51124 Input Power VDD VCC Input Signal EN1 EN2 Output Signal PGOOD1 PGOOD2 1D8V (O) Output Power 1D8V_S3 (10A)

GFXVR_EN VCC_AXG_SENSE VSS_AXG_SENSE Voltage Sense VSEN(I / Vcore) RGND(I / Vcore)

24750_CELLS

AD_IA

Input Power AD+ ACN

Output Power VOUT (O) VOUT (O) BT+ DCBATOUT

PM_SLP_S4# PM_SLP_S3#
A

1D05V(O)

1D05V_S0 (15A)

Adapter
Input Signal AD_OFF (I) Output Signal (O) AD_IN#
Eiger

Wistron Corporation
CPUCORE_ON Input Power AD_JK 5V_AUX_S5
4

Output Power VCC(O) AD+


Title

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

VCC(I) VCC(I)
3

Power Sequence Logic


Size B Document Number Rev

Eiger
Sheet
1

PD
31 of 47

Date: Friday, March 14, 2008


5 2

DCBATOUT

DCBATOUT_6266A

DCBATOUT

DCBATOUT_6266A

4,7,16 H_DPRSTP#

PM_DPRSLPVR 7,17

DCBATOUT_6266A

G3 1 2

20071001
1 1 TC1 1 ST15U25VDM-1-GP

G2 2 GAP-CLOSE-PWR G8 2 GAP-CLOSE-PWR G6 2 GAP-CLOSE-PWR G4 2 GAP-CLOSE-PWR

3D3V_S0 10R3F-GP 1

DY PD
R87 2

CPUCORE_ON

34,35,36,43 1 1 1 H_VID[6..0] 5 U29 SI7686DP-T1-GP C3 SC10U25V6KX-1GP 2 2 C445 SC10U25V6KX-1GP 2 C5 SC10U25V6KX-1GP 2 1

20071001
C447 SCD1U50V3KX-GP 5 6 7 8 D D D D

H_VID6

H_VID5

H_VID4

H_VID3

H_VID2

H_VID1

1 10KR2F-2-GP 1

GAP-CLOSE-PWR G7 2 GAP-CLOSE-PWR G5 2 GAP-CLOSE-PWR

1 499R2F-2-GP 1

DY
2

R8 2

H_VID0

GAP-CLOSE-PWR G1 2

2007/9/10
4 3 2 1 S S S G 6266A_UGATE1

Id=35A Qg=17~26nC Rdson=11~14mohm

SCD1U10V2KX-4GP 6266A_3V3

Vcc_core Iomax=38A
VCC_CORE

C8

R10 R12 R13 R14 R15 R16 R17 R18 R19 0R2J-2-GP 0R2J-2-GP 0R2J-2-GP 0R2J-2-GP 0R2J-2-GP 0R2J-2-GP 0R2J-2-GP 0R2J-2-GP 0R2J-2-GP 6266A_DPRSLPVR 2 R11 6266A_VR_ON 2

Cyntec 10*10*4 DCR=1.05+-5%mohm, Irating=30A Isat=60A


L18 1 2 IND-D36UH-9-GP 5 6 7 8 4 1 2 3 1 2 3 U28 SI4634DY-T1-E3-GP 5 6 7 8 SC330P50V2KX-3GP 1 2D2R5J-1-GP R671 2 2

6266A_DPRSTP# 2

2007.5.9
6266A_PHASE1

2007/9/10
1 1 TC4 TC2 SE330U2VDM-L-GP

6266A_D6

6266A_D5

6266A_D4

6266A_D3

6266A_D2

6266A_D1

6266A_D0

3D3V_S0

SE330U2VDM-L-GP 2

U1 R9 1K91R2F-1-GP

Id=19.5A Qg=21.5~33nC, Rdson=5.5~6.7mohm


R21 BOOT1 36 6266A_BOOT1 1 6266A_UGATE1 6266A_PHASE1

48

47

46

49

45

44

43

42

41

40

39

38

37

DY
G51 GAP-CLOSE 1 G52

DY

6266A_ LGATE1

DPRSLPVR

DPRSTP#

CLK_EN#

C795

20071005
4 CPU_PROCHOT#_R

R26 2 6266A_NTC_R 1 R376 1 2 4K02R2F-GP NTC-470K-1-GP C11 1 2

C19 1 2

www.kythuatvitinh.com
7,17 VGATE_PWRGD 4 PSI# PGOOD PSI# 1 C10 1 2 6266A_PMON_R 1 SCD1U25V3KX-GP 1 R25 R20 26266A_PSI# 2 0R2J-2-GP R24 6266A_PMON 3 2 4K99R2F-L-GP 26266A_RBIAS4 147KR2F-GP 5 6266A_NTC 6 UGATE1 35 2 1 2 1R2J-GP 6266A_BOOT1_R 1 2

DY
1

GAP-CLOSE

SB

PMON

PHASE1 PGND1

34

C9 SCD22U25V3KX-GP

2007/9/10

RBIAS

33

SE330U2VDM-L-GP

GND

VR_ON

3V3

VID6

VID5

VID4

VID3

VID2

VID1

VID0

U27 SI4634DY-T1-E3-GP

2007/9/10

TC3

VR_TT# NTC

LGATE1 PVCC

32

6266A_ LGATE1 5V_S0 1

6266A_VSUM

1 R33 1 R36 1 R51 1 R50

2 3K65R2F-1-GP 2 10KR2F-2-GP 2 1R2F-GP

6266A_ISEN1_P1_VCORE

31

C451 2

6266A_ISEN1 6266A_VO

C12

1 R27

SB 10K7R2F-GP C22 1

6266A_FB

11

FB FB2 DROOP VSUM ISEN2 ISEN1 VDIFF VSEN GND VDD RTN DFB

BOOT2 NC#25

26 25

6266A_BOOT2 2

SC100P50V2JN-3GP 1 R40 2 6266A_COMP_R 97K6R2F-GP 1

5 6 7 8

6266A_FB2 12 2

C444 SC10U25V6KX-1GP 2 2

C7 SC10U25V6KX-1GP 2

C4 SC10U25V6KX-1GP

SC270P50V2KX-1GP C20 1 R30 2 6266A_FB2_R 1 2 100R2F-L1-GP-U SC2200P50V2KX-2GP


B

6266A_RTN 15 13K3R2F-2-GP 16 2 16266A_DROOP

6266A_VDIFF 13

6266A_VSEN 14

6266A_DFB 17 1KR2F-3-GP 18 2 1 6266A_VO 6266A_VSUM 19

6266A_VIN 20

21

6266A_VDD 22

6266A_ISEN2 23

24

R32 1KR2F-3-GP ISL6266AHRZ-GP

VIN

VO

U32 SI7686DP-T1-GP

2007/9/10
S S S G 6266A_ISEN1 C26 1 C33 1 5V_S0 6266A_PHASE2 26266A_VO 4 3 2 1 SCD22U10V2KX-1GP 2 SCD22U10V2KX-1GP

Id=35A Qg=17~26nC Rdson=11~14mohm

74.06266.073

R41

R31 1 2 1KR2F-3-GP

6266A_SOFT 1

DY
2

R34

DCBATOUT_6266A 1 10R3F-GP

6266A_UGATE2

Cyntec 10*10*4 DCR=1.05+-5%mohm, Irating=30A Isat=60A


L19 1 2 IND-D36UH-9-GP 5 6 7 8 4 1 2 3 1 2 3 U30 SI4634DY-T1-E3-GP 5 6 7 8 SC330P50V2KX-3GP 1 1 1 2D2R5J-1-GP R672

1R2J-GP

16266A_BOOT2_R

R739 1KR2F-3-GP PD

2007.5.18
SC330P50V2KX-3GP 1 C31 2

R55

1 R54 2 10R2F-L-GP 1 C46 SC1U25V0KX-GP

C23 SC180P50V2JN-1GP 1

U31 SI4634DY-T1-E3-GP 6266A_LGATE2

SE330U2VDM-L-GP

SE330U2VDM-L-GP

2007/9/10
4

C44 SCD01U25V2KX-3GP

DY
2 2 2

SCD33U10V3KX-3GP 2 1

C35

VCC_SENSE 1 SB 2

1 C801 SC1U25V0KX-GP 1

R44 2 0R2J-2-GP

Id=19.5A Qg=21.5~33nC, Rdson=5.5~6.7mohm

DY

C794 G50 GAP-CLOSE 1 1

G49 GAP-CLOSE

VSS_SENSE

R45 2 0R2J-2-GP

C25 SC330P50V2KX-3GP

SB
SB

R37

2 0R0402-PAD 6266A_VSUM 6266A_ISEN2 6266A_VO 1 R57 1 R53 1 R42 1 R38 2 3K65R2F-1-GP 2 10KR2F-2-GP 2 1R2F-GP 2 10KR2F-2-GP

2007/9/10

6266A_VSUM 1 6266A_ISEN1_P2_VCORE Eiger


A A

C32 SCD01U25V2KX-3GP

6266A_ISEN2_P2_VCORE

C21

R46 2K61R2F-1-GP 2

SCD22U50V3ZY-1GP 2

C28 SCD033U50V3KX-1GP 2 SB

6266A_ISEN1

R35 11KR2F-L-GP 2

Wistron Corporation
6266A_VSUM_R_VO R379 NTC-10K-9-GP Title 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

ISL6266A_CPU_CORE
Size A3 Document Number Rev

6266A_VO
5

2007/9/10
4 3 2

SE330U2VDM-L-GP

1 R29

6266A_COMP 10

COMP

UGATE2

27

6266A_UGATE2

R28

6266A_VO 1 SB SCD01U25V2KX-3GP C18 1 SC1000P50V3JN-GP 6266A_VW 2 10K2R3F-GP

26266A_SOFT 7 SCD015U50V3KX-GP SOFT 8 26266A_OCSET OCSET 9 VW

LGATE2 PGND2

30

6266A_LGATE2 SC2D2U16V3KX-GP

6266A_ISEN2_P1_VCORE

29

6266A_ISEN2

PHASE2

28

6266A_PHASE2

2 10KR2F-2-GP

DCBATOUT_6266A

C17 SCD22U25V3KX-GP

20071001

C448 SCD1U50V3KX-GP

D D D D

2007/9/10
TC5 TC15

VCC_CORE

TC6

D45/D46
Sheet
1

PD
32 of 47

Date: Friday, March 21, 2008

DCBATOUT 1

DCBATOUT_51125 G102 2 GAP-CLOSE-PWR G104 2 GAP-CLOSE-PWR G39 2 GAP-CLOSE-PWR G42 2 GAP-CLOSE-PWR G40 2 GAP-CLOSE-PWR G103 2 GAP-CLOSE-PWR G41 2 GAP-CLOSE-PWR

3D3V_PWR G114 1 2

3D3V_S5 5V_AUX_S5 5V_AUX_S5 1 R645 100KR2J-1-GP D 1 C780 SC18P50V2JN-1-GP SC18P50V2JN-1-GP 2 51125_ENTIP1 1 R620 160KR2F-GP 2 C779 SC18P50V2JN-1-GP SC18P50V2JN-1-GP D 1 1 51125_ENTIP2 5V_PWR G117 R644 100KR2J-1-GP 2 5V_S5 1 2 GAP-CLOSE-PWR G113 2 GAP-CLOSE-PWR G111 2 GAP-CLOSE-PWR G109 2 GAP-CLOSE-PWR G107 2 GAP-CLOSE-PWR G115 2 GAP-CLOSE-PWR G105 2 GAP-CLOSE-PWR

GAP-CLOSE-PWR G110 2 GAP-CLOSE-PWR G112 2 GAP-CLOSE-PWR G116 2 GAP-CLOSE-PWR G118 2 GAP-CLOSE-PWR G108 2 GAP-CLOSE-PWR G106 2 GAP-CLOSE-PWR

SB

SB

Q20 DY 2N7002-11-GP G

R624 133KR2F-GP 2

DY

Q19 G

1 1 TC25 ST15U25VDM-1-GP

2 2N7002-11-GP

DY
2

Q35 2N7002-11-GP 20 PWR_S5_EN G S

SB

Q37 2N7002-11-GP G S PWR_S5_EN 20 1

SB 20071205

SB 20071205

1 DCBATOUT_51125 DCBATOUT_51125

Iomax=7A OCP min = 10A

Cyntec 7*7*3 DCR=30mohm, Irating=6A Isat=13.5A

www.kythuatvitinh.com
DCBATOUT_51125 C419 SCD01U50V2KX-1GP C770 SC10U25V6KX-1GP C767 SCD01U50V2KX-1GP 1 1 1 1 C740 C421 SC10U25V6KX-1GP SC10U25V6KX-1GP 1 C420 SC10U25V6KX-1GP SC10U25V6KX-1GP C741 SC10U25V6KX-1GP C742 SCD01U50V2KX-1GP

DY

SB

SB

U22

VIN

16

U20 SI4800BDY-T1

Id=7A Qg=8.7~13nC Rdson=23~30mohm


SB

Id=7A Qg=8.7~13nC Rdson=23~30mohm

8 7 6 5

U60 SI4800BDY-T1

D D D D

5 6 7 8

C427 1

1 2 3 4

51125_VBST2

VBST2 DRVH2 LL2 DRVL2 VO2 VFB2 EN0 ENTRIP2 VREF TONSEL SKIPSEL VREG3 VREG5

VBST1 DRVH1 LL1 DRVL1 VO1 VFB1 PGOOD ENTRIP1 GND GND VCLK

22

51125_VBST1

4 3 2 1

SB

SCD1U25V3KX-GP C426 1 2

Cyntec 7*7*3 DCR=18mohm, Irating=8A Isat=14A


L10 1 2

G S S S

D D D D G S S S

Iomax=6A OCP min = 10A


5V_PWR

3D3V_PWR

L11 1 2 IND-3D3UH-57GP 8 7 6 5

SCD1U25V3KX-GP

51125_DRVH2 51125_LL2

10 11 12 7 5

21 20 19 24 2 23 1 15 25 18

51125_DRVH1 51125_LL1 1 51125_DRVL1 51125_VO1 51125_FB1 51125_PGOOD 51125_ENTIP1 SB U63 SI4812BDY-T1-E3-GP SI4812BDY-T1-E3-GP

20071005

5 6 7 8

C751

SI4812BDY-T1-E3-GP

DY
SCD1U10V2KX-4GP

DY
2

1 2

51125_VO2

DY
2 SC330P50V2KX-3GP

C753 SCD1U10V2KX-4GP

TC27 ST220U6D3VDM-20GP GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP

D
D D D D

51125_DRVL2 2D2R5J-1-GP R669

U21

IND-3D3UH-57GP 2D2R5J-1-GP R670 SB G44

GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP

D D D D

2007/9/5
DY
C776 SB 1 R319 51125_VREF 1 SCD22U6D3V2KX-1GP

51125_FB2

2 51125_EN 13 820KR2F-GP 51125_ENTIP2 6 3

G S S S

C796

DY

1 2 3 4

4 3 2 1

G43

DY
2

TC28 ST220U6D3VDM-20GP

SC330P50V2KX-3GP

1 2

TPS51125RGER-GP

1 2

R335 6K65R2F-GP 2

DYR330

0R2J-2-GP

Id=7.7A Qg=8.5~13nC Rdson=16.5~21mohm

51125_SKIPSEL

TP76 100KR2J-1-GP R329

DY

14

51125_VCLK

3D3V_PWR

R337 0R2J-2-GP

3D3V_AUX_S5_5_51125 8

51125_FB2_R C429 DYSC18P50V2JN-1-GP

3D3V_AUX_S5 G121 1 2 2 1 R331 1 R336 2 GAP-OPEN-PWR

5V_AUX_S5_51125

G119 1 2

5V_AUX_S5

C431 SC18P50V2JN-1-GP

17

DY
1

R334 10KR2F-2-GP 2

GAP-CLOSE-PWR-3-GP phoenix tsai 09/13/07 2

2007/9/28
Close to VFB Pin (pin5)

G S S S

C430

51125_TONSEL

PD

Id=7.7A Qg=8.5~13nC Rdson=16.5~21mohm

R332 30KR2F-GP

51125_FB1_R

74.51125.073

51125_VREF 3D3V_AUX_S5

R333 20KR2F-L-GP

0R2J-2-GP 0R2J-2-GP

Close to VFB Pin (pin2)

DY

SC10U10V5KX-2GP

C774 SC10U10V5KX-2GP SC10U10V5KX-2GP 51125_VREF 2 0R2J-2-GP 1 R318

C765

Eiger

3D3V_AUX_S5

0R2J-2-GP

DY DY

1 R316

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

0R2J-2-GP

1 R317

DCDC 5V/3D3V (TPS51125)


Size A3 Document Number Rev

D45/D46
Sheet
1

PD
33 of 47

Date: Friday, March 14, 2008


5 4 3 2

5V_S5

20071009
C605 SC1U16V3ZY-GP

1D5V_S0 Iomax=2.5A

OCP>3.2A
G86 1 2 GAP-CLOSE-PWR G87 2 GAP-CLOSE-PWR G89 2 GAP-CLOSE-PWR G88 2 GAP-CLOSE-PWR C631 2 SC10U10V5ZY-1GP 1D5V_S0

1D8V_S3
D

1 1 1 C622 C617 SC10U10V5ZY-1GP SC10U10V5ZY-1GP 2

Vo(cal.)=1.5024V
9 1D5V_LDO NC#5 VOUT ADJ GND 5 6 7 8 1

R485 17,20,25,28,30,35,36,37 PM_SLP_S3# 1 0R2J-2-GP 3D3V_S0 1 2

R483 2K2R2J-2-GP 2 R487 32,35,36,43 CPUCORE_ON 1 2 0R2J-2-GP

R489 20K5R2F-GP 2

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Vo=0.8*(1+(R1/R2))
5V_S5

SCD01U16V2KX-3GP

U47 RT9018A-25PSP-GP

R490 18KR2F-GP

C630

C625 SC10U10V5ZY-1GP

4 3 2 1

VDD VIN EN PGOOD

GND

20071009

1D1V_S0 Iomax=1.8A

OCP>2.3A
G19 1 2

1D8V_S3

C509 SC1U16V3ZY-GP

GAP-CLOSE-PWR G16 2 GAP-CLOSE-PWR G18 2 GAP-CLOSE-PWR G17 2 GAP-CLOSE-PWR

C121 C120 SC10U10V5ZY-1GP SC10U10V5ZY-1GP

VGA
GND

Vo(cal.)=1.1057V
1D1V_LDO NC#5 VOUT ADJ GND 5 6 7 8 1

1D1V_S0

VGA
17,20,25,28,30,35,36,37 PM_SLP_S3# SB 1

R417

VGA
2

33KR2F-GP 3D3V_S0 1

VGA
R413 32,35,36,43 CPUCORE_ON 1 0R2J-2-GP 2

SCD01U16V2KX-3GP

C802 U37 SCD22U10V2KX-1GP RT9018A-25PSP-GP

R414 C504 10K7R2F-GP

C119 SC10U10V5ZY-1GP SC10U10V5ZY-1GP

4 3 2 1

VDD VIN EN PGOOD

C118 SC10U10V5ZY-1GP SC10U10V5ZY-1GP

R415VGA 2K2R2J-2-GP 2

VGA

VGA R416
28KR2F-GP 2

VGA VGA VGA

VGA

VGA

VGA

Vo=0.8*(1+(R1/R2)) Iomax=1A OCP>2A


2 1 DDR_VREF_S3 DDR_VREF_PWR C588 G66 SCD1U10V2KX-4GP 1 2 GAP-CLOSE-PWR G65 1 2 1 2 3 4 5 1 1 GAP-CLOSE-PWR G67 1 2 GAP-CLOSE-PWR Title C563 SC10U10V5ZY-1GP Size A3 Document Number Eiger
A

5V_S5

1D8V_S3

C587 SC1U10V3ZY-6GP

PD

U45
A

17,25,28,35 PM_SLP_S4# DDR_VREF_S3_1

R478

2 R477

9026_S5 1 0R2J-2-GP 9026_S3 1 0R2J-2-GP 1

10 9 8 7 6

11

C568 SC1U10V2ZY-GP

GND

VIN VDDQSNS S5 VLDOIN GND VTT S3 PGND VTTREF VTTSNS

C592 SC10U10V5ZY-1GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

TPS51100DGQR-GP

C566 SC10U10V5ZY-1GP

1D5V & 0D9V D45/D46


Sheet
1

Rev

PD
34 of 47

Date: Friday, March 14, 2008


5 4 3 2

DCBATOUT G20 1 2

DCBATOUT_51117A

1D8V_PWR G53 1 2

1D8V_S3

1 1

GAP-CLOSE-PWR G21 2 GAP-CLOSE-PWR G22 2 GAP-CLOSE-PWR G23 2 2 2 C125 SC10U25V6KX-1GP C127 SCD1U50V3KX-GP 5 6 7 8 GAP-CLOSE-PWR

GAP-CLOSE-PWR G57 2 GAP-CLOSE-PWR G58 2


D

SB
D

5V_S5

20071018
1 R412 300R2J-4-GP 2

DY

TC7 ST15U25VDM-1-GP

DCBATOUT_51117A

51117A_V5FILT R118 C503 SC1U10V2KX-1GP 1 2 0R3-0-U-GP U13 4 10 51117A_VFB 51117A_VBST 5 14 1 2 11 V5FILT V5DRV VFB VBST EN_PSV TON TRIP DRVH DRVL LL VOUT PGOOD GND PGND 13 9 12 3 6 51117A_DRVH 51117A_DRVL 1 51117A_LL 2D2R5J-1-GP R673 51117A_LL1 2 C122 1

C502 SC1U10V2KX-1GP

U14

C508 SC10U25V6KX-1GP

C129 SC2200P50V2KX-2GP

GAP-CLOSE-PWR G59 2 GAP-CLOSE-PWR G60 2 GAP-CLOSE-PWR G61 2 GAP-CLOSE-PWR G62 2 GAP-CLOSE-PWR G54 2 GAP-CLOSE-PWR G55 2 GAP-CLOSE-PWR G56 2 GAP-CLOSE-PWR G64 2 GAP-CLOSE-PWR G63 2
C

D D D D D

SB

5V_S5 A

FDS8880-NL-GP S S S G G

SCD1U25V3KX-GP

D8 B0530WS-7-F-GP K

Id=11.6A Qg=12~16nC, Rdson=9.6~12mohm

Cyntec 10*10*4 DCR=3mohm, Irating=1A Isat=40A

1D8V Iomax=13A OCP>20A


1D8V_PWR

4 3 2 1

20071005
L24 1 2 1 IND-1D5UH-34-GP

C540 SCD1U10V2KX-4GP

17,25,28,34 PM_SLP_S4#

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1 2 1 TPS51117PWR-GP R119 11K5R3F-GP 2 4 3 2 1 51117A_VFB 2

C109 SC18P50V2JN-1-GP 2

R113 0R2J-2-GP 1 2 1 R114 2

SB

CPUCORE_ON

32,34,36,43

FDS8896 84.08896.037

R109 200KR2J-L1-GP

SB

DY

PD

SB Panasonic ESR=15mohm R110 6K98R2-GP Iripple=2.7A 20071011

249KR2F-GP

51117A_EN_PSV 51117A_TON 51117A_TRIP

7 8

C797

Id=14A Qg=28~36nC, Rdson=5.8~7.3mohm

R112 10KR2F-2-GP

DY

3D3V_S0

DY

20071005 U15

SB

5 6 7 8

1 TC18 SE330U2D5VDM-1GP

D D D D D

POWERPAK-8P-GP

SC330P50V2KX-3GP

S S S G G

VCC_GFXCORE R665 0R3-0-U-GP 1 2 R660 0R3-0-U-GP 1 2 R661 0R3-0-U-GP 1 2 R663 0R3-0-U-GP 1 2

1D05V_S0

Close to VFB Pin (pin5)

1D05V_PWR 1D05V_S0 GAP-CLOSE-PWR G124 1 2 1 GAP-CLOSE-PWR G123 2 GAP-CLOSE-PWR G81 2 GAP-CLOSE-PWR G82 2 GAP-CLOSE-PWR G83 2 GAP-CLOSE-PWR G76 2 GAP-CLOSE-PWR G84 2 GAP-CLOSE-PWR G79 2 GAP-CLOSE-PWR G85 2 GAP-CLOSE-PWR G77 2 GAP-CLOSE-PWR G80 2 GAP-CLOSE-PWR G78 2 GAP-CLOSE-PWR

UMANOGFX UMANOGFX

DCBATOUT_51117B

DCBATOUT G95 1 2

DCBATOUT_51117B

PD
2 1

PD

PD
TC24 ST15U25VDM-1-GP 1 GAP-CLOSE-PWR G93 2 GAP-CLOSE-PWR G92 2 GAP-CLOSE-PWR

R664 0R3-0-U-GP 1 2 R666 0R3-0-U-GP 1 2

UMANOGFX UMANOGFX UMANOGFX

U51 AOL1426-GP

SC10U25V6KX-1GP

GAP-CLOSE-PWR G94 2

UMANOGFX

C357 SC10U25V6KX-1GP

C640 C639 C815 SC10U25V6KX-1GP SCD1U50V3KX-GP

C638 SC2200P50V2KX-2GP

5 6 7 8 D D D D

SB

5V_S5

DY 20071018
R544 300R2J-4-GP

Id=14.5A Qg=9.2~14nC, PD Rdson=11~14mohm


51117B_DRVH 51117B_LL 1 2D2R5J-1-GP R674

Cyntec 10*10*4 1D05V Iomax=16A DCR=1.05+-5%mohm,Irating=30A Isat=60A OCP>24A


L31 1 2 1 IND-D56UH-12-GP

4 3 2 1

S S S G

20071005
C352 SCD1U10V2KX-4GP 1

1D05V_PWR 1

51117B_V5FILT C695 SC1U10V2KX-1GP 1

5 6 7 8

ST220U2D5VBM-2GP 2

1 2

2R3F-GP U55 4 10 V5FILT V5DRV VFB VBST EN_PSV TON TRIP TPS51117PWR-GP R503 6K04R2F-GP DRVH DRVL LL VOUT PGOOD GND PGND 13 9 12 3 6 7 8

SCD1U25V3KX-GP

C798

U49 AOL1412-GP

20071005

C693 SC18P50V2JN-1-GP 2

5V_S5

51117B_LL1

ST220U2D5VBM-2GP

SB

R498

C649 2 1

SB
SC330P50V2KX-3GP

PD
D D D D

C673 SC1U10V2KX-1GP

PD
TC9 TC23 1

SB

DY

D23 B0530WS-7-F-GP K

DY

4 3 2 1

51117B_DRVH 51117B_DRVL 51117B_LL

51117B_VFB 51117B_VBST R542 17,20,25,28,30,34,36,37 PM_SLP_S3# 1 2 51117B_EN_PSV 1 R543 251117B_TON 51117B_TRIP 10KR2F-2-GP 191KR2F-1-GP 1 1

5 14 1 2 11

Id=13A Qg=21.5~33nC, 51117B_DRVL Rdson=5.5~6.7mohm

R548 10KR2F-2-GP 51117B_VFB 2 S S S G

DY

PD

3D3V_S0 1

Si4634DY 84.04634.037

R545 24K3R2F-1-GP

Panasonic ESR=15mohm Iripple=2.7A

PD

20071011
R546 200KR2J-L1-GP 2

Close to VFB Pin (pin5)


1

PD
A

C806 SCD1U10V2KX-5GP

PD

CPUCORE_ON

32,34,36,43

Eiger

Wistron Corporation

Vout=0.75V*(R1+R2)/R2
Title Size A3 Document Number

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

TPS51117_1D8V_1D05V
Rev

D45/D46
Sheet
1

PD
35 of 47

Date: Monday, March 24, 2008


5 4 3 2

C698 1 2 POWER_MONITOR 1 DCBATOUT_6263A GFX_VID[4..0] 7 G34 1 2 GAP-CLOSE-PWR G37 2 GAP-CLOSE-PWR G32 2 GAP-CLOSE-PWR G33 2 GAP-CLOSE-PWR G35 2 GAP-CLOSE-PWR G36 2 GAP-CLOSE-PWR
D

DCBATOUT

SCD01U50V2KX-1GP

UMAGFX
R553 UMAGFX
D

R552 10KR2J-3-GP 2

GFXVR_EN

1 2 0R2J-2-GP

20070927
1 R551 1 R550 1 R549 6236A_VID2 1 R540 6236A_VID1 1 R537 6236A_VID0 1 6236A_VID4 6236A_VID3

PH & PL on P.7 PD
R554 17,20,25,28,30,34,35,37 PM_SLP_S3# 1 2 0R2J-2-GP

UMAGFX

UMAGFX 0R2J-2-GP
2 2

GFX_VID4 1

UMAGFX 0R2J-2-GP

DY
R276 1 DY 2 0R2J-2-GP R275 2 10KR2F-2-GP

GFX_VID3 UMAGFX 0R2J-2-GP GFX_VID2 2 UMAGFX 0R2J-2-GP GFX_VID1 2 0R2J-2-GP UMAGFX GFX_VID0 2

1 2

20070927
TC11 ST15U25VDM-1-GP

DY

3D3V_S0

UMAGFX
3D3V_S0 R555 1 DY 2 0R2J-2-GP 1 R556 2 1K91R2F-1-GP

UMAGFX
6236A_VR_ON 6236A_AF_EN 6236A_GOOD 6236A_PMON

32,34,35,43 CPUCORE_ON

OCSET VW

PVCC

G S S S

6263A_VCC_PRM

DROOP

UMAGFX

SC180P50V2JN-1GP

1 R531 2 374KR3-GP

www.kythuatvitinh.com
20071001
2 VGFXCORE VCC_GFXCORE DCBATOUT_6263A 1 32 31 30 27 26 33 29 28 25 C691 1 G25 C387 SC10U25V6KX-1GP 1 2 U56 SC10U25V6KX-1GP 2 GND_T FDE VID4 VID3 PGOOD AF_EN VR_ON PMON VID2 2 150KR2F-L-GPUMAGFX R541 1 2 6236A_RBIAS 1 2 3 RBIAS SOFT VID1 VID0 24 23 5V_S0 U16 SI4800BDY-T1 5 6 7 8

UMAGFX UMAGFX

D D D D

C378 SCD1U50V3KX-GP

UMAGFX

GAP-CLOSE-PWR G26 2 GAP-CLOSE-PWR G27 2 GAP-CLOSE-PWR G28 2 GAP-CLOSE-PWR G24 2 GAP-CLOSE-PWR G29 2 GAP-CLOSE-PWR

R263

2 UMAGFX

6236A_SOFT C386 1 2 UMAGFX SCD01U50V2KX-1GP 6236A_OCSET

22

C384 1 2

2007/9/10

UMAGFX

C683 10KR2F-2-GP 1 2

C687 1

2 SC1KP50V2JN-2GP 1 R536 2 6K98R3F-GP

6236A_VW 4 5 6 7

LGATE

21

6236A_LGATE

SC2D2U10V3KX-1GP

Id=7A Qg=8.7~13nC Rdson=23~30mohm

Cyntec 7*7*3 DCR=8mohm, Irating=13A Isat=24A


L9 1 2 COIL-D82UH-2-GP

VGFXCORE Iomax=6.5A OCP>12A


VGFXCORE

SC68P50V2JN-1GP 6236A_COMP_R

UMAGFX

6236A_COMP

UMAGFX

4 3 2 1

COMP FB

PGND

20

UMAGFX

C679 1 2

UMAGFX

6236A_FB

PHASE

19

6236A_PHASE

VDIFF VSUM VDD VSEN RTN DFB VSS

UGATE BOOT

18 17

6236A_UGATE

UMAGFX
2K21R3F-L-GP 2 6236A_VDIFF C667 6236A_VSEN 1 2 SC560P50V2KX-2GP

VIN

VO

6236A_DROOP 10

11

12

13

14

15

16

UMAGFX
1 6236A_FB_R R528 2 4K99R2F-L-GP UMAGFX

6236A_VSUM

6263A_VCC_PRM

6236A_VDD

6236A_DFB

6236A_VIN

UMAGFX

G S S S

6236A_RTN

UMAGFX

2007/9/10
4 3 2 1

G31 GAP-CLOSE-PWR

74.06263.073

ISL6263ACRZ-T-GP

UMAGFX

U17 SI4812BDY-T1-E3-GP

D D D D

Id=7.7A C799 Qg=8.5~13nC DY Rdson=16.5~21mohm

R530 1

UMAGFX

5 6 7 8

6236A_BOOT 1 2 R535 2D2R3J-2-GP

1 6236A_BOOT_R

2D2R5J-1-GP R675

UMAGFX

C684 SCD22U16V3KX-2-GP

DY
SC330P50V2KX-3GP

G30 GAP-CLOSE-PWR

R26 for Intel GPU/With Load line R27 for ATI GPU/Without Load line
C666

UMAGFX

UMA

UMA

C675 1 2

R257 1 2 5V_S0

SB

SC1KP50V2JN-2GP

C660 SC1KP50V2JN-2GP
B

SC1KP50V2JN-2GP 2 1

UMAGFX

UMAGFX
C659

SC1U16V3KX-2GP R526 2K87R2F-1-GP

10R2F-L-GP

SB
2

UMAGFX
R519 1 2

UMAGFX
DCBATOUT
B

UMAGFX

C367 SC330P50V2KX-3GP

UMAGFX

10R2F-L-GP 1

UMAGFX
C664 SCD01U25V2KX-3GP 1 R527 2 0R0402-PAD 1 2 TC8 SE330U2VDM-6-GP

UMAGFX
1

UMAGFX
R249 1KR3F-GP

9 VCC_AXG_SENSE

G97 1 G96 1

GAP-CLOSE-PWR 2 GAP-CLOSE-PWR 2

UMAGFX SB UMAGFX
1 2 C655 R496 1 2 7K68R2F-GP 6236A_VSUM_R

2007/9/10

UMAGFX
2 C365 1

9 VSS_AXG_SENSE

R508 10R3F-GP 2

R507 10R3F-GP 2

4K53R2F-1-GP 1 R246

6236A_VSUM_R_VCC_PRM

UMAGFX

UMAGFX

Panasonic ERT-J1VR103J

UMAGFX
2

1 R497 2 3K57R2F-GP

NTC-10K-9-GP

2007/9/10
Parallel

UMAGFX

VSS_AXG_SENSE_OUTCAP VCC_AXG_SENSE_OUTCAP

1 R500

UMAGFX

SCD022U50V3KX-GP 2 UMAGFX

G90 GAP-OPEN-PWR

1 G91 GAP-OPEN-PWR

UMAGFX

SCD1U25V3KX-GP 2

C665 SCD033U25V3KX-GP 1 2

UMAGFX

Place close to L1

Eiger

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

ISL6263A_GFX CORE
Size C Date:
5 4 3 2

Document Number

Rev

D45/D46
Monday, March 24, 2008
1

PD
36 of 47

Sheet

DCBATOUT 1

DCBATOUT_8202 G101 2 GAP-CLOSE-PWR G100 2 GAP-CLOSE-PWR G99 2 GAP-CLOSE-PWR G98 2 GAP-CLOSE-PWR

VGA_CORE_PWR G68 1 5V_S5 1 DCBATOUT_8202 1 VGA R529 10R2F-L-GP 5V_S5 2

VGA_CORE

GAP-CLOSE-PWR G69 2 GAP-CLOSE-PWR G70 2 GAP-CLOSE-PWR G71 2 GAP-CLOSE-PWR G72 2 GAP-CLOSE-PWR G73 2 GAP-CLOSE-PWR G74 2 GAP-CLOSE-PWR G75 2 GAP-CLOSE-PWR

SB
2 1 1 5 6 7 8 C682 SC10U25V6KX-1GP SC10U25V6KX-1GP C674 SC10U25V6KX-1GP C668 SCD1U50V3KX-GP 1

43 VGACORE_PWRGD

17,20,25,28,30,34,35,36

PM_SLP_S3#

www.kythuatvitinh.com
3D3V_S0 1 2 1 2 1 SC_VCC 1 D24

VGA

R494 10KR2F-2-GP

C662 SC1U10V3KX-3GP

U53 SI4800BDY-T1

D D D D

VGA CH521S-30-GP-U1 2

VGA

C650 SC100P50V2JN-3GP U54

R532

C680

4 3 2 1

G S S S

VGACORE_PWRGD

SB

VGA

Iomax=9A OCP min = 14A

SC411_BST_L 1

2SC411_BST 1

2SC411_LX

VGA

VGA

VGA

VDD

SC411_DH SC411_LX

L30

VGA_CORE_PWR

R533

VGA
1

PGOOD

BOOT VDDP

13

VGA

7D5R2F-GP 5V_S5 1

SCD1U25V3KX-GP VGA

VGA_CORE_PWR

5 6 7 8

SC411_PSV

15

EN/DEM

10KR2F-2-GP DCBATOUT_8202

VGA
R534 1 2 1MR2F-GP VGA

C678 5 SCD22U10V2KX-1GP NC#5 14 NC#14 16 TON

UGATE PHASE OC

12 11 10

SC411_DH SC411_LX R512 SC411_LX_L 1

C651 SC1U10V3ZY-6GP

SC411_TON VGA 1

G S S S

C656

VGA SC411_LX SC411_DL 4 3 2 1

C653 SC47P50V2JN-3GP

VGA

C676 VGA_CORE_PWR 1 SC1KP50V2KX-1GP SC411_VFB 3

VOUT 10KR2F-2-GP PGND GND GND FB LGATE 8 SC411_DL

DY

SC411_VFB 1

VGA

VGA

VGA

Sanyo, 330uF, 2.5V ESR=9mohm

SB VGA VGA

R504 10KR2F-2-GP 2

DY
B

17

U52 SI4812BDY-T1-E3-GP SC330P50V2KX-3GP

DY

VGA

C627

D D D D

R505 3K4R2F-GP

TC22 SE330U2VDM-6-GP SCD1U10V2KX-4GP

2D2R5J-1-GP COIL-1UH-34-GP R511

RT8202PQW-GP

VGA

Vout=0.75*(1+R427/R189)
VGA

Eiger

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

VGA_CORE_S0 (UMA)
Size A3 Document Number Rev

D45/D46
Sheet
1

PD
37 of 47

Date: Friday, March 14, 2008


5 4 3 2

AD+ U25 8 7 6 5
D

NEAR
1 2 3 4 DCBATOUT 1 U33 2 AD+ 1 2 3 4 S S S G D D D D 8 7 6 5
D

D D D D

S S S G

BT+

P2003EVG-GP 2 2

R371 100KR2J-1-GP

AD+_TO_SYS

R370 1

D01R2512F-4-GP AD+_G_2 AD+ 1

C460 SCD1U25V2ZY-1GP

R366 10KR2F-2-GP 1

P2003EVG-GP

R372 10KR2F-2-GP R378 0R2J-2-GP 1 2 1 2 2

AD+_G_1

1 R377 470KR2J-2-GP 2

G46 GAP-CLOSE-PWR

G45 GAP-CLOSE-PWR

DC_IN_D

Q11 2N7002DW-1-GP

AD+ C464 SC1U25V0KX-GP

DCBATOUT SCD1U50V3KX-GP 2 1 BQ24745_CSSP C462 2 1 2 PD 1

DCIN ACIN

CSSP

5 6 7 8

C467 SCD01U50V2KX-1GP 1

R384 49K9R2F-L-GP 1

3D3V_AUX_S5

11

VDDSMB

CSSN ICOUT BOOT VDDP

27 26 25 21

BQ24745_CSSN ICOUT TP1

D19

C468 1 2

AC_OK

C482 SC1U10V3KX-3GP

2BQ24745_ACOK 13 10

ACOK SCL

4 3 2 1

R394

BQ24745_BST 1 R382 2BQ24745_BST1 BQ24745_VDDP 0R0603-PAD

1SS4000GPT-GP

SC1U10V3KX-3GP

U2 FDS8884-GP

BQ24745_ACIN

DY

BQ24745_DCIN

22

ICREF

www.kythuatvitinh.com
6 5 4 R381 309KR3F-GP 1 C456 SC10U25V6KX-1GP CHG_AGND C459 SC10U25V6KX-1GP C29 SC10U25V6KX-1GP 2 AC_OK CHG_AGND C24 SCD1U25V2ZY-1GP C466 SCD1U50V3KX-GP C807 SCD1U50V3KX-GP 1 1 1 1 1 28 D D D D S S S G 0R0402-PAD UGATE PHASE 28,39 BAT_SDA CHG_AGND phoenix tsai 09/28/07 9 SDA LGATE 14 NC#14 PGND CSOP 24 24745_HIGH_G BT+ 28,39 BAT_SCL 23 20 19 18 17 2 C473 1 SCD1U50V3KX-GP FBO EAI EAO VREF CE GND S S S G BQ24745_LX1 1 2 C463 SCD1U50V3KX-GP 5 6 7 8 24745_LOW_G L17 1 2 IND-5D6UH-32-GP U3 FDS8884-GP 2 D D D D BT+_R 1 2 R375 D01R2512F-4-GP 2 1 C454 SC10U25V6KX-1GP 2 1 C453 SC10U25V6KX-1GP 2 1 C452 SC10U25V6KX-1GP 2 1 C455 SC10U25V6KX-1GP 2 1 C449 SCD1U50V3KX-GP 2 2 G48 SC150P50V2JN-3GP C476 1 2 BQ24745_FBO_RC 1 R388 2 200KR2F-L-GP C474 R385 SC2200P50V2KX-2GP 7K5R2F-1-GP 2 1BQ24745_EAO_RC 2 1 1 2 C472 SC56P50V2JN-2GP 4K7R2J-2-GP R389 1 2BQ24745_FBO 6 BQ24745_EAI 5 BQ24745_EAO 4 BQ24745_VREF 3 BQ24745_CHG_ON 7 12 16 VICM R391 C479 SC220P50V2KX-3GP 2 1 4 3 2 1 CHG_AGND BQ24745_IINP 8 CSON GAP-CLOSE-PWR GAP-CLOSE-PWR 1 1 2 G47 NC#16 GND 3D3V_AUX_S5 CHG_AGND 1 2 1 U34 BQ24745RHDR-GP C477 SCD1U25V2ZY-1GP C470 SC1U10V3KX-3GP VFB 1 15 BATT_SENSE BATT_SENSE 39 BQ24745_CSIP BQ24745_CSIN 2 29 3D3V_AUX_S5 1 1 2 R62 0R0402-PAD

CHG_AGND 0R0402-PAD 1 2

28
B

AD_IA

AC_IN# to KBC
28
A

R395 100KR2J-1-GP BQ24745_VREF AC_IN# 2

SB

CHG_AGND

AC_IN# 1

R390 100KR2J-1-GP 3D3V_AUX_S5 R393 100KR2J-1-GP 1 2 BQ24745_CHG_ON C478 SCD1U10V2KX-4GP 2 1

CHG_AGND

C481 SC1U10V3KX-3GP Q13 2N7002-11-GP

Eiger

G S

AC_OK 2

R392 100KR2J-1-GP G

DY

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

D Q12 2N7002-11-GP S

28

CHG_ON#

BQ24745 Charger
phoenix tsai 09/28/07 Size A3 Document Number Rev

D45/D46
Sheet
1

PD
38 of 47

Date: Friday, March 14, 2008


5 4 3 2

Adaptor in to generate DCBATOUT


DCIN1 AD_JK

AD+

1 1 1 3
4

2 4 5
DC-JACK70-GP-U1

C435 SCD1U50V3ZY-GP

C436 SCD1U50V3ZY-GP

D17 P4SSMJ24PT-GP R354 200KR2J-L1-GP 200KR2J-L1-GP

AD+_2

1 2 3 4

U24 S S S G

D D D D

8 7 6 5

P2003EVG-GP

1 2 2

C441 SC1U50V5ZY-1-GP

AD_OFF#_JK

PDTA124EU-1-GP Q9

1
R353 100KR2J-1-GP

www.kythuatvitinh.com
SB
28 AD_OFF

Q10 R1

2 IN

R2

1 GND

3 OUT

DTC114EUA-1-GP

3D3V_AUX_S5 3D3V_AUX_S5

D18 BAV99PT-GP-U
2

D2

DY
3

DY
3

DY
3

D1 BAV99PT-GP-U

28,38 BAT_SCL 28,38 BAT_SDA 28 BAT_IN# BT+

1 2

4 3
SRN33J-5-GP-U

BATA_SCL_1 BATA_SDA_1

EC8 SC10P50V2JN-4GP

BAV99PT-GP-U

RN4

DY
EC78 SC1000P50V3JN-GP SC1000P50V3JN-GP

EC76 SCD1U50V3ZY-GP

EC77 SCD1U50V3ZY-GP

EC75 SC1000P50V3JN-GP

PD
1

38 BATT_SENSE

R1
C

R2

E C

BATTERY CONNECTOR
BAT1 R23 100KR2J-1-GP
2

8 1 2 3 4 5 6 7 9
TYCO-CON7-11-GP

EC7 SC10P50V2JN-4GP SC10P50V2JN-4GP

DY

DY

20.80702.007
ZZZZ

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number

2 R22 0R0402-PAD

AD/BATT CONN D45/D46 Sheet


39
E

Rev

PD
of 47

Date: Monday, March 24, 2008


D

EMI Caps
5V_CRT_S0 3D3V_LAN_S5 DCBATOUT 5V_S0 1D8V_S0 3D3V_AUX_S5

EC58 1 1

EC13 1 1 1 1 1 2 1 2 EC103 SCD1U25V2ZY-1GP SCD1U25V2ZY-1GP EC14 SCD1U25V2ZY-1GP 2 2 EC114 SCD1U25V2ZY-1GP 2 EC72 SCD1U25V2ZY-1GP 2 EC73 SCD1U25V2ZY-1GP 1 EC80 SCD1U25V2ZY-1GP 2 EC111 SCD1U25V2ZY-1GP 1

EC116 2

EC108 2

EC44 1

EC97 1

EC99 1

EC94 1

EC92 1

EC93 1

EC70 1

EC71

EC9 1

DY
SCD01U50V2ZY-1GP

DY
SCD01U50V2ZY-1GP

DY
SCD01U50V2ZY-1GP

DY
SCD1U16V2ZY-2GP

DY
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

5V_S5

3D3V_S0

1D05V_S0

VGA_CORE EC113 1 1 1 1 1 2 EC118 SC33P50V2JN-3GP EC79 SC33P50V2JN-3GP EC117 SC33P50V2JN-3GP EC102 SC33P50V2JN-3GP EC32 1 1 2 EC35 SC33P50V2JN-3GP EC46 SC33P50V2JN-3GP EC115 2 EC82 1 EC29 1 EC109 1 EC105 1 EC89 1 EC101 1 EC107 1 EC104 1 EC106 1 EC12 1 EC45 1 EC81 1 EC95 1 EC10 EC11 1 EC100 1 2

DY
SCD01U50V2ZY-1GP

DY
SCD01U50V2ZY-1GP

DY
SCD1U16V2ZY-2GP

DY
SCD1U16V2ZY-2GP

DY
SCD1U16V2ZY-2GP

DY
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

DY
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

DY
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

DY
SCD1U16V2ZY-2GP

DY
SCD1U16V2ZY-2GP

DY
SCD1U16V2ZY-2GP

DY
SCD1U16V2ZY-2GP

DY
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

UMA

UMA

UMA

UMA

UMA

UMA

DY
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

www.kythuatvitinh.com
PD PD
1D8V_S3 DCBATOUT VCC_GFXCORE EC123 EC124 1 1 1 2 2

SB

34.4B312.002

34.42T14.002

34.4B312.002

SPR4 SPRING-58-GP

SPR3 SPRING-57-GP

SPR2 SPRING-58-GP

EC127 SCD1U25V2ZY-1GP

SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

EC125 SCD1U25V2ZY-1GP

EC126 SCD1U25V2ZY-1GP

SB

DY

DY

Holes
1 H1 HOLE H20 HOLE H27 HOLE H32 HOLE H5 HOLE H11 HOLE H4 HOLE H13 HOLE H25 HOLE

SPR5 SPRING-57-GP 1 34.42T14.002

SPR7 SPRING-57-GP 34.42T14.002

DY

SB

EC41 2 EC38 2 EC39 2

DY DY DY DY DY DY DY DY DY DY

Keyboard EMI Caps


EC18 2 EC17 2 EC20 2 EC19 2 EC16 2 EC22 2 EC21 2 EC26 2 EC25 2 EC40 2 EC28 2

1 SC220P50V2JN-3GP KROW8 1 SC220P50V2JN-3GP KROW7 1 SC220P50V2JN-3GP KROW6 1 SC220P50V2JN-3GP KROW5 1 SC220P50V2JN-3GP KROW4 1 SC220P50V2JN-3GP KROW3 1 SC220P50V2JN-3GP KROW2 1 SC220P50V2JN-3GP KROW1 1 SC220P50V2JN-3GP KCOL2 1 SC220P50V2JN-3GP KCOL1

DY DY DY DY DY DY DY DY DY DY DY DY DY DY

1 SC220P50V2JN-3GP KCOL16 1 SC220P50V2JN-3GP KCOL15 1 SC220P50V2JN-3GP KCOL14 1 SC220P50V2JN-3GP KCOL13 1 SC220P50V2JN-3GP KCOL12 1 SC220P50V2JN-3GP KCOL11 1 SC220P50V2JN-3GP KCOL10 1 SC220P50V2JN-3GP KCOL9 1 SC220P50V2JN-3GP KCOL8 1 SC220P50V2JN-3GP KCOL7 1 SC220P50V2JN-3GP KCOL6 1 SC220P50V2JN-3GP KCOL5 1 SC220P50V2JN-3GP KCOL4 1 SC220P50V2JN-3GP KCOL3
B

SPR1 SPRING-5-GP 1 1 1 1 1 1 1 1 1 1 34.41Y01.001 1

SPR6 SPRING-5-GP 34.41Y01.001

EC36 2 EC37 2 EC33 2 EC34 2 EC30 2 EC31 2 EC15 2

DY
H26 HOLE H3 HOLE H23 HOLE H24 HOLE H18 HOLE H2 HOLE H16 HOLE H19 HOLE H6 HOLE H8 HOLE

DY

27,28 KROW[1..8] 27,28 KCOL[1..18] 5V_S0 H14 HOLE H15 HOLE H10 HOLE H29 HOLE H30 HOLE H7 HOLE H9 HOLE H31 HOLE H21 HOLE H17 HOLE 5V_S0

EC43 2 EC42 2 EC27 2

PD
14 10 14 8 U23C TSAHCT125PW-GP 12 13

11 U23D TSAHCT125PW-GP
A

H28 HOLE SB

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size

H22 2 1 1 0R0402-PAD

EMI/Spring/Boss
Document Number Rev

Date: Monday, March 17, 2008


5 4 3 2

D45/D46 Sheet
1

PD
40 of 47

7 PEG_RXP[15..0] 7 PEG_RXN[15..0] 7 PEG_TXP[15..0] 7 PEG_TXN[15..0] U41A


D

PEG_RXP[15..0] PEG_RXN[15..0] PEG_TXP[15..0] PEG_TXN[15..0]

PART 1 OF 7

PEG_TXP0 PEG_TXN0 PEG_TXP1 PEG_TXN1 PEG_TXP2 PEG_TXN2 PEG_TXP3 PEG_TXN3 PEG_TXP4 PEG_TXN4 PEG_TXP5 PEG_TXN5 PEG_TXP6 PEG_TXN6 PEG_TXP7 PEG_TXN7 PEG_TXP8 PEG_TXN8 PEG_TXP9 PEG_TXN9

AK33 AJ33 AJ35 AJ34 AH35 AH34 AG35 AG34 AF33 AE33 AE35 AE34

PCIE_RX0P PCIE_RX0N PCIE_RX1P PCIE_RX1N PCIE_RX2P PCIE_RX2N PCIE_RX3P PCIE_RX3N PCIE_RX4P PCIE_RX4N PCIE_RX5P PCIE_RX5N PCIE_RX6P PCIE_RX6N PCIE_RX7P PCIE_RX7N PCIE_RX8P PCIE_RX8N PCIE_RX9P PCIE_RX9N

PCIE_TX0P PCIE_TX0N PCIE_TX1P PCIE_TX1N PCIE_TX2P PCIE_TX2N PCIE_TX3P PCIE_TX3N PCIE_TX4P PCIE_TX4N PCIE_TX5P PCIE_TX5N PCIE_TX6P PCIE_TX6N PCIE_TX7P PCIE_TX7N PCIE_TX8P PCIE_TX8N PCIE_TX9P PCIE_TX9N

AG31 AG30 AF31 AF30 AF28 AF27 AD31 AD30 AD28 AD27 AB31 AB30 AB28 AB27 AA31 AA30 AA28 AA27 W31 W30

GRXP0 GRXN0 GRXP1 GRXN1 GRXP2 GRXN2 GRXP3 GRXN3 GRXP4 GRXN4 GRXP5 GRXN5 GRXP6 GRXN6 GRXP7 GRXN7 GRXP8 GRXN8 GRXP9 GRXN9

SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP

C573 2 C574 2 C581 2 C582 2 C296 2 C297 2 C575 2 C576 2 C279 2 C280 2 C583 2 C584 2 C294 2 C295 2 C579 2 C580 2 C277 2 C278 2 C589 2 C590 2 C292 2 C293 2 C577 2 C578 2 C274 2 C275 2 C585 2 C586 2 C290 2 C291 2 C268 2 C269 2 1D1V_S0

1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA 1 VGA

PEG_RXP0 PEG_RXN0 PEG_RXP1 PEG_RXN1 PEG_RXP2 PEG_RXN2 PEG_RXP3 PEG_RXN3 PEG_RXP4 PEG_RXN4 PEG_RXP5 PEG_RXN5 PEG_RXP6 PEG_RXN6 PEG_RXP7 PEG_RXN7 PEG_RXP8 PEG_RXN8 PEG_RXP9 PEG_RXN9

P C I E X P R E S S I N T E R F A C E

www.kythuatvitinh.com
AD35 AD34 AC35 AC34 AB33 AA33 AA35 AA34 Y35 Y34 PEG_TXP10 PEG_TXN10 PEG_TXP11 PEG_TXN11 PEG_TXP12 PEG_TXN12 PEG_TXP13 PEG_TXN13 PEG_TXP14 PEG_TXN14 PEG_TXP15 PEG_TXN15 PCIE_RX10P PCIE_RX10N PCIE_RX11P PCIE_RX11N PCIE_RX12P PCIE_RX12N PCIE_RX13P PCIE_RX13N PCIE_RX14P PCIE_RX14N PCIE_RX15P PCIE_RX15N Clock 3 CLK_PCIE_PEG 3 CLK_PCIE_PEG# CLK_PCIE_PEG CLK_PCIE_PEG# AJ31 AJ30 AK35 AK34 PCIE_REFCLKP PCIE_REFCLKN SM Bus NC_SMB_DATA NC_SMBCLK PERSTB 216-0707005-00-GP C263 SC100P50V2JN-3GP PCIE_TX10P PCIE_TX10N PCIE_TX11P PCIE_TX11N PCIE_TX12P PCIE_TX12N PCIE_TX13P PCIE_TX13N PCIE_TX14P PCIE_TX14N PCIE_TX15P PCIE_TX15N Calibration PCIE_CALRN PCIE_CALRP NC_DRAM_0 NC_DRAM_1 NC_AC_BATT NC_FAN_TACH AG26 AJ27 AF3 AG9 AK29 AK14 VGA_AG26 1 R170 VGA_AJ27 1 R191 W28 W27 V31 V30 V28 V27 U31 U30 U28 U27 R31 R30 GRXP10 GRXN10 GRXP11 GRXN11 GRXP12 GRXN12 GRXP13 GRXN13 GRXP14 GRXN14 GRXP15 GRXN15 PEG_RXP10 PEG_RXN10 PEG_RXP11 PEG_RXN11 PEG_RXP12 PEG_RXN12 PEG_RXP13 PEG_RXN13 PEG_RXP14 PEG_RXN14 PEG_RXP15 PEG_RXN15 W35 W34 V33 U33 U35 U34 T35 T34 R35 R34

VGA

2KR2F-3-GP 2 1K27R2F-L-GP

17,23,25 PCIRST1#

R211 1

VGA
2

VGA

VGA_RST#

AM32

100R2F-L1-GP-U 2

71.0M82M.00U

VGA

VGA

ZZZZ

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

M8XM_PCIE
Size Document Number Rev

D45/D46
Date: Friday, March 14, 2008
5 4 3 2

PD
41 of 47

Sheet
1

U41B
PART 2 OF 7

0R2J-2-GP
D

SB
2 LVDDR AJ26 AH26 AK27 AL27 AM24 AN28 AN21 AN24 AN25 AM22 AP21 AP26 AM27 AR21 AR26 AM26 AJ22 AJ24

U41F

PART 7 OF 7
LVDDR_1 LVDDR_2 LVDDC_1 LVDDC_2 LVSSR_1 LVSSR_2 LVSSR_3 LVSSR_4 LVSSR_5 LVSSR_6 LVSSR_7 LVSSR_8 LVSSR_9 LVSSR_10 LVSSR_11 LVSSR_12 LVSSR_13 LVSSR_14 ControlVARY_BL DIGON AG7 AJ6 AK24 AL24 AN27 AN26 AP27 AR27 AG24 AH24 AK26 AL26 AR22 AP22 AN23 AN22 AP23 AR23 AP24 AR24 AP25 AR25 VARY_BL TP42 14

47 47 47 47 47 47 47 47 47

VIP_0 VIP_1 VIP_2 VIP_3 VIP_4 VIP_5 VIP_6 VIP_7 VHAD0

AM12 AL12 AJ12 AH12 AM10 AL10 AJ10 AH10 AM9 AL9 AJ9 AL7 AK7

VIP_0 VIP_1 VIP_2 VIP_3 VIP_4 VIP_5 VIP_6 VIP_7

TXCAM_DPA0P TXCAP_DPA0N VIP / I2C TX0M_DPA1P TX0P_DPA1N TX1M_DPA2P TX1P_DPA2N TX2M_DPA3P TX2P_DPA3N TXCBM_DPB0P TXCBP_DPB0N TX3M_DPB1P TX3P_DPB1N TX4M_DPB2P TX4P_DPB2N TX5M_DPB3P TX5P_DPB3N

AN9 AN10 AR10 AP10 AR11 AP11 AR12 AP12 AR14 AP14 AR15 AP15 AR16 AP16 AR17 AP17 AM14 AL14 1 1 AH17 AG17 AN19 AN20 AP19 AR19 AN18 AP18 AR18 AN16 AN17 AN15 AN11 AN12 AN13 AN14 1D8V_S0
D

1D8V_S0 C159 SC1U10V2KX-1GP

R181 1 1

VGA

VHAD_0 VHAD_1 VPHCTL VPCLK0 VIPCLK PSYNC DVALID SDA SCL

ATI_LCDVDD_ON ATI_TXBCLK+ ATI_TXBCLKATI_TXBOUT0+ ATI_TXBOUT0ATI_TXBOUT1+ ATI_TXBOUT1ATI_TXBOUT2+ ATI_TXBOUT214 14 14 14 14 14 14 14

1 2

VGA

VGA

2LVDDC

R182 0R2J-2-GP 1D8V_S0

LVDS channel

TXCLK_UP TXCLK_UN TXOUT_U0P TXOUT_U0N TXOUT_U1P TXOUT_U1N TXOUT_U2P TXOUT_U2N TXOUT_U3P TXOUT_U3N TXCLK_LP TXCLK_LN TXOUT_L0P TXOUT_L0N TXOUT_L1P TXOUT_L1N TXOUT_L2P TXOUT_L2N TXOUT_L3P TXOUT_L3N

47 47

PSYNC DVALID

AM7 AJ7 AK6 AM6 AN8 AP8 AG1 AH3 AH2 AH1 AJ3 AJ2 AJ1 AK2 AK1 AL3 AL2 AL1 AM3 AM2 AN2 AP3 AR3 AN4 AR4 AP4 AN5 AR5 AP5 AP6 AR6 AN7 AP7 AR7

1D8V_S0

1 R193

2 LPVDD 0R3-0-U-GP 1

C234 SC1U10V2KX-1GP

VGA

VGA

OSC_SPREAD

www.kythuatvitinh.com
1 216-0707005-00-GP

AL22 AK22

ATI_TXACLK+ ATI_TXACLKATI_TXAOUT0+ ATI_TXAOUT0ATI_TXAOUT1+ ATI_TXAOUT1ATI_TXAOUT2+ ATI_TXAOUT2-

14 14 14 14 14 14 14 14

LPVDD LPVSS

71.0M82M.00U

VGA

R646 1

OSC_SPREAD_VGA R647 147R2F-GP

47 47 47 47

DVPDATA20 DVPDATA21 DVPDATA22 DVPDATA23 GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6

DVPCNTL__MVP_0 DPA_PVDD DVPCNTL__MVP_1 DPA_PVSS DVPCNTL_0 INTEGRATED DVPCNTL_1 DPB_PVDD TMDS/DP DVPCNTL_2 DPB_PVSS DVPCLK DVPDATA_0 DPB_VDDR_1 DVPDATA_1 MULTI_GFX DPB_VDDR_2 DVPDATA_2 EXTERNAL DPA_VDDR_3 DVPDATA_3 TMDS DPA_VDDR_4 DVPDATA_4 DVPDATA_5 DPB_VSSR_1 DVPDATA_6 DPB_VSSR_2 DVPDATA_7 DPB_VSSR_3 DVPDATA_8 DPB_VSSR_4 DVPDATA_9 DPB_VSSR_6 DVPDATA_10 DPA_VSSR_5 DVPDATA_11 DPA_VSSR_7 DVPDATA_12 DPA_VSSR_8 DVPDATA_13 DPA_VSSR_9 DVPDATA_14 DPA_VSSR_10 DVPDATA_15 DVPDATA_16 DP_CALR DVPDATA_17 NC_TPVDDC DVPDATA_18 NC_TPVSSC DVPDATA_19 HPD1 DVPDATA_20 DVPDATA_21 DVPDATA_22 R DVPDATA_23 RB GPIO_0 GPIO_1 GENERAL GPIO_2 PURPOSE GPIO_3 I/O GPIO_4 GPIO_5 GPIO_6 GPIO_7_BLON GPIO_8_ROMSO GPIO_9_ROMSI GPIO_10_ROMSCK GPIO_11 GPIO_12 GPIO_13 GPIO_14_HPD2 GPIO_15_PWRCNTL_0 GPIO_16_SSIN GPIO_17_THERMAL_INT GPIO_18_HPD3 GPIO_19_CTF GPIO_20_PWRCNTL_1 GPIO_21_BBEN GPIO_22_ROMCSB GPIO_23_CLKREQB GPIO_24_JMODE GPIO_25_TDI GPIO_26_TCK GPIO_27_TMS GPIO_28_TDO GEN_A GEN_B GEN_C GEN_D_HPD4 GEN_E GEN_F GEN_G VREFG A2VSSQ DPLL_PVDD DPLL_PVSS PCIE_PVDD MPVDD MPVSS XTALIN XTALOUT DPLL_VDDC TS_FDO DMINUS DPLUS
THERMAL

VGA
2

C188 SC1U10V2KX-1GP SC1U10V2KX-1GP 2

C143 SC1U10V2KX-1GP

VGA
1D1V_S0

VGA

C195VGA SC1U10V2KX-1GP

1 2

C184 SC1U10V2KX-1GP

PLACE OR RESISTORS CLOSE TO ASIC

VGA

AR31 AP31

AG15 AH18 AG18 AG6

VGA_DP

1 R154

VGA

2 150R2F-1-GP

R639 150R2F-1-GP

R640 150R2F-1-GP

R641 150R2F-1-GP

SB

VGA

VGA

VGA_RB R461 1 VGA_GB R200 1 VGA_BB R192 1

VGA VGA VGA

2 0R0402-PAD 2 0R0402-PAD 2 0R0402-PAD 15 15

ATI_CRT_RED

15

VGA_27MSS

SB

90D9R3F-GP

VGA_27MSS

R424 10KR2J-3-GP

VGA
2 28 ATI_BL_ON 47 47 47 47 47

47 47 47 47 47 47 47

GPIO8 GPIO9 GPIO11 GPIO12 GPIO13

3.3V_DELAY

3.3V_DELAY SB R210 10KR2J-3-GP R125 1

SB
1

VGA

OSC_SPREAD_VGA GPIO17 2 10KR2J-3-GP

VGA
47 GPIO22 1 GPIO24 R127 1KR2J-1-GP

VGA
2

1D8V_S0 1

C158

VGA

R140 499R2F-2-GP

VGA
2 VGA_VREFG C157 SCD1U16V2ZY-2GP
PLACE VREF DIVIDER AND CAP CLOSE TO ASIC

AG2 AF2 AF1 AE3 AE2 AE1 AD3 AD2 AD1 AD5 AD4 AC3 AC2 AC1 AB3 AB2 AB1 AF5 AF4 AG4 AG3 AD9 AD8 AD7 AB4 AB6 AB7 AB9 AA9 AF8 AF7 AG5 AP9 AR9 AP13 AR13 AD12

G GB B BB

AR30 AP30

ATI_CRT_GREEN

15

DAC1

AR29 AP29 AN29 AN30

Close to VGA
ATI_HSYNC ATI_VSYNC

ATI_CRT_BLUE 15

HSYNC VSYNC RSET AVDD AVSSQ VDD1DI VSS1DI R2 R2B G2 G2B B2 B2B
DAC2

OPTIONAL STRAP TO GROUND FOR RB,GB,BB SEE DAC1_RGB SHEET

AN31 VGA_RSET1 R205 AR32 AP32 AR28 AP28 AM19 AL19 AM18 AL18 AM17 AL17 AK19 AK18 AK17 AL15 AM15 AM21 AL21 AK21 AH22 AG22 AJ21 AM29 AL29 AJ15 AH15 AJ5 AJ4 AH14 AG14 1 R165 A2VDD A2VDDQ

VGA

2 499R2F-2-GP AVDD1D8 L6 1 2 BLM15BD121SN1D-GP 1D8V_S0

VGA

VGA_R2 75R2F-2-GP 2 VGA_R2B R441 1 VGA_G2 R153 1 VGA_G2B R150 1 VGA_B2 R151 1 VGA_B2B R148 1

DY VGA DY VGA DY VGA

1 R443 2 0R2J-2-GP 2 75R2F-2-GP 2 0R2J-2-GP 2 75R2F-2-GP 2 0R2J-2-GP

C Y COMP V2SYNC H2SYNC A2VDD A2VDDQ

ATI_TV_CRMA 15 ATI_TV_LUMA 15

PD

IF Y,C,COMP OR R2,G2,B2 ARE USED R2B,G2B,B2B MUST BE CONNECTED TO GROUND OR TERMINATED AT CONNECTOR

C300 SC1U10V2KX-1GP

VGA

PLACE OR RESISTORS CLOSE TO ASIC

C241 SC1U10V2KX-1GP

VGA

VGA

249R2F-GP 2

VGA

DEPENDING ON OSC USED SELECT VOLTAGE DIVIDER RESISTOR VALUES C AND B TO ENSURE XTALIN VOLTAGE LEVEL OF 1.8V

VGA

C185 AM35 SC1U10V2KX-1GP A14 B15 AR33 AP33 AG19 AG21 TP43 1 AK4 AM4

DY

VDD2DI VSS2DI R2SET DDC1DATA DDC1CLK


DDC DP AUX DDC2DATA

R147

1D8V_S0

L25 1 2 BLM15BD121SN1D-GP

AR20 AP20

1D8V_S0

VGA C210 C177 SC1U10V2KX-1GP SC1U10V2KX-1GP


3.3V TO 5V LEVEL SHIFT LOGIC REQUIRED IF DDC1,DDC2 USED ON M8x OR DDC1,DDC2,DDC3 USED ON M7x DDC3,DDC4 ARE 5V TOLERANT ON M8x

DY

SC1U10V2KX-1GP SC1U10V2KX-1GP

SB 1 R161 1 R176

VGA

3.3V_DELAY

2 0R3-0-U-GP 2 0R3-0-U-GP

1D8V_S0

DY

VGA

2 715R2F-GP

VGA_CORE

USE OSCILLATOR OR CRYSTAL

PLL CLOCKS

ATI_EDID_DATA 14 ATI_EDID_CLK 14

VGA_XIN VGA_XOUT R472 1 1 1

DDC2CLK

VGA_CRYS
X5 2

2 1MR2J-1-GP

1D1V_S0

L4

DPLLVDDC 1 2 BLM15BD121SN1D-GP

DDC3DATA_DP3_AUXN DDC3CLK_DP3_AUXP DDC4DATA_DP4_AUXN DDC4CLK_DP4_AUXP

ATI_DDCDATA 15 ATI_DDCCLK 15

VGA
VGA_CRYS C570 SC1P50V2CN-1GP 20 VGA_G792_N C140 SC2200P50V2KX-2GP 20 VGA_G792_P 1

SC1P50V2CN-1GP

VGA_CRYS
2

XTAL-27MHZ-62-GP C569 VGA_CRYS OPTIONAL XTAL

216-0707005-00-GP 2

DY
1

71.0M82M.00U
C180 SC1U10V2KX-1GP

VGA

VGA

1D1V_S0

SC10U6D3V5MX-3GP

SC1U10V2KX-1GP

SB
R642 1 90D9R3F-GP

C114

C115

C206 SCD1U16V2ZY-2GP

VGA
2

VGA
2 2

VGA

VGA_XIN1

2 1

VGA_XIN R643 147R2F-GP

ZZZZ

VGA_27M

SB
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Custom Date:

VGA_27M

M8XM_IO
Document Number Rev

D45/D46
Sheet
1

PD
42 of 47

Monday, March 24, 2008

U41E

Part 6 of 7
P33 P34 P35 R27 R28 R29 R32 R33 U29 U32 V29 V32 T33 V34 V35 W29 W32 W33 AA29 AA32 AB29 AB32 Y33 AB34 AB35 AC33 AD29 AD32 AF29 AF32 AD33 AF34 AF35 AG27 AG29 AG32 AG33 AJ29 AJ32 AH33 AL34 AL35 AK32 A2 A34 C3 C5 A4 C18 A21 C23 C11 C13 C14 A18 A11 C26 C33 F35 R7 G10 F15 H17 G21 D29 A29 G1 F14 J15 E19 E22 E24 D7 G9 F26 G29 D33 M5 G4 E10 E12 F17 G18 G22 F30 J35 J18 H19 J21 F7 J12 J24 J26 K30 J32 F33 K6 K9 K14 K15 K17 K18 K19 K21 K22 M28 K3 L33 PCIE_VSS_1 PCIE_VSS_2 PCIE_VSS_3 PCIE_VSS_4 PCIE_VSS_5 PCIE_VSS_6 PCIE_VSS_7 PCIE_VSS_8 PCIE_VSS_9 PCIE_VSS_10 PCIE_VSS_11 PCIE_VSS_12 PCIE_VSS_13 PCIE_VSS_14 PCIE_VSS_15 PCIE_VSS_16 PCIE_VSS_17 PCIE_VSS_18 PCIE_VSS_19 PCIE_VSS_20 PCIE_VSS_21 PCIE_VSS_22 PCIE_VSS_23 PCIE_VSS_24 PCIE_VSS_25 PCIE_VSS_26 PCIE_VSS_27 PCIE_VSS_28 PCIE_VSS_29 PCIE_VSS_30 PCIE_VSS_31 PCIE_VSS_32 PCIE_VSS_33 PCIE_VSS_34 PCIE_VSS_35 PCIE_VSS_36 PCIE_VSS_37 PCIE_VSS_38 PCIE_VSS_39 PCIE_VSS_40 PCIE_VSS_41 PCIE_VSS_42 PCIE_VSS_43 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 MECH_1 MECH_2 MECH_3 P6 M9 M26 K28 M32 N14 N17 N19 N22 N33 N3 R5 U8 P13 P15 P18 P21 P23 P26 P29 P30 R1 U5 P9 R10 R14 R17 R19 R22 V3 AK9 U10 U15 U18 U21 U23 V7 W8 V10 V14 V17 V19 V22 V1 AK12 V9 W10 W15 W18 W21 W23 AA6 AA10 AA14 AA17 AA19 AA22 AB8 AB10 AB13 AB15 AB18 AB21 AB23 AC14 AC17 AC19 AC22 AF9 AD6 AB5 AD24 W5 AF6 AF14 AF21 AF22 AK10 AF17 AF18 AF19 AA3 AG12 AJ14 AH21 D4 AF15 AG10 AN6 AK15 AJ17 AJ18 AJ19 AF24 AN32 AK3 AN3 AR8 AM1 AK30 V11

U41D 1D8V_S0 D1 A8 A12 A16 A20 A24 A28 B1 H1 H35 L18 L19 L21 L22 M10 M35 P10 T1 Y1 B35 M1 D35 K10 K12 K24 K26 L14 L15 L17 VDDR1_1 VDDR1_2 VDDR1_3 VDDR1_4 VDDR1_5 VDDR1_6 VDDR1_7 VDDR1_8 VDDR1_9 VDDR1_10 VDDR1_11 VDDR1_12 VDDR1_13 VDDR1_14 VDDR1_15 VDDR1_16 VDDR1_17 VDDR1_18 VDDR1_19 VDDR1_20 VDDR1_21 VDDR1_22 VDDR1_23 VDDR1_24 VDDR1_25 VDDR1_26 VDDR1_27 VDDR1_28 VDDR1_29 1 1 1 1

PART 5 OF 7
1 1 1 C506 C510 C176 C136 PCIE_VDDR_1 PCIE_VDDR_2 PCIE_VDDR_3 PCIE_VDDR_4 PCIE_VDDR_5 PCIE_VDDR_6 PCIE_VDDR_7 PCIE_VDDR_8 PCIE_VDDC_1 PCIE_VDDC_2 PCIE_VDDC_3 PCIE_VDDC_4 PCIE_VDDC_5 PCIE_VDDC_6 PCIE_VDDC_7 PCIE_VDDC_8 PCIE_VDDC_9 PCIE_VDDC_10 PCIE_VDDC_11 PCIE_VDDC_12 VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8 VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22 VDDC_23 VDDC_24 VDDC_25 VDDC_26 VDDC_27 VDDC_28 VDDC_29 VDDC_30 VDDC_31 VDDC_32 VDDC_33 VDDC_34 VDDC_35 VDDC_36 VDDC_37 VDDC_38 VDDC_39 VDDC_40 VDDC_41 VDDC_42 VDDC_43 VDDC_44 AR34 AL33 AM33 AN33 AN34 AN35 AP34 AP35 R26 U26 V25 V26 W25 W26 AA25 AD26 AF26 AA26 AB25 AB26 N13 N15 N18 N21 N23 P14 P17 P19 P22 V18 V21 V23 W14 W17 W19 W22 AA15 AA18 AA21 AA23 AB14 AB17 AB19 AB22 AC13 AC15 AC18 AC21 AC23 AE18 AE22 AE19 AE21 R13 R15 R18 R21 R23 U14 U17 U19 U22 V15 W11 M12 M24 P11 P25 PCIE_VDDR SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP SC1U10V2KX-1GP SC1U10V2KX-1GP C310 C287 C298 SCD1U16V2ZY-2GP SC1U10V2KX-1GP

VGA
R212 1 2 0R3-0-U-GP
D

1D8V_S0

VGA

VGA

VGA

VGA

PCI-Express

C284

C198

C285

C134

VGA

VGA

VGA_CORE

C179

C135

C520

C150

VGA
2

VGA
2

VGA
2

VGA
2

VGA

Core

R11 R25 U11 U25

VDD_CT_5 VDD_CT_6 VDD_CT_7 VDD_CT_8 VDDR3_1 VDDR3_2 VDDR3_3 VDDR3_4 VDDR4_1 VDDR4_2 VDDR5_1 VDDR5_2

( 3.3V @ 50MA VDDR3)

C130

C181

C162

C165

VGA

VGA

VGA

VGA

AE14 AE15 AF12 AE17

P O W E R

C168

VGA

C616

VGA

AP2 AR2 AN1 AP1 A25 A32

1D8V_S0

C224

C161

C160

C200

C203

VGA

VGA
2

VGA
2

VGA
2

VGA

VDDRHA_1 VDDRHA_2 VSSRHA_1 VSSRHA_2 VDDRHB_1 VDDRHB_2 VSSRHB_1 VSSRHB_2 BBN_1 BBN_2 BBP_1 BBP_2

VGA_CORE

B25 B32 B2 L1 C2 L2 W13 AA13 U13 V13

1D8V_S0 R146 0R2J-2-GP

R149 0R2J-2-GP 1 1

VGA

VGA

L2 VGA_CORE_VDDCI 1 1 1 C148 C156 C209 1 SC1U10V2KX-1GP SC1U10V2KX-1GP SC1U10V2KX-1GP SC1U10V2KX-1GP SC1U10V2KX-1GP C208 SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP 1 2 BLM15BB121SN-GP

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SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP

C613

C167

C523

C169

VGA

VGA

VGA

VGA

1D8V_S0

VDDCT 1 2 R132 0R3-0-U-GP

VGA

C146 SCD1U16V2ZY-2GP

AA11 AB11 AD10 AF10

VDD_CT_1 VDD_CT_2 VDD_CT_3 VDD_CT_4

I/O Internal

C193

C182

C620

VGA

VGA

VGA

216-0707005-00-GP

71.0M82M.00U

VGA
Q6 FDN304P-1-GP D S 1 3D3V_S0 R117 100KR2J-1-GP

3.3V_DELAY

VGA

VGA
2

A35 MECH_1 AR1 MECH_2 AR35 MECH_3

TP94 TP88 TP93

VGA_PWRGD_3 D

VGA

CORE GND
37 VGACORE_PWRGD 1

R104 2VGA_PWRGD_1 1 0R3-0-U-GP R111

R105 2 VGA_PWRGD_2 G 1

Q5 2N7002-11-GP

216-0707005-00-GP

VGA
S ZZZZ

PCI-Express GND

VGA
2

SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP 2 2 2 1 1 1 SC1U10V2KX-1GP SC1U10V2KX-1GP SC1U10V2KX-1GP C132 C243 C271 C221

VGA

VGA

VGA

VGA

VGA

VGA

VGA
PCIE_VDDC 1 1 C220 C218 SCD1U16V2ZY-2GP C142 SCD1U16V2ZY-2GP 1 C131 SCD1U16V2ZY-2GP R115 1 2 0R3-0-U-GP 1D1V_S0

SC1U10V2KX-1GP

Memory I/O

VGA
2

VGA
2

VGA
2

VGA
2

C507

C219

C217

VGA

VGA

VGA

SC1U10V2KX-1GP SC1U10V2KX-1GP

SC1U10V2KX-1GP SC1U10V2KX-1GP

SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP

VGA

VGA

SC1U10V2KX-1GP SC1U10V2KX-1GP SC10U6D3V5MX-3GP

SC1U10V2KX-1GP SC1U10V2KX-1GP SC1U10V2KX-1GP

SC1U10V2KX-1GP SC1U10V2KX-1GP SC1U10V2KX-1GP

71.0M82M.00U

75KR2F-GP

VGA
2 2

SC1U10V2KX-1GP SC1U10V2KX-1GP SC1U10V2KX-1GP

SC1U10V2KX-1GP SC1U10V2KX-1GP

SC1U10V2KX-1GP SC1U10V2KX-1GP

SC1U10V2KX-1GP SC1U10V2KX-1GP SC1U10V2KX-1GP

C183

VGA

SC1U10V2KX-1GP SC1U10V2KX-1GP

SC1U10V2KX-1GP SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

Memory I/O Clock

Back Bias

VDDCI_1 VDDCI_2 VDDCI_3 VDDCI_4

VGA

VGA

VGA

VGA

VGA

C111

VGA

SCD1U16V2ZY-2GP

VGA

32,34,35,36 CPUCORE_ON

0R3-0-U-GP

DY

OPTIONAL RC NETWORK TO FINE TUNE POWER SEQUENCING

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Custom

M8XM_POWER
Document Number Rev

D45/D46
Sheet
1

PD
43 of 47

Date: Friday, March 14, 2008


5 4 3 2

U41C U41G 45 46 45 46
D

ODTA0 ODTA1 RASA0# RASA1# CASA0# CASA1# WEA0# WEA1# CKEA0 CKEA1 CSA0_0# CSA1_0#

ODTA0 ODTA1 RASA0# RASA1# CASA0# CASA1# WEA0# WEA1# CKEA0 CKEA1 CSA0_0# CSA1_0# MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63 P27 P28 P31 P32 M27 K29 K31 K32 M33 M34 L34 L35 J33 J34 H33 H34 K27 J29 J30 J31 F29 F32 D30 D32 G33 G34 G35 F34 D34 C34 C35 B34 C24 B24 B23 A23 C21 B21 C20 B20 J22 H22 F22 D21 J19 G19 F19 D19 C19 B19 A19 B18 C16 B16 C15 A15 H18 F18 E18 D18 J17 G15 E15 D15 N35 N34 AM34 DQA_0 DQA_1 DQA_2 DQA_3 DQA_4 DQA_5 DQA_6 DQA_7 DQA_8 DQA_9 DQA_10 DQA_11 DQA_12 DQA_13 DQA_14 DQA_15 DQA_16 DQA_17 DQA_18 DQA_19 DQA_20 DQA_21 DQA_22 DQA_23 DQA_24 DQA_25 DQA_26 DQA_27 DQA_28 DQA_29 DQA_30 DQA_31 DQA_32 DQA_33 DQA_34 DQA_35 DQA_36 DQA_37 DQA_38 DQA_39 DQA_40 DQA_41 DQA_42 DQA_43 DQA_44 DQA_45 DQA_46 DQA_47 DQA_48 DQA_49 DQA_50 DQA_51 DQA_52 DQA_53 DQA_54 DQA_55 DQA_56 DQA_57 DQA_58 DQA_59 DQA_60 DQA_61 DQA_62 DQA_63

Part 3 of 7 Part 4 of 7 MAA_0 MAA_1 MAA_2 MAA_3 MAA_4 MAA_5 MAA_6 MAA_7 MAA_8 MAA_9 MAA_10 MAA_11 MAA_A12 MAA_BA2 MAA_BA0 MAA_BA1 DQMA_0# DQMA_1# DQMA_2# DQMA_3# DQMA_4# DQMA_5# DQMA_6# DQMA_7# QSA_0 QSA_1 QSA_2 QSA_3 QSA_4 QSA_5 QSA_6 QSA_7 C27 B28 B27 G26 F27 E27 D27 J27 E29 C30 E26 A27 G27 D26 C28 B29 M29 K33 G30 E33 C22 H21 C17 G17 M30 K34 G31 E34 B22 F21 B17 D17 MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 A_A12 A_BA0 A_BA1 DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7 RDQSA0 RDQSA1 RDQSA2 RDQSA3 RDQSA4 RDQSA5 RDQSA6 RDQSA7 H15 G14 E14 D14 H12 G12 F12 D10 B13 C12 B12 B11 C9 B9 A9 B8 J10 H10 F10 D9 G7 G6 F6 D6 C8 C7 B7 A7 B5 A5 C4 B4 M3 M2 N2 N1 R3 R2 T3 T2 M8 M7 P5 P4 R9 R8 R6 U4 U3 U2 U1 V2 Y3 Y2 AA2 AA1 U9 U7 U6 V4 W9 W7 W6 W4 B14 A13 DQB_0 DQB_1 DQB_2 DQB_3 DQB_4 DQB_5 DQB_6 DQB_7 DQB_8 DQB_9 DQB_10 DQB_11 DQB_12 DQB_13 DQB_14 DQB_15 DQB_16 DQB_17 DQB_18 DQB_19 DQB_20 DQB_21 DQB_22 DQB_23 DQB_24 DQB_25 DQB_26 DQB_27 DQB_28 DQB_29 DQB_30 DQB_31 DQB_32 DQB_33 DQB_34 DQB_35 DQB_36 DQB_37 DQB_38 DQB_39 DQB_40 DQB_41 DQB_42 DQB_43 DQB_44 DQB_45 DQB_46 DQB_47 DQB_48 DQB_49 DQB_50 DQB_51 DQB_52 DQB_53 DQB_54 DQB_55 DQB_56 DQB_57 DQB_58 DQB_59 DQB_60 DQB_61 DQB_62 DQB_63 MAB_0 MAB_1 MAB_2 MAB_3 MAB_4 MAB_5 MAB_6 MAB_7 MAB_8 MAB_9 MAB_10 MAB_11 MAB_A12 MAB_BA2 MAB_BA0 MAB_BA1 DQMB_0# DQMB_1# DQMB_2# DQMB_3# DQMB_4# DQMB_5# DQMB_6# DQMB_7# QSB_0 QSB_1 QSB_2 QSB_3 QSB_4 QSB_5 QSB_6 QSB_7 H2 H3 J3 J5 J4 J6 G5 J9 F3 F4 J1 J2 J7 F1 G2 G3 D12 C10 E7 C6 P3 R4 W3 V8 J14 B10 F9 B6 P2 P8 W2 V6

45 46 45 46 45 46 45 46

45 45 46 46

CLKA0 CLKA0# CLKA1 CLKA1#

CLKA0 CLKA0# CLKA1 CLKA1# WDQSA[7..0] RDQSA[7..0] DQMA#[7..0]

45,46 WDQSA[7..0] 45,46 RDQSA[7..0]

45,46 DQMA#[7..0]
C

write strobe read strobe

45,46 45,46 45,46 45,46

MAA[11..0] A_BA0 A_BA1 A_A12

MAA[11..0]

write strobe read strobe

45,46 MDA[63..0]

PLACE MVREF DIVIDERS AND CAPS CLOSE TO ASIC


1D8V_S0

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MDA[63..0] A_BA0 A_BA1 A_A12 QSA_0B QSA_1B QSA_2B QSA_3B QSA_4B QSA_5B QSA_6B QSA_7B ODTA0 ODTA1 CLKA0 CLKA1 CLKA0# CLKA1# RASA0# RASA1# CASA0# CASA1# CSA0_0# CSA0_1# CSA1_0# CSA1_1# CKEA0 CKEA1 WEA0# WEA1# M31 K35 G32 E35 A22 E21 A17 E17 WDQSA0 WDQSA1 WDQSA2 WDQSA3 WDQSA4 WDQSA5 WDQSA6 WDQSA7 C31 C25 A33 A26 B33 B26 A31 D24 C32 H26 A30 B30 G24 H24 B31 F24 C29 D22 ODTA0 ODTA1 CLKA0 CLKA1 CLKA0# CLKA1# RASA0# RASA1# CASA0# CASA1# CSA0_0# CSA1_0# CKEA0 CKEA1 WEA0# WEA1# 1D8V_S0
NOTE: FOR DUAL RANK CONNECTIONS USE THE CSxxB_1 CHIP SELECT PINS

MEMORY INTERFACE A

MEMORY INTERFACE B

QSB_0B QSB_1B QSB_2B QSB_3B QSB_4B QSB_5B QSB_6B QSB_7B ODTB0 ODTB1 CLKB0 CLKB1 CLKB0# CLKB1# RASB0# RASB1# CASB0# CASB1#

H14 A10 E9 A6 P1 P7 W1 V5

D2 K5 A3 K1 B3 K2

VGA

1 R476 100R2J-2-GP ** 2

D3 K7 C1 K4 E1 E2 L3 M4 E3 K8 F2 M6 AA4 VGA_DRAM_RST

VGA
1D8V_S0 R475 100R2J-2-GP

VGA
1 C572 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

VGA
B

**

VGA
R142 100R2J-2-GP

PLACE MVREF DIVIDERS AND CAPS CLOSE TO ASIC


**
MVREFDB MVREFSB 1 R194 2 1KR2J-1-GP

R474 100R2J-2-GP 2

CSB0_0# CSB0_1# CSB1_0# CSB1_1# CKEB0 CKEB1 WEB0# WEB1# DRAM_RST

**

VGA
R473 100R2J-2-GP

VGA
1 C571 SCD1U16V2ZY-2GP

MVREFDA MVREFSA

MVREFDA MVREFSA NC#AM34

VGA
R141 100R2J-2-GP

VGA
1

**

C151 SCD1U16V2ZY-2GP

MVREFDB MVREFSB TESTEN TEST_MCLK TEST_YCLK MEMTEST PLLTEST 216-0707005-00-GP

VGA

216-0707005-00-GP

1D8V_S0

**

VGA

VGA_TESTEN AM30 VGA_TEST_MCLK AA8 VGA_TEST_YCLK AA7 VGA_MEMTEST AA5 AH19

71.0M82M.00U

VGA

R130 1D8V_S0 1 2

** DIVIDER RESISTORS MVREF TO 1.8V MVREF TO GND

DDR2 100R 100R

DDR3 40.2R 100R

R144 100R2J-2-GP 2

VGA
R136 4K7R2J-2-GP

VGA
R137 4K7R2J-2-GP

VGA

71.0M82M.00U
R133 240R2F-1-GP

**

4K7R2J-2-GP

VGA

VGA

VGA
R143 100R2J-2-GP

VGA
1 C152 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

**
2

ZZZZ

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3

M8XM_MEMORY
Document Number Rev

D45/D46
Sheet
1

PD
44 of 47

Date: Friday, March 14, 2008


5 4 3 2

44 44

CLKA0 CLKA0# 1 R243 56R2J-4-GP 1

CLKA0 CLKA0# R242 56R2J-4-GP

VGA
2 2
D

VGA
1 C348 SC470P50V2KX-3GP U46 A_BA0 A_BA1 A_A12 MAA11 MAA10 MAA9 MAA8 MAA7 MAA6 MAA5 MAA4 MAA3 MAA2 MAA1 MAA0 CLKA0# CLKA0 CKEA0 L2 L3 R2 P7 M2 P3 P8 P2 N7 N3 N8 N2 M7 M3 M8 K8 J8 BA0 BA1 A12 A11 A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 CK CK DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDD1 VDD2 VDD3 VDD4 VDD5 B9 B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8 A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 MDA31 MDA25 MDA29 MDA26 MDA27 MDA28 MDA24 MDA30 MDA14 MDA8 MDA12 MDA9 MDA13 MDA10 MDA11 MDA15

44 44 44 44 44 44

RASA0# CASA0# WEA0# CKEA0 CSA0_0# ODTA0

RASA0# CASA0# WEA0# CKEA0 CSA0_0# ODTA0 WDQSA[7..0] RDQSA[7..0] DQMA#[7..0] MDA[63..0] MAA[11..0]

A_BA0 A_BA1 A_A12 MAA11 MAA10 MAA9 MAA8 MAA7 MAA6 MAA5 MAA4 MAA3 MAA2 MAA1 MAA0 CLKA0# CLKA0 CKEA0

L2 L3 R2 P7 M2 P3 P8 P2 N7 N3 N8 N2 M7 M3 M8 K8 J8

BA0 BA1 A12 A11 A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 CK CK

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDD1 VDD2 VDD3 VDD4 VDD5

B9 B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8 A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

MDA6 MDA1 MDA4 MDA2 MDA7 MDA0 MDA3 MDA5 MDA22 MDA16 MDA23 MDA18 MDA19 MDA20 MDA17 MDA21

U48

VGA

44,46 WDQSA[7..0] 44,46 RDQSA[7..0] 44,46 DQMA#[7..0] 44,46 MDA[63..0]

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44,46 MAA[11..0] 44,46 44,46 44,46 K2 CKE K2 CKE A_BA1 A_BA0 A_A12 A_BA1 A_BA0 A_A12 1D8V_S0 1D8V_S0 CSA0_0# WEA0# L8 CS CSA0_0# WEA0# L8 CS K3 K7 L7 WE K3 K7 L7 WE RASA0# CASA0# RAS CAS DQMA#2 DQMA#0 ODTA0 RDQSA2 WDQSA2 F3 B3 K9 F7 E8 LDM UDM ODT 2 LDQS LDQS A1 E1 J9 M9 R1 RASA0# CASA0# RAS CAS VDDL VSSDL 1 1 1 C646 SCD1U16V2ZY-2GP C645 ODTA0 RDQSA1 WDQSA1 K9 F7 E8

VGA
2 1D8V_S0 1

ODT 2 LDQS LDQS

C608 SCD1U16V2ZY-2GP

1 2

J1 J7

L32 VGA 1 2 BLM15BB121SN-GP VRAM_VDDL1 SC1U10V2KX-1GP

DQMA#1 DQMA#3

F3 B3

LDM UDM

A1 E1 J9 M9 R1

VDDL VSSDL

J1 J7

L29 VGA 1 2 BLM15BB121SN-GP VRAM_VDDL2 SC1U10V2KX-1GP

C611

VGA

1D8V_S0 1

R492 4K99R2F-L-GP

RDQSA0 WDQSA0 2
(SSTL-1.8) VREF = .5*VDDQ VRAM_VREF1

B7 A8 J2 A2 E2 L1 R3 R7 R8

VGA
1

UDQS UDQS VREF NC#A2 NC#E2 NC#L1 NC#R3 NC#R7 NC#R8

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9 VSSQ10 VSS1 VSS2 VSS3 VSS4 VSS5

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8 A3 E3 J3 N1 P9

VGA

R241 4K99R2F-L-GP

RDQSA3 WDQSA3 2
(SSTL-1.8) VREF = .5*VDDQ VRAM_VREF2

B7 A8 J2 A2 E2 L1 R3 R7 R8

VGA

UDQS UDQS VREF NC#A2 NC#E2 NC#L1 NC#R3 NC#R7 NC#R8

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9 VSSQ10 VSS1 VSS2 VSS3 VSS4 VSS5

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8 A3 E3 J3 N1 P9

VGA

R491 4K99R2F-L-GP

C647 SCD1U16V2ZY-2GP

R239 4K99R2F-L-GP

C346 SCD1U16V2ZY-2GP

VGA
2

VGA

VGA
2

VGA

HYB18T512161B2F-25-GP

HYB18T512161B2F-25-GP

VGA

PD

VGA

2nd source72.55162.00U
1D8V_S0 1D8V_S0 1 1 1 SC1U10V2KX-1GP C244 SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP C155

PD

PD
1 1 1 1 1 1 1 1 1 1 1 1 1 C225 C276 SCD01U50V2ZY-1GP C153 SCD1U16V2ZY-2GP C154 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP C171 SCD1U16V2ZY-2GP C242 SCD1U16V2ZY-2GP 1 2 C371 SCD1U16V2ZY-2GP SC1U10V2KX-1GP SC1U10V2KX-1GP SC10U6D3V5MX-3GP C530 SC10U6D3V5MX-3GP C347 C525 C619 SCD01U50V2ZY-1GP SCD01U50V2ZY-1GP C286 SCD1U16V2ZY-2GP C315 SCD1U16V2ZY-2GP C245 SCD1U16V2ZY-2GP C314 SCD1U16V2ZY-2GP

VGA
2

VGA
2

VGA
2 2

VGA
2

VGA
2

VGA
2 2

SC10U6D3V5MX-3GP

VGA

VGA

VGA

VGA

VGA

VGA

VGA

VGA

VGA

VGA

VGA

ZZZZ

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3

VRAM DDR2 A
Document Number Rev

D45/D46
Sheet
1

PD
45 of 47

Date: Monday, March 24, 2008


5 4 3 2

44 44

CLKA1 CLKA1# 1 R174 56R2J-4-GP 1

CLKA1 CLKA1# R175 56R2J-4-GP

VGA
2
D

VGA
2 1 C223 SC470P50V2KX-3GP U40 A_BA0 A_BA1 A_A12 MAA11 MAA10 MAA9 MAA8 MAA7 MAA6 MAA5 MAA4 MAA3 MAA2 MAA1 MAA0 CLKA1# CLKA1 CKEA1 L2 L3 R2 P7 M2 P3 P8 P2 N7 N3 N8 N2 M7 M3 M8 K8 J8 BA0 BA1 A12 A11 A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 CK CK DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDD1 VDD2 VDD3 VDD4 VDD5 B9 B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8 A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 MDA60 MDA56 MDA61 MDA58 MDA59 MDA62 MDA57 MDA63 MDA52 MDA50 MDA54 MDA49 MDA48 MDA55 MDA51 MDA53

44 44 44 44 44 44

RASA1# CASA1# WEA1# CKEA1 CSA1_0# ODTA1

RASA1#
D

CASA1# WEA1# CKEA1 CSA1_0# ODTA1 WDQSA[7..0] RDQSA[7..0] DQMA#[7..0] MDA[63..0] MAA[11..0]

A_BA0 A_BA1 A_A12 MAA11 MAA10 MAA9 MAA8 MAA7 MAA6 MAA5 MAA4 MAA3 MAA2 MAA1 MAA0 CLKA1# CLKA1 CKEA1

L2 L3 R2 P7 M2 P3 P8 P2 N7 N3 N8 N2 M7 M3 M8 K8 J8

BA0 BA1 A12 A11 A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 CK CK

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDD1 VDD2 VDD3 VDD4 VDD5

B9 B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8 A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

MDA36 MDA32 MDA38 MDA35 MDA34 MDA37 MDA33 MDA39 MDA45 MDA40 MDA46 MDA44 MDA42 MDA43 MDA41 MDA47

U44

VGA

44,45 WDQSA[7..0] 44,45 RDQSA[7..0] 44,45 DQMA#[7..0] 44,45 MDA[63..0]

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44,45 MAA[11..0] 44,45 44,45 44,45 K2 CKE K2 CKE A_BA1 A_BA0 A_A12 A_BA1 A_BA0 A_A12 1D8V_S0 1D8V_S0 CSA1_0# WEA1# L8 CS CSA1_0# WEA1# L8 CS K3 K7 L7 WE K3 K7 L7 WE RASA1# CASA1# RAS CAS DQMA#5 DQMA#4 F3 B3 K9 F7 E8 LDM UDM ODT 2 LDQS LDQS A1 E1 J9 M9 R1 RASA1# CASA1# RAS CAS ODTA1 RDQSA5 WDQSA5 VDDL VSSDL 1 1 1 C308 SCD1U16V2ZY-2GP C307 ODTA1 RDQSA6 WDQSA6 K9 F7 E8

VGA
2 1D8V_S0 1

ODT 2 LDQS LDQS

C174 SCD1U16V2ZY-2GP

1 2

J1 J7

L7 VGA 1 2 BLM15BB121SN-GP VRAM_VDDL3 SC1U10V2KX-1GP

DQMA#6 DQMA#7

F3 B3

LDM UDM

A1 E1 J9 M9 R1

VDDL VSSDL

J1 J7

L3 VGA 1 2 BLM15BB121SN-GP VRAM_VDDL4 SC1U10V2KX-1GP

C173

VGA

1D8V_S0 1

R216 4K99R2F-L-GP

RDQSA4 WDQSA4 2
(SSTL-1.8) VREF = .5*VDDQ VRAM_VREF3

B7 A8 J2 A2 E2 L1 R3 R7 R8

VGA
1

UDQS UDQS VREF NC#A2 NC#E2 NC#L1 NC#R3 NC#R7 NC#R8

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9 VSSQ10 VSS1 VSS2 VSS3 VSS4 VSS5

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8 A3 E3 J3 N1 P9

VGA

R162 4K99R2F-L-GP

RDQSA7 WDQSA7 2
(SSTL-1.8) VREF = .5*VDDQ VRAM_VREF4

B7 A8 J2 A2 E2 L1 R3 R7 R8

VGA

UDQS UDQS VREF NC#A2 NC#E2 NC#L1 NC#R3 NC#R7 NC#R8

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9 VSSQ10 VSS1 VSS2 VSS3 VSS4 VSS5

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8 A3 E3 J3 N1 P9

VGA

R217 4K99R2F-L-GP

C283 SCD1U16V2ZY-2GP

R163 4K99R2F-L-GP

C172 SCD1U16V2ZY-2GP

VGA
2

VGA

VGA
2

VGA

HYB18T512161B2F-25-GP

HYB18T512161B2F-25-GP

VGA

VGA

PD

2nd source72.55162.00U
1D8V_S0

PD

1D8V_S0 1 1 1 1 1 1 1 1 2

C636 SC10U6D3V5MX-3GP

C641 SC1U10V2KX-1GP

C262

C345 SCD01U50V2ZY-1GP

C521 SCD1U16V2ZY-2GP

C547 SCD1U16V2ZY-2GP

C629 SCD1U16V2ZY-2GP

C648 SCD1U16V2ZY-2GP

SC10U6D3V5MX-3GP

C564 SC10U6D3V5MX-3GP

C591 SC1U10V2KX-1GP

C164

C632 SCD01U50V2ZY-1GP

C644 SCD1U16V2ZY-2GP

C626 SCD1U16V2ZY-2GP

C318 SCD1U16V2ZY-2GP

C332 SCD1U16V2ZY-2GP

VGA
2

VGA
2

VGA
2 2

VGA
2

VGA
2

VGA
2 2

SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP

VGA

VGA

VGA

VGA

VGA

VGA

VGA

VGA

VGA

VGA

ZZZZ

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3

VRAM DDR2 B
Document Number Rev

D45/D46
Sheet
1

PD
46 of 47

Date: Monday, March 24, 2008


5 4 3 2

Note:1 VIP3 MUST NOT BE PULLED HIGH ON M82-M Note:2 GPIO8 MUST NOT BE PULLED HIGH ON M86-M or M7X

3.3V_DELAY

CONFIGURATION STRAPS
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET
STRAPS BIF_MSI_DIS BIF_AUDIO_EN BIF_64BAR_EN_A TX_PWRS_ENB TX_DEEMPH_EN BIF_DEBUG_ACCESS BIF_AUDIO_EN PIN VIP1 VIP3 VIP5 GPIO0 GPIO1 GPIO4 GPIO8 GPIO5 DESCRIPTION OF DEFAULT SETTINGS MESSAGE SIGNAL INTERRUPT ENABLED ENABLE HD AUDIO

42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42
C

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO8 GPIO9 GPIO11 GPIO12 GPIO13 GPIO22 VIP_0 VIP_1 VIP_2 VIP_3 VIP_4 VIP_5 VIP_6 VIP_7 VHAD0 DVALID PSYNC

R419 R420 R421 R122 R422 R423 R121 R425 R123 R428 R426 R427

1 1 1 1 1 1 1 1 1 1 1 1

VGA VGA DY DY DY VGA DY DY DY DY DY VGA DY DY DY DY DY DY DY DY DY DY DY DY

2 2 2 2 2 2 2 2 2 2 2 2

10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP

RECOMMENDED SETTINGS 0= DO NOT INSTALL RESISTOR 1 = INSTALL 10K RESISTOR X = DESIGN DEPENDANT NA = NOT APPLICABLE RSVD = ATI RESERVED (DO NOT INSTALL) M8x M7x

NA X NA X X 0 X X

0 X 0 X X 0 RSVD 0

(M7XM and M86M ONLY) Note:1

64 BIT BARS DISABLED PCIE FULL TX OUTPUT SWING PCIE TRANSMITTER DE-EMPHASIS ENABLED DEBUG SIGNALS MUXED OUT ENABLE HD AUDIO

NOTE 1: HD AUDIO MUST ONLY BE ENABLED ON SYSTEMS THAT ARE LEGALLY ENTITLED. IT IS THE RESPONSIBILITY OF THE SYSTEM DESIGNER TO ENSURE ENTITLEMENT NOTE 2: HDMI MUST ONLY BE ENABLED ON SYSTEMS THAT ARE LEGALLY ENTITLED. IT IS THE RESPONSIBILITY OF THE SYSTEM DESIGNER TO ENSURE ENTITLEMENT

R124 1 R135 R134 R145 R139 R439 R436 R131 R129

2 10KR2J-3-GP 2 2 2 2 2 2 2 2
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP

42 42 42 42

DVPDATA20 DVPDATA21 DVPDATA22 DVPDATA23

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( M82M ONLY) Note:2
BIF_GEN2_EN_A BIOS_ROM_EN Allows either PCIe 2.5GT/s or 5.0GT/s operation GPIO_22_ROMCSB GPIO[13:11,9] VSYNC DISABLE EXTERNAL BIOS ROM NA X R435 1 R120? 1 R434 1

1 1 1 1 1 1 1 1

2 10KR2J-3-GP 2 10KR2J-3-GP 2 10KR2J-3-GP

SB

ROMIDCFG(3:0)

SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT IGNORE VIP DEVICE STRAPS VGA ENABLED

XX X X O 0

X X X X O O

VIP_DEVICE_STRAP_ENA BIF_VGA DIS

PSYNC

BIF_HDMI_EN

HSYNC GPIO6

HDMI ENABLE (SEE NOTE 2) Internal use only

X 0

X 0

1D8V_S0

DEBUG_ I2C_ENABLE

R431 R430 R432 R433

1 1 1 1

VGA VGA VGA VGA

2 2 2 2

10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP

MEM_TYPE

Only populate the required straps, see table and databook

10KR2J-3-GP 1

10KR2J-3-GP 1

10KR2J-3-GP 1

10KR2J-3-GP 1

ANY UNUSED GPIO OR DVP THAT ARE NOT CONFIG STRAPS FOR EXAMPLE DVPDATA20:23 IN THIS DESIGN

MEMORY TYPE,MAKE AND SIZE INFO

X X X X

X X X X

VRAM SETTING

ATI RESERVED CONFIGURATION STRAPS


ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET
VHAD0 VIP0 VIP2 VIP4 VIP6 VIP7 GPIO2 GPIO3 H2SYNC

For Hynix R431,R430,R432,R433 (63.10334.1DL) Delete R587,R627,R649,R653 For Qimonda R431,R430,R432,R587 (63.10334.1DL) Delete R433,R627,R649,R653 For Samsung R431,R430,R627,R433 (63.10334.1DL) Delete R587,R432,R649,R653
B

VGA
R587

VGA VGA
R627 R649

VGA
R653

PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

DVPDATA20 DVPDATA21 DVPDATA22 DVPDATA23 DVPDATA20 DVPDATA21 DVPDATA22 DVPDATA23 DVPDATA20 DVPDATA21 DVPDATA22 DVPDATA23
A

1 1 1 1 1 1 1 0 1 1 0 1 1 1 0 0

HY5PS121621CFP-25 Hynix 72.51216.F0U

GPIO_28_TDO

GENERICC

GPIO21_BB_EN

D45 BOM U43 71.CNTIG.H0U U57 71.ICH9M.E0U R186,187,188,198,201,202-> 63.R0034.1DL

BOM DM2 62.10017.G31 U49 84.04634.037 U15 84.08896.037 H29 34.4B417.001 H30 34.4B417.001 H27 34.4F403.001 H31 34.4F403.001 H7 34.4F403.001 H9 34.4F403.001 H10 34.4G501.001 U11 71.00773.00G U64 71.00380.003

NET DM2 62.10017.G31 U35 62.10053.401

HYB18T512161B2F-25 72.18512.M0U

Qimonda

D45 VRAM SELECT


K4N51163QE-ZC25 SamSung 72.45116.A0U
D46 BOM U43 71.CNTIG.G0U U57 71.ICH9M.E0U

U35 62.10053.401 U7 71.08111.E03


A

DVPDATA20 DVPDATA21 DVPDATA22 DVPDATA23

H5PS5162FFR-25C HYNIX 72.55162.00U

ZZZZ

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Custom

STRAPS
Document Number Rev

D45/D46
Sheet
1

PD
47 of 47

Date: Monday, March 17, 2008


5 4 3 2