Resequencing Analysis Of Stop-And-Wait Arq For Parallel Multichannel Communications

A Project Report in partial fulfillment of the degree

Master of Technology
In

Computer Science & Engineering

By V. A. PREM KUMAR (09K41D5805)

Under the Esteemed Guidance of

B. RAJ KUMAR RATHOD

Assoc. Professor (Dept. of CSE)

Submitted to

DEPARTMENT OF COMPUTER SCIENCE & ENGINEERING

S.R.ENGINEERING COLLEGE, ANANTHASAGAR, WARANGAL (Affiliated to JNTUH, Accredited by NBA, Autonomous) (2009-2011)

Acknowledgements
I wish to take this opportunity to express our sincere gratitude and deep sense of respect to our beloved principal, Dr. P. VENKATESWARLU, SR Engineering college, Warangal for making us available all the required assistance and for his support and inspiration to carry on this project thesis in this institute. I express heartfelt thanks to the HOD of CSE Department, Dr. C.V. GURU RAO and our supervisor (Guide) Mr. B. RAJ KUMAR RATHOD for providing with us with necessary infrastructure and thereby giving us freedom to do the project thesis. I would like to thank all faculty members and staff of the Department of Computer Science and Engineering, S.R Engineering college,Warangal. I wish to express my gratitude and thanks to all people who helped in making this endeavor a reality.

V.A. PREM KUMAR.