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5

SYSTEM DC/DC

HBU16-1.2 Intel UMA Block Diagram


Project code : 91.4FQ01.001
PCB P/N : 09233
Revision : 1
SYSTEM DC/DC

Intel CPU
Clock Generator
ICS9LPRS355

Penryn SV

16

DDRII
667/800

Slot 1

+3VL
37

OUTPUTS

+1.8V

+1.5VS

SYSTEM DC/DC
TPS51116
INPUTS

OUTPUTS

DCBATOUT
+1.8V
38

DDR I/F

LCD
WXGA+

LVDS(Dual Channel)

INTEGRATED GRAHPICS

DDR II 667/800 Channel B

INPUTS

14
CRT
1600X1200@75

Cantiga-GM/GL

SYSTEM DC/DC
RT8209
INPUTS

OUTPUTS

+5VALW

+1.05V

15
39

LVDS, CRT I/F

13

+3VALW

40

RGB CRT

AGTL+ CPU I/F

+5VALW

+0.9VS

FSB
800/1066MHz
DDRII 667/800 Channel A

OUTPUTS

DCBATOUT

APL5912

3,4,5

DDRII
Slot 0
667/800
12

TPS51125
INPUTS

PCIE

6,7,8,9,10,11

HDMI

MAXIM CHARGER

26

MAX8731
C

DMIx4

C-LINK
WEBCAM

INPUTS

OUTPUTS
BT+

DCBATOUT

18V 3.0A

15

SD/MMC
MS/MS Pro/xD

Realtek
RTS5159

25

RJ45
CONN
27

INTEL

USB 2.0

BLUETOOTH
USB 2.0

ISL6269CCRZ

USB x 3
22

PCIE
23

INPUTS

12 USB 2.0/1.1 ports

RJ11
CONN

SATA

High Definition Audio

HDD

DCBATOUT

22

ODD

ACPI 1.1

22

LPC I/F

PCB LAYER

LPC Bus

28

PCI/PCI BRIDGE

LINE OUT

HD AUDIO
CODEC
CX20583-11Z

0.844~1.3V
22A
35,36

6 PCIE ports
HD AUDIO

OUTPUTS
+VCC_CORE

ETHERNET (10/100/1000Mb)
4 SATA ports

AMOM
MODEM
CX20548-11Z

33

CPU DC/DC

22

ICH9-M

25

Realtek
RTL8103T
10/100

5V 100mA

L1:

Signal 1

L2:

GND

L3:

Signal 2

L4:

Signal 3

L5:

VCC

L6:

Signal 4

17,18,19,20,21

KBC

28

INTERNAL MIC

SPI

PCIE+USB 2.0

MIC IN

Mini-Card
802.11a/b/g/n
26

WINBOND

SPI

WPCE773L

Flash ROM
64KB
19

Flash ROM
2MB
31

Touch
PAD
30

29

Thermal
& Fan

Int.
KB

GMT G7921
24

30

<Core Design>

2CH SPEAKER

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Block Diagram
Size
A3
Date:
5

Document Number

Rev

HBU16 1.2
Monday, July 06, 2009

Sheet
1

of

41

ICH9M Functional Strap Definitions

ICH9 EDS 642879


Comment

Rev.1.5

page 92

Signal

Usage/When Sampled

HDA_SDOUT

XOR Chain Entrance/


Allows entrance to XOR Chain testing when TP3
PCIE Port Config1 bit1, pulled low. When TP3 not pulled low at rising edge
Rising Edge of PWROK.
of PWROK, sets bit1 of RPC.PC (Cofig Registers:
offset 224h). This signal has weak internal
pull-down.

HDA_SYNC

GNT2#/
GPIO53

PCIE config1 bit0,


Rising Edge of PWROK.

This signal has a weak internal pull-down.


Sets bit0 of PRC.PC (Config Registers: Offset
224h).

PCIE config2 bit2,


Rising Edge of PWROK.

This signal has a weak internal pull-up.


Sets bit2 of PRC.PC2 (Config Registers: Offset
224h).

ICH9 EDS 642879

Cantiga chipset and ICH9M I/O controller


Hub strapping configuration

Rev.1.5
Pin Name

Strap Description

Configuration

CL_CLK[1:0]

PULL-UP 20K

CFG[2:0]

CL_DATA[1:0]

PULL-UP 20K

FSB Frequency Select 000 = FSB1067


011 = FSB667
010 = FSB800
others = Reserved

CL_RST0#

PULL-UP 20K

DPRSLPVR/GPIO16

PULL-DOWN 20K

ENERGY_DETECT

PULL-UP 20K

CFG[4:3]
Reserved
CFG8
CFG[15:14]
CFG[18:17]

HDA_BIT_CLK

PULL-DOWN 20K

CFG5

DMI x2 Select

0 = DMI x2
1 = DMI x4 (Default)

HDA_DOCK_EN#/GPIO33

PULL-UP 20K

CFG6

iTPM Host Interface

HDA_RST#

PULL-DOWN 20K

0 = The iTPM Host Interface is enabled (Note 2)


1 = The iTPM Host Interface is disabled (default)

HDA_SDIN[3:0]

PULL-DOWN 20K

CFG7

HDA_SDOUT

PULL-DOWN 20K

Intel Management
engine crypto strap

0 = Transport Layer Security (TLS) cipher


suite with no confidentiality
1 = TLS cipher suite with confidentiality(Default)
0 = Reserved Lanes, 15->0, 14->1 ect..
1 = Normal operation (Default): Lane Numbered in
Order

Reserved.

GNT1#/
GPIO51

ESI Strap (Server Only) ESI compatible mode is for server platforms only.
Rising Edge of PWROK.
This signal should not be pulled low for desktop
and mobile.

HDA_SYNC

PULL-DOWN 20K

CFG9

PCIE Graphics Lane

GNT3#/
GPIO55

Top-Block Swap
override. Rising Edge
of PWROK.

Sampled low: Top-Block Swap mode (inverts A16 for


all cycles targeting FWH BIOS space).
Note: Software will not be able to clear the
Top-Swap bit until the system is rebooted
without GNT3# being pulled down.

GLAN_DOCK#

The pull-up or pull-down


active when configured
for native GLAN_DOCK#
functionality and determined
by LAN controller.

CFG10

PCIE Loopback enable 0 = Enable (Note 3)


1 = Disable (Default)

GNT0#:
SPI_CS1#/
GPIO58

Boot BIOS Destination


Selection 0:1.
Rising Edge of PWROK.

Controllable via Boot BIOS Destination bit


(Config Registers: Offset 3410h:bit 11:10).
GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC

GNT[3:0]#/GPIO[55,53,51]

PULL-UP 20K

GPIO20

PULL-DOWN 20K

SPI_MOSI

Integrated TPM Enable, Sample low: the Integrated TPM will be disable.
Rising Edge of CLPWROK. Sample high: the MCH TPM enable strap is sampled
low and the TPM Disable bit is clear, the
Integrated TPM will be enable.

GPIO49

PULL-UP 20K

LDA[3:0]#/FHW[3:0]#

PULL-UP 20K

LAN_RXD[2:0]

PULL-UP 20K

LDRQ[0]

PULL-UP 20K

LDRQ[1]/GPIO23

PULL-UP 20K

PME#

PULL-UP 20K

PWRBTN#

PULL-UP 20K

SATALED#

PULL-UP 15K

SPI_CS1#/GPIO58/CLGPIO6

PULL-UP 20K

SPI_MOSI

PULL-DOWN 20K

SPI_MISO

PULL-UP 20K

SPKR

PULL-DOWN 20K

TACH_[3:0]

PULL-UP 20K

TP[3]

PULL-UP 20K

USB[11:0][P,N]

PULL-DOWN 15K

SATALED#

SPKR

TP3
GPIO33/
HDA_DOCK
_EN#

DMI Termination
Voltage. Rising Edge
of CLPWROK.

The signal is required to be low for desktop


applications and required to be high for mobile
applications.

PCI Express Lane


Reversal. Rising Edge
of PWROK.

Signal has weak internal pull-up. Sets bit 27


of MPC.LR (Device 28: Function 0:Offset D8).

No Reboot.
Rising Edge of PWROK.

If sampled high, the system is strapped to the


"No Reboot" mode (ICH9 will disable the TCO Timer
system reboot feature). The status is readable
via the NO REBOOT bit.

XOR Chain Entrance.


Rising Edge of PWROK.
Flash Descriptor
Security Override
Strap. Rising Edge of
PWROK.

This signal should not be pull low unless using


XOR Chain testing.
Sampled low: the Flash Descriptor Security will be
overridden. If high, the security measures will be
in effect. This should only be enabled in
manufacturing environments using an external
pull-up resister.

page 218

Montevina Platform Design guide 22339 0.5

Resistor Type/Value

SIGNAL

GPIO20

GPIO49

This signal should not be pulled high.

ICH9 Integrated pull-up


and pull-down Resistors

CFG[13:12] XOR/ALL

00
10
01
11

=
=
=
=

CFG16

FSB Dynamic ODT

0 = Dynamic ODT Disabled


1 = Dynamic ODT Enabled (Default)

CFG19

DMI Lane Reversal

0 = Normal operation (Default): Lane Numbered in


Order
1 = Reverse Lanes
DMI x4 mode [MCH->ICH]: (3->0, 2->1, 1->2 and 0->3)
DMI x2 mode [MCH->ICH]: (3->0, 2->1)

CFG20

Digital Display Port 0 = Only Digital Display Port or PCIE is


operational (Default)
(SDVO/DP/iHDMI)
display Port and PCIe are operating
Concurrent with PCIe 1 = Digital
simulataneously via the PEG port

SDVO
SDVO Present
0 =
1 =
_CTRLDATA
L_DDC_DATA Local Flat Panel (LFP)0 =
1 =
Present

Reserve
XOR mode Enabled
ALLZ mode Enable (Note 3)
Disabled (Default)

No SDVO Card Present (Default)


SDVO Card Present
LFP Disabled (Default)
LFP Card Present; PCIE disabled

NOTE:
1. All strap signals are sampled with respect to the leading edge of the (G)MCH
Power OK (PWROK) signal.
2. iTPM can be disabled by a 'Soft-Strap' option in the Flash-decriptor section of
the Firmware. This 'Soft-Strap' is activated only after enabling iTPM via CFG6.
Only one of the CFG10/CFG12/CFG13 straps can be enabled at any time.

SMBus
PCIE Routing page 19

USB Table

page 19

Thermal

USB
LANE1

LAN

LANE2

MiniCard WLAN

Pair
0
1
2
3
4
5
6
7
8
9
10
11

Device
USB3
FREE
External USB3
FREE
External USB2
FREE
WLAN
BLUETOOTH
CARD_READER
FREE
CAMERA
FREE

KBC
BATTERY

MINI

<Core Design>

ICH9M

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Table of Content

Clock
Generator

Size
A3

Document Number

Date:

Tuesday, June 30, 2009

Rev

HBU16 1.2
Sheet

of

41

18
18
18
18

D5
C6
B4
A3

H_STPCLK#
18
H_INTR
18
H_NMI
18
H_SMI#

TP13

1
1
1
1
1
1
1
1
1
1
1

RSVD_CPU_1
RSVD_CPU_2
RSVD_CPU_3
RSVD_CPU_4
RSVD_CPU_5
RSVD_CPU_6
RSVD_CPU_7
RSVD_CPU_8
RSVD_CPU_9
RSVD_CPU_10
RSVD_CPU_11

M4
N5
T2
V3
B2
C3
D2
D22
D3
F6
B1

H_DEFER# 6
H_DRDY# 6
H_DBSY# 6

+1.05VS

F1

H_BREQ#0 6
56R2J-4-GP
D20 CPU_IERR# 1
2 R32 +1.05VS
B3
H_INIT#
18

DY

R69
51R2F-2-GP

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#

HIT#
HITM#

A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#
ADSTB1#

BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#

H4

H_LOCK#

C1
F3
F4
G3
G2

G6
E4

H_CPURST#
H_RS#[2..0]

H_RS#0
H_RS#1
H_RS#2
H_TRDY#

H_HIT#
H_HITM#

6
6

XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_DBRESET#_R

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20

H_CPURST#

H_THERMDA, H_THERMDC routing together,


Trace width / Spacing = 10 / 10 mil

CPU_PROCHOT#_R

THERMAL
1
PROCHOT#
THRMDA
THRMDC

A20M#
FERR#
IGNNE#

THERMTRIP#

STPCLK#
LINT0
LINT1
SMI#

HCLK

RSVD#M4
RSVD#N5
RSVD#T2
RSVD#V3
RSVD#B2
RSVD#C3
RSVD#D2
RSVD#D22
RSVD#D3
RSVD#F6

BCLK0
BCLK1

R31

D21
A24
B25

68R2-GP

35

+1.05VS
H_THERMDA 24
H_THERMDC 24

C7

PM_THRMTRIP-A# 7,18

A22
A21

CLK_CPU_BCLK 16
CLK_CPU_BCLK# 16
PM_THRMTRIP#
should connect to
ICH9 and MCH
without T-ing
( No stub)

ITP Connector

+1.05VS

C472
SCD47U16V2ZY-GP
1

TPAD14-GP

TP4
TP6
TP8
TP7
TP9
TP10
TP15
TP1
TP14
TP5

H5
F21
E1

6
6
6

TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TEST7 TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP

H_ADS#
H_BNR#
H_BPRI#

H_A20M#
H_FERR#
H_IGNNE#

A6
A5
C4

IERR#
INIT#

RESET#
RS0#
RS1#
RS2#
TRDY#

ICH

H_ADSTB#1

Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1

BR0#

LOCK#

ADDR GROUP 1

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

DEFER#
DRDY#
DBSY#

H1
E2
G5

K3
H2
K2
J3
L1

ADS#
BNR#
BPRI#

CONTROL

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
ADSTB0#

XDP/ITP SIGNALS

J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1

RESERVED

H_ADSTB#0
H_REQ#[4..0]

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

ADDR GROUP 0

Reserve for ITP, when


install ITP connector,
install R69.

U54A 1 OF 4

6
6

H_A#[35..3]

H_A#[35..3]

0R2J-2-GP
2

DY

R293

DY
ITP1

29
1

+1.05VS
ITP_VDD

BGA479-SKT6-GPU7

1st: 62.10079.001
2nd: 62.10053.401
H_CPURST#
+3VS

1
R292

DY

2 H_RESET#_R
1KR2J-1-GP

16 CLK_CPU_XDP#

R287
XDP_DBRESET#_R

30
2

KEY_NC

XDP_TMS

+1.05VS

R277

3
5
7
9
11
13
15
17
19
21
23
25
27

XDP_DBRESET#_R 1
XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_TCK

4
6
8
10
12
14
16
18
20
22
24
26
28
32

2
31

XDP_TDO_R
1
XDP_TCK
XDP_TRST#
XDP_TDI

DY
1
1
1

DY

2 0R2J-2-GP

2 R281

XDP_DBRESET#

2 R284
2 R283
2 R282

DY
DY
DY

XDP_DBRESET# 19

0R2J-2-GP
0R2J-2-GP
0R2J-2-GP

0R2J-2-GP XDP_TDO

MCH_CLKSEL2
MCH_CLKSEL1
MCH_CLKSEL0

7,16
7,16
7,16

CLK_CPU_XDP

16

1KR2J-1-GP
MLX-CONN28A-4-GP

+1.05VS

DY
XDP_TDI

R66

54D9R2F-L1-GP

XDP_TMS

R63

54D9R2F-L1-GP

XDP_TDO

R65

54D9R2F-L1-GP

XDP_BPM#5

R64

54D9R2F-L1-GP

<Core Design>

Wistron Corporation
XDP_TRST#

R71

54D9R2F-L1-GP

XDP_TCK

R72

54D9R2F-L1-GP

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

CPU (1 of 2)
Size

Document Number

Rev

HBU16 1.2
Date:

Thursday, July 09, 2009

Sheet

1
3

of

41

2
H_DINV#[3..0]
H_DSTBN#[3..0]
H_DSTBP#[3..0]
H_D#[63..0]

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

H_D#[63..0]

C
Layout notes
Z= 55 Ohm 0.5" MAX for GTLREF

+1.05VS
6
6
6

1KR2F-3-GP
R19

H_DSTBN#1
H_DSTBP#1
H_DINV#1

R18
2KR2F-3-GP

AD26
C23
D25
C24
AF26
CPU_TEST5
AF1
A26

C46
SC1KP50V2KX-1GP

DY

16
16
16

D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
DSTBN1#
DSTBP1#
DINV1#

TEST1
TEST2
CPU_TEST3

1 1

CPU_GTLREF0

N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24

B22
B23
C21

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6

DATA GRP1

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
DSTBN0#
DSTBP0#
DINV0#

DATA GRP3

6 H_DSTBN#0
6 H_DSTBP#0
6 H_DINV#0

E22
F24
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25

DATA GRP0

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

DATA GRP2

U54B 2 OF 4

MISC

D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
DSTBN2#
DSTBP2#
DINV2#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47

D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN3#
DSTBP3#
DINV3#

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

COMP0
COMP1
COMP2
COMP3
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#

BSEL0
BSEL1
BSEL2

R26
U26
AA1
Y1
E5
B5
D24
D6
D7
AE6

H_DSTBN#2 6
H_DSTBP#2 6
H_DINV#2 6

H_DSTBN#3 6
H_DSTBP#3 6
H_DINV#3 6
COMP0
COMP1
COMP2
COMP3

R23 1
R24 1
R67 1
R68 1

2
2
2
2

27D4R2F-L1-GP
54D9R2F-L1-GP
27D4R2F-L1-GP
54D9R2F-L1-GP

H_DPRSTP# 7,18,35
H_DPSLP# 18
H_DPW R# 6
H_PW RGD 18
H_CPUSLP# 6
PSI#
35
Connect to V Core

R25
1KR2J-1-GP

BGA479-SKT6-GPU7
R70
1KR2J-1-GP

DY

1
R228

DY

TEST1
1KR2J-1-GP

TEST2
1KR2J-1-GP

Layout Note:
Comp0, 2 connect with Zo=27.4 ohm, make
trace length shorter than 0.5" .
Comp1, 3 connect with Zo=55 ohm, make
trace length shorter than 0.5" .

1
R26

DY DY

Route the TEST3 and TEST5 signals through


a ground referenced Zo = 55-ohm trace
that ends in a via that is near a GND via
and is accessible through an oscilloscope connection.

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CPU (3 of 2 )
Size

Document Number

Rev

HBU16 1.2
Date:

Thursday, July 09, 2009

Sheet

1
4

of

41

+VCC_CORE

1
2

1
2

SC22U6D3V5MX-2GP

C77

1
2

1
2

1
2

1
2

C104
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

DY
2

C93

DY
2

C83

1
2

1
2

1
2

DY

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

DY

C434

1
2

C422

C430

1
2

C126

C133
SC22U6D3V5MX-2GP

C114

SC22U6D3V5MX-2GP

+1.05VS

C436

SC22U6D3V5MX-2GP

Please these outside socket


cavity on L8(South side Secondary)

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

Please these inside socket


cavity on L8(South side Primary)

+VCC_CORE

1
2

1
2

1
2

R56
100R2F-L1-GP-U

1
2

1
2

1
2

Layout Note:
Place as close as possible to the CPU VCCA pin.

VCC_SENSE

AE7

VSS_SENSE 35

C381

AF7

35

Connect to V Core

Layout Note:
VCCSENSE and VSSSENSE lines
should be of equal length.

R57
100R2F-L1-GP-U

Layout Note:
Provide a test point (with
no stub) to connect a
differential probe
between VCCSENSE and
VSSSENSE at the location
where the two 54.9ohm
resistors terminate the
55 ohm transmission line.

BGA479-SKT6-GPU7

2
+VCC_CORE

C383

C82
SC22U6D3V5MX-2GP

35

C92
SC22U6D3V5MX-2GP

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6

H_VID[6..0]

2
0R0603-PAD

C103
SC22U6D3V5MX-2GP

C113

DY

SC22U6D3V5MX-2GP

B26
C26

C125
SC22U6D3V5MX-2GP

+1.5VS
+1.5V_VCCA_S0

C132
SC22U6D3V5MX-2GP

layout note: "1D5V_VCCA_S0"


as short as possible

TC14
ST220U2D5VBM-LGP

DY

R225

AD6
AF5
AE5
AF4
AE3
AF3
AE2

C97
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

C425

Please these inside socket


cavity on L8(North side Primary)

SC10U6D3V5MX-3GP

VSSSENSE

DY

SC22U6D3V5MX-2GP

VCCSENSE

C416
SC22U6D3V5MX-2GP

+VCC_CORE

SCD01U16V2KX-3GP

VID0
VID1
VID2
VID3
VID4
VID5
VID6

C441

SC22U6D3V5MX-2GP

VCCA
VCCA

C128

A4
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3

+VCC_CORE
C414

SC22U6D3V5MX-2GP

VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP

C147

DY

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

DY DY

U54D

+VCC_CORE
C404

+VCC_CORE

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

SC22U6D3V5MX-2GP

C409

Please these inside socket cavity on L8(South side Secondary)


VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

SC22U6D3V5MX-2GP

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

DY

C417
SC22U6D3V5MX-2GP

U54C 3 OF 4

A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18

DY

C426
SC22U6D3V5MX-2GP

+VCC_CORE

C435
SC22U6D3V5MX-2GP

+VCC_CORE

C442
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

DY

C403

C408

Please these inside socket


cavity on L8(North side Secondary)

Please these outside socket


cavity on L8(North side Secondary)

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

CPU_GND1 1
TP11

TPAD14-GP
B

NCTF PIN
CPU_GND2 1
CPU_GND3 1

TP44
TP12

TPAD14-GP
TPAD14-GP

TP43

TPAD14-GP

CPU_GND41

BGA479-SKT6-GPU7

+1.05VS

C70

SCD47U16V2ZY-GP

C68 1

SCD47U16V2ZY-GP

C146 1

SCD47U16V2ZY-GP

C69 1

SCD47U16V2ZY-GP

C144 1

SCD47U16V2ZY-GP

C145 1
SCD47U16V2ZY-GP

Please these inside socket


cavity on L8(North side Secondary)

4 OF 4

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CPU (3 of 3 )
Size

Document Number

Rev

HBU16 1.2
Date:
5

Thursday, July 09, 2009

Sheet
1

1
5

of

41

U53A
H_D#[63..0]

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

+1.05VS

H_SWING routing Trace width and


Spacing use 10 / 20 mil

R234
221R2F-2-GP

H_SWING Resistors and


Capacitors close MCH
500 mil ( MAX )

R235
100R2F-L1-GP-U

H_SW ING

H_RCOMP routing Trace width and


Spacing use 10 / 20 mil
1
R233

2 H_RCOMP
24D9R2F-L-GP

Place them near to the chip ( < 0.5")

H_SW ING
H_RCOMP

C5
E3

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

H_SWING
H_RCOMP

+1.05VS

F2
G8
F8
E6
G2
H6
H2
F6
D4
H3
M9
M11
J1
J2
N12
J6
P2
L2
R2
N9
L6
M5
J3
N2
R1
N5
N6
P13
N8
L7
N10
M3
Y3
AD14
Y6
Y10
Y12
Y14
Y7
W2
AA8
Y9
AA13
AA9
AA11
AD11
AD10
AD13
AE12
AE9
AA2
AD8
AA3
AD3
AD7
AE14
AF3
AC1
AE3
AC3
AE11
AE8
AG2
AD6

3
4

R236
1KR2F-3-GP

H_CPURST#
H_CPUSLP#

A11
B11

DY

C400

H_CPURST#
H_CPUSLP#
H_AVREF
H_DVREF

A14
C15
F16
H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9

H_ADS#
3
H_ADSTB#0 3
H_ADSTB#1 3
H_BNR#
3
H_BPRI# 3
H_BREQ#0 3
H_DEFER# 3
H_DBSY# 3
CLK_MCH_BCLK 16
CLK_MCH_BCLK# 16
H_DPW R# 4
H_DRDY# 3
H_HIT#
3
H_HITM# 3
H_LOCK# 3
H_TRDY# 3

H_DINV#[3..0]

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

J8
L3
Y13
Y1

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

L10
M7
AA5
AE6

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

L9
M8
AA6
AE5

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

B15
K13
F13
B13
B14

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#_0
H_RS#_1
H_RS#_2

B6
F12
C8

H_RS#0
H_RS#1
H_RS#2

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

H_A#[35..3]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

H_REQ#[4..0]

H_RS#[2..0]

CANTIGA-GM-GP-U-NF

SCD1U16V2ZY-2GP

H_AVREF H_AVREF

R237
2KR2F-3-GP

C12
E11

H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#

H_A#[35..3]

1 OF 10

H_D#[63..0]

HOST

C391
SCD1U10V2KX-4GP

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Cantiga (1 of 6)

Size

Document Number

Date:

Thursday, July 09, 2009

HBU16 1.2
Sheet
1

Rev

1
6

of

41

DY

2 2K21R2F-GP

CFG12

DY

2 2K21R2F-GP

CFG13

R38

DY

2 2K21R2F-GP

CFG16

R34

DY

2 2K21R2F-GP

CFG10

BG48
BF48
BD48
BC48
BH47
BG47
BE47
BH46
BF46
BG45
BH44
BH43
BH6
BH5
BG4
BH3
BF3
BH2
BG2
BE2
BG1
BF1
BD1
BC1
F1
A47

3,18 PM_THRMTRIP-A#
19,35 PM_DPRSLPVR
Connect to V Core

DMI Lane Reversal


MCH_CFG_19
Low = Normal (default)
High = Lanes Reversed
Cantiga = 2.2K

DMI

NC#BG48
NC#BF48
NC#BD48
NC#BC48
NC#BH47
NC#BG47
NC#BE47
NC#BH46
NC#BF46
NC#BG45
NC#BH44
NC#BH43
NC#BH6
NC#BH5
NC#BG4
NC#BH3
NC#BF3
NC#BH2
NC#BG2
NC#BE2
NC#BG1
NC#BF1
NC#BD1
NC#BC1
NC#F1
NC#A47

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

AE41
AE37
AE47
AH39

R61
1KR2F-3-GP

DY

AE40
AE38
AE48
AH40

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

AE35
AE43
AE46
AH42

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

AD35
AE44
AF46
AH43

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

GFX_VR_EN

B42
G38
F37
K37

TPAD14-GP
TPAD14-GP
TPAD14-GP

TP67
TP68
TP69

1
1
1

F25
H25
K25

RN46
SRN2K2J-1-GP
TV_DCONSEL0
TV_DCONSEL1

DMI_TXP0 19
DMI_TXP1 19
DMI_TXP2 19
DMI_TXP3 19
DMI_RXN0 19
DMI_RXN1 19
DMI_RXN2 19
DMI_RXN3 19
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

TV_DACA
TV_DACB
TV_DACC

H24

19
19
19
19

C31
E32

M_BLUE

E28

M_GREEN

G28

M_RED

19
19
19
19

J28
G29

14 DDC1_CLK
14 DDC1_DATA
14 M_HSYNC
14

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4

15 TXOUTB_L0+
15 TXOUTB_L1+
15 TXOUTB_L2+

LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3
LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3
LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3

+3VS

CLK_MCH_3GPLL 16
CLK_MCH_3GPLL# 16

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

15 TXOUTB_L015 TXOUTB_L115 TXOUTB_L2-

A41
H38
G37
J37

LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3

1
R54
1
R53

M_VSYNC
R252

B33
B32
G33
F33
E33

DDC1_CLK
DDC1_DATA
GMCH_HS
2
33R2J-2-GP
GMCH_VS
2
33R2J-2-GP

H32
J32
J29
E29
L29

TVA_DAC
TVB_DAC
TVC_DAC
TV_RTN

TV_DCONSEL_0
TV_DCONSEL_1

CRT_BLUE
CRT_GREEN
CRT_RED
CRT_IRTN
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC

CRT_IREF

GRAPHICS

1
499R2F-2-GP
2

Use DDR3 need enable


DREFCLK
DREFCLK 16
DREFCLK#
DREFCLK# 16
DREFSSCLK
DREFSSCLK 16
DREFSSCLK#
DREFSSCLK# 16

F43
E43

H48
D45
F40
B40

L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK

PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

PCI-EXPRESS

R2401

DY

B38
A38
E41
F41

SM_REXT

15 TXOUTA_L0+
15 TXOUTA_L1+
15 TXOUTA_L2+

PEG_CMP 1

PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15
PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15

H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39

H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40

PEG_RXP3

PEG_RXP3 26

HDMI
HDMI

J41
M46
M47
M40
M42
R48
N38
T40
U37
U40
Y40
AA46
AA37
AA40
AD43
AC46

HDMI_L_DATA2HDMI_L_DATA1HDMI_L_DATA0HDMI_L_CLK-

J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46

HDMI_L_DATA2+
HDMI_L_DATA1+
HDMI_L_DATA0+
HDMI_L_CLK+

2 C560
2 C561
2 C562
2 C563

1
1
1
1

HDMI
HDMI

SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP

HDMI_DATA2- 26
HDMI_DATA1- 26
HDMI_DATA0- 26
HDMI_CLK- 26

Place Close GMCH

HDMI
HDMI
1
1
1
1

2
2
2
2

HDMI
HDMI

C
C564
C565
C566
C567

SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP

HDMI_DATA2+ 26
HDMI_DATA1+ 26
HDMI_DATA0+ 26
HDMI_CLK+ 26

Place Close GMCH

LIBG

1K02R2F-1-GP

1
R257
2K37R2F-GP

CANTIGA-GM-GP-U-NF

FOR Cantiga: 1.02k_1% ohm

CRT_IREF routing Trace


width use 20 mil

C34
+1.05VS

CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF

AH37
AH36
AN36
AJ35
AH34

+3VS

MCH_CLVREF

R52
1KR2F-3-GP

CL_CLK0 19
CL_DATA0 19
M_PWROK
19
CL_RST#0
19

RN25
LCTLB_DATA
PM_EXTTS#0
LCTLA_CLK
PM_EXTTS#1

CL_VREF ~= 0.35V

C139
DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
CLKREQ#
ICH_SYNC#
TSATN#

N28
M28
G36
E36
K36
H36
B12

GMCH_HDMI_CLK 26
GMCH_HDMI_DATA 26
MCH_CLK_REQ# 16
MCH_ICH_SYNC# 19
TSATN#

R55
499R2F-2-GP

1
2
3
4

8
7
6
5

B28
B30
B29 HDA_SDIN2_NB
1
C29
A28

2 R590
33R2J-2-GP

1KR2F-3-GP
1

SM_RCOMP_VOH

R248
3K01R2F-3-GP

DDPC/SDVO for HDMI used


HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC

SRN10KJ-6-GP

+1.8V
R251
2

C437

SCD01U16V2KX-3GP

R39

DY

SM_RCOMP_VOH
SM_RCOMP_VOL

R62
1KR2F-3-GP

R37

C73
SC100P50V2JN-3GP

M_RCOMPP
M_RCOMPN

C127

Place Close GMCH

Place Close Connector

SC2D2U6D3V3MX-1-GP
R49
M_BLUE
SM_RCOMP_VOL

HDA_BITCLK_CODEC 18,28
HDA_RST#_CODEC 18,28
HDA_SDIN2 18
HDA_SDOUT_CODEC 18,28
HDA_SYNC_CODEC 18,28

C431

CFG9

PEG_CLK
PEG_CLK#

AV42
AR36
BF17
BC36

H47
E46
G40
A40

SCD01U16V2KX-3GP

1
150R2F-1-GP

C121

R14
2

M_BLUE

M_GREEN
1
150R2F-1-GP

1
150R2F-1-GP

R50
M_GREEN
1
150R2F-1-GP

R244
2

CFG8

2 4K02R2F-GP

BF28
BH28

15 TXOUTA_L015 TXOUTA_L115 TXOUTA_L2-

DDR_VREF_S3

CFG7

2 2K21R2F-GP

DY

BG22
BH21

+1.8V

M29
C44
B43
E37
E38
C41
C40
B37
A37

2 2K21R2F-GP

DY

12
12
13
13

DY

R35

M_ODT0
M_ODT1
M_ODT2
M_ODT3

TXCLKA_LTXCLKA_L+
TXCLKB_LTXCLKB_L+

R36

NC

R43

BD17
AY17
BF15
AY13

15
15
15
15

LIBG
1 LVDS_VBG

CFG5

12
12
13
13

TP48

T37
T36

49D9R2F-GP
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA

2 2K21R2F-GP

1 0R0402-PAD
2
2
1
100R2J-2-GP
R30

M_CS0#
M_CS1#
M_CS2#
M_CS3#

L_VDD_EN

DY

R59

BA17
AY16
AV16
AR13

15
TPAD14-GP

PEG_COMPI
PEG_COMPO

R245 1

19,32 PM_PWROK
17,23,26,27,29 PLT_RST#

ME

CFG6

MISC

2 2K21R2F-GP

HDA

DY

PM_SYNC#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR

PM_EXTTS#0
PM_EXTTS#1
PWROK_R
RSTIN#

PM

19
PM_SYNC#
4,18,35 H_DPRSTP#
12 PM_EXTTS#0
13 PM_EXTTS#1

CFG20

R29
B7
N33
P32
AT40
AT11
T20
R32

12
12
13
13

M33
K33
J33

+VCC_PEG

R58
L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK

SC2D2U6D3V3MX-1-GP

1KR2F-3-GP
M_RED

1
150R2F-1-GP

2
R15

R48

CFG18
CFG19
CFG20

M_CKE0
M_CKE1
M_CKE2
M_CKE3

LCTLB_DATA

L32
G32
M32

CFG16

CFG19

2
R17

M_RED

1
150R2F-1-GP

CANTIGA-GM-GP-U-NF

PCI Express Graphics Lane


MCH_CFG_9
Low = Normal (default)
High = Lanes Reversed

CRT Termination/EMI
Filter

Cantiga = 2.2K

Place Close Connector

+3VS

Please Close GMCH


1

DY

M_GREEN
1
NBQ160808T-470Y-N-GP

R542
10KR2J-3-GP

+3VS

R548
2

M_RED_M

M_GREEN_M

M_BLUE_M

TSATN#_KBC

2
0R0603-PAD

RED

2
0R0603-PAD

GREEN

14

2
0R0603-PAD

BLUE

14

14

R549

L12
M_BLUE
1
NBQ160808T-470Y-N-GP

R552
56R2J-4-GP

L18
M_RED
1
NBQ160808T-470Y-N-GP
L14

+1.05VS

R550

TSATN#_KBC 29

C34

C42
SC22P50V2JN-4GP

0R0402-PAD

Please Close to U22

C28

SC22P50V2JN-4GP

Q38
MMBT3904WT1G-GP

TSATN#_B

TSATN#

DY
SC22P50V2JN-4GP

SRN2K2J-1-GP

R239

DDC2_CLK
DDC2_DATA

4
3

RN24
1
2

R45

SM_VREF
SM_PWROK
SM_REXT
SM_DRAMRST#

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

GRAPHICS VID

CFG11

2 4K02R2F-GP

BC28
AY28
AY36
BB36

LCTLA_CLK

15 DDC2_CLK
15 DDC2_DATA

1
2

CLK

1
2
2 2K21R2F-GP

DY

M_CLK_DDR#0 12
M_CLK_DDR#1 12
M_CLK_DDR#2 13
M_CLK_DDR#3 13

L_BKLTCTL
L_BKLT_EN

VGA

DY

AR24
AR21
AU24
AV20

15
29

TV

CFG18

R271 1

2 4K02R2F-GP

SM_RCOMP_VOH
SM_RCOMP_VOL

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20

CFG

CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13

R266 1

DY

T25
R25
P25
P20
P24
C25
N24
M24
E21
C23
C24
N21
P21
T21
R20
M20
L21
H21
P29
R28
T28

3,16 MCH_CLKSEL0
3,16 MCH_CLKSEL1
3,16 MCH_CLKSEL2

+3VS

R272 1

SM_RCOMP
SM_RCOMP#

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

FSB setting

R242
80D6R2F-L-GP

2 2K21R2F-GP

SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1

12
12
13
13

4
3

1
2

M_RCOMPP
M_RCOMPN

DY

SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1

DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#

R243
80D6R2F-L-GP

R274 1

SA_CKE_0
SA_CKE_1
SB_CKE_0
SB_CKE_1

M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3

RESERVED#BG23
RESERVED#BF23
RESERVED#BH18
RESERVED#BF18

+1.8V

RESERVED#AY21

SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1

AP24
AT21
AV24
AU20

BG23
BF23
BH18
BF18

RESERVED#B31
RESERVED#B2
RESERVED#M1

SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1

1
Place the 49D9 Ohm resistor
within 500 mils (1.27 mm)
of the (G)MCH.

3 OF 10

LVDS

AY21

RESERVED#M36
RESERVED#N36
RESERVED#R33
RESERVED#T33
RESERVED#AH9
RESERVED#AH10
RESERVED#AH12
RESERVED#AH13
RESERVED#K12
RESERVED#AL34
RESERVED#AK34
RESERVED#AN35
RESERVED#AM35
RESERVED#T24

RSVD

B31
B2
M1

2
U53C

2 OF 10

DDR CLK/ CONTROL/COMPENSATION

M36
N36
R33
T33
AH9
AH10
AH12
AH13
K12
AL34
AK34
AN35
AM35
T24

3
U53B

SCD1U10V2KX-4GP
2
1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Cantiga (2 of 6)
Size

Document Number

Date:

Thursday, July 09, 2009

Rev

HBU16 1.2

Sheet

of

41

M_A_BS#0 12
M_A_BS#1 12
M_A_BS#2 12

SA_RAS#
SA_CAS#
SA_WE#

BB20
BD20
AY20

M_A_RAS# 12
M_A_CAS# 12
M_A_W E# 12

SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_DM[7..0]

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14

BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25

M_A_DQS[7..0]

M_A_DQS#[7..0]

M_A_A[14..0]
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

M_A_DM[7..0]

M_A_DQS[7..0]

12

12

M_A_DQS#[7..0]

M_A_A[14..0]

12

12

CANTIGA-GM-GP-U-NF

M_B_DQ[63..0]
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

U53E

AK47
AH46
AP47
AP46
AJ46
AJ48
AM48
AP48
AU47
AU46
BA48
AY48
AT47
AR47
BA47
BC47
BC46
BC44
BG43
BF43
BE45
BC41
BF40
BF41
BG38
BF38
BH35
BG35
BH40
BG39
BG34
BH34
BH14
BG12
BH11
BG8
BH12
BF11
BF8
BG7
BC5
BC6
AY3
AY1
BF6
BF5
BA1
BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1
AL1
AL2
AJ1
AH1
AM2
AM3
AH3
AJ3

5 OF 10

SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63

SB_BS_0
SB_BS_1
SB_BS_2

BC16
BB17
BB33

M_B_BS#0 13
M_B_BS#1 13
M_B_BS#2 13

SB_RAS#
SB_CAS#
SB_WE#

AU17
BG16
BF14

SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

AM47
AY47
BD40
BF35
BG11
BA3
AP1
AK2

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_RAS# 13
M_B_CAS# 13
M_B_W E# 13

M_B_DM[7..0]

13 M_B_DQ[63..0]

BD21
BG18
AT25

MEMORY

4 OF 10

SA_BS_0
SA_BS_1
SA_BS_2

MEMORY

SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63

SYSTEM

U53D

AJ38
AJ41
AN38
AM38
AJ36
AJ40
AM44
AM42
AN43
AN44
AU40
AT38
AN41
AN39
AU44
AU42
AV39
AY44
BA40
BD43
AV41
AY43
BB41
BC40
AY37
BD38
AV37
AT36
AY38
BB38
AV36
AW36
BD13
AU11
BC11
BA12
AU13
AV13
BD12
BC12
BB9
BA9
AU10
AV9
BA11
BD9
AY8
BA6
AV5
AV7
AT9
AN8
AU5
AU6
AT5
AN10
AM11
AM5
AJ9
AJ8
AN12
AM13
AJ11
AJ12

SYSTEM

M_A_DQ[63..0]
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

DDR

12 M_A_DQ[63..0]

DDR

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14

AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33

M_B_DM[7..0]

M_B_DQS[7..0]

M_B_DQS[7..0]

M_B_DQS#[7..0]

13

13

M_B_DQS#[7..0]

13

C
M_B_A[14..0]

M_B_A[14..0]

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14

13

CANTIGA-GM-GP-U-NF

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

Cantiga (3 of 6)

Document Number

Rev

HBU16 1.2
Date:

Thursday, July 09, 2009

Sheet

1
8

of

41

AE33
AC33
AA33
Y33
W33
V33
U33
AH28
AF28
AC28
AA28
AJ26
AG26
AE26
AC26
AH25
AG25
AF25
AG24
AJ23
AH23
AF23

1
2

C124
SCD01U16V2KX-3GP

SC10U10V5ZY-1GP

C123

R51 2VCC_GMCH_35
1
0R0402-PAD

T32

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

D
VCC CORE

Coupling CAP 370 mils from the Edge

Coupling CAP

6 OF 10

VCC

POWER

C138

1
2

1
2
1
2

1
2

1
2

1
2

1
2

1
2

POWER

DY

C136
1

AG34
AC34
AB34
AA34
Y34
V34
U34
AM33
AK33
AJ33
AG33
AF33

SCD01U16V2KX-3GP

SCD47U16V2ZY-GP

C140
1

SCD47U16V2ZY-GP

C78
1

C135

SCD47U16V2ZY-GP

BC1
SC1U10V3KX-3GP

SC22U6D3V5MX-2GP

C90

C149

SCD01U16V2KX-3GP

C80
1

C134
1

SC22U6D3V5MX-2GP

TC18

C141

SCD47U16V2ZY-GP

C89

SCD47U16V2ZY-GP

VCC SM

U53F

SCD01U16V2KX-3GP

C109

+1.05VS

VCC NCTF

Place CAP where


LVDS and DDR2 taps

FOR VCC SM

1
2

C151

Place on the Edge

C150

C154
1
2

C107

C52

C71

C76

AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23

C155
SC1U10V3KX-3GP

VCC SM LF

VCC GFX

C130

SC10U10V5ZY-1GP

DY

VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF

CANTIGA-GM-GP-U-NF

SC1U10V3KX-3GP

CANTIGA-GM-GP-U-NF

TC7

AV44 SM_LF1_GMCH
BA37 SM_LF2_GMCH
AM40 SM_LF3_GMCH
AV21 SM_LF4_GMCH
AY5 SM_LF5_GMCH
AM10 SM_LF6_GMCH
BB13 SM_LF7_GMCH
SCD47U6D3V2KX-GP

VCC_AXG_SENSE
VSS_AXG_SENSE

VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF

DY

SC22U6D3V5MX-2GP

C142 1
SCD47U16V2ZY-GP
2

+1.8V

SCD22U10V2KX-1GP

AJ14
AH14

FOR VCC CORE

Coupling CAP

SCD22U10V2KX-1GP

1VCC_AXG_SENSE
1VSS_AXG_SENSE

C110

Place on the Edge

SCD1U10V2KX-4GP

TP3
TP2

SCD1U10V2KX-4GP

TPAD14-GP
TPAD14-GP

C122
1

ST220U2VBM-3GP

VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG

+1.05VS

ST220U2VBM-3GP

Y26
AE25
AB25
AA25
AE24
AC24
AA24
Y24
AE23
AC23
AB23
AA23
AJ21
AG21
AE21
AC21
AA21
Y21
AH20
AF20
AE20
AC20
AB20
AA20
T17
T16
AM15
AL15
AE15
AJ15
AH15
AG15
AF15
AB15
AA15
Y15
V15
U15
AN14
AM14
U14
T14

+1.05VS

SC10U10V5ZY-1GP

+1.05VS

W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16

SCD01U16V2KX-3GP

VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC

VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF

SCD01U16V2KX-3GP

BA36
BB24
BD16
BB21
AW16
AW13
AT13

VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM

+1.05VS

SCD47U16V2ZY-GP

AP33
AN33
BH32
BG32
BF32
BD32
BC32
BB32
BA32
AY32
AW32
AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29
AW29
AV29
AU29
AT29
AR29
AP29

7 OF 10

VCC GFX NCTF

+1.8V

4
U53G

A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Cantiga (4 of 6)

Size

Document Number

Date:

Tuesday, June 30, 2009

Rev

HBU16 1.2

Sheet

1
9

of

41

80mA

VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM

AXF
SM CK

BF21
BH20
BG20
BF20

HV

C35
B35
A35

PEG

VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG

VCCD_HPLL

V48
U48
V47
U47
U46

1
2

DY

0R0603-PAD
C469
SC22U6D3V5MX-2GP

AH48
AF48
AH47
AG47

456mA

1D05V_VCC_DMI

VTTLF
VTTLF
VTTLF

A8
L1
AB2

VTTLF1
VTTLF2
VTTLF3

VCCD_LVDS
VCCD_LVDS

1
2

C152

1
2

1
2

DY

C466

DY

C461

DY
2

VCC_DMI
VCC_DMI
VCC_DMI
VCC_DMI

+1.05VS
R269

C454

0R0603-PAD
C465
SC10U10V5ZY-1GP

+VCC_PEG
R308

1
0R0603-PAD

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

Reserved for TV ripple

Date:

1782mA

C393
SCD47U6D3V2KX-GP

1
2

C464 DY
SC1KP50V2KX-1GP

VCCD_PEG_PLL

CANTIGA-GM-GP-U-NF

DY

+3VS_HV

106mA

C460
SCD1U10V2KX-4GP

VCCD_QDAC

11D8V_SUS_DLVDS

0R0603-PAD

+1.8V
R264

100mA
2

K47

VCC_HV
VCC_HV
VCC_HV

2
1
2
C102
SC10U6D3V5MX-3GP

VCC_TX_LVDS

R440
0R0805-PAD

1
R40
1R2F-GP

1D8V_TXLVDS_S3

R60

200mA

C108
1

C388
SCD47U6D3V2KX-GP

+1.8V

G9091-330T12U-GP

1
2

1D8V_SM_CK

B22
B21
A21

C389
SCD47U6D3V2KX-GP

1D05V_RUN_PEGPLL AA47
C455
SCD01U16V2KX-3GP
M38
L37

VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK

VTTLF

AF1

VCCD_TVDAC

SCD1U10V2KX-4GP

C445

EN
GND
VIN
VOUT
NC#5

+3VS_DAC_LDO

SC10U10V5ZY-1GP

1
2
3
4
5

+VCC_PEG

VCC_HDA

U57

SC1U10V3ZY-6GP

L28

1D05V_RUN_HPLL

2
1
R163
0R0603-PAD
C390
SCD01U16V2KX-3GP

C447

M25

1D5VRUN_QDAC

VCC_AXF
VCC_AXF
VCC_AXF

DMI

1D5VRUN_TVDAC

+5VS

A32

C443
SCD1U10V2KX-4GP

+1.05VS

A CK

VCC_HDA

VCCA_TV_DAC
VCCA_TV_DAC

D TV/CRT

C473

SCD1U10V2KX-4GP

SC10U10V5ZY-1GP

C470

SCD01U16V2KX-3GP

C446
SCD1U16V2ZY-2GP

R307
0R0603-PAD
C406
SC10U6D3V5MX-3GP

DY

SC10U10V5ZY-1GP

180ohm 100MHz

C411

SC4D7U6D3V3KX-GP

1
2
PBY160808T-181Y-GP

VCC_HDA

0R0402-PAD
1D5VRUN_QDAC

B24
A24

LVDS

1
L27

1D05V_VCC_AXF

TV

R253

VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF

HDA

2
+1.5VS

2
1
R259
0R0402-PAD

+1.05VS

350mA

C418

SCD01U16V2KX-3GP

SCD1U10V2KX-4GP

180ohm 100MHz

C474

C471
SCD022U16V2KX-3GP

+3VS_HV

+1.8V

AP28
AN28
AP25
AN25
AN24
AM28
AM26
AM25
AL25
AM24
AL24
AM23
AL23

C423

0R0603-PAD

3D3VTVDAC

L22
2
1
PBY160808T-181Y-GP

1D5VRUN_TVDAC

1
1

1
2

+3VS_DAC_LDO
R291

+3VS

SCD47U16V2ZY-GP

DY

+1.5VS

C137
SCD01U16V2KX-3GP

C451
SCD01U16V2KX-3GP

C129

SCD1U10V2KX-4GP

C119
SC10U10V5ZY-1GP

SC2D2U6D3V3MX-1-GP

C476
SC10U6D3V5MX-3GP DY

TC15
ST220U2D5VBM-LGP

1D05V_SM_CK

2
1
R46
0R0603-PAD

1D05V_RUN_PEGPLL

1
2
FCM1608CF-221T02-GP

220ohm 100MHz

DY

POWER

+1.05VS
L26

EC37

R261
10R2J-2-GP
2
1

VCCA_PEG_PLL

AR20
AP20
AN20
AR17
AP17
AN17
AT16
AR16
AP16

C72

D27
BAT54-7-F-GP

AA48

C59

A PEG

C105

VCCA_PEG_BG

+1.05VS

A SM

1D05V_RUN_PEGPLL
1D05V_SM

C91

DY

AD48

C75

VSSA_LVDS

C51

VTT
A LVDS

J47

VCCA_LVDS

U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7
T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1

1
2

SCD1U10V2KX-4GP

CRT
PLL

VCCA_MPLL

2
1
2

+1.05VS

C101

DY

C386
SCD01U16V2KX-3GP

J48

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

SC1U10V3KX-3GP

1D8V_TXLVDS

SC1U10V3KX-3GP

AE1

VCCA_HPLL

C468
SCD1U10V2KX-4GP

SC4D7U6D3V3KX-GP

DY

C88

SC10U10V5ZY-1GP

M_VCCA_MPLL
C41

SC10U6D3V5MX-3GP

AD1

0R0402-PAD

R42

+1.05VS

0R0603-PAD

120ohm 100MHz

VCCA_DPLLB

M_VCCA_HPLL

VCCA_PEG_BG

SC22U6D3V5MX-2GP

FCM1608KF-1-GP
L16
1
2

VCCA_DPLLA

L48

2
0R0402-PAD

1
1

C387
SCD01U16V2KX-3GP

F47

M_VCCA_DPLLB

R270

+1.5VS

C382
SC4D7U6D3V3MX-2GP DY

DY

M_VCCA_HPLL

120ohm 100MHz

M_VCCA_DPLLA

M_VCCA_MPLL

C456
SC1KP50V2KX-1GP

FCM1608KF-1-GP
L17
2

VCCA_DAC_BG
VSSA_DAC_BG

R262

+1.8V

R223
0R0603-PAD

SCD01U16V2KX-3GP

1
2

SCD01U16V2KX-3GP

0R0603-PAD

180ohm 100MHz

1
2
1
2

1
2

DY

DY

A25
B25

M_VCCA_DAC_BG

M_VCCA_DAC_BG
C433

1
C432

SCD1U10V2KX-4GP

M_VCCA_DPLLB
C463
C458
SCD1U10V2KX-4GP

SCD01U16V2KX-3GP

+1.05VS

R249

VCCA_CRT_DAC
VCCA_CRT_DAC

SC1U10V3KX-3GP

C453

+3VS_DAC_LDO

B27
A26

SCD01U16V2KX-3GP

0R0603-PAD

0R0603-PAD

10mA

SC1U10V3KX-3GP

DY

8 OF 10

SCD01U16V2KX-3GP

R265

M_VCCA_DPLLA
C452
SCD1U10V2KX-4GP

SCD01U16V2KX-3GP

SCD47U16V2ZY-GP

C457

U53H

SC1U10V3KX-3GP

C462
1

0R0603-PAD

+1.05VS

852mA
3D3V_CRTDAC_S0
C438
C439

SCD1U10V2KX-4GP

R263

+3VS_DAC_LDO
R250
2
1

+1.05VS

Document Number

Cantiga (5 of 6)

Tuesday, June 30, 2009

HBU16Sheet1.2 10
1

Rev

1
of

41

U53J

9 OF 10

VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

BG21
L12
AW21
AU21
AP21
AN21
AH21
AF21
AB21
R21
M21
J21
G21
BC20
BA20
AW20
AT20
AJ20
AG20
Y20
N20
K20
F20
C20
A20
BG19
A18
BG17
BC17
AW17
AT17
R17
M17
H17
C17

AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23
AJ6

BA16
AU16
AN16
N16
K16
G16
E16
BG15
AC15
W15
A15
BG14
AA14
C14
BG13
BC13
BA13
AN13
AJ13
AE13
N13
L13
G13
E13
BF12
AV12
AT12
AM12
AA12
J12
A12
BD11
BB11
AY11
AN11
AH11
Y11
N11
G11
C11
BG10
AV10
AT10
AJ10
AE10
AA10
M10
BF9
BC9
AN9
AM9
AD9
G9
B9
BH8
BB8
AV8
AT8

CANTIGA-GM-GP-U-NF

R29

Modification AJ6 to reserved Pin

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

10 OF 10

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1

VSS
VSS
VSS
VSS

VSS NCTF

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS SCB

U53I

AU48
AR48
AL48
BB47
AW47
AN47
AJ47
AF47
AD47
AB47
Y47
T47
N47
L47
G47
BD46
BA46
AY46
AV46
AR46
AM46
V46
R46
P46
H46
F46
BF44
AH44
AD44
AA44
Y44
U44
T44
M44
F44
BC43
AV43
AU43
AM43
J43
C43
BG42
AY42
AT42
AN42
AJ42
AE42
N42
L42
BD41
AU41
AM41
AH41
AD41
AA41
Y41
U41
T41
M41
G41
B41
BG40
BB40
AV40
AN40
H40
E40
AT39
AM39
AJ39
AE39
N39
L39
B39
BH38
BC38
BA38
AU38
AH38
AD38
AA38
Y38
U38
T38
J38
F38
C38
BF37
BB37
AW37
AT37
AN37
AJ37
H37
C37
BG36
BD36
AK15
AU36

NC

VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
NC#E1
NC#D2
NC#C3
NC#B4
NC#A5
NC#A6
NC#A43
NC#A44
NC#B45
NC#C46
NC#D47
NC#B47
NC#A46
NC#F48
NC#E48
NC#C48
NC#B48

U24
U28
U25
U29
AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17
BH48
BH1
A48
C1
A3
E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48

GMCH_GND1
GMCH_GND2
GMCH_GND3
GMCH_GND4

1
1
1
1

TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP

NCTF PIN

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CANTIGA-GM-GP-U-NF
Size

Cantiga (6 of 6)

Document Number

Rev

HBU16 1.2

0R0402-PAD
Date:

TP49
TP46
TP50
TP47

Tuesday, June 30, 2009

Sheet

1
11

of

41

M_CLK_DDR0
M_CLK_DDR#0

Layout Note:
Place near DM1
8 M_A_BS#2
8 M_A_BS#0
8 M_A_BS#1

DY

TC2
ST220U2D5VBM-LGP

C58
SCD1U16V2ZY-2GP

C63
SCD1U16V2ZY-2GP

SCD47U16V2ZY-GP

SCD1U16V2ZY-2GP

C111
1

C106

DY
SC4D7U6D3V3KX-GP

SC2D2U10V3ZY-1GP

C87

DY
SC2D2U10V3ZY-1GP

C53

C94

DY
SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

C74

C118

+1.8V

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS

C392
SCD1U16V2ZY-2GP

C115
SCD1U16V2ZY-2GP

C427
SCD1U16V2ZY-2GP

C419
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C410

DY

C397

DY
2

C398
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C405

DY

C98

DY

C48
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C55

DY

C65
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C84

DY

+0.9VS

Layout Note:
Place these resistors
closely DM1,all
trace length Max=1.5"

+0.9VS

M_A_A12
M_A_BS#2

RN44 SRN56J-4-GP
1
4
2
3

RN45
4
3

M_A_BS#0
M_A_A10

RN41 SRN56J-4-GP
1
4
2
3

4
3

M_ODT0
M_CS0#

RN6
1
2

RN15 SRN56J-4-GP
M_A_A6
4
1
M_A_A5
3
2

M_A_A14
M_A_A11

RN18 SRN56J-4-GP
1
4
2
3

M_A_CAS#
M_A_WE#

RN40 SRN56J-4-GP
1
4
2
3

M_ODT1
M_CS1#

RN39 SRN56J-4-GP
1
4
2
3

4
3

M_CKE1
M_A_A7

RN21 SRN56J-4-GP
1
4
2
3

4
3

RN42 SRN56J-4-GP
M_A_A1
1
M_A_A3
2
DDR_VREF_S3

RN3

7
7

M_ODT0
M_ODT1

SRN56J-4-GP
M_A_BS#1
1
M_A_RAS#
2

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

11
29
49
68
129
146
167
186

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

13
31
51
70
131
148
169
188

M_ODT0
M_ODT1

114
119
1
2
202

C467

RN12 SRN56J-4-GP
M_A_A4
1
M_A_A0
2

M_CKE0 7
M_CKE1 7

30
32

M_CLK_DDR0
M_CLK_DDR#0

CK1
/CK1

164
166

M_CLK_DDR1
M_CLK_DDR#1

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

10
26
52
67
130
147
170
185

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

195
197

ICH_SMBDATA
ICH_SMBCLK

CK0
/CK0

SDA
SCL
VDDSPD

RN2
198
200

NC#50
NC#69
NC#83
NC#120
NC#163/TEST

50
69
83
120
163

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

81
82
87
88
95
96
103
104
111
112
117
118

VREF
VSS
GND

GND

ODT0
ODT1

M_CLK_DDR1 7
M_CLK_DDR#1 7

put near connector

C37
1

DUMMY-C2
C36
1

2
DUMMY-C2

ICH_SMBDATA 13,16,21,26
ICH_SMBCLK 13,16,21,26

1
2

SRN10KJ-11-GP-U
4
3

+3VS
C18
SCD1U16V2ZY-2GP

PM_EXTTS#0 7

C15
DY SC2D2U10V3ZY-1GP

+1.8V

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

M_CLK_DDR0 7
M_CLK_DDR#0 7

199

SA0
SA1

/DQS0
/DQS1
/DQS2
/DQS3
/DQS4
/DQS5
/DQS6
/DQS7

7
7

C156
DUMMY-C2

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

M_CS0#
M_CS1#

79
80

CKE0
CKE1

C153
DUMMY-C2

BA0
BA1

SC2D2U10V3ZY-1GP

DDR_VREF_S3
1

4
3

SRN56J-4-GP
M_A_A2
1
M_A_A13
2

C448
2

RN9

107
106

/CS0
/CS1

110
115

M_A_RAS# 8
M_A_WE# 8
M_A_CAS# 8

3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196

4
3

RN43 SRN56J-4-GP
M_A_A8
1
M_A_A9
2

M_A_BS#0
M_A_BS#1

201

DDR2-200P-36-GP-U1

SRN56J-4-GP
4
3

SRN56J-4-GP
1
M_CKE0
2

M_A_BS#2

108
109
113

8 M_A_A[14..0]
D

/RAS
/WE
/CAS

8 M_A_DQS[7..0]

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

8 M_A_DM[7..0]

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85

8 M_A_DQ[63..0]

DM2
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

8 M_A_DQS#[7..0]

SCD1U16V2ZY-2GP
A

<Core Design>

DM2

1st: 62.10017.E11
2nd: 62.10017.691
3nd: 62.10017.891

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

DDRII-SODIMM SLOT1
Size
Custom
Date:
5

Document Number

Thursday, July 09, 2009

Rev

HBU16 1.2
12

Sheet
1

of

41

M_CLK_DDR2

1
C157
DUMMY-C2

8 M_B_DQ[63..0]
8 M_B_DM[7..0]

C117
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C100

DY
2

C86
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C57

DY
2

C50
SCD1U16V2ZY-2GP

C67
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C116

C99
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C85

C66

DY
2

C56
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C49

C45

DY

+0.9VS

Layout Note:
Place these resistors
closely DM2,all
trace length Max=1.5"

+0.9VS
SRN56J-4-GP
1
4
2
3

RN22

SRN56J-4-GP
1
4
2
3

M_B_CAS#
M_B_WE#
M_B_A9
M_CKE2

RN5

1
2
RN20

4
3

SRN56J-4-GP
M_B_A14
1
M_B_A11
2

RN17

SRN56J-4-GP
M_B_A6
1
M_B_A7
2

RN14

SRN56J-4-GP
M_B_A2
1
M_B_A4
2

RN13

SRN56J-4-GP
M_B_A10
1
M_B_BS#0
2

RN8

SRN56J-4-GP
M_CS2#
1
M_ODT2
2

RN19

SRN56J-4-GP
M_B_BS#2
1
M_B_A12
2

RN16

SRN56J-4-GP
1
4
2
3

4
3

RN11

SRN56J-4-GP
1
4
2
3

4
3

SRN56J-4-GP
1
4
2
3

4
3

M_B_A8
M_B_A5
M_B_A0
M_B_BS#1
RN10
M_B_A3
M_B_A1
RN7
M_CS3#
M_ODT3

1
2
RN23

M_CKE3

SRN56J-4-GP
4
3

SRN56J-4-GP
1
4
2
3

M_B_RAS#
M_B_A13

4
3

4
3
4
3

DDR_VREF_S3

7 M_ODT2
7 M_ODT3
DDR_VREF_S3

11
29
49
68
129
146
167
186

/DQS0
/DQS1
/DQS2
/DQS3
/DQS4
/DQS5
/DQS6
/DQS7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

13
31
51
70
131
148
169
188

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

M_ODT2
M_ODT3

114
119

ODT0
ODT1

SC2D2U10V3ZY-1GP

SRN56J-4-GP

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

1
2
202

C163

C162

CK0
/CK0

30
32

CK1
/CK1

164
166

M_CLK_DDR3
M_CLK_DDR#3

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

10
26
52
67
130
147
170
185

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

195
197

ICH_SMBDATA
ICH_SMBCLK

SDA
SCL
VDDSPD
SA0
SA1

M_CLK_DDR2
M_CLK_DDR#2

50
69
83
120
163

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

81
82
87
88
95
96
103
104
111
112
117
118

GND

GND

2
C33

M_CLK_DDR3 7
M_CLK_DDR#3 7

2
DUMMY-C2
C32

2
DUMMY-C2

ICH_SMBDATA 12,16,21,26
ICH_SMBCLK 12,16,21,26

1
1

2 10KR2J-3-GP
2 10KR2J-3-GP

PM_EXTTS#1 7

+1.8V

VREF
VSS

put near connector

M_CLK_DDR2 7
M_CLK_DDR#2 7

+3VS
R12
R11

198
200

NC#50
NC#69
NC#83
NC#120
NC#163/TEST

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

199

+3VS
EC45

C17

C14
DY SC2D2U10V3ZY-1GP

3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196

201

DDR2-200P-25-GP-U2

DY
2

BA0
BA1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

7
7

RN4

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

7
7

M_CKE2
M_CKE3

SCD1U16V2ZY-2GP

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

M_CS2#
M_CS3#

79
80

/CS0
/CS1

SCD1U25V3ZY-1GP

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS

107
106

110
115

CKE0
CKE1

8 M_B_BS#0
8 M_B_BS#1

TC8

M_B_BS#0
M_B_BS#1

M_B_RAS# 8
M_B_WE# 8
M_B_CAS# 8

DY
2

1
2

C64

ST220U2D5VBM-LGP

C421

SCD1U16V2ZY-2GP

DY

C394

SCD1U16V2ZY-2GP

C95

SCD1U16V2ZY-2GP

C112

SCD1U16V2ZY-2GP

C79
SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC2D2U10V3ZY-1GP

SC4D7U6D3V3KX-GP

C407

SC4D7U6D3V3KX-GP

DY

8 M_B_BS#2
C399

108
109
113

M_B_BS#2

/RAS
/WE
/CAS

+1.8V

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

Layout Note:
Place near DM2

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14

8 M_B_A[14..0]

C54

C158
DUMMY-C2

DM1

8 M_B_DQS[7..0]

M_CLK_DDR#2
8 M_B_DQS#[7..0]

<Core Design>

SCD1U16V2ZY-2GP

Wistron Corporation
DM1

1st: 62.10017.B51
2nd: 62.10017.E81

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Custom
Date:

DDRII-SODIMM SLOT2

Document Number

Thursday, July 09, 2009

HBU16
1.213
Sheet
1

Rev

1
of

41

CRT I/F & CONNECTOR

+5VS_CRT

+5VS
F2

1
2

EC55
SCD1U25V3ZY-1GP DY

C370

1
1

1
2

+3VS

F2FUSE-PAD-GP

SCD01U16V2KX-3GP

D23

D18
CH501H-40PT-1-GP-U

1st: 69.50007.691
2nd: 69.50007.771

+5VS_CRT1

BLUE

C593
SCD1U16V2ZY-2GP
CRT1

D17

4
3
3

BAV99S-GP

DY

GREEN

7 GREEN

BAV99S-GP

BLUE

7 BLUE

DY

11

7
2
8
3
9
4
10
5

+3VS
D5

JVGA_HS

14

JVGA_VS
DDC_CLK_CON

16

DY

13

15

2
GREEN

DDC_DATA_CON

12

SYN-CONN15-GP

DY

C25
SC33P50V2JN-3GP

DY C27

C19
SC33P50V2JN-3GP
DY
SC22P50V2JN-4GP

C23

DY
SC22P50V2JN-4GP

2
2

+5VS_CRT1

1
1

6
1

RED

RED

DDC_CLK_CON

7 RED

DDC_DATA_CON

SRN2K2J-1-GP

17

RN37

DY

1
2

+5VS_CRT1

1st: 20.20326.015
2nd: 20.20764.015

BAV99-7-F-GP
3

D4

+3VS

JVGA_VS

JVGA_HS

4
3

Layout Note:
* Must be a ground return path between this ground and the ground on
the VGA connector.
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.

+3VS

RN1
SRN2K2J-1-GP

DY
1
2

BAV99S-GP

U41
7 DDC1_DATA
2

DDC_DATA_CON
2

+5VS_CRT1

DDC_CLK_CON

DDC1_CLK

DMN66D0LDW -7-GP
C385
SCD1U16V2ZY-2GP

U69

7 M_HSYNC

OE#

GND

VCC

5V @ ext. CRT side


HSYNC_5

74AHCT1G125GW -1-GP

U70

7 M_VSYNC

OE#

GND

VCC

5
RN38

74AHCT1G125GW -1-GP

VSYNC_5

2
1

3
4

JVGA_HS
JVGA_VS

SRN33J-5-GP-U
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CRT Connector

Size
A3

Document Number

Date:

Thursday, July 09, 2009

Rev

HBU16 1.2
Sheet
E

14

of

41

LCD / INVERTER INTERFACE / CAMERA


R33

LED1
CAPS_LED_PW R

330R2J-3-GP

DY

CAPS_LED# 28,29

DCBATOUT

LED-W -12-GP-U

GND

TP189 TP28-75-GP

GND

TP190 TP28-75-GP

LVDS1

EC33
SCD1U25V3ZY-1GP

48

+LCDVDD
C354

1
R547
10KR2J-3-GP

C348

DY

SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP

+3VL

29

SIZE_DET1

R238

100KR2J-1-GP

+3VS

29

EC_BLON

7
7

BRIGHTNESS_CONN

DDC2_CLK
DDC2_DATA

COVER_SW

DY

TP188 TP28-75-GP

DY

COVER_SW

C341
SCD1U16V2ZY-2GP

TP187 TP28-75-GP

White LED:
Lite-On 83.00191.D70
Everlight 83.19217.F70

+3VS
LID_CLOSE#

+5VS_CAMERA
COVER_SW

100R2J-2-GP
C610
DY SCD22U10V2KX-1GP

EC34
SCD1U25V3ZY-1GP

DY

USB_10+
USB_10-

2
1

DY

R545
LID_CLOSE#

29,31 LID_CLOSE#

C609
SC1KP50V2KX-1GP

23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2

24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45

46

R241
2

SIZE_DET0

TP138 TP28-75-GP

USB_10+

TP139 TP28-75-GP

USB_10-

TP140 TP28-75-GP

GND

TP141 TP28-75-GP

+3VS
U48

SATA_LED#_C

1
R230
100KR2J-1-GP

DMN66D0LDW -7-GP

BRIGHTNESS_CONN

DY

L_BKLTCTL 7

DY

29

0R2J-2-GP

R220
100KR2J-1-GP

DY

R28

R229
100KR2J-1-GP

C379
SCD1U16V2ZY-2GP

C378
SC4D7U10V5ZY-3GP

DY

D21

R226
100KR2J-1-GP

+3VS

DY

USB_10+

2
0R0402-PAD

BRIGHTNESS

2
2

2
1

EC50
SCD1U25V3ZY-1GP

0R0402-PAD
1

USB20_P10

USB_10-

R224
+5VS_CAMERA

S
2
0R0402-PAD

19

2
0R0603-PAD
Q20 DY
AO3403-GP

R27

1
1
0
0

R222

R551

+5VS

USB20_N10

1
0
1
0

SATA_LED 29

19

SIZE_DET1
(Pin19)

SATA_BD_LED 28

R1

PDTA124EU-1-GP

SIZE_DET0
(Pin27)
15.4"
17.0"
15.6"
16.0"

1st: 20.F1296.046
2nd: 20.F1270.046

SATA_LED#

R2
18

SATA_BD_LED_C

29

TXOUTA_L2+ 7
TXOUTA_L2- 7
TXOUTA_L1+ 7
TXOUTA_L1- 7
TXOUTA_L0+ 7
TXOUTA_L0- 7
TXCLKA_L+ 7
TXCLKA_L- 7

47

+5VS_CAMERA

100KR2J-1-GP
1
+3VS

TXOUTB_L2+ 7
TXOUTB_L2- 7
TXOUTB_L1+ 7
TXOUTB_L1- 7
TXOUTB_L0+ 7
TXOUTB_L0- 7
TXCLKB_L+ 7
TXCLKB_L- 7

ACES-CONN46C-2-GP-U

Q33

C353
SCD1U25V3KX-GP

DY

+5VS

3
1
+3VS

BAV99W -1-GP
29 CAM_PW R#

CAM_PW R#
1
R232

DY

2 CAM_PW R_G#
10KR2J-3-GP

+3VS

Layout 40 mil

C380
1
DY SC1KP50V2KX-1GP

1
C364
1
C374

EC_BLON

DY2

D22

SC1KP50V2KX-1GP
BRIGHTNESS_CONN
SC1KP50V2KX-1GP

2
3

+LCDVDD
U43

2
R203
100KR2J-1-GP

IN#1
OUT
EN
GND

1
GND
IN#8
IN#7
IN#6
IN#5

BAV99W -1-GP

9
8
7
6
5

+3VS

R208
100KR2J-1-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

<Core Design>

U46

BC2
SC1U10V3ZY-6GP

SCD1U16V2ZY-2GP

G5281RC1U-GP
EC14

0630 -1

L_VDD_EN

1
2
3
4

+LCDVDD

L_VDD_EN

1
R202

2
3
4
100R2J-2-GP
DMN66D0LDW -7-GP

Title

LCD/Inverter Connector/CAM/LED
Size
A3

Document Number

Date:

Thursday, July 09, 2009

Rev

HBU16 1.2
Sheet

15

of

41

+3VS_CK505

+3VS

+3VS_CK505_IO

L3
+3VS_CK505

2
1

SRC-5_EN/PCI-3

19

CLK48_ICH

25

CLK48_5158

R332
10KR2J-3-GP

3
2

FSA
22R2J-2-GP

17

58
57

CLK_MCH_BCLK1
CLK_MCH_BCLK1#

CPUT2_ITP/SRCT8
CPUC2_ITP/SRCC8

54
53

CLK_CPU_XDP1
CLK_CPU_XDP1#

SRCT7/CR#_F
SRCC7/CR#_E

51
50

CLK_PCIE_LAN1
CLK_PCIE_LAN1#

48
47

CLK_PCIE_MINI1_1
CLK_PCIE_MINI1_1#

CPUT1_F
CPUC1_F

R80
R81
R82
R83
R84
R85

USB_48MHZ/FSLA

2
22R2J-2-GP

45
44

STP_PCI#
STP_CPU#

PCI_STOP#
CPU_STOP#

7
6

12,13,21,26 ICH_SMBCLK
12,13,21,26 ICH_SMBDATA
C

19

SRCT6
SRCC6
SRCT10
SRCC10

SCLK
SDATA

63

CK_PW RGD

SRCT11/CR#_H
SRCC11/CR#_G

CK_PWRGD/PD#

+3VS
19 CLK_SATA_OE#
7 MCH_CLK_REQ#
27 PCLK_FW H

R325 1
R168 1

2 475R2F-L1-GP
2 33R2J-2-GP

29
17

R112 1
R116 1

2 33R2J-2-GP
2 22R2J-2-GP

CLK_PCI_KBC
PCLK_ICH

PCI2_TME
SRC-5_EN/PCI-3
27_SEL
ITP_EN

8
10
11
12
13
14

PCI0/CR#_A
PCI1/CR#_B
PCI2/TME
PCI3
PCI4/27_SELECT
PCI_F5/ITP_EN

64
5

FSLB/TEST_MODE
REF0/FSLC/TEST_SEL

55

NC#55

R86
R87

R88
R91

1
2

1
2

1
2

1
1
1
1
1
1
1
1
1
1

2
2 0R0402-PAD
0R0402-PAD
2
2 0R0402-PAD
0R0402-PAD
2
2 0R0402-PAD
0R0402-PAD

CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3
CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6
CLK_CPU_XDP 3
CLK_CPU_XDP# 3

2
2 15R2J-GP
15R2J-GP
2
2 15R2J-GP
15R2J-GP

CLK_PCIE_LAN 23
CLK_PCIE_LAN# 23
CLK_PCIE_MINI1 26
CLK_PCIE_MINI1# 26

41
42
40
39

SRCT9
SRCC9

37
38

SRCT4
SRCC4

34
35

CLK_MCH_3GPLL1
CLK_MCH_3GPLL1#

SRCT3/CR#_C
SRCC3/CR#_D

31
32

CLK_PCIE_ICH1
CLK_PCIE_ICH1#

28
29

1
R109 1
R110
1
R133 1
R134

2
2 0R0402-PAD
0R0402-PAD
2
2 0R0402-PAD
0R0402-PAD

CLK_PCIE_SATA1
CLK_PCIE_SATA1#

1
R131 1
R132

2
2 0R0402-PAD
0R0402-PAD

24
25

MCH_SSCDREFCLK1
MCH_SSCDREFCLK1#

20
21

CLK_MCH_DREFCLK1
CLK_MCH_DREFCLK1#

1
R129 1
R130
1
R127 1
R128

2
2 0R0402-PAD
0R0402-PAD
2
2 0R0402-PAD
0R0402-PAD

CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7
CLK_PCIE_ICH 19
CLK_PCIE_ICH# 19

GND48
GNDPCI
GNDREF

27MHZ_NONSS/SRCT1/SE1
27MHZ_SS/SRCC1/SE2

+1.05VS

FS_B

FS_A

CPU

1
0
0
0
0

0
0
1
1
0

1
1
1
0
0

100M
133M
166M
200M
266M

R315
56R2J-4-GP

DY

R335
10KR2J-3-GP

27_SEL
R336
10KR2J-3-GP

R354
DY R328
DY
0R2J-2-GP
0R2J-2-GP

R340
10KR2J-3-GP

2
1

DY

FS_C
+1.05VS

+3VS_CK505

+3VS_CK505

ITP_EN

Output

ITP_EN

0
1

SRC8
CPU_ITP

CPU_BSEL2

R319

CPU_BSEL1

R321

CPU_BSEL0

1
1
R356

CLK_BSEL2

2
0R0402-PAD
2
0R0402-PAD
2
0R0402-PAD

CLK_BSEL1

FSB

27_SEL

PIN 20

PIN 21

0
1

DOT96T
SRCT0

DOT96C
SRCC0

PIN 25
SRCT1/LCDT_100
27M_SS

FSA
2K2R2J-2-GP

R318 1

2 1KR2J-1-GP

MCH_CLKSEL2

3,7

R327 1

2 1KR2J-1-GP

MCH_CLKSEL1

3,7

R357 1

2 2K2R2J-2-GP

MCH_CLKSEL0

3,7

<Core Design>

Wistron Corporation

2
1KR2J-1-GP

DY

PIN 24
SRCT1/LCDT_100
27M_NSS

0R0402-PAD

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

R314
1KR2J-1-GP

Title

Clock Generator ICS9LPRS355

2
1KR2J-1-GP

DY R324
1

DY R367

1. All of Input pin didn't have internal pull up resistor.


2. Clock Request (CR) function are enable by registers.
3. CY28548 integrated serial resistor of differential clock,
so put 0 ohm serial resistor in the schematic.

1
R353

Design Note:

10KR2J-3-GP

R320
CLK_BSEL0

FSC

R317

R341
10KR2J-3-GP

DREFCLK 7
DREFCLK# 7

+1.05VS

SRCT0/DOTT_96
SRCC0/DOTC_96

DREFSSCLK 7
DREFSSCLK# 7

R330
10KR2J-3-GP

DY

ICS9LPRS355BKLFT-GP-U

SC4D7P50V2CN-1GP

PCI2_TME

ICS
71.09355.B03
Realtek 71.00875.003

DY

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

R329
10KR2J-3-GP
B

DY

DY

C186
1

C203
1

C202
1

+3VS_CK505

GND

2
33R2J-2-GP

CLK_PCIE_SATA 18
CLK_PCIE_SATA# 18

65

CLK_ICH14

SRCT2/SATAT
SRCC2/SATAC

GND
GNDSRC
GNDSRC
GNDSRC
GNDCPU
GND

19

FSB
FSC

22
30
36
49
59
26

R99

DY

C217

MCH_CLK_REQ#

18
15
1

R326
10KR2J-3-GP

DY

19
27
43
52
33
56

CLK_CPU_BCLK1
CLK_CPU_BCLK1#

X1
X2

2
1
R352
1
R351

61
60

CPUT0
CPUC0

19
19

CLK_XTAL_IN
CLK_XTAL_OUT

SC4D7P50V2CN-1GP

DY1

1
2
C522

R331
10KR2J-3-GP

VDD96_IO
VDDPLL3_IO
VDDSRC_IO
VDDSRC_IO
VDDSRC_IO
VDDCPU_IO

4
16
9
46
62
23

VDDREF
VDD48
VDDPCI
VDDSRC
VDDCPU
VDDPLL3

PCI_STOP#/CPU_STOP#
SRC5

1
2

1
2

2
1

PIN44,45

0
1

C493

SC10U10V5ZY-1GP

C174
SC12P50V2JN-3GP

C494

SCD1U16V2ZY-2GP

C180
SC12P50V2JN-3GP

DY

SCD1U16V2ZY-2GP

CLK_XTAL_OUT

C509

DY

SCD1U16V2ZY-2GP

X-14D31818M-37GP

C506
SCD1U16V2ZY-2GP

X1
CLK_XTAL_IN

C512
SCD1U16V2ZY-2GP

DY

SRC-5_EN/PCI-3

C191
SC10U10V5ZY-1GP

1
2
SBK160808T-601Y-N-GP

U21

+3VS_CK505

L2

+3VS_CK505_IO

C496
SCD1U16V2ZY-2GP

DY

C507
SCD1U16V2ZY-2GP

DY

C505
SCD1U16V2ZY-2GP

C502
SCD1U16V2ZY-2GP

C495
SCD1U16V2ZY-2GP

DY

C492
SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP

C214

1
2
SBK160808T-601Y-N-GP

+3VS

Size

Document Number

Date:

Thursday, July 09, 2009

Rev

HBU16 1.2
4

Sheet
1

16

of

41

+3VS
RN34

1
2
3
4

8
7
6
5

PCI_TRDY#
PCI_FRAME#
INT_PIRQD#
PCI_REQ3#
2 OF 6
U60B

SRN8K2J-4-GP

D11
C8
D9
E12
E9
C9
E10
B7
C7
C5
G11
F8
F11
E7
A3
D2
F10
D5
D10
B3
F7
C3
F3
F4
C1
G7
H7
D1
G5
H6
G1
H3

RN53

1
2
3
4

8
7
6
5

PCI_PLOCK#
PCI_IRDY#
PCI_SERR#
INT_PIRQB#

SRN8K2J-4-GP
RN54

1
2
3
4

8
7
6
5

PCI_PERR#
PCI_REQ0#
INT_PIRQG#
INT_PIRQH#

SRN8K2J-4-GP
RN30

1
2
3
4

8
7
6
5

PCI_REQ2#
PCI_REQ1#
PCI_STOP#
PCI_DEVSEL#

SRN8K2J-4-GP
C

RN31

1
2
3
4

8
7
6
5

INT_PIRQC#
INT_PIRQA#
INT_PIRQF#
INT_PIRQE#
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#

SRN8K2J-4-GP

J5
E1
J6
C4

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

PCI

F1
G4
B6
A7
F13
F12
E6
F6

REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55

PCI_REQ0#
PCI_GNT0#
PCI_REQ1#
PCI_REQ2#
PCI_REQ3#
PCI_GNT3#

D8
B4
D6
A5

C/BE0#
C/BE1#
C/BE2#
C/BE3#
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
PLTRST#
PCICLK
PME#

D3
E3
R1
C6
E4
C2
J4
A4
F5
D7

PCI_IRDY#

C14
D4
R2

PCI_PLTRST#

PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#

PCLK_ICH

Interrupt I/F
PIRQA#
PIRQB#
PIRQC#
PIRQD#

16
C

ICH_PME#

H4
K6
F2
G2

PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

TP64

TPAD14-GP

INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
INT_PIRQH#

ICH9M-GP-NF

19

PCI_GNT0#
1
R148
1
R114
PCI_GNT3#
1
R146

SPI_CS#1

DY

DY

DY

1KR2J-1-GP
1KR2J-1-GP

USE LPC
B

1KR2J-1-GP

+3VALW

U23

BOOT BIOS Strap


PCI_GNT#0

SPI_CS#1

PCI_PLTRST#

BOOT BIOS Location

SPI

PCI

LPC(Default)

VCC

PLT_RST#

PLT_RST# 7,23,26,27,29

GND
74LVC1G08GW -1-GP

A16 swap override strap

1
R141

PCI_GNT#3

DY

2
0R0402-PAD

low = A16 swap override enable


high = default

<Core Design>
A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Date:
5

ICH9-M (1 of 5)

Document Number

Thursday, July 09, 2009

HBU16 Sheet
1.2
1

Rev

1
17

of

41

+RTCVCC
ICH_RTCX1
+RTCVCC

ICH_RTCX2

X3
X-32D768KHZ-38GPU

1
2
R119
20KR2J-L2-GP

ICH_INTVRMEN

2
SRTCRST# new signal Pin

C497
SC1U10V3KX-3GP

G96
GAP-OPEN

C23
C24

RTCX1
RTCX2

ICH_RTCRST#
SRTCRST#
SM_INTRUDER#

A25
F20
C22

RTCRST#
SRTCRST#
INTRUDER#

ICH_INTVRMEN

INTVRMEN
LAN100_SLP

E25

GLAN_CLK

LPC_AD[0..3]

LAN_RXD0
LAN_RXD1
LAN_RXD2

1
R100
2

R592

0630 -1
0R0402-PAD

R591

2 GLAN_COMP
24D9R2F-L-GP

B28
B27

28 HDA_SDIN0
TPAD14-GP TP35
7

RN32

1
2

K3

LPC_FRAME#

J3
J1

TPAD14-GP
TP61

GPIO23

HDA_BIT_CLK
HDA_SYNC

AE7

HDA_RST#

AF4
AG4
AH3
AE5

HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3

SRN33J-5-GP-U

AG5
AG7
AE8

SATA_LED#

HDD

22
22
22
22

SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0

ODD

22
22
22
22

SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1

AJ25
AE23

FERR#

AJ26

IGNNE#
INIT#
INTR
RCIN#
NMI
SMI#
STPCLK#

HDA_SDOUT

R375

1
2
10KR2J-3-GP

AG8

SATALED#

C236 1
C230 1

AJ16
AH16
2 SCD01U16V2KX-3GP SATA_TXN0_C AF17
2 SCD01U16V2KX-3GP SATA_TXP0_C AG17

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

C240 1
C245 1

AH13
AJ13
2 SCD01U16V2KX-3GP SATA_TXN1_C AG14
2 SCD01U16V2KX-3GP SATA_TXP1_C AF14

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

H_DPRSTP#
H_FERR#_R

1
R103

2
56R2J-4-GP

H_IGNNE#

AE22
AG25
L3

H_INIT# 3
H_INTR 3

AF23
AF24

H_NMI

AH27

H_STPCLK# 3

AG27

R105
56R2J-4-GP

H_DPRSTP# 4,7,35
H_DPSLP# 4

AF25

AG26

+1.05VS

KA20GATE 29
H_A20M# 3

H_PW RGD 4

PECI

+3VS

27,29

AD22

THRMTRIP#

H_FERR#

+3VS

R359

2 10KR2J-3-GP

KBRCIN#

29

+1.05VS

R108

H_SMI# 3

H_THERMTRIP_R

1
2
56R2J-4-GP

1
2
R106
54D9R2F-L1-GP

PM_THRMTRIP-A# 3,7

Placed Within 2" from


SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO34

SATA_LED#

N7
AJ27

DPRSTP#
DPSLP#

CPUPWRGD

GLAN_COMPI
GLAN_COMPO

ACZ_RST#_R

ACZ_SDATAOUT_R

15

GLAN_DOCK#/GPIO56

AF6
AH4

HDA_SDIN2

4
3

LAN_TXD0
LAN_TXD1
LAN_TXD2

ACZ_BIT_CLK
ACZ_SYNC_R

33R2J-2-GP

A20GATE
A20M#

27,29

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LAN_RSTSYNC

F14
G13
D14

B10

LDRQ0#
LDRQ1#/GPIO23

LAN / GLAN
CPU

C13

D13
D12
E13

+1.5VS

7,28 HDA_SYNC_CODEC
7,28 HDA_SDOUT_CODEC

FWH4/LFRAME#

IHDA

GLAN_COMP place within 500 mil of ICH9M

7,28 HDA_RST#_CODEC

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

K5
K4
L6
K2

B22
A22

LPC_AD[0..3]

1 OF 6

1
R322
20KR2J-L2-GP

ICH_RTCX1
ICH_RTCX2

RTC
LPC

U60A

32.768Khz 12.5pf 10ppm


1st: 82.30001.691 (KDS)
2nd: 82.30001.861 (EPSON)

7,28 HDA_BITCLK_CODEC

1
2
R339
330KR2F-L-GP

+RTCVCC

C204

C210
SC1U10V3KX-3GP

SM_INTRUDER#

C195

4
SC12P50V2JN-3GP

SC12P50V2JN-3GP

1
2
R334
1MR2J-1-GP

ICH9

AH11
AJ11
AG12
AF12

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

AH9
AJ9
AE10
AF10

SATA_CLKN
SATA_CLKP

AH18
AJ18

SATARBIAS#
SATARBIAS

AJ7
AH7

SATA

1
R111
10MR2J-L-GP

CLK_PCIE_SATA#
CLK_PCIE_SATA

16
16

SATARBIAS

2
24D9R2F-L-GP

1
R145

Place within 500 mils of


ICH9 ball

ICH9M-GP-NF

+3VL
+RTCVCC

U31

1
R160

RTC1

BATT1.1

W=20mils

RTC_PW R_L
2
0R0402-PAD

3
2

R159

W=20mils

RTC_PW R

W=20mils

1
4

CH715FPT-GP

1KR2J-1-GP
ACES-CON3-GP-U1

W=20mils

C285
SC1U10V3ZY-6GP

1st: 20.F0714.003
2nd: 20.D0201.103
3nd: 20.F1000.003
<Core Design>
A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

integrated VccSus1_05,VccSus1_5,VccCL1_5

INTVRMEN

High=Enable

Low=Disable

Title

integrated VccLan1_05VccCL1_05

LAN100_SLP

High=Enable

Low=Disable

Size
Date:

Document Number

ICH9-M (2 of 5)

Thursday, July 09, 2009

HBU16 Sheet
1.2
1

Rev

1
18

of

41

+3VALW

2
1
SRN2K2J-1-GP

2
DY 1KR2J-1-GP

W25X16VSSIG-GP

D21

2 ICH_TP7
DY 0R2J-2-GP

R430
10KR2J-3-GP
1
R137
8K2R2J-3-GP

+3VS
16

EC_SCI#

29 EC_SCI#
29 EC_SWI#
31 SB_PWR_LED

C555
SCD1U16V2ZY-2GP

DY

CLK_SATA_OE#

SB_PWR_LED

+3VS
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP

TP29
TP62
TP33
TP23
TP58
TP27

1
1
1
1
1
1

TP30
TPAD14-GP
TPAD14-GP
TPAD14-GP

Norn connect to charger

GPIO17
GPIO18
GPIO20
GPIO22
GPIO27
GPIO28
GPIO38
1
TP24
1
TP26
1
TP25

1
TPAD14-GP

VRMPWRGD

A20

SPI_CLK
SPI_MOSI

72.25X16.001 (2M Flash ROM)

1
R338

WAKE#
SERIRQ
THRM#

SST

AG19
AH21
AG21
A21
C12
C21
AE18
K1
AF8
AJ22
A9
D19
L1
AE19
AG22
AF21
AH24
A8

TACH1/GPIO1
TACH2/GPIO6
TACH3/GPIO7
GPIO8
LAN_PHY_PWR_CTRL/GPIO12
ENERGY_DETECT/GPIO13
TACH0/GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
GPIO27
GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
GPIO49
GPIO57/CLGPIO5

4 OF 6
U60D

PCIE_RXN2
PCIE_RXP2
PCIE_TXN2
PCIE_TXP2

PCIE_RXN2
PCIE_RXP2
C486 SCD1U10V2KX-5GP 2
C485 SCD1U10V2KX-5GP 2

1
1

TXN2
TXP2

L29
L28
M27
M26

WLAN

J29
J28
K27
K26
G29
G28
H27
H26

SPI_CLK
SPI_CS#0
17

R450 1
R451 1

2 15R2J-GP
2 15R2J-GP

SPI_CLK_R
SPI_CS#0_R
SPI_CS#1

R452 1
R453 1

2 15R2J-GP
2 15R2J-GP

SPI_MOSI_R D25
SPI_MOSO_R E23

SPI_CS#1
SPI_MOSI
SPI_MOSO

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
USB_OC#8
USB_OC#9
USB_OC#10
USB_OC#11

R428
1

2
22D6R2F-L1-GP

D23
D24
F23

N4
N5
N6
P6
M1
N2
M4
M3
N3
N1
P5
P3

USB_RBIAS_PN AG2
AG1

DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP

PERN3
PERP3
PETN3
PETP3

DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP

PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5

DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

DMI_CLKN
DMI_CLKP

DMI_ZCOMP
DMI_IRCOMP

PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP

USBP0N
USBP0P
USBP1N
USBP1P
SPI_CLK
USBP2N
SPI_CS0#
USBP2P
SPI_CS1#/GPIO58/CLGPIO6 USBP3N
USBP3P
SPI_MOSI
USBP4N
SPI_MISO
USBP4P
USBP5N
OC0#/GPIO59
USBP5P
OC1#/GPIO40
USBP6N
OC2#/GPIO41
USBP6P
OC3#/GPIO42
USBP7N
OC4#/GPIO43
USBP7P
OC5#/GPIO29
USBP8N
OC6#/GPIO30
USBP8P
OC7#/GPIO31
USBP9N
OC8#/GPIO44
USBP9P
OC9#/GPIO45
USBP10N
OC10#/GPIO46
USBP10P
OC11#/GPIO47
USBP11N
USBP11P
USBRBIAS
USBRBIAS#

USB

DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0

7
7
7
7

Y27
Y26
W29
W28

DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1

7
7
7
7

AB27
AB26
AA29
AA28

DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2

7
7
7
7

AD27
AD26
AC29
AC28

DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3

7
7
7
7

28
SB_SPKR
7 MCH_ICH_SYNC#
TPAD14-GP

M7
AJ24
B21
AH20
AJ20
AJ21

SPKR
MCH_SYNC#
TP3
PWM0
PWM1
PWM2

CK_PWRGD

R5

CLPWROK

R6

SATA
GPIO

SLP_M#

B16

CL_CLK0
CL_CLK1

F24
B19

CL_DATA0
CL_DATA1

F22
C19

CL_VREF0
CL_VREF1
CL_RST0#
CL_RST1#
GPIO24/MEM_LED
GPIO10/SUS_PWR_ACK
GPIO14/AC_PRESENT
GPIO9/WOL_EN

1
0R0402-PAD
RSMRST#_SB 32
CK_PWRGD 16
1
M_PWROK 7 R142

M_PWROK
PM_SLP_M#

2
DY 0R2J-2-GP

ALL_PWRGD 35,37,38,39

TPAD14-GP
TP55

+3VS

CL_CLK0 7

R310
3K24R2F-GP

CL_DATA0 7
CL_VREF0_ICH
CL_VREF1_ICH

C25
A19
F21
D18
A16
C18
C11
C20

PM_PWROK 7,32
PM_DPRSLPVR 7,35

CL_RST#0

GPIO24
1
GPIO10/SUS_PWR_ACK
1

+3VALW
TP54 TPAD14-GP
TP191 TPAD14-GP
R348

R309
453R2F-1-GP

R349
453R2F-1-GP

10KR2J-3-GP

CLK_PCIE_ICH# 16
CLK_PCIE_ICH 16
DMI_IRCOMP_R

Q7
R313
24D9R2F-L-GP

35

CLK_EN#

VRMPWRGD

RP1

S
USB_OC#8
USB_OC#3
ICH_RI#
XDP_DBRESET#

2N7002E-1-GP

USB20_N0 22
USB20_P0 22

USB3

USB20_N2 22
USB20_P2 22

External USB3
Pair

USB20_N4 22
USB20_P4 22

External USB2
+3VS

26
26
22
22
25
25

USB20_N10 15
USB20_P10 15

WLAN
Bluetooth

+3VALW

USB

GPIO22

1
R107

Card Reader

DY

2
8K2R2J-3-GP

CAM
+3VS

RN55
GPIO18
SIRQ

4
3

1
2

ICH9M-GP-NF

D22

R311

+1.5VS

SRN10KJ-5-GP

2
R139

+3VS

AF29
AF28

USB20_N6
USB20_P6
USB20_N7
USB20_P7
USB20_N8
USB20_P8

PWRBTN#_SB 29

D20 LAN_RST#1

ICH9M-GP-NF

T26
T25

AC5
AC4
AD3
AD2
AC1
AC2
AA5
AA4
AB2
AB3
AA1
AA2
W5
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2

1ICH_TP3
TP28

C29
C28
D27
D26

PERN2
PERP2
PETN2
PETP2

V27
V26
U29
U28

.
.
. .

E29
E28
F27
F26

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP

RSMRST#

PM_BATLOW#_R

R3

26
26
26
26

PERN1
PERP1
PETN1
PETP1

LAN_RST#

B13

N29
N28
P27
P26

TXN1
TXP1

BATLOW#
PWRBTN#

M_PWROK
1 R438
2
0R0402-PAD
R431 1
DY 2
100KR2J-1-GP

M2

1
1

PCI-Express

PCIE_RXN1
PCIE_RXP1
C488 SCD1U10V2KX-5GP 2
C487 SCD1U10V2KX-5GP 2

Direct Media Interface

PCIE_RXN1
PCIE_RXP1
PCIE_TXN1
PCIE_TXP1

SPI

LAN
23
23
23
23

DPRSLPVR/GPIO16

SPI_HOLD#

CLKRUN#

G20

1 2

R449

8
7
6
5

PWROK

VCC
HOLD#
CLK
DIO

GPIO26

24

PM_SLP_S3# 23,24,29,32,38,39,40
PM_SLP_S4# 29,30,32,38
1
2
TP180 TPAD14-GP
R138
10KR2J-3-GP
TPAD14-GP
TP57 PM_PWROK

CS#
DO
WP#
GND

C10

ICH_SUSCLK

C484
SCD1U10V2KX-4GP
2

1
2
3
4

SPI_CS#0
SPI_MOSO

STP_PCI#
STP_CPU#

E20
M5
AJ23

VRMPWRGD

DY

U75

PM_SLP_S5#

S4_STATE#/GPIO26

SMBALERT#/GPIO11

A14
E19

PCIE_WAKE#
SIRQ

23,26,29 PCIE_WAKE#
29 SIRQ
24 THERM_SCI#

2
DY 1KR2J-1-GP

STP_PCI#
STP_CPU#

C16
E16
G17

PMSYNC#/GPIO0

A17

L4

R448
SPI_WP#

SMB_ALERT#

29 PM_CLKRUN#

16
16

STP_PCI#
STP_CPU#

P1

+3VS

PM_SYNC#

ICH_SUSCLK

SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#

8
7
6
5

SRN10KJ-6-GP

CLK_ICH14 16
CLK48_ICH 16

R360
8K2R2J-3-GP

H1
AF3

GPIO11 Reserved for future


TPAD14-GP TP53

10KR2J-3-GP

SUS_STAT#/LPCPD#
SYS_RESET#

M6

CLK14
CLK48

1
2
3
4

+3VS

PCIE_WAKE#

R4
G19

XDP_DBRESET#

3 XDP_DBRESET#

R169
1

RI#

SATA1GP
SATA3GP
SATA2GP
SATA0GP

3K24R2F-GP

+3VALW

F19

SATA0GP
SATA1GP
SATA2GP
SATA3GP

ICH_RI#

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37

AH23
AF19
AE21
AD20

C511
SCD1U10V2KX-4GP

SMB

1
2

21 ICH_SMB_CLK
21 ICH_SMB_DATA

RN29

Clocks

ICH_SMB_CLK
ICH_SMB_DATA
LINKALERT#
ME_EC_CLK1
ME_EC_DATA1

STP_PCI#
STP_CPU#

+3VS

3 OF 6
U60C
G16 SMBCLK
A13 SMBDATA
E17 LINKALERT#/GPIO60/CLGPIO4
C17
SMLINK0
B18
SMLINK1

3
4

2
1

SRN10KJ-5-GP

SYS GPIO
Power MGT

R140
10KR2J-3-GP

DY

MISC
GPIO
Controller Link

RN52
SRN10KJ-5-GP

RN48

RN27

4
3

3
4

+3VS

+3VALW

+3VALW

1
2
3
4
5

+3VALW

10
9
8
7
6

PM_BATLOW#_R
SMB_ALERT#
USB_OC#10
USB_OC#9

10
9
8
7
6

USB_OC#0
USB_OC#1
USB_OC#6
USB_OC#2

SRN10KJ-L3-GP

Device

USB3

FREE

External USB3

FREE

External USB2

FREE

WLAN

BLUETOOTH

CARD READER

FREE

10

CAMERA

11

FREE

RP2
USB_OC#7
USB_OC#11
USB_OC#5
USB_OC#4
+3VALW

1
2
3
4
5

+3VALW

SRN10KJ-L3-GP
A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ICH9-M (2 of 5)

Size

Document Number

Date:

Thursday, July 09, 2009

HBU16 Sheet
1.2
1

Rev

1
19

of

41

6 OF 6

+3VS

VCCLAN3_3
VCCLAN3_3

A27

1
2

1
2

1
2

1
2

SC4D7U6D3V3MX-2GP

2
1
2

SB_VCCHDA

+1.5VS

1
0R0603-PAD

C269
SCD1U10V2KX-4GP

32mA
+1.5VS

32mA
1

DY

0R3J-0-U-GP

+1.5VS

C229
SCD1U10V2KX-4GP

C550

1
0R0603-PAD

C258

DY SCD1U10V2KX-4GP

177mA
2

1
0R0603-PAD

C549
SCD022U16V2KX-3GP

18mA

1
C206
DY SCD1U10V2KX-4GP

C218
SCD1U10V2KX-4GP

+3VS
C207
2
1
R540
SC1U10V3KX-3GP DY
0R0603-PAD

SB_VCCCL3_3

+3VALW
R538

C260

1
2
1

C268

DY

C259

+3VALW

R536

2
R143

C273
SCD1U10V2KX-4GP

G23 VCCSUS1_5[3]
A24
B24

1
2

1
2

1
2

SCD1U10V2KX-4GP

+1.05VS

1
0R0603-PAD

VCCCL3_3
VCCCL3_3

1
2
1

CORE
VCCP_CORE

1
2
VCC_GLAN_PLL

A12
B12

VCCCL1_5

DY C227

DY C208

1
0R0603-PAD

SB_VCCSUS3_3

1
2

1
2

1
2

A18
D16
D17
E22

G22 VCCSUS1_05[3]

VCCLAN1_05
VCCLAN1_05

D28
D29
E26
E27
C235
SCD1U10V2KX-4GP

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

VCCCL1_05

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

+3VS

TP34

1
1

VCCSUS1_5[2]

VCCUSBPLL

VCCGLANPLL
VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5

1
2

DY

F18

VCC1_5_A
VCC1_5_A
VCC1_5_A

A10
A11

A26
C234
SC4D7U6D3V3MX-2GP

AD8 VCCSUS1_5[1] 1

T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7

VCC1_5_A
VCC1_5_A

VCC3_3=278mA

C265

1
2

C173
SC10U6D3V5MX-3GP

VCCSUS1_05[1]
VCCSUS1_05[2]

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

VCC1_5_A

+3VS
2 R532
1
C257
C205
0R0603-PAD
SCD1U10V2KX-4GP
SCD01U16V2KX-3GP

R531
SB_V_CPU_IO

R534

1
1

C254
VCCLAN1D05
1
SCD1U10V2KX-4GP

80mA
1

+1.5VS

C187
SC2D2U6D3V3MX-1-GP

AJ5
AA7
AB6
AB7
AC6
AC7

23mA

2
1
IND-1D2UH-10-GP

VCC1_5_A
VCC1_5_A

AC12
AC13
AC14

L1

AC18
AC19

G10
G9

1D5V_USB_S0

DY+1.5VS

VCC1_5_A

+1.05VS

2 R135
1
0R0603-PAD

1mA

TP31

AF1

C490
SC10U6D3V5MX-3GP

GLAN POWER

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C525

AC9

AC8
F17

+1.5VS

23mA

2
1
IND-1D2UH-10-GP
L28

50mA
C212

AJ3

VCCSUS1_5

VCCSUS3_3

USB CORE

SB_VCCLAN3_3

SCD1U10V2KX-4GP

18mA in S0;50mA in S3/S4/S5

2
1
R539
0R0603-PAD
C528

DY

SCD1U10V2KX-4GP

C256
SCD1U10V2KX-4GP
+3VS

C267

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

AC21

1
C266

AC11
AD11
AE11
AF11
AG10
AG11
AH10
AJ10

S/B_PCI_VCCP_CORE_S0
C255
C246

VCCSUS1_5

2
R144
0R0603-PAD

VCCSUS1_05
VCCSUS1_05

+3VS
R533
C198
2
1
0R0603-PAD

SCD1U10V2KX-4GP

USBPLL=10mA

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

3D3V_VCCPCORE_ICH_S0

SCD1U10V2KX-4GP

+1.5VS

C247
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

2
1
0R0603-PAD
C221

SB_VCC_1_5_A

AJ4

DY

SCD1U10V2KX-4GP

R537

VCCHDA

C491
SC1U10V3ZY-6GP

SCD1U10V2KX-4GP

+1.5VS

C238

VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3

B9
F9
G3
G6
J2
J7
K7

VCCSUSHDA

ATX

C252

SC1U10V3KX-3GP

C551
SCD1U10V2KX-4GP

SB_SATA_USB_1_5_A

2
0R0805-PAD

SC1U10V3KX-3GP

V5REF_S5

R427
10R2J-2-GP

VCC3_3
VCC3_3
VCC3_3
VCC3_3

DY

C213

R102

1
D30
CH751H-40PT

1mA

AC16
AD15
AD16
AE15
AF15
AG15
AH15
AJ15

AC10

C209

SCD1U25V3ZY-1GP
EC44

SB_VCC_3_3_C

SATA+USB=1.56A

R535

VCCDMI

AJ6

AD19
AF20
AG24
AC20

VCCSATAPLL

ARX

+1.5VS

VCC3_3

PCI

1
2

+5VALW

VCC3_3

VCCPSUS

+3VALW

Layout Note:
Place near ICH8

VCC3_3

AG29

C489
SCD01U16V2KX-3GP

1
2

2
1
1
2

AJ19

AB23
AC23

1D5V_DMIPLL_ICH_S0

SCD1U10V2KX-4GP

C263
SC1U10V3KX-3GP

V_CPU_IO
V_CPU_IO

C239

DY

1D5V_DMIPLL_ICH_S0

SCD1U10V2KX-4GP

V5REF_S0

R147
10R2J-2-GP

W23
Y23

C233

DY

+1.05VS

1
0R0603-PAD

SCD1U10V2KX-4GP

D12
CH751H-40PT

1mA

R29

VCCDMI
VCCDMI

C225

DY

SCD1U10V2KX-4GP

+5VS

VCCA3GP

SC10U6D3V5MX-3GP

+3VS
C

SC1U10V3ZY-6GP

*Within a given well, 5VREF needs to be up before the


corresponding 3.3V rail

C222

VCCDMIPLL

C248

SC4D7U6D3V3MX-2GP

C223

VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B

C231

SC10U10V5ZY-1GP

+1.5VS_APLL
L4
1
2
IND-1D2UH-10-GP

AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29
F25
G25
H24
H25
J24
J25
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T24
T27
T28
T29
U24
U25
V24
V25
U23
W24
W25
K23
Y24
Y25

SB_VCC1_05

SCD1U10V2KX-4GP

47mA
+1.5VS

V5REF_SUS

1
2

1
2

C199
SC2D2U6D3V3MX-1-GP

C483
SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

DY

C482

AE1

R530

Layout Note: Place near ICH9M

SCD1U10V2KX-4GP

TC10

V5REF_S5

V5REF

A15
B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

SCD1U10V2KX-4GP

C188

DY

ST220U2D5VBM-LGP

DY

SCD1U10V2KX-4GP

C197
SCD1U10V2KX-4GP

A6

VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05

SCD1U10V2KX-4GP

1
2
R305
0R0805-PAD

V5REF_S0

VCCRTC

SCD01U16V2KX-3GP

+1.5VS_PCIE

A23

SCD01U16V2KX-3GP

657mA
+1.5VS

C503
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C501

1.13A

U60F

6uA in G3

VCCPUSB

+RTCVCC

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

VCCGLAN3_3
ICH9M-GP-NF

1mA

Title

1
2
R306
0R0603-PAD

3D3V_GLAN_S0

ICH9 (3/5)
Size

Document Number

Rev

HBU16 1.2
Date:
5

W ednesday, July 01, 2009

Sheet
1

1
20

of

41

5 OF 6
U60E

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25
A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29

+3VS

3
4

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

RN28
SRN2K2J-1-GP

+3VS

2
1

AA26
AA27
AA3
AA6
AB1
AA23
AB28
AB29
AB4
AB5
AC17
AC26
AC27
AC3
AD1
AD10
AD12
AD13
AD14
AD17
AD18
AD21
AD28
AD29
AD4
AD5
AD6
AD7
AD9
AE12
AE13
AE14
AE16
AE17
AE2
AE20
AE24
AE3
AE4
AE6
AE9
AF13
AF16
AF18
AF22
AH26
AF26
AF27
AF5
AF7
AF9
AG13
AG16
AG18
AG20
AG23
AG3
AG6
AG9
AH12
AH14
AH17
AH19
AH2
AH22
AH25
AH28
AH5
AH8
AJ12
AJ14
AJ17
AJ8
B11
B14
B17
B2
B20
B23
B5
B8
C26
C27
E11
E14
E18
E2
E21
E24
E5
E8
F16
F28
F29
G12
G14
G18
G21
G24
G26
G27
G8
H2
H23
H28
H29

U17
12,13,16,26

19

ICH_SMBDATA

ICH_SMB_CLK

ICH_SMB_CLK

ICH_SMB_DATA

ICH_SMB_DATA

ICH_SMBCLK

12,13,16,26

DMN66D0LDW -7-GP

SMBUS
C

ICH_GND1
1

TP60

ICH_GND2
1

TP51

TPAD14-GP
TPAD14-GP

ICH_GND3
1

TP63

NCTF PIN
TPAD14-GP

ICH_GND4
1

TP52

TPAD14-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ICH9-M (4 of 4)
Size

Document Number

ICH9M-GP-NF

Rev

HBU16 1.2
Date:

19

Thursday, July 09, 2009

Sheet
1

21

of

41

USB PORT

+5V_USB2

1st: 22.10218.N21
2nd: 22.10218.N91
3nd: 22.10218.Z21

SATA HDD Connector

USB3
+5V

+5V_USB2
G114

GAP-CLOSE-PW R

100 mil

100 mil

+5V

19
19

TC19
ST100U10VCM-GP

R381 1
R380 1

USB20_N0
USB20_P0

USB0USB0+

2 0R0402-PAD
2 0R0402-PAD

23
NP1
1

2
3
4
5
7

SCD1U16V2ZY-2GP

C518

DY

SC1KP50V2KX-1GP

C521

2
1

GAP-CLOSE-PW R
G115
1
2

HDD1

8
6
1

100 mil

18 SATA_TXP0
18 SATA_TXN0
C220 1
C244 1

18 SATA_RXN0
18 SATA_RXP0

SKT-USB-131-GP-U

2
3
4
5
6
7

SCD01U16V2KX-3GP
SATA_RXN0_C
2
SATA_RXP0_C
2
SCD01U16V2KX-3GP

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
NP2
24

+5V_USB1
+5V_USB1

U59

TP102 TP28-75-GP

TP104 TP28-75-GP

USB20_N0

1
2
3

ESD I/O1
GND
ESD I/O2

ESD I/O4
VP
ESD I/O3

6
5
4

+5V

USB20_P0

NUMLK_LED_PW M 1

TP101 TP28-75-GP

GND

TP105 TP28-75-GP

GND

TP169 TP28-75-GP

IP4220CZ6-GP

C194
SCD1U10V2KX-4GP

DY

19
19
19
19

29

NUMLK_LED#

NUMLK_LED#

USB1

11
1

USB20_N4
USB20_P4
USB20_N2
USB20_P2

1
2
R469
330R2J-3-GP

+5VS

NUMLK_LED_PW M

C540

DY

+5VS

EC47

C541

GND

TP28-75-GP

TP103 TP28-75-GP

TP97

TC21

DY

USB20_P2

GAP-CLOSE-PW R

C12

USB20_N2

C81

TP28-75-GP

TP100 TP28-75-GP

TP98

SC10U10V5ZY-1GP

USB20_P4

SCD1U16V2ZY-2GP

USB20_N4

+5VS

0630 -1

SCD1U25V3ZY-1GP

TP28-75-GP

SCD1U16V2ZY-2GP

TP99

SCD1U16V2ZY-2GP

TP168 TP28-75-GP

C360
SCD1U16V2ZY-2GP

+5V_USB1

ST100U6D3VBM-5GP

GAP-CLOSE-PW R
G116
1
2

+5V_USB1

G117

SKT-SATA22P-20-GP

2
3
4
5
6
7
8
9
10

1st: 62.10065.261
2nd: 62.10065.511

12
ACES-CON10-5-GP-U1

U76

1st: 20.F0735.010
2nd: 20.D0174.110
3nd: 20.F0984.010

USB20_N4

6
5
4

ESD I/O4
VP
ESD I/O3

+5V

USB20_P4

IP4220CZ6-GP

C377
SCD1U10V2KX-4GP

ODD Connector

DY
+3V_BT

TP173 TP28-75-GP

2
3
4
5
6

USB7-

TP175 TP28-75-GP

USB7+
USB7-

BT_LED

TP172 TP28-75-GP

BT_R_DET#

BT_LED 31
BT_DET# 29

1
DY 2
R594
0R2J-2-GP

8
JST-CON6-17-GP

BT_R_DET#

SATA_TXP1
SATA_TXN1
SATA_RXP1
SATA_RXN1

C552 1
C553 1

2
2

DY

C548

TC20
ODD1

P2
P3
S2
S3
S6
S5

SCD1U16V2ZY-2GP

SCD01U16V2KX-3GP
SATA_RXP1_C
SATA_RXN1_C
SCD01U16V2KX-3GP

MAX 150mA

DY

NP1
NP2

A+
AB+
BNP1
NP2

DP
MD

P1
P4

GND
GND
GND
GND
GND
GND
GND

S1
S4
S7
P5
P6
8
9

ODD_DP
ODD_MD

TP59
TPAD14-GP

R150

DY

SKT-SATA7P+6P-22-GP-U1

Q29
AO3403-GP

+3VALW

+5V
+5V

10KR2J-3-GP

18
18
18
18

TP179 TP28-75-GP

21.D0220.106
EC17

EC46

DY

TP174 TP28-75-GP

USB7+

SC10U10V5ZY-1GP

TP176 TP28-75-GP

SCD1U16V2ZY-2GP

GND

SCD1U25V3ZY-1GP

+3V_BT

EC16
SCD1U16V2ZY-2GP

BT1

DY

+5VS

USB20_N2

ESD I/O1
GND
ESD I/O2

BLUETOOTH

1
2
3

USB20_P2

+3V_BT

1st: 62.10065.351
2nd: 62.10065.421
3nd: 62.10065.521

S
D

USB7+

C592

DY SC4D7U10V5ZY-3GP

<Core Design>

2
0R0402-PAD

C590
SCD1U10V2KX-4GP

USB20_P7

1
R401

R493
100KR2J-1-GP

DY

USB20_N7

USB7-

Wistron Corporation

19

2
0R0402-PAD

C588
SC1U10V3KX-3GP

1
R395

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
19

Title
D31
29

BT_EN#

A BT_EN#_C
1SS355PT-GP

R494
1

BT_EN#_1

10KR2J-3-GP

SCD1U16V2ZY-2GP
1 C591

DY

HDD/CDROM/USB/BT
Size
A3

Document Number

Date:

Thursday, July 09, 2009

Rev

HBU16 1.2
Sheet

22

of

41

DVDD33

R441

C261

C242

2
+3V_LAN

C215

40 mils
C475

AO3413-GP
Q23

R288
1MR2J-1-GP

DY
2

EC40
SCD1U25V3ZY-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY 0R5J-5-GP
S

SC10U10V5ZY-1GP

C264

+3VALW

DVDD33

2
1

1
R267
0R0603-PAD

40 mils

+3V_LAN

LAN_PY2

1
2
R285
100KR2J-1-GP

LAN_PY1
SC1KP50V2KX-1GP

Q24
2N7002E-1-GP
29 LAN_PW R_ON

SCD1U16V2ZY-2GP

C211
SCD1U16V2ZY-2GP

C251

SCD1U16V2ZY-2GP

1
2

1
2

SCD1U16V2ZY-2GP

C262

19,24,29,32,38,39,40

PM_SLP_S3#

C530
SCD1U16V2ZY-2GP

C228

DY

Q37
2N7002E-1-GP

.
.
. .

VDD12

40 mils

.
.
. .

VDD12

LAN_PY2

EEPROM LED OPTION USE '01'


(DEFINED IN SPEC)
=> LED1 : LINK (Green)
=> LED2 : ACT (Yellow)
(BOTH 10/100 AND GIGA CHIP)
U24

DVDD33
DVDD33

22
30

VDD12
CTRL12
DVDD33
VDDTX

1
3
4
14

DVDD33

2LAN_EECS

R390
3K6R3-GP
LAN_DSM#

LAN_DSM#

REFCLK_P
REFCLK_M

LV_D
LV_A
HV33
VDDTX

LAN_L_DSM#
1
R555
0R0402-PAD

31
32
29
2

EECS

HSIP
HSIN
HSOP
HSON
CLKREQB
PERST#

LENPIN1/EESK
LEDPIN2/EEDI
LEDPIN3/EEDO

MDIP0
MDIN0
MDIP1
MDIN1

PCIE_W AKE#
ISOLATE#

12
13

CLK_PCIE_LAN
CLK_PCIE_LAN#

10
11
15
16

PCIE_TXP1
PCIE_TXN1
PCIE_HSOP C243 1
PCIE_HSON C249 1

18
20

PLT_RST#

PLT_RST# 7,17,26,27,29

5
6
7
8

MDIP0
MDIN0
MDIP1
MDIN1

MDIP0
MDIN0
MDIP1
MDIN1

PCIE_W AKE# 19,26,29

CLK_PCIE_LAN 16
CLK_PCIE_LAN# 16

2 SCD1U10V2KX-5GP
2 SCD1U10V2KX-5GP

PCIE_TXP1
PCIE_TXN1
PCIE_RXP1
PCIE_RXN1

19
19
19
19

+3VS

27
27
27
27

R556

DY 1KR2J-1-GP

CKXTAL1
CKXTAL2
GNDTX
GND

R554

17
33

GPO
IBREF

ISOLATE#

R398
15KR2F-GP

LAN_X1

DSM_ISOLATE# 29

RTL8103T-GR-GP

R126
2K49R2F-GP
C237
1
2 SC15P50V2JN-2-GP

2
1KR2J-1-GP

YELLOW _LED#

24
27
26
25

LAN_X1
LAN_X2

VDD3
VDD3

19
21

R589 1
1KR2J-1-GP

27 GREEN_LED#
27 YELLOW _LED#

29

LANWAKE#
ISOLATE#

C833

DY SCD1U10V2KX-4GP
2

1
2

C832
SC1U10V3KX-3GP DY

C834
SCD1U10V2KX-4GP

CTRL12

VDD1
VDD1
VDD1

9
23
28

VDD12
VDD12
VDD12

X4
XTAL-25MHZ-67GP

2
SC15P50V2JN-2-GP

<Core Design>

LAN_X2

C226

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Size
A3

Document Number

Date:

Thursday, July 09, 2009

RTL8103T
HBU16
1.2
Sheet
23
E

Rev

1
of

41

+5VS

FAN1_VCC
R188
10KR2J-3-GP

*Layout* 15 mil

FAN1

FAN1_FG1

*Layout* 15 mil

C334
SC1KP50V2KX-1GP

4
ACES-CON3-4-GP-U

1
C376
SCD1U16V2ZY-2GP
G792_RST#

1st: 20.F1267.003
2nd: 20.D0209.103
3nd: 20.F0700.003

G792_RST# 32

1
2

C336
SC4D7U10V5ZY-3GP

3
2
FAN1_VCC

+5VS

D14
MMBD4148-F-GP

C331
SC10U10V5ZY-1GP

5
C330
SCD1U16V2ZY-2GP

THERM#
THERM_SET

13
3

SGND
SGND
SGND

8
10
12

TP123 TP28-75-GP

GND

TP124 TP28-75-GP

G792_ALERT#
G792_DXP3
G792_DXP2

ALERT#
SDA
SCL

DGND
DGND

NC#19

SENSE2 for System

G792_DXN2
G792_DXN3

5
17

G7921SF1U-GP

B
C424
SC2200P50V2KX-2GP

Q22
MMBT3904-3-GP

SENSE3 for DIMM

G68

V_DEGREE
=(((Degree-72)*0.02)+0.34)*VCC

TP122 TP28-75-GP

19
R219
100KR2F-L1-GP

FAN1_VCC

DXP1
DXP2
DXP3

FAN1_FG1

G792_SUSCLK

DVCC

1
2
4
14

1
SMBD_G792
SMBC_G792

FAN1
RESET#
FG1
CLK

15
16
18

VCC

V_DEGREE

Setting T8 as
85 Degree

7
9
11

R207
10KR2J-3-GP
19 THERM_SCI#

6
20

+3VS
R218
66K5R3F-GP

1
2
R206
100R2F-L1-GP-U
C366
SCD1U16V2ZY-2GP

5V_G792_S0

R221
100KR2J-1-GP

74.07921.079

U47

*Layout* 30 mil

+5VS

C357
SC2200P50V2KX-2GP

Q4
MMBT3904-3-GP

B
E

GAP-CLOSE

H_THERMDA 3

Place near chip as close


as possible

DXP1:108 Degree
DXP2:H/W Setting
DXP3:88 Degree

+3VS

C359
SC2200P50V2KX-2GP

SENSE1 for CPU

H_THERMDC

+3VS

G792_ALERT#

4
3

EC_RST#

.
. .
.

29

Q19

+5VS

R198
10KR2J-3-GP

RN36
SRN2K7J-3-GP

DY
1
2

2N7002E-1-GP

U42
SMBD_G792
+5VALW
29

KBC_SCL1

DY

KBC_SDA1 29

SMBC_G792

DMN66D0LDW -7-GP
U10
19,23,29,32,38,39,40 PM_SLP_S3#
19 ICH_SUSCLK

1
2
3

A
B
GND

VCC
Y

5
4

G792_SUSCLK

1
R213

2
0R0402-PAD

1
R215

2
0R0402-PAD

74AHCT1G08DCKR-1GP
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Thermal/Fan Controllor
Size
Custom
Date:

Document Number

Rev

HBU16 1.2
Thursday, July 09, 2009

Sheet

24

of

41

USB20_P8

SD_DAT2/XD_RE#

SD_DAT3/XD_WE#

XD_R/B#

39

38

+3VS_D

0R0402-PAD

SD_CMD

RREF

SD_DAT5/XD_D0/CF_D14

AV33

SD_CLK/XD_D1/MS_CLK/CF_D7

DM

D3V3

DP

DGND

+3VS_A

36

SD_CMD

35

SD_DAT5/XD_D0

34

SD_CLK/XD_D1/MS_CLK

XD_ALE

40

SD_DAT4/XD_WP#

XD_CE#

41

+3VS_A

0R0402-PAD

R388

37

XD_CLE

42

5158_VIN
0R0402-PAD

33

CR R406
100KR2J-1-GP

+3VS_D

R439

LED2

CR

VBUS_LED_L

1A

Q39
VBUS_LED

K2

330R2J-3-GP

1
MS_INS#

28

SD_DAT7/XD_D2/MS_D2

27

SD_DAT0/XD_D6/MS_D0

26

SD_DAT1/XD_D3/MS_D1_R

25

XD_D5/MS_BS

R402
0R2J-2-GP

DY

DY

R558
499KR2F-1-GP

XD_D4

R389
0R2J-2-GP
1
DY

MODE_SEL
1

SD_DAT1/XD_D3/MS_D1_R 2

SD_DAT1
C542
SC47P50V2JN-3GP

1
2
R387
0R0402-PAD

R405
0
NC
NC

+3VS

CR

CR

CF_DMARQ

RTS5159-GR-GP

XD_D4

SD_CD#

SD_WP

XD_CD#

VBUS_LED#

CRYSTAL_SEL

C274
SC1U10V3KX-3GP

DY

CR R405
0R2J-2-GP

C542
NC
Install
NC

USB Auto De-link (*1)


Yes
Yes
No

MS Formatter (*2)
No
Yes
No

Description
Recommended
Compatible with RTS5158E

If user remove memory card from socket, RTS5159 will terminate USB
*1. USB Auto De-link mode:
bus connection and enter power saving state.
MSPRO, MSPRO DUO, MSPRO-HG or MSPRO-HG DUO card will be formatted as
*2. MS Formatter:
factory default setting if user formatted these card types under "Vista" OS.

2
R2
PDTC144EU-1-GP

CR

29

3
R1

LED-Y-74-GP

+5VS

30

71.05159.00G

1
2
R386
0R0402-PAD

RST_1#

+3VS_D

High is use
48MHz, NC is use
Crystal.

SD_DAT6/XD_D7/MS_D3

1
2
R557
0R0402-PAD

24

CF_A1/XD_D4

XD_D5/MS_BS/CF_A2

23

19

CF_D9

CF_D2
17

16

GPIO0

CF_D10
15

14

13

CF_CD#

CF_D1/XD_CD#

DGND

SD_DAT1/XD_D3/MS_D1/CF_IORDY

CF_DMACK#

CR

SD_DAT0/XD_D6/MS_D0/CF_RST#

D3V3_OUT

12

31

RST#
C537
SCD1U16V2ZY-2GP

VREG

11

C534
SCD1U16V2ZY-2GP

SD_DAT7/XD_D2/MS_D2/CF_IOWR#

22

10

+3VS_D

MS_INS#/CF_IORD#

CARD_3V3

CF_D8/SM_CD#

VREG

C253
SC1U10V3KX-3GP

CR

5V_IN

CF_A0/SD_CD#

CF_CS0#

CF_D0/SM_WPM#/SD_WP

+3VS_CARD

1
0R0402-PAD

SD_DAT6/XD_D7/MS_D3/CF_D15

A3V3_OUT

21

2
R407

+3VS

AG33

CR

32

5158_VIN

20

C544
SCD1U16V2ZY-2GP

CR DY

18

C272
SC4D7U10V5ZY-3GP

19

USB20_N8

3
19

XD_RDY/CF_D13

RST#

43

AV_PLL

1
R400

1
R397

SD_DAT4/XD_WP#/CF_D6

SD_DAT3/XD_WE#/CF_D5

AV_PLL

XD_ALE/CF_D4

MODE_SEL

44
RST#

46

SCD1U16V2ZY-2GP

1 RREF
CR 6K19R2F-GP

SD_DAT2/XD_RE#/CF_D12

2
R403

XD_CE#/CF_D11

R391
0R0402-PAD
2
1

XD_CLE/CF_D3

MODE_SEL

CR
C539

CR

VREG

C250
SC1U10V3KX-3GP

XTLO

CR

47

U26

XTLI

48

CLK48_5158

AG_PLL

16

45

+3VS

VBUS_LED#

4 IN1 CARD-READER (SD/SD IO/MMC/MMC4.0/MS/MS PRO/XD)


+3VS_CARD
CARD1
31

+3VS_CARD
SD_DAT1/XD_D3/MS_D1_R

C297
SC4D7U10V5ZY-3GP

DY

28
38
19

SD_CLK/XD_D1/MS_CLK_R

C554
SCD1U16V2ZY-2GP

R404
0R0402-PAD
2
1

SD_CLK/XD_D1/MS_CLK

Place close to controler IC

CR

SD_CMD
SD_CLK/XD_D1/MS_CLK
1
R560

2 SD_CLK/XD_D1/MS_CLK_L
0R0402-PAD

36
27

SD_DAT0/XD_D6/MS_D0
SD_DAT1
SD_DAT2/XD_RE#
SD_DAT3/XD_WE#

23
22
41
39

SD_CD#
SD_WP

42
21

SD_WP

45
44

XD_D5/MS_BS
SD_DAT0/XD_D6/MS_D0
MS_INS#
SD_CLK/XD_D1/MS_CLK_R 1
R559

26
30
34
37

CR

SD_VCC

CD
ALE

MS_VCC
MS_VCC

R/B#
RE#
CE#
CLE
WE#
WP#

VCC

SD_CMD
SD_CLK
D0
D1
D2
D3
D4
D5
D6
D7

SD_DAT0
SD_DAT1
SD_DAT2
SD_DAT3
SD_CD_DETECT
SD_WP_PROTECT

SD_CO2
SD_CO1

2 SD_CLK/XD_D1/MS_CLK_R_R
0R0402-PAD

SD_WP1
SD_WP2

SD_3P
SD_6P
SD_7P
SD_8P

MS_BS
MS_SDIO
MS_INS
MS_SCLK

MS_VSS

TPAD14-GP

TP38

SD_DAT6/XD_D7/MS_D3
SD_DAT7/XD_D2/MS_D2
CARD1_SD_IO
1

35
32
29
NP1
NP2
NP3
NP4
NP5
NP6

MS_RESERVED#MS_7
MS_RESERVED#MS_5
SD_I/O
NP1
NP2
NP3
NP4
NP5
NP6

SD_VSS
SD_VSS
GND
GND
GND
GND
GND
GND
GND
GND

2
7

XD_CD#
XD_ALE

3
4
5
6
8
9

XD_R/B#
SD_DAT2/XD_RE#
XD_CE#
XD_CLE
SD_DAT3/XD_WE#
SD_DAT4/XD_WP#

11
12
13
14
15
16
17
18

SD_DAT5/XD_D0
SD_CLK/XD_D1/MS_CLK
SD_DAT7/XD_D2/MS_D2
SD_DAT1/XD_D3/MS_D1_R
XD_D4
XD_D5/MS_BS
SD_DAT0/XD_D6/MS_D0
SD_DAT6/XD_D7/MS_D3

51
50
49
48
47
46

SD_CD#

SD_DAT0/XD_D6/MS_D0
SD_DAT1

25
A

33
24
1
20
40
10
43
52
53
54

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

CARDBUS43P-SKT-GP

Title

20.I0030.021

USB CardReader Controller-RTS5159


Size

Document Number

Date:

Thursday, July 09, 2009

Rev

HBU16 1.2
5

Sheet
1

25

of

41

HDMI
RN69

+3VS

1
1

+3VS

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

2
11
15
21
26
33
40
46

U62

7
7

HDMI_DATA2HDMI_DATA2+

38
39

7
7

HDMI_DATA1HDMI_DATA1+

41
42

7
7

HDMI_DATA0HDMI_DATA0+

44
45

2 4K7R2J-2-GP HDMI_PC0
2 4K7R2J-2-GP HDMI_PC1
2 499R2F-2-GP HDMI_REXT
1 1KR2J-1-GP HDMI_RT#
1 1KR2J-1-GP HDMI_OE#
HDMI_DDC

2
2

IN_D2IN_D2+

OUT_D2OUT_D2+

IN_D3IN_D3+

OUT_D3OUT_D3+
OUT_D4OUT_D4+
SDA
SCL
HPD

REXT
RT_EN#
OE#
DDC_EN

1
1KR2J-1-GP

R459

HDMI_35
HDMI_34

OUT_D1OUT_D1+

HDMI

PS8101-GP

HPD_SINK
SDA_SINK
SCL_SINK

HDMI

23
22

HDMI_1_TXD2#_1
HDMI_1_TXD2_1

20
19

HDMI_1_TXD1#_1
HDMI_1_TXD1_1

17
16

HDMI_1_TXD0#_1
HDMI_1_TXD0_1

14
13

29
29

RN57

2
1

3
4

+3VS

GMCH_HDMI_DATA 7
GMCH_HDMI_CLK 7
HDMI_HPD_L

30
29
28

71.P8101.003 (R455=64.49905.6DL)
71.03300.003 (R455=64.82015.6DL)

HDMI_1_TXD2

HDMI_1_TXD1#_1

HDMI_1_TXD1#

HDMI_1_TXD2#_1

HDMI_1_TXD2#

HDMI_1_TXC

HDMI_1_TXD0_1

HDMI_1_TXD0

HDMI_1_TXC#

HDMI_1_TXD0#_1

HDMI_1_TXD0#

ICH_SMBCLK 12,13,16,21
ICH_SMBDATA 12,13,16,21
USB20_N6 19
USB20_P6 19

TP42
TPAD14-GP
TP41
TPAD14-GP

1
1

+1.5VS

W LAN_LED# 31

+3VALW

.
.
. .

HDMI_1_TXD0#
HDMI_1_TXC
TPAD14-GP
TPAD14-GP

TP66
TP65

HDMI

HDMI
+5VS

32

+5VS_HDMI

HDP

C401
SCD1U16V2ZY-2GP

1
2

C365

DY

<Core Design>

21

DY

Wistron Corporation

23

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

RUN_PW R_CTLR

RUNCTRL_PW R 1
2
R567
1KR3J-L1-GP

HDMI_1_TXC#
1HDMI_CEC
1HDMI_CNC
HDMI_SCL
HDMI_SDA

1
2
1
2

HDMI_1_TXD1#
HDMI_1_TXD0

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

C384

SCD1U16V2ZY-2GP

HDMI_1_TXD2#
HDMI_1_TXD1

HDMI

C339

SCD1U16V2ZY-2GP

R458
20KR2J-L2-GP

HDMI

C333

SC10U10V5ZY-1GP

20
HDMI_1_TXD2

C332

SCD1U16V2ZY-2GP

S
R457
7K5R2J-GP

22
HDMI_HPD

C337

SC10U10V5ZY-1GP

DY

SCD1U16V2ZY-2GP

PEG_RXP3

ICH_SMBCLK
ICH_SMBDATA

+3VS_MINI1

+VL

DY

HDMI1
Q25
2N7002E-1-GP
G

W IFI_RF_EN 29
PLT_RST# 7,17,23,27,29
1
2
R563
0R0402-PAD

PLT_RST#
+3VS_P24

R456
20KR2J-L2-GP

+5VS_HDMI

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
NP2

1st: 62.10043.591
2nd: 62.10043.611

HDMI

R562
0R2J-2-GP

HDMI
1

L30

DY

54

FILTER-123-GP

DY

+3VALW

SKT-MINI52P-22-GP-U

Q43
2N7002K-1-GP

PCIE_TXN2
PCIE_TXP2

SRN1K5J-GP

+3VS

19
19

4
6
8
10
12
14
16

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

E51_RXD
E51_TXD

+5VS_HDMI

HDMI_1_TXD2_1

3
5
7
9
11
13
15

+VL

3
4

HDMI_1_TXD1

L29

W L_PRI
BT_PRI
1

TP45

19 PCIE_RXN2
19 PCIE_RXP2

RN68

1
1
TPAD14-GP

+3VS_MINI1

HDMI_1_TXC#_1

TP56
TP193

HDMI_HPD
2 HDMI 1
R447
1KR2J-1-GP
HDP
HDMI_SDA
HDMI_SCL

2
1

PBY201209T-601Y-N-GP

SRN1K5J-GP

8
9
7

HDMI_1_TXD1_1

16 CLK_PCIE_MINI1#
16 CLK_PCIE_MINI1

HDMI_1_TXC#_1
HDMI_1_TXC_1

FILTER-123-GP

HDMI_1_TXC_1

1
NP1

PCIE_W AKE#

+3VS

6
10
25
32

MINI1

TPAD14-GP
TPAD14-GP

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

HDMI
DY
DY

+3VS
L8

19,23,29 PCIE_W AKE#

PC0
PC1

DY
R455 1
R446 2
R454 2

HDMI_1_TXD1
HDMI_1_TXD1#
HDMI_1_TXC
HDMI_1_TXC#

SRN0J-5-GP

IN_D4IN_D4+

3
4

+3VS_MINI1

8
7
6
5

DY

R442 1
R443 1

+3VS

HDMI_CLKHDMI_CLK+

+1.5VS

1
2
3
4

53

IN_D1IN_D1+

1
5
12
18
24
27
31
36
37
43
49

7
7

47
48

Mini Card Connector1(802.11a/b/g)

RN70

HDMI_1_TXD1_1
HDMI_1_TXD1#_1
HDMI_1_TXC_1
HDMI_1_TXC#_1

35
34

HDMI

HDMI_1_TXD2
HDMI_1_TXD2#
HDMI_1_TXD0
HDMI_1_TXD0#

HDMI

NC#35
NC#34

SCD01U16V2KX-3GP
2
1
C557

SCD1U10V2KX-4GP
2
1
C556

HDMI

8
7
6
5

SRN0J-5-GP

HDMI
4K7R2J-2-GP

1
2
3
4

R444
4K7R2J-2-GP

R445

(dB)
8
4
12
0

HDMI_1_TXD2_1
HDMI_1_TXD2#_1
HDMI_1_TXD0_1
HDMI_1_TXD0#_1

HDMI Connector
PC1 PC0
0
0
0
1
1
0
1
1

SKT-HDMI19P-25-GP
Title

1
R561

1st: 22.10296.061
2nd: 22.10296.011

2
DY 0R2J-2-GP

MINI CARD/HDMI CONN .


C

Size
A3

Document Number

Date:

Thursday, July 09, 2009

Rev

HBU16 1.2
Sheet
E

26

of

41

1.route on bottom as differential pairs.


2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.

LAN Connector
10/100M Lan Transformer
XF1
4

XRF_RDC

XRF_RDC

23

MDIN0

MDIN0

23

MDIP0

MDIP0

23

MDIN1

MDIN1

23

MDIP1

MDIP1

16
14
15

1
3
2

10
11
9

7
6
8

12
13

RJ45-2
XFR_CMT
RJ45-1

1
2 XFR_CMT_1
C586
SCD01U100V5KX-1GP

RJ45-6
XFR_RXC
RJ45-3

R276

1
2 XFR_RXC_1
C587
SCD01U100V5KX-1GP

470R2J-2-GP

23 GREEN_LED#

RJ45-13P-4-GP

4
5

RJ45-1
RJ45-2
RJ45-3
RJ45-4
RJ45-6
RJ45-7

RJ45-4
RJ45-7
+3V_LAN

4
3
2
1

23 YELLOW _LED#
R258
RN47
SRN75J-1-GP

13
15

470R2J-2-GP
RJ1

Green : Link up
Blinking : TX/RX activity

1st: 22.10177.B81
2nd: 22.10177.C21

5
6
7
8

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

XFR_CMT_1
XFR_RXC_1

1st: 68.68167.30A(NS681676)
2nd: 68.HD081.30B(HD-081-A)

C499

14
9
10
11
1
2
3
4
5
6
7
8
12

+3V_LAN

XFORM-16P-9-GP-U

C500

PIN A1 : GREEN
PIN A3 : ORANGE
PIN B2 : YELLOW

LAN_TERMINAL 1
C459

Remark:
Add trace width to 20mils
for RJ1 pin4, 5 and pin 7, 8.

2
SC1500P2KV8KX-3GP

Golden Finger for Debug Board


+5VS
+5VS_LPC

TOP VIEW (A)


2

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15

PLT_RST#_1
LPC_FRAME#_1
LPC_GND
PCLK_FW H_1

...

...

A15 (B1)
A14 (B2)

A2
A1

(B14)
(B15)

LPC_AD3_1
LPC_AD2_1
LPC_AD1_1
LPC_AD0_1
EXT_FW H#_1
+3VS_LPC

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15

+3VS

G98

GAP-OPEN-PW R

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15

PLT_RST#_1
LPC_FRAME#_1
LPC_GND
PCLK_FW H_1

G105

LPC_AD3_1

LPC_FRAME#

G106

LPC_AD2_1

7,17,23,26,29

PLT_RST#

PLT_RST#

GAP-OPEN-PW R

+3VS_LPC

G107

LPC_AD1_1

16

PCLK_FW H

PCLK_FW H

GAP-OPEN-PW R

ZZ.GF030.XXX

Please put near board edge.


LPC_AD[0..3]

G108

LPC_AD0_1

EXT_FW H#

GAP-OPEN-PW R

18,29

PCLK_FW H_1

2
GAP-OPEN-PW R

G102
LPC_AD0

PLT_RST#_1

2
GAP-OPEN-PW R

G101

LPC_FRAME#_1

2
GAP-OPEN-PW R

G100
LPC_AD2

LPC_AD1

Boot Device must have ID[3:0] = 0000


Has internal pull-down resistors
All may be left floated
FPET7 Elec. P3-46

18,29 LPC_FRAME#

GAP-OPEN-PW R
LPC_AD3_1
LPC_AD2_1
LPC_AD1_1
LPC_AD0_1
EXT_FW H#_1

2
GAP-OPEN-PW R

G99
LPC_AD3

+3VS_LPC

G104

FOX-GF30

BOTTOM VIEW (B)

EXT_FW H#_1

2
GAP-OPEN-PW R

G103

+3VL

1
R460
1
DY

EXT_FW H#_R

100KR2J-1-GP

+5VS_LPC

+5VS_LPC
DEBUG1

R461
1
DY 2

EXT_FW H#

LPC_GND

GAP-OPEN-PW R

1KR2J-1-GP

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

LAN CONN/Debug
A

CLOSE TO
TRANSFORMER

Size
A3

Document Number

Date:

Thursday, July 09, 2009

Rev

HBU16 1.2
Sheet
E

27

of

41

+3VS_AUD

1
2

1
18

PC_BEEP

BEEPGAIN

61

C_BIAS
PORTC_R
PORTC_L

47
46
45

BIASC
MIC_R
MIC_L

PORTE_R
PORTE_L

44
43

PORTD_R
PORTD_L

38
37

PORTA_R
PORTA_L

36
35

AVEE
FLY_N
FLY_P

30
29
28

GPIO0/EAPD
GPIO1/SPK_MUTE
GPIO2/SPDIF2
DMIC_3/4
DMIC_CLK0
DMIC_1/2
AUXENABLE
AUX_CLK

0630 -1

1
2

1
2

HP_R_OUT_R
HP_L_OUT_L
AVEE
FLY_N
FLY_P

CODEC_HPFILT

GAP-CLOSE-PWR
G129
1
2

GAP-CLOSE-PWR
G125
1
2

GAP-CLOSE-PWR
G130
1
2

2 SC2D2U10V3KX-1GP
2 SC2D2U10V3KX-1GP

R595 1
R596 1

MICR_M
MICL_M

2 10R3F-GP
2 10R3F-GP

1
C300
SC1U10V3ZY-6GP

CX20583-11Z-GP

R465 1
R466 1

2 100R2J-2-GP
2 100R2J-2-GP

MICR
MICL
2 3KR2J-2-GP
2 3KR2J-2-GP

HP_OUT_R
HP_OUT_L

BIASC

+5VS
C305
SCD1U16V2ZY-2GP

C623
SC10U10V5ZY-1GP

0630 -1
SPKR_R+_C
SPKR_R-_C

SPKR_LSPKR_L+

R572 1
R584 1

2 0R0603-PAD
2 0R0603-PAD

SPKR_L-_C
SPKR_L+_C

C304

MICR

Close to U32.

C613
SCD1U16V2ZY-2GP

MIC_INT_L

MIC_IN#
MICL
MICR
HP_OUT_L
HP_OUT_R
JACK_DETECT#

SCD1U16V2ZY-2GP

1st: 20.K0320.015
2nd: 20.K0343.015

DY2SCD01U16V2KX-3GP

DY2SCD01U16V2KX-3GP

HP_OUT_L
EC7
HP_OUT_R
SPKR_L-_C
SPKR_L+_C
SPKR_R-_C
SPKR_R+_C

0630 -1
AUD_AGND

C649
C650
C651
C652

1
1
1
1

2
2
2
2

SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP

EC6

2
SCD01U16V2KX-3GP
1 DY2
SC100P50V2JN-3GP
1 DY2
SC100P50V2JN-3GP

AUD_AGND

MIC

AUD_AGND

Close to U32.

RC7
SPKR_L-_C
SPKR_L+_C
SPKR_R-_C
SPKR_R+_C

1
2
3
4

Speaker

8
7
6
5

15,29 CAPS_LED#

SRC100P50V-2-GP

TP91

TP28-75-GP

SPKR_L+_C

TP92

TP28-75-GP

SPKR_R-_C

TP93

TP28-75-GP

SPKR_R+_C

TP94

TP28-75-GP

4
3
2

SPKR_L+_C

1st: 20.D0197.104
2nd: 20.F0984.004
3nd: 20.D0209.104

4
3
2

CAPS_LED#_17
MIC_INT_L

C596
1

SPKR1
ACES-CON4-1-GP-U2

MIC_INT_L

TP96

TP28-75-GP

AUD_AGND

TP95

TP28-75-GP

ACES-CON4-1-GP-U2
MIC1

SC47P50V2JN-3GP

SPKR_L-_C

SPKR_R-_C
SPKR_R+_C
SPKR_L-_C

R543
330R2J-3-GP
1

+5VS

Close to SPKR1.

TP170 TP28-75-GP

CAPS_LED#_17

TP171 TP28-75-GP

TP108 TP28-75-GP

TP109 TP28-75-GP

AUD_AGND

TP114 TP28-75-GP

MIC_IN#

TP111 TP28-75-GP

MICL

TP112 TP28-75-GP

MICR

TP113 TP28-75-GP

HP_OUT_L

TP115 TP28-75-GP

HP_OUT_R

TP116 TP28-75-GP

JACK_DETECT#

TP117 TP28-75-GP

AUD_AGND

TP118 TP28-75-GP

CHG_LED#

TP119 TP28-75-GP

PWR_BD_LED#

TP120 TP28-75-GP

SATA_BD_LED

TP121 TP28-75-GP

GND

TP110 TP28-75-GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

AUD_AGND

+5VALW

Wistron Corporation
1st: 20.D0197.104
2nd: 20.F0984.004
3nd: 20.F0689.004

Title

AUDIO CODEC CX20583-11Z


Size
Document Number
Custom
Date:

+5VS

<Core Design>

C653
1DY 2
SC1KP50V2KX-1GP

+5VS

16
ACES-CON15-7-GP
AUD_AGND

1
EC4

R528
10KR2J-3-GP

15
14
13
12
11
10
9
8
7
6
5
4
3
2

29 CHG_LED#
31 PWR_BD_LED#
15 SATA_BD_LED

DY

EC3
MICL

DY

AUD1
17

MLVG0402220NV09BP-GP

2 0R0603-PAD
2 0R0603-PAD

EC48
SCD1U16V2ZY-2GP
DY2

+5VALW

AUD_AGND

R571 1
R570 1

AUD_AGND

+3VS_AUD

C622
SCD1U10V2KX-4GP

SPKR_R+
SPKR_R-

GAP-CLOSE-PWR

TPAD14-GP

AUD_AGND

2
R491
0R2J-2-GPDY

GAP-CLOSE-PWR
G124
1
2

AUD_PC_BEEP
2
SCD1U16V2ZY-2GP

GAP-CLOSE-PWR
G128
1
2

1 R573
2K2R2J-2-GP

1
2

GAP-CLOSE-PWR
G123
1
2

AUD_AGND

EC2
1

BAT54CPT-GP

1st: 83.R2003.E81
2nd: 83.BAT54.081
3nd: 83.00054.Q81

SB_SPKR_C

+3VS

EC13

+3VS_AUD

C606
3

2
5K11R2F-L1-GP

MIC_INT_L

D36

1
R154

KBC_MUTE#_R

R593
100KR2J-1-GP

SB_SPKR

1
R158

MIC_IN#
2
10KR2F-2-GP

0703 -1

0709 -1

19

JACK_DETECT#
2
39K2R2F-L-GP

R162 1
R166 1

2
1
R479
0R0402-PAD

KBC_MUTE#

AUD_AGND

TP72

GAP-CLOSE-PWR
G127
1
2

GAP-CLOSE-PWR

C289 1
C286 1

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
EP_GND
15
16
17
31
32
33
34
48
49
64
65

RIGHT-

RIGHT+
24

LEFT+

LEFT-

22

21

14

HPFILT

R167

DY 47KR2J-2-GP

19

AUD_AGND

50

+3VS

EXT_MUTE

AUD_GPIO1

1
R155

SPDIF/BEEPGAIN

60
59
58

GAP-CLOSE-PWR
G122
1
2

MIC_INT_L

1
2
C647
SC4D7U10V3KX-GP

AUD_EAPD#
AUD_GPIO1
AUD_GPIO2

1
2

BIASB

AUD_PC_BEEP

G126
2

C643

+3VS
INT_MIC_L

53
52
51

26
1

2
1
2
1
2
25

20

23
RPWR_5_0

40

41

LPWR_5_0

AVDD_5V

42
FILT_1_65

AVDD_3_3

CLASSDREF

55
54

PORTB_R
PORTB_L
B_BIAS

AUD_GPIO2

PORTF_R
PORTF_L

C642

AUDIO_SENSE

DIB_P
DIB_N

3
4
5

57
56

63
62

AUD_AGND

DY DY

SENSE_A
SENSE_B

AMOM_DIPP
AMOM_DIPN

R161
10KR2J-3-GP

AUD_AGND

C641

TP192
TPAD14-GP

1
2
R582
100KR2J-1-GP

7
2
6
11
27
39
FILT_1_8
VAUX_3_3
VAUX_3_3
VDD_IO
DVDD_3_3
AVDD_HP

1
2

HDA_SDATAIN0_CODEC
HDA_SDOUT_CODEC

TP39
TP40

C640

1
2
R152 33R2J-2-GP

DY-MODEM AMOM_DIPN

1
2

1
2

1
1
2

BIT_CLK
SYNC
SDATA_IN
SDATA_OUT

KBC_BEEP

AUD_AGND

1
C639
SCD1U10V2KX-4GP

SC10U10V5ZY-1GP

RESET#

29

1
2
EC59
SCD1U50V3ZY-GP

Place bypass caps very close to device.

SC10U10V5ZY-1GP

U32

9
12
10
8

29

1
2
EC58
SCD1U50V3ZY-GP

2.5A (100mils)

CLASSDREF

13

1
2
EC54
SCD1U50V3ZY-GP

AUD_PWG2

Layout Note: Path from +5VS_AUD to LPWR_5.0 and


RPWR_5.0 must be very low resistance (<0.01 ohms).

SCD1U10V2KX-4GP

SC10U10V5ZY-1GP

AUD_AGND

C624

7,18
7,18
18
7,18

Close to Modem

R165
10KR2J-3-GP

1
2
EC51
SCD1U50V3ZY-GP

DY

29 CODEC5V_EN#

SCD1U10V2KX-4GP

C625
SCD1U10V2KX-4GP

1
2

FILT_1.8V
1

C626

7,18 HDA_RST#_CODEC
HDA_BITCLK_CODEC
HDA_SYNC_CODEC
HDA_SDIN0
HDA_SDOUT_CODEC

1
2
EC41
SCD1U50V3ZY-GP

G121
C627

SC10U10V5ZY-1GP

AUD_AGND

C637

CLASSD_5V

SCD1U10V2KX-4GP

TP71

R569
D1R6F-GP-U

C648
SC1KP50V2KX-1GP

1
DY 2
R583
100KR2J-1-GP

SC10U10V5ZY-1GP

C628

AUD_AGND
Note:
In order for the audio codec to Wake on Jack, the CODEC
VAUX pin (VAUX_3.3, pin2&6) must be powered by a rail
that is not removed unless AC power is removed.

TP70

C638

+3VS

SC1U10V3KX-3GP

SCD1U10V2KX-4GP

AUD_AGND

+5VS_AUD

SCD1U10V2KX-4GP

C629

R581
1MR2J-1-GP

DY

+5VS_AUD

DY

C630
SC10U10V5ZY-1GP

AUD_AGND

+1.5VS

C632
SCD1U10V2KX-4GP

C631
SCD1U10V2KX-4GP

BEEPGAIN

Default gain is -46 dB without populating the


10-Kohm pull-up resistor.

2
+3VS

SPDIF/BEEPGAIN is an input used to set the PC Beep


gain while the device is in reset.

AUD_AGND

2 0R5J-5-GP
Q46
AO3401A-GP

+5VS

C635
SC10U10V5ZY-1GP

AUD_AGND

C636
SCD1U10V2KX-4GP

R568

DY 10KR2J-3-GP

C633

C634

R580 1

AVDD_3.3 pin is output of


internal LDO. Do NOT connect
to external supply.

+3VS_AUD

SC1U10V3KX-3GP

GAIN R568
-46 dB DY
-18 dB Install

SCD1U10V2KX-4GP

+3VS

FILT_1.65V

PC BEEP GAIN CONTROL

Rev

HBU16 1.2

Thursday, July 09, 2009

Sheet
E

28

of

41

4
CAP close to VCC-GND pin pair

2
80

VREF

19,23,26 PCIE_W AKE#


R384
48D7KR2F-GP

ADP_LIMIT
GPIO92
AIRLINE_VOLT_RC
DY 2PCIE_L_W AKE#

R546

0R2J-2-GP
PCB_VER0
PCB_VER1
PCB_VER2

101
105
106
107

GPI90/AD0
GPI91/AD1
GPI92/AD2
GPI93/AD3
GPIO05
GPIO04

GPI94
GPI95
GPI96
GPI97

LPC

D/A

SCD1U16V2ZY-2GP

C520 1

SCD1U16V2ZY-2GP

23 LAN_PW R_ON
31 PW R_W LAN
30 TP_LED_AMBER#
15,28 CAPS_LED#
34 AD_OFF
32 PM_RSMRST#
19,30,32,38 PM_SLP_S4#
28 CHG_LED#
23 LAN_DSM#
15 CAM_PW R#
15 SIZE_DET0
15 SIZE_DET1
15 EC_BLON
32 USB_PW R_EN#

+3VL_KBC
GPIO30

CODEC5V_EN# 28
PLT_RST# 7,17,23,26,27
CLK_PCI_KBC 16
LPC_FRAME# 18,27

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

KBC_SDA0
KBC_SCL0

ECSCI#_L

KBC_32KX1

18,27

19

X2
X-32D768KHZ-38GPU

TP near KB
connector
R115
20MR3-GP

L_BKLT_EN 7

EC_SW I#

GPIO30

KBC_EAPD#

TPAD14-GP TP36
31 PW R_LED
30 TP_LED_W HITE#
SRN10KJ-5-GP
EC_BLON
3
2
L_BKLT_EN
4
1

64
95
93
94
119
6
109
120
65
66
16
17
20
21
22
23
24
25
26
27
28
73
74
75
110

GPIO01/TB2
GPIO03
GPIO06
GPIO07
GPIO23
GPIO24
GPIO30
GPIO31
GPIO32/D_PWM
GPIO33/H_PWM
GPIO40/F_PWM
GPIO42/TCK
GPIO43/TMS
GPIO44/TDI
GPIO45/E_PWM
GPIO46/TRST#
GPIO47
GPIO50/TDO
GPIO51
GPIO52/RDY#
GPIO53
GPIO70
GPIO71
GPIO72
GPO82/TRIS#

GPIO74/SDA2
GPIO73/SCL2
GPIO22/SDA1
GPIO17/SCL1

SMB

+3VS
RN49

GPIO

GPIO66/G_PWM

GPIO77
GPIO76/SHBM
GPIO75
GPIO81

SPI

GPO83/SOUT_CR/BADDR1
GPIO87/SIN_CR
GPO84/BADDR0

SER/IR

NUMLK_LED#

84
83
82
91

SHBM

1
R337

GPIO16

R470 1
SPI_W P#2 31
1
R342

1
R157

DY

KBC_32KX2
2
33KR3-GP

77

KBC_32KX2

79
30

2 10KR2J-3-GP 28 KBC_MUTE#
TPAD14-GP

PW R_S5_EN 37
KBC_VCORF

44

31
31
31
31

C181
SC1U10V3KX-3GP

SPI_SDI
SPI_SDO
SPI_CS#
SPI_SCK

SPI_SDI
SPI_SDO
SPI_CS#
SPI_SCK

1
2
SRN4K7J-8-GP

U22B
KBC_32KX1

+3VS

R374

10KR2J-3-GP

53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33

KCOL1
30
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
KCOL18

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

54
55
56
57
58
59
60
61

30
KROW 1
KROW 2
KROW 3
KROW 4
KROW 5
KROW 6
KROW 7
KROW 8

VCC_POR#

85

2 OF 2

32KX1/32KCLKIN

KBSOUT0/JENK#
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KBSOUT4/JEN0#
KBSOUT5/TDO
KBSOUT6/RDY#
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
GPIO60/KBSOUT16
GPIO57/KBSOUT17

210KR2J-3-GP

2 GND connect
at one point

+3VL

26

22

E51_TxD 26
E51_RxD 26

114
14
15

4K7R2J-2-GP

2 PM_RSMRST#
10KR2J-3-GP

X3_1 1
2
R118
SC15P50V2JN-2-GP

32.768Khz 12.5pf 10ppm


1st: 82.30001.691 (KDS)
2nd: 82.30001.861 (EPSON)

22

W IFI_RF_EN

111
113
112

TP22

KBC_GPIO14

19 PW RBTN#_SB
23 DSM_ISOLATE#
28 KBC_BEEP
15 SATA_LED
15 BRIGHTNESS

31
30
30
30

+3VALW

1
R104

1
C192

4
3

2
4K7R2J-2-GP

AGND

AD_OFF

E51_TxD

1
R369

24
24
33,34
33,34

103

10KR2J-3-GP
W PCE773LA0DG-GP

GPIO16
GPIO34
GPIO36

VCORF
GND
GND
GND
GND
GND
GND

DY

81

BT_EN#

116
89
78
45
18
5

KBC_SDA1
KBC_SCL1
KBC_SDA0
KBC_SCL0

KBC_SDA1
KBC_SCL1

SIRQ

SP

RN51

R344

68
67
69
70

2
1

SC15P50V2JN-2-GP

SIRQ
19
PM_CLKRUN#
KBRCIN# 18
KA20GATE 18

3
4

SRN4K7J-8-GP
C193

LPC_AD[0..3]

1
2
R575
10KR2J-3-GP

PM_SLP_S3#
KBC_PW R_BTN#
AD_IN#
LID_CLOSE#
TSATN#_KBC
BT_DET#

+3VL_KBC

CAP near ADC


124
7
2
3
126
127
128
1
125
8
122
121
29
9
123

3
19,23,24,32,38,39,40
31
32,33
15,31
7
22

BT_TH#

RN50

GPIO10/LPCPD#
LRESET#
LCLK
LFRAME#
LAD0
LAD1
LAD2
LAD3
SERIRQ
GPIO11/CLKRUN#
KBRST#
GA20
ECSCI#/GPIO54
GPIO65/SMI#
GPIO67/PWUREQ#

A/D

C527 1

97
98
99
100
108
96

100KR2J-1-GP

R364
1
10KR2J-3-GP

33 AIRLINE_VOLT

1 OF 2

AD_IA
TP32

AIRLINE_VOLT_RC

33
TPAD14-GP

1
R333

0701 -1

AD_IA

C219
SC10U10V5ZY-1GP

DY

GPIO41

102

4
VDD

VCC
VCC
VCC
VCC
VCC
104

AVCC

115
88
76
46
19

1
2

U22A

C517
SCD1U16V2ZY-2GP
R377
0R0402-PAD

+3VL

1
R566
0R0805-PAD

32,34

BT_TH#

2
1N4148W -1-GP

C529
SCD1U16V2ZY-2GP

SC2D2U10V3KX-1GP

D11

1
2
R385
140KR2F-1-GP

R350
R358
R366

1
1
1

W IRELESS_BTN#
TP_BTN#
TDATA_5
TCLK_5

2
2 33R2J-2-GP
2 33R2J-2-GP
33R2J-2-GP

32KX2
GPIO55/CLKOUT

63
117
31
32
118
62

GPIO14/TB1
GPIO20/TA2
GPIO56/TA1
GPIO15/A_PWM
GPIO21/B_PWM
GPIO13/C_PWM

13
12
11
10
71
72

GPIO12/PSDAT3
GPIO25/PSCLK3
GPIO27/PSDAT2
GPIO26/PSCLK2
GPIO35/PSDAT1
GPIO37/PSCLK1

86
87
90
92

SPI_SDO_C
SPI_CS#_C
SPI_SCK_C

F_SDI
F_SDO
F_CS0#
F_SCK

KBC

PS/2

FIU

2 LID_CLOSE#
10KR2J-3-GP

KCOL[1..18]

B
KROW [1..8]

+3VL_KBC

1
R343

10KR2J-3-GP
+3VL_KBC

EC_RST# 24

W PCE773LA0DG-GP

DY

2
10KR2J-3-GP

R368
D7
ECSCI#_L

1SS355PT-GP
A EC_SCI#
EC_SW I#

2
100KR2J-1-GP

+3VS

2
100KR2J-1-GP

+3VALW

R101

<Core Design>
EC_SCI#

R362
10KR2J-3-GP

19

Wistron Corporation

EC_SW I# 19

R361
10KR2J-3-GP

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

KBC WPCE773L

DY

KBC_GPIO14 1
R316

Planar
ID[2,1,0]
SA: 0,0,0
SB: 0,0,1
SC: 0,1,0
-1: 0,1,0

1
R363
10KR2J-3-GP

DY

R345
10KR2J-3-GP

R346
10KR2J-3-GP

R347
10KR2J-3-GP

DY
PCB_VER0
PCB_VER1
PCB_VER2

+3VL_KBC

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

LIMIT_SIGNAL

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SC2D2U10V3KX-1GP

C241

DY

C498

C510

C508

C504

C519

+3VL_KBC

+3VL_KBC

3D3V_KBC_AUX_VCC

0703 -1

0703 -1

L5
1
2
FCM1608KF-2-GP-U

C196

3
+3VS

5
+3VL_KBC

Size
A3

Document Number

Date:

Thursday, July 09, 2009

Rev

HBU16 1.2
Sheet
29
1

1
of

41

Internal KeyBoard Connector

TouchPad Connector
KB1

27

+3VS

4
3

RN26
SRN10KJ-11-GP-U

1
2

C159
SCD1U16V2ZY-2GP

C164 1
C161 1

TPAD1

1st: 20.K0320.010
2nd: 20.K0343.010

2 SC33P50V2JN-3GP
2 SC33P50V2JN-3GP

+3VS

12
10
9
8
7
6
5
4
3
2

TDATA_5
TCLK_5
TP_LED_AMBER#
TP_LED_W HITE#
TP_ON/OFF

29
29

R299
10KR2J-3-GP

TP_LED_AMBER# 29
TP_LED_W HITE# 29

+5VS

1
11

TP_BTN# 29
C481
DY SC1KP50V2KX-1GP

C617

2
BAV99W -1-GP

SCD1U16V2ZY-2GP

1st: 20.K0345.026
2nd: 20.K0201.026
GND
GND

1
1

+5V_TP

TP83

TP28-75-GP

TDATA_5

TP84

TP28-75-GP

TCLK_5

TP85

TP28-75-GP

GND

TP106 TP28-75-GP

TP_LED_AMBER#

TP86

TP28-75-GP

TP_LED_W HITE#

TP87

TP28-75-GP

GND

TP107 TP28-75-GP

TP_ON/OFF

TP88

TP28-75-GP

+5VS

TP89

TP28-75-GP

GND

TP90

TP28-75-GP

TP185 TP28-75-GP
TP186 TP28-75-GP

+5V_TP

1
R529
0R0603-PAD
+5VALW

+5V_TP

+5VALW

TP_SLP_S4

BAV99S-GP
Q32
PM_SLP_S4#

.
.
. .

19,29,32,38

DY

Q31
AO3403-GP

DY C597
SCD1U16V2ZY-2GP

DY

DY

R518
DY 100KR2J-1-GP

R520
100KR2J-1-GP

Please populate close TPAD1


2

DY

C598

TCLK_5

SC1U10V3KX-3GP

D6

ACES-CON26-7GP

TDATA_5

R297
100R2J-2-GP

EC15
SCD1U16V2ZY-2GP

28
2

C271
SCD1U16V2ZY-2GP

DY

C160
SC1U10V3ZY-6GP

+5V_TP

ACES-CON10-11-GP

D28

TP_ON/OFF

TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP

MATRIXID2#

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

TP143
TP144
TP145
TP146
TP147
TP148
TP149
TP150
TP151
TP152
TP153
TP154
TP155
TP156
TP157
TP158
TP159
TP160
TP161
TP162
TP163
TP164
TP165
TP166
TP167

MATRIXID1#

TP142 TP28-75-GP

Jap

Eur

US

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

KROW 8
KROW 7
KCOL10
KROW 5
KROW 6
KCOL1
KROW 3
KROW 4
KCOL6
KCOL2
KROW 1
KCOL3
KCOL5
KCOL8
KCOL9
KCOL7
KCOL4
KCOL13
KCOL14
KCOL15
KCOL12
KCOL11
KCOL16
KCOL17
KCOL18

Keyboard matrix ( from vendor )

KROW 2

29 KCOL[1..18]

+5V_TP

29 KROW [1..8]

TP_SLP_S4_C

DY

1 DY
2
R519
10KR2J-3-GP

1
2
C599
SCD1U16V2ZY-2GP

for EMI

2N7002E-1-GP

8
7
6
5

KCOL14
KCOL13
KCOL4
KCOL7

RC6
SRC100P50V-2-GP

1
2
3
4

RC5
SRC100P50V-2-GP

1
2
3
4

RC3
SRC100P50V-2-GP

for EMI
KCOL10
KROW 7
KROW 8
KROW 2

KROW 3
KCOL1
KROW 6
KROW 5

8
7
6
5

8
7
6
5

<Core Design>

1
2
3
4

RC1
SRC100P50V-2-GP

RC2
SRC100P50V-2-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

1
2
3
4

1
2
3
4

1
2
3
4

RC4
SRC100P50V-2-GP

KCOL16
KCOL11
KCOL12
KCOL15

8
7
6
5

KROW 1
KCOL2
KCOL6
KROW 4

8
7
6
5

8
7
6
5

KCOL9
KCOL8
KCOL5
KCOL3

Title

KeyBoard-CONN
for EMI

Size
A3

Document Number

Date:

Thursday, July 09, 2009

Rev

HBU16 1.2
Sheet

30

of

41

E
+3VL_KBC

SPI_W P#2

SPI_W P#2_C

1
2
3
4

CS#
DO
WP#
GND

E
SPI_HOLD#_2 1

1KR2J-1-GP

29

PW R_LED
PDTC124EU-1-GP
Q26

C524
SCD1U16V2ZY-2GP

W 25X16VSSIG-GP
R394
10KR2J-3-GP

SPI_SDO

29 SPI_SDO

2M Flash ROM
1st: 72.25X16.A01
2nd: 72.25165.A01

SPI_SCK

29 SPI_SCK

DY

SPI_W P#2

VCC
HOLD#
CLK
DIO

8
7
6
5

28

R376

1
SPI_CS#
SPI_SDI_C
2
33R2J-2-GP

R370

PW R_BD_LED#

U25

R1

29

SPI_CS#
SPI_SDI

1
2
R392
1KR2J-1-GP

R2

29
29

2
R393
10KR2J-3-GP
4

PDTC124EU-1-GP
Q21

R1

G120
GAP-OPEN
1
2

R2

+3VL_KBC

28

PW R_BD_LED#

19 SB_PW R_LED

+5VALW

COVER SWITCH

LID_CLOSE#

15,29

LID_CLOSE#

ACES-CON10-11-GP

TP75

TP28-75-GP

PW R_BT#

TP76

TP28-75-GP

W LAN_AMBER

TP77

TP28-75-GP

W LAN_W HITE#

TP78

TP28-75-GP

W LAN_BT#

TP79

TP28-75-GP

LID_CLOSE#

TP80

TP28-75-GP

C532
SCD1U16V2ZY-2GP

GND

TP81

TP28-75-GP

GND

TP82

TP28-75-GP

+3VL

TP184 TP28-75-GP

1st: 20.K0320.010
2nd: 20.K0343.010

TP28-75-GP

R192
100KR2J-1-GP

TP28-75-GP

TP74

W L_LED#

+3VS

U64

22

BT_LED

Q18

E
W LAN_LED#_C

R497
100KR2J-1-GP

+3VL

TP73

DMN66D0LDW -7-GP

W LAN_LED# 26

PDTA124EU-1-GP
R499
100KR2J-1-GP

Please populate close PWR1

+3VS

W L_LED

W L_LED#

2
1

PDTC124EU-1-GP
Q16

PDTC124EU-1-GP
Q17

29

PW R_W LAN

R1

29
R2

W IRELESS_BTN#
C335
DY SC1KP50V2KX-1GP

1
2
100R2J-2-GP

R2

2N7002E-1-GP

R1

R191
W LAN_BT#

W LAN_AMBER

W L_LED#

W LAN_W HITE#

R187
10KR2J-3-GP

WIRELESS SWITCH

WLAN LED DISABLE

.
.
. .

Q28

WLAN LED ENABLE

PW R_BD_LED#
PW R_BT#
W LAN_AMBER
W LAN_W HITE#
W LAN_BT#

+5VS

2
3
4
5
6
7
8
9
10
12

+5VALW

PW R_BD_LED#

11
1

EC11
SCD1U16V2ZY-2GP

PW R1

R2

R1

+5VS
+5VS

EC10
SCD1U16V2ZY-2GP

PW R_W LAN

PW R_W LAN

+3VL

W LAN_BT#
PW R_BT#

2 R372
100R2J-2-GP

KBC_PW R_BTN#

29

<Core Design>

EC9
SCD1U16V2ZY-2GP

PW R_BT#

C531
DY SC1KP50V2KX-1GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

R379
10KR2J-3-GP

POWER SWITCH

D16

C543
SCD1U16V2ZY-2GP

+3VL

BAV99S-GP
Title

FWH and CONN.


A

Size
A3

Document Number

Date:

Thursday, July 09, 2009

Rev

HBU16 1.2
Sheet
E

31

of

41

+3VALW

1
R113

U20

2
3

D35

PM_SLP_S3#

Q10
PM_PW ROK 7,19

PM_RSMRST#

29 PM_RSMRST#

+3VALW

74LVC1G08GW -1-GP

R121

A
1

DY

AK
S

DY
D9
1SS355PT-GP

+3VL

DY

DMN66D0LDW -7-GP

DY

R500
470R2J-2-GP

.
.
. .

DY

PM_SLP_S4

PM_SLP_S3

R503
470R2J-2-GP
1
DY 2
USB_PW R_EN#

0630 -1

U66

+1.05VS
29,34

BT_TH#

0523 SF

DY

R117
2K2R2J-2-GP

DY

PM_SLP_S4# 19,29,30,38

2
DY 1
R506
470R2J-2-GP

DMN66D0LDW -7-GP

+5VS

U27

+3VS

PM_SLP_S3

DY

D10
1SS355PT-GP

Q45
2N7002E-1-GP

A K
D

DY R424
100KR2J-1-GP

PM_SLP_S3

AD_IN#

29,33

+1.5VS

R120
10KR2J-3-GP

DY

D8
1SS355PT-GP

Q44
2N7002E-1-GP

.
. .
.

Discharge Circuit

DY

RSMRST#_SB 19

4K7R2J-2-GP

U65

DY

1SS355PT-GP

R501
470R2J-2-GP
1
DY 2

PMBS3906-GP

GND

19,23,24,29,38,39,40

VCC
A

R77

2
0R0402-PAD

G792_RST#_1
2
10KR2J-3-GP

G792_RST#

24

35 CORE_PW RGD

R505
470R2J-2-GP
1
DY 2

+0.9VS

PM_SLP_S3

U67

PM_SLP_S4

DMN66D0LDW -7-GP

DY

+5V

R502
470R2J-2-GP

DY

PM_SLP_S3

DMN66D0LDW -7-GP

DY

+1.8V

R504
470R2J-2-GP

+5VALW to +5VS Transfer


+3VALW to +3VS Transfer

+5VALW to +5V Transfer

+5VS

G546B2P1 Low active, 1.5A per channel


+5VALW

EC49
SCD1U25V3ZY-1GP

Run Power

+5V

+5VALW

U33

1
RUN_PW R_CTLR

DMN66D0LDW -7-GP

C558
SCD01U50V2KX-1GP

PW M_OC#

DY

1
2
R574
10KR2J-3-GP

29 USB_PW R_EN#

C644

C646
SC10U10V5ZY-1GP

DY

+3VS
<Core Design>
EC56

EC57
SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

DY DY

1st:83.15R03.F3F
2nd:83.15R03.G3F

8
7
6
5

EC43

2
2
1

PM_SLP_S3# 19,23,24,29,38,39,40

K
6

+5VALW

2
1

G
S
S
S

R429
470R2J-2-GP

D34
MMSZ5245BPT-GP

D
D
D
D

PM_SLP_S3

OC1#
OUT1
OUT2
OC2#

G546B2P1UF-GP

8
7
6
5

SI4800BDY-T1
SCD1U25V3ZY-1GP

U28

GND
IN
EN1/EN1#
EN2/EN2#

SCD1U16V2ZY-2GP

RUN_PW R_CTLR

26 RUN_PW R_CTLR

R425
100KR2J-1-GP

1
2
3
4

1
2
3
4

+3VALW

U29

1
2
C612 DY
SCD1U25V3ZY-1GP

U34

DY

SI4800BDY-T1
+3VS

+3VL

C645
SC1U10V3ZY-6GP

R433
330KR2J-L1-GP

8
7
6
5

1
2
3
4

G
S
S
S

1
2
C611 DY
SCD1U25V3ZY-1GP

D
D
D
D

DCBATOUT

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

PWRPLANE
Size
A3

Document Number

Date:

Thursday, July 09, 2009

Rev

HBU16 1.2
Sheet

32

of

41

DCBATOUT

DCBATOUT

1
2

EC53

DY

BAV99W -1-GP

1
2

1
2

1
2

EC52
SCD1U50V3KX-GP

DY

SCD1U50V3KX-GP

DY

EC32

DY

SCD1U50V3ZY-GP

EC31

DY

SCD1U50V3ZY-GP

EC30
SCD1U50V3ZY-GP

EC29
SCD1U50V3ZY-GP

SCD1U50V3ZY-GP

NEAR
AD+_TO_SYS

AO4407A-GP
R200
470KR2J-2-GP

NEAR INPUT AD+

2
1

MAX8731_VCC

U4
SI4800BDY-T1

DHI

SDA

24
23

2 C340

G
S
S
S

SC1U10V3KX-3GP

19

CSIP

18

MAX8731_CSIP

17

MAX8731_CSIN

2 C349
SCD1U25V3KX-GP

1
2

1
L9

MAX8731_LX1

R10

COIL-6D8UH-2-GP

Layout Trace 300mil

D01R2512F-4-GP
C343

C342

C344

C345

EC1

BAT_SENSE

1
R193

2 BT+SENSE
100R2F-L1-GP-U

BT+SENSE

G11

34

C338
SCD01U50V2ZY-1GP

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

1
2
G61
GAP-CLOSE-PW R
Title

CHG_AGND

CHARGER MAX8731ETI

Need Check MAXIM Sming Use MAX8731 or MAX8731A


4

GAP-CLOSE-PWR
1
2

G10
GAP-CLOSE-PWR

G
S
S
S

4
3
2
1
15

GND

FBSA

MAX8731AETI-GP

FBSB

16

29

CCV
CCI
CCS
REF
DAC
GND

C369

C371

SCD1U16V2ZY-2GP

C367

SC1U10V3KX-3GP

C368

SCD01U50V2ZY-1GP

1MAX8731_CCV1

1
2

MAX8731_CCV
6
MAX8731_CCI
5
MAX8731_CCS
4
MAX8731_REF
3
MAX8731_DAC 7
12

2
4K7R2F-GP

SCD01U50V2ZY-1GP

1
2

C375
SCD01U50V2ZY-1GP

SCD1U16V2ZY-2GP

C355

U5
SI4800BDY-T1

2nd:FDS8884(84.8884.A37)

R214
1

R205
10KR2F-2-GP

CSIN
INP

DY

SCD1U50V3ZY-GP

AD_IA

SC10U25V6KX-1GP

29

SC10U25V6KX-1GP

CHG_AGND

SC10U25V6KX-1GP

BATSEL

SC10U25V6KX-1GP

14

D
D
D
D

1
PGND

BT+

CHG_PW R

R1971R3F-GP
MAX8731_LX 1
2
1
2 C352
SC220P50V2JN-3GP
MAX8731_DLO

20

2nd:FDS8884(84.8884.A37)

MAX8731_DHI

DLO

EC38

DY SCD1U50V3KX-GP

2
1SS400PT

SCL
LX

29,34 KBC_SDA0

C4

NEAR KBC POWER

MAX8731_BST 1 R201
2MAX8731_BST1
MAX8731_LDO
0R0603-PAD

C6

10

29,34 KBC_SCL0

25
21

4
3
2
1

BST
LDO
ACOK

CHG_AGND

C7

5
6
7
8

13

CHG_AGND
CHG_AGND

27
26

C5

CSSN
VCC

D19

ACAV_IN

VDD

11

C358
SC1U10V3KX-3GP

5
6
7
8

MAX8731_VDD
C351
SCD1U25V3KX-GP

1
2

ACIN

R204
33R2J-2-GP

28

SCD1U25V3KX-GP

CSSP

SC10U25V6KX-1GP

MAX8731_ACIN

DCIN

SC10U25V6KX-1GP

1
2
+3VL
R579
C372
0R0603-PAD
SCD01U50V2ZY-1GP

22

SC10U25V6KX-1GP

R216
49K9R2F-L-GP

MAX8731_DCIN

CHG_AGND

D
D
D
D

U44

C346
SC1U25V5KX-1GP

R217
383KR3F-GP

CHG_AGND CHG_AGND

2
0R0402-PAD

ASNS

1
R194

PW R_MAX8731

AD+

C361
SCD1U25V3KX-GP

C362
SCD1U25V3KX-GP

DC_IN_D

DMN66D0LDW -7-GP

BT+

8
7
6
5

D
D
D
D

ACAV_IN

MAX8731_CSSN

2
100KR2J-1-GP

MAX8731_CSSP

R182
DCIN_GATE2
2
49K9R2F-L-GP

R183
1

U3

G2
GAP-CLOSE-PWR

1
DCIN_GATE1

U7
S
S
S
G

1
2
3
4

AD+

G3
GAP-CLOSE-PWR

EC21
SCD1U25V3ZY-1GP

1
2
R3
D01R2512F-4-GP
G4
GAP-CLOSE-PWR
1
2

AO4407A-GP
R184
10KR2J-3-GP

Layout Trace 300mil

DCBATOUT

Layout Trace 250mil

G6
GAP-CLOSE-PWR
1
2

1
2
3
4

S
S
S
G

G1
GAP-CLOSE-PWR

2N7002E-1-GP

U2

D
D
D
D

G5
GAP-CLOSE-PWR
1
2

8
7
6
5

DY

Layout Trace 250mil

R5
15K4R2F-GP

ACAV_IN

.
.
. .

Adaptor In Soft-Start Circuit

Q3

AD_IN#

C8
SC1U10V3KX-3GP

EC28

DY

DY

R4
10KR2F-2-GP

R6
100KR2J-1-GP

29,32

+3VL

AD<=17V, disable
charger function

R185
100KR2F-L1-GP
MAX8731_LDO
+3VL

29

EC27

DY

SCD1U50V3ZY-GP

AIRLINE_VOLT

EC26
SCD1U50V3KX-GP

1
2
R186
15K4R2F-GP

SCD1U50V3ZY-GP

2
3

SCD1U50V3ZY-GP

2 SCD1U25V3ZY-1GP

SCD1U50V3ZY-GP

C329 1

SCD1U50V3ZY-GP

EC20
SCD1U50V3ZY-GP
D

D15

EC25

EC24

EC23

EC22

AD+

Size
A3

Document Number

Date:

Thursday, July 09, 2009

Rev

Warrior
Sheet
1

1
33

of

41

Adaptor in to generate DCBATOUT


AD+

DCIN1
AD_JK

TP126 TP28-75-GP

LIMIT_SIGNAL

TP127 TP28-75-GP

AD_JK

TP128 TP28-75-GP

AD_JK

TP181 TP28-75-GP

AD_JK

TP183 TP28-75-GP

GND

TP129 TP28-75-GP

AD_OFF#

29

AD_OFF

1
R1
100KR2J-1-GP

E
C

Q2

Q1

2
IN

TP125 TP28-75-GP

2
SCD1U25V3ZY-1GP

PDTA124EU-1-GP

R1

GND

C1

C328
SCD1U50V3ZY-GP

R2

DCIN_LED

1st: 83.P6SBM.AAG
2nd: 83.P6SBM.CAG
(TVS 600W)

8
7
6
5

C2
SC1U50V5ZY-1-GP

1
2

1st: 21.65005.106
2nd: 21.65012.106

D
D
D
D

AO4407A-GP

D33
P6SBMJ24APT-GP

ETY-CON6-8-GP-U

C3
SCD1U50V3ZY-GP

U1
S
S
S
G

2
4K7R2J-2-GP

DCIN_LED

AD+_2
R2
200KR2J-L1-GP
2
1

R181

1
2
3
4

LIMIT_SIGNAL

2
3
4
5
6

AD+

3 OUT

R1

1 GND
R2
DTC114EUA-1-GP

BATTERY CONNECTOR
BT+

BAT1

+3VL

29,32

3
4
SRN100J-3-GP
2
100R2J-2-GP

1
R9

BT_TH#

2
KBC_SCL0

RN56
2
1

29,33 KBC_SDA0
29,33 KBC_SCL0

D2

10
8
7
6
5
4
3
2

BAT_SDA0
BAT_SCL0
BAT_TH#

C614
SCD1U16V2ZY-2GP

1
9
1

2
2

GAP-CLOSE

C16
SCD1U25V3ZY-1GP

FOX-CON8-5-GP-U1
C13
SC1KP50V2KX-1GP

1st: 20.80979.008
2nd: 20.81036.008

BT+SENSE

G12
33

BAV99W -1-GP

+3VL

2
3

KBC_SDA0

D1

C615
SCD1U16V2ZY-2GP

BT+

TP182 TP28-75-GP

BT+

TP130 TP28-75-GP

BT+

TP131 TP28-75-GP

GND

TP132 TP28-75-GP

GND

TP133 TP28-75-GP

BAT_SDA0

TP134 TP28-75-GP

BAT_SCL0

TP135 TP28-75-GP

BAT_TH#

TP136 TP28-75-GP

GND

TP137 TP28-75-GP

1
BAV99W -1-GP

+3VL
D3

3
2

BT_TH#

<Core Design>

C616
SCD1U16V2ZY-2GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
BAV99W -1-GP
Title

AD/BATT CONN
5

Size
A3

Document Number

Date:

Thursday, July 09, 2009

Rev

Warrior
Sheet
1

34

of

41

+5VALW

DCBATOUT_6260_1
G29

1
2
C450
SCD22U10V2KX-1GP

C480
SC1U10V3KX-3GP

CORE_PW RGD

13
1
C182
1

2
SC1KP50V2KX-1GP
2
R96
6K98R2-GP

C177
1
2
SC1KP50V2KX-1GP

6260_DFB

VCC_SENSE

R302
1
2
0R0402-PAD

1
BOOT

VCC

1
2

1
2

1
2

1
2

2
1

G93
GAP-CLOSE-PWR-2U

2
1
2
1

Close to IC

36

C170
SCD1U10V2KX-4GP

6260_AGND

Close to
phase 1
Inductor

2 C171 6260_VO
SC330P50V3KX-GP

<Core Design>

C178
SCD01U50V2ZY-1GP

Wistron Corporation
C179
SC1KP50V2KX-1GP

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

2
4

G94
GAP-CLOSE-PWR-2U

6260_ISEN1_G1

5
6
7
8
D
D
D
D
S
S
S
G

1
2
3
4

R255
NTC-10K-9-GP

Title

ISL6266CCRZ_CPU_CORE(1/2)

6260_AGND

1
2

5
6
7
8
4
3
2
1

4
3
2
1
5
6
7
8
D
D
D
D
S
S
S
G

1
2
3
4
R73
2K94R2F-GP

6260_RTN

1
2
C478
SCD22U10V2KX-1GP
R273
5K11R3F-1-GP

R300
1
2
0R0402-PAD

36

5K36R2F-GP

VSS_SENSE

6260_VO

R75
1KR2F-3-GP

ISL6260CCRZ-T-GP

10KR2F-2-GP

R76

6260_AGND

16

VO
VW

6260_VSUM

R279
10KR2F-2-GP

6260_ISEN2

COMP

R280
10R2F-L-GP

6260_VO

R95
12K7R3F-GP
1
2

6260_ISEN1_G2

R278

CYNTEC 0.36uH
Idc=30A 10*11.5*4
DCR=1.05mOhm

6260_VO

6260_VW

FB

R98

6260_VSUM

VDIFF

2 6260_COMP_R 1
2
C190
68K1R2F-1-GP
SCD022U16V2KX-3GP

C185
SC220P50V2KX-3GP

17

DPRSTP#

6260_OCSET

+VCC_CORE

6260_VSUM

VSUM

RTN

6260_COMP

5
6
7
8

40
PGOOD

39
3V3

CLK_EN#

84.04835.F37
ON4835 POWERPAK
Id=104A, Qg=22~39nc
Rdson=4.3~5mOhm

10

OCSET

6260_FB

6208_LG1

6260_AGND

2 1

R92
1KR2F-3-GP

11

+5VALW

VR_ON
DPRSLPVR

U56
SI7636DP

6260_VDIFF

21

R74

2
C183
SC1800P50V2KX-1GP

37

U16
SI7636DP

4K53R2F-1-GP

Close to
phase 1
Inductor

H_DPRSTP#

25

ISEN3

36

2 VDIFF_C
180R2F-1-GP

38

PWM3

6260_ISEN2

SCD068U10V2KX-1GP

1
R97

36

6260_ISEN2

SCD22U10V2KX-1GP

4,7,18 H_DPRSTP#

35

22

6260A_VR_ON
1KR2J-1-GP
6260_DPRSLPVR
2
499R2F-2-GP
CLK_ENABLE#

ISEN2

1
R301

VID0
VID1
VID2
VID3
VID4
VID5
VID6

1
C167

19 CLK_EN#

SOFT

28
29
30
31
32
33
34

6260_VID0
6260_VID1
6260_VID2
6260_VID3
6260_VID4
6260_VID5
6260_VID6

36

7,19 PM_DPRSLPVR

G33
G32
G31
G30
G34
G35
G36

6260_PW M2

ALL_PW RGD

2
2
2
2
2
2
2

NTC

DFB

H_VID[6..0]

1
1
1
1
1
1
1

6260_PW M2

15

GAP-CLOSE-PW R-2U
GAP-CLOSE-PW R-2U
GAP-CLOSE-PW R-2U
GAP-CLOSE-PW R-2U
GAP-CLOSE-PW R-2U
GAP-CLOSE-PW R-2U
GAP-CLOSE-PW R-2U
1
R296
1
R298
2
0R0402-PAD

6260_SOFT

DROOP

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6

SCD015U50V3KX-GP

26

PWM2

6260_NTC

14

C184

2 R254
NTC-470K-1-GP

VR_TT#

L25
IND-D36UH-9-GP

6208_UG1
6208_PH1

36

RBIAS

6260_DROOP

PMON

VSEN

2 R256
4K02R2F-GP
2

6260_ISEN1

U55
SI7686DP-T1-GP

3 CPU_PROCHOT#_R

6260_ISEN1

1
C168

23

6260_RBIAS

12

ISEN1

6260_VSEN

1
2

C189
SC1U10V3KX-3GP

PSI#

6260_PW M1

EC35

DY

SCD1U50V3KX-GP

6260_AGND

6260_PMON

27

C444
SC10U25V6KX-1GP

U15
SI7686DP-T1-GP

PWM1
6260_PSI#

DY

36

S
S
S
G

R89
1
2
0R0402-PAD
R90
2
10KR2F-2-GP
1
2 R93
6260_AGND
147KR2F-GP

6260_FCCM

S
S
S
G

PSI#

6260_FCCM

C440
SC10U25V6KX-1GP

24

FCCM

C131
SC10U25V6KX-1GP

GND

C143
SC10U25V6KX-1GP

VSS

41

C148
SCD1U50V3KX-GP

19

KBC reset Pin to IMVP PGD_IN(pin 2)


4

ISL6208CRZ-TGP-U

D
D
D
D

6260_AGND

6260_AGND

D
D
D
D

GAP-CLOSE-PW R
G92
1
2
+1.05VS

18

U19
6260_AGND

R94
68R2-GP

6208_PH1
6208_UG1
6208_LG1

7
8
4

DCBATOUT_6260_1

32

84.04841.037
ON4841 POWERPAK
Id=57A, Qg=11.5~17nc
Rdson=9.2~11.4mOhm

GAP-CLOSE-PW R-2U

GAP-CLOSE-PW R

R303
1K91R2F-1-GP

VIN

GAP-CLOSE-PW R
G91
1
2

FCCM

PHASE
UGATE
LGATE

G95

PWM

6260_AGND

20

GAP-CLOSE-PW R
G90
1
2

6260_FCCM

9
3

6260_VDD

GAP-CLOSE-PW R
G89
1
2

6260_PW M1

+3VS
6260_VIN

GAP-CLOSE-PW R
G26
1
2

C479
SCD01U50V2KX-1GP

U58

R295
10R3J-3-GP

GAP-CLOSE-PW R
G27
1
2

C449
SC1U10V3KX-3GP

R294
10R3J-3-GP

GND
GND

+3VALW

1
2
0R0402-PAD

+3.3V_6260

+5VALW

GAP-CLOSE-PW R
G28
1
2

19,37,38,39

0R0402-PAD

R312

6260_AGND

R260
2

DCBATOUT_6260_1

VDD

6260_ISEN1

DCBATOUT

Size
A3

Document Number

Date:

Thursday, July 09, 2009

Rev

HBU16 1.2
Sheet
1

35

of

41

1
2

2
4
3
2
1

1
5
6
7
8

5
6
7
8

C61
SC10U25V6KX-1GP

4
3
2
1

C60
SC10U25V6KX-1GP

6260_VSUM

35 6260_ISEN2

6260_ISEN2

6260_VO
35

GAP-CLOSE-PW R
G86
1
2

6260_ISEN1

1
2

1
2

TC16

DY

TC4

2
1

+VCC_CORE

2
35 6260_VSUM

DY

TC3
SE330U2VDM-L-GP

R289
5K11R3F-1-GP

35

GAP-CLOSE-PW R
G79
1
2

TC5

1
2
C477
SCD22U10V2KX-1GP

SE330U2VDM-L-GP

10KR2F-2-GP

SE330U2VDM-L-GP

GAP-CLOSE-PW R
G80
1
2

1
2
2

6208_LG2

GAP-CLOSE-PW R
G81
1
2

TC17

R275
10KR2F-2-GP

TC6

DCBATOUT_6260_2

R290

G82

6260_ISEN2_G2
R286
10R2F-L-GP

DCBATOUT

G88
GAP-CLOSE-PW R-2U

2
1
6260_ISEN2_G1

U51
SI7636DP

G85
GAP-CLOSE-PWR-2U

5
6
7
8
D
D
D
D
S
S
S
G

U14
SI7636DP

1
2
3
4

ISL6208CRZ-TGP-U

5
6
7
8

84.04835.F37
ON4835 POWERPAK
Id=104A, Qg=22~39nc
Rdson=4.3~5mOhm

6208_PH2

D
D
D
D

FCCM

6208_PH2
6208_UG2
6208_LG2

S
S
S
G

7
8
4

GND
GND

6260_FCCM

PHASE
UGATE
LGATE

9
3

35 6260_FCCM

PWM

+VCC_CORE

SE330U2VDM-6-GP

CYNTEC 0.36uH
Idc=30A 10*11.5*4
DCR=1.05mOhm

SE330U2VDM-L-GP

6260_PW M2

L20
IND-D36UH-9-GP

SE330U2VDM-L-GP

35 6260_PW M2

6208_UG2

1
2
3
4

VCC

U52

BOOT

C415
SC1U10V3KX-3GP

2
1

1
1
2
C420
0R0402-PAD SCD22U10V2KX-1GP

C395
SC10U25V6KX-1GP

S
S
S
G

S
S
S
G

R247

U50
SI7686DP-T1-GP

C396
SC10U25V6KX-1GP

SCD1U50V3KX-GP

DY

U13
SI7686DP-T1-GP
+5VALW

C62

D
D
D
D

D
D
D
D

84.04841.037
ON4841 POWERPAK
Id=57A, Qg=11.5~17nc
Rdson=9.2~11.4mOhm

DCBATOUT_6260_2

Panasonic 330uF, 2V
ESR=9m, Iripple=3A

GAP-CLOSE-PW R
G87
1
2
GAP-CLOSE-PW R
G84
1
2
B

GAP-CLOSE-PW R
G83
1
2
GAP-CLOSE-PW R

<Core Design>
A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ISL6260CCRZ_CPU_CORE(2/2)

Size
A3

Document Number

Date:

Thursday, July 09, 2009

Rev

HBU16 1.2
Sheet
1

36

of

41

DCBATOUT

1
2
G53
GAP-CLOSE-PW R
1
2
G45
GAP-CLOSE-PW R
1
2
G52
GAP-CLOSE-PW R
1
2
G54
GAP-CLOSE-PW R
1
2
G111
GAP-CLOSE-PW R

10

DRVH2

DRVH1

21

51125_VBST1 1
R471
51125_DRVH1

51125_LL2

11

20

51125_LL1

2 51125_DRVL2
0R0603-PAD

12

19

51125_DRVL1

24

51125_VO1

51125_VFB1

D
D
D
D
51125_VFB2

VO2

VO1

VFB2

VFB1

U38
SI4800BDY-T1

SI4800, SO-8
Id=9A, Qg=8.7~13nC
Rdson=23~30mohm
1

5
6
7
8

51125_DRVL1_L

2
0R0603-PAD

G
S
S
S

EN0

ENTRIP2

51125_SKIPSEL

14

TONSEL

GND

SKIPSEL

VCLK

2 0R2J-2-GP

R487 1

DY

2 0R2J-2-GP

+51125_VREF

C577
SC4D7U10V5ZY-3GP

1
2

+VL

2 0R2J-2-GP

R490 1

DY

2 0R2J-2-GP

+3VL

0630 -1

Close to IC TPS51125
R544
100KR3J-L-GP

51125_ENTRIP

Design Current=6A
OCP design>8A
1
2
G46
GAP-CLOSE-PW R

Q40

1
2
G42
GAP-CLOSE-PW R

2
1
R475
20KR2F-L-GP

ALL_PW RGD 19,35,38,39


C576
SC22U6D3V5MX-2GP

DY

1
2

2 0R0402-PAD

R489 1

R474
30KR2F-GP

DY

51125_ENTRIP1

.
. .
.

Design Current=6A
OCP>8A

R488 1

C571
SC18P50V2JN-1-GP

GAP-CLOSE-PW R

+3VL

R476
100KR2J-1-GP

DY

DY

2 0R0402-PAD

R486 1

Close to IC TPS51125

2 0R2J-2-GP

DY

+51125_VREF

+VL

R485 1

51125_VREG5

R484 1

Sanyo 220uF 6.3V


ESR=25mohm
Iripple=2.4A

DY

3D3V_PW R

VREG3

R473
0R2J-2-GP

G119

51125_VREG3

GAP-CLOSE-PW R
+3VL

TC12
ST220U6D3VDM-20GP

18

G118

25

17

1 2

TPS51125RGER-GP

DY C574
SC18P50V2JN-1-GP

R480
10KR2F-2-GP

51125_ENTRIP1

15

G110

51125_TONSEL

GND

C575

23

VREF

SCD22U10V2KX-1GP

PGOOD
ENTRIP1

13

4
3
2
1

2 51125_EN0
820KR2F-GP
51125_ENTRIP2

5V_PW R

1
R472

VREG5

1
2
3
4

1
+51125_VREF

L6
5V_PW R
1
2
IND-3D3UH-57GP

G
S
S
S

DRVL1

DRVL2

2
SCD1U25V3KX-GP

GAP-CLOSE-PWR-3-GP

51125_VO2

+3VL

LL1

C583

R483

DY R482
0R2J-2-GP

R481
6K65R2F-GP

LL2

C570
51125_VBST1_L
2
0R0603-PAD

C582

22

G
S
S
S

VBST1

4
3
2
1

VBST2

D
D
D
D

1
R478

U35
SI4800BDY-T1

5
6
7
8

8
7
6
5

51125_DRVL2_L

G112
GAP-CLOSE-PWR-3-GP

ST220U6D3VDM-20GP

U36
SI4800BDY-T1

Sanyo 220uF 6.3V


ESR=25mohm
Iripple=2.4A

VIN
1
2
3
4

2 51125_VBST2
0R0603-PAD
51125_DRVH2

L7
3D3V_PW R 1
2
IND-3D3UH-57GP

8
7
6
5

1
2

51125_VIN

51125_VBST2_L
2
1
SCD1U25V3KX-GP
R477

C581

SC10U25V6KX-1GP

G
S
S
S

C572

C569

DCBATOUT_51125_1

SC10U25V6KX-1GP

U30

3D3V_PW R

TC11

C568

DCBATOUT_51125_1

SCD01U50V2KX-1GP

D
D
D
D

SCD01U50V2KX-1GP

U39
SI4800BDY-T1

SCD01U50V2KX-1GP

DY

R578
0R0603-PAD

SC10U25V6KX-1GP

C580
SC10U25V6KX-1GP

C579
SC10U25V6KX-1GP

C578

DCBATOUT_51125_2

G60
GAP-CLOSE-PW R
1
2
G59
GAP-CLOSE-PW R
1
2
G58
GAP-CLOSE-PW R
1
2
G57
GAP-CLOSE-PW R

DCBATOUT_51125_2

16

DCBATOUT

D
D
D
D

DCBATOUT

SI4800, SO-8
Id=9A, Qg=8.7~13nC
Rdson=23~30mohm

G
1
2
G50
GAP-CLOSE-PW R

PW R_S5_EN

29

1
2
G47
GAP-CLOSE-PW R

51125_ENTRIP

200k/CH1
250k/CH2

245k/CH1
305k/CH2
5

<Core Design>

00A AUTOSKIP 00A AUTOSKIP


300k/CH1
375k/CH2

365k/CH1
460k/CH2
4

C589

DY

Wistron Corporation

2N7002E-1-GP

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

R498
160KR2F-GP
Title

TONSEL

VREG5

AUTOSKIP

.
. .
.

VREG3

SC18P50V2JN-1-GP

PWM

1
2
G113
GAP-CLOSE-PW R

Q41

2N7002E-1-GP
51125_ENTRIP2

SKIPSEL

+5VALW

1
2
G48
GAP-CLOSE-PW R

VREF

1
2
G51
GAP-CLOSE-PW R

5V_PW R

Q42

1
2
G41
GAP-CLOSE-PW R

GND

1
2
G49
GAP-CLOSE-PW R

2N7002E-1-GP
R508
160KR2F-GP

DY

.
.
.
.

1
2
G40
GAP-CLOSE-PW R

EC42
SCD1U25V3ZY-1GP

1
2
G39
GAP-CLOSE-PW R

+3VALW

1
2
G44
GAP-CLOSE-PW R

SC18P50V2JN-1-GP

3D3V_PW R

C608

S
1
2
G43
GAP-CLOSE-PW R

TPA51125 +5VALW +3VALW

Size
A3

Document Number

Date:

Thursday, July 09, 2009

HBU16 1.2
Sheet
1

37

Rev

1
of

41

TI TPS51116 for 1D8V and 0D9V

G21

+5VALW

1
R227
5D1R3J-GP

GAP-CLOSE-PW R
G23
1
2

51116_VDD

1 2

R16
D

+5VALW

23

VTTIN

TPS51116_PHS

19

TPS51116_LGT

DL
NC#7

FB

9
+5VALW

VTTS

R21
DY
14KR2F-GP

2
2

1
2

TPS51116_VBST 1

C47
SCD033U50V3KX-1GP

+5VALW

TPS51116_PHS

C29
SCD1U25V3KX-GP

1
2

DY

U6
SI7636DP

ON NTMFS4841 Ultra SO-8


Id=57A, Qg=11.5~17nc
Rdson=9.2~11.4mOhm

GAP-CLOSE-PW R
G64
1
2

2
IND-1D5UH-34-GP

S
S
S
G

R22
DY 10KR2F-2-GP

GAP-CLOSE-PW R
G16
1
2

L10

C26

EC39

DY

SCD1U25V3ZY-1GP

DDR_VREF_S3

1
2
R564
0R0402-PAD

+1.8V

GAP-CLOSE-PW R
G15
1
2

+1.8V_RUN_P

TPS51116_UGT

SCD1U16V2ZY-2GP

TPS51116RGER-GP-U

GAP-CLOSE-PW R
G17
1
2

GAP-CLOSE-PW R
G14
1
2

D
D
D
D

DY

SC18P50V2JN-1-GP
C44

DY
2

REF

25

VCCA

TP51116_REF
1 R20
2
0R0603-PAD
C96
SC1U10V3KX-3GP

VDDQS

+1.8V_RUN_P

18
17

VTT

GND

PGND1
PGND1

TON

24

VSSA

+0.9VP

PGND2

GAP-CLOSE-PW R
G19
1
2

S
S
S
G

+1.8V_RUN_P

ON NTMFS4841 Ultra SO-8


Id=57A, Qg=11.5~17nc
Rdson=9.2~11.4mOhm

D
D
D
D

U11
SI7686DP-T1-GP

1
2

+1.8V_RUN_P
Iomax=12A
OCP>18A
5
6
7
8

20

4
3
2
1

+1.8V_RUN_P

LX

VTTEN

10

G18
+1.8V_RUN_P

EN/PSV

PM_SLP_S3#

21 TPS51116_UGT

2 TPS51116_VBST
0R0603-PAD

PM_SLP_S4#

11

DH

NC#12

22 TPS51116_VBST1

C22

12

15

14
VDDP

ILIM
PGD

R13

BST

C21

8
7
6
5

19,29,30,32
19,23,24,29,32,39,40

13

VDDP

16
ALL_PW RGD

U12

C20

DY

SC10U25V6KX-1GP

DY

10KR2F-2-GP

C38
SC1U10V3KX-3GP

SC10U25V6KX-1GP

19,35,37,39

GAP-CLOSE-PW R

SCD1U50V3KX-GP

TPS51116_VDDP 1
2
R577
0R0603-PAD

R231

DCBATOUT_51116

2
C35

TPS51116_CS

+3VALW

GAP-CLOSE-PW R
G20
1
2

1
SC1KP50V2KX-1GP

DCBATOUT
D

7K68R2F-GP

DCBATOUT_51116
C43
SC1U10V3KX-3GP

4
3
2
1

GAP-CLOSE-PW R
G22
1
2

TC1
SE330U2D5VDM-LGP

GAP-CLOSE-PW R
G63
1
2
GAP-CLOSE-PW R
G65
1
2

Sanyo 330uF 2.5V


ESR=15mOhm

GAP-CLOSE-PW R
G67
1
2

TPS51116_LGT

GAP-CLOSE-PW R
G66
1
2

+1.8V_RUN_P

GAP-CLOSE-PW R
G62
1
2

GAP-CLOSE-PW R

DY

C24
SC10U6D3V5MX-3GP
G24
+0.9VP

+0.9VS

GAP-CLOSE-PW R

2
SC22U6D3V5MX-2GP

2
DY SC10U6D3V5MX-3GP

C31

G25

State

S3

S5

VDDR

VTTREF

VTT

S0

Hi

Hi

On

On

S3

Lo

Hi

On

On

Off(Hi-Z)

S4/S5

Lo

Lo

Off

Off

Off

C39

On
1
C30

1
C40

GAP-CLOSE-PW R

0.9VS
Iomax=1A

2
SCD1U16V2ZY-2GP
2

DY SC10U6D3V5MX-3GP
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

TPS51116 1D8V/0D9V

Size
A3

Document Number

Date:

Thursday, July 09, 2009

Rev

HBU16 1.2
Sheet
1

38

of

41

DCBATOUT

DCBATOUT_SC412A_2

G7

GAP-CLOSE-PW R
DCBATOUT_SC412A_2

G8

GAP-CLOSE-PW R

1
2

77.C3371.13L NEC-TOKIN
330uF 2.5V 6mOhm
Iripple=4.563A

1
2
3
4

TC13
SE330U2VDM-6-GP

UGATE
LGATE

13
9

8209_DRVH
8209_DRVL

5
14

FB
BOOT

PHASE

12

8209_LL

VOUT
PGOOD
GND
PGND
NC#15

3
6
7
8
15

1
2
11

EN/DEM
TON
CS

Close to IC RT8209
+1.05V_VCCP_P
G78
1

+1.05V_VCCP_P
+3VS

RT8209BGQW -GP

GAP-CLOSE-PW R
G69
1
2

+1.05VS

GAP-CLOSE-PW R
G77
1
2

R209
10KR2J-3-GP

ALL_PW RGD 19,35,37,38

C363DY
SCD1U10V2KX-4GP

2
1

S
S
S
G

VDD
VDDP

R408
8K2R2F-1-GP

K
A
D32
1SS355PT-GP

R195
10K2R2F-GP

VCCP_RUN_ON
1
28209_TON
8209_TRIP1
R414
249KR2F-GP

4
10

PM_SLP_S3#

1
C831
SCD1U16V2KX-3GP

EC36

DY

U45

8209_1D8V_VFB
8209_VBST

19,23,24,29,32,38,40

C373

DY
2

5
6
7
8
D
D
D
D

1
1 2
2

8209_V5FILT
C830
SC1U10V2KX-1GP
D24
CH551H-30PT-GP
83.R5003.C8F
8209_VDDP

R415
0R0402-PAD
1
2

2
1

1
2
1

1
2

DY

8209_VBST_LL

1
2
R492
4D7R3F-L-GP

+5VALW
C

R423
10R3F-GP

C347

SCD1U25V3ZY-1GP

C812
SC1U10V2KX-1GP

8209_1D8V_VFB

+1.05V_VCCP_P

SCD1U10V2KX-4GP

R196
4K12R2F-GP

SC33P50V2JN-3GP

U8
SI7636DP

+1.05V_VCCP
Iomax=15A
OCP>20A

CYNTEC 0.82uH 7*7*3


DCR=13mOhm
Idc=13A (68.R8210.10V)
L11
1
2
IND-D47UH-22-GP

R587
0R0603-PAD

+5VALW

2
1

5
6
7
8
4
3
2
1

S
S
S
G

ON NTMFS4841 Ultra SO-8


Id=57A, Qg=11.5~17nc
Rdson=9.2~11.4mOhm

C9
SC10U25V6KX-1GP

U9
SI7686DP-T1-GP

D
D
D
D

GAP-CLOSE-PW R

C10
SC10U25V6KX-1GP

SCD1U50V3KX-GP

C11
G9

GAP-CLOSE-PW R
G75
1
2
GAP-CLOSE-PW R
G73
1
2

GAP-CLOSE-PW R
G70
1
2
GAP-CLOSE-PW R
G76
1
2
GAP-CLOSE-PW R
G74
1
2
GAP-CLOSE-PW R
G71
1
2
GAP-CLOSE-PW R
G72
1
2
GAP-CLOSE-PW R

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

RT8209 +1.05VS
5

Size
A3

Document Number

Date:

Thursday, July 09, 2009

Rev

HBU16 1.2
Sheet
1

39

of

41

+1.8V

R576
0R0603-PAD

1
2

DY

C166
SC10U10V5ZY-1GP

1D5V_LDO

Vo=0.8*(1+(R1/R2))

R79
69K8R2F-GP

SC33P50V2JN-3GP

G972-120ADJF11U-GP

SO-8-P

DY

C172

R78
60K4R2F-GP

TC9
ST100U4VBM-L-GP

C175
SC10U10V5ZY-1GP

5912_FB_1

4
3
2
1

GAP-CLOSE-PW R

SA 1010
VO#4
VO#3
ADJ
GND

VIN
VPP
POK
VEN
GND

GAP-CLOSE-PW R
G37
1
2

5
6
7
8
9

GAP-CLOSE-PW R
G38
1
2

Vo(cal.)=1.5V
U18

PM_SLP_S3#

PM_SLP_S3#

G109

SC10U10V5ZY-1GP

C176
SC10U10V5ZY-1GP

OCP=6A
+1.5VS

19,23,24,29,32,38,39

DY C165

C169
SC1U10V3ZY-6GP
G972_VIN

+5VALW

KEMET NTD:5.615
100uF, 4V, B2 Size
Iripple=1.1A, ESR=70mohm

Trace Length=3cm
Trace Width=5mils
Trace Resistance>80mohm

1st: 74.00972.031(GMT)
2nd: 74.05912.A71(Anpac)

<Core Design>
A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

GMT_1D5V_LDO

Size
A3

Document Number

Date:

Thursday, July 09, 2009

Rev

HBU16 1.2
Sheet
1

40

of

41

1
H20

1
H18

HOLE

H5
HOLE

HOLE

H6

HOLE

H15

HOLE

H14

HOLE

H8

HOLE

H12

H9
HOLE

H13
HOLE

H10

HOLE

H30
HOLE

H29
HOLE

H28
HOLE

HOLE

HOLE

H27

1
6
10
7

H26

HOLE

H25

GEN8

SPR7
SPRING-U3

SPR6
SPRING-58-GP

SPR5
SPRING-6-GP

SPR4
SPRING-31-GP

SPRING-62-GP

SPRING-6-GP

SPR3

H24
HOLE

HOLE

4
5

SPR1

H22

3
9
2

H19

H21
HOLE

HOLE

HOLE

H16
HOLE

H3
HOLE

H2
HOLE

H4
HOLE

H1

SPR1:
SPR3:
SPR4:
SPR5:
SPR6:
SPR7:

34.13B01.001,
34.39S07.003, 34.39S07.101
34.49U24.001,
34.13B01.001,
34.4B312.002, 34.4B312.101
34.40U07.001, 34.40U07.101

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

MISC
A

Size
A3

Document Number

Date:

Tuesday, June 30, 2009

Rev

HBU16 1.2
Sheet
E

41

of

41