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5

Warrior Intel UMA Block Diagram


D

Penryn SV

16

TPS51120

INPUTS

Project code : 91.4H501.001


PCB P/N :07239
Revision : SC
SYSTEM DC/DC

Intel CPU
Clock Generator
ICS9LPRS355

SYSTEM DC/DC

FSB
800/1066MHz
DDRII
Slot 0
667/800
12

Cantiga-GM/GL
AGTL+ CPU I/F

DDRII
667/800

Slot 1

INTEGRATED GRAHPICS

DDR II 667/800 Channel B

LVDS, CRT I/F

13

PCIE

6,7,8,9,10,11

LCD
WXGA+

LVDS(Dual Channel)

DDR I/F

DMIx4

OUTPUTS

+1.8V

+1.5VS

14
CRT
1600X1200@75

RGB CRT
DDRII 667/800 Channel A

INPUTS

+5VALW

DCBATOUT

+3VALW
+3VL

TPS51116

OUTPUTS

INPUTS
41

+0.9VS

DCBATOUT

+1.8V

SC412A

15

HDMI

OUTPUTS

+5VALW

+1.05V

25

MAX8731

C-LINK

RJ45
CONN
27

USB 2.0

INPUTS

OUTPUTS
BT+

DCBATOUT

18V 3.0A
5V 100mA

BLUETOOTH
USB 2.0

PCIE

INPUTS

12 USB 2.0/1.1 ports


ETHERNET (10/100/1000Mb)

SATA

High Definition Audio

OUTPUTS
+VCC_CORE

HDD

DCBATOUT

22

4 SATA ports

RJ11
CONN

ODD

ACPI 1.1
HD AUDIO

22

LPC I/F

PCB LAYER

LPC Bus

28

PCI/PCI BRIDGE
17,18,19,20,21

KBC

MIC IN
INTERNAL MIC

Mini-Card
802.11a/b/g/n

OP AMP
GMT G1431

26

29

WINBOND

SPI

SPI

PCIE+USB 2.0

28

WPCE775L

Flash ROM
64KB
19

Flash ROM
2MB
32

Touch
PAD
31

L1:

Signal 1

L2:

GND

L3:

Signal 2

L4:

Signal 3

L5:

VCC

L6:

Signal 4

30

Thermal
& Fan

Int.
KB

GMT G7921
24

31

om

LINE OUT

HD AUDIO
CODEC
CX20561-14Z

0.844~1.3V
22A
36,37

6 PCIE ports

nf
@
ho
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l.c

<Core Design>

2CH SPEAKER

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Document Number

Date: Friday, January 04, 2008


5

Warrior

Sheet
1

Rev

ai

Block Diagram
Size
A3

he
x

AMOM
MODEM
CX20548-11Z

34

ISL6269CCRZ

USB x 3
22

Realtek
RTL8101-GR
10/100
23

CPU DC/DC

22

ICH9-M

25

40

MAXIM CHARGER

26

INTEL

39

INPUTS

15

Realtek
RTS5158

SYSTEM DC/DC

WEBCAM
SD/MMC
MS/MS Pro/xD

38

SYSTEM DC/DC

APL5912

3,4,5

OUTPUTS

SC
of

42

ICH9M Functional Strap Definitions

ICH9 EDS 642879


Comment

Rev.1.5

page 92

Signal

Usage/When Sampled

HDA_SDOUT

XOR Chain Entrance/


Allows entrance to XOR Chain testing when TP3
PCIE Port Config1 bit1, pulled low. When TP3 not pulled low at rising edge
Rising Edge of PWROK.
of PWROK, sets bit1 of RPC.PC (Cofig Registers:
offset 224h). This signal has weak internal
pull-down.

HDA_SYNC

PCIE config1 bit0,


Rising Edge of PWROK.

This signal has a weak internal pull-down.


Sets bit0 of PRC.PC (Config Registers: Offset
224h).

GNT2#/
GPIO53

PCIE config2 bit2,


Rising Edge of PWROK.

This signal has a weak internal pull-up.


Sets bit2 of PRC.PC2 (Config Registers: Offset
224h).

ICH9 EDS 642879

Cantiga chipset and ICH9M I/O controller


Hub strapping configuration

Rev.1.5

Montevina Platform Design guide 22339 0.5

Resistor Type/Value

Pin Name

Strap Description

CL_CLK[1:0]

PULL-UP 20K

CFG[2:0]

CL_DATA[1:0]

PULL-UP 20K

CL_RST0#

PULL-UP 20K

FSB Frequency Select 000 = FSB1067


011 = FSB667
010 = FSB800
others = Reserved

DPRSLPVR/GPIO16

PULL-DOWN 20K

ENERGY_DETECT

SIGNAL

PULL-UP 20K

Reserved
CFG[4:3]
CFG8
CFG[15:14]
CFG[18:17]

HDA_BIT_CLK

PULL-DOWN 20K

CFG5

DMI x2 Select

HDA_DOCK_EN#/GPIO33

PULL-UP 20K

0 = DMI x2
1 = DMI x4 (Default)

HDA_RST#

PULL-DOWN 20K

CFG6

iTPM Host Interface

0 = The iTPM Host Interface is enabled (Note 2)


1 = The iTPM Host Interface is disabled (default)

HDA_SDIN[3:0]

PULL-DOWN 20K

CFG7

HDA_SDOUT

PULL-DOWN 20K

Intel Management
engine crypto strap

0 = Transport Layer Security (TLS) cipher


suite with no confidentiality
1 = TLS cipher suite with confidentiality(Default)
0 = Reserved Lanes, 15->0, 14->1 ect..
1 = Normal operation (Default): Lane Numbered in
Order

Reserved.

GNT1#/
GPIO51

ESI Strap (Server Only) ESI compatible mode is for server platforms only.
Rising Edge of PWROK.
This signal should not be pulled low for desktop
and mobile.

HDA_SYNC

PULL-DOWN 20K

CFG9

PCIE Graphics Lane

GNT3#/
GPIO55

Top-Block Swap
override. Rising Edge
of PWROK.

Sampled low: Top-Block Swap mode (inverts A16 for


all cycles targeting FWH BIOS space).
Note: Software will not be able to clear the
Top-Swap bit until the system is rebooted
without GNT3# being pulled down.

GLAN_DOCK#

The pull-up or pull-down


active when configured
for native GLAN_DOCK#
functionality and determined
by LAN controller.

CFG10

PCIE Loopback enable 0 = Enable (Note 3)


1 = Disable (Default)

GNT0#:
SPI_CS1#/
GPIO58

Boot BIOS Destination


Selection 0:1.
Rising Edge of PWROK.

Controllable via Boot BIOS Destination bit


(Config Registers: Offset 3410h:bit 11:10).
GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC

GNT[3:0]#/GPIO[55,53,51]

PULL-UP 20K

GPIO20

PULL-DOWN 20K

SPI_MOSI

Integrated TPM Enable, Sample low: the Integrated TPM will be disable.
Rising Edge of CLPWROK. Sample high: the MCH TPM enable strap is sampled
low and the TPM Disable bit is clear, the
Integrated TPM will be enable.

GPIO49

PULL-UP 20K

LDA[3:0]#/FHW[3:0]#

PULL-UP 20K

LAN_RXD[2:0]

PULL-UP 20K

GPIO49

DMI Termination
Voltage. Rising Edge
of CLPWROK.

The signal is required to be low for desktop


applications and required to be high for mobile
applications.

LDRQ[0]

PULL-UP 20K

LDRQ[1]/GPIO23

PULL-UP 20K

PME#

PULL-UP 20K

SATALED#

PCI Express Lane


Reversal. Rising Edge
of PWROK.

Signal has weak internal pull-up. Sets bit 27


of MPC.LR (Device 28: Function 0:Offset D8).

PWRBTN#

PULL-UP 20K

SATALED#

PULL-UP 15K

No Reboot.
Rising Edge of PWROK.

If sampled high, the system is strapped to the


"No Reboot" mode (ICH9 will disable the TCO Timer
system reboot feature). The status is readable
via the NO REBOOT bit.

SPI_CS1#/GPIO58/CLGPIO6

PULL-UP 20K

SPI_MOSI

PULL-DOWN 20K

SPI_MISO

PULL-UP 20K

SPKR

PULL-DOWN 20K

TACH_[3:0]

PULL-UP 20K

TP[3]

PULL-UP 20K

USB[11:0][P,N]

PULL-DOWN 15K

TP3
GPIO33/
HDA_DOCK
_EN#

XOR Chain Entrance.


Rising Edge of PWROK.
Flash Descriptor
Security Override
Strap. Rising Edge of
PWROK.

This signal should not be pull low unless using


XOR Chain testing.
Sampled low: the Flash Descriptor Security will be
overridden. If high, the security measures will be
in effect. This should only be enabled in
manufacturing environments using an external
pull-up resister.

page 218

Configuration

GPIO20

SPKR

This signal should not be pulled high.

ICH9 Integrated pull-up


and pull-down Resistors

CFG[13:12] XOR/ALL

00
10
01
11

CFG16

FSB Dynamic ODT

0 = Dynamic ODT Disabled


1 = Dynamic ODT Enabled (Default)

CFG19

DMI Lane Reversal

0 = Normal operation (Default): Lane Numbered in


Order
1 = Reverse Lanes
DMI x4 mode [MCH->ICH]: (3->0, 2->1, 1->2 and 0->3)
DMI x2 mode [MCH->ICH]: (3->0, 2->1)

CFG20

Digital Display Port 0 = Only Digital Display Port or PCIE is


operational (Default)
(SDVO/DP/iHDMI)
display Port and PCIe are operating
Concurrent with PCIe 1 = Digital
simulataneously via the PEG port

=
=
=
=

SDVO
SDVO Present
0 =
1 =
_CTRLDATA
L_DDC_DATA Local Flat Panel (LFP)
0 =
1 =
Present

Reserve
XOR mode Enabled
ALLZ mode Enable (Note 3)
Disabled (Default)

No SDVO Card Present (Default)


SDVO Card Present
LFP Disabled (Default)
LFP Card Present; PCIE disabled

NOTE:
1. All strap signals are sampled with respect to the leading edge of the (G)MCH
Power OK (PWROK) signal.
2. iTPM can be disabled by a 'Soft-Strap' option in the Flash-decriptor section of
the Firmware. This 'Soft-Strap' is activated only after enabling iTPM via CFG6.
Only one of the CFG10/CFG12/CFG13 straps can be enabled at any time.

SMBus
PCIE Routing page 19
LANE1

LAN

LANE2

MiniCard WLAN

USB Table

page 19

USB

Pair
0
1
2
3
4
5
6
7
8
9
10
11

Device
USB3
FREE
External USB3
FREE
External USB2
FREE
WLAN
BLUETOOTH
CARD_READER
FREE
CAMERA
FREE

Thermal

KBC
BATTERY

MINI

<Core Design>

ICH9M

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Table of Content

Clock
Generator

Size
A3

Document Number

Date: Friday, January 04, 2008

Rev

SC

Warrior
Sheet

of

42

H_A#[35..3]

H_REQ#0 K3
H_REQ#1 H2
H_REQ#2 K2
H_REQ#3 J3
H_REQ#4 L1

H_ADSTB#1

Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1

H_A20M#
H_FERR#
H_IGNNE#

A6
A5
C4

A20M#
FERR#
IGNNE#

D5
C6
B4
A3

STPCLK#
LINT0
LINT1
SMI#

H_STPCLK#
18
H_INTR
18
H_NMI
18
H_SMI#

TPAD30

TP4
TP6
TP8
TP7
TP9
TP10
TP15
TP1
TP14
TP5
TP13

RSVD_CPU_1
RSVD_CPU_2
RSVD_CPU_3
RSVD_CPU_4
RSVD_CPU_5
RSVD_CPU_6
RSVD_CPU_7
RSVD_CPU_8
RSVD_CPU_9
RSVD_CPU_10
RSVD_CPU_11

M4
N5
T2
V3
B2
C3
D2
D22
D3
F6
B1

+1.05VS

CONTROL

H_DEFER# 6
H_DRDY# 6
H_DBSY# 6

H_BREQ#0 6
56R2J-4-GP
2 R32 +1.05VS
D20 CPU_IERR# 1
B3
H_INIT#
18

DY

R69
51R2F-2-GP

IERR#
INIT#

F1

LOCK#

H4

RESET#
RS0#
RS1#
RS2#
TRDY#

C1
F3
F4
G3
G2

HIT#
HITM#

G6
E4

BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#

H_LOCK#

H_CPURST#
H_RS#[2..0]

H_RS#0
H_RS#1
H_RS#2

H_CPURST# 6
6

H_TRDY# 6
H_HIT#
H_HITM#

6
6

XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_DBRESET#_R

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20

H_THERMDA, H_THERMDC routing together,


Trace width / Spacing = 10 / 10 mil
Connect to V Core
4/23 Houston
CPU_PROCHOT#_R

THERMAL
PROCHOT#
THRMDA
THRMDC
THERMTRIP#

HCLK

RSVD#M4
RSVD#N5
RSVD#T2
RSVD#V3
RSVD#B2
RSVD#C3
RSVD#D2
RSVD#D22
RSVD#D3
RSVD#F6

BCLK0
BCLK1

R31

D21
A24
B25

68R2-GP

36

+1.05VS
H_THERMDA 24
H_THERMDC 24

C7

PM_THRMTRIP-A# 7,18

A22
A21

ITP Connector

CLK_CPU_BCLK 16
CLK_CPU_BCLK# 16
PM_THRMTRIP#
should connect to
ICH9 and MCH
without T-ing
( No stub)

+1.05VS

C472
2

DY

SCD1U16V2KX-3GP

R293

DY
ITP1
29
1

+1.05VS

KEY_NC

ITP_VDD

BGA479-SKT6-GPU4

62.10079.001

H_CPURST#
+3VS
R287
XDP_DBRESET#_R

1
R292

DY

2 H_RESET#_R
1KR2J-1-GP

16 CLK_CPU_XDP#
XDP_TMS

30
2

3
5
7
9
11
13
15
17
19
21
23
25
27

2
31

+1.05VS

R277
XDP_DBRESET#_R 1
XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_TCK

4
6
8
10
12
14
16
18
20
22
24
26
28
32

XDP_TDO_R 1
XDP_TCK
XDP_TRST#
XDP_TDI

2 0R2J-2-GP

DY
1
1
1

DY

DY
DY
DY

XDP_DBRESET#

2 R284
2 R283
2 R282

XDP_DBRESET# 19

0R2J-2-GP
0R2J-2-GP
0R2J-2-GP

MCH_CLKSEL2 7,16
MCH_CLKSEL1 7,16
MCH_CLKSEL0 7,16

CLK_CPU_XDP 16

2 R281 0R2J-2-GP XDP_TDO

1KR2J-1-GP
MLX-CONN28A-4-GP

+1.05VS

DY
XDP_TDI

R66

54D9R2F-L1-GP

XDP_TMS

R63

54D9R2F-L1-GP

XDP_TDO

R65

54D9R2F-L1-GP

XDP_BPM#5

R64

54D9R2F-L1-GP

(Place
<Core Design>

R310 with in 200ps (~1") to CPU

om

TEST7

TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30

H5
F21
E1

6
6
6

nf
@
ho
tm
ai
l.c

18

A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#
ADSTB1#

ICH

18
18
18

H_ADS#
H_BNR#
H_BPRI#

Wistron Corporation
XDP_TRST#

R71

54D9R2F-L1-GP

XDP_TCK

R72

54D9R2F-L1-GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

CPU (1 of 2)
Size

Document Number

Warrior
Date: Monday, January 07, 2008

Rev

ai

BR0#

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#

ADDR GROUP 1

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

DEFER#
DRDY#
DBSY#

XDP/ITP SIGNALS

H_ADSTB#0
H_REQ#[4..0]

ADS#
BNR#
BPRI#

H1
E2
G5

RESERVED

6
6

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
ADSTB0#

ADDR GROUP 0

J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1

Reserve for ITP, when


install ITP connector,
install R2.

U54A 1 OF 4
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

he
x

H_A#[35..3]

0R2J-2-GP
2
1

Sheet

SC
of

42

2
H_DINV#[3..0]
H_DSTBN#[3..0]
H_DSTBP#[3..0]
H_D#[63..0]

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

H_D#[63..0]

H_D#16 N22
H_D#17 K25
H_D#18 P26
H_D#19 R23
H_D#20 L23
H_D#21 M24
H_D#22 L22
H_D#23 M23
H_D#24 P25
H_D#25 P23
H_D#26 P22
H_D#27 T24
H_D#28 R24
H_D#29 L25
H_D#30 T25
H_D#31 N25
L26
M26
N24

D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
DSTBN1#
DSTBP1#
DINV1#

6 H_DSTBN#0
6 H_DSTBP#0
6 H_DINV#0

C
Layout notes
Z= 55 Ohm 0.5" MAX for GTLREF

+1.05VS
6
6
6

1KR2F-3-GP
R19

H_DSTBN#1
H_DSTBP#1
H_DINV#1

AD26
C23
D25
C24
AF26
CPU_TEST5 AF1
A26

TEST1
TEST2
CPU_TEST3

1 1

CPU_GTLREF0

R18
2KR2F-3-GP

C46
SC1KP50V2KX-1GP

DY

16
16
16

B22
B23
C21

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6

DATA GRP3

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
DSTBN0#
DSTBP0#
DINV0#

DATA GRP1

E22
F24
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25

DATA GRP0

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

DATA GRP2

U54B 2 OF 4

MISC

BSEL0
BSEL1
BSEL2

D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
DSTBN2#
DSTBP2#
DINV2#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47

D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN3#
DSTBP3#
DINV3#

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

COMP0
COMP1
COMP2
COMP3

R26
U26
AA1
Y1

DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#

E5
B5
D24
D6
D7
AE6

H_DSTBN#2 6
H_DSTBP#2 6
H_DINV#2 6

H_DSTBN#3 6
H_DSTBP#3 6
H_DINV#3 6
COMP0
COMP1
COMP2
COMP3

R23 1
R24 1
R67 1
R68 1

2
2
2
2

27D4R2F-L1-GP
54D9R2F-L1-GP
27D4R2F-L1-GP
54D9R2F-L1-GP

H_DPRSTP# 7,18,36
H_DPSLP# 18
H_DPWR# 6
H_PWRGD 18
H_CPUSLP# 6
PSI#
36
Connect to V Core

R25
1KR2J-1-GP

BGA479-SKT6-GPU4
R70
1KR2J-1-GP

DY

1
R228

DY

TEST1
1KR2J-1-GP

TEST2
1KR2J-1-GP

Layout Note:
Comp0, 2 connect with Zo=27.4 ohm, make
trace length shorter than 0.5" .
Comp1, 3 connect with Zo=55 ohm, make
trace length shorter than 0.5" .

1
R26

DY DY

Route the TEST3 and TEST5 signals through


a ground referenced Zo = 55-ohm trace
that ends in a via that is near a GND via
and is accessible through an oscilloscope connection.

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CPU (3 of 2 )
Size

Document Number

Rev

Warrior
Date: Monday, January 07, 2008

SC

Sheet

of

42

+VCC_CORE

C77
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

C97

C128
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

C147

DY

1
2

C104

DY

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

Please these inside socket


cavity on L8(North side Primary)

C93

DY
2

C83

VID0
VID1
VID2
VID3
VID4
VID5
VID6

AD6
AF5
AE5
AF4
AE3
AF3
AE2

VCCSENSE

AF7

VCC_SENSE 36

VSSSENSE

AE7

VSS_SENSE 36

1
2

C133

Please these inside socket


cavity on L8(South side Primary)

+VCC_CORE

1
2

1
2

1
2

1
2

1
2

1
2

2
Connect to V Core

Layout Note:
VCCSENSE and VSSSENSE lines
should be of equal length.

CPU_GND1
TP11
B

NCTF PIN
CPU_GND2
CPU_GND3

CPU_GND4
TP43

C70
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CPU (3 of 3 )
Size

Document Number

Rev

Warrior
Date: Monday, January 07, 2008
5

TP44
TP12

om

C68

C146

C69

C144

C145
SCD1U10V2KX-4GP

Please these inside socket


cavity on L8(North side Secondary)

+1.05VS

BGA479-SKT6-GPU4

Layout Note:
Provide a test point (with
no stub) to connect a
differential probe
between VCCSENSE and
VSSSENSE at the location
where the two 54.9ohm
resistors terminate the
55 ohm transmission line.

R57

SCD01U16V2KX-3GP

SC10U6D3V5MX-3GP

Layout Note:
Place as close as possible to the CPU VCCA pin.

100R2F-L1-GP-U

0R3-0-U-GP

R56

100R2F-L1-GP-U

C82
SC22U6D3V5MX-2GP

C381

C92
SC22U6D3V5MX-2GP

+VCC_CORE

C383

C103
SC22U6D3V5MX-2GP

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6

36

C113

DY

SC22U6D3V5MX-2GP

H_VID[6..0]

R225

C125
SC22U6D3V5MX-2GP

+1.5VS
+1.5V_VCCA_S0

C132
SC22U6D3V5MX-2GP

layout note: "1D5V_VCCA_S0"


as short as possible

TC14
ST220U2D5VBM-LGP

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

nf
@
ho
tm
ai
l.c

VCCA
VCCA

B26
C26

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

C422

SC22U6D3V5MX-2GP

C430

SC22U6D3V5MX-2GP

C126

SC22U6D3V5MX-2GP

C114

SC22U6D3V5MX-2GP

+1.05VS

C436

SC22U6D3V5MX-2GP

Please these outside socket


cavity on L8(South side Secondary)

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

SC

ai

1
2

1
2

C434
SC22U6D3V5MX-2GP

C425
SC22U6D3V5MX-2GP

+VCC_CORE

C416
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

C441

4 OF 4

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

he
x

1
2

1
2

1
2

A4
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3

+VCC_CORE
C414

VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP

BGA479-SKT6-GPU4

U54D

+VCC_CORE
C404
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

DY

C409

+VCC_CORE

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

SC22U6D3V5MX-2GP

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

SC22U6D3V5MX-2GP

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

C417

Please these inside socket cavity on L8(South side Secondary)

U54C 3 OF 4
A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18

SC22U6D3V5MX-2GP

+VCC_CORE

C426

DY

SC22U6D3V5MX-2GP

+VCC_CORE

C435

DY

SC22U6D3V5MX-2GP

C442

DY

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

DY

C403

C408

Please these inside socket


cavity on L8(North side Secondary)

Please these outside socket


cavity on L8(North side Secondary)

Sheet
1

of

42

H_D#[63..0]
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

+1.05VS
1

H_SWING routing Trace width and


Spacing use 10 / 20 mil

R234
221R2F-2-GP
2

H_SWING Resistors and


Capacitors close MCH
500 mil ( MAX )

1
R235
100R2F-L1-GP-U
2

H_SWING

H_RCOMP routing Trace width and


Spacing use 10 / 20 mil
1
R233

2 H_RCOMP
24D9R2F-L-GP

Place them near to the chip ( < 0.5")

H_SWING
H_RCOMP

C5
E3

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63

H_SWING
H_RCOMP

+1.05VS

F2
G8
F8
E6
G2
H6
H2
F6
D4
H3
M9
M11
J1
J2
N12
J6
P2
L2
R2
N9
L6
M5
J3
N2
R1
N5
N6
P13
N8
L7
N10
M3
Y3
AD14
Y6
Y10
Y12
Y14
Y7
W2
AA8
Y9
AA13
AA9
AA11
AD11
AD10
AD13
AE12
AE9
AA2
AD8
AA3
AD3
AD7
AE14
AF3
AC1
AE3
AC3
AE11
AE8
AG2
AD6

HOST

H_D#[63..0]

3
4

R236
1KR2F-3-GP

H_CPURST#
H_CPUSLP#

A11
B11

H_AVREF H_AVREF

H_CPURST#
H_CPUSLP#
H_AVREF
H_DVREF

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

A14
C15
F16
H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20

H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#

H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

J8
L3
Y13
Y1

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

L10
M7
AA5
AE6

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

L9
M8
AA6
AE5

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

B15
K13
F13
B13
B14

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#_0
H_RS#_1
H_RS#_2

B6
F12
C8

H_RS#0
H_RS#1
H_RS#2

H_A#[35..3]

H_ADS#
3
H_ADSTB#0 3
H_ADSTB#1 3
H_BNR#
3
H_BPRI# 3
H_BREQ#0 3
H_DEFER# 3
H_DBSY# 3
CLK_MCH_BCLK 16
CLK_MCH_BCLK# 16
H_DPWR# 4
H_DRDY# 3
H_HIT#
3
H_HITM# 3
H_LOCK# 3
H_TRDY# 3

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

H_REQ#[4..0]

H_RS#[2..0]

CANTIGA-GM-GP-U-NF

SCD1U16V2ZY-2GP

DY C400

R237
2KR2F-3-GP

C12
E11

H_A#[35..3]

1 OF 10

U53A
4

C391
SCD1U10V2KX-4GP

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

Cantiga (1 of 6)

Document Number

Date: Monday, January 07, 2008

WarriorSheet
1

Rev

SC
6

of

42

DY

2 2K21R2F-GP CFG10

SM_VREF
SM_PWROK
SM_REXT
SM_DRAMRST#

AV42
AR36
BF17
BC36

DY

BG48
BF48
BD48
BC48
BH47
BG47
BE47
BH46
BF46
BG45
BH44
BH43
BH6
BH5
BG4
BH3
BF3
BH2
BG2
BE2
BG1
BF1
BD1
BC1
F1
A47

C73
SC100P50V2JN-3GP

3,18 PM_THRMTRIP-A#
19,36 PM_DPRSLPVR
Connect to V Core

DMI Lane Reversal


MCH_CFG_19
Low = Normal (default)
High = Lanes Reversed
Cantiga = 2.2K

PCI Express Graphics Lane


MCH_CFG_9
Low = Normal (default)

DMI

NC#BG48
NC#BF48
NC#BD48
NC#BC48
NC#BH47
NC#BG47
NC#BE47
NC#BH46
NC#BF46
NC#BG45
NC#BH44
NC#BH43
NC#BH6
NC#BH5
NC#BG4
NC#BH3
NC#BF3
NC#BH2
NC#BG2
NC#BE2
NC#BG1
NC#BF1
NC#BD1
NC#BC1
NC#F1
NC#A47

M_RCOMPP
M_RCOMPN
SM_RCOMP_VOH
SM_RCOMP_VOL

R62
1KR2F-3-GP

DY

R2401

2
499R2F-2-GP
2

Use DDR3 need enable


B38 DREFCLK
DREFCLK 16
A38 DREFCLK#
DREFCLK# 16
E41 DREFSSCLK
DREFSSCLK 16
F41 DREFSSCLK#
DREFSSCLK# 16

F43
E43

H48
D45
F40
B40

LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3

15 TXOUTB_L015 TXOUTB_L115 TXOUTB_L2-

A41
H38
G37
J37

R61
1KR2F-3-GP

LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3

DY

15 TXOUTB_L0+
15 TXOUTB_L1+
15 TXOUTB_L2+

B42
G38
F37
K37

LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3

+3VS

CLK_MCH_3GPLL 16
CLK_MCH_3GPLL# 16

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

AE41
AE37
AE47
AH39

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

AE40
AE38
AE48
AH40

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

AE35
AE43
AE46
AH42

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

AD35
AE44
AF46
AH43

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

19
19
19
19

B33
B32
G33
F33
E33

GFX_VR_EN

C34

CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF

AH37
AH36
AN36
AJ35
AH34

F25
H25
K25

TVA_DAC
TVB_DAC
TVC_DAC

H24

TV_RTN

C31
E32

TV_DCONSEL_0
TV_DCONSEL_1

M_BLUE

E28

CRT_BLUE

M_GREEN

G28

CRT_GREEN

RN46
SRN2K2J-1-GP
TV_DCONSEL0
TV_DCONSEL1

DMI_TXP0 19
DMI_TXP1 19
DMI_TXP2 19
DMI_TXP3 19
DMI_RXN0 19
DMI_RXN1 19
DMI_RXN2 19
DMI_RXN3 19
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

M_RED

19
19
19
19

14 DDC1_CLK
14 DDC1_DATA
14 M_HSYNC
14

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4

TV_DACA
TV_DACB
TV_DACC

TP67
TP68
TP69

1
2

PEG_CLK
PEG_CLK#

SM_REXT

15 TXOUTA_L0+
15 TXOUTA_L1+
15 TXOUTA_L2+

DDC1_CLK
DDC1_DATA
GMCH_HS
2
33R2J-2-GP
GMCH_VS
2
33R2J-2-GP

1
R54
1
R53

M_VSYNC
R252

J28

CRT_RED

G29

CRT_IRTN

H32
J32
J29
E29
L29

CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC

CRT_IREF

GRAPHICS

BF28
BH28

LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3

PCI-EXPRESS

SM_RCOMP_VOH
SM_RCOMP_VOL

H47
E46
G40
A40

PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39

PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15

H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40

PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15

J41
M46
M47
M40
M42
R48
N38
T40
U37
U40
Y40
AA46
AA37
AA40
AD43
AC46

HDMI_L_DATA2HDMI_L_DATA1HDMI_L_DATA0HDMI_L_CLK-

PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15

J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46

HDMI_L_DATA2+
HDMI_L_DATA1+
HDMI_L_DATA0+
HDMI_L_CLK+

PEG_RXP3

PEG_RXP3 26

HDMI
HDMI
2 C560 SCD01U16V2KX-3GP
2 C561 SCD01U16V2KX-3GP
2 C562 SCD01U16V2KX-3GP
2 C563 SCD01U16V2KX-3GP

1
1
1
1

HDMI
HDMI

HDMI_DATA2- 26
HDMI_DATA1- 26
HDMI_DATA0- 26
HDMI_CLK- 26

Place Close GMCH

HDMI
HDMI
1
1
1
1

2
2
2
2

HDMI
HDMI

C
C564
C565
C566
C567

SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP

HDMI_DATA2+ 26
HDMI_DATA1+ 26
HDMI_DATA0+ 26
HDMI_CLK+ 26

Place Close GMCH

LIBG

1
R257
2K37R2F-GP

1K02R2F-1-GP

CANTIGA-GM-GP-U-NF

FOR Cantiga: 1.02k_1% ohm

CRT_IREF routing Trace


width use 20 mil

+1.05VS

+3VS

MCH_CLVREF

R52
1KR2F-3-GP

CL_CLK0 19
CL_DATA0 19
M_PWROK
19
CL_RST#0
19

RN25
LCTLB_DATA
PM_EXTTS#0
LCTLA_CLK
PM_EXTTS#1

CL_VREF ~= 0.35V

C139

DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
CLKREQ#
ICH_SYNC#

N28
M28
G36
E36
K36
H36

TSATN#

B12

HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC

B28
B30
B29
C29
A28

GMCH_HDMI_CLK 26
GMCH_HDMI_DATA 26
MCH_CLK_REQ# 16
MCH_ICH_SYNC# 19
TSATN#

R55
499R2F-2-GP

1
2
3
4

8
7
6
5

SRN10KJ-6-GP

+1.8V
R251
2

1KR2F-3-GP
1

SM_RCOMP_VOH
R248
3K01R2F-3-GP

DDPC/SDVO for HDMI used

C437

SCD01U16V2KX-3GP

R34

BG22
BH21

15 TXOUTA_L015 TXOUTA_L115 TXOUTA_L2-

DY

2 2K21R2F-GP CFG16

SM_RCOMP
SM_RCOMP#

+1.8V
DDR_VREF_S3

Place Close GMCH

C127
SC2D2U6D3V3MX-1-GP

Place Close Connector

R49
M_BLUE
SM_RCOMP_VOL

HDA_BITCLK_CODEC 18,28
HDA_RST#_CODEC 18,28
HDA_SDIN2 18
HDA_SDOUT_CODEC 18,28
HDA_SYNC_CODEC 18,28

C431

2 2K21R2F-GP CFG13

12
12
13
13

SCD01U16V2KX-3GP

1KR2F-3-GP

1
150R2F-1-GP

C121

R14

M_BLUE

M_GREEN
1
150R2F-1-GP

1
150R2F-1-GP

R50

R244

2 2K21R2F-GP CFG12

DY

M_ODT0
M_ODT1
M_ODT2
M_ODT3

DY

R38

BD17
AY17
BF15
AY13

TXCLKA_LTXCLKA_L+
TXCLKB_LTXCLKB_L+

R39

SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1

15
15
15
15

R37

12
12
13
13

2 4K02R2F-GP CFG9

M_CS0#
M_CS1#
M_CS2#
M_CS3#

L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK

LIBG
LVDS_VBG

2 2K21R2F-GP CFG8

DY

BA17
AY16
AV16
AR13

M29
C44
B43
E37
E38
C41
C40
B37
A37

L_VDD_EN

TPAD30 TP48

T37
T36

2 2K21R2F-GP CFG7

DY

ME

DY

R35

MISC

R36

1 0R0402-PAD
2
2
1
100R2J-2-GP
R30

NC

R43

R59

PM_SYNC#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR

HDA

2 2K21R2F-GP CFG5

PM_EXTTS#0
PM_EXTTS#1
PWROK_R
RSTIN#

DY

19,33 PM_PWROK
17,23,26,27,30 PLT_RST#

R29
B7
N33
P32
AT40
AT11
T20
R32

PM

19
PM_SYNC#
4,18,36 H_DPRSTP#
12 PM_EXTTS#0
13 PM_EXTTS#1

2 4K02R2F-GP CFG20

R245 1

SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1

15

PEG_CMP 1

PEG_COMPI
PEG_COMPO

49D9R2F-GP

CFG18
CFG19
CFG20

2 2K21R2F-GP CFG6

12
12
13
13

CFG16

2 4K02R2F-GP CFG19

DY

M_CKE0
M_CKE1
M_CKE2
M_CKE3

L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA

M_GREEN
1
150R2F-1-GP

SC2D2U6D3V3MX-1-GP

M_RED

1
150R2F-1-GP

2
R15

R48

2 2K21R2F-GP CFG11

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20

GRAPHICS VID

2 2K21R2F-GP CFG18

2
R17

M_RED

1
150R2F-1-GP

CANTIGA-GM-GP-U-NF

High = Lanes Reversed

CRT Termination/EMI
Filter

Cantiga = 2.2K

Place Close Connector

+3VS

1
2

0104 SI

C34

14

C42
SC22P50V2JN-4GP

Please Close to U22

C28

SC22P50V2JN-4GP

0R0402-PAD

BLUE

TSATN#_KBC 30

Q38
MMBT3904WT1G-GP

14

2
0R3-0-U-GP

14

DY
1

TSATN#_B

GREEN

1231 SI

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

ai

RED

2
0R3-0-U-GP
R550

TSATN#

M_BLUE_M

R239

2
0R3-0-U-GP
R549

SC22P50V2JN-4GP

SRN2K2J-1-GP

DDC2_CLK
DDC2_DATA

nf
@
ho
tm
ai
l.c

TSATN#_KBC

2
4
3

M_GREEN_M

L12
M_BLUE
1
BLM18BB470SN1-GP

DY

RN24

Title

Cantiga (2 of 6)

Size

he
x

1
2

M_RED_M

1
+3VS

R548

2
L14

M_GREEN
1
BLM18BB470SN1-GP

R542
10KR2J-3-GP
R552
56R2J-4-GP

L18
M_RED
1
BLM18BB470SN1-GP

om

Please Close GMCH


+1.05VS

R45

BC28
AY28
AY36
BB36

M33
K33
J33

LCTLB_DATA
15 DDC2_CLK
15 DDC2_DATA

1
2

DY

SA_CKE_0
SA_CKE_1
SB_CKE_0
SB_CKE_1

L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK

LCTLA_CLK

+VCC_PEG

R58

L32
G32
M32

L_BKLTCTL
L_BKLT_EN

VGA

CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13

DY

R272 1

T25
R25
P25
P20
P24
C25
N24
M24
E21
C23
C24
N21
P21
T21
R20
M20
L21
H21
P29
R28
T28

3,16 MCH_CLKSEL0
3,16 MCH_CLKSEL1
3,16 MCH_CLKSEL2

CFG

DY

R271 1

M_CLK_DDR#0 12
M_CLK_DDR#1 12
M_CLK_DDR#2 13
M_CLK_DDR#3 13

15
30

TV

FSB setting

+3VS

R266 1

AR24
AR21
AU24
AV20

12
12
13
13

4
3

CLK

M_RCOMPP
M_RCOMPN

DY

SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1

M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3

1
2

R243
80D6R2F-L-GP

R274 1

AP24
AT21
AV24
AU20

RESERVED#BG23
RESERVED#BF23
RESERVED#BH18
RESERVED#BF18

1
Place the 49D9 Ohm resistor
within 500 mils (1.27 mm)
of the (G)MCH.

3 OF 10

RESERVED#AY21

BG23
BF23
BH18
BF18

SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1

DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#

R242
80D6R2F-L-GP

2
U53C

LVDS

AY21

+1.8V

RESERVED#B31
RESERVED#B2
RESERVED#M1

RSVD

B31
B2
M1

RESERVED#M36
RESERVED#N36
RESERVED#R33
RESERVED#T33
RESERVED#AH9
RESERVED#AH10
RESERVED#AH12
RESERVED#AH13
RESERVED#K12
RESERVED#AL34
RESERVED#AK34
RESERVED#AN35
RESERVED#AM35
RESERVED#T24

DDR CLK/ CONTROL/COMPENSATION

M36
N36
R33
T33
AH9
AH10
AH12
AH13
K12
AL34
AK34
AN35
AM35
T24

3
2 OF 10

U53B

SCD1U10V2KX-4GP
2
1

Document Number

Rev

SC

Warrior

Date: Monday, January 07, 2008

Sheet

of

42

M_A_BS#0 12
M_A_BS#1 12
M_A_BS#2 12

SA_RAS#
SA_CAS#
SA_WE#

BB20
BD20
AY20

M_A_RAS# 12
M_A_CAS# 12
M_A_WE# 12

SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14

BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25

MEMORY

M_A_DM[7..0]

M_A_DQS[7..0]

M_A_DQS#[7..0]

M_A_A[14..0]
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

M_A_DM[7..0] 12

M_A_DQS[7..0]

12

M_A_DQS#[7..0]

12

M_A_A[14..0] 12

CANTIGA-GM-GP-U-NF

M_B_DQ[63..0]
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

5 OF 10

U53E
AK47
AH46
AP47
AP46
AJ46
AJ48
AM48
AP48
AU47
AU46
BA48
AY48
AT47
AR47
BA47
BC47
BC46
BC44
BG43
BF43
BE45
BC41
BF40
BF41
BG38
BF38
BH35
BG35
BH40
BG39
BG34
BH34
BH14
BG12
BH11
BG8
BH12
BF11
BF8
BG7
BC5
BC6
AY3
AY1
BF6
BF5
BA1
BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1
AL1
AL2
AJ1
AH1
AM2
AM3
AH3
AJ3

SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63

SB_BS_0
SB_BS_1
SB_BS_2

BC16
BB17
BB33

SB_RAS#
SB_CAS#
SB_WE#

AU17
BG16
BF14

SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

AM47
AY47
BD40
BF35
BG11
BA3
AP1
AK2

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14

AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33

M_B_BS#0 13
M_B_BS#1 13
M_B_BS#2 13
M_B_RAS# 13
M_B_CAS# 13
M_B_WE# 13

M_B_DM[7..0]

BD21
BG18
AT25

MEMORY

13 M_B_DQ[63..0]

SA_BS_0
SA_BS_1
SA_BS_2

SYSTEM

SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63

4 OF 10

U53D
AJ38
AJ41
AN38
AM38
AJ36
AJ40
AM44
AM42
AN43
AN44
AU40
AT38
AN41
AN39
AU44
AU42
AV39
AY44
BA40
BD43
AV41
AY43
BB41
BC40
AY37
BD38
AV37
AT36
AY38
BB38
AV36
AW36
BD13
AU11
BC11
BA12
AU13
AV13
BD12
BC12
BB9
BA9
AU10
AV9
BA11
BD9
AY8
BA6
AV5
AV7
AT9
AN8
AU5
AU6
AT5
AN10
AM11
AM5
AJ9
AJ8
AN12
AM13
AJ11
AJ12

SYSTEM

M_A_DQ[63..0]
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

DDR

12 M_A_DQ[63..0]

DDR

M_B_DM[7..0] 13

M_B_DQS[7..0]

M_B_DQS[7..0] 13

M_B_DQS#[7..0]

M_B_DQS#[7..0]

13

C
M_B_A[14..0]

M_B_A[14..0] 13

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14

CANTIGA-GM-GP-U-NF

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

Cantiga (3 of 6)

Document Number

Rev

Warrior
Date: Monday, January 07, 2008

SC

Sheet

of

42

C124
SCD1U10V2KX-4GP

C123

Coupling CAP

R51 2VCC_GMCH_35
1
0R0402-PAD

AE33
AC33
AA33
Y33
W33
V33
U33
AH28
AF28
AC28
AA28
AJ26
AG26
AE26
AC26
AH25
AG25
AF25
AG24
AJ23
AH23
AF23

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

T32

VCC

D
VCC CORE

Coupling CAP

Coupling CAP 370 mils from the Edge

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

POWER

C138
SCD1U10V2KX-4GP

C136
SCD1U10V2KX-4GP
2
1

C140
SCD22U10V2KX-1GP
2
1

1
2

C135
SCD22U10V2KX-1GP
2
1

C149

C134

SCD1U16V2KX-3GP

1
2

SCD1U16V2KX-3GP
2

1
2

C78
SCD1U10V2KX-4GP

1
2

BC1
SC1U10V3KX-3GP

C90
SC22U10V6ZY-2GP

C80
SCD47U6D3V2KX-GP
2
1

1
TC18

1
2

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
2

1
2

SCD1U16V2KX-3GP
2

POWER
VCC SM

C89

Place on the Edge

+1.05VS

VCC NCTF

FOR VCC SM

1
2

1
2

C151

Place on the Edge

AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23

SC1U10V3KX-3GP

om

SC1U10V3KX-3GP
2
1
C155

1
C150

C107

C52

SCD22U10V2KX-1GP

C130

VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF

CANTIGA-GM-GP-U-NF

SCD22U10V2KX-1GP
2
1

CANTIGA-GM-GP-U-NF

TC7

AV44 SM_LF1_GMCH
BA37 SM_LF2_GMCH
AM40 SM_LF3_GMCH
AV21 SM_LF4_GMCH
AY5 SM_LF5_GMCH
AM10 SM_LF6_GMCH
BB13 SM_LF7_GMCH
C71
SCD1U10V2KX-4GP
2
1

VCC_AXG_SENSE
VSS_AXG_SENSE

VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF

VCC GFX

C142
SCD1U10V2KX-4GP

+1.8V

C76
SCD1U10V2KX-4GP
2
1

AJ14
AH14

C109

C141

AG34
AC34
AB34
AA34
Y34
V34
U34
AM33
AK33
AJ33
AG33
AF33

Place CAP where


LVDS and DDR2 taps

VCC SM LF

VCC_AXG_SENSE
VSS_AXG_SENSE

TP2

C110

SCD47U6D3V2KX-GP
C154

TP3

C122

6 OF 10

U53F

SC10U6D3V5MX-3GP

FOR VCC CORE

SC22U6D3V5MX-2GP

VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG

+1.05VS

SC22U6D3V5MX-2GP

Y26
AE25
AB25
AA25
AE24
AC24
AA24
Y24
AE23
AC23
AB23
AA23
AJ21
AG21
AE21
AC21
AA21
Y21
AH20
AF20
AE20
AC20
AB20
AA20
T17
T16
AM15
AL15
AE15
AJ15
AH15
AG15
AF15
AB15
AA15
Y15
V15
U15
AN14
AM14
U14
T14

+1.05VS

+1.05VS

SC22U6D3V5MX-2GP

VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC

W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16

ST220U2D5VBM-LGP

BA36
BB24
BD16
BB21
AW16
AW13
AT13

VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF

ST220U2D5VBM-LGP

VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM

+1.05VS

SC10U6D3V5MX-3GP

AP33
AN33
BH32
BG32
BF32
BD32
BC32
BB32
BA32
AY32
AW32
AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29
AW29
AV29
AU29
AT29
AR29
AP29

VCC GFX NCTF

+1.8V

4
7 OF 10

U53G

nf
@
ho
tm
ai
l.c

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

ai

Title

Cantiga (4 of 6)

Document Number

he
x

Size

Rev

Warrior

Date: Friday, January 04, 2008

Sheet

SC
9

of

42

C105

AA48

VCCA_PEG_PLL

AR20
AP20
AN20
AR17
AP17
AN17
AT16
AR16
AP16

VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM

AP28
AN28
AP25
AN25
AN24
AM28
AM26
AM25
AL25
AM24
AL24
AM23
AL23

VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF

C72
SCD47U6D3V2KX-GP

C75
SC2D2U6D3V3MX-1-GP
2
1

C51

C59
SC4D7U6D3V3KX-GP

1
2

1
0R3-0-U-GP

DY

C406
SC10U6D3V5MX-3GP

1R2F-GP

VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG

V48
U48
V47
U47
U46

VCC_DMI
VCC_DMI
VCC_DMI
VCC_DMI

AH48
AF48
AH47
AG47

C464
SC1KP50V2KX-1GP

0R5J-5-GP

+1.8V

R264
2

0R3-0-U-GP
C469
SC22U6D3V5MX-2GP

1782mA

VTTLF1
VTTLF2
VTTLF3

VTTLF
VTTLF
VTTLF

A8
L1
AB2

1
2

C152

1
2

1
2

C393
SCD47U6D3V2KX-GP

CANTIGA-GM-GP-U-NF

VTTLF

VCCD_LVDS
VCCD_LVDS

+1.05VS

1
2

1
2

456mA

C466

0R3-0-U-GP
C465
SC22U6D3V5MX-2GP

+VCC_PEG

C460
SCD1U10V2KX-4GP

1D05V_VCC_DMI

C461

C454

R269
2

R308
2

1
0R3-0-U-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

Document Number

Cantiga (5 of 6)

Date: Friday, January 04, 2008

SC10U6D3V5MX-3GP

100mA

+3VS_HV

106mA

C35
B35
A35

C388
SCD47U6D3V2KX-GP

K47

VCC_HV
VCC_HV
VCC_HV

VCCD_PEG_PLL

SCD1U10V2KX-4GP

C108
SCD1U10V2KX-4GP

1
2

AXF
SM CK

TV

VCC_TX_LVDS

1
C102

1D8V_TXLVDS_S3

VCCD_HPLL

M38
L37

R40

+1.8V

R440

200mA

1D8V_SM_CK

BF21
BH20
BG20
BF20

HV

VCCD_QDAC

1D05V_RUN_PEGPLLAA47

VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK

PEG

L28
AF1

VCCD_TVDAC

11D8V_SUS_DLVDS
0R3-0-U-GP

Reserved for TV ripple

C446
SCD1U10V2KX-4GP

+1.05VS

R307
1D05V_VCC_AXF

B22
B21
A21

R60
2

G9091-330T12U-GP
SC10U10V5ZY-1GP

R259

C389
SCD47U6D3V2KX-GP

C445

+1.8V

+3VS_DAC_LDO

EN
GND
VIN
VOUT
NC#5

1
2
3
4
5

0R2J-2-GP
2
1

+VCC_PEG

M25

1
2

U57

C455
SCD1U10V2KX-4GP

SC1U10V3ZY-6GP

SCD1U10V2KX-4GP

0R3-0-U-GP

C390

A CK

SCD1U10V2KX-4GP

C137

1
2

1D05V_RUN_HPLL

VCC_AXF
VCC_AXF
VCC_AXF

DMI

1D5VRUN_QDAC
R163

C447

VCC_HDA

D TV/CRT

1
2

+1.05VS
2

+5VS

SC22U6D3V5MX-2GP

C473

SCD1U10V2KX-4GP

A32

C443
SCD1U10V2KX-4GP
1D5VRUN_TVDAC

SCD01U16V2KX-3GP

+3VS_HV
-1

R261
10R2J-2-GP
2
1

SC22U6D3V5MX-2GP

C470

VCC_HDA

VCCA_TV_DAC
VCCA_TV_DAC

HDA

VCC_HDA

2
0R2J-2-GP

1D5VRUN_QDAC

BAT54-7-F-GP

SC4D7U6D3V3KX-GP

180ohm 100MHz

R253

B24
A24

LVDS

1
L27
1
2
HCB1608K-181T20GP

1
2

+1.5VS

+3VS

350mA

C418

SCD01U16V2KX-3GP

SCD1U10V2KX-4GP

180ohm 100MHz

C474

C471
SCD022U16V2KX-3GP

2
1

C423

0R3-0-U-GP

3D3VTVDAC

L22
2
1
HCB1608K-181T20GP

1D5VRUN_TVDAC

DY

SCD1U10V2KX-4GP

1
2

1
2

SCD1U10V2KX-4GP

1
2

SC10U6D3V5MX-3GP

+3VS_DAC_LDO

R291

C129
SC2D2U6D3V3MX-1-GP

C451

C120
SC22U6D3V5MX-2GP

+1.5VS

1D05V_SM_CK

1
0R3-0-U-GP

C476

220ohm 100MHz

1D05V_RUN_PEGPLL

1
2
BLM18BB221SN1D-GP

TC15

D27
1

POWER

R46
L26

EC37

+1.05VS

A PEG

1D05V_RUN_PEGPLL

VCCA_PEG_BG

1
2

A SM

2
2

+1.05VS

AD48

VSSA_LVDS

SCD47U6D3V2KX-GP

1
2

SCD1U10V2KX-4GP

VCCA_LVDS

J47

J48

U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7
T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1

SC1U10V3KX-3GP

VCCA_MPLL

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

VTT
PLL

AE1

C468
SCD1U10V2KX-4GP

C91

DY

C101

C88

2
1

1D8V_TXLVDS

SC1U10V3KX-3GP

0R3-0-U-GP
C386
SCD1U10V2KX-4GP

DY

VCCA_HPLL

1D05V_SM

1
1

1
2

C41

AD1

0R2J-2-GP

SC4D7U6D3V3KX-GP

+1.05VS

+1.05VS

M_VCCA_MPLL

VCCA_DPLLB

M_VCCA_HPLL

VCCA_PEG_BG

R42

2
0R2J-2-GP

C387
SCD1U10V2KX-4GP

SC22U6D3V5MX-2GP

120ohm 100MHz

SC22U6D3V5MX-2GP

SC4D7U6D3V3KX-GPSC10U6D3V5MX-3GP

FCM1608KF-1-GP
1
2
L16

C382

VCCA_DPLLA

L48

R270

+1.5VS
M_VCCA_HPLL

F47

M_VCCA_DPLLB

M_VCCA_MPLL

C456
SC1KP50V2KX-1GP

120ohm 100MHz

M_VCCA_DPLLA

R262

+1.8V

R223
0R3-0-U-GP

FCM1608KF-1-GP
1
2
L17

VCCA_DAC_BG
VSSA_DAC_BG

A LVDS

0R3-0-U-GP

180ohm 100MHz

C432

A25
B25

M_VCCA_DAC_BG
C433
SCD1U10V2KX-4GP

C458

SCD1U10V2KX-4GP

C463

VCCA_CRT_DAC
VCCA_CRT_DAC

M_VCCA_DAC_BG

+1.05VS

C453

SCD1U16V2KX-3GP
2
1

0R3-0-U-GP

M_VCCA_DPLLB

1
SCD1U16V2KX-3GP
2
1

R265

B27
A26

1
C411

R249

+1.05VS

852mA
8 OF 10

U53H

+3VS_DAC_LDO

SCD1U10V2KX-4GP

0R3-0-U-GP

10mA

SCD01U16V2KX-3GP

2
1
SCD1U16V2KX-3GP

M_VCCA_DPLLA
C457 C452

ST220U2D5VBM-LGP

C462

SCD1U25V3ZY-1GP

1
0R3-0-U-GP

SCD1U16V2KX-3GP
2
1

R263
2

3D3V_CRTDAC_S0
C438
C439

+3VS_DAC_LDO
R250
2
1

+1.05VS

80mA

CRT

SCD01U16V2KX-3GP

Warrior
Sheet
1

Rev

SC
10

of

42

CANTIGA-GM-GP-U-NF

R29
1

Modification AJ6 to reserved Pin

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AN13
AJ13
AE13
N13
L13
G13
E13
BF12
AV12
AT12
AM12
AA12
J12
A12
BD11
BB11
AY11
AN11
AH11

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

Y11
N11
G11
C11
BG10
AV10
AT10
AJ10
AE10
AA10
M10
BF9
BC9
AN9
AM9
AD9
G9
B9
BH8
BB8
AV8
AT8

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1

VSS
VSS
VSS
VSS

U24
U28
U25
U29

VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF

AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17

VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB

BH48
BH1
A48
C1
A3

NC#E1
NC#D2
NC#C3
NC#B4
NC#A5
NC#A6
NC#A43
NC#A44
NC#B45
NC#C46
NC#D47
NC#B47
NC#A46
NC#F48
NC#E48
NC#C48
NC#B48

E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48

GMCH_GND1
GMCH_GND2
GMCH_GND3
GMCH_GND4

TP49
TP46
TP50
TP47

NCTF PIN

om

VSS

AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CANTIGA-GM-GP-U-NF
Size

Cantiga (6 of 6)

Document Number

Warrior

0R2J-2-GP

Date: Friday, January 04, 2008

nf
@
ho
tm
ai
l.c

BA16
AU16
AN16
N16
K16
G16
E16
BG15
AC15
W15
A15
BG14
AA14
C14
BG13
BC13
BA13

VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

Rev

ai

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS NCTF

VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

BG21
L12
AW21
AU21
AP21
AN21
AH21
AF21
AB21
R21
M21
J21
G21
BC20
BA20
AW20
AT20
AJ20
AG20
Y20
N20
K20
F20
C20
A20
BG19
A18
BG17
BC17
AW17
AT17
R17
M17
H17
C17

10 OF 10

U53J
AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23
AJ6

VSS SCB

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

9 OF 10

U53I
AU48
AR48
AL48
BB47
AW47
AN47
AJ47
AF47
AD47
AB47
Y47
T47
N47
L47
G47
BD46
BA46
AY46
AV46
AR46
AM46
V46
R46
P46
H46
F46
BF44
AH44
AD44
AA44
Y44
U44
T44
M44
F44
BC43
AV43
AU43
AM43
J43
C43
BG42
AY42
AT42
AN42
AJ42
AE42
N42
L42
BD41
AU41
AM41
AH41
AD41
AA41
Y41
U41
T41
M41
G41
B41
BG40
BB40
AV40
AN40
H40
E40
AT39
AM39
AJ39
AE39
N39
L39
B39
BH38
BC38
BA38
AU38
AH38
AD38
AA38
Y38
U38
T38
J38
F38
C38
BF37
BB37
AW37
AT37
AN37
AJ37
H37
C37
BG36
BD36
AK15
AU36

he
x

NC

Sheet

11

SC
of

42

M_CLK_DDR0
M_CLK_DDR#0

Layout Note:
Place near DM1
8 M_A_BS#2
8 M_A_BS#0
8 M_A_BS#1

1
2

TC2
ST220U2D5VBM-LGP

C58
SCD1U16V2ZY-2GP

C63
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C111

C106

DY
SC2D2U10V3ZY-1GP

SC2D2U10V3ZY-1GP

C87

DY
SC2D2U10V3ZY-1GP

C53

C94

DY
SC2D2U10V3ZY-1GP

SC2D2U10V3ZY-1GP

C74

C118

+1.8V

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS

C392
SCD1U16V2ZY-2GP

C115
SCD1U16V2ZY-2GP

C427
SCD1U16V2ZY-2GP

C419
SCD1U16V2ZY-2GP

C410
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C397

DY
2

C398
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C405

C98

DY

C48
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C55

DY

C65
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C84

DY

+0.9VS

Layout Note:
Place these resistors
closely DM1,all
trace length Max=1.5"

+0.9VS

M_A_A12
M_A_BS#2

RN44 SRN56J-4-GP
1
4
2
3

RN45
4
3

M_A_BS#0
M_A_A10

RN41 SRN56J-4-GP
1
4
2
3

4
3

M_ODT0
M_CS0#

RN6
1
2

RN15 SRN56J-4-GP
M_A_A6
4
1
M_A_A5
3
2

M_A_A14
M_A_A11

RN18 SRN56J-4-GP
1
4
2
3

M_A_CAS#
M_A_WE#

RN40 SRN56J-4-GP
1
4
2
3

M_ODT1
M_CS1#

RN39 SRN56J-4-GP
1
4
2
3

4
3

M_CKE1
M_A_A7

RN21 SRN56J-4-GP
1
4
2
3

4
3

RN42 SRN56J-4-GP
M_A_A1
1
M_A_A3
2

RN3

7
7

M_ODT0
M_ODT1

SRN56J-4-GP
M_A_BS#1
1
M_A_RAS#
2

C467

RN12 SRN56J-4-GP
M_A_A4
1
M_A_A0
2

M_CS0#
M_CS1#

CKE0
CKE1

79
80

M_CKE0 7
M_CKE1 7

CK0
/CK0

30
32

M_CLK_DDR0
M_CLK_DDR#0

CK1
/CK1

164
166

M_CLK_DDR1
M_CLK_DDR#1

107
106

BA0
BA1

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

10
26
52
67
130
147
170
185

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

SDA
SCL

195
197

ICH_SMBDATA
ICH_SMBCLK

VDDSPD

199

SA0
SA1

198
200

NC#50
NC#69
NC#83
NC#120
NC#163/TEST

50
69
83
120
163

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

81
82
87
88
95
96
103
104
111
112
117
118

VREF
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

11
29
49
68
129
146
167
186

/DQS0
/DQS1
/DQS2
/DQS3
/DQS4
/DQS5
/DQS6
/DQS7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

13
31
51
70
131
148
169
188

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

M_ODT0
M_ODT1

114
119

ODT0
ODT1

1
2

GND

GND

201

7
7

M_CLK_DDR0 7
M_CLK_DDR#0 7
M_CLK_DDR1 7
M_CLK_DDR#1 7

put near connector

C37

DUMMY-C2
C36

2
DUMMY-C2

ICH_SMBDATA 13,16,21,26
ICH_SMBCLK 13,16,21,26
SCD1U16V2ZY-2GP

RN2

1
2

C156
DUMMY-C2

M_A_BS#0
M_A_BS#1

C153
DUMMY-C2

M_A_BS#2

SC2D2U10V3ZY-1GP

DDR_VREF_S3

/CS0
/CS1

110
115

M_A_RAS# 8
M_A_WE# 8
M_A_CAS# 8

SRN10KJ-11-GP
4
3

+3VS

C18

PM_EXTTS#0 7

C15
SC2D2U6D3V3KX-GP

+1.8V

4
3

DDR_VREF_S3

SRN56J-4-GP
M_A_A2
1
M_A_A13
2

C448

RN9

4
3

RN43 SRN56J-4-GP
M_A_A8
1
M_A_A9
2

SRN56J-4-GP
4
3

SRN56J-4-GP
1
M_CKE0
2

108
109
113

8 M_A_A[14..0]
D

/RAS
/WE
/CAS

8 M_A_DQS[7..0]

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

8 M_A_DM[7..0]

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85

8 M_A_DQ[63..0]

DM2
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

8 M_A_DQS#[7..0]

202

DDR2-200P-36-GP-U

SCD1U16V2ZY-2GP
A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

DM2 use 62.10017.E11

Title

DDRII-SODIMM SLOT1
Size
Custom
Date:
5

Document Number

Monday, January 07, 2008

Rev

SC

Warrior
Sheet

12
1

of

42

M_CLK_DDR2

M_CLK_DDR#2
8 M_B_DQS#[7..0]

C157
DUMMY-C2

8 M_B_DQ[63..0]
8 M_B_DM[7..0]

Layout Note:
Place these resistors
closely DM2,all
trace length Max=1.5"

RN22

SRN56J-4-GP
1
4
2
3

M_B_CAS#
M_B_WE#
M_B_A9
M_CKE2

RN5

1
2
RN20

4
3

SRN56J-4-GP
M_B_A14
1
M_B_A11
2

RN17

SRN56J-4-GP
M_B_A6
1
M_B_A7
2

RN14

SRN56J-4-GP
M_B_A2
1
M_B_A4
2

RN13

SRN56J-4-GP
M_B_A10
1
M_B_BS#0
2

RN8

SRN56J-4-GP
M_CS2#
1
M_ODT2
2

RN19

SRN56J-4-GP
M_B_BS#2
1
M_B_A12
2

RN16

SRN56J-4-GP
1
4
2
3

4
3

RN11

SRN56J-4-GP
1
4
2
3

4
3

M_B_A8
M_B_A5
M_B_A0
M_B_BS#1
RN10
M_B_A3
M_B_A1

SRN56J-4-GP
1
4
2
3

RN7
M_CS3#
M_ODT3

1
2
RN23

M_CKE3

SRN56J-4-GP
4
3

SRN56J-4-GP
1
4
2
3

M_B_RAS#
M_B_A13

4
3

4
3
4
3
4
3

DDR_VREF_S3

7 M_ODT2
7 M_ODT3

SRN56J-4-GP

164
166

M_CLK_DDR3
M_CLK_DDR#3

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

10
26
52
67
130
147
170
185

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

SDA
SCL

195
197

ICH_SMBDATA
ICH_SMBCLK

VDDSPD

199

SA0
SA1

198
200

NC#50
NC#69
NC#83
NC#120
NC#163/TEST

50
69
83
120
163

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

81
82
87
88
95
96
103
104
111
112
117
118
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196
201

107
106

BA0
BA1

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

11
29
49
68
129
146
167
186

/DQS0
/DQS1
/DQS2
/DQS3
/DQS4
/DQS5
/DQS6
/DQS7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

13
31
51
70
131
148
169
188

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

M_ODT2
M_ODT3

114
119

ODT0
ODT1

1
2

VREF
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

GND

GND

C162

C163

M_CLK_DDR2
M_CLK_DDR#2

CK1
/CK1

M_B_BS#0
M_B_BS#1

SC2D2U10V3ZY-1GP

DDR_VREF_S3

30
32

put near connector

M_CLK_DDR2 7
M_CLK_DDR#2 7

C33

M_CLK_DDR3 7
M_CLK_DDR#3 7

2
DUMMY-C2
C32

2
DUMMY-C2

ICH_SMBDATA 12,16,21,26
ICH_SMBCLK 12,16,21,26
SCD1U16V2ZY-2GP

R12
R11

1
1

2 10KR2J-3-GP
2 10KR2J-3-GP

PM_EXTTS#1 7

+1.8V

+3VS
EC45

C17

+3VS
C14
SC2D2U6D3V3KX-GP

SRN56J-4-GP
1
4
2
3

CK0
/CK0

7
7

202

DDR2-200P-19-GP-U1

ai

+0.9VS
RN4

M_CKE2 7
M_CKE3 7

om

SCD1U16V2ZY-2GP

M_CS2#
M_CS3#

79
80

<Core Design>

he
x

C117

DY
2

C100
SCD1U16V2ZY-2GP

C86
SCD1U16V2ZY-2GP

C57
SCD1U16V2ZY-2GP

C50
SCD1U16V2ZY-2GP

C67
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C116

C99
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C85

C66

DY
2

C56
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C49

C45

DY

+0.9VS

110
115

nf
@
ho
tm
ai
l.c

/CS0
/CS1
CKE0
CKE1

SCD1U25V3ZY-1GP

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS

M_B_RAS# 8
M_B_WE# 8
M_B_CAS# 8

8 M_B_BS#0
8 M_B_BS#1

TC8

DY

ST220U2D5VBM-LGP

C64
SCD1U16V2ZY-2GP

C421
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C394

DY

C95
SCD1U16V2ZY-2GP

C112
SC2D2U10V3ZY-1GP

C79
SC2D2U10V3ZY-1GP

SC2D2U10V3ZY-1GP

SC2D2U10V3ZY-1GP

SC2D2U10V3ZY-1GP

C407

C399

DY

8 M_B_BS#2
C54

108
109
113

M_B_BS#2

/RAS
/WE
/CAS

+1.8V

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

Layout Note:
Place near DM2

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85

8 M_B_A[14..0]

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14

8 M_B_DQS[7..0]

C158
DUMMY-C2

DM1

SCD1U16V2ZY-2GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

DM1 use 62.10017.B51

Title

1206 SI
Size
Custom

DDRII-SODIMM SLOT2

Document Number

Date: Monday, January 07, 2008


5

Warrior
Sheet
1

Rev

SC
13

of

42

CRT I/F & CONNECTOR

+5VS_CRT

+5VS
F2

D18
CH501H-40PT-1-GP

SCD01U16V2KX-3GP

1222 SI
C593
SCD1U16V2ZY-2GP
CRT1

D17

SRN2K2J-1-GP
4
3

DY

GREEN

7 GREEN

BLUE

7 BLUE

DY

7
2
8
3
9
4
10
5

+3VS
D5
2
GREEN

DDC_DATA_CON

12
13

JVGA_HS

14

JVGA_VS
DDC_CLK_CON

15
16

DY

11

SYN-CONN15-GP

DY

C25
SC33P50V2JN-3GP

+5VS_CRT1

DY C27

C19
SC33P50V2JN-3GP
SC22P50V2JN-4GP

1
1

BAV99S-GP

2
2

6
1

RED

RED

DDC_CLK_CON

BAV99S-GP

RN37

17

7 RED

DDC_DATA_CON

1
2

BLUE

+5VS_CRT1

+5VS_CRT1

1
FUSE-1D1A6V-8GP

C370

1222 SI

D23

EC55
SCD1U25V2ZY-U

2
+3VS

C23
SC22P50V2JN-4GP

BAV99-7-F-GP
3

D4
+3VS

JVGA_VS

4
3

Layout Note:
* Must be a ground return path between this ground and the ground on
the VGA connector.
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.

JVGA_HS

+3VS

RN1
SRN2K2J-1-GP

DY
1
2

BAV99S-GP

U41
7 DDC1_DATA
2

+5VS_CRT1

DDC_DATA_CON
2

DDC1_CLK 7

DDC_CLK_CON

2N7002DW-1-GP

C385
SCD1U16V2ZY-2GP

U69

7 M_HSYNC

OE#

GND

VCC

5V @ ext. CRT side


HSYNC_5

74AHCT1G125GW-1-GP

U70

7 M_VSYNC

OE#

GND

VCC

RN38

74AHCT1G125GW-1-GP

VSYNC_5

2
1

3
4

JVGA_HS
JVGA_VS

SRN33J-5-GP-U
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CRT Connector
Size
A3

Document Number

Date: Monday, January 07, 2008


A

Rev

SC

Warrior
Sheet
E

14

of

42

LCD / INVERTER INTERFACE / CAMERA

R33

LED1
CAPS_LED_PWR

330R2J-3-GP

CAPS_LED# 29,30

DCBATOUT
1

LED-W-12-GP

TP187 TP28-75-GP

COVER_SW

TP188 TP28-75-GP

GND

TP189 TP28-75-GP

GND

TP190 TP28-75-GP
C354

1
R547
10KR2J-3-GP

30

SIZE_DET1
1

+3VS

R238 100KR2J-1-GP
30

EC_BLON

7
7

BRIGHTNESS_CONN

DDC2_CLK
DDC2_DATA

COVER_SW

1206 SI

+5VS_CAMERA
COVER_SW

C610
SCD22U16V3ZY-GP

DY
2

DY

EC34
SCD1U25V3ZY-1GP

100R2J-2-GP

USB_10+
USB_10-

DY

R545
1

2
48

1227 SI

LID_CLOSE#

30,32 LID_CLOSE#

C353
SCD1U25V2ZY-U

1
C348
SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP

1227 SI

DY

LVDS1

EC33
SCD1U25V3ZY-1GP

+LCDVDD

+3VALW

+3VL

LID_CLOSE#

C341
SCD1U16V2ZY-2GP

White LED:
Lite-On 83.00191.D70
Everlight 83.19217.F70

+3VS

1218 SI

+5VS

C609
SC1KP50V2KX-1GP

23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2

24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45

46

R241
2

100KR2J-1-GP
1
+3VS
SIZE_DET0 30

TXOUTB_L2+ 7
TXOUTB_L2- 7
TXOUTB_L1+ 7
TXOUTB_L1- 7
TXOUTB_L0+ 7
TXOUTB_L0- 7
TXCLKB_L+ 7
TXCLKB_L- 7
TXOUTA_L2+ 7
TXOUTA_L2- 7
TXOUTA_L1+ 7
TXOUTA_L1- 7
TXOUTA_L0+ 7
TXOUTA_L0- 7
TXCLKA_L+ 7
TXCLKA_L- 7

47

1227 SI

ACES-CONN46C-GP-U1

+5VS_CAMERA

TP138 TP28-75-GP

USB_10+

TP139 TP28-75-GP

USB_10-

TP140 TP28-75-GP

GND

TP141 TP28-75-GP

+3VS
U48
Q33
SATA_BD_LED_C

SATA_BD_LED 28

SATA_LED#_C

SATA_LED 30

DY

+5VS

+5VS_CAMERA

USB_10+

2
0R2J-2-GP

30 CAM_PWR#

CAM_PWR#
1
R232

DY

2 CAM_PWR_G#
10KR2J-3-GP

+3VS

DY

DY

1
+3VS

BAV99W-1-GP

C380
1
DY SC1KP50V2KX-1GP

1
C364
1
C374

EC_BLON
2
SC1000P50V3JN-GP
BRIGHTNESS_CONN
2
SC1000P50V3JN-GP

D22
2

DY

+LCDVDD

1231 SI

U43

om

<Core Design>

+LCDVDD

2
3
100R2J-2-GP

L_VDD_EN
1
R202

nf
@
ho
tm
ai
l.c

Wistron Corporation

1
2

BC2
SC1U10V3ZY-6GP

SCD1U16V2ZY-2GP

R208
100KR2J-1-GP

U46

G5281RC1U-GP
EC14

1
BAV99W-1-GP

+3VS

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

LCD/Inverter Connector/CAM/LED
2N7002DW-1-GP

1227 SI

Size
A3

Document Number

Date: Monday, January 07, 2008

Rev

Warrior
Sheet

ai

R203
100KR2J-1-GP

GND
IN#8
IN#7
IN#6
IN#5

15

he
x

L_VDD_EN

IN#1
OUT
EN
GND

9
8
7
6
5

1
2
3
4

+3VS

D21

R226
100KR2J-1-GP

R28

Layout 40 mil

1231 SI

C378
1

C379

R229
100KR2J-1-GP

SC4D7U10V5KX-1GP

DY
1

FILTER-79-GP

R220
100KR2J-1-GP

2
3

DY

USB20_P10

L_BKLTCTL 7

0R2J-2-GP

EC50
SCD1U25V3ZY-1GP

USB_10-

TR1

19

DY

BRIGHTNESS 30

S
2
0R2J-2-GP

4
1

2
0R3-0-U-GP
Q20 DY
AO3403-GP

R27
1

0R2J-2-GP
1

R551

2N7002DW-1-GP
1

USB20_N10

R230
100KR2J-1-GP

19

R224

R1

PDTA124EU-1-GP

R222

SATA_LED#

SCD1U16V2KX-3GP

R2
18

BRIGHTNESS_CONN

SC

of

42

+3VS_CK505

+3VS

+3VS_CK505_IO

L3
+3VS_CK505

DY1

SRC-5_EN/PCI-3

19

CLK48_ICH

25

CLK48_5158

R332
10KR2J-3-GP

R351

R352
1

33R2J-2-GP
2 FSA

3
2

VDD96_IO
VDDPLL3_IO
VDDSRC_IO
VDDSRC_IO
VDDSRC_IO
VDDCPU_IO

61
60

CLK_CPU_BCLK1
CLK_CPU_BCLK1#

CPUT1_F
CPUC1_F

58
57

CLK_MCH_BCLK1
CLK_MCH_BCLK1#

CPUT2_ITP/SRCT8
CPUC2_ITP/SRCC8

54
53

CLK_CPU_XDP1
CLK_CPU_XDP1#

SRCT7/CR#_F
SRCC7/CR#_E

51
50

CLK_PCIE_LAN1
CLK_PCIE_LAN1#

SRCT6
SRCC6

48
47

CLK_PCIE_MINI1_1
CLK_PCIE_MINI1_1#

CPUT0
CPUC0

4
16
9
46
62
23

X1
X2

17

USB_48MHZ/FSLA

45
44

PCI_STOP#
CPU_STOP#

33R2J-2-GP

STP_PCI#
STP_CPU#

R80
R81
R82
R83
R84
R85
R86
R87
R88
R91

19
19

7
6

12,13,21,26 ICH_SMBCLK
12,13,21,26 ICH_SMBDATA
C

19

SRCT10
SRCC10

41
42

SRCT11/CR#_H
SRCC11/CR#_G

40
39

SRCT9
SRCC9

37
38

SRCT4
SRCC4

34
35

CLK_MCH_3GPLL1
CLK_MCH_3GPLL1#

SRCT3/CR#_C
SRCC3/CR#_D

31
32

CLK_PCIE_ICH1
CLK_PCIE_ICH1#

SRCT2/SATAT
SRCC2/SATAC

28
29

27MHZ_NONSS/SRCT1/SE1
27MHZ_SS/SRCC1/SE2

SCLK
SDATA

63

CK_PWRGD

CK_PWRGD/PD#

+3VS
19 CLK_SATA_OE#
7 MCH_CLK_REQ#
27 PCLK_FWH

R325 1
R168 1

2 475R2F-L1-GP
2 33R2J-2-GP

30
17

R112 1
R116 1

2 33R2J-2-GP
2 22R2J-2-GP

CLK_PCI_KBC
PCLK_ICH

PCI2_TME
SRC-5_EN/PCI-3
27_SEL
ITP_EN

8
10
11
12
13
14

PCI0/CR#_A
PCI1/CR#_B
PCI2/TME
PCI3
PCI4/27_SELECT
PCI_F5/ITP_EN

64
5

FSLB/TEST_MODE
REF0/FSLC/TEST_SEL

55

NC#55

1
2

1
2

1
2

1
1
1
1
1
1
1
1

2
2 0R2J-2-GP
0R2J-2-GP
2
2 0R2J-2-GP
0R2J-2-GP
2
2 0R2J-2-GP
0R2J-2-GP

CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3
CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6
CLK_CPU_XDP 3
CLK_CPU_XDP# 3

2
2 0R2J-2-GP
0R2J-2-GP
2
2 0R2J-2-GP
0R2J-2-GP

CLK_PCIE_LAN 23
CLK_PCIE_LAN# 23
CLK_PCIE_MINI1 26
CLK_PCIE_MINI1# 26

1
R109 1
R110
1
R133 1
R134

2
2 0R2J-2-GP
0R2J-2-GP
2
2 0R2J-2-GP
0R2J-2-GP

CLK_PCIE_SATA1
CLK_PCIE_SATA1#

1
R131 1
R132

2
2 0R2J-2-GP
0R2J-2-GP

24
25

MCH_SSCDREFCLK1
MCH_SSCDREFCLK1#

20
21

CLK_MCH_DREFCLK1
CLK_MCH_DREFCLK1#

1
R129 1
R130
1
R127 1
R128

2
2 0R2J-2-GP
0R2J-2-GP
2
2 0R2J-2-GP
0R2J-2-GP

CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7
CLK_PCIE_ICH 19
CLK_PCIE_ICH# 19

GND48
GNDPCI
GNDREF

C202
1

C203
1

C186
1

+3VS_CK505

R330
10KR2J-3-GP

ICS9LPRS355BKLFT-GP

CPU

1
1
1
0
0

100M
133M
166M
200M
266M

DY

R335
10KR2J-3-GP

27_SEL
R336
10KR2J-3-GP

R315
56R2J-4-GP

FS_A

0
0
1
1
0

FS_B

1
0
0
0
0

FS_C
+1.05VS

R354
DY R328
DY
0R2J-2-GP
0R2J-2-GP

ITP_EN

+1.05VS

DY
R340
10KR2J-3-GP

Output

ITP_EN

0
1

SRC8
CPU_ITP

CPU_BSEL2

R319

CPU_BSEL1

R321

CPU_BSEL0

R356

CLK_BSEL2
0R2J-2-GP

R317
CLK_BSEL1

0R2J-2-GP

R320
CLK_BSEL0

0R2J-2-GP

R353

R341
10KR2J-3-GP

1KR2J-1-GP

1. All of Input pin didn't have internal pull up resistor.


2. Clock Request (CR) function are enable by registers.
3. CY28548 integrated serial resistor of differential clock,
so put 0 ohm serial resistor in the schematic.

FSC
10KR2J-3-GP
FSB

27_SEL

PIN 20

PIN 21

0
1

DOT96T
SRCT0

DOT96C
SRCC0

1KR2J-1-GP

DY

FSA

2 1KR2J-1-GP

MCH_CLKSEL2 3,7

R327 1

2 1KR2J-1-GP

MCH_CLKSEL1 3,7

R357 1

2 2K2R2J-2-GP

MCH_CLKSEL0 3,7

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

R314
1KR2J-1-GP

Title

Clock Generator ICS9LPRS355


Size

Document Number

Rev

SC

Warrior
Date: Monday, January 07, 2008

PIN 25
SRCT1/LCDT_100
27M_SS

2K2R2J-2-GP

R318 1

DY R324

PIN 24
SRCT1/LCDT_100
27M_NSS

0R2J-2-GP

DY R367

Design Note:

DREFCLK 7
DREFCLK# 7

+3VS_CK505

+1.05VS
+3VS_CK505

SRCT0/DOTT_96
SRCC0/DOTC_96

DREFSSCLK 7
DREFSSCLK# 7

DY

ICS
71.09355.B03
Realtek 71.00875.003

DY
SC4D7P50V2CN-1GP

PCI2_TME

SC4D7P50V2CN-1GP

R329
10KR2J-3-GP

DY
SC4D7P50V2CN-1GP

DY

GND

2
33R2J-2-GP

CLK_PCIE_SATA 18
CLK_PCIE_SATA# 18

65

CLK_ICH14

GND
GNDSRC
GNDSRC
GNDSRC
GNDCPU
GND

19

FSB
FSC

22
30
36
49
59
26

R99

DY

1
1

MCH_CLK_REQ#

18
15
1

R326
10KR2J-3-GP

1
2
CLK_XTAL_IN
CLK_XTAL_OUT

C522 SC4D7P50V2CN-1GP

19
27
43
52
33
56

1
2

1
2

VDDREF
VDD48
VDDPCI
VDDSRC
VDDCPU
VDDPLL3

PCI_STOP#/CPU_STOP#
SRC5

1
2

1
2

PIN44,45

0
1

C217
SC10U10V5ZY-1GP

C174
SC27P50V2JN-2-GP
U21

C493
SCD1U16V2ZY-2GP

C180
SC27P50V2JN-2-GP

DY

C494
SCD1U16V2ZY-2GP

CLK_XTAL_OUT

C509
SCD1U16V2ZY-2GP

X-14D31818M-40GP

C506
SCD1U16V2ZY-2GP

X1
CLK_XTAL_IN

C512
SCD1U16V2ZY-2GP

SRC-5_EN/PCI-3

C191
SC10U10V5ZY-1GP

1
2
MLB-160808-18-GP

R331
10KR2J-3-GP

L2

+3VS_CK505_IO

C496
SCD1U16V2ZY-2GP

C507
SCD1U16V2ZY-2GP

DY

DY

C505
SCD1U16V2ZY-2GP

+3VS_CK505

C502
SCD1U16V2ZY-2GP

C495
SCD1U16V2ZY-2GP

DY

C492
SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP

C214

1
2
MLB-160808-18-GP

+3VS

Sheet
1

16

of

42

+3VS
RN34
1
2
3
4
D

8
7
6
5

PCI_TRDY#
PCI_FRAME#
INT_PIRQD#
PCI_REQ3#
2 OF 6

1
2
3
4

8
7
6
5

U60B

1227 SI

SRN8K2J-4-GP
RN53

D11
C8
D9
E12
E9
C9
E10
B7
C7
C5
G11
F8
F11
E7
A3
D2
F10
D5
D10
B3
F7
C3
F3
F4
C1
G7
H7
D1
G5
H6
G1
H3

PCI_PLOCK#
PCI_IRDY#
PCI_SERR#
INT_PIRQB#

SRN8K2J-4-GP
RN54
1
2
3
4

8
7
6
5

PCI_PERR#
PCI_REQ0#
INT_PIRQG#
INT_PIRQH#

SRN8K2J-4-GP
RN35

DY

1
2
3
4

8
7
6
5

1227 SI

SRN8K2J-4-GP
C

RN30
1
2
3
4

8
7
6
5

PCI_REQ2#
PCI_REQ1#
PCI_STOP#
PCI_DEVSEL#

INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#

SRN8K2J-4-GP
RN31

J5
E1
J6
C4

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

F1
G4
B6
A7
F13
F12
E6
F6

REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55

PCI

PCI_REQ0#
PCI_GNT0#
PCI_REQ1#
PCI_REQ2#
PCI_REQ3#
PCI_GNT3#

C/BE0#
C/BE1#
C/BE2#
C/BE3#

D8
B4
D6
A5

IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#

D3
E3
R1
C6
E4
C2
J4
A4
F5
D7

PCI_IRDY#

PLTRST#
PCICLK
PME#

C14
D4
R2

PCI_PLTRST#

PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#

PCLK_ICH 16
C

ICH_PME#

Interrupt I/F

PIRQA#
PIRQB#
PIRQC#
PIRQD#

H4
K6
F2
G2

PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

TP64

INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
INT_PIRQH#

ICH9M-GP-NF

1
2
3
4

8
7
6
5

INT_PIRQC#
INT_PIRQA#
INT_PIRQF#
INT_PIRQE#

SRN8K2J-4-GP

19

PCI_GNT0#
1
R148
1
R114
PCI_GNT3#
1
R146

SPI_CS#1

DY

DY

DY

1KR2J-1-GP
1KR2J-1-GP

USE LPC
B

1KR2J-1-GP

+3VALW

U23

BOOT BIOS Strap


PCI_GNT#0 SPI_CS#1

PCI_PLTRST#

BOOT BIOS Location

SPI

PCI

LPC(Default)

VCC

PLT_RST#

PLT_RST# 7,23,26,27,30

GND
74LVC1G08GW-1-GP

DY

A16 swap override strap


PCI_GNT#3

R141

low = A16 swap override enable


high = default

0R2J-2-GP

<Core Design>

om

nf
@
ho
tm
ai
l.c

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ICH9-M (1 of 5)

Date: Monday, January 07, 2008


5

Warrior

Rev

SC

ai

Document Number

he
x

Size

Sheet
1

17

of

42

+RTCVCC
ICH_RTCX1
+RTCVCC

ICH_RTCX2
2
10MR2J-L-GP

1
R111

1MR2J-1-GP
1
R334
R119

1224 SI

2
20KR2J-L2-GP
1

ICH_INTVRMEN

+RTCVCC
U60A

2
20KR2J-L2-GP

SRTCRST# new signal Pin

R322

82.30001.731 EPSON MC-306


32.768Khz 6pf 10ppm

C23
C24

RTCX1
RTCX2

ICH_RTCRST#
SRTCRST#
SM_INTRUDER#

A25
F20
C22

RTCRST#
SRTCRST#
INTRUDER#

ICH_INTVRMEN

B22
A22

INTVRMEN
LAN100_SLP

E25

GLAN_CLK

LPC_AD[0..3]

1 OF 6
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

K5
K4
L6
K2

FWH4/LFRAME#

K3

LDRQ0#
LDRQ1#/GPIO23

J3
J1

+1.5VS

1
R100
ACZ_BIT_CLK
ACZ_SYNC_R
8
7
6
5

SRN33J-4-GP

22
22
22
22

SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0

ODD

22
22
22
22

SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1

GLAN_COMPI
GLAN_COMPO

AF4
AG4
AH3
AE5

HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3

AG5

HDA_SDOUT

AG7
AE8

HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO34

SATA_LED#

AG8

SATALED#

C236 1
C230 1

AJ16
AH16
2 SCD01U50V2KX-1GP SATA_TXN0_C AF17
2 SCD01U50V2KX-1GP SATA_TXP0_C AG17

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

C240 1
C245 1

AH13
AJ13
2 SCD01U50V2KX-1GP SATA_TXN1_C AG14
2 SCD01U50V2KX-1GP SATA_TXP1_C AF14

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

N7
AJ27

DPRSTP#
DPSLP#

AJ25
AE23

27,30

+3VS

LPC_FRAME# 27,30
R375
GPIO23

TP61 TPAD30 1
2
10KR2J-3-GP

+1.05VS

KA20GATE 30
H_A20M# 3
H_DPRSTP#

R105
56R2J-4-GP

H_DPRSTP# 4,7,36
H_DPSLP# 4
2

B28
B27

HDA_RST#

HDA_SDIN2

HDD

GLAN_DOCK#/GPIO56

HDA_BIT_CLK
HDA_SYNC

HDA_SDIN0
TP35

SATA_LED#

B10

AE7

ACZ_SDATAOUT_R

15

LAN_TXD0
LAN_TXD1
LAN_TXD2

AF6
AH4
ACZ_RST#_R

28

D13
D12
E13

H_FERR#_R

FERR#

AJ26

CPUPWRGD

AD22

H_PWRGD 4

IGNNE#

AF25

H_IGNNE# 3

INIT#
INTR
RCIN#

AE22
AG25
L3

H_INIT# 3
H_INTR 3

NMI
SMI#

AF23
AF24

H_NMI

STPCLK#

AH27

H_STPCLK# 3

THRMTRIP#

AG26

PECI

AG27

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

AH11
AJ11
AG12
AF12

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

AH9
AJ9
AE10
AF10

SATA_CLKN
SATA_CLKP

AH18
AJ18

SATARBIAS#
SATARBIAS

AJ7
AH7

IHDA

1
2
3
4

HDA_RST#_CODEC
HDA_BITCLK_CODEC
HDA_SYNC_CODEC
HDA_SDOUT_CODEC

LAN_RXD0
LAN_RXD1
LAN_RXD2

1
R103

2
56R2J-4-GP

H_FERR# 3
+3VS
R359

2 10KR2J-3-GP

KBRCIN# 30
+1.05VS

R108

H_SMI# 3

H_THERMTRIP_R

1
2
56R2J-4-GP

1
2
R106
54D9R2F-L1-GP

PM_THRMTRIP-A# 3,7

Placed Within 2" from

SATA

RN32
7,28
7,28
7,28
7,28

2 GLAN_COMP
24D9R2F-L-GP

LAN_RSTSYNC

F14
G13
D14

LAN / GLAN
CPU

GLAN_COMP place within 500 mil of ICH9M

C13

A20GATE
A20M#

LPC_AD[0..3]

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

C497
SC1U10V3KX-3GP

G96
GAP-OPEN

ICH_RTCX1
ICH_RTCX2

C204

C210
SC1U10V3KX-3GP

SM_INTRUDER#

C195

4
SC7P50V2DN-2GP

SC7P50V2DN-2GP

330KR2F-L-GP
1
2
R339

RTC
LPC

X3
X-32D768KHZ-41GP

ICH9

CLK_PCIE_SATA# 16
CLK_PCIE_SATA 16
SATARBIAS
2
24D9R2F-L-GP

1
R145

Place within 500 mils of


ICH9 ball

ICH9M-GP-NF

+3VL
+RTCVCC

U31

1
R160

W=20mils

RTC_PWR_L
0R2J-2-GP

3
2

R159
RTC_PWR

1
CH715FPT-GP

C285
SC1U10V3ZY-6GP

RTC1

BATT1.1

W=20mils

W=20mils

1
4

1KR2J-1-GP

W=20mils

ACES-CON3-GP-U

20.F0714.003

<Core Design>
A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

integrated VccSus1_05,VccSus1_5,VccCL1_5

INTVRMEN

High=Enable

Low=Disable

Title

integrated VccLan1_05VccCL1_05

LAN100_SLP

High=Enable

Low=Disable

Size

Document Number

ICH9-M (2 of 5)

Date: Monday, January 07, 2008


5

Rev

SC

Warrior

Sheet

18
1

of

42

2
1

3
4

R449

2
DY 1KR2J-1-GP

MX25L512MC-12G-GP

SPI_CLK
SPI_MOSI
30
30

64KB Flash ROM


72.25512.E01

+3VS

+3VS
16

EC_SCI#

EC_SCI#
EC_SWI#

C555
SCD1U16V2ZY-2GP

DY
2

Please populate close ICH9

2 ICH_TP7
DY 0R2J-2-GP

R137

2 8K2R2J-3-GP

CLK_SATA_OE#

R430

TP56

GPIO12

TP29
TP62
TP33
TP23
TP58
TP27

GPIO17
GPIO18
GPIO20
GPIO22
GPIO27
GPIO28
GPIO38

TP30
TP24
TP26
TP25

Norn connect to charger


4 OF 6
U60D

PCIE_RXN2
PCIE_RXP2
PCIE_TXN2
PCIE_TXP2

C486
C485

PCIE_RXN2
PCIE_RXP2
SCD1U10V2KX-5GP 2
SCD1U10V2KX-5GP 2

1
1

TXN2
TXP2

L29
L28
M27
M26

PERN2
PERP2
PETN2
PETP2

J29
J28
K27
K26

SPI_CLK
SPI_CS#0
17

SPI_MOSI
SPI_MOSO

G29
G28
H27
H26

PERN4
PERP4
PETN4
PETP4

E29
E28
F27
F26

PERN5
PERP5
PETN5
PETP5

C29
C28
D27
D26

PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP

R450 1
R451 1

2 15R2J-GP
2 15R2J-GP

SPI_CLK_R
SPI_CS#0_R
SPI_CS#1

R452 1
R453 1

2 15R2J-GP
2 15R2J-GP

SPI_MOSI_R D25
SPI_MOSO_R E23

SPI_CS#1

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
USB_OC#8
USB_OC#9
USB_OC#10
USB_OC#11

R428

2
22R2J-2-GP

PERN3
PERP3
PETN3
PETP3

D23
D24
F23

N4
N5
N6
P6
M1
N2
M4
M3
N3
N1
P5
P3

USB_RBIAS_PN AG2
AG1

DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0

7
7
7
7

DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP

Y27
Y26
W29
W28

DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1

7
7
7
7

DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP

AB27
AB26
AA29
AA28

DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2

7
7
7
7

DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

AD27
AD26
AC29
AC28

DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3

7
7
7
7

T26
T25

CLK_PCIE_ICH# 16
CLK_PCIE_ICH 16

AF29
AF28

DMI_IRCOMP_R

DMI_CLKN
DMI_CLKP

DMI_ZCOMP
DMI_IRCOMP

USBP0N
USBP0P
USBP1N
USBP1P
SPI_CLK
USBP2N
SPI_CS0#
USBP2P
SPI_CS1#/GPIO58/CLGPIO6 USBP3N
USBP3P
SPI_MOSI
USBP4N
SPI_MISO
USBP4P
USBP5N
OC0#/GPIO59
USBP5P
OC1#/GPIO40
USBP6N
OC2#/GPIO41
USBP6P
OC3#/GPIO42
USBP7N
OC4#/GPIO43
USBP7P
OC5#/GPIO29
USBP8N
OC6#/GPIO30
USBP8P
OC7#/GPIO31
USBP9N
OC8#/GPIO44
USBP9P
OC9#/GPIO45
USBP10N
OC10#/GPIO46
USBP10P
OC11#/GPIO47
USBP11N
USBP11P
USBRBIAS
USBRBIAS#

SPI

WLAN

V27
V26
U29
U28

USB

AC5
AC4
AD3
AD2
AC1
AC2
AA5
AA4
AB2
AB3
AA1
AA2
W5
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2

TPAD30

M7
AJ24
B21
AH20
AJ20
AJ21

ICH_TP3
TP28

SPKR
MCH_SYNC#
TP3
PWM0
PWM1
PWM2

2
R139

RSMRST#

D22

CK_PWRGD

R5

CLPWROK

R6

SLP_M#

B16

CL_CLK0
CL_CLK1

F24
B19

CL_DATA0
CL_DATA1

F22
C19

CL_VREF0
CL_VREF1

C25
A19

SATA
GPIO

CL_RST0#
CL_RST1#

F21
D18

GPIO24/MEM_LED
GPIO10/SUS_PWR_ACK
GPIO14/AC_PRESENT
GPIO9/WOL_EN

A16
C18
C11
C20

CK_PWRGD

PM_SLP_M#

2
DY 0R2J-2-GP

ALL_PWRGD 36,38,39,40

TP55
+3VS

CL_CLK0 7

R310
3K24R2F-GP

CL_DATA0 7
CL_VREF0_ICH
CL_VREF1_ICH
CL_RST#0

7
+3VALW

GPIO24

TP54
R348

R311
10KR2J-3-GP
+1.5VS

R309
453R2F-1-GP

R349
453R2F-1-GP

VRMPWRGD
R313
24D9R2F-L-GP

RP1
USB_OC#8
USB_OC#3
ICH_RI#
XDP_DBRESET#

Q7
2N7002-11-GP

USB3

USB20_N2 22
USB20_P2 22

External USB3

36

CLK_EN#

External USB2
+3VS

26
26
22
22
25
25

USB20_N10 15
USB20_P10 15

WLAN
Bluetooth

GPIO22
R107

Card Reader

DY

2
8K2R2J-3-GP

CAM
+3VS

RN55
GPIO18
SIRQ

+3VALW

USB
Pair

USB20_N4 22
USB20_P4 22

ICH9M-GP-NF

4
3

1
2

1
2
3
4
5

+3VALW

10
9
8
7
6

PM_BATLOW#_R
SMB_ALERT#
USB_OC#10
USB_OC#9

10
9
8
7
6

USB_OC#0
USB_OC#1
USB_OC#6
USB_OC#2

SRN10KJ-L3-GP

Device

USB3

FREE

External USB3

FREE

External USB2

FREE

WLAN

BLUETOOTH

CARD READER

FREE

10

CAMERA

11

FREE

RP2
USB_OC#7
USB_OC#11
USB_OC#5
USB_OC#4
+3VALW

1
2
3
4
5

+3VALW

SRN10KJ-L3-GP
A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Date:

16
1
M_PWROK 7 R142

M_PWROK

ICH9M-GP-NF

SRN10KJ-5-GP

1
0R2J-2-GP
RSMRST#_SB 33

+3VS

USB20_N0 22
USB20_P0 22

USB20_N6
USB20_P6
USB20_N7
USB20_P7
USB20_N8
USB20_P8

PWRBTN#_SB 30

D20 LAN_RST#1

26
26
26
26

28
SB_SPKR
7 MCH_ICH_SYNC#

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP

R3

PERN1
PERP1
PETN1
PETP1

PWRBTN#
LAN_RST#

N29
N28
P27
P26

TACH1/GPIO1
TACH2/GPIO6
TACH3/GPIO7
GPIO8
LAN_PHY_PWR_CTRL/GPIO12
ENERGY_DETECT/GPIO13
TACH0/GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
GPIO27
GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
GPIO49
GPIO57/CLGPIO5

B13

TXN1
TXP1

AG19
AH21
AG21
A21
C12
C21
AE18
K1
AF8
AJ22
A9
D19
L1
AE19
AG22
AF21
AH24
A8

1
1

SST

PCIE_RXN1
PCIE_RXP1
SCD1U10V2KX-5GP 2
SCD1U10V2KX-5GP 2

A20

M2

BATLOW#

C488
C487

PCI-Express

PCIE_RXN1
PCIE_RXP1
PCIE_TXN1
PCIE_TXP1

Direct Media Interface

LAN

23
23
23
23

VRMPWRGD

DPRSLPVR/GPIO16

om

1
R338

D21

G20

Document Number

nf
@
ho
tm
ai
l.c

SPI_HOLD#

10KR2J-3-GP
1

8
7
6
5

VCC
HOLD#
SCLK
SI

WAKE#
SERIRQ
THRM#

C10

PWROK

24

PM_SLP_S3# 23,24,30,33,39,40,41
PM_SLP_S4# 30,31,33,39
PM_SLP_S5#
1
2
TP180
R138
1206 SI
10KR2J-3-GP
GPIO26
TP57
PM_PWROK
PM_PWROK 7,33
R438
M_PWROK
1
2
0R2J-2-GP
PM_DPRSLPVR 7,36
R431 1
DY 2
PM_BATLOW#_R
100KR2J-1-GP

VRMPWRGD

CS#
SO
WP#
GND

CLKRUN#

E20
M5
AJ23

S4_STATE#/GPIO26

ICH_SUSCLK

1 2

PCIE_WAKE#
30 SIRQ
24 THERM_SCI#

1
2
3
4

STP_PCI#
STP_CPU#

L4
PCIE_WAKE#
SIRQ

1218 SI23,26,30

2
DY 1KR2J-1-GP

DY U63
SPI_CS#0
SPI_MOSO

SMBALERT#/GPIO11

A14
E19

ICH_SUSCLK

STP_PCI#
STP_CPU#

PMSYNC#/GPIO0

A17

C16
E16
G17

ICH9-M (2 of 5)

Monday, January 07, 2008

Warrior

Sheet

19

ai

16
16

SMB_ALERT#
TPAD30
STP_PCI#
STP_CPU#

P1

SRN10KJ-6-GP

16
16

he
x

30 PM_CLKRUN#

R448
SPI_WP#

TP53

1231 SI

PM_SYNC#

SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#

CLK_ICH14
CLK48_ICH

R360
8K2R2J-3-GP

SUS_STAT#/LPCPD#
SYS_RESET#

M6

H1
AF3

C484
SCD1U10V2KX-4GP
2

GPIO11 Reserved for future

10KR2J-3-GP

R4
G19

CLK14
CLK48

8
7
6
5

3K24R2F-GP

+3VS

PCIE_WAKE#

+3VS

XDP_DBRESET#

3 XDP_DBRESET#

R169

RI#

1
2
3
4

+3VALW

F19

SATA1GP
SATA3GP
SATA2GP
SATA0GP

ICH_RI#

1218 SI

SATA0GP
SATA1GP
SATA2GP
SATA3GP

Please populate on the U63

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37

AH23
AF19
AE21
AD20

C511
SCD1U10V2KX-4GP
2
1

RN29

SMB

21 ICH_SMB_CLK
21 ICH_SMB_DATA

+3VS

3 OF 6
U60C
G16 SMBCLK
A13 SMBDATA
E17 LINKALERT#/GPIO60/CLGPIO4
C17 SMLINK0
B18 SMLINK1

ICH_SMB_CLK
ICH_SMB_DATA
LINKALERT#
ME_EC_CLK1
ME_EC_DATA1

STP_PCI#
STP_CPU#

W25X16VSSIG-GP

SRN2K2J-1-GP

Clocks

SRN10KJ-5-GP

SPI_HOLD#
SPI_CLK
SPI_MOSI

3
4

8
7
6
5

SYS GPIO
Power MGT

4
3

VCC
HOLD#
CLK
DIO

RN27
R140
10KR2J-3-GP

CS#
DO
WP#
GND

RN52
SRN10KJ-5-GP

RN48

DY
2
1

1
2
3
4

+3VS

1
2

SPI_CS#0
SPI_MOSO
SPI_WP#

+3VS

DY

+3VALW

+3VALW

72.25X16.001 (2M Flash ROM)


U75

+3VALW

MISC
GPIO
Controller Link

Rev

of

42

SC

C173
VCC_GLAN_PLL

1mA
1

R306

DY

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
1

1
2

18mA

C550

C258

177mA

+3VALW

R538
2

1
0R3-0-U-GP

C549
SCD022U16V2KX-3GP

1
R540

SB_VCCCL3_3

DY
2

C268

C260

DY

C259

1
0R3-0-U-GP

+3VS
1
0R3-0-U-GP

DY

C207

DY

C206

C218

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

VCCGLAN3_3
ICH9M-GP-NF
Title

3D3V_GLAN_S0

ICH9 (3/5)
Size

0R3-0-U-GP

Document Number

Rev

Warrior
Date: Friday, January 04, 2008

1
0R3-0-U-GP

C269
SCD1U10V2KX-4GP

+3VALW

VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5

+1.5VS

R536
2

VCCGLANPLL

SC4D7U6D3V3MX-2GP

C273
SCD1U10V2KX-4GP

C229
SCD1U10V2KX-4GP

A27
D28
D29
E26
E27

C227

2
+1.5VS
R143 0R3-0-U-GP

DY

A24
B24

VCCLAN3_3
VCCLAN3_3

TP31

VCCCL3_3
VCCCL3_3

A12
B12

R534

C208

+1.5VS

32mA

TP34

1
1

G23 VCCSUS1_5[3]

VCCLAN1_05
VCCLAN1_05

32mA

2
1

G22 VCCSUS1_05[3]

VCCCL1_5

A10
A11

SB_VCCHDA

SCD1U10V2KX-4GP

C265

C205

1
0R3-0-U-GP

T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7

VCCCL1_05

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

1
2

AF1

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCCUSBPLL

CORE

1
2

VCCSUS3_3

AC12
AC13
AC14
AJ5

C198
1
0R3-0-U-GP

SB_VCCSUS3_3

VCC1_5_A
VCC1_5_A

AA7
AB6
AB7
AC6
AC7

C254
VCCLAN1D05
1
SCD1U10V2KX-4GP

A18
D16
D17
E22

1
2

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

VCCSUS1_5[2]

VCC1_5_A

F18

G10
G9

A26
+3VS

AD8 VCCSUS1_5[1] 1

VCCSUS1_5

AC21

VCC1_5_A
VCC1_5_A

VCCSUS1_5

1D5V_USB_S0

AC18
AC19

VCCSUS1_05[1]
VCCSUS1_05[2]

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

1
2

SC2D2U10V3KX-1GP

1
2

1
2

1
2

VCC1_5_A

R533
S/B_PCI_VCCP_CORE_S0
C255
C246

1
0R3-0-U-GP

+1.05VS

R531
2

SCD1U10V2KX-5GP

AC9

+3VS

SCD1U10V2KX-5GP

C235

DY

SCD1U10V2KX-4GP

C234
SC4D7U6D3V3KX-GP

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

1mA

VCC3_3=278mA

SC1U6D3V2ZY-GP

80mA

AC11
AD11
AE11
AF11
AG10
AG11
AH10
AJ10

+1.05VS

1
0R3-0-U-GP

GLAN POWER

+1.5VS

C187

SC10U6D3V5MX-3GP

23mA

L1
2
1
IND-1D2UH-5-GP

AC8
F17

+3VS
2
1
0R3-0-U-GP
C257
SCD1U10V2KX-4GP

2
+3VS

SCD1U16V2KX-3GP

DY+1.5VS

VCCSUS1_05
VCCSUS1_05

USB CORE

C525
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SB_VCCLAN3_3

SCD1U10V2KX-4GP

18mA in S0;50mA in S3/S4/S5


1
0R3-0-U-GP
C528

SCD1U10V2KX-4GP

DY

C267

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

3D3V_VCCPCORE_ICH_S0

SCD1U10V2KX-4GP

C266

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

R539
2

C247

USBPLL=10mA

0R3-0-U-GP
R144
2
1

C256
SCD1U10V2KX-4GP
+3VS

SB_VCC_1_5_A

C221

+1.5VS

0R3-0-U-GP
R537
1

AC16
AD15
AD16
AE15
AF15
AG15
AH15
AJ15

C212

SB_V_CPU_IO

SCD1U10V2KX-4GP

AJ3

50mA

R135

R102

SCD1U10V2KX-4GP

+1.5VS

VCCSUSHDA

DY

C213

SCD1U25V3ZY-1GP
EC44

C491
SC1U10V3ZY-6GP

SCD1U10V2KX-4GP

1231 SI

VCCSATAPLL

ATX

C551
SCD1U16V3KX-3GP

AJ4

SB_VCC_3_3_C

2
1

1231 SI

C238
SC1U10V3KX-3GP

C252
SC1U10V3KX-3GP

SB_SATA_USB_1_5_A

2
0R5J-5-GP

VCCHDA

ARX

R427
10R2J-2-GP

D30
CH751H-40PT

V5REF_S5

SATA+USB=1.56A

R535

VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3

B9
F9
G3
G6
J2
J7
K7

C209

C490
SC10U6D3V5MX-3GP

R532

+5VALW
+1.5VS

1mA

+3VALW

VCC3_3
VCC3_3
VCC3_3
VCC3_3

AD19
AF20
AG24
AC20

VCCP_CORE

1
2

2
1
1
2
Layout Note:
Place near ICH8

AJ19

AC10

VCCDMI

+1.5VS

2
1
IND-1D2UH-5-GP
L28

SCD1U10V2KX-4GP

1231 SI
C263
SC1U10V3KX-3GP

VCC3_3

C489
SCD01U16V2KX-3GP

SCD1U10V2KX-4GP

V5REF_S0

AJ6

C239

23mA

1D5V_DMIPLL_ICH_S0
1D5V_DMIPLL_ICH_S0

SCD1U10V2KX-4GP

D12
CH751H-40PT

VCC3_3

DY

1
0R3-0-U-GP

SCD1U10V2KX-4GP

1mA

R147
10R2J-2-GP

VCC3_3

AG29

C233

DY

SCD1U10V2KX-4GP

+5VS

AB23
AC23

VCCA3GP

SC10U6D3V5MX-3GP

+3VS
C

SC1U10V3ZY-6GP

*Within a given well, 5VREF needs to be up before the


corresponding 3.3V rail

C222

W23
Y23

V_CPU_IO
V_CPU_IO

PCI

1
2

C223

R29

VCCDMI
VCCDMI

C225

DY

SC4D7U6D3V3MX-2GP

+1.5VS_APLL

L4

1
2
IND-1D2UH-5-GP

VCCDMIPLL

C248

SC10U6D3V5MX-3GP

+1.5VS

VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B

C231

SCD1U10V2KX-4GP

47mA

AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29
F25
G25
H24
H25
J24
J25
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T24
T27
T28
T29
U24
U25
V24
V25
U23
W24
W25
K23
Y24
Y25

VCCPSUS

C199
SC2D2U10V3KX-1GP

C483
SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

DY

C482

TC10
ST220U2D5VBM-LGP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

C188

DY
2

C197

2
0R5J-5-GP

V5REF_SUS

+1.05VS

R530
SB_VCC1_05
SCD1U10V2KX-4GP

AE1

Layout Note: Place near ICH9M

SCD1U10V2KX-4GP

V5REF_S5

V5REF

A15
B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

SCD1U10V2KX-4GP

R305
1

A6

VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05

SCD1U10V2KX-4GP

+1.5VS_PCIE

V5REF_S0

VCCRTC

SCD1U10V2KX-4GP

657mA

C503
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

+1.5VS

C501

U60F
A23

6uA in G3

VCCPUSB

+RTCVCC

1.13A

6 OF 6

Sheet
1

SC
20

of

42

5 OF 6
U60E

3
4

A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29

RN28
SRN2K2J-1-GP

+3VS

U17
12,13,16,26 ICH_SMBDATA

19

ICH_SMB_CLK

ICH_SMB_CLK

ICH_SMB_DATA

ICH_SMB_DATA 19

ICH_SMBCLK 12,13,16,26

2N7002DW-7F-GP

SMBUS
C

ICH_GND1

TP60

ICH_GND2

TP51

ICH_GND3

TP63

ICH_GND4

TP52

om

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

+3VS

NCTF PIN

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ICH9-M (4 of 4)
Size

Document Number

ICH9M-GP-NF

Rev

Warrior
Date: Monday, January 07, 2008

nf
@
ho
tm
ai
l.c

H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25

SC

ai

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

he
x

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

2
1

AA26
AA27
AA3
AA6
AB1
AA23
AB28
AB29
AB4
AB5
AC17
AC26
AC27
AC3
AD1
AD10
AD12
AD13
AD14
AD17
AD18
AD21
AD28
AD29
AD4
AD5
AD6
AD7
AD9
AE12
AE13
AE14
AE16
AE17
AE2
AE20
AE24
AE3
AE4
AE6
AE9
AF13
AF16
AF18
AF22
AH26
AF26
AF27
AF5
AF7
AF9
AG13
AG16
AG18
AG20
AG23
AG3
AG6
AG9
AH12
AH14
AH17
AH19
AH2
AH22
AH25
AH28
AH5
AH8
AJ12
AJ14
AJ17
AJ8
B11
B14
B17
B2
B20
B23
B5
B8
C26
C27
E11
E14
E18
E2
E21
E24
E5
E8
F16
F28
F29
G12
G14
G18
G21
G24
G26
G27
G8
H2
H23
H28
H29

Sheet
1

21

of

42

USB PORT
+5V_USB2

R381
1

USB20_N0

8
6
1

TC19
ST100U6D3VBM-8GP

C518

C521

DY

SCD1U16V2ZY-2GP SC1000P50V3JN-GP

FILTER-79-GP

19

USB20_P0

USB0+

18 SATA_TXP0
18 SATA_TXN0
SKT-USB-131-GP-U

18 SATA_RXN0
18 SATA_RXP0

0R2J-2-GP

+5V_USB1

2
1

100 mil

FUSE-2A8V-3GP

C360
SCD1U16V2ZY-2GP

+5V_USB1

TP99 TP28-75-GP

USB20_N4

TP98 TP28-75-GP

USB20_P4

TP100 TP28-75-GP

USB20_N2

TP97 TP28-75-GP

USB20_P2

TP103 TP28-75-GP

GND

TP102 TP28-75-GP

+5VS

USB20_N0

1
2
3

ESD I/O1
GND
ESD I/O2

6
5
4

NUMLK_LED_PWM 1

TP101 TP28-75-GP

GND

TP105 TP28-75-GP

GND

TP169 TP28-75-GP

2
3
4
5
6
7
8
9
10

11

19
19
19
19

USB20_N4
USB20_P4
USB20_N2
USB20_P2

+5V

DY

R469
NUMLK_LED#

NUMLK_LED#

+5VS

NUMLK_LED_PWM

EC47

C540

C541

FOX-CON22-3-GP-U1

0103 SI

ODD Connector
12

330R2J-3-GP

C194
SCD1U10V2KX-4GP

DY

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
NP2
24

+5V_USB1

USB1

30

2
3
4
5
6
7

SCD01U50V2KX-1GP
SATA_RXN0_C
SATA_RXP0_C
SCD01U50V2KX-1GP

ACES-CON10-5-GP-U
ODD1

IP4220CZ6-GP

ESD I/O4
VP
ESD I/O3

USB20_P0

2
2

+5VS

TP104 TP28-75-GP

U59

C224

1
1

SC10U10V5ZY-1GP

TP168 TP28-75-GP

SCD1U16V2ZY-2GP

SCD1U25V3ZY-1GP

+5V_USB1

F3

C220

+5V

23
NP1
1

2
3
4
5
7

R380

100 mil

HDD1

FUSE-2A8V-3GP

TR3
4

SATA HD Connector

USB3

USB0-

2
0R2J-2-GP

1212 SI

100 mil

2
1

19

F1

+5V

+5V_USB2

8
U76

BLUETOOTH

USB20_N2

1
2
3

ESD I/O1
GND
ESD I/O2

ESD I/O4
VP
ESD I/O3

+5V

USB20_P4

+5VS

DY

DY

SCD01U50V2KX-1GP
C553 1
C552 1

18 SATA_RXN1
18 SATA_RXP1

ODD_DP

USB7+

TP173 TP28-75-GP

USB7-

TP175 TP28-75-GP

BT_LED

TP172 TP28-75-GP

WL_PRIORITY

TP178 TP28-75-GP

BT_PRIORITY

TP177 TP28-75-GP

BT_DET#

TP179 TP28-75-GP

2
3
4
5
6
7
8

USB7+
USB7BT_LED 32
WL_PRIORITY 26
BT_PRIORITY 26
BT_DET# 30

EC17 EC18 EC19

10

TP59

R150

DY

NP1

P1
P2
P3
P4
P5
P6
9

NP2

SKT-SATA7P+6P-14-GP-U
2

TP174 TP28-75-GP

1
2

TP176 TP28-75-GP

TPAD30
TC20

ODD_MD

10KR2J-3-GP

GND

SCD1U16V2ZY-2GP

+3VAUX_BT

C548

SC10U10V5ZY-1GP

SCD1U25V3ZY-1GP

EC46

EC16
SCD1U16V2ZY-2GP

DY

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

MAX 150mA

1206 SI

Q29
AO3403-GP

+3VS

+3VAUX_BT

S
D

TR4
1
4

DY

FILTER-79-GP

USB20_P7

30

BT_EN#

A BT_EN#_C

R494
1

BT_EN#_1

10KR2J-3-GP

DY

1 C591

C592

DY

2
D31

1SS355PT-GP
2

C590

R401
19

R493
100KR2J-1-GP

USB7-

2
0R2J-2-GP

SC4D7U10V5KX-1GP

USB20_N7

SCD1U16V2KX-3GP

C588
SC1U10V3KX-3GP

R395
19

DY DY DY
2

ACES-CON8-4-GP-U

SATA_RXN1_C
SATA_RXP1_C
SCD01U50V2KX-1GP

C377
SCD1U10V2KX-4GP
1

+3VAUX_BT

BT1

2
2

IP4220CZ6-GP

USB20_N4

6
5
4

USB20_P2

S1
S2
S3
S4
S5
S6
S7

18 SATA_TXP1
18 SATA_TXN1

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

SCD1U16V2KX-3GP

HDD/CDROM/USB/BT

USB7+
0R2J-2-GP

Size
A3

Document Number

Date: Monday, January 07, 2008

Rev

SC

Warrior
Sheet

22

of

42

EVDD18

SCD1U16V2ZY-2GP

DVDD33
C242

C261

C264

2
0R0603-PAD

C215

C216

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

C516

SCD1U16V2ZY-2GP

1
EC54
SCD1U25V2ZY-U

SC10U6D3V5KX-1GP

C514

SCD1U16V2ZY-2GP

DVDD33

R267
1

+3V_LAN

AVDD18
C513

C515

C232

AVDD18

40 mils

2
0R3-0-U-GP

SCD1U16V2ZY-2GP

C533

0R3-0-U-GP

AVDD33

R136

2
1

EVDD18

R355

SCD1U16V2ZY-2GP

1222 SI
R441
1

+3VALW

DY 0R5J-5-GP

SCD1U16V2ZY-2GP

40 mils

C530

AO3413-GP
Q23

C475

C211

R288
1MR2J-1-GP

LAN_PY2

SCD1U16V2ZY-2GP
D

SCD1U16V2ZY-2GP

C251

SCD1U16V2ZY-2GP

C262

SCD1U16V2ZY-2GP

C228

SC10U6D3V5KX-1GP

C523 0R3-0-U-GP

EC40
SCD1U25V3ZY-1GP

DVDD15

1
2

DVDD15

R378
1

40 mils
CTRL15

+3V_LAN

LAN_PY1
SC1000P50V3JN-GP

1
2
R285
100KR2J-1-GP

Q24
BSS138-7F-GP

X4
XTAL-25MHZ-67GP
2
SC15P50V2JN-2-GP

C226

LAN_PY2
D

EEPROM LED OPTION USE '01'


(DEFINED IN SPEC)
=> LED0 : ACT (Yellow)
=> LED1 : LINK (Green)
(BOTH 10/100 AND GIGA CHIP)

Q37
BSS138-7F-GP
19,24,30,33,39,40,41

PM_SLP_S3#

DY
S

C237
1
2 SC15P50V2JN-2-GP

30 LAN_PWR_ON

DY

DY
DY

MDIS0_LAN
49D9R2F-GP

DY2

DVDD15
DVDD33

C201

49D9R2F-GP
2 MDIS1_LAN
1 DY2 C200
49D9R2F-GP
SCD01U16V2KX-3GP
2
49D9R2F-GP

RTL8102E-GR-GP

0103 SI

0103 SI
19,26,30 PCIE_WAKE#
7,17,26,27,30 PLT_RST#
19
PCIE_TXP1
19
PCIE_TXN1
16 CLK_PCIE_LAN
16 CLK_PCIE_LAN#
19
PCIE_RXP1
19
PCIE_RXN1

DVDD15

DVDD33

DVDD15

1 3

PCIE_WAKE#
PLT_RST#
PCIE_TXP1
PCIE_TXN1
CLK_PCIE_LAN
CLK_PCIE_LAN#
PCIE_RXP1
C243 SCD1U10V2KX-5GP 2
PCIE_RXN1
C249 SCD1U10V2KX-5GP 2

DY
C526
SCD1U16V2ZY-2GP

AT93C46DN-SH-B-GP

0103 SI
R398
15KR2F-GP

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

1206 SI
1
1

Size
A3

Document Number

Date: Monday, January 07, 2008


A

8
7
6
5

VCC
DC
ORG
GND

DVDD33
ISOLATE#

CS
SK
DI
DO

65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49

SCD01U16V2KX-3GP

R399
1KR2J-1-GP

1
2
3
4

om

U61
LAN_EECS
LAN_EESK
LAN_EEDI
LAN_EEDO

nf
@
ho
tm
ai
l.c

MDIN1

DY

D29
BAT54-4-GP

RTL8101E

Rev

ai

MDIP1

1
R125
1
R124
1
R123
1
R122

LAN_EESK
LAN_EEDI
DVDD33
LAN_EEDO
LAN_EECS
DVDD15

DVDD33

DY

Warrior

he
x

MDIN0

DVDD15
EVDD18

MDIP0

48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33

DY

DY R396
10KR2J-3-GP

8101E use this circuit, 8102E dummy this circuit

R390
3K6R3-GP

MDIP1
MDIN1

EESK
EEDI/AUX
VDD33
EEDO
EECS
DVDD12
TRST#
TMS
TSTCK
NC#39
NC#38
VDD33
ISOLATE#
NC#35
NC#34
CLKREQ#

+3VS

EVDD18
PCIE_HSOP
PCIE_HSON

27
27

VCTRL12A
AVDD33
MDIP0
MDIN0
AVDD12
MDIP1
MDIN1
AVDD12
NC#9
NC#10
NC#11
NC#12
NC#13
NC#14
DVDD12
VDD33

NC#17
NC#18
LANWAKE#
PERST#
DVDD12
EVDD12
HSIP
HSIN
EGND
REFCLK_P
REFCLK_N
EVDD12
HSOP
HSON
EGND
NC#32

MDIP0
MDIN0

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

GND
RSET
VCTRL12D
NC#62
CKTAL2
CKTAL1
NC#59
DVDD12
LED0
LED1
LED2
LED3
VDD33
NC#52
GPO
GPI
DVDD12

U24

27
27

DVDD33

For 93C56

0103 SI

AVDD18
AVDD33
MDIP0
MDIN0
AVDD18
MDIP1
MDIN1
AVDD18

LAN_X2
LAN_X1

R126
2K49R2F-GP
1

17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

R548 should be 2.49K 1% ohm for 8102E,


R548 should be 2K 1% for 8101E.

CTRL15

YELLOW_LED# 27
GREEN_LED# 27

Sheet
E

23

SC
of

42

+5VS

FAN1_VCC
R188
10KR2J-3-GP

FAN1

C331
SC10U10V5ZY-1GP

D14
MMBD4148-F-GP

C330
SCD1U16V2ZY-2GP

*Layout* 15 mil

FAN1_FG1

*Layout* 15 mil

C334
SC1KP50V2KX-1GP

ACES-CON3-1-GP-U
C376
SCD1U16V2ZY-2GP
G792_RST#

G792_RST# 33

DVCC

7
9
11

DXP1
DXP2
DXP3

THERM#
THERM_SET

13
3

SGND
SGND
SGND

8
10
12

R219
100KR2F-L1-GP

DGND
DGND

5
17

TP123 TP28-75-GP

GND

TP124 TP28-75-GP

G792_SUSCLK
G792_ALERT#
G792_DXP3

ALERT#
SDA
SCL

19

NC#19

SENSE2 for System

G792_DXN2
G792_DXN3

G7921SF1U-GP

B
C424
SC2200P50V2KX-2GP

Q22
CH3904PT-GP

SENSE3 for DIMM

G68
1

V_DEGREE
=(((Degree-72)*0.02)+0.34)*VCC

TP122 TP28-75-GP

G792_DXP2

15
16
18

SMBD_G792
SMBC_G792

20

FAN1_VCC

V_DEGREE

Setting T8 as
85 Degree

19 THERM_SCI#

1
2
4
14

FAN1_FG1

1
R207
10KR2J-3-GP

1206 SI

FAN1
RESET#
FG1
CLK

VCC

+3VS
R218
66K5R3F-GP

C366
SCD1U25V3KX-GP

5V_G792_S0

*Layout* 30 mil

R221
100KR2J-1-GP

74.07921.079

U47

+5VS
1
2
R206
100R2F-L1-GP-U

1
2

1
2

C336
SC4D7U10V5ZY-3GP

3
2
1

FAN1_VCC
1

+5VS

C357
SC2200P50V2KX-2GP

Q4
CH3904PT-GP

B
E

GAP-CLOSE

DXP1:108 Degree
DXP2:H/W Setting
DXP3:88 Degree

H_THERMDA 3

Place near chip as close


as possible

+3VS

C359
SC2200P50V2KX-2GP

SENSE1 for CPU

H_THERMDC 3
+5VS

EC_RST#

4
3

+3VS

G792_ALERT#

RN36
SRN2K7J-3-GP

30

R198
10KR2J-3-GP

1
2

2N7002PT-U
Q19

U42
SMBD_G792
+5VALW
30

KBC_SCL1

KBC_SDA1 30

SMBC_G792

U10
2N7002DW-7F-GP
19,23,30,33,39,40,41 PM_SLP_S3#
19 ICH_SUSCLK

1
2
3

A
B
GND

VCC

74AHCT1G08DCKR-1GP

G792_SUSCLK
R213

DY

0R2J-2-GP

Checking the Thermal SMBUS leakage.


R215

DY

<Core Design>
0R2J-2-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

0103 SI
Title

Thermal/Fan Controllor
Size
Custom

Document Number

Date: Monday, January 07, 2008

Rev

SC

Warrior
Sheet

24

of

42

DY

CLK48_5158

1
22R2J-2-GP

R412

MODE_SEL

RST#

XD_CLE

XD_CE#

XD_ALE

SD_DAT2/XD_RE#

SD_DAT3/XD_WE#

XD_R/B#

SD_DAT4/XD_WP#

44

43

42

41

40

39

38

37

X5
XTAL-12MHZ-21GP

DY

Reserve for 5158E used.

+3VS

R149 DY
270KR2F-GP
C279
SC27P50V2JN-2-GP
2
1

DY

0103 SI

1
22R2J-2-GP

12M_XI

5158E vendor suggest ues


5.6pF,
or use 48MHz directly by
Clock gne.

CR

45

2
C278
SC27P50V2JN-2-GP
2
1

R720 resistor
need close pin
47.

R411
16

12M_XO

CR

CR

CR

R397
R400
R388

5158_VIN
0R2J-2-GP
+3VS_A

0R2J-2-GP

+3VS_D

0R2J-2-GP

AV33

DM

19

CR

USB20_P8

SCD1U16V2ZY-2GP

XD_RDY/CF_D13

XD_ALE/CF_D4

XD_CE#/CF_D11

XD_CLE/CF_D3

RST#

46

DP

DGND

AG33

A3V3_OUT

CR

33

R406
100KR2J-1-GP

CR

32
SD_DAT6/XD_D7/MS_D3

RST#
C537
SCD1U16V2ZY-2GP

CR

+3VS_D

SD_DAT6/XD_D7/MS_D3/CF_D15 31

MS_INS#/CF_IORD#

XD_D5/MS_BS/CF_A2

2
XD_D5/MS_BS

MODE_SEL

RTS5158E-GR-GP
SD_DAT1/XD_D3/MS_D1_R 2

+3VS_D

R386

XD_D4

XD_D4

SD_CD#

CRYSTAL_SEL

0R2J-2-GP

SD_WP

CR

XD_CD#

71.05158.A0G
VBUS_LED#

High is use
48MHz, NC is use
Crystal.

SD_DAT1/XD_D3/MS_D1_R

25

CF_DMARQ

CF_A1/XD_D4

CF_D2
17

CF_D10

GPIO0

CF_D9
16

15

14

13

CF_CD#

0103 SI

SD_DAT0/XD_D6/MS_D0

SD_DAT1/XD_D3/MS_D1/CF_IORDY 26

24

DGND

29

SD_DAT7/XD_D2/MS_D2

23

D3V3_OUT

12

C274
SC1U10V3KX-3GP

MS_INS#

SD_DAT0/XD_D6/MS_D0/CF_RST# 27

CF_DMACK#

11

30

SD_DAT7/XD_D2/MS_D2/CF_IOWR# 28

22

VREG

CF_A0/SD_CD#

CR

CARD_3V3

C534
SCD1U16V2ZY-2GP

5V_IN

CF_D0/SM_WPM#/SD_WP

+3VS_D

DY DY

10

21

CR

VREG

CF_D1/XD_CD#

C253
SC1U10V3KX-3GP

19

C535
SCD1U16V2ZY-2GP

CF_CS0#

20

5158_VIN

CF_D8/SM_CD#

DY

1
1 0R2J-2-GP
0R2J-2-GP

18

CR

D3V3

2
R407 2
R394

SD_CLK/XD_D1/MS_CLK

SD_CLK/XD_D1/MS_CLK/CF_D7 34

USB20_N8

19

+3VS_CARD

SD_DAT5/XD_D0

2
1

CR

CR DY

+3VS
+5VS

C244
SC4D7U10V5ZY-3GP

+3VS_A

SD_CMD

36

2
C544
SCD1U16V2ZY-2GP

C272
SC4D7U10V5ZY-3GP

C536

SD_CMD

SD_DAT5/XD_D0/CF_D14 35

0103 SI

R389
0R2J-2-GP
1

CR
DY

SA02

C542
SC47P50V2JN-3GP

SD_DAT1

CR

R405
10KR2J-3-GP

CR
2

RREF

AV_PLL

AV_PLL

+3VS_A
C538
SCD1U16V2ZY-2GP

1224 SI

AG_PLL

SCD1U16V2ZY-2GP

1 RREF
CR 6K19R2F-GP

0103 SI

SD_DAT4/XD_WP#/CF_D6

2
R403

SD_DAT3/XD_WE#/CF_D5

+3VS_A

SD_DAT2/XD_RE#/CF_D12

R391
0R2J-2-GP
CR 1

CR

VREG

XTLO

CR
C539

C250
SC1U10V3KX-3GP

MODE_SEL

48

U26

CR

XTLI

0103 SI

47

DY

0R2J-2-GP
R387

SA07

0103 SI

R439

CR

VBUS_LED_L

LED2
1A

Q39
K2

VBUS_LED

LED-Y-74-GP

330R2J-3-GP

R402
0R2J-2-GP

CR

R1

R2
PDTC144EU-1-GP

CR

+3VS

DY

3
1

+5VS

VBUS_LED#

4 IN1 CARD-READER (SD/SD IO/MMC/MMC4.0/MS/MS PRO/XD)

DY

C297
SC4D7U10V5ZY-3GP

C554
SCD1U16V2ZY-2GP

CR

SD_CLK/XD_D1/MS_CLK_R

R404
0R2J-2-GP
1

19

VCC

CR

SD_CMD
SD_CLK/XD_D1/MS_CLK

36
27

SD_CMD
SD_CLK

SD_DAT0/XD_D6/MS_D0
SD_DAT1
SD_DAT2/XD_RE#
SD_DAT3/XD_WE#

23
22
41
39

SD_DAT0
SD_DAT1
SD_DAT2
SD_DAT3

SD_CD#
SD_WP

42
21

SD_CD_DETECT
SD_WP_PROTECT

SD_WP

45
44

SD_WP1
SD_WP2

XD_D5/MS_BS
SD_DAT0/XD_D6/MS_D0
MS_INS#
SD_CLK/XD_D1/MS_CLK_R

26
30
34
37

MS_BS
MS_SDIO
MS_INS
MS_SCLK

35
32
29

MS_RESERVED#MS_7
MS_RESERVED#MS_5
SD_I/O

CD
ALE

2
7

XD_CD#
XD_ALE

R/B#
RE#
CE#
CLE
WE#
WP#

3
4
5
6
8
9

XD_R/B#
SD_DAT2/XD_RE#
XD_CE#
XD_CLE
SD_DAT3/XD_WE#
SD_DAT4/XD_WP#

11
12
13
14
15
16
17
18

SD_DAT5/XD_D0
SD_CLK/XD_D1/MS_CLK
SD_DAT7/XD_D2/MS_D2
SD_DAT1/XD_D3/MS_D1_R
XD_D4
XD_D5/MS_BS
SD_DAT0/XD_D6/MS_D0
SD_DAT6/XD_D7/MS_D3

SD_CO2
SD_CO1

51
50

SD_CD#

SD_3P
SD_6P
SD_7P
SD_8P

49
48
47
46

MS_VSS

25

SD_VSS
SD_VSS

33
24

GND
GND
GND
GND
GND
GND
GND
GND

1
20
40
10
43
52
53
54

D0
D1
D2
D3
D4
D5
D6
D7

TP38

SD_DAT6/XD_D7/MS_D3
SD_DAT7/XD_D2/MS_D2
CARD1_SD_IO
1

NP1
NP2
NP3
NP4
NP5
NP6

TPAD28

NP1
NP2
NP3
NP4
NP5
NP6

SD_DAT0/XD_D6/MS_D0
SD_DAT1/XD_D3/MS_D1_R

om

MS_VCC
MS_VCC

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

TAI-CON43-GP-U4

Title

USB Card Reader Controller - RTS5158

20.I0030.001

Size

Document Number

Rev

SC

Warrior

Date: Monday, January 07, 2008


5

nf
@
ho
tm
ai
l.c

28
38

SD_DAT1/XD_D3/MS_D1_R

Place close to controler IC

SD_CLK/XD_D1/MS_CLK

CR

SD_VCC

ai

CARD1

31

+3VS_CARD

he
x

+3VS_CARD

Sheet
1

25

of

42

HDMI

HDMI Connector

RN69

41
42

7
7

HDMI_DATA0HDMI_DATA0+

44
45

7
7

HDMI_CLKHDMI_CLK+

47
48

2 4K7R2J-2-GP HDMI_PC0
2 4K7R2J-2-GP HDMI_PC1

1
1
HDMI_35 2
HDMI_34 2

OUT_D1OUT_D1+

23
22

IN_D2IN_D2+

OUT_D2OUT_D2+

20
19

HDMI_1_TXD1#_1
HDMI_1_TXD1_1

IN_D3IN_D3+

OUT_D3OUT_D3+

17
16

HDMI_1_TXD0#_1
HDMI_1_TXD0_1

IN_D4IN_D4+

OUT_D4OUT_D4+

14
13

HDMI_1_TXC#_1
HDMI_1_TXC_1

SDA
SCL
HPD

HDMI

1
1KR2J-1-GP
PS8101-GP

HPD_SINK
SDA_SINK
SCL_SINK

8
9
7

HDMI

30
30

RN57
2
1

3
4

3
5
7
9
11
13
15

+3VS

19 PCIE_RXN2
19 PCIE_RXP2

GMCH_HDMI_DATA 7
GMCH_HDMI_CLK 7
HDMI_HPD_L

30
29
28

19
19

PCIE_TXN2
PCIE_TXP2

HDMI_HPD
2 HDMI 1
R447
1KR2J-1-GP
HDP
HDMI_SDA
HDMI_SCL

+3VS_MINI1

+VL

RN68

71.P8101.003

3
4

+5VS

4
6
8
10
12
14
16

+3VALW

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
NP2

WIFI_RF_EN 30
PLT_RST# 7,17,23,27,30

PLT_RST#

ICH_SMBCLK
ICH_SMBDATA

ICH_SMBCLK 12,13,16,21
ICH_SMBDATA 12,13,16,21
USB20_N6 19
USB20_P6 19
3

TP42 TPAD30

WLAN_LED# 32

TP41 TPAD30

54
SKT-MINI52P-22-GP-U

SRN1K5J-GP

HDMI

62.10043.591

FILTER-123-GP
HDMI_1_TXD2

HDMI_1_TXD1#_1

HDMI_1_TXD1#

HDMI_1_TXD2#_1

HDMI_1_TXD2#

HDMI_1_TXC_1

HDMI_1_TXC

HDMI_1_TXD0_1

HDMI_1_TXD0

HDMI_1_TXC#_1

HDMI_1_TXC#

HDMI_1_TXD0#_1

HDMI_1_TXD0#

C337
C332

SCD1U16V2ZY-2GP

DY

L30

DY

+3VS_MINI1

+VL

SCD1U16V2ZY-2GP
C333

+1.5VS

+3VALW

C339

C365
SCD1U16V2ZY-2GP

C384

SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP

HDMI_1_TXD2_1

HDMI_1_TXD1

FILTER-123-GP

MLB201209-0600P-GP

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

E51_RXD
E51_TXD

SRN1K5J-GP

HDMI_1_TXD1_1

L29

WL_PRI
BT_PRI
1

16 CLK_PCIE_MINI1#
16 CLK_PCIE_MINI1

2
1

HDMI

2 0R2J-2-GP
2 0R2J-2-GP

DY
DY

TPAD30 TP45
HDMI_1_TXD2#_1
HDMI_1_TXD2_1

REXT
RT_EN#
OE#
DDC_EN

R495 1
R496 1

22 WL_PRIORITY
22 BT_PRIORITY

R459

6
10
25
32

1
NP1

PCIE_WAKE#

+3VS

2 499R2F-2-GP HDMI_REXT
1 1KR2J-1-GP HDMI_RT#
1 1KR2J-1-GP HDMI_OE#
HDMI_DDC

MINI1

19,23,30 PCIE_WAKE#

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

HDMI
DY
DY

+3VS
L8

SRN0J-5-GP

PC0
PC1

DY
R455 1
R446 2
R454 2

HDMI_1_TXD1
HDMI_1_TXD1#
HDMI_1_TXC
HDMI_1_TXC#
53

IN_D1IN_D1+

3
4

+3VS_MINI1
8
7
6
5

HDMI

+1.5VS

1
2
3
4

35
34

2
11
15
21
26
33
40
46
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

R442 1
R443 1

38
39

HDMI_DATA1HDMI_DATA1+

Mini Card Connector1(802.11a/b/g)

RN70

HDMI_1_TXD1_1
HDMI_1_TXD1#_1
HDMI_1_TXC_1
HDMI_1_TXC#_1

1
5
12
18
24
27
31
36
37
43
49

+3VS

HDMI_DATA2HDMI_DATA2+

7
7

HDMI_1_TXD2
HDMI_1_TXD2#
HDMI_1_TXD0
HDMI_1_TXD0#

HDMI

NC#35
NC#34

SCD01U16V2KX-3GP
2
1
C557

SCD1U10V2KX-4GP
2
1
C556

4K7R2J-2-GP

U62

8
7
6
5

SRN0J-5-GP

HDMI DY

HDMI

7
7

1
2
3
4

R444
4K7R2J-2-GP

R445

HDMI

HDMI_1_TXD2_1
HDMI_1_TXD2#_1
HDMI_1_TXD0_1
HDMI_1_TXD0#_1

+3VS
+3VS

SC10U10V5ZY-1GP
HDMI1

HDMI

22
20

HDMI_1_TXD2

+3VS
1

HDMI_1_TXD2#
HDMI_1_TXD1
HDMI_1_TXD1#
HDMI_1_TXD0

R456
20KR2J-L2-GP

HDMI_1_TXD0#
HDMI_1_TXC

HDMI

PEG_RXP3
1
R457
7K5R2J-GP

HDMI

Q25
BSS138-7F-GP
HDMI_HPD

TP66
TP65

HDMI_1_TXC#
HDMI_CEC
HDMI_CNC
HDMI_SCL
HDMI_SDA

HDMI
+5VS

R458
20KR2J-L2-GP

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

21
23

HDMI

HDP

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

Title

MINI CARD/HDMI CONN .


Size
A3

SKT-HDMI23P-GP-U3

Document Number

Date: Monday, January 07, 2008


A

Rev

SC

Warrior
Sheet
E

26

of

42

AVDD18

8101E need connect to 1.8V,


8102E don't need.

R323
0R2J-2-GP

XF1
MDIP1

16

14

RJ45-3

PIN A1 : GREEN
PIN A3 : ORANGE
PIN B2 : YELLOW

XFR_RXC

23

MDIN1

MDIN1

15

RJ45-6

23

MDIP0

MDIP0

10

RJ45-1

XRF_RDC
MDIN0

MDIN0

11

XFR_CMT

RJ45-2

12

1222 SI

C586
SCD01U100V5KX-1GP

RJ45-1
RJ45-2
RJ45-3
RJ45-4

C587
SCD01U100V5KX-1GP

13

1
2

+3V_LAN
1

23 YELLOW_LED#

4
3
2
1

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C499

RJ45-6
RJ45-7

RJ45-4
RJ45-7

R258
RN47
SRN75J-1-GP

13
15

470R2J-2-GP

RJ1

Green : Link up
Blinking : TX/RX activity

5
6
7
8

XFORM-273-GP

C500

14
9
10
11
1
2
3
4
5
6
7
8
12

+3V_LAN

XFR_CMT_1
XFR_RXC_1

RJ45-13P-4-GP

470R2J-2-GP
1

2
2

23

R276
23 GREEN_LED#

1
1

MDIP1

XRF_RDC

EC56
SCD1U25V2ZY-U

EC57
SCD1U25V2ZY-U

23

1.route on bottom as differential pairs.


2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.

DY

LAN Connector

10/100M Lan Transformer

0104 SI

0103 SI

LAN_TERMINAL 1
C459

Remark:
Add trace width to 20mils
for RJ1 pin4, 5 and pin 7, 8.

2
SC1500P2KV8KX-3GP

Golden Finger for Debug Board


+5VS
+5VS_LPC

(B14)
(B15)

+3VS_LPC

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15

PLT_RST#_1
LPC_FRAME#_1
LPC_GND
PCLK_FWH_1

G99
LPC_AD3

G105
2

LPC_AD3_1

LPC_AD3_1
LPC_AD2_1
LPC_AD1_1
LPC_AD0_1
EXT_FWH#_1

LPC_FRAME#

G106
2

LPC_AD2_1

7,17,23,26,30 PLT_RST#

PLT_RST#

GAP-OPEN-PWR

+3VS_LPC

ZZ.GF030.XXX

G107
2

LPC_AD1_1

16

PCLK_FWH

PCLK_FWH

GAP-OPEN-PWR

Please put near board edge.


LPC_AD[0..3]

G108
2

LPC_AD0_1

EXT_FWH#

GAP-OPEN-PWR

18,30

PCLK_FWH_1

2
GAP-OPEN-PWR

G102
LPC_AD0

PLT_RST#_1

2
GAP-OPEN-PWR

G101
1

LPC_FRAME#_1

2
GAP-OPEN-PWR

G100
LPC_AD2

LPC_AD1

Boot Device must have ID[3:0] = 0000


Has internal pull-down resistors
All may be left floated
FPET7 Elec. P3-46

18,30 LPC_FRAME#

GAP-OPEN-PWR

FOX-GF30

BOTTOM VIEW (B)

EXT_FWH#_1

2
GAP-OPEN-PWR

G103

+3VL
R460
1
DY

EXT_FWH#_R

100KR2J-1-GP

2
GAP-OPEN-PWR

R461
1

1
2

EXT_FWH#

LPC_GND

GAP-OPEN-PWR

1KR2J-1-GP

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

LAN CONN/Debug
Size
A3

Document Number

Date: Monday, January 07, 2008


A

CLOSE TO
TRANSFORMER

Warrior

Rev

ai

...

A2
A1

LPC_AD3_1
LPC_AD2_1
LPC_AD1_1
LPC_AD0_1
EXT_FWH#_1

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15

GAP-OPEN-PWR

he
x

...

A15 (B1)
A14 (B2)

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15

+3VS_LPC

G104

om

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15

PLT_RST#_1
LPC_FRAME#_1
LPC_GND
PCLK_FWH_1

+3VS

G98
1

nf
@
ho
tm
ai
l.c

TOP VIEW (A)

+5VS_LPC

+5VS_LPC
DEBUG1

Sheet
E

27

SC
of

42

+3VS_AUD

+3VS
R151
DVDD_3D3_AUD
1

7,18
7,18
18
7,18

HDA_BITCLK_CODEC
HDA_SYNC_CODEC
HDA_SDIN0
HDA_SDOUT_CODEC

DVDD_1D8_AUD

11

RESET#

6
10
8
5

BIT_CLK
SYNC
SDATA_IN
SDATA_OUT

43
42
AUD_PC_BEEP

MIC_L

SC10U10V5ZY-1GP
2

EC2
MIC_INT_L

EC4
MIC_INT_M
1

EC7

48

S/PDIF

34
35

MICBIASB
MIC_L
MIC_R

19
20
21

BIASB
INT_MIC_L
INT_MIC_R

MICBIASC
PORTC_L
PORTC_R

18
16
17

BIASC
MIC_L
MIC_R

PORTB_L
PORTB_R

14
15

MONO
STEREO_L
STEREO_R

29
30
31

DY2SCD01U16V2KX-3GP

HP_OUT_R
BC4
SC10U10V5MX-2GP

EC6

2
SCD01U16V2KX-3GP

DY2SC100P50V2JN-3GP

DY2SC100P50V2JN-3GP

TP72
1
C5941
C595
C286
C289

AUD_AGND
2
2 SC2D2U10V5KX-2GP
SC2D2U10V5KX-2GP

MIC_INT_L 29

R465
2 SC1U10V3ZY-6GP MICL_M 1
2 SC1U10V3ZY-6GP MICR_M 1

1
1

100R2J-2-GP
MICL
MICR

2
2
100R2J-2-GP

1
R162
1
R166

DY

BIASC
4K7R2J-2-GP
2K2R2J-2-GP

+5VS

+3VS

DY

SENSEA

13

AUDIO_SENSE

VREF

24

VREF_FILT

FLY_P
FLY_N

39
37

VREF_LO
VREF_HI
RESERVED#32
RESERVED#33

22
23
32
33

2 R156
47KR2J-2-GP
1
2

DMIC_CLOCK
DMIC_1/2

AUD_GPIO2

AVSS
AVSS

DVSS
DVSS

GND

1
R154

1
2
C300
SC1U10V3ZY-6GP
RESERVED_22
RESERVED_23

C306

1
C600

2
SC1000P50V3JN-GP

1
C601

2
SC1000P50V3JN-GP

1
C602

2
SC1000P50V3JN-GP

2
DY 0R2J-2-GP

SB_SPKR

SCD1U16V2ZY-2GP

1
2

AUD_AGND

SB_SPKR_C

DY

AUD_AGND

C305
SCD1U16V2ZY-2GP
1
+5VALW
1

+5VS

AUD_AGND

TP114 TP28-75-GP

MIC_IN#

TP111 TP28-75-GP

MICL

TP112 TP28-75-GP

MICR

TP113 TP28-75-GP

HP_OUT_L

TP115 TP28-75-GP

HP_OUT_R

TP116 TP28-75-GP

JACK_DETECT#

TP117 TP28-75-GP

AUD_AGND

TP118 TP28-75-GP

CHG_LED#

TP119 TP28-75-GP

PWR_BD_LED#

TP120 TP28-75-GP

SATA_BD_LED

TP121 TP28-75-GP

GND

TP110 TP28-75-GP

AUD1
17

15
14
13
12
11
10
9
8
7
6
5
4
3
2

1227 SI

MIC_IN#
MICL
MICR
HP_OUT_L
HP_OUT_R
JACK_DETECT#

C304 SCD1U16V2ZY-2GP

AUD_AGND

EC48
SCD1U25V3ZY-1GP
1
2

0R2J-2-GP
30 CHG_LED#
32 PWR_BD_LED#
15 SATA_BD_LED

0R2J-2-GP
1

R528

TP109 TP28-75-GP

+5VS

AUD_PC_BEEP
2
SCD1U16V2ZY-2GP

TP108 TP28-75-GP

C303

C606

R527
19

DY2

+5VALW

C301
SC1U10V2MX-GP

C302

C607

R541
29,30 KBC_BEEP

AUD_AGND

SC1U10V2MX-GP

AUD_AGND

DY DY
2

2
5K11R2F-L1-GP

FLY_P
FLY_N

CX20561-14Z-GP

25
38

R161
10KR2J-3-GP

49

R165
10KR2J-3-GP

7
41

AUD_GPIO1

MIC_IN#
2
20KR2F-L-GP
+3VS_AUD

1
R158

EAPD#

GPIO2
GPIO1
EAPD#/GPIO0

JACK_DETECT#
2
5K11R2F-L1-GP

1
R155

AUD_LOL 29
AUD_LOR 29

SC10U10V5ZY-1GP
2

29,30

45
46
47

AUD_GPIO2
AUD_GPIO1

SCD1U16V2ZY-2GP
2

Close to Modem

HP_OUT_L
HP_OUT_R

PORTA_L
PORTA_R

27
28

DY2SCD01U16V2KX-3GP

R173
4K7R2J-2-GP

PORTD_L
PORTD_R

HP_OUT_L

AUD_AGND

R466

PC_BEEP

R511
1KR2J-1-GP

SCD1U16V2ZY-2GP
2

26
40
36

EC3

C309

AVDD
AVDD
AVEE

DIB_P
DIB_N

12

MIC_R

C307

9
4
3
44

U32

HDA_SDATAIN0_CODEC
HDA_SDOUT_CODEC

+3VS_AUD
AVEE_AUD

VDD_IO
DVDD_1_8
DVDD_3_3
DVDD

1
2

C283

AMOM_DIPP
AMOM_DIPN

TP39
TP40

TP70 TP71

1
2
R152 33R2J-2-GP

C276
SCD1U16V2ZY-2GP

+1.5VS

2
7,18 HDA_RST#_CODEC

SC10U10V5ZY-1GP

C270

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

SCD1U16V2ZY-2GP

C284 C290

DY
2

SC10U10V5ZY-1GP

2
C280

1
0R3-0-U-GP

1
C603

2
0R2J-2-GP

C319
SC1U10V3ZY-6GP

+3VS_AUD

1
U37

1
R507

1
2
3
4
5

2
SC1000P50V3JN-GP

2
0R3-0-U-GP

AUD_AGND

2 SCD1U16V2ZY-2GP

DY
AUD_AGND

ACES-CON15-7-GP
AUD_AGND

0103 SI
1

<Core Design>

C310
SC10U10V5ZY-1GP

EN
GND
VIN
VOUT
NC#5
G9091-330T12U-GP

Wistron Corporation

EC8

CUT MOAT

SCD1U16V2ZY-2GP

1
R513

C293

C308

2
0R3-0-U-GP

SC1U10V3ZY-6GP

1
R512

+3VS_AUD

16

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

AUD_AGND

AUDIO CODEC CX20561-14Z


Size
A3

AUD_AGND

Document Number

Date: Monday, January 07, 2008


A

Rev

SC

Warrior
Sheet
E

28

of

42

+5VS

+5VS_OP
G56

+3VS

GAP-CLOSE-PWR

DY

C323
SC1U10V3ZY-6GP

+5VS_OP

AUD_AGND

AUD_AGND
+5VS_OP
AUD_AGND

L_LINE_IN
LIN+
R_LINE_IN
RIN+
1
R175
R176 1
1
R178
1
R179

5
9
17
7

LINLIN+
RINRIN+

DY
DY

0R2J-2-GP
2 10KR2J-3-GP
2
0R2J-2-GP
2
0R2J-2-GP

2
3
12

SHUTDOWN#
BYPASS

19
10

ROUT+
ROUTLOUT+
LOUT-

18
14
4
8

GND
GND
GND
GND
GND

1
11
13
20
21

GAIN0
GAIN1
NC#12
G1431F2U-GP

GAIN0 GAIN1
0
0
0
1
1
0
1
1

KBC_MUTE# 30

BYPASS
1

VDD
PVDD
PVDD

SPKR_R+
SPKR_RSPKR_L+
SPKR_L-

R468
0R2J-2-GP

DY
2

1
2

C322
SC4D7U10V5ZY-3GP

U40
16
6
15

+5VS_OP

R177
100KR2J-1-GP

EAPD#

28,30

AUD_AGND

Av(dB)
6
10
15.6
21.6

MIC_INT_L
EC13

DY2SC100P50V2JN-3GP
AUD_AGND

RIN+
C324
BYPASS
C327
LIN+
C326

SCD033U50V3KX-1GP
MIC_INT_L

TP96 TP28-75-GP

AUD_AGND

TP95 TP28-75-GP

+5VS

TP170 TP28-75-GP

CAPS_LED#_17

TP171 TP28-75-GP

SC1U10V3ZY-6GP
SCD033U50V3KX-1GP
AUD_AGND

RC7
SPKR_LSPKR_L+
SPKR_RSPKR_R+

R525
KBC_BEEP

KBC_BEEP_R
2
SCD1U16V2ZY-2GP

1
C604

2
47KR2J-2-GP

1
2
3
4

R189
AUD_LOR

R_LINE_IN_C
2
SCD033U50V3KX-1GP

1
C320

MIC

SRC100P50V-2-GP

R_LINE_IN

2
1

0R2J-2-GP

R164
0R2J-2-GP

+5VS

R543
330R2J-3-GP

MIC1

15,30 CAPS_LED#

28
1

TP91 TP28-75-GP

SPKR_L+

TP92 TP28-75-GP

SPKR_R-

TP93 TP28-75-GP

SPKR_R+

TP94 TP28-75-GP

R526
1

2
47KR2J-2-GP

C321
R180
AUD_LOL

L_LINE_IN_C

ACES-CON4-1-GP-U1

SC47P50V2JN-3GP

L_LINE_IN

2
0R2J-2-GP

C325

DY

R167
0R2J-2-GP

DY
SC1000P50V3JN-GP

SCD033U50V3KX-1GP

C596
1

28

AUD_AGND

AUD_AGND
SPKR_RSPKR_R+
SPKR_L-

Speaker

SPKR_L+

4
3
2
1

ACES-CON4-1-GP-U1
SPKR1

<Core Design>

Wistron Corporation

AUD_AGND

om

KBC_BEEP_L
2
SCD1U16V2ZY-2GP

1
C605

MIC_INT_L

nf
@
ho
tm
ai
l.c

KBC_BEEP

MIC_INT_L

28,30

4
3
2

CAPS_LED#_17

AUD_AGND
SPKR_L-

DY

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

1206 SI

Title

AUDIO AMP/SPEAKER
Size
A3

Document Number

Date: Monday, January 07, 2008


A

Warrior

Sheet
E

Rev

ai

28

8
7
6
5

he
x

28,30

29

SC
of

42

+3VL_KBC

CAP close to VCC-GND pin pair

L5

+3VL_KBC

+3VL_KBC

BT_TH#

35

+3VL

G97
1

3D3V_KBC_AUX_VCC

1
2
BLM18AG601SN-3GP

+3VS
2

GAP-CLOSE-PWR

R333

BT_TH#

100KR2J-1-GP

1
R546 0R2J-2-GP

101
105
106
107

GPI94
GPI95
GPI96
GPI97

80

GPIO41

VDD

CAP near ADC

D/A

124
7
2
3
126
127
128
1
125
8
122
121
29
9
123

C193

19,23,24,33,39,40,41
32
34
15,32
7
22

PM_SLP_S3#
KBC_PWR_BTN#
AD_IN#
LID_CLOSE#
TSATN#_KBC
BT_DET#

23 LAN_PWR_ON
32 PWR_WLAN
31 TP_LED_AMBER#
15,29 CAPS_LED#
35 AD_OFF
33 PM_RSMRST#
19,31,33,39 PM_SLP_S4#
28 CHG_LED#

1206 SI

15
15
15
15

CAM_PWR#
SIZE_DET0
SIZE_DET1
EC_BLON

28,29 EAPD#
32 PWR_LED
31 TP_LED_WHITE#
SRN10KJ-5-GP
EC_BLON
3
2
L_BKLT_EN
4
1

64
95
93
94
119
6
109
120
65
66
16
17
20
21
22
23
24
25
26
27
28
73
74
75
110

GPIO01/TB2
GPIO03
GPIO06
GPIO07
GPIO23
GPIO24
GPIO30
GPIO31
GPIO32/D_PWM
GPIO33/H_PWM
GPIO40/F_PWM
GPIO42/TCK
GPIO43/TMS
GPIO44/TDI
GPIO45/E_PWM
GPIO46/TRST#
GPIO47
GPIO50/TDO
GPIO51
GPIO52/RDY#
GPIO53
GPIO70
GPIO71
GPIO72
GPO82/TRIS#

SP

GPIO

X2
X-32D768KHZ-41GP

L_BKLT_EN 7

84
83
82
91

24
24
34,35
34,35

1
R337

GPIO16
GPIO34
GPIO36

114
14
15

R470 1
SPI_WP#2 32
1
R342

1224 SI

TP22

+3VL
1
R157

DY

77

32KX1/32KCLKIN

KBC_32KX2

79
30

32KX2
GPIO55/CLKOUT

63
117
31
32
118
62

GPIO14/TB1
GPIO20/TA2
GPIO56/TA1
GPIO15/A_PWM
GPIO21/B_PWM
GPIO13/C_PWM

13
12
11
10
71
72

GPIO12/PSDAT3
GPIO25/PSCLK3
GPIO27/PSDAT2
GPIO26/PSCLK2
GPIO35/PSDAT1
GPIO37/PSCLK1

86
87
90
92

F_SDI
F_SDO
F_CS0#
F_SCK

KBC_GPIO14

19 PWRBTN#_SB

KBC_VCORF

AGND

32
32
32
32

C181
SC1U10V3KX-3GP

SPI_SDI
SPI_SDO
SPI_CS#
SPI_SCK

SPI_SDI
SPI_SDO
SPI_CS#
SPI_SCK

1
2
SRN4K7J-8-GP

+3VS

SIRQ

R374

10KR2J-3-GP

KBSOUT0/JENK#
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KBSOUT4/JEN0#
KBSOUT5/TDO
KBSOUT6/RDY#
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
GPIO60/KBSOUT16
GPIO57/KBSOUT17

53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33

KCOL1
31
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
KCOL18

28,29 KBC_BEEP
15 SATA_LED
15 BRIGHTNESS

32
31
31
31

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

54
55
56
57
58
59
60
61

31
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8

R350
R358
R366

1
1
1

WIRELESS_BTN#
TP_BTN#
TDATA_5
TCLK_5

2
2 33R2J-2-GP
2 33R2J-2-GP
33R2J-2-GP

VCC_POR#

85

2 OF 2

KBC_32KX1

2 10KR2J-3-GP 29 KBC_MUTE#

2 GND connect
at one point

2 PM_RSMRST#
10KR2J-3-GP

KBC_32KX2
2
33KR3-GP

U22B

210KR2J-3-GP

+3VALW
1
R104

26

22

1
E51_TxD

R369 4K7R2J-2-GP

4
3

2
4K7R2J-2-GP

PWR_S5_EN 38
44

+3VS
RN49
KBC_SDA1
KBC_SCL1

82.30001.731 EPSON MC-306


32.768Khz 6pf 10ppm

E51_TxD 26
E51_RxD 26
GPIO16

X3_1 1
R118

103

AD_OFF

NUMLK_LED# 22

SHBM

TP near KB
connector
R115
20MR3-GP

C192 SC7P50V2DN-2GP

WIFI_RF_EN

GPO83/SOUT_CR/BADDR1
GPIO87/SIN_CR
GPO84/BADDR0

SER/IR

GND
GND
GND
GND
GND
GND

WPCE773LA0DG-GP
2

GPIO77
GPIO76/SHBM
GPIO75
GPIO81

VCORF

R344 10KR2J-3-GP

81

KBC_SDA1
KBC_SCL1
KBC_SDA0
KBC_SCL0

BT_EN#

116
89
78
45
18
5

DY

GPIO66/G_PWM

111
113
112

RN51
2

68
67
69
70

SPI

KBC_32KX1

1224 SI

GPIO74/SDA2
GPIO73/SCL2
GPIO22/SDA1
GPIO17/SCL1

SMB

2
1

18,27

SIRQ
19
PM_CLKRUN# 19
KBRCIN# 18
KA20GATE 18

EC_SWI#

3
4

SC7P50V2DN-2GP

1
LPC_AD[0..3]

ECSCI#_L

KBC_SDA0
KBC_SCL0

SRN4K7J-8-GP

PLT_RST# 7,17,23,26,27
CLK_PCI_KBC 16
LPC_FRAME# 18,27

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

PCB_VER0
PCB_VER1
PCB_VER2

LPC

+3VL_KBC
RN50

GPIO10/LPCPD#
LRESET#
LCLK
LFRAME#
LAD0
LAD1
LAD2
LAD3
SERIRQ
GPIO11/CLKRUN#
KBRST#
GA20
ECSCI#/GPIO54
GPIO65/SMI#
GPIO67/PWUREQ#

A/D

SCD1U16V2ZY-2GP

GPI90/AD0
GPI91/AD1
GPI92/AD2
GPI93/AD3
GPIO05
GPIO04

SCD1U16V2ZY-2GP

97
98
99
100
108
96

C520 1

ADP_LIMIT
GPIO92
AIRLINE_VOLT_RC
DY 2PCIE_L_WAKE#

R364
1
10KR2J-3-GP

34 AIRLINE_VOLT

1 OF 2

C527 1

1227 SI

R384
10K2R2F-GP

AIRLINE_VOLT_RC

AD_IA
TP32

102

VREF

AVCC

115
88
76
46
19
VCC
VCC
VCC
VCC
VCC

104

AD_IA

C219
SC10U10V5ZY-1GP

1
2

2
34

19,23,26 PCIE_WAKE#

1218 SI

R377
0R2J-2-GP
U22A

1
2

2
D11
1N4148W-7-F-GP

C529
SCD1U10V2KX-5GP

SC10U10V5ZY-1GP

C241

SPI_SDO_C
SPI_CS#_C
SPI_SCK_C

KBC

PS/2

FIU

2 LID_CLOSE#
10KR2J-3-GP

KCOL[1..18]

B
KROW[1..8]

+3VL_KBC

1
R343

10KR2J-3-GP
+3VL_KBC

EC_RST# 24

WPCE773LA0DG-GP

+3VL_KBC

DY

R345
10KR2J-3-GP

2
R362
10KR2J-3-GP

R361
10KR2J-3-GP
2

R363
10KR2J-3-GP

DY

R346
10KR2J-3-GP

PCB_VER0
PCB_VER1
PCB_VER2

R347
10KR2J-3-GP

DY

1106 SI

KBC_GPIO14 1
R316

SCD1U10V2KX-5GP

1
R385
180KR2F-GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

LIMIT_SIGNAL

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC10U10V5ZY-1GP

C196 C519 C504 C508 C510 C498

SCD1U10V2KX-5GP
C517

DY

Planar
ID[2,1,0]
SA: 0,0,0
SB: 0,0,1
SC: 0,1,0
SD: 1,0,0
-1: 0,1,1
-2: 1,0,1
-3: 1,1,1

DY

2
10KR2J-3-GP

R101
R368

D7
ECSCI#_L

1SS355PT-GP
A EC_SCI#
EC_SWI#

2
100KR2J-1-GP

+3VS

2
100KR2J-1-GP

+3VALW

Add Label "5V_S0"

<Core Design>

Wistron Corporation

EC_SWI# 19

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

KBC WPCE775L
Size
A3

Document Number

Date: Monday, January 07, 2008

EC_SCI# 19

Rev

SC

Warrior
Sheet

30

of

42

Internal KeyBoard Connector

TouchPad Connector
KB1
+5V_TP

+3VS

TP167 TP28-75-GP

GND

TP185 TP28-75-GP

+5V_TP

TP83 TP28-75-GP

GND

TP186 TP28-75-GP

TDATA_5

TP84 TP28-75-GP

TCLK_5

TP85 TP28-75-GP

GND

TP106 TP28-75-GP

TP_LED_AMBER#

TP86 TP28-75-GP

TP_LED_WHITE#

TP87 TP28-75-GP

GND

TP107 TP28-75-GP

DY
1

1214 SI

+5V_TP

TP_ON/OFF

TP88 TP28-75-GP

+5VS

TP89 TP28-75-GP

GND

TP90 TP28-75-GP

1
C598

Please populate close TPAD1

R520
100KR2J-1-GP

DY

DY

TP_SLP_S4
D

DY

DY

R518
100KR2J-1-GP

2
1

Q31
AO3403-GP

DY

DY
C597
SCD1U16V2KX-3GP

TP_SLP_S4_C
R519

DY

C599
2

DY

10KR2J-3-GP

BAV99S-GP

2
+5V_TP
S

2
3

2
0R3-0-U-GP

+5VALW
+5VALW

1
TDATA_5

TP_BTN# 30
C481
SC1000P50V3JN-GP

DY

1
R529

TCLK_5

R297
100R2J-2-GP

+5VS

R299
10KR2J-3-GP

EC15
SCD1U16V2ZY-2GP

D6
1

30
30

TP_LED_AMBER# 30
TP_LED_WHITE# 30

SC1U10V3KX-3GP

C271
SCD1U16V2ZY-2GP

+3VS

1227 SI

BAV99W-1-GP

DY

4
3
1
2

ACES-CON26-GP-U

TDATA_5
TCLK_5
TP_LED_AMBER#
TP_LED_WHITE#
TP_ON/OFF

1
11

2
TP_ON/OFF

2 SC33P50V2JN-3GP
2 SC33P50V2JN-3GP

ACES-CON10-11-GP

27

D28

KCOL18

12
10
9
8
7
6
5
4
3
2

C164 1
C161 1

TPAD1

RN26
SRN10KJ-11-GP

C159
SCD1U16V2ZY-2GP

MATRIXID2#

C160
SC1U10V3ZY-6GP

+5V_TP

MATRIXID1#

TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP

Jap

TP142
TP143
TP144
TP145
TP146
TP147
TP148
TP149
TP150
TP151
TP152
TP153
TP154
TP155
TP156
TP157
TP158
TP159
TP160
TP161
TP162
TP163
TP164
TP165
TP166

Eur

US

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

Keyboard matrix ( from vendor )

KROW2
KROW8
KROW7
KCOL10
KROW5
KROW6
KCOL1
KROW3
KROW4
KCOL6
KCOL2
KROW1
KCOL3
KCOL5
KCOL8
KCOL9
KCOL7
KCOL4
KCOL13
KCOL14
KCOL15
KCOL12
KCOL11
KCOL16
KCOL17

30 KCOL[1..18]

26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2

28
30 KROW[1..8]

SCD1U16V2KX-3GP

Q32
2N7002W-7-GP

DY
1

19,30,33,39 PM_SLP_S4#

G
S

8
7
6
5

8
7
6
5

KCOL14
KCOL13
KCOL4
KCOL7

for EMI

RC6
SRC100P50V-2-GP

DY
1
2
3
4

RC5
SRC100P50V-2-GP

DY
1
2
3
4

for EMI
KCOL10
KROW7
KROW8
KROW2

KROW3
KCOL1
KROW6
KROW5

om

8
7
6
5

1
2
3
4

RC2
SRC100P50V-2-GP

DY

Wistron Corporation

nf
@
ho
tm
ai
l.c

8
7
6
5

<Core Design>
RC1
SRC100P50V-2-GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

KeyBoard-CONN
Size
A3

Document Number

Date: Monday, January 07, 2008

Rev

Warrior
Sheet

SC

ai

for EMI

he
x

DY

1
2
3
4

1
2
3
4

RC3
SRC100P50V-2-GP

DY
1
2
3
4

RC4
SRC100P50V-2-GP

DY

KCOL16
KCOL11
KCOL12
KCOL15

8
7
6
5

KROW1
KCOL2
KCOL6
KROW4

8
7
6
5

KCOL9
KCOL8
KCOL5
KCOL3

31

of

42

+3VL_KBC

+3VL_KBC

2
R393
10KR2J-3-GP

SPI_WP#2

1KR2J-1-GP

C524
SCD1U16V2ZY-2GP

SPI_SCK

30 SPI_SCK

2M Flash ROM
72.25X16.001

SPI_SDO

30 SPI_SDO

R1

PDTC124EU-1-GP
Q21

W25X16VSSIG-GP

1224 SI

SPI_HOLD#_2 1

SPI_WP#2

VCC
HOLD#
CLK
DIO

CS#
DO
WP#
GND

PWR_BD_LED# 28

R376

8
7
6
5

1
2
3
4

R2

30

1KR2J-1-GP
U25

SPI_CS#
SPI_SDI_C
2
33R2J-2-GP

R370

R392

30 SPI_CS#
30 SPI_SDI

30

PWR_LED

+5VS

R192
100KR2J-1-GP
WL_LED#

1222 SI
LID_CLOSE# 15,30

COVER SWITCH

ACES-CON10-11-GP

TP74 TP28-75-GP

PWR_BD_LED#

TP75 TP28-75-GP

PWR_BT#

TP76 TP28-75-GP

WLAN_AMBER

TP77 TP28-75-GP

WLAN_WHITE#

TP78 TP28-75-GP

WLAN_BT#

TP79 TP28-75-GP

LID_CLOSE#

TP80 TP28-75-GP

GND

TP81 TP28-75-GP

GND

TP82 TP28-75-GP

U64

Q18

22

BT_LED

E
WLAN_LED#_C

R497
100KR2J-1-GP

WLAN_LED# 26

PDTA124EU-1-GP

PWR_BD_LED#
PWR_BT#
WLAN_AMBER
WLAN_WHITE#
WLAN_BT#
LID_CLOSE#

+3VS

TP73 TP28-75-GP

R499
100KR2J-1-GP

2N7002DW-7F-GP

0103 SI

2
3
4
5
6
7
8
9
10
12

+5VS

11
1

EC11
SCD1U16V2ZY-2GP

PWR1

+5VALW
3

+5VS

R2

EC10
SCD1U16V2ZY-2GP

R1

+5VALW

1222 SI

1227 SI
Please populate close PWR1

+3VS

WLAN LED ENABLE


WLAN_WHITE#

WLAN_AMBER

WL_LED
D

DY
30

WL_LED#

R1

1
G

PWR_WLAN

PWR_WLAN

Q28
2N7002W-7-GP

R2
R1

PDTC124EU-1-GP
Q16

PDTC124EU-1-GP
Q17

C335
SC1000P50V3JN-GP

R2

WIRELESS_BTN# 30

1
2
100R2J-2-GP

R191
WLAN_BT#

WLAN LED DISABLE


WL_LED#

R187
10KR2J-3-GP

WIRELESS SWITCH

PWR_WLAN

+3VL

WLAN_BT#
PWR_BT#

2 R372
100R2J-2-GP

KBC_PWR_BTN# 30

BAV99S-GP

EC9
SCD1U16V2ZY-2GP

DY

<Core Design>

PWR_BT#

R379
10KR2J-3-GP

POWER SWITCH

D16

DY

C543
SCD1U16V2ZY-2GP

+3VL

C531
SC1000P50V3JN-GP

Wistron Corporation

DY

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

FWH and CONN.


Size
A3

Document Number

Date: Monday, January 07, 2008


A

Rev

SC

Warrior
Sheet
E

32

of

42

+3VALW

R113

U20

G792_RST#

R77

2
0R0402-PAD

G792_RST#_1

GND

VCC

Q10
PM_PWROK 7,19

PM_RSMRST#

30 PM_RSMRST#

RSMRST#_SB 19

DY

+3VALW

74LVC1G08GW-1-GP

0R2J-2-GP

PMBS3906-GP

R121

DY

2
A

24

36 CORE_PWRGD

4K7R2J-2-GP

Discharge Circuit

A K

D9
1SS355PT-GP
A K

470R2J-2-GP

D10
1SS355PT-GP

2
2

D
PM_SLP_S3
1

DY

Q30
2N7002W-7-GP

DY

+3VS

R500
470R2J-2-GP

PM_SLP_S3

DY

1
G

R117
2K2R2J-2-GP

2N7002DW-7F-GP

DY
K

PM_SLP_S3

+1.5VS

DY

R506

DY

DY U65

R120
10KR2J-3-GP

DY
+1.05VS

R501
470R2J-2-GP
1
DY 2

DY

D8
1SS355PT-GP

+5VS

+5V

DY U66
3

PM_SLP_S4

+0.9VS

PM_SLP_S3

R505
470R2J-2-GP
1
DY 2
PM_SLP_S4

DY

+5V

R502
470R2J-2-GP

2N7002DW-7F-GP

DY U67
3

PM_SLP_S3
1

DY

2
0R5J-5-GP

1
R516

2
0R5J-5-GP

Populate close U34

+1.8V

+5VALW to +5VS Transfer


+3VALW to +3VS Transfer

+5VALW to +5V Transfer

+5VS

Run Power

SCD1U25V2ZY-U

8
7
6
5

D
D
D
D

1
2
3
4

DY

C613
SCD1U25V2ZY-U

AO4422-1-GP

+3VL

1231 SI

C612
1

+3VALW
1
2
3
4

SCD1U25V2ZY-U

U29
S
S
S
G

D
D
D
D

8
7
6
5

R424
100KR2J-1-GP

R426
470R2J-2-GP

DY
U27
2

RUN_PWR_CTLR

+3VS

DY2

1231 SI

RUNON

AO4422-1-GP

R425
100KR2J-1-GP
U28

D
D
D
D

DY

U34
S
S
S
G

1
2
3
4

R432
330KR2J-L1-GP

R433
330KR2J-L1-GP

DY2

U33
S
S
S
G

8
7
6
5

+5VALW

C611
1

+5V

DY

1231 SI

+5VALW

DCBATOUT
EC49
SCD1U25V3ZY-1GP

DCBATOUT

1
R515

R504
470R2J-2-GP

2N7002DW-7F-GP

+3VL

2
0R5J-5-GP

R503
470R2J-2-GP
1
DY 2

PM_SLP_S4# 19,30,31,39

DY

RUNON

C547
SCD01U25V2KX-3GP

2N7002DW-1-GP

om

<Core Design>

nf
@
ho
tm
ai
l.c

C558
SCD01U25V2KX-3GP

PM_SLP_S4

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

PWRPLANE
Size
A3

Document Number

Date: Monday, January 07, 2008

Rev

ai

2N7002DW-7F-GP

EC43

SC

Warrior

he
x

RUN_PWR_CTLR

R429
470R2J-2-GP

PM_SLP_S3# 19,23,24,30,39,40,41

AO4422-1-GP

SCD1U25V3ZY-1GP

PM_SLP_S3

+5VS

1
R514

Sheet

33

of

42

EC52

EC51

EC53

EC32

EC31

EC30

EC29

EC28

EC27

EC26

EC25

SCD1U50V3KX-GP

EC24

SCD1U50V3KX-GP

EC23

DCBATOUT

SCD1U50V3KX-GP

EC22

DCBATOUT

SCD1U25V3ZY-1GP

DY
1222 SI

R6
100KR2J-1-GP

NEAR

MAX8731_LDO

Adaptor In Soft-Start Circuit

AD_IN#

AD+_TO_SYS

G3
GAP-CLOSE-PWR

MAX8731_VCC

SCL

NEAR KBC POWER

DHI

24

LX

23

SDA

MAX8731_BST 1
MAX8731_LDO

2MAX8731_BST1
0R3-0-U-GP

2 C340

SC1U10V3KX-3GP

PGND

19

CSIP

18

MAX8731_CSIP

CSIN

17

MAX8731_CSIN

FBSB

16

FBSA

15

1
2

BT+

CHG_PWR

R1971R3F-GP
MAX8731_LX 1
2
1
2 C352
SC220P50V2JN-3GP
MAX8731_DLO

20

2nd:FDS8884(84.8884.A37)

MAX8731_DHI

DLO

1
2

2
1SS400PT

EC38

2 C349
SCD1U25V3KX-GP

L9
MAX8731_LX1

R10
2

COIL-6D8UH-2-GP

Layout Trace 300mil

D01R2512F-4-GP
C343

C342

C344

C345

EC1

1
R193

2 BT+SENSE
100R2F-L1-GP-U

BT+SENSE

G11

<Core Design>

SCD1U16V2ZY-2GP

SC1U10V3KX-3GP

SCD01U50V2ZY-1GP

SCD01U50V2ZY-1GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

1
2
G61
GAP-CLOSE-PWR
Title

CHG_AGND

CHARGER MAX8731ETI

Need Check MAXIM Sming Use MAX8731 or MAX8731A


4

35

C338
SCD01U50V2ZY-1GP

Size
A3

Document Number

Date: Monday, January 07, 2008


5

GAP-CLOSE-PWR
1
2

G10
GAP-CLOSE-PWR

G
S
S
S
4
3
2
1

BAT_SENSE

MAX8731AETI-GP

GND

C369

C371

C367

C368

CCV
CCI
CCS
REF
DAC
GND

29

MAX8731_CCV
6
MAX8731_CCI
5
MAX8731_CCS
4
MAX8731_REF
3
MAX8731_DAC 7
12

2
4K7R2F-GP

C375

1MAX8731_CCV1

1
2

2nd:FDS8884(84.8884.A37)

R214
1

SCD01U50V2ZY-1GP

SCD1U16V2ZY-2GP

C355

1
R205
10KR2F-2-GP

U5
SI4800BDY-T1

INP

SCD1U25V3ZY-1GP

AD_IA

SC10U25V6KX-1GP

30

SC10U25V6KX-1GP

CHG_AGND

SC10U25V6KX-1GP

BATSEL

SC10U25V6KX-1GP

14

D
D
D
D

30,35 KBC_SDA0

25
21

C4

10

CHG_AGND
30,35 KBC_SCL0

BST
LDO

C6

ACOK

U4
SI4800BDY-T1

D19

C7

13

CHG_AGND

C5

C351
SCD1U25V3KX-GP
ACAV_IN

5
6
7
8
D
D
D
D

27
26

R201

CHG_AGND

CSSN
VCC

G
S
S
S

VDD

1
2

C372
SCD01U50V2ZY-1GP

C358
SC1U10V3KX-3GP

4
3
2
1

11

+3VL

R204
33R2J-2-GP

5
6
7
8

ACIN

28

SCD1U25V3ZY-1GP

MAX8731_ACIN

CSSP

SCD1U25V3KX-GP

DCIN

SC10U25V6KX-1GP

22

CHG_AGND

SC10U25V6KX-1GP

MAX8731_DCIN

NEAR INPUT AD+

G4
GAP-CLOSE-PWR
1
2

G6
GAP-CLOSE-PWR
1
2

2nd:A04407(84.04407.A37)
R200
470KR2J-2-GP

SC10U25V6KX-1GP

365KR3F-GP

AO4433-GP

U44

C346
SC1U25V5KX-1GP

BT+

8
7
6
5

PWR_MAX8731

R217

CHG_AGNDCHG_AGND

2
0R2J-2-GP

ASNS

1
R194

C361
SCD1U25V3KX-GP

AD+

R216
49K9R2F-L-GP

C362
SCD1U25V3KX-GP

1206 SI

U3

2N7002DW-1-GP

DC_IN_D

D
D
D
D

U7
S
S
S
G

1
2
3
4

AD+

ACAV_IN

MAX8731_CSSN

2
100KR2J-1-GP

MAX8731_CSSP

R182
DCIN_GATE2
2
49K9R2F-L-GP

R183
1

DCIN_GATE1

G2
GAP-CLOSE-PWR

2nd:A04433(84.04433.A37)

1
2
R3
D01R2512F-4-GP
2

EC21
SCD1U25V3ZY-1GP

P2003EVG-GP

R184
10KR2J-3-GP

Layout Trace 300mil

DCBATOUT

Layout Trace 250mil

G5
GAP-CLOSE-PWR
1
2

1
2
3
4

1
S

R5
15K4R2F-GP

ACAV_IN

U2
S
S
S
G

D
D
D
D

G1
GAP-CLOSE-PWR

8
7
6
5

Layout Trace 250mil

R4
10KR2F-2-GP
2

DY
2

C8
SC1U10V3KX-3GP

Q3
2N7002-11-GP

30

SCD1U25V3ZY-1GP

BAV99W-1-GP

SCD1U25V3ZY-1GP

R185
100KR2F-L1-GP

SCD1U25V3ZY-1GP

AD<=17V, disable
charger function

SCD1U25V3ZY-1GP

AIRLINE_VOLT 30

SCD1U25V3ZY-1GP

EC20
SCD1U25V3ZY-1GP

+3VL

1
2
R186
15K4R2F-GP

SCD1U25V3ZY-1GP

+3VL

SCD1U25V3ZY-1GP

2
3

SCD1U25V3ZY-1GP

2 SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

C329 1
D

D15
AD+

Rev

Warrior

Sheet
1

SC
34

of

42

Adaptor in to generate DCBATOUT


AD+

LIMIT_SIGNAL

1206 SI
R181

DCIN1
DCIN_LED

2
3
4
5

AD+

2
4K7R2J-2-GP
AD_JK

U1
S
S
S
G

D
D
D
D

8
7
6
5

AO4407-1-GP
1

C3
SCD1U25V3ZY-1GP

C328
SCD1U25V3ZY-1GP

R2
200KR2J-L1-GP
2
1

20.80399.005

ACES-CON5-5-GP-U1

AD+_2

1
2
3
4

C2
SCD1U25V3ZY-1GP
C1

PDTA124EU-1-GP
1

TP125 TP28-75-GP

GND

TP126 TP28-75-GP

R2
TP127 TP28-75-GP

TP128 TP28-75-GP

AD_JK

TP181 TP28-75-GP

AD_JK

TP183 TP28-75-GP

TP129 TP28-75-GP

GND

30

2
IN

AD_OFF

SCD1U25V3ZY-1GP

Q2

R1
100KR2J-1-GP

3 OUT

R1

1 GND

R2

AD_JK

R1

LIMIT_SIGNAL

AD_OFF#

Q1

1214 SI

DCIN_LED

DTC114EUA-1-GP

BATTERY CONNECTOR
BT+
+3VL
D1

2
KBC_SCL0

2
KBC_SDA0

D3

2
BT_TH#

RN56
2
1

30,34 KBC_SDA0
30,34 KBC_SCL0
30

3
4
SRN100J-3-GP
2
100R2J-2-GP

1
R9

BT_TH#

10
8
7
6
5
4
3
2

BAT_SDA0
BAT_SCL0
BAT_TH#

BAV99W-1-GP

BAV99W-1-GP

BAV99W-1-GP

1
9

BT+SENSE

G12
34

2
2

GAP-CLOSE

FOX-CON8-5-GP-U

D2

BAT1

+3VL

C16
SCD1U25V3ZY-1GP

+3VL

C13
SC1000P50V3JN-GP

0103 SI

1214 SI

BT+

TP182 TP28-75-GP

BT+

TP130 TP28-75-GP

BT+

TP131 TP28-75-GP

GND

TP132 TP28-75-GP

GND

TP133 TP28-75-GP

BAT_SDA0

TP134 TP28-75-GP

BAT_SCL0

TP135 TP28-75-GP

BAT_TH#

TP136 TP28-75-GP

GND

TP137 TP28-75-GP

nf
@
ho
tm
ai
l.c

om

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

AD/BATT CONN
Date: Monday, January 07, 2008
5

Warrior

Sheet
1

Rev

ai

Document Number

he
x

Size
A3

35

SC
of

42

DCBATOUT_6260_1

2
SC1KP50V2KX-1GP
2
R96
6K98R2-GP

0103 SI

C177
1
2
SC1KP50V2KX-1GP

6260_DFB

VCC_SENSE

R302
1
2
0R0402-PAD

1
BOOT

VCC

1
2

1
2

2
1

Close to
phase 1
Inductor

2 C171 6260_VO
SC330P50V3KX-GP

6260_RTN
<Core Design>

C178
SCD01U50V2ZY-1GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

C179
SC1KP50V2KX-1GP
Title

ISL6266CCRZ_CPU_CORE(1/2)
Size
A3

Document Number

Date: Monday, January 07, 2008


4

G93
GAP-CLOSE-PWR-2U

2
1
6260_ISEN1_G1

5
6
7
8
D
D
D
D

6260_AGND

1
2

1
2

5
6
7
8
4
3
2
1

4
3
2
1
5
6
7
8
D
D
D
D
6260_AGND

0103 SI

Close to IC

R300
1
2
0R0402-PAD

R255
NTC-10KJ-GP
C170
SCD1U10V2KX-4GP

5K36R2F-GP

VSS_SENSE

R75
1KR2F-3-GP

ISL6260CCRZ-T-GP

R73
2K94R2F-GP

R76

6260_AGND

6260_VO

SCD22U10V3KX-2GP
R273
5K11R3F-1-GP

37

RTN
1

16

VO

6260_ISEN2

VW

37

COMP

6260_VSUM

C478
1
2

6260_VO

6260_VW

0103 SI

10KR2F-2-GP

6260_VO

6260_COMP

6260_VSUM

R279
10KR2F-2-GP

6260_ISEN1

FB

17

R280
10R2F-L-GP

R278
1

6260_ISEN1_G2

10

VSUM

R95
12K7R3F-GP
1
2

84.04835.F37
ON4835 POWERPAK
Id=104A, Qg=22~39nc
Rdson=4.3~5mOhm

CYNTEC 0.36uH
Idc=30A 10*11.5*4
DCR=1.05mOhm

VDIFF

6260_FB

6260_OCSET

4K53R2F-1-GP

DPRSTP#

11

37

6260_VDIFF

OCSET

R74

H_DPRSTP#

13
1
C182

6208_LG1

CLK_EN#

1
2 6260_COMP_R 1
2
C190
68K1R2F-1-GP
SCD022U16V2KX-3GP

+5VALW

6260_AGND

38

U56
SI7636DP

6260_VSUM

DPRSLPVR

S
S
S
G

36

R98

C185
SC220P50V2KX-3GP

21

U16
SI7636DP

1
2
3
4

VR_ON

0103 SI

25

ISEN3

37

R92
1KR2F-3-GP

PWM3

6260_ISEN2

6260_ISEN2

1
C168

2
C183
SC1800P50V2KX-1GP

22

EC35

+VCC_CORE

0103 SI

ISEN2

37

SCD068U10V2KX-1GP

Close to
phase 1
Inductor

2 VDIFF_C
180R2F-1-GP

35

6260A_VR_ON
1KR2J-1-GP
6260_DPRSLPVR
2
499R2F-2-GP
CLK_ENABLE#
2

4,7,18 H_DPRSTP#
1
R97

VID0
VID1
VID2
VID3
VID4
VID5
VID6

6260_PWM2

1
R301

SOFT

28
29
30
31
32
33
34

6260_VID0
6260_VID1
6260_VID2
6260_VID3
6260_VID4
6260_VID5
6260_VID6

1
2
C167
SCD22U16V3KX-2-GP

19 CLK_EN#

NTC

6208_UG1
6208_PH1

37

7,19 PM_DPRSLPVR

G33
G32
G31
G30
G34
G35
G36

6260_SOFT

6260_ISEN1

19,38,39,40 ALL_PWRGD

2
2
2
2
2
2
2

6260_PWM2

L25
IND-D36UH-9-GP

0103 SI

DFB

H_VID[6..0]

1
1
1
1
1
1
1

PWM2

26

15

GAP-CLOSE-PWR-2U
GAP-CLOSE-PWR-2U
GAP-CLOSE-PWR-2U
GAP-CLOSE-PWR-2U
GAP-CLOSE-PWR-2U
GAP-CLOSE-PWR-2U
GAP-CLOSE-PWR-2U
1
R296
1
R298
2
0R2J-2-GP

6260_NTC

DROOP

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6

SCD015U50V3KX-GP

6260_ISEN1

S
S
S
G

VR_TT#

14

2 R254
NTC-470K-2-GP

23

1
2
3
4

6260_DROOP

C184

2 R256
4K02R2F-GP
2

ISEN1

U55
SI7686DP-T1-GP

RBIAS

VSEN

6260_PWM1

PMON

12

27

6260_RBIAS

3 CPU_PROCHOT#_R

PWM1
PSI#

6260_PMON

6260_VSEN

1
2

5
6
7
8

PGOOD

40

39
3V3

18

U15
SI7686DP-T1-GP

C444

SCD1U25V3ZY-1GP

DY

37

S
S
S
G

6260_AGND
C189
SC1U10V3KX-3GP

6260_PSI#

6260_FCCM

S
S
S
G

R89
1
2
0R0402-PAD
R90
2
10KR2F-2-GP
1
2 R93
6260_AGND
147KR2F-GP

PSI#

6260_FCCM

C440

SC10U25V6KX-1GP

24

FCCM

C131

SC10U25V6KX-1GP

GND

C143

SC10U25V6KX-1GP

VSS

41

C148

DY

SC10U25V6KX-1GP

19

KBC reset Pin to IMVP PGD_IN(pin 2)


4

ISL6208CRZ-TGP-U

D
D
D
D

6260_AGND

6260_AGND

R94
68R2-GP

DCBATOUT_6260_1

33

84.04841.037
ON4841 POWERPAK
Id=57A, Qg=11.5~17nc
Rdson=9.2~11.4mOhm

D
D
D
D

GAP-CLOSE-PWR
G92
1
2

VIN

U19
6260_AGND

+1.05VS

6208_PH1
6208_UG1
6208_LG1

7
8
4

CORE_PWRGD

GAP-CLOSE-PWR-2U

GAP-CLOSE-PWR

FCCM

PHASE
UGATE
LGATE

SCD1U50V3KX-GP

GAP-CLOSE-PWR
G91
1
2

C480
SC1U10V3KX-3GP

20

PWM

R303
1K91R2F-1-GP

G95

6260_FCCM

6260_AGND
2

GAP-CLOSE-PWR
G90
1
2

6260_PWM1

9
3

6260_VDD

GAP-CLOSE-PWR
G89
1
2

U58

+3VS
6260_VIN

GAP-CLOSE-PWR
G26
1
2

C479
SCD01U50V2KX-1GP

1
R295
10R3J-3-GP

C449
SC1U10V3KX-3GP

R294
10R3J-3-GP

GAP-CLOSE-PWR
G27
1
2

6260_AGND

+3VALW

+5VALW

1
1
2
C450
0R2J-2-GP SCD22U10V3KX-2GP

GND
GND

+3.3V_6260 1
2
0R0402-PAD

GAP-CLOSE-PWR
G28
1
2

R312

VDD

R260

+5VALW

DCBATOUT_6260_1
G29

DCBATOUT

G94
GAP-CLOSE-PWR-2U

Rev

SC

Warrior
Sheet
1

36

of

42

1
2

36 6260_ISEN2

6260_ISEN2

36

GAP-CLOSE-PWR
G86
1
2

1
2

SE330U2VDM-6-GP

1
2

SE330U2VDM-6-GP

6260_VO
6260_ISEN1

DY
2

TC3

TC16

TC4

ST330U2D5VDM-LGP

6260_VSUM

DY

ST330U2D5VDM-LGP

36 6260_VSUM

TC5

+VCC_CORE

2
36

GAP-CLOSE-PWR
G79
1
2

TC17

SCD22U10V3KX-2GP

ST330U2D5VDM-LGP

R289
5K11R3F-1-GP

TC6

ST330U2D5VDM-LGP
2

2
1

GAP-CLOSE-PWR
G80
1
2

10KR2F-2-GP

GAP-CLOSE-PWR
G81
1
2

1
1

6208_LG2

C477
1
2

DCBATOUT_6260_2
2

R275
10KR2F-2-GP

2
1
6260_ISEN2_G2

R290

G82
1

G88
GAP-CLOSE-PWR-2U

DCBATOUT

+VCC_CORE

0103 SI

R286
10R2F-L-GP

G85
GAP-CLOSE-PWR-2U

1
6260_ISEN2_G1

S
S
S
G

U51
SI7636DP

2
4
3
2
1
5
6
7
8
D
D
D
D

5
6
7
8
U14
SI7636DP

1
2
3
4

ISL6208CRZ-TGP-U

D
D
D
D

84.04835.F37
ON4835 POWERPAK
Id=104A, Qg=22~39nc
Rdson=4.3~5mOhm

5
6
7
8

5
6
7
8
4
3
2
1

6208_PH2
6208_UG2
6208_LG2

S
S
S
G

FCCM

6208_PH2
7
8
4

1
2
3
4

BOOT

5
VCC

6260_FCCM

9
3

36 6260_FCCM

PHASE
UGATE
LGATE
GND
GND

1
2

PWM

SC10U25V6KX-1GP

C61

CYNTEC 0.36uH
Idc=30A 10*11.5*4
DCR=1.05mOhm

L20
IND-D36UH-9-GP

6208_UG2

C60
SC10U25V6KX-1GP

6260_PWM2

1
1
2
C420
0R2J-2-GP SCD22U10V3KX-2GP

C395
SC10U25V6KX-1GP

36 6260_PWM2

U50
SI7686DP-T1-GP

C396
SC10U25V6KX-1GP

U52

S
S
S
G

C415
SC1U10V3KX-3GP

S
S
S
G

R247
2

SCD1U50V3KX-GP

DY

U13
SI7686DP-T1-GP
+5VALW

C62

DY

D
D
D
D

D
D
D
D

84.04841.037
ON4841 POWERPAK
Id=57A, Qg=11.5~17nc
Rdson=9.2~11.4mOhm

DCBATOUT_6260_2

Kemet 330uF, 2.5V


ESR=9m, Iripple=3.7A

GAP-CLOSE-PWR
G87
1
2
GAP-CLOSE-PWR
G84
1
2
B

GAP-CLOSE-PWR
G83
1
2
GAP-CLOSE-PWR

<Core Design>

om

nf
@
ho
tm
ai
l.c

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ISL6260CCRZ_CPU_CORE(2/2)
Date: Monday, January 07, 2008
5

Rev

Warrior

Sheet
1

SC

ai

Document Number

he
x

Size
A3

37

of

42

10

DRVH2

DRVH1

21

51125_VBST1 1
R471
51125_DRVH1

51125_LL2

11

LL2

LL1

20

51125_LL1

2 51125_DRVL2
0R3-0-U-GP

12

DRVL2

DRVL1

19

51125_DRVL1

D
D
D
D
VO2

VO1

24

51125_VFB2

VFB2

VFB1

51125_VFB1

13

EN0

1
2

G
S
S
S

23
1

4
3
2
1

PGOOD
ENTRIP1

51125_ENTRIP1

ENTRIP2

VREF

GND

15

51125_TONSEL

TONSEL

GND

25

51125_SKIPSEL

14

SKIPSEL

VCLK

18

DY

R476
100KR2J-1-GP

C571
SC18P50V2JN-1-GP

R474
30KR2F-GP

DY

1
C576
SC10U10V5KX-2GP

DY

2 0R2J-2-GP

R487 1

DY

2 0R2J-2-GP

+3VL

R544
100KR3J-L-GP

+51125_VREF

R489 1

DY

2 0R2J-2-GP

R490 1

DY

2 0R2J-2-GP

51125_ENTRIP

1
2
G47
GAP-CLOSE-PWR

51125_ENTRIP

<Core Design>

365k/CH1
460k/CH2

DY

Q41
2N7002-7F-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

R498
160KR2F-GP
Title

C589

VREG5

00A AUTOSKIP 00A AUTOSKIP


300k/CH1
375k/CH2

1
2
G113
GAP-CLOSE-PWR

PWR_S5_EN

VREG3

Size
A3

TPA51125 +5VALW +3VALW

Document Number

Date: Monday, January 07, 2008


4

+5VALW

1
2
G48
GAP-CLOSE-PWR

SC18P50V2JN-1-GP

245k/CH1
305k/CH2

1
2
G51
GAP-CLOSE-PWR

5V_PWR

51125_ENTRIP2
30

200k/CH1
250k/CH2

1
2
G49
GAP-CLOSE-PWR

R508
160KR2F-GP

Q42
2N7002-7F-GP

AUTOSKIP

Q40
2N7002-7F-GP

DY

1
2
G50
GAP-CLOSE-PWR

EC42
SCD1U25V3ZY-1GP

1206 SI

1
2
G41
GAP-CLOSE-PWR

PWM

1
2
G46
GAP-CLOSE-PWR

SC18P50V2JN-1-GP

+3VALW

C608

VREF

Design Current=6A
OCP design>8A

2 0R2J-2-GP
2

R488 1

+3VL

51125_ENTRIP1

1
2
G40
GAP-CLOSE-PWR

Close to IC TPS51125

R486 1

R475
20KR2F-L-GP

ALL_PWRGD 19,36,39,40

2 0R2J-2-GP

2 0R2J-2-GP

+VL

R485 1

DY

R484 1

+VL

C577
SC10U10V5KX-2GP

1
2
G43
GAP-CLOSE-PWR

Sanyo 220uF 6.3V


ESR=25mohm
Iripple=2.4A

TPS51125RGER-GP

1
2
G42
GAP-CLOSE-PWR

1
2
G39
GAP-CLOSE-PWR

TC12
ST220U6D3VDM-20GP

DY

3D3V_PWR
2

VREG3

R473
0R2J-2-GP

2
1
2

Design Current=6A
OCP>8A

1
2
G44
GAP-CLOSE-PWR

G110

0103 SI
+3VL

Close to IC TPS51125

TONSEL

SI4800, SO-8
Id=9A, Qg=8.7~13nC
Rdson=23~30mohm
1

U38
SI4800BDY-T1

1
1 2

2 51125_EN0
820KR2F-GP
51125_ENTRIP2

+3VL

+51125_VREF

SKIPSEL

51125_DRVL1_L

2
0R3-0-U-GP

1
R472

1
2
3
4
1

1
2

C575

1
2

51125_VO1

VREG5

1
2

51125_VO2

5V_PWR

5V_PWR
2
IND-3D3UH-57GP

GAP-CLOSE-PWR-3-GP

SCD22U6D3V2KX-1GP

DY C574
SC18P50V2JN-1-GP

GND

L6
1

G
S
S
S
1
+51125_VREF

R480
10KR2F-2-GP

3D3V_PWR

2
SCD1U25V3KX-GP

C583

R483

DY R482
0R2J-2-GP

1206 SI

1
R478

51125_VBST1_L 1
2
0R0603-PAD

G
S
S
S

22

4
3
2
1

VBST1

C582

8
7
6
5

51125_DRVL2_L

G112

R481
6K65R2F-GP

VBST2

D
D
D
D

U36
SI4800BDY-T1
GAP-CLOSE-PWR-3-GP

ST220U6D3VDM-20GP

1
2
VIN
9

17

8
7
6
5
1
2
3
4

2 51125_VBST2
0R0603-PAD
51125_DRVH2

5
6
7
8

1
2

2
IND-3D3UH-57GP

Sanyo 220uF 6.3V


ESR=25mohm
Iripple=2.4A

16

G
S
S
S

C570

51125_VBST2_L
2
1
SCD1U25V3KX-GP
R477

L7

TC11

U35
SI4800BDY-T1

C572
1

3D3V_PWR
3D3V_PWR 1

C581

SC10U25V6KX-1GP

U30

DCBATOUT_51125_1

SC10U25V6KX-1GP

D
D
D
D

SCD01U50V2KX-1GP

U39
SI4800BDY-T1

C569

DCBATOUT_51125_1

SCD01U50V2KX-1GP

DY

C568

SCD01U50V2KX-1GP

C580
SC10U25V6KX-1GP

C579
SC10U25V6KX-1GP

C578
D

G60
GAP-CLOSE-PWR
1
2
G59
GAP-CLOSE-PWR
1
2
G58
GAP-CLOSE-PWR
1
2
G57
GAP-CLOSE-PWR

DCBATOUT_51125_2

1
2
G53
GAP-CLOSE-PWR
1
2
G45
GAP-CLOSE-PWR
1
2
G52
GAP-CLOSE-PWR
1
2
G54
GAP-CLOSE-PWR
1
2
G111
GAP-CLOSE-PWR

DCBATOUT

DCBATOUT_51125_2

SC10U25V6KX-1GP

SI4800, SO-8
Id=9A, Qg=8.7~13nC
Rdson=23~30mohm

DCBATOUT
1

DCBATOUT

5
6
7
8

D
D
D
D

Rev

SC

Warrior
Sheet
1

38

of

42

TI TPS51116 for 1D8V and 0D9V

G21
1

+5VALW
1
R227
5D1R3J-GP

0103 SI

GAP-CLOSE-PWR
G23
1
2

R16
51116_VDD

DCBATOUT_51116

1 2

GAP-CLOSE-PWR
G22
1
2

DCBATOUT

7K68R2F-GP

GAP-CLOSE-PWR
G20
1
2

DCBATOUT_51116
+5VALW

GAP-CLOSE-PWR

TPS51116_PHS

DL

19

TPS51116_LGT

NC#7
U11
SI7686DP-T1-GP

VDDQS

FB

9
R21
14KR2F-GP

SC18P50V2JN-1-GP
C44

TPS51116_VBST 1

TPS51116_PHS

1
2

4
3
2
1

1
2

U6
SI7636DP

ON NTMFS4841 Ultra SO-8


Id=57A, Qg=11.5~17nc
Rdson=9.2~11.4mOhm

S
S
S
G

C47
SCD033U50V3KX-1GP

DY

C26

EC39
SCD1U25V3ZY-1GP

R22
10KR2F-2-GP

DDR_VREF_S3

GAP-CLOSE-PWR
G16
1
2

GAP-CLOSE-PWR
G64
1
2

2
IND-1D5UH-34-GP

D
D
D
D

1 R20
2
0R0603-PAD

C29
SCD1U25V3KX-GP

TPS51116RGER-GP-U

+1.8V

GAP-CLOSE-PWR
G15
1
2

+1.8V_RUN_P

TPS51116_UGT
L10

REF

VCCA

VSSA

GND

25

TPS51116_VDDQ

+5VALW

VTTS

GAP-CLOSE-PWR
G17
1
2

GAP-CLOSE-PWR
G14
1
2

8
7
6
5

VTT

GAP-CLOSE-PWR
G19
1
2

S
S
S
G

18
17

TON

24

+0.9VP

PGND1
PGND1

PGND2

ON NTMFS4841 Ultra SO-8


Id=57A, Qg=11.5~17nc
Rdson=9.2~11.4mOhm

D
D
D
D

+1.8V_RUN_P
Iomax=12A
OCP>18A

TPS51116_VDDQ

1
2

20

VTTIN

LX

G18
+1.8V_RUN_P

23

21 TPS51116_UGT

VTTEN

DH

2 TPS51116_VBST
0R0603-PAD

EN/PSV

10

SCD1U50V3KX-GP

11

15

14

NC#12

+1.8V_RUN_P

12

22 TPS51116_VBST1

C22

PM_SLP_S3#

PGD

R13
BST

5
6
7
8

19,30,31,33 PM_SLP_S4#
19,23,24,30,33,40,41

13

C21

4
3
2
1

19,36,38,40 ALL_PWRGD

VDDP

DY

10KR2F-2-GP

U12

VDDP

16
ILIM

C20

DY

SC10U25V6KX-1GP

R231
1

+3VALW

C38
SC1U10V2KX-1GP

SC10U25V6KX-1GP

TPS51116_CS

SCD1U16V2ZY-2GP

2
C35

1
SC1KP50V2KX-1GP

C43
SC1U10V2KX-1GP

GAP-CLOSE-PWR
G63
1
2

TC1
SE330U2D5VDM-LGP

GAP-CLOSE-PWR
G65
1
2

Sanyo 330uF 2.5V


ESR=15mOhm

GAP-CLOSE-PWR
G67
1
2

TPS51116_LGT

GAP-CLOSE-PWR
G66
1
2

+1.8V_RUN_P

GAP-CLOSE-PWR
G62
1
2

GAP-CLOSE-PWR

G13
1

+1.8V_RUN_P

TPS51116_VDDQ

DY
2

GAP-CLOSE-PWR

C24
SC10U6D3V5MX-3GP
G24
+0.9VP

+0.9VS

GAP-CLOSE-PWR

VTT

S0

Hi

Hi

On

On

S3

Lo

Hi

On

On

Off(Hi-Z)

S4/S5

Lo

Lo

Off

Off

Off

VTTREF

VDDR

SC10U6D3V3MX-GP

S5

SC10U6D3V3MX-GP GAP-CLOSE-PWR

On

1218 SI

C30

G25
1

C39

0.9VS
Iomax=1A

2
SCD1U16V2ZY-2GP

C40
1

S3

State

C31

SC10U6D3V3MX-GP

<Core Design>

om

nf
@
ho
tm
ai
l.c

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

TPS51116 1D8V/0D9V
Date: Monday, January 07, 2008
5

Rev

Warrior

Sheet
1

SC

ai

Document Number

he
x

Size
A3

39

of

42

DCBATOUT

+5VALW
1

G8
1

1
D20
CH521S-30-GP-U1

10

+1.05V_VCCP_P

SC412A_DL_2

ON NTMFS4841 Ultra SO-8


Id=57A, Qg=11.5~17nc
U8
Rdson=9.2~11.4mOhm SI7636DP

1
2

1
2

R196
4K12R2F-GP

SC412A_VFB_2
R195
10K2R2F-GP

S
S
S
G

VOUT

C347

DY

C373

EC36

TC13
ST330U2D5VDM-17GP

77.C3371.13L NEC-TOKIN
330uF 2.5V 6mOhm
Iripple=4.563A
C

DY
BC3

+1.05V_VCCP_P
G78
1

SCD01U16V2KX-3GP

17

1
2
3
4

RTN

NC#15
GND

NC#14

15

PAD

14

SC412AMLTRT-GP

0103 SI

NC#8

5
6
7
8

D
D
D
D

NC#7

1
2

C363
SCD1U10V2KX-4GP

FB

SC412A_VFB_2

33KR2J-3-GP

+1.05V_VCCP_P

0103 SI

SCD1U25V3ZY-1GP

SC412A_DL_2

L11
1
2
IND-D47UH-22-GP

SCD1U10V2KX-4GP

SC412A_DH_2
SC412A_LX_2

SC33P50V2JN-3GP

DL

ILIM

2 SC412A_LX_2
9K53R2F-GP

EN

RILIM_2 1
R212

+1.05V_VCCP
Iomax=15A
OCP>20A

SC412A_LX_2

13

PM_SLP_S3#

12

19,23,24,30,33,39,41

R211
1

CYNTEC 0.82uH 7*7*3


DCR=13mOhm
Idc=13A (68.R8210.10V)

LX

SC412A_DH_2

C9

16

U9
SI7686DP-T1-GP

4
3
2
1

DH

SCD1U25V3KX-GP

C10

VCC

5
6
7
8

1SS355PT-GP
A

BST

SC412A_LX_2

C11

SC10U25V6KX-1GP

C356

PGOOD

DY

SC10U25V6KX-1GP

S
S
S
G

D32

1231 SI

11

D
D
D
D

R210
1
2VCC_PWRGD1
0R0402-PAD

19,36,38,39 ALL_PWRGD

G9
1

GAP-CLOSE-PWR

SCD1U50V3KX-GP

U45

DCBATOUT_SC412A_2

C350
SC1U16V3KX-5GP

GAP-CLOSE-PWR

1 2
1
R209
10KR2J-3-GP

GAP-CLOSE-PWR

R199
10R3J-3-GP
+3VS

DCBATOUT_SC412A_2

G7
1

+5VALW

Close to IC SC412A

+1.05VS
2

GAP-CLOSE-PWR
G77
1
2
GAP-CLOSE-PWR
G69
1
2
GAP-CLOSE-PWR
G75
1
2
GAP-CLOSE-PWR
G73
1
2
GAP-CLOSE-PWR
G70
1
2

GAP-CLOSE-PWR
G76
1
2
GAP-CLOSE-PWR
G74
1
2
GAP-CLOSE-PWR
G71
1
2
GAP-CLOSE-PWR
G72
1
2
GAP-CLOSE-PWR

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

SC412A +1.05VS
Size
A3

Document Number

Date: Monday, January 07, 2008


5

Rev

SC

Warrior
Sheet
1

40

of

42

+1.8V

1
C166
SC10U10V5ZY-1GP

C169
SC1U10V3ZY-6GP

DY C165
SC10U10V5ZY-1GP

+5VALW

G109
1

GAP-CLOSE-PWR
G38
1
2

Vo(cal.)=1.5V

U18

1D5V_LDO

2
1
2

Vo=0.8*(1+(R1/R2))

SC33P50V2JN-3GP

R79
69K8R2F-GP

C175
SC10U10V5ZY-1GP

1
TC9
ST100U4VBM-L-GP

C172

R78
60K4R2F-GP

G972-120ADJF11U-GP

SO-8-P

DY

5912_FB_1

GAP-CLOSE-PWR

SA 1010

4
3
2
1

PM_SLP_S3#

VO#4
VO#3
ADJ
GND

OCP=6A
+1.5VS

GAP-CLOSE-PWR
G37
1
2

C176
SC10U10V5ZY-1GP

PM_SLP_S3#

VIN
VPP
POK
VEN
GND

19,23,24,30,33,39,40

5
6
7
8
9

KEMET NTD:5.615
100uF, 4V, B2 Size
Iripple=1.1A, ESR=70mohm

Trace Length=3cm
Trace Width=5mils
Trace Resistance>80mohm

<Core Design>

om

nf
@
ho
tm
ai
l.c

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

GMT_1D5V_LDO
Date: Monday, January 07, 2008
5

Rev

Warrior

SC

ai

Document Number

he
x

Size
A3

Sheet
1

41

of

42

H18

H20

HOLE

H5

H6

HOLE

HOLE

H15

HOLE

H14

HOLE

H8

H12
HOLE

H9
HOLE

H13
HOLE

H10

HOLE

HOLE

3
9
2

H19

H21
HOLE

HOLE

HOLE

H16
HOLE

H3
HOLE

H2
HOLE

H4
HOLE

H1

4
1
8

6
10
7

GEN8

1206 SI
1227 SI
SPR7

SPR6

SPR5

SPRING-U3

SPRING-57-GP

SPRING-U3

SPRING-U3

SPR4

SPRING-23-GP

SPR3

SPRING-57-GP

SPR2

SPRING-57-GP

SPR1

SPR1-2:
SPR3-5:
SPR6 :
SPR7 :

34.40U07.001
34.42T14.002
34.39S07.003
34.40U07.001

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

MISC
Size
A3

Document Number

Date: Monday, January 07, 2008


A

Rev

SC

Warrior
Sheet
E

42

of

42