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DATA SHEET
Philips Semiconductors
Product specication
74AHC08; 74AHCT08
TYPICAL SYMBOL tPHL/tPLH CI CO CPD PARAMETER propagation delay nA, nB to nY input capacitance output capacitance power dissipation capacitance CL = 50 pF; f = 1 MHz; notes 1 and 2 CONDITIONS AHC CL = 15 pF; VCC = 5 V VI = VCC or GND 3.5 3.0 4.0 10 AHCT 5.0 3.0 4.0 12 ns pF pF pF UNIT
Notes 1. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD VCC2 fi + (CL VCC2 fo) where: fi = input frequency in MHz; fo = output frequency in MHz; (CL VCC2 fo) = sum of outputs; CL = output load capacitance in pF; VCC = supply voltage in Volts. 2. The condition is VI = GND to VCC. PINNING PIN 1, 4, 9 and 12 2, 5, 10 and 13 3, 6, 8 and 11 7 14 SYMBOL 1A to 4A 1B to 4B 1Y to 4Y GND VCC DESCRIPTION data inputs data inputs data outputs ground (0 V) DC supply voltage
1999 Sep 24
Philips Semiconductors
Product specication
74AHC08; 74AHCT08
PACKAGES NORTH AMERICA PINS 74AHC08D 74AHC08PW DH 74AHCT08D 74AHCT08PW DH 14 14 14 14 PACKAGE SO TSSOP SO TSSOP MATERIAL plastic plastic plastic plastic CODE SOT108-1 SOT402-1 SOT108-1 SOT402-1
handbook, halfpage
1A 1B 1Y 2A 2B 2Y GND
1 2 3 4 5 6 7
MNA220
14 VCC 13 4B 12 4A
handbook, halfpage
08
11 4Y Y 10 3B B 9 3A
MNA221
8 3Y
1 2
&
1 2 4 5 9 10 12 13
1A 1B 2A 2B 3A 3B 4A 4B
1Y
3 4 & 6
2Y
3Y
9 10
&
4Y
11
MNA222
12 13
&
11
MNA223
1999 Sep 24
Philips Semiconductors
Product specication
74AHC08; 74AHCT08
74AHCT UNIT TYP. MAX. 5.0 +25 +25 5.5 5.5 VCC +85 V V V C
TYP. MAX. MIN. 5.0 +25 +25 5.5 5.5 VCC +85 4.5 0 0 40
+125 40 100 20
+125 C 20 ns/V
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground = 0 V). SYMBOL VCC VI IIK IOK IO ICC Tstg PD Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. For SO packages: above 70 C the value of PD derates linearly with 8 mW/K. For TSSOP packages: above 60 C the value of PD derates linearly with 5.5 mW/K. PARAMETER DC supply voltage input voltage range DC input diode current DC output diode current DC VCC or GND current storage temperature range power dissipation per package for temperature range: 40 to +125 C; note 2 VI < 0.5 V; note 1 VO < 0.5 V or VO > VCC + 0.5 V; note 1 CONDITIONS MIN. MAX. UNIT 0.5 0.5 65 +7.0 +7.0 20 20 25 75 500 V V mA mA mA mA mW
+150 C
1999 Sep 24
Philips Semiconductors
Product specication
74AHC08; 74AHCT08
74AHC family Over recommended operating conditions; voltage are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER VIH HIGH-level input voltage VCC (V) 2.0 3.0 5.5 VIL LOW-level input voltage 2.0 3.0 5.5 VOH HIGH-level output voltage; all outputs HIGH-level output voltage VI = VIH or VIL; IO = 50 A VI = VIH or VIL; IO = 4.0 mA VI = VIH or VIL; IO = 8.0 mA VOL LOW-level output voltage; all outputs LOW-level output voltage VI = VIH or VIL; IO = 50 A VI = VIH or VIL; IO = 4 mA VI = VIH or VIL; IO = 8 mA II IOZ ICC CI input leakage current 3-state output OFF current quiescent supply current input capacitance VI = VCC or GND 2.0 3.0 4.5 3.0 4.5 2.0 3.0 4.5 3.0 4.5 5.5 MIN. 1.5 2.1 1.9 2.9 4.4 2.0 3.0 4.5 25 TYP. 0.5 0.9 1.65 0.1 0.1 0.1 0.36 0.36 0.1 Tamb (C) 40 to +85 0.5 0.9 1.65 40 to +125 UNIT 0.5 0.9 1.65 V V V
MAX. MIN. MAX. MIN. MAX. 1.5 2.1 1.9 2.9 4.4 1.5 2.1 1.9 2.9 4.4 V
3.85
3.85
3.85
2.58 3.94 0 0 0 3
0.25 2.0 10
10.0 A 40 10 A pF
1999 Sep 24
Philips Semiconductors
Product specication
74AHC08; 74AHCT08
74AHCT family Over recommended operating conditions; voltage are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output VI = VIH or VIL; voltage; all outputs IO = 50 A HIGH-level output voltage VOL VI = VIH or VIL; IO = 8.0 mA VCC (V) 4.5 25 0.8 0.1 0.36 0.1 Tamb (C) 40 to +85 0.8 0.1 0.44 1.0 2.5 40 to +125 UNIT 0.8
MIN. TYP. MAX. MIN. MAX. MIN. MAX. 2.0 4.4 3.8 2.0 4.4 V V V V V V A
4.5 to 5.5 2.0 4.5 to 5.5 4.5 4.5 4.5 4.5 5.5 4.4
3.94 0
LOW-level output VI = VIH or VIL; voltage; all outputs IO = 50 A LOW-level output voltage VI = VIH or VIL; IO = 8 mA VI = VIH or VIL
II IOZ
VI = VIH or VIL; 5.5 VO = VCC or GND per input pin; other inputs at VCC or GND; IO = 0 VI = VCC or GND; 5.5 IO = 0 VI = VCC 2.1 V other inputs at VCC or GND; IO = 0
0.25
10.0 A
ICC ICC
quiescent supply current additional quiescent supply current per input pin input capacitance
2.0 1.35
20 1.5
40 1.5
A mA
4.5 to 5.5
CI
10
10
10
pF
1999 Sep 24
Philips Semiconductors
Product specication
74AHC08; 74AHCT08
1.0 1.0
10.5 14.0
1.0 1.0
11.0 15.5
ns ns
VCC = 4.5 to 5.5 V; note 2 tPHL/tPLH propagation delay nA, nB to nY see Figs 5 and 6 3.0 4.2 5.9 7.9 1.0 1.0 7.0 9.0 1.0 1.0 7.5 10.0 ns ns
Notes 1. Typical values at VCC = 3.3 V. 2. Typical values at VCC = 5.0 V. Type 74AHCT08 GND = 0 V; tr = tf 3.0 ns. TEST CONDITIONS SYMBOL PARAMETER WAVEFORMS VCC = 4.5 to 5.5 V; note 1 tPHL/tPLH propagation delay nA, nB to nY see Figs 5 and 6 15 pF 50 pF 3.2 4.4 6.9 7.9 1.0 1.0 8.0 9.0 1.0 1.0 9.0 10.0 ns ns CL MIN. 25 TYP. Tamb (C) 40 to +85 40 to +125 UNIT
1999 Sep 24
Philips Semiconductors
Product specication
74AHC08; 74AHCT08
handbook, halfpage
VI VM(1)
tPLH
MNA224
VO
1000
S1
1999 Sep 24
Philips Semiconductors
Product specication
74AHC08; 74AHCT08
SOT108-1
A X
c y HE v M A
Z 14 8
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 8.75 8.55 E (1) 4.0 3.8 0.16 0.15 e 1.27 0.050 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 Q 0.7 0.6 0.028 0.024 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z (1) 0.7 0.3 0.028 0.012
inches 0.069
8 0o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT108-1 REFERENCES IEC 076E06S JEDEC MS-012AB EIAJ EUROPEAN PROJECTION
1999 Sep 24
Philips Semiconductors
Product specication
74AHC08; 74AHCT08
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
c y HE v M A
14
Q A2 pin 1 index A1 Lp L (A 3) A
1
e bp
7
w M detail X
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.10 A1 0.15 0.05 A2 0.95 0.80 A3 0.25 bp 0.30 0.19 c 0.2 0.1 D (1) 5.1 4.9 E (2) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1.0 Lp 0.75 0.50 Q 0.4 0.3 v 0.2 w 0.13 y 0.1 Z (1) 0.72 0.38 8 0o
o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT402-1 REFERENCES IEC JEDEC MO-153 EIAJ EUROPEAN PROJECTION ISSUE DATE 94-07-12 95-04-04
1999 Sep 24
10
Philips Semiconductors
Product specication
74AHC08; 74AHCT08
Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. For packages with leads on two sides and a pitch (e): larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
1999 Sep 24
11
Philips Semiconductors
Product specication
74AHC08; 74AHCT08
Suitability of surface mount IC packages for wave and reow soldering methods SOLDERING METHOD PACKAGE WAVE BGA, LFBGA, SQFP, TFBGA HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS PLCC(3), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. DEFINITIONS Data sheet status Objective specication Preliminary specication Product specication Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specication is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specication. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. This data sheet contains target or goal specications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains nal product specications. not suitable not not not suitable(2) recommended(3)(4) recommended(5) suitable suitable suitable suitable suitable suitable REFLOW(1)
1999 Sep 24
12
Philips Semiconductors
Product specication
74AHC08; 74AHCT08
1999 Sep 24
13
Philips Semiconductors
Product specication
74AHC08; 74AHCT08
1999 Sep 24
14
Philips Semiconductors
Product specication
74AHC08; 74AHCT08
1999 Sep 24
15
For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 Philips Electronics N.V. 1999
Internet: http://www.semiconductors.philips.com
SCA 68
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
245002/02/pp16
Sep 24