8085Architecture& 8085 Architecture & ItsAssemblylanguageprogramming

DrASahu DeptofComputerScience& Engineering Engineering IITGuwahati

Outline
8085
Blockdiagram(DataPath) InstructionSetof8085

Sampleprogramof8085 Counter & Time elay Counter&TimeDelay StackandSubRoutine Assignmenton8085 Assignment on 8085 Introductionto8086and30x86architecture

8085MicroprocessorArchitecture
INTR INTA ReSeT6.5 RST5.5 RST7.5 TRAP SID SOD

InterruptControl Bus8Bit ACC tmp R Flag IDecode & M/C / Encoding

SerialI/OControl

MUX IR W B D H SP PC Z C E L

ALU
TimingandControl

Inc/Dec.ter I /D t Addlatch

AddBuff Add Buff

Data/AddBuff Data/Add Buff

A15 A0

AddressBus(16bit)

Memory 8085 MPU

I/P O/P

D7 D0

DataBus(8bit) ControlBus(8bit)

Assumption
RAM Memory is interfaced RAMMemoryisinterfaced Instructionsarestoredinmemory O OneI/Odisplayportisinterfacedtodisplay /O di l i i f d di l dataofACC

SimpleAssemblyProgram Simple Assembly Program

MVIA,24H//loadReg ACCwith24H MVIB,56H//loadReg Bwith56H ADDB//ACC=ACC+B OUT01H//DisplayACCcontentsonport01H HALT//Endtheprogram // p g

Result:7A(AllareinHex) DAAoperationforDecimalAdjustA+6=10H DAA operation for Decimal Adjust A+6=10H

Flowcharttomultiplytwonumber Flowchart to multiply two number

Start LDA2000//Loadmultiplicant toaccumulator LDA 2000 // Load multiplicant to accumulator MOVB,A//Movemultiplicant fromA(acc)toBregister LDA2001//Loadmultipliertoaccumulator MOVC,A//MovemultiplierfromAtoC MOVC,A//MovemultiplierfromAtoC MVIA,00//Loadimmediatevalue00toACC MVI A 00 // Load immediate value 00 to ACC ADDB//AddB(multiplier)withA DCRC//DecrementC,itactasacounter

JNZL//JumptoLifC!=0 STA2010//Storeresultintomemory HLT//End

Codetomultiplytwonumber Code to multiply two number

LDA2000//Loadmultiplicant toaccumulator MOVB,A//Movemultiplicant f MOV B A // M l i li fromA(acc)toBregister A( ) B i LDA2001//Loadmultipliertoaccumulator MOVC,A//MovemultiplierfromAtoC MOV C A // Move multiplier from A to C MVIA,00//Loadimmediatevalue00toa L:ADDB//AddB(multiplier)withA // ( p ) DCRC//DecrementC,itactasacounter JNZL//JumptoLifCreaches0 STA2010//Storeresultintomemory HLT//End

Delay of Instructions DelayofInstructions

Performance/delayofeachinstruction

F R MVIC,FFH7TState MVI C FFH 7 T State F LOOP:DCRC4TState JNZLOOP7/10TState JNZ LOOP 7/10 T State F R R
PerformanceofotherINS F ADDR4TState ADD R 4T S F R ADDM7TState S R R W W 18TState CALLaddr F=Fetchwith4State,S=Fetchwith6State, R=MemoryRead,W=MemoryWrite

Time Delay Loop TimeDelayLoop

Performance/delayofeachinstruction
MVIC,FFH7TState MVI C FFH 7T S F R LOOP:DCRC4TState F JNZLOOP7/10TState F R R

Timedelayinloop
TL=TxLoopTStatesxN10 whereT=Systemclockperiod N10=Equiv.decimalvalueofcountloadedtoC ( ) (g ) TL=0.5x106 x(14x255)=1.8ms(ignore10TState)

Time Delay: Nested Loop TimeDelay:NestedLoop

Performance/delayofeachinstruction MVIC,FFH7TState MVI C FFH 7 T State F R MVID,FFH7TState F R LOOP1:DCRC4TState LOOP1: DCR C 4 TState F LOOP2:DCRD4TState F JNZLOOP27/10T State JNZ LOOP2 F R R 7/10 TState JNZLOOP17/10TState F R R TimedelayinNestedloop Time delay in Nested loop
TNL=N110 xTx(L1_TStates+L2_TStatesxN210 )

TrafficLightControl:Counter&Delay
TurnSignaltoRed LoadDelayRed y TimeDelay TurnSignaltoYellow LoadDelayYellow TimeDelay TurnSignaltoGreen T Si lt G LoadDelayGreen TimeDelay

LOOP: MVIA01H OUT01H LDBDELAY_RED LD B DELAY RED CALLDELAY MVIA02H OUT01H LDBDELAY_YELLOW CALLDELAY MVI A 03H MVIA03H OUT01H LDBDELAY_GREEN CALLDELAY CALL DELAY JMPLOOP

StackPointer(SP)&StackMemory ( ) y
Thestackisanareaofmemoryidentifiedby theprogrammerfortemporarystorageof the programmer for temporary storage of information. The stack is a LIFO structure ThestackisaLIFOstructure. Thestacknormallygrowsbackwardsinto Memory memory. memory
Programmercandefinesthe bottomofthestack(SP) bottom of the stack (SP) andthestackgrowsupinto reducingaddressrange.

TheStack grows backwards intomemory

Bottom ofthe Stack

StackMemory Stack Memory

Growsbackwardsintomemory Bettertoplacethebottomofthestackatthe l h b f h k h endofmemory Tokeepitasfarawayfromuserprogramsas possible. StackisdefinedbysettingtheSP(Stack ) g Pointer)register.
LXI SP, FFFFH

This sets SP to location FFFFH (end of memory ThissetsSPtolocationFFFFH(endofmemory for8085).

SavingInformationontheStack Saving Information on the Stack

SaveinformationbyPUSHing ontoSTACK RetrievedfromSTACKbyPOPing itoff. Retrieved from STACK by POPing it off PUSHandPOPworkwithregisterpairsonly. ExamplePUSHB E l PUSH B
DecrementSP,CopyBto0(SP) D DecrementSP,CopyCtp 0(SP) SP C C
B
12

C
F3
FFFB FFFC FFFD FFFE FFFF

ExamplePOPB
Copy0(SP)toC,IncrementSP ( ) Copy0(SP)toB,IncrementSP

F3 12

SP

Stack/LIFOuseinCALL/RET
Retrieveinformationbackintoitsoriginal location
TheorderofPUSHsandPOPsmustbeopposite

8085recognizesoneadditionalregisterpair g g p
PSW(ProgStatusword)=ACCandFlag
BeforeanyroutineCALLdothis PUSH B PUSH D PUSH PSW AfterRETURNfromcalldothis POP PSW POP D POP B

Subroutines
A subroutine is a group of instructions
That is used repeatedly in different places of the program. Rather than repeat the same instructions several times It can be grouped into a subroutine and call from the different locations.

Instructionsfordealingwithsubroutines.
TheCALLinstructionisusedtoredirectprogram p g executiontothesubroutine. TheRETinstructionisusedtoreturntheexecutionto thecallingroutine. h ll

CALL/RETInstruction
YoumustsettheSPcorrectlybeforeusingCALL CALL 5000H CALL5000H
PushthePCvalueontothestack L d PC ith 16 bit dd LoadPCwith16bitaddresssuppliedCALLins. li d CALL i

RET:LoadPCwithstacktop;POPPC
PC
2000 CALL 5000 CALL5000 2003 2003
FFFB FFFC FFFD FFFE FFFF
17

03 20

SP

CallbyReferences Call by References

IfSRperformsoperationsonthecontentsof theregisters the registers Thesemodificationswillbetransferredback tothecallingprogramuponreturningfroma h ll f subroutine. Ifthisisnotdesired,theSRshouldPUSH registersandPOPonreturn.

18

Stack/LIFOuseinCALL/RET
Retrieveinformationbackintoitsoriginal location
TheorderofPUSHsandPOPsmustbeopposite

8085recognizesoneadditionalregisterpair g g p
PSW(ProgStatusword)=ACCandFlag
BeforeanyroutineCALLdothis PUSH B PUSH D PUSH PSW AfterRETURNfromcalldothis POP PWD POP D POP B

Factorialofanumber
LXISP,27FFH//Initializestackpointer LDA2200H//Getthenumber CPI02H//Checkifnumberisgreaterthan1 CPI 02H // Ch k if b i t th 1 JCLAST MVID,00H//Loadnumberasaresult MOVE,A DCRA MOVC,A//Loadcounteronelessthannumber , // CALLFACTO//CallsubroutineFACTO XCHG//GettheresultinHL//HLwithDE SHLD2201H//Storeresult//storeHLat0(16bit) SHLD 2201H // Store result // store HL at 0(16bit) JMPEND LXIH,000lH//Storeresult=01 SHLD2201H HLT

LAST: END:

SubRoutineforFACTORIAL Sub Routine for FACTORIAL

FACTO:LXIH,0000H MOVB,C//Loadcounter BACK: DADD//doubleadd;HL=HL+DE DCRB DCR B JNZBACK//Multiplybysuccessiveaddition XCHG//StoreresultinDE//HLwithDE DCRC//Decrementcounter C C // CNZFACTO//CallsubroutineFACTO RET//Returntomainprogram

AssignmentI
Writeandexecute8085assemblylanguage programtofindvalueofNth Fibonaccinumber (Recursiveversion:usingrecursivesubroutine (R i i i i b ti call) 16 bit can support up to 65356 > F24 16bitcansupportupto65356>F Deadline 12th Aug 2010 11 55Mid night Deadline:12 Aug2010,11.55Midnight Afterdeadlinegrading:Max5outof10 S d TXT SendTXTversionofprogramwithfilename i f ith fil RollNo.txttoasahu@iitg.ernet.in with Assignmentoneassubjectofemail Assignment one as subject of email Dontsubmitcopiedone:willgetNegativemarks

Introductionto 8086&i386processor
16 bit Microprocessor 16bitMicroprocessor Allinternalregistersaswellasinternaland externaldatabuseswere16bitswide external data buses were 16 bits wide 4MainRegister,4IndexRegister,4Segment Register,StatusReg,Instr P R i S R I Ptr. Notcompatiblewith8085,butwithsuccessors TwoUnitworksinparallel:
BusInterfaceUnit(BIU) ( ) ExecutionUnit(EI)

8086Architecture
BusInterface Unit
SUM CBUS
Q6 Q5 Q4 Q3 Q2 Q1

CS(CodeSeg Reg) DS(DataSeg Reg ) ES(ExtraSeg Reg ) SS(StackSeg Reg) IP(Intr Ptr) IP ( (Intr ) Operand InDirect

Sequencer
ABUS

Execution Unit
AH BH CH DH AL BL CL DL

TempA TempB TempC

SI(SourceIdx ) DI (Dest Idx) DI(Dest.Idx) ( ) BP(BasePtr ) SP(StackPtr) Z(FlagReg)

ALU

8086Registers 8086 Registers

AX theaccumulatorregister(dividedintoAH/AL) BX thebaseaddressregister(dividedintoBH/BL) CX thecountregister(dividedintoCH/CL) DX the data register (divided into DH / DL) thedataregister(dividedintoDH/DL) AH AL BH BL CH CL DH DL SI(SourceIdx ) DI(Dest.Idx) BP(BasePtr ) SP (St k Pt ) SP(StackPtr) Z(FlagReg) CS(CodeSeg Reg) CS (Code Seg DS(DataSeg Reg ) ES(ExtraSeg Reg ) SS(StackSeg SS (Stack Seg Reg) IP(Intr Ptr)

SI sourceindexregister. i DI d i i i d destinationindexregister. BP basepointer. SP stackpointer.

8086Architecture
ExecutionUnit:
ALUmaybeloadedfromthreetempregisters(TMPA,TMPB, TMPC) Executeoperationsonbytesor16bitwords. Theresultstoredintotempreg orregistersconnectedtothe internaldatabus.

BusInterfaceUnit
BIUisintendedtocomputetheaddresses. Twotemporaryregisters p y g indirectaddressing foursegmentregisters(DS,CS,SSandES), Programcounter(IP InstructionPointer), g ( ), A6byteQueueBuffertostoretheprefetchedopcodes anddata. ThisPrefetch Queueoptimizethebususage. Toexecuteajumpinstructionthequeuehastobeflushedsincethe To execute a jump instruction the queue has to be flushed since the prefetchedinstructionsdonothavetobeexecuted.

NextClassAgenda Next Class Agenda

Detailof8086Architecture Advanced32bitarchitecture(i386,Pentium,p4)
Iknowalittlebitofthis Myexpertiseareaofwork

Programming model for x86 architecture Programmingmodelforx86architecture 8086Assemblylanguageprogramming MASM/TASM/NASM(x86assembler) MASM / TASM /NASM ( 86 assembler) Ifyoumissthenextclass,willmissalot

Thanks Th k