Power Conversion from Low-Voltage dc to High-Voltage ac for Single-Phase Grid-Tie Applications

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JIH-SHENG (JASON) LAI

MASTERSERIES

or low-voltage dc energy sources, a power conditioning system (PCS) is needed to convert the energy sources to a higher-voltage dc before making it to ac for gridtie applications. Solar photovoltaic (PV) and fuel cells are perhaps the most well-known and prospective energy sources with low-voltage dc output. A thermoelectric generator, a battery, and an ultracapacitor are also examples of such low-voltage dc energy sources. Recently, numerous circuit topologies for the power

conversion from low-voltage dc to high-voltage ac for grid-tie applications were proposed to deal with specific issues such as high efficiency, low cost, and safety. The aim of this article is to introduce and discuss the main features of these relatively new circuit topologies that deal with these practical design issues. Review articles [1][4] provided some good insights on the circuit topology selection for solar PV and small distributed generation (DG) inverters. With low-voltage dc as the input, a typical PCS requires a dcdc converter as the boost stage and a dcac inverter for the grid connection. It is also possible to combine a dcdc voltage boost and dcac conversion in one stage using the combination of high-frequency transformer isolation and matrix converter or special control techniques [5][8]. The circuit topology selection criteria are highly dependent on the voltage and current levels, grounding requirement, and safety concern. With significant progress in renewable energy and DG areas in recent years, it is the intention of this article to provide more circuit topology selection options for low-voltage energy sources. For the dcdc boost stage, a boost converter is naturally the best choice. However, in many cases, the source voltage is so low that a high boost ratio without transformer becomes impractical. This study identifies some circuits that combine the transformer with conventional nonisolated boost converter to obtain a high boost ratio [9][13]. For low-voltage, high-current cases, multiphase dcdc power conversions are introduced for cost and efficiency considerations [14][16]. For dcac inverters, the circuit can be either a voltage- or current-source

type. Hard-switched voltage-source inverters have been widely used in the conventional design. For efficiency consideration, soft-switching voltage- and current-source inverters have drawn some interest in recent designs [12], [17][19]. If the need is only unity power factor, then some of the inverter switches can be replaced with diodes, and some switches can operate at a fundamental frequency, which should allow the use of more efficient power semiconductor combinations. The dual buck, the dual boost, and the dual buck-boost inverters belong to this category [20][22]. Lowswitching frequency reduces not only the switching loss but also the electromagnetic interference (EMI). As such, the multilevel inverters mentioned in [23] and [24] already pointed out the possibility of using cascaded inverters for low-voltage dc energy applications. In [25] and [26], a charge balance control algorithm was proposed for multilevel cascaded inverters using only one energy source. For nonstiff dc sources such as PV and fuel cells, the second harmonic current content propagated from the single-phase inverter output tends to deteriorate the source utilization. Ripple reduction and power decoupling techniques [27][29] need to be incorporated to avoid the maximum power point (MPP) shifting or instability of the balance of plant (BOP). Another system-level issue is related to the parasitic capacitance source, especially PV panels, in which the large area creates large capacitance between the electrical terminals and ground. The ground-loop leakage current becomes a major safety concern. Thus, low-frequency ripple and leakage current are identified as two major system-level issues that need

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The low-frequency switching allows the use of these slow but low-conduction drop devices.
to be addressed at the beginning of the design stage. With the aforementioned circuit options and design considerations, a practicing engineer may find it difficult to come up with a perfect solution that can satisfy all aspects. The purpose of this article is to review the circuit topology options and focus on the discussion of low-voltage dc energy sources applied to singlephase grid-tie applications adopted by the industry.

PCS Architectures for Low-Voltage dc Sources

Figure 1 shows a conventional PCS for low-voltage dc sources, Vin . The

Vdc + Vin dc/dc Converter Boost Stage High Frequency dc/ac SPWM Inverter

Vac

FIGURE 1 A typical PCS architecture with a dcdc converter and an SPWM dcac inverter.

Voltage Source PushPull Converter

dc/ac Inverter ac Filter Output + Vdc

+ Vin

FIGURE 2 A PCS with voltage-type source pushpull converter as the dcdc stage and an FB inverter as the dcac stage.

Current Source PushPull Converter

dc/ac Inverter Filter + Vdc ac Output

+ Vin

FIGURE 3 A PCS with current-type source pushpull converter as the dcdc stage and an FB inverter as the dcac stage.

system consists of a dcdc converter to boost the voltage and a dcac inverter to produce sinusoidal output. The dcdc converter can be isolated or nonisolated. Output of the dcdc converter, Vdc , needs to be higher than the peak of the inverter output, Vac . With a pure dc as the input, the inverter needs to operate in a sinusoidal pulsewidth modulation (SPWM) mode to produce a sinusoidal current for grid connection. For a power level around the 1-kW range, two example designs of isolated boost stage dcdc converter are shown in Figures 2 and 3 [30], [31]. Figure 2 adopts a voltage source pushpull dcdc converter, whereas Figure 3 uses a current source push pull dcdc converter. The inverter stage is the same SPWM inverter for both the systems. The pushpull converter allows the use of nonisolated gate driver and requires only two switches; thus, it is attractive for low-cost design. The main problem is its center tap that can cause difficulties on termination and imbalance in a high-current system. Thus, for a higher-power level with input current exceeding 100 A, full-bridge (FB) or multiphase converters are more attractive [14], [16]. On the other hand, lower-power level, single-switch dc dc converters such as flyback or forward converters, can be considered for cost reasons. In terms of comparison between the voltage and current sources, the current source makes more sense because the overall dcdc converter function is to boost the voltage, and the current source converter can adapt to a wider input voltage range. However, the isolated boost-type current-source converter requires a special circuit and control to build up the initial output voltage to avoid the startup surge current [32]. For cost considerations, the current source requires higher-voltage rating switches and a larger-size inductor. Therefore, voltage-source type is more attractive in high-power designs where cost and control are the major concerns. It is possible to produce SPWMtype waveforms at the dcdc converter

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output. Figure 4 shows the block diagram and possible waveforms at each stage for a PCS using dcdc converter to produce pulsating SPWM component for the subsequent stage dcac inverter. The dcac conversion can be achieved with a polarity selection circuitry. The circuit topology is essentially the same as that used in Figure 1, but the control design is quite different, and the architecture is considered as a single-stage power conversion design. High efficiency can be achieved using soft switching to eliminate switching loss [8] for the dcdc stage and using low-conduction loss devices such as thyristors for the dc ac polarity selection stage. Figure 5 shows the dcac selection stage using thyristor as the selection switches and their respective waveforms. The low-frequency switching allows the use of these slow but lowconduction drop devices. An obvious difficulty is to generate the half-wave sinusoidal component at the dcdc stage output. In addition, a major drawback of this type of architecture is the difficulty of decoupling the lowfrequency ripple current components at the source. Turning off thyristors is also nontrivial. A simple solution is to add a MOSFET in the dc link to help turning off thyristors. The efficiency and cost may suffer, but the gating control can be greatly simplified. If an isolated dcdc is used in a system shown in Figures 1 and 4, the design is to produce a high-frequency ac and then rectify it to dc, as shown in Figures 2 and 3. It is possible to eliminate the rectifying stage by directly converting the high-frequency ac to low-frequency ac using a matrix converter or cycloconverter. Figure 6 shows the PCS architecture with high-frequency dcac transformer to convert the low-voltage dc to highfrequency high-voltage ac and then a matrix converter to convert the highfrequency PWM acac converter to low-frequency ac. The dcac circuit can be selected based on the voltage and current levels and the available switches. Figure 7 shows an FB converter for a high-frequency ac generation. The

output-stage matrix converter requires the use of reverse blockingtype devices such as thyristor or a series-connected diode and a gatecontrolled switch such as power MOSFET and insulated-gate bipolartransistor (IGBT).

Circuit Topologies for Boost-Stage dcdc Converters

Nonisolated dcdc Converters with High Boost Ratio For low-input voltage energy sources, it is possible to float the source such

that the converter circuit does not require isolation between the input and output. To provide sufficiently high enough voltage for the inverter input, however, it is nontrivial to design a cost-effective high boost ratio without isolation transformer. The transformer-isolated circuits tend to be less efficient and more expensive. Recently, a combination of flyback and boost converters was proposed to increase the boost ratio without significant cost and efficiency penalties [9], [10]. As shown in Figure 8, the output voltage is the sum of a flyback converter, which consists of

Vac + Vin dc/dc Converter Boost Stage + Vdc Low Frequency dc/ac Polarity Selection

FIGURE 4 A PCS architecture with a dcdc converter to produce dc with half-wave ac component and a low-frequency dcac polarity selection stage.

S1, S4

S2, S3 vinv vgrid

+ Vin

HalfWave SPWM dc/dc Stage

S1 Vdc S2

S3

S4

Filter

FIGURE 5 Circuit diagram showing the low-frequency dcac polarity section stage using thyristors and their respective switching waveforms.

Vac + Vin High Frequency PWM dc/ac High Frequency PWM ac/ac

FIGURE 6 A PCS architecture with high-frequency dcac and high-frequency acac matrix converter.

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L1 =L2 , D1 , and C1 , and a boost converter, which consists of L1 , M1 , D2 , and C2 . Since the flyback output is nD=(1 D) and boost output is 1= (1 D), the total output voltage is (1 nD)=(1 D). Here, n is the turns ratio between the secondary and primary, and D is the switch duty cycle. When the switch M1 is turned on, the

energy is stored in L1 , and when M1 is turned off, the energy is released to charge both C1 and C2 through diodes D1 and D2 . The problem is when M1 turns on these diodes need to be turned off, and a parasitic capacitance across D1 and the leakage inductance can cause severe ringing and additional voltage stress on D1 .

FB Converter Matrix Converter Filter + Vin

FIGURE 7 Circuit diagram showing the FB converter as the dcac stage and matrix converter as the acac stage.

In [11] and [12], a circuit is proposed to add a capacitor between two windings, or x and y, and a diode is added between boost output and secondary of the flyback winding to circulate the energy, as shown in Figure 9. The added capacitor, C1 , stores the energy when the switch M1 is turned on and maintains a constant voltage related to the turns ratio n, duty cycle D, and input voltage Vin . During switch-off state during which D1 and D3 conduct, C1 energy is released to output, and the output voltage equals the sum of the two capacitor voltage and the secondary winding voltage. If the leakage inductance is negligible, then the output voltage equals (2 n)Vin =(1 D). Compared with the version with combination of flyback and boost converters, this circuit allows a higher-voltage boost ratio, and thus the turns ratio or duty cycle can be reduced for the same output voltage. Isolated dcdc with High Input Current The isolated dcdc circuits in Figures 2 and 3 require the device voltage higher than its input voltage, which poses a significant penalty, because the MOSFET die size is proportional to an exponential rate of its blocking voltage. Thus, for a high-power PCS, an FB circuit shown in Figure 7 is more cost effective because its device blocking voltage is the same level as the input voltage. If the power continues increasing such that the current cannot be handled by a discrete device, it would require paralleling multiple devices or a module-type device. In this case, the parasitic inductance associated with the paralleling device can cause significant loss under highfrequency switching. The module is also much more costly than a discrete device because of its expensive package. Therefore, increasing the number of phase legs to reduce the current flowing in each device makes more sense. Figure 10 shows a three-phase, bridge-type converter with a transformer in Y connection on both primary and secondary windings. The three-phase structure allows switching

1:n Vin L1 M1 g L2

D1 + 1:n L1 Vin D1

Vo Vin

1 + nD 1D

C1

V1

+ L2 C1 y

Flyback L1 Vin + g d M1 s Boost D2 + C2 V2

+ M1 g

D2 C2

Vo = V1 + V2

FIGURE 8 A high boost ratio dcdc converter circuit derived from cascading a flyback converter and a boost converter.

L1 x Vin +

C1 D1 + y

L2 + D2 +

D3 + C3 Vo = 2+n 1D Vin

Cin g

M1 C2

FIGURE 9 A high boost ratio dcdc converter using capacitor coupling.

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Fuel Cell or Other Energy Source

Cin

Co

Circuit Topologies for Nonconventional dcac Inverters

The conventional single-phase dcac power conversion typically employs an FB-type inverter circuit as shown in Figures 2 and 3. This type of circuit

FIGURE 11 Multiphase dcdc converter with six-phase legs.

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Active Load

current ripples to be canceled, and thus the current stress of the input capacitor Cin and output inductor Lo can be largely reduced. The drawback of a Y-connected transformer is a floating neutral that may cause unequal transformer flux distribution during transients. Therefore, it is better to adopt even-number phases so that the primary windings do not have a floating point. As shown in Figure 11, the dcdc converter adopts six-phase legs but is arranged in a three-phase configuration. Each phase consists of two-phase legs and operates like an FB converter. The three phases are 120 separated so that the input capacitor and output inductor ripple currents can be canceled. The current handling capability is three times that of the FB converter. If a discrete devicebased FB converter is suitable for a kilowatt-level PCS, then the six-phase leg structure should allow for three times the power handling while improving the efficiency by eliminating switching current ripples in Cin and Lo . The secondary winding of a three-phase six-leg structure can be connected in Y-configuration to double the output voltage so that the turns ratio can be cut to half when compared with a FB converter. Therefore, the leakage inductance can be reduced to further improve the efficiency for a low-voltage system. The incoming phase current can turn off the outgoing phase current, and thus the converter can operate at zerovoltage switching (ZVS) on one-phase leg and zero-current switching (ZCS) on the other phase leg [14]. Overall, when compared with a typical FB converter, a multiphase dcdc converter not only can handle higher power but also is more efficient because of current ripple elimination and switching loss reduction.

The circuit topology selection criteria are highly dependent on the voltage and current levels, grounding requirement, and safety concern.
requires high-frequency SPWM switching and output filter to obtain sinusoidal current. The loss associated with high-frequency switching is nontrivial. For energy applications where efficiency is most concerned, high-efficiency inverters have gained more attention in recent years. In this section, three possible efficiency-improvement techniques are introduced. Soft-Switching Inverters These were proposed primarily for motor-drive applications using either ZVS or ZCS technique. Recent references [18] and [33] indicate that using CoolMOS as the main switching device and IGBT as the auxiliary switching device can achieve high-efficiency power conversion. Figure 12(a) shows such a soft-switching circuit configured in a half-bridge inverter, with C1 and C2 splitting the dc-bus voltage. Their voltages may be balanced with the front-end dcdc converter, which can provide split dc voltages that are well balanced. The basic operation can be explained in Figure 12(b). Initially, with bottom device S2 freewheeling the load current, turning on the auxiliary switch Sx1 before the main switch S1 will establish a resonant current iLr .

Fuel Cell or Other Energy Source

Lo

Cin

Co

FIGURE 10 Multiphase dcdc converter with three-phase legs.

Lo

Active Load

buck-type circuit, as shown in Figure 13(a), where one set of diagonal tdly S1 switches is replaced with diodes Sx 1 S1 Dx1 Cr1 Sx1 [20]. Figure 13(b) shows the basic C1 n S2 operating waveforms of the dual-buck Vdc Lr i0 L0 inverter. During positive cycle, only Sx 2 Cdc 1 the switch-diode pair S1 and D1 operiLr vds1 vgrid ates to modulate a half-sine wave curiLr C2 i0 Sx 2 S2 rent i1 . Similarly, during negative Cr2 Dx2 cycle, only the switch-diode pair S2 and D2 operates to modulate the nega(a) (b) tive half-sine wave current i2 . The sum becomes a full-sine wave current ig . FIGURE 12 (a) Circuit diagram of a CoolMOS-based soft-switching inverter in half-bridge Because an ultrafast diode can be used configuration. (b) Basic operating of coupled magnetic-type soft-switching inverter. to avoid reverse recovery loss and low-conduction voltage drop, MOSFET Dual Buck, Boost, and can be used; this type of circuit can When iLr exceeds the load current io , it Buck-Boost Inverters achieve a very high efficiency while will charge Cr2 and discharge Cr1 to creThe cost of the added component in keeping the cost down. The efficiency ate a zero voltage across switch S1 ; a soft-switching inverter is nontrivial. of a three-level dual-buck converter thus, S1 operates under ZVS condition. If the power factor is limited to near was reported to be around 99% range The coupled magnetics will reset the unity, it is possible to employ a dual[34]. An important benefit of this cirresonant current to zero. With 1 : n cuit arrangement is that it can ratio on coupled inductances, avoid shoot through failure and the zero-voltage range can be is considered very robust. increased to adapt to a wide load TABLE 1POSSIBLE VOLTAGE SYNTHESIS PATTERNS The same type of buck range provided that n is greater AND CHARGING STATES AT DIFFERENT OUTPUT switch pair concept can be than one. VOLTAGE LEVELS. applied to dual boost and dual Using MOSFET devices, not OUTPUT 4V o 2V o Vo NOTE buck-boost inverters, as shown only can the switching loss be 1 Vo in Figure 14(a) and (b). For almost eliminated but also the 2Vo Vo Vo charged both circuits, in positive cycle, conduction loss can be signifi4Vo 2Vo Vo Vo /2Vo charged S1 D1 pair operates to procantly reduced in both forward 2 2Vo and reverse conducting modes. vide positive sinusoidal output The reverse conduction does current, and in negative cycle, 4Vo 2Vo 2Vo charged not need external diode, and S2 D2 pair operates to pro3 2Vo Vo with the gate turned on, the vide positive sinusoidal out4Vo Vo Vo charged MOSFET channel can conduct put current. 4Vo 2Vo Vo 2Vo charged the reverse current, which is 4 4Vo also known as synchronous Multilevel Inverters 5 4Vo Vo rectification. For a 5-kW PCS Multilevel converters were reincluding inverter switching garded as a new breed in [23], 4Vo 2Vo Vo Vo charged circuit and filter, the effiin 1996, and since then, this 6 4Vo 2Vo ciency was reported at 98% type of converter has been 7 4Vo 2Vo Vo range [33]. gaining tremendous attention.

Vdc1

S1

D2

i1 L1 i1 L2 i2 ig vgrid D1 i2 ig (b) C1 S1 vgrid D2 + Vin (a) S2 C2 S1 D1 C1

+ Vin vgrid C2 (b)

S2 D2

Vdc2

D1 (a)

S2

FIGURE 13 (a) Circuit diagram of a dual-buck inverter. (b) Basic operating waveforms.

FIGURE 14 (a) Circuit diagram of a dual-boost inverter. (b) Circuit diagram of a dual buck-boost inverter.

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Reference [24] further identified new application areas including the DG with PV and fuel-cell sources. There are many variations on multilevel converter topologies. A particular interest in this article is the cascaded inverter circuit, as shown in Figure 15(a). If individual PV modules or fuel cells are isolated between each other with sufficient common-mode (CM) isolation voltage level, then through an FB inverter (INV), their ac outputs can be connected in series. The FBINV outputs can be a single pulsetype square wave with different pulse duration, as shown in Figure 15(b). The total output becomes a step-like ac wave and can approximate the sinusoidal waveform without highfrequency PWM switching. With a sufficient number of steps, the output inductor size can be reduced or even eliminated and just rely on the grid source impedance to smoothen the current ripple. With only fundamental switching on each device, the switching loss and noise are nearly zero. Additional saving on heat sink and EMI filter can be realized. Overall, this type of inverter allows significant cost and size saving on passive components. The problem with the aforementioned cascaded inverter circuit applying to alternate energy sources is the requirement of multiple sources such as PV panels or fuel cells. It is possible to synthesize a smallervoltage level for one main source and then cascade them. Figure 16 shows the arrangement of using one main source to produce two additional voltage levels and then cascade all the output voltages together. The source voltage V1 is twice the magnitude of the next FB-INV input voltage V2 , and V2 is twice the magnitude of the next FB-INV input V3 . By defining the least voltage-level output voltage as Vo , then the peak half-wave voltage is 7Vo . This method was called gradationally controlled voltage (GCV) inverter [25], [26]. Table 1 shows the possible voltage synthesis patterns and charging states at different output voltage levels. Consider an individual positive

or negative cycle, where the output voltage is actually controlled by a binary code to obtain either 0 or 1 logic outputs. It is also possible to control the individual FB-INV output by a ternary code to obtain 1, 0, 1 logic outputs. In this case, the output-voltage level between individual FB-INV becomes three times the difference. If the lowest voltage level is defined as Vo , then the half-cycle peak-voltage level will become 13Vo . The overall waveform becomes even smoother than the 7Vo case, and the output inductor may be eliminated in this case. Note that the lowest voltage-level FB-INV requires more switching per fundamental cycle, which should not incur much loss for low-voltagelevel devices.

System Design Considerations

The circuit topology selection needs to take care of the system interaction into account; otherwise, a high-efficiency circuit may be attractive but with poor system-level efficiency. The major concerns from a system aspect for the low-voltage PCS applied in a single-phase grid-tie system are 1) lowfrequency ripple propagating back to the source and 2) ground-loop current in a nonisolated system. Low-Frequency Ripple Issues The output of a single-phase inverter current that reflects back to its input is a dc current with twice the fundamental frequency harmonic component. Although this second harmonic component can be filtered with a large capacitor bank, it is normally

L1 Vdc v1

ia

4Vdc

van

van

ia Vdc v2 4Vdc vgrid v1 Vdc v3 v2 v3 Vdc v4 v4 Vdc (b)

(a)

FIGURE 15 (a) Circuit topology of a multilevel cascaded inverter. (b) Individual FB-INV output square waves and their total step-like output.

v3 v2 FB Inverter (FB-INV)

FB INV FB INV

Vo 2Vo

7Vo vgrid

v1

FB INV

4Vo

FIGURE 16 A single-source GCV cascaded inverter and its output waveform with binary control.

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With low-voltage dc as the input, a typical PCS requires a dcdc converter as the boost stage and a dcac inverter for the grid connection.

not cost effective and affects the lifespan of the PCS. However, if this harmonic content is not filtered and propagated back to the source, then the source current and thus current will also contain such a second harmonic content. For a PV system, this implies that the input voltage and current cannot track MPP, resulting in inefficient energy harness. For a fuel-cell system, this also implies that the output cannot track the fuel-cell BOP controller command. In [27] and [28], a power decoupling concept was proposed to add a complementary second harmonic

current to cancel the load-currentinduced second harmonic. Figure 17 shows a power decoupling circuit containing Sx , and Cx is added to a flyback inverter. The basic idea of this circuit is to keep the main switch operating at a constant duty cycle to maintain a current equal to an average load current. The auxiliary switch Sx duty cycle follows the sinusoidal reference such that the harmonic current content is provided by this auxiliary branch. The output switches Sac1 turns on during positive cycle, and Sac2 turns on during negative cycle. The circuit is quite simple and

low cost, but the flyback transformer is heavily loaded, and it is difficult to achieve high efficiency. For a multiple-stage power conversion where dcdc converter and dc ac inverter are separately designed, it is possible to maintain a constant dcdc converter output current by adding a fast current loop into the existing voltage regulated system. In this case, the second harmonic current can be decoupled by the dc link capacitor, and the current propagating back to the source will be a pure dc. Figure 18 shows the block diagram of a dual loop-control system, which can be applied to the dcdc converters shown in Figures 10 and 11. The active load in Figure 18 refers to a dc ac inverter. By maintaining a constant current in Lo , the second harmonic content will be pushed to the output capacitor, Co , which should be sized enough to be able to handle the lowfrequency ripple content. Ground-Loop Leakage Current Issues The switching circuit contains parasitic components that tend to conduct a high-frequency switching current. Consider the capacitance between a switching device and heat sink. With high-voltage slew rate (dv/dt) during switching, these parasitic capacitances will conduct a current, known as CM current, to inverter case and ultimately the earth ground. If the converter or inverter is isolated with transformer, then the CM current will circulate through CM filters. For a nonisolated PCS, however, the CM current will find a path back to the source and create a large leakage current, which not only induces losses but also poses a safety concern because the source, which is generally floating from earth ground, will see a dangerous high voltage due to the leakage current. Figure 19 shows a typical nonisolated low-voltage PCS with PV as the source for grid-tie applications. Reference [36] suggested that a crystalline silicon PV stack has a parasitic capacitance in the range of 50150 nF/ kWp, and a thin film capacitance could be one order of higher magnitude. This

+ Vx

Ix Cx Sx

Power Decoupling Circuit Sac1

Iac

Lf vgrid Cf

Idc Vin Cin DM SM

L1

L2 L2 Sac2

FIGURE 17 Power decoupling circuit for a flyback inverter.

iLf vref + iref Giv + Gic d + PWM isense vsense

Adding a Current Loop to Regulate the Output Current FIGURE 18 Low-frequency ripple reduction by a fast current loop.

Lo Rco Co Active Load

Vd

Vd = dVin Hi Hv

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capacitance tends to conduct a large leakage current if the CM voltage level is high. Since the highest voltage level in the entire PCS is the positive dc-bus voltage, Vdc , by defining the negative dc-bus voltage as the reference point, the CM voltage created by the PWM switching has three levels: 1) Vc m Vd c w h e n b o t h u p p e r switches are turned on 2) Vc m Vd c / 2 w h e n d i a g o n a l switches are turned on simultaneously 3) Vcm 0 when both lower switches are turned on. If an inverter is operating with bipolar SPWM, then Vcm is a dc and is always equal to Vdc /2, because only diagonal switches are turned on simultaneously. In this case, the highfrequency CM current will not exist. The bipolar SPWM tends to draw a large current ripple and is less efficient; thus, the unipolar SPWM is preferred in most applications. The problem with unipolar SPWM is the high CM voltage, which contains the aforementioned three voltage levels in high frequencies and will draw a large leakage current exceeding hundreds of milliampere [35]. A diode-clamp three-level inverter was suggested in [35] and [37][38] to avoid high-frequency CM voltage seen in a unipolar SPWM FB inverter while maintaining high efficiencies. Another solution suggested in [36] is to tie the PV ground and grid system neutrally together and adopt a half-bridge inverter that obtains a negative supply voltage through a coupled inductor in the dcdc stage. For the low-voltage nonisolated PCS shown in Figure 19, three parasitic capacitances can be identified in the switching circuit, including two from the inverter stage, Cg1 and Cg2 , and one from the boost stage, Cg3 . If the boost stage adopts the circuits shown in Figures 8 and 9, the switch voltage will be either Vb Vin =(1 D) or zero. For a high-boost ratio circuit, Vb is much lower less than Vdc . However, if Vb is the same level as Vdc , then its highfrequency CM voltage could be as high as Vdc =2. In this case, even if the inverter side high-frequency CM voltage is avoided, the dcdc converter

Low-switching frequency reduces not only the switching loss but also the electromagnetic interference.
can cause additional leakage current, which is nontrivial. Therefore, a highboost ratio dcdc with Vb much less than Vdc is desirable to avoid excessive leakage current caused by the dc dc stage. reduction, but as long as the groundloop leakage current can be limited to a safe range, the nonisolated dcdc becomes more attractive because these systems are lower in cost and more efficient. High boost ratio with high energy conversion efficiency is needed in this category. For dcac stage, efficiency has been considered the most important issue in energy power conversions. The techniques to achieve high-efficiency power conversion include soft switching, dual buck, boost, buckboost, and multilevel cascading. However, with the nonisolated design about to prevail, the CM voltage produced with different circuits and modulation schemes becomes an inevitable subject that needs to be taken care. The diode-clamped multilevel inverter was recently proposed as a candidate to replace the conventional FB inverters for the CM voltage elimination. With the consideration of energy harness efficiency, cost of the entire PCS, and system-level design constraints, many new PCS system architectures and circuit topologies, and modulation schemes are likely to pop up in the near future. There are some other system design issues such as reliability, manufacturability, standards compliance, control,

Discussion and Conclusions

This article provides an overview of PCS architectures and circuit topologies for low-voltage energy source in single-phase grid-tie applications. The discussion was focused on those relatively new but practical system architectures and circuit topologies including dcdc converters and dcac inverters. For system architecture, multistage designs with dcdc and dcac can be considered as the conventional approach. Reduction of the number of power conversion stages is possible through the use of second harmonic modulation on the dcdc stage or matrix converters. These architectures may have advantages on system cost, but considering the low-frequency current ripple, they lack middle-stage energy storage, and thus their ripple power decoupling becomes very challenging. For dcdc stage, multiphase design is inevitable for low-voltage high-current systems. The high-frequency isolation is convenient for CM current

Vb = Vin / (1 D) Vin Vin CPV Cg3 3 Vb 0 Cg1 Cg2 1 Vdc 2

L1

LCM CCM

Cdm L2

Vgrid CCM Neutral

iCM

Zg

FIGURE 19 Ground-loop leakage current paths for a nonisolated PV PCS.

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and communication that are not discussed in this article but are extremely important in the development of commercial products. Different PCS architectures and circuits are also needed for different voltage and power levels. The overview and discussion in this article are only the starting point but already indicate tremendous research and development opportunity in this area.

Biography
Jih-Sheng (Jason) Lai received his M.S. and Ph.D. degrees in electrical engineering from the University of Tennessee, Knoxville, in 1985 and 1989, respectively. In 1989, he joined Electric Power Research Institute (EPRI) Power Electronics Applications Center. In 1993, he was with Oak Ridge National Laboratory as the power electronics lead scientist. In 1996, he joined Virginia Polytechnic Institute and State University, where he is a professor and director of the Future Energy Electronics Center. He has been working on high-efficiency PCSs for fuel cells under the sponsorship of the U.S. Department of Energy Solid-State Energy Conversion Alliance (SECA) program for more than ten years. This SECA technology has been used in other renewable energy areas by his industrial collaborators. He is a Fellow of the IEEE.

[1] S. B. Kjaer, J. K. Pedersen, and F. Blaabjerg, A review of single-phase grid-connected inverters for photovoltaic modules, IEEE Trans. Ind. Applicat., vol. 41, no. 5, pp. 12921306, Sept./Oct. 2005. [2] Y. Xue, L. Chang, S. B. Kjaer, J. Bordonau, and T. Shimizu, Topologies of single-phase inverter for small distributed power generators: An overview, IEEE. Trans. Power Electron., vol. 19, no. 5, pp. 13051314, Sept. 2004. [3] M. Calais, J. Myrzik, T. Spooner, and V. G. Agelidis, Inverters for single-phase grid connected photovoltaic systemsAn overview, in Proc. IEEE Power Electronics Specialists Conf., Galway, Ireland, June 2002, pp. 19952000. [4] J. M. A. Myrzik and M. Calais, String and module integrated inverter for single-phase grid connected photovoltaic systemsA review, in Proc. IEEE Bologna PowerTech Conf., Bologna, Italy, June 2005, pp. 18. [5] J. Beristain, J. Bordonau, A. Gilabert, and G. Velasco, Synthesis and modulation of a single phase dc/ac converter with highfrequency isolation in photovoltaic energy applications, in Proc. IEEE Power Electronics Specialists Conf., Acapulco, Mexico, June 2003, pp. 11911196.

References

[6] P. T. Krein and R. Balog, Low cost inverter suitable for medium-power fuel cell sources, in Proc. IEEE Power Electronics Specialists Conf., Cairns, Australia, June 2002, pp. 321326. [7] P. T. Krein, R. Balog, and X. Geng, Highfrequency link inverter for fuel cells based on multiple-carrier PWM, IEEE Trans. Power Electron., vol. 19, no. 5, pp. 11911196, Sept. 2004. [8] W. Al-Hoor, H. Al-Atrash, J. Abu-Qahouq, and I. Batarseh, DSP-based stable control loops design for a single stage inverter, in Proc. IEEE Applied Power Electronics Conf., Dallas, TX, Mar. 2006, pp. 923929. [9] Q. Zhao and F. C. Lee, High efficiency, high step-up converters, IEEE Trans. Power Electron., vol. 18, no. 1, pp. 6573, Jan. 2003. [10] D. M. Van de Sype, K. De Gusseme, B. Renders, A. P. Van den Bossche, and J. A. Melkebeek, A single switch boost converter with a high conversion ratio, in Proc. IEEE Applied Power Electronics Conf., Austin, TX, Mar. 2005, pp. 15811587. [11] R. J. Wai and R.-Y. Duan, High step-up converter with coupled-inductor, IEEE Trans. Power Electron., vol. 20, no. 5, pp. 10251035, Sept. 2005. [12] R. J. Wai, C. Y. Lin, C. Y. Lin, R. Y. Duan, and Y. R. Chang, High-efficiency power conversion system for kilowatt-level standalone generation unit with low input voltage, IEEE Trans. Ind. Electron., vol. 55, no. 10, pp. 37023714, Oct. 2008. [13] Y. Jang and M. Jovanovic, New twoinductor boost converter with auxiliary transformer, IEEE Trans. Power Electron., vol. 19, no. 1, pp. 169175, Jan. 2004. [14] C. Liu, A. Johnson, and J.-S. Lai, A novel three-phase high-power soft-switched DC/ DC converter for low-voltage fuel cell applications, IEEE Trans. Ind. Applicat., vol. 41, pp. 16911697, Dec. 2005. [15] X. Huang, X. Wang, T. Nergaard, J. S. Lai, X. Xu, and L. Zhu, Parasitic ringing and design issues of digitally controlled high power interleaved boost converters, IEEE Trans. Power Electron., vol. 19, pp. 1341 1352, Sept. 2004. [16] J. S. Lai, S. R. Moon, R. Y. Kim, F.-Y. Lin, Y. H. Liu, and M. H. Lin, A versatile threephase dcdc converter circuit for fuel cell applications, in Proc. IEEE Industrial Electronics Conf., Nov. 2007, pp. 16391644. [17] H. Ishikawa and Y. Murai, A novel softswitched PWM current source inverter with voltage clamped circuit, IEEE Trans. Power Electron., vol. 15, no. 6, pp. 1081 1087, Nov. 2000. [18] J. Zhang and J. S. Lai, A synchronous rectification featured soft-switching inverter using CoolMOS, in Proc. IEEE Applied Power Electronics Conf., Dallas, TX, Mar. 2006, pp. 810815. [19] J.-S. Lai, J. Zhang, H. Yu, and H. Kouns, Source and load adaptive design for a high-power soft-switching inverter, IEEE Trans. Power Electron., vol. 21, pp. 1667 1675, Nov. 2006. [20] J. Liu and Y. Yan, A novel hysteresis current controlled dual buck half bridge inverter, in Proc. IEEE Power Electronics Specialist Conf., Acapulco, Mexico, June 2003, pp. 16151620. [21] R. O. Caceres and I. Barbi, A boost dc-ac converter: Analysis, design, and experimentation, IEEE Trans. Power Electron., vol. 14, no. 1, pp. 134141, Jan. 1999. [22] N. Vazquez, J. Almazan, J. Alvarez, C. Aguilar, and J. Arau, Analysis and experimental study of the buck, boost and buckboost inverters, in Proc. IEEE Power Electronics Specialist Conf., Charleston, SC, June 1999, pp. 801806. [23] R. H. Baker, Electric power supply, U.S. Patent 3 971 976, July 27, 1976.

[24] J.-S. Lai and F. Z. Peng, Multilevel convertersA new breed of power converters, IEEE Trans. Ind. Applicat., vol. 32, pp. 509517, May/June 1996. [25] O. Mori, M. Yamada, A. Iwata, S. Maruyama, J. Okada, and Y. Hatakeyama, A single phase uninterruptible power system with gradationally controlled voltage inverter, in Proc. IEEE Industrial Electronics Conf., Paris, France, Nov. 2006, pp. 19561961. [26] M. Yamada, A. Iwata, J. Okada, Y. Hatakeyama, and Y. Ishii, A new voltage sag compensator with gradationally controlled voltage inverter, in Proc. European Conf. Power Electronics and Drives, Dresden, Germany, Sept. 2005, pp. 17. [27] T. Shimizu, K. Wada, and N. Nakamura, Flyback-type single-phase utility interactive inverter with power pulsation decoupling on the dc input for an ac photovoltaic module system, IEEE Trans. Power Electron., vol. 21, no. 5, pp. 12641272, Sept. 2006. [28] F. Shinjo, K. Wada, and T. Shimizu, A single-phase grid-connected inverter with power decoupling function, in Proc. IEEE Power Electronics Specialist Conf., Orlando, FL, June 2007, pp. 12451249. [29] C. Liu and J. S. Lai, Low frequency current ripple reduction technique with active control in a fuel cell power system with inverter load, IEEE Trans Power Electron., vol. 22, pp. 14291436, July 2007. [30] R. Gopinath, S. Kim, J.-H. Hahn, P. N. Enjeti, M. B. Yeary, and J. W. Howze, Development of a low cost fuel cell inverter system with DSP control, IEEE Trans. Power Electron., vol. 19, no. 5, pp. 12561262, Sept. 2004. [31] D. G. Holmes, P. Atmur, C. C. Beckett, M. P. Bull, W. Y. Kong, W. J. Luo, D. K. C. Ng, N. Sachchithananthan, P. W. Su, D. P. Ware, and P. Wrzos, An innovative, efficient current-fed push-pull grid connectable inverter for distributed generation systems, in Proc. IEEE Power Electronics Specialist Conf., Jeju, Korea, June 2006, pp. 15041510. [32] K. Wang, J.-S. Lai, and F. C. Lee, Design, implementation, and experimental results of bi-directional full-bridge dc/dc converter with unified soft-switching scheme and soft-starting capability, in Proc. IEEE Power Electronics Specialist Conf., Galway, Ireland, June 2000, pp. 10581063. [33] J.-S. Lai, S.-Y. Park, S.-R. Moon, and C.-L. Chen, A high-efficiency 5-kW soft-switched power conditioning system for low-voltage solid oxide fuel cells, in Proc. Power Conversion Conf., Nagoya, Japan, Apr. 2007, pp. 463470. [34] J. Liu, H. Wang, and Y. Yan, A novel three level dual buck half bridge inverter, in Proc. IEEE Applied Power Electronics Conf., Austin, TX, Feb. 2008, pp. 483487. [35] O. Lopez, R. Teodorescu, F. Freijedo, and J. Doval-Gandoy, Leakage current evaluation of a single-phase transformerless PV inverter connected to the grid, in Proc. IEEE Applied Power Electronics Conf., Anaheim, CA, Feb. 2007, pp. 907912. [36] S. V. Araujo, P. Zacharias, and B. Sahan, Novel grid-connected non-isolated converters for photovoltaic systems with grounded generator, in Proc. IEEE Power Electronics Specialist Conf., Rhodes, Greece, June 2008, pp. 5865. [37] R. Gonzalez, E. Gubia, J. Lopez, and L. Marroyo, Transformerless single-phase multilevel-based photovoltaic inverter, IEEE Trans. Ind. Electron., vol. 55, no. 7, pp. 26942702, July 2008. [38] T. Kerekes, R. Teodorescu, and U. Borup, Transformerless photovoltaic inverters connected to the grid, in Proc. IEEE Applied Power Electronics Conf., Anaheim, CA, Feb. 2007, pp. 17331737.

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