R.M.K.

ENGINEERING COLLEGE
R.S.M. NAGAR, KAVARAIPETTAI 601 206
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

EC1257 LINEAR INTEGRATED CIRCUITS LAB

INDEX
1. OPERATIONAL AMPLIFIER CONFIGRATION 2. DIFFERENTIAL AMPLIFIER 3. APPLICATION OF OPERATIONAL AMPLIFIER 4. INSTRUMENTATION AMPLIFIER 5. SECOND ORDER LOWPASS FILTER 6. SECOND ORDER BANDPASS FILTER 7. ASTABLE MULTIVIBRATOR USING OP-AMP 8. MONOSTABLE MULTIVIBRATOR USING OP-AMP 9. SCHMITT TRIGGER 10. RC PHASE SHIFT OSCILLATOR 11. WIEN BRIDGE OSCILLATOR 12. ASTABLE MULTIVIBRATOR USING TIMER 13. MONOSTABLE MULTIVBRATOR USING TIMER 14. DC POWER SUPPLY USING LM723 15. DC POWER SUPPLY USING LM317 16. PLL CHARACTERISTICS & FREQUENCY MULTIPLIER USING NE565. 17.PRECISION RECTIFIERS. 18.STUDY OF COMPARATOR. 19.TRIANGULAR WAVEFORM GENERATOR. 20.STUDY OF SMPS CONTROL IC SG3524/SG3525.

1. OPERATIONAL AMPLIFIER CONFIGURATION

AIM: To design and verify the exprimental and theoretical loop gains of amplifiers using IC 741 in the inverting and non-inverting modes.
APPARATUS REQUIRED:

Equipments & Components 1.Dual Power Supply 2.Resistors 3.Regulated Powersupply 4.Voltmeter 5.IC-741

Range (0-30)V 1K 10K (0-30)V (0-50)V

Quantity 1 1 2 1 1 1

DESIGN: INVERTING AMPLIFIER: Let the desired gain be 5 and VCC =15v & -VCC =-15v.We know That gain for inverting amplifier AV = -Rf / R1 That is |AV| =|
Rf | R1

Let R1 =1Kohm & given AV = 5 So 5 =

Rf 1K

Rf = 5Kohm [Since 5Kohms is not a standard value, two 2.5 Kohms resistors are used in series or two 10 Kohms is used in parallel are used for Rf]. And Rcomp = R + R = 833 ohms [Since 833ohms is not a standard value, 1 1 f Kohms & 5Kohms resistors are used in parallel] NON- INVERTING AMPLIFIER: Let the desired gain be 6 and VCC =15v & -VCC =-15v.We know that gain for non inverting amplifier AV = 1+
Rf 1K Rf R1 R 1R f

Let R1 =1Kohm & given AV= 6 So 6 = 1+

Rf = 5Kohm [Since 5Kohms is not a standard value, two 2.5 Kohms resistors are used in series or two 10 Kohms is used in parallel are used for Rf]. And Rcomp = R + R = 833 ohms [Since 833ohms is not a standard value, 1 Kohms & 5Kohms 1 f resistors are used in parallel] TO CALCULATE VI (MAX): Vo (sat) =VCC =15v-0.7v =14.3v VI(max) = Vo (sat) /gain For inverting amplifier VI(max) =14.3 v/-5 =-3v For non inverting amplifier VI (max) =14.3 v/6 =2.4v THEORY: The basic equation for the op-amp is Ae = V0 where A is open loop gain of the Opamp at an operating frequency f and is positive. e is measured as per the arrow direction shown in the fig 1. This equation is valid for the open loop condition and closed loop condition [only for negative feedback]. Using the above formula all the gain equations for the different amplifier configuration can be derived. It is very important to note that A varies with frequency. e
=

R 1R f

V0 A

A is of the order of 105 to 106 at 5 Hz Hence e = 0 for range of frequencies. This implies that the non-inverting terminal voltage follows the inverting terminal voltage or the inverting terminal voltage follows the non-inverting terminal voltage. In other words the potential difference between the inverting and non-inverting terminal is zero volt at a specified frequency the above condition will not be valid. Gain equation for inverting amplifier For non inverting amplifier For voltage follower A= A= Rf R1 Rf R1

A=1+
A =1 A +1

MAX WATTAGE OF RESISTANCE: Resistances used in the design are 1Kohm and 10Kohms .The maximum voltages across the resistance will be supply voltage. Hence wattage of resistance is
V2 . R

225 225 V2 = or which is so much lower than 1/8W or 1/4W.So resistances with 5% 1K 10K R

tolerance, carbon film resistor with 1/8W or 1/4W is used. PROCEDURE: 1. Connections are made as shown in circuit diagrams . 2. The input voltage is given and the output voltage is noted. The maximum input voltage that can be given to the circuit is VI[max]. 3. In all the config when VI = 0, V0 = 0. 4. The close loop gain is calculated for each input voltage and transfer characteristics is drawn for each configuration. 5. The slope of the characteristics between input and output voltage gives the small signal AC closed loop gain as represented in model graph. QUESTIONS: 1. Differentiate open loop and closed loop circuits 2. Why is negative feedback used in amplifiers 3. List the advantages of closed loop op-amp circuit over open loop op-amp circuit. 4. List the application of voltage follower. RESULT: Slope of the DC characteristics between input and output voltage gives the small signal AC closed loop gain provided the condition outlined in theory regarding open loop gain with frequency is maintained.

INVERTING AMPLIFIER
5K

1K
RPS (0-10V) 833

V0

TABULAR COLUMN:
S.NO: Vin (Volts) Vout (Volts) Av = Vout/Vin

MODEL GRAPH: Vi(v)

0 Slope = -

Vo(sat) Vo(v)

NON-INVERTING AMPLIFIER

5K

1 K Vo

833
VI 0 10 V)

TABULAR COLUMN: S.NO: Vin (Volts) Vout (Volts) Av =Vout/Vin

MODEL GRAPH:

Vo(v) Vo(sat)
Slope = 6

Vi(v)
TABULAR COLUMN:

S.NO:

Vin (Volts)

Vout (Volts)

Av =Vout/Vin

MODEL GRAPH:

Vo(v)

Vo(sat)
Slope = 1

Vi(v)

2.DIFFERENTIAL AMPLIFIER

AIM:

To design and test the operation of Differential amplifier.

APPARATUS REQUIRED:

Equipments & Components 1.Dual Power Supply 2.Resistors 3.AFO 4.CRO 5.IC-741

Range (0-30)V 1K 100K (0-1)MHz (0-20)KHz

Quantity 1 2 2 1 1 1

DESIGN: Gain = 100, & Let R1 = 1 K AD = R2 / R1 So R2 = AD * R 1 R2 = 100 * 1K = 100K. THEORY: A Circuit that amplifies the difference between two signals is called a differential amplifier. This type of amplifier is very useful in instrumentation circuits. For differential amplifier, though the circuit is not symmetric, but because of the mismatch, the gain at the output with respect to positive terminal is slightly different in magnitude to that of negative terminal. So even with the same voltage applied to both the inputs, the output is not zero. PROCEDURE: 1. Connections are given as per the circuit diagram. 2. Set the input Voltages V1 = 50mV & V2 =40mV. 3. Note down the Output Voltage 4. Vary the input Voltages and note down the output voltages. 5. Calculate the gain & Compare it with the Theoretical gain.

QUESTIONS:

1.What is meant by CMRR?

9

2.When the OP-AMP will not operate linearly? 3.Define Current Mirror. RESULT: Thus the Differential amplifier is designed & tested.

CIRCUIT DIAGRAM:

10

R 2 = 100K

R1=1K

Vo
a a a a a A A A
AFO AFO

R 1 =1K R 2 = 100K

TABULAR COLUMN:
S.NO: V1 (Volts) V2 (Volts) V0 (Volts)

3. APPLICATIONS OF OPERATIONAL AMPLIFIER AIM:

11

a a a a a A A A

gain

To design and study the operation of 1) Differentiator 2) Integrator. APPARATUS REQUIRED: Equipments & Range Components 1.Dual Power Supply (0-30)V 2.Resistors 31.8K,3.1K,10K,100K 1K 3.Capacitors 0.1F 4.IC741 6.AFO (0-1)MHz 7.CRO (0-20)MHz DESIGN: DIFFERENTIATOR: The transfer function of differentiator is given by
V0 - sR f C1 = 1 + sC R Vi 1 1

Quantity 1 each 1 3 1 1 1 1

If sC1R1 <<1then V0 / VI = -sRfC1 The above equation can be rewritten as AV = Let where far = 6.28R C f 1 fa =fmax=50 Hz, assume C1 =0.1 FD Rf
1
f fa

= 6.28f C = 31.8K a 1 To prevent loading Rf =10R1 So R1 =

Rf = 3.1K 10

INTEGRATOR: To find R1 & Rf in the lossy integrator, so that the peak gain is 20dB and the gain is 3dB down from its peak when = 10,000rad/sec. Assume C = 0.001F We know that A(dB) = 20log10 Rf / R1 / [1+(RfCf)2]1/2 To find the peak value in decibel Put = 0. So A(dB) = 20. So R1 = Rf / 10.

12

At = 10,000 rad/sec, gain in dB is down by 3dB from its peak of 20dB & thus is 17dB. So 20 log10 10/[1+(104 * 10-9 * Rf )2]1/2+ = 17dB By solving 1+(10-5 * Rf )2 = 103/10 (10-5 * Rf )2 = 1 Rf = 100K, So R1 = 10K. VERIFICATION: From the design C1 = 0.1MFD & R1 =3.1k So SR1C1 =0.097 Consider an input with Vmax =1v and f=50Hz VI =Vmax sinwt =sinwt We know that Vo = -RfC1
dVI dt d (sin wt) dt

= -31.8 * 103 *0.1 * 10-6

= (-0.00318)(6.28f)cos(6.28ft) The transfer function of integrator is given by

1 VO sC f =1 VI R 1 (R f + ) sC f Rf *
f = - R (R sC + 1) 1 f f

If sRfCf >>1 then

VO Rf = - R (R sC ) VI 1 f f 1 = - sR C 1 f 1 Vo = - R C VI dt 1 f

Let

Cf = 0.1MFD & R1 =10kohm Vo = Vm sin wt =0.1 sin wt

0.1 10 *10 * 0.1 * 10
3 _6

Then Vo = If

sin wt = -100 cos wt/w

f =50 Hz, Vo = -0.3cos wt

13

THEORY: DIFFERENTIATOR: The circuit which produces the differentiation of the input voltage at its output is called differentiator. The Differentiator circuit can be obtained without using active devices like op-amp, transistors etc. In such a case Differentiator is called passive Differentiator. Differentiator using an active device like op-amp is called active differentiator. This can be obtained by exchanging the positions of R & C in the basic integrator circuit. Vo = -C1 Rf dVin / dt The negative sign indicates that there is a phase shift of 1800 between input & output. The main advantage of differentiator is the small time constant required for differentiation. INTEGRATOR: In an integrator circuit , the output voltage is the integration of the input voltage. The integrator circuit can be obtained without using active devices like opamp, transistors etc. In such a case an integrator is called passive integrator. While an integrator using an active devices like op-amp is called active integrator. Vo = - 1/R1Cf Vin dt + Vo (0) 0 where Vo (0) is the constant of integration indicating the initial output voltage. The negative sign indicates that there is a phase shift of 1800 between input & output.The main advantage of such an active integrator is the large time constant.

PROCEDURE: DIFFERENTIATOR: 1. Circuit connections are given as shown in fig 2. A sine wave with 1VPP and 50Hz frequency is given as input.

14

3. The output is obtained in the CRO and is verified with the theoretical verification 4. Graph is drawn as shown in model graph. INTEGRATOR: 1. Circuit connections are given as shown in fig 2. A sine wave with 0.1VPP and 50Hz frequency is given as input. 3. The output is obtained in the CRO and is verified with the theoretical verification. 4. Graph is drawn as shown in model graph.

RESULT: Thus the operation of Inverting Summer, integrator and differentiator was studied and the output was verified with the theoretical calculation. VIVA QUESTIONS: 1. How the summing amplifier can be used as averaging circuit 2. output of the integrator and differentiator if the input is a square wave 3. Why is a feedback resistor included in a practical integrator circuit? 4. Write the characteristics of an Ideal Op-amp. 5. Define CMRR. 6. Draw the Equivalent circuit of an Op-amp. 7. What are the Packages available for Op-amp. 8. Draw the internal block Schematic of an Op-amp. 9. Define Active & Passive Differentiator. 10.Write the Applications of Differentiator & Integrator.

CIRCUIT DIAGRAM: DIFFERENTIATOR 31.8 K

15

3.1K 0.1F VO (CRO)

Vin = 1Vpp, 50Hz

AFO

Vin = 0.1Vpp 50Hz

a a a a a A A A

INTEGRATOR 0.1F
100K

10K
AFO

VO (CRO)

a a a a a A A A

SPECIFICATION FOR IC741: +Vcc = +15V, - Vcc = -15V Ambient Temparature : 250 C Input offset voltage Input offset current : 200nA(Max) Input bias current : 500nA(Max) Input resistance : 2M Output resistance : 75 Total Power dissipation : 85mW. PINDIAGRAM FOR IC741:

: 6 mV(Max)

16

IC741

6 5

1 = Offset Null, 2 = Inverting input terminal, 3 = Non inverting input terminal, 4 = -Vcc, 5 = Offset Null, 6 = Output, 7 = +Vcc, 8 = Noconnection MODEL GRAPH: DIFFERENTIATOR: Vi(v)

0V t (msec)

Vo(v)

0V t (msec)

17

Vi(v) 0V t (msec)

Vo(V)

0V t (msec)

TABULAR COLUMN: Amplitude(V) Input Timeperiod(ms)

Output

INTEGRATOR: Vi(v)

18

0V

t (msec)

Vo (V)

0V t(msec)

Vi (V)

0V

19

t(msec)

Vo(V) 0V t(msec)

TABULAR COLUMN: Amplitude(V) Input Timeperiod(ms)

Output

4.INSTRUMENTATION AMPLIFIER AIM: To construct the Instrumentation amplifier using IC-741 for the gain 250. APPARATUS REQUIRED: Equipments & Range Quantity
20

Components 1.Dual Power Supply 2.Resistors 4.IC741 6.RPS 7.CRO

(0-30)V 10K, 100K 120K (0-15)V (0-20)MHz

4 5 2 2 3 1 1

THEORY: The output of the transducer has to be amplified to drive the indicating or driving system. This function is performed by instrumentation amplifier. The important features are: 1) High gain accuracy, 2) High Common mode rejection ratio, 3) High gain stability with low temparature coefficient,4) Low DC offset, 5) Low output impedence. PROCEDURE: 1. Connections are given as per the circuit diagram. 2. Set the DC input voltage as 1 mV. 3. Note down the output voltage. 4. Calculate the gain and compare it with theoretical gain. 5. Repeat it for different input values. QUESTIONS: 1. What is the use of Instrumentation amplifier? 2. Write the gain formula for Instrumentation amplifier. 3. Name Some Commercially available instrumentation amplifiers. RESULT: Thus the Instrumentation amplifier was constructed & Verified.

CIRCUIT DIAGRAM:

21

IC741 + 120k 10k 10k 10k + IC741 120k + IC741

10k 100k IC741

100k 10k

Vin

TABULAR COLUMN: Input Voltage (Volts)

Output Voltage(Volts)

5. SECOND ORDER LOW PASS FILTER

22

AIM: To design and study the frequency response of second order butter worth filter with cutoff frequency of 1000Hz. APPARATUS REQUIRED: Equipments & Range Components 1. Dual Power Supply (0-30)V 2.Resistors 4.7K,1.2K,10K 1.5K,100 3.Capacitors 0.1F 4.IC741 5.CRO (0-20)MHz 6.AFO (0-1)MHz DESIGN: The general equation for transfer function is = [Y Y + Y (Y + Y + Y ) + Y Y (1 - A )] 1 2 4 1 2 3 2 3 O In a LPF Y4 = Y3 = sC and Y1 = Y2 =1/R H(s) =
[ 1 sC sC 2 +( ) ] 2 + (3 - Ao) R R R AO R2 VO VI A o Y1 Y2

Quantity 1 each 1 each 2 1 1 1 1

Let

1/RC = w1

A O w12 s s Then H(s) = [1 + (3 - A O ) + ( )2 ] w1 w1

w1 / s is the normalized frequency. Let (3 - Ao) = For maximally flat response (3 - Ao) should be equal to 1.414. When s=w1, H(s) = Ao / 1.414 which gives the half power frequency. If the desired cutoff frequency is 1KHz Then 1/RC = w1 f1 =
1 2 RC

23

Let

C f1

= 0.1F = 1 kHz
1 6.28 * 0.1 * 10 -6 * R

1KHz =

R = 1.6Kohms. From 3-Ao = 1.414 we can find the theoretical pass band gain. 3-Ao = 1.414 Ao = 1.586 Also the op-amp is used in the non-inverting mode so, Ao = 1+ R = 1.586
1

Rf

Rf = 0.586 (or) Rf =0.586 R1 R1

Let

R1 = 10Kohm Rf = 5.86[use 4.7k in series with 1.2K]

THEORY: A Filter is a circuit that is designed to pass a specified band of frequencies while attenuating all the signals outside the band. It is a frequency selective circuit. The filters are basically classified as Active filters & Passive filters. The Passive filter networks use only passive elements such as resistors, inductors and capacitors. Active filter circuits use the active elements such as opamps, transistors along with the resistors, inductors & capacitors. A Low pass filter has a constant gain from 0 Hz to a high cutoff frequency fH. The circuit allows the range of frequencies from 0 to fH . This range is known as Passband. The range of frequencies beyond fH is completely attenuated & hence called stopband. For a second order Butterworth active filter the roll-off rate should be -40db/decade or -12db/octave.

PROCEDURE: 1. Connections are made as shown in fig .

24

2. Set a sinusoidal input with peak 1v. Change the frequency of AFO in steps of 100Hz and note down the output amplitude from the CRO. 3. Find the gain in db for each input. 4. Plot the gain Vs frequency in semilog graph. Graph is drawn as shown in model graph. 5. Verify if the roll-off rate is -40db/decade or -12db/octave. RESULT: Thus the Second order low pass filter was designed and frequency response plot was drawn. Theoretical cut-off frequency = Practical cut-off frequency =

VIVAQUESTIONS: 1. What is a Butter worth Filter?. 2. Draw the diagram for first order Low pass Butter worth filter. 3. Write the design steps for second order Low pass filter. 4.What is the Roll off rate for First & Second order filter? 5.Discuss the disadvantages of passive filter. 6.Define pass band and stop band of a filter. 7.Why do we use higher order filters? 8.Design a low pass filter at a cutoff frequency of 15.9KHz with a Pass band gain 1.5.

CIRCUIT DIAGRAM:
25

Rf = 4.7K + 1.2K

R1 = 10K Vo (CRO)
R=1.5K+100 R=1.5K+100

a a a a a A A A

AFO 0.1F

0.1F

Vin = 1Vpp

PINDIAGRAM FOR IC741:

1 2 8

IC741

6 5

1 = Offset Null, 2 = Inverting input terminal, 3 = Non inverting input terminal, 4 = -Vcc, 5 = Offset Null, 6 = Output, 7 = +Vcc, 8 = Noconnection SPECIFICATION FOR IC741: +Vcc = +15V, - Vcc = -15V Ambient Temparature : 250 C Input offset voltage : 6 mV(Max) Input offset current : 200nA(Max) Input bias current : 500nA(Max) Input resistance : 2M Output resistance : 75 Total Power dissipation : 85mW. TABULAR COLUMN: VIN = Gain Av(db)
26

Frequency (Hertz)

Vout (Volts)

= 20 log [Vout/Vin]

MODEL GRAPH: Av(db) AV (Max) 0.707AV (Max) Pass band Stop band

Frequency(Hz)

6. SECOND ORDER BAND PASS FILTER

27

AIM: To design and study the frequency response of second order Band pass filter with Central frequency 1KHz, Q = 3 & gain = 10. APPARATUS REQUIRED: Equipments & Components 1. Dual Power Supply 2.Resistors 3.Capacitors 4.IC741 5.CRO 6.AFO Range (0-30)V 4.7K,6.2K,100K 0.01F (0-20)MHz (0-1)MHz Quantity 1 each 1 2 1 1 1

DESIGN: f C = 1KHz, AF = 10 & Q = 3. Let C 1 = C 2 = 0.01F, R 1 = Q / 2f C C AF = 3 / (2* 1000* 0.01*10-6 * 10) = 4.77K R 2 = Q / 2f C C (2Q2 AF ) = 3 / [2* 1000*0.01*10-6 (2*32* - 10)] = 5.97K. R 3 = Q / f C C = 3 / *103*0.01*10-6 = 95.5K. So Choose R 1 = 4.7K, R 2 = 6.2K , R3 = 100K.

THEORY: There are Two types of Bandpass filters which are classified as per figure of merit or Quality factor. 1) Narrow bandpass filter (Q>10) 2) Wide bandpass filter(Q <10).
28

This Filter is unique in following respects: - It has two feedback paths, hence the name multiple feedback filter. - The Op-amp is used in inverting mode. Generally the narrow band pass filter is designed for specific values of Center frequency & Q. PROCEDURE : 1. Connections are given as shown in fig . 2. Set a sinusoidal input with peak 1v. Change the frequency of AFO in steps of 10Hz and note down the output amplitude from the CRO. 3. Find the gain in db for each input. 4. Plot the gain Vs frequency in semilog graph. Graph is drawn as shown in model graph. RESULT: Thus the Second order Band pass filter was designed and frequency response plot was drawn. Practical central frequency = Bandwidth =

VIVAQUESTIONS: 1.What is meant by Qualityfactor? 2.Draw the wide bandpass filter? 3.Explain briefly chebyshev & Bessel filter. 4.What is meant by state variable filter? 5. How will you convert LPF toHPF?

CIRCUIT DIAGRAM: C2 = 0.01F

a a a a a A A A

R3 = 100K
29

R1 = 4.7K C1 = 0.01F Vo (CRO) Vin R2 = 6.2K RL = 10K

PINDIAGRAM FOR IC741:

1 2 8

IC741

6 5

1 = Offset Null, 2 = Inverting input terminal, 3 = Non inverting input terminal, 4 = -Vcc, 5 = Offset Null, 6 = Output, 7 = +Vcc, 8 = Noconnection

SPECIFICATION FOR IC741: +Vcc = +15V, - Vcc = -15V Input resistance : 2M Total Power dissipation : 85mW.

Input bias current : 500nA(Max) Output resistance : 75 Ambient Temparature : 250 C

30

Input offset voltage MODEL GRAPH: AF 0.707AF

: 6 mV(Max)

Input offset current

: 200nA(Max)

Gain(dB)

fL

fC

fH Frequency(Hz) VIN = Vout (Volts) Gain Av(db) = 20 log [Vout/Vin]

TABULAR COLUMN: Frequency (Hertz)

7. ASTABLE MULTIVIBRATOR USING OP-AMP AIM:

31

To design and construct an astable multivibrator using IC Operational amplifier 741 APPARATUS REQUIRED: Equipments & Range Components 1. Dual Power Supply (0-30)V 2.Resistors 10K, 4.5K,1K,27K 3.Capacitors 0.1F 4.IC741 5.CRO (0-20)MHz 6.AFO (0-1)MHz Quantity 1 2 each 1 1 1 1

THEORY: An astable multivibrator is a square waveform generator. Square wave is generated by forcing the op-amp to operate in the saturation region. The astable multivibrator is a free running symmetrical multivibrator because it does not require any external trigger. DESIGN: Feedback factor = R2/(R1+R2) Time period of the square wave T =2RC ln[(1+)/(1-)] Let R1 =R2 10K then =0.5 Assume C = 0.1F For a time period of 1ms T= 2RC ln 3 Rf = 4.55K Component values: R1 =10K R2 = 10K Rf = 4.55K C = 0.1F

PROCEDURE: 1.Circuit connections are made with the components of designed values.
32

2.The square wave output is obtained at the output pin of the op amp. 3.The amplitude and time period of the output waveform is noted and it is plotted on the graph. VIVA QUESTIONS: 1. What is the difference between a one shot and astable multivibrator? 2. Why astable multivibrator is called as free running oscillator. 3. Derive the expression for frequency of output waveform in Fig. 4. Mention few applications astable multivibrator. RESULT: An astable multivibrator is designed and constructed and the square wave output is obtained. Time period of the square waveform (theoretical): Time period of the square waveform (practical):

ASTABLE MULTIVIBRATOR USING OP AMP

4.55 K

33

0.1F 10 K

VO(CRO)

10 K

MODEL GRAPH: Vo

TABULAR COLUMN: Amplitude(V) Output 8. MONOSTABLE MULTIVIBRATOR USING OP-AMP AIM: To design monostable multivibrator circuits using gates, op-amp, monostable multivibrator ICs. Timeperiod(ms)

34

APPARATUS REQUIRED: Equipments & Range Components 1. Dual Power Supply (0-30)V 2.Resistors 1K, 10K,22K 3.Capacitors 0.1F,0.01F 4.IC741 5.CRO (0-20)MHz 6.AFO (0-1)MHz 7.Diode 0A79 Quantity 1 2 each 1 1 1 1 1 2

THEORY: Monostable multivibrator has one stable state and one quasi-stable state. One shots are used to set the timing of an event or to control a sequence of events in a digital system. A triggering pulse initiates the one shot action and generates a pulse of desired width. If additional triggers are applied to one - shot, when it is in the quasi-stable state, they are ineffective. The one shot needs time to recover after if returns to the stable state subsequent to a triggering event. Therefore, triggering pulses should not be applied so often to cause the ON time of the one-shot to exceed the duty cycle specified. If the duty cycle of a one shot exceeds the maximum specified value, there is jitter in the output pulse. That is the width of each pulse will not be constant. PROCEDURE: Monostable multivibrator using op-amp: 1. Connections are made as per the figure. 2. Negative triggering pulse with 1 KHz repetition rate are applied. 3. The input and output waveforms are observed on a dual trace CRO and plotted. 4. The value of the pulse width is obtained theoretically from the following relationship. T = RfC ln[ 1+R2/R1].

QUESTIONS:

35

1. Define pulse width and duty cycle. 2. Maximum duty cycle puts a limitation on the maximum freq of trigger pulses to a monostable multivibrator. Why? 3. What is meant by the retriggerable monostable multivibrator? 4. What is meant by the term jitter? 5. What are the differences between a retriggerable monostable multivibrator and an ordinary one shot? 6. Explain the operation of monostable multivibrator circuits of fig . RESULT: An Mono stable multivibrator is designed and constructed and the square wave output is obtained. Time period of the output waveform (theoretical)= Time period of the output waveform (practical) =

MONOSTABLE MULTIVIBRATOR USING OP AMP

1K

36

V0
OA79 1F 10K

0.01F VIN 22K OA79

1K

MODEL GRAPH:
VIN

37

T (msec)

+Vsat

t (msec)

-Vsat

TABULAR COLUMN: Amplitude(V) Output Timeperiod(ms)

9. SCHMITT TRIGGER
AIM:

38

To design Schmitt trigger circuit using op-amp. APPARATUS REQUIRED: Equipments & Range Components 1. Dual Power Supply (0-30)V 2.Resistors 1.5K, 5.6K,22K,760,1K 3.Capacitors 0.1F,0.01F 4.IC741 5.CRO (0-20)MHz 6.AFO (0-1)MHz 7.Diode 0A79 Quantity 1 2 each 1 1 1 1 1 1

DESIGN: Vut = R + R Vsat 1 2 Vlt = R + R -Vsat 1 2 Let Vut = +0.5v, Vlt =-0.5v For IC 741, with supply voltages 615v, Vsat = 14v & -Vsat = -14v Then 0.5 = R + R 14v 1 2
R1= 27R2
R2 R2 R2

Let R1=1kohm,then R2=27kohm THEORY: The schmitt trigger is a circuit, which converts a slow changing waveform into a fast changing waveform. In an schmitt trigger the o/p is in one of the two levels namely signal voltage Vsat or -Vsat. When the i/p voltage is rising, the level of the output changes when the input passes through a specific voltage Vut known as upper threshold voltage. Similarly when a falling input voltage passes through a specific voltage Vlt known as lower threshold voltage, the level of the output changes. Vut is greater than Vlt. The difference between the two voltages is known as HYSTERESIS.

39

PROCEDURE:

Schmitt trigger using op-amp: 1. The circuit is connected as shown in figure . 2. The i/p dc voltage is increased from 0 to 5v and the o/p voltage is measured. The output curve is drawn and Vut, Vlt and hysteresis are found out. 3. A sinusoidal input of peak 5v and 1khz is given. The input and output waveforms are observed simultaneously on a dual trace CRO and plotted. VIVAQUESTION: 1. What is meant by schmitt trigger circuit? What are the applications? 2. Define the following. Upper threshold voltage, lower threshold voltage, hysteresis. 3. What is the relationship between the frequencies of the input and output voltages of an Schmitt trigger circuit? 4. Explain the operation of Schmitt trigger circuits of fig 1&2 5. How would you recognize that positive feedback is being used in an op-amp circuit? RESULT: A Schmitt trigger designed and constructed and the square wave output is obtained. Upper threshold voltage = Lower threshold voltage = Square output: Amplitude Time period = =

SCHMITT TRIGGER USING OP AMP:

40

1 K

VO(CRO)

AFO

MODEL GRAPH: Vi VUT

a a a a a A A A
27 K 1 K

T (msec) VLT

V0 +VSAT

T (msec) -VSAT

41

+VSAT

VUT -VSAT

t(msec)

+VSAT

VLT -VSAT

t(msec)

+VSAT

VLT -VSAT

VUT

t(msec)

TABULAR COLUMN:

42

AMPLITUDE(V) INPUT(Sine Wave) OUTPUT(Square wave) VUT VLT

TIMEPERIOD(ms)

10. RC PHASE SHIFT OSCILLATOR

43

AIM: To design and construct the RC phase shift oscillator of frequency of 500Hz and to plot the sinusoidal waveform. Equipments & Range Quantity Components 1. Dual Power Supply (0-30)V 1 2.Resistors 3 1.5 K, 1 13K,390K,15K 3.Capacitors 3 0.1F, 4.IC741 1 5.CRO 1 (0-20)MHz 6.AFO 1 (0-1)MHz 1

DESIGN: The frequency of oscillation of RC phase shift oscillator is given by fO =

1 2 RC 6

Assume C =0.1 microfarad. Desired frequency of oscillator, f0 = 500Hz Then 500 =

1 2 * R * 0.1 * 10 _ 6 * 6

R =1.3K ohm [use 1.2K in series with 100ohm] To avoid loading effect R1 = 10 R So R1 = 10 * 1.3 K =13 K For the loop gain AV to be greater than 1,Rf should be equal to 29R1 So Rf =29R1 =390kohms and Rcomp= R + R =15kohms. 1 f Only polyester condenser should be used. Ceramic condenser should not be used. The condenser value is specified by voltage rating, tolerance & capacitor value. Standard values are 65v, 100v, 125v, 250v, and 400v MAX WATTAGE OF RESISTANCE:
R 1R f

44

Resistances used in the design are 1Kohm and 10Kohms .The maximum voltages across the resistance will be supply voltage. Hence wattage of resistance is V2 / R. V2 /R=225 / 1.3K or 225 / 13K or225 / 390K or225 / 15K which is so much lower than 1/8W or 1/4W.So resistances with 5% tolerance, carbon film resistor with w or w is used. THEORY: The closed loop circuit of the RC phase shift oscillator is opened at point A. The input of the op-amp is sullied from AFO under open loop conditions. The loop gain must be equal to 1 or slightly greater than 1 at the oscillating frequency and the phase shift must be equal to zero. The oscillator does not produce oscillation. This is the way of checking the oscillator working. The gain of the op-amp and attenuation of the phase shifting circuit must be separately determined and then multiplied to get the open loop gain at fo and this must be greater than 1.To adjust the gain a 470kohms carbon POT is chosen for 390k.The gain of the op-amp should be -29and the attenuation should be-1/29.The i/p voltage can be of the order of 0.1vpeak so that an o/p voltage of 2.9v peak will be obtained. PROCEDURE: 1. Construct the circuit as shown in circuit diagram in fig 2. Observe the output waveform on the CRO. 3. Adjust the feedback resistor Rf to get a perfect sine waveform. 4. Measure the amplitude and frequency and plot the waveform. Graph is drawn as shown in model graph.
390K

QUESTION: 1. List the various types of oscillators 2. What type of feedback is13K in oscillators used 3. State Barkhausen Criteria VO 4. The oscillator is designed for a frequency of 100KHz and it is found to produce no oscillation .why RESULT: 15K RC phase shift oscillator is designed to oscillate at 500Hz and the frequency of the out put waveform is equal to.
RC PHASE SHIFT OSCILLATOR

45

0.1F

0.1F

0.1F

1.5K

1.5K

1.5K

MODEL GRAPH:
V0(V)

t(msec)

TABULAR COLUMN: Amplitude(V) Output 11. WIEN BRIDGE OSCILLATOR Timeperiod(ms)

46

AIM: To design and construct the Wien Bridge oscillator of frequency of 10kHz and to plot the sinusoidal waveform. APPARATUS REQUIRED: Equipments & Components 1.Dual Power Supply 2.Resistors 3.Capacitors 4.IC741 5.CRO Range (0-30)V 31.8K,15.9K 1.59K 0.01F (0-20)MHz Quantity 1 each 1 2 2 1 1

DESIGN: The frequency of oscillation of Wien Bridge oscillator is given by fO =

1 2 RC

Assume C =0.01 microfarad. Desired frequency of oscillator, f0 Then 10000 =

1 2 * R * 0.01 *10 _ 6

= 10KHz

R =1.59K ohm To avoid loading effect R1 = 10 R So R1 = 10 * 1.59 K =15.9 K For the loop gain Av to be greater than 1,Rf should be equal to 2R1 So Rf =2R1 =31.8kohms. Only polyester condenser should be used. Ceramic condenser should not be used. The condenser value is specified by voltage rating ,tolerance &capacitor value. Standard values are 65v, 100v, 125v, 250v,and 400v.

THEORY:

47

This is also RC Oscillator, which uses RC type of feedback network. The closed loop circuit of the wein bridge oscillator gives the negative feedback. To compensate the change ,an adaptive negative feedback is used. Since the op-amp works as a non inverting amplifier, the feedback network need not provide any phaseshift. The circuit can be viewed as weinbridge with a series RC network in one arm & a parallel RC network in the adjoining arm. Resistors R1 & Rf are connected in remaining two arms. The condition of zero phase shift is obtained by balancing the bridge. PROCEDURE: 1. Construct the circuit as shown in circuit diagram . 2. Observe the output waveform on the CRO. 3. Adjust the feedback resistor Rf to get a perfect sine waveform. 4. Measure the amplitude and frequency and plot the waveform. RESULT: Thus the Wien Bridge oscillator circuit is designed output waveform is obtained . Theoretical frequency : 10KHz Practical frequency : VIVA QUESTIONS: 1. What type of feedback is used in Wien Bridge oscillator? 2. Define Comparator. 3. State the advantages of Wien Bridge oscillator 4. State Barkhausen criterion. 5. What are the 2 conditions required for Self-sustained oscillation. 6. Define Oscillator. 7. Compare RC Phase shift & Wein bridge. 8. Compare Amplifier & Oscillator.

48

CIRCUIT DIAGRAM: 0.01F 15.9 K 1.59 K II VO(CRO) 31.8 K

1.59 K

0.01F

SPECIFICATION FOR IC741: +Vcc = +15V, - Vcc = -15V Ambient Temparature : 250 C Input offset voltage Input offset current : 200nA(Max) Input bias current : 500nA(Max) Input resistance : 2M Output resistance : 75 Total Power dissipation : 85mW. PINDIAGRAM FOR IC741:
1 2 8

: 6 mV(Max)

IC741

6 5

1 = Offset Null, 2 = Inverting input terminal, 3 = Non inverting input terminal, 4 = -Vcc, 5 = Offset Null, 6 = Output, 7 = +Vcc, 8 = Noconnection
49

MODEL GRAPH: V0(V)

t(msec)

TABULAR COLUMN: Amplitude(V) Output Timeperiod(ms)

12. ASTABLE MULTIVIBRATOR USING TIMER

50

AIM: To Construct astable multivibrator using IC555 timer & to generate a 1KHz square waveform. APPARATUS REQUIRED: Equipments & Range Quantity Components 1. Power Supply (0-30)V 1 2.Resistors each 1 3.625K,7.25K 3.Capacitors 1 0.01F 1 0.1F 4.IC555 1 5.CRO 1 (0-20)MHz 6.Diode 0A79 1 DESIGN: Case (I) Given f = 1KHz and D =0.5 Frequency of astable multivibrator, f = (R + R )C A B Then C = ( R + R )f A B D = (R + R ) = 0.5 A B 0.5RA +0.5RB = RB RA = RB C = 0.1F, RA =RB =R f = ( R + R )C A B f=
1.45 1.45 =>1KHz = 2RC 2 * 0.1 * 10 -6 * R 1.45 1.45 1.45

RB

Let

R = 7.2Kohm Case (ii) f = 1KHz and D =0.25 Frequency of astable multivibrator, f = (R + 2R )C A B Then C = ( R + 2 R )f A B
1.45 1.45

Given

51

Let

D = R + 2R = 0.25 A B RA +2RB = 4RB RA = 2RB C = 0.1F, RA = 2RB f = ( R + 2R )C A B f = 4R C =>1KHz= 4 * 0.1 *10 -6 * R B B RB = 3.625Kohm RA =7.25Kohms
1.45 1.45 1.45

RB

Then THEORY: The 555 timer is a highly stable device for generating accurate time delay or oscillation. A single 555 timer can provide time delay ranging from microseconds to hours whereas counter timer can have a maximum timing range of days. An astable multi vibrator is a square wave form generator. Square wave form is generated by forcing the Op-amp to operate in the saturation region. It is a free running symmetrical multivibrator because it does not require any external trigger PROCEDURE: 1. The connections are given as shown in the circuit diagram . 2. The square wave form is obtained at output pin of Op-amp. 3. Note the amplitude & Time period of the of the waveform & Plot it in The graph. 4. Duty cycle is calculated using the formula given. RESULT: Thus IC555 timer was operated in astable mode to generate square wave. Theoretical Duty cycle : 25% Practical Duty cycle : -----------.

CIRCUIT DIAGRAM : +Vcc =+5v

52

7.25K

RA 4 7 8

OA79

3.625K

RB 6

IC555
3 Vo

0.1F

2 5 1

0.01F PINDIAGRAM FOR IC555:

1 2

IC555

6 5

1 = Ground, 2 = Trigger, 3 = output, 4 = Reset, 5 = Control voltage, 6 = Threshold, 7 = Discharge, 8 = +Vcc SPECIFICATION FOR IC555: Supply Voltage : +5V to +18V.
53

Maximum current : 200mA. FORMULA FOR DUTY CYCLE: Duty Cycle % = Ton / Ton + Toff *100. MODEL GRAPH: Vo(v) Vcc
2/3 Vcc 1/3 Vcc

0 t(ms)

TABULAR COLUMN: Amplitude(V) Output Timeperiod(ms)

VIVA QUESTIONS: 1.Give the Introduction for IC555. 2.What is the other name for Astable Multivibrator? & Why it is called So?. 3.Write the Formula for DutyCycle & Frequency of Oscillations. 4.Explain the Astable Operation of 555. 5.Mention Few Applications of Astable Multivibrator. 13.MONOSTABLE MULTIVIBRATOR USING TIMER AIM:

54

To Operate the IC555 timer in Monostable mode to generate a 1KHz square waveform. APPARATUS REQUIRED: Equipments & Range Quantity Components 1. Power Supply (0-30)V 1 2.Resistors 2 10K 3.Capacitors 1 0.01F 1 0.1F 1 0.001F 4.IC555 1 5.CRO 1 (0-20)MHz 6.Diode0A79 1 7.AFO 1 (0-1)MHz DESIGN: Time period of monostable multivibrator = 1.1RC. T = 1msec. Assume C = 0.1F, Then R = T/1.1C R = 1*10-3 / 1.1*0.1*10-6 R 10K. THEORY: Monostable multivibrator has one stable state & one quasistable state.One shots are used to set the timing of an event or to control a sequence of events in a digital system. A triggering pulse initiates the oneshot action & generates a pulse of desired width .The oneshot needs time to recover after it returns to the stable state subsequent to a triggering event. Therefore triggering pulses should not be applied so often to cause the on time of the oneshot to exceed the duty cycle specified. If the duty cycle of a oneshot exceeds the maximum specified value, there is a jitter in the output pulse. That is the width of each pulse will not be constant.

PROCEDURE: 1. The connections are given as shown in the circuit diagram (Fig 17.2). 2. The negative trigger pulses of frequency 1KHZ are applied at the trigger input.
55

3. The output waveform is observed and pulse duration is measured. 4. Theoretically the pulse duration is calculated as thigh =1.1RAC RESULT: Thus IC555 timer was operated in Monostable mode to generate square waveform. Thoretical pulse duration = 1msec. Practical pulse duration = --------.

VIVA QUESTIONS: 1. What are operating modes of a timer? 2. Derive the expression of time delay of a monostable multivibrator. 3. Mention few applications of timer in monostable mode. 4. Mention some Features of Timer. 5. Explain the Monostable Operation of 555. 6. Design a Monostable for a Pulse width of 10ms by using IC555.

CIRCUIT DIAGRAM: +VCC = +5V

56

OA79

10K 4 2 8 6 7

10K

0.001 F

a a a a a A A

VIN

IC 555
3 Vo 0.1F 5 1

0.01F PINDIAGRAM FOR IC555:

1 2 8

IC555

6 5

1 = Ground, 2 = Trigger, 3 = output, 4 = Reset, 5 = Control voltage, 6 = Threshold, 7 = Discharge, 8 = +Vcc SPECIFICATION FOR IC555: Supply Voltage : +5V to +18V. Maximum current : 200mA. MODEL GRAPH:

57

VIN (V)

t(ms)

Vo

t(ms)

TABULAR COLUMN: Amplitude(V) Output Timeperiod(ms)

14. DC POWER SUPPLY USING LM723 AIM: (i) To study the operation of 723-voltage regulator IC and to obtain Load regulation & Line regulation. Quantity
58

APPARATUS REQUIRED: Equipments & Range

Components 1. Power Supply 2.Resistors

3.Capacitors 4.IC723 5.Ammeter (0-50) mA 6.Voltmeter (0-10) V 7.Decade resistor box THEORY:

(0-30)V 680,2.2K,10,33K, 3.3K, 0.001F

1 each 1 1 1 1 1 1 1

IC723: IC 723 general-purpose voltage regulator is inherently low current device, but can be boosted to provide 5 amps or more current by connecting external components. It has two separate sections. The Zener diode, a constant current source and reference amplifier produce a fixed voltage of about 7 volts at the terminal Vref. The constant current source forces the Zener diode to operate at a fixed point so that the Zener outputs a fixed voltage. The other section of the IC consists of an error amplifier, a series pass current limit transistor Q2.the error amplifier compares a sample of the output voltage applied at the inverting input terminal to the reference voltage Vref applied at the NI input terminal. The error signal controls the conduction of Q1.

PROCEDURE: IC 723: 1. Connections are made as shown in the circuit diagram 2. The power supply voltage Vin is adjusted to 10 V and Vref is measured at pin 6. 3. The load current IL and load voltage VL are measured and recorded for various values of RL.

59

4.To measure line regulation, load resistance is kept constant and load voltage VL is measured for various values of Vin. 5.Graphs are plotted with IL versus VL and Vin versus VL QUESTIONS: 1. What is the function of a voltage regulator? 2. List and explain the characteristics of three terminal IC regulators. 3. What voltage options are available in 78XX and 79XX voltage regulators? 4. Draw the functional diagram of 723 regulators. 5. Explain the current limiting feature of 723 regulators. 6. Explain current fold back characteristics. RESULT: Thus the DC Power supply using IC 723 is performed and graphs are plotted..

12

11

10

IC 723
2

a a a a a A A A

CIRCUIT DIAGRAM:
5

723 VOLTAGE REGULATOR

3
10 V DC 10 (0-100mA) + -

4 7 13
60

680

1k 3.3k

10k

1k

33k

2.2k 0.001F

MODEL GRAPH: Load regulation:

VL (V)

61

RL(mA)

Line regulation:
VL

(V)

Vi (V)

15. DC POWER SUPPLY USING LM317 AIM: (ii) To design an adjustable voltage regulator using LM317 for the following specifications.

62

APPARATUS REQUIRED: Equipments & Range Components 1. Power Supply (0-30)V 2.Resistors 240 3.Capacitors 10F,1F 4.LM317 6.Voltmeter (0-20) V 7.Decade resistor box

Quantity 1 1 1 1 1 1

THEORY: LM317 is a adjustable voltage regulator. They have the following performance and reliability advantages over the fixed types. *Improved system performance by having line and load regulation of a factor of 10 or better. *Improved overload protection allows greater output current over operating temparature range. *Improved system reliability with each device being subjected to 100% thermal limit burn- in. Thus the adjustable voltage regulators have become more popular because of versatility, performance, and reliability. DESIGN: Designing an adjustable voltage regulator LM317 to satisfy the following specifications: Output voltage Vo = 5 to 12V. Output current Io = 1.0A IAdj = 100 micro amps maximum. If we use R1 = 240ohm., then for Vo = 5V the value of R2 = from equation Vo =VREF ( 1+ R2 / R1) + IAdjR2. Where VREF = 1.25V(Reference voltage between the output and adjustment terminals. 5 = 1.25(1+R2/240) + (10-4)R2 R2 = 3.75/(5.3)(10-3) = 0.71kohm. similarly for Vo = 12V, the value of R2 is 12 = 1.25(1+R2/240) + (10-4)R2 R2 = 10.75/(5.3)(10-3) = 2.01kohm.

63

PROCEDURE: 1.Connections are made as shown in the circuit diagram 2.The power supply voltage Vin is adjusted to be greater than or equal to 15V. 3. The load voltage VL are measured and recorded for various values of R2. 4.To measure line regulation, load resistance is kept constant and load voltage VL is measured for various values of Vin. 5.Graph is plotted with Vin versus VL VIVA QUESTIONS: 1.Give the important parts of a series regulated power supply using discrete components. 2.What is a voltage reference? 3.What is the function of series pass transistor? 4.List the advantages of adjustable regulators. RESULT: Thus the DC Power supply using LM317 is designed and graph is plotted..

CIRCUIT DIAGRAM:
LM317 Vin ADJ Vout

R1=240

64

Vin C2 =1F R2 =3K C1 = 10F Multimeter

MODELGRAPH: VL (v)

Vin (V)

16. PLL CHARACTERISTICS AND FREQUENCYMULTIPLIER USING NE565. AIM: To study the operation of NE565 PLL and to use it as frequency multiplier APPARATUS REQUIRED: Equipments & Range Components 1. Power Supply (0-30)V 2.Resistors 6.8K,20K,2K,10K, Quantity 1 each 1

65

3.Capacitors 4.IC565 5.Transistor 6.IC7490 7.AFO 8.CRO

1 4.7K, 0.001F,1F,10F,0.01F 1 1 1 2N2222 1 1 (0-1)MHz 1 (0-20)MHz

THEORY: IC NE565 phase locked loop is available as a 14-pin DIP package. The block diagram is shown in figure1. The output frequency of the VCO (both inputs 2,3 grounded) is given by f0 = 0.25/RtCt Hz where Rt and Ct are the external resistor and capacitor connected to pin8 and pin9 .The VCO free running is adjusted with Rt and Ct to be at the center of the input frequency range. It may be seen that phase locked loop is internally broken between the VCO output and the phase comparator input. A short circuit between pins 4 and 5 connects the VCO output to the phase comparator so as to compare f0 with input signal fs. A capacitor c is connected between pin7 and pin 10(supply terminal) to make a low pass filter with the internal resistance of 3.6k.

PROCEDURE: Study of PLL: 1. Connections are made as shown in fig 2. The free running frequency of Vco at pin4 is measured with the input signal Vin set equal to zero. It is compared with the calculated value = 0.25/RtCt 3. The input signal of 1Vpp square wave at a 1khz frequency is applied to pin2. The signal is displayed on the scope. 4. The input frequency is increased gradually till the PLL is locked to the input frequency. This frequency f1is the lower end of the capture range. The input frequency is further increased to a frequency f2 till PLL tracks the input signal. This frequency f2 gives the upper end of the lock range. If input frequency is increased further the loop will get unlocked.
66

5. The input frequency is decreased gradually till the PLL is again locked. This is the frequency f3, the upper end of the capture range. The input frequency is decreased further until the loop is unlocked. This frequency f4 gives the lower end of the lock range. 6. The lock range fL = f2-f4. It is compared with the calculated value of 7.8f0/12.also the capture range is fc = f3-f1. It is compared with the calculated value of capture range fc = [fL/2x3.6x103xc] PLL as frequency multiplier: 1. Connections are made as shown in fig. The circuit uses a 4 bit binary counter 7490 as a divide by 5 circuit. 2. The input signal is set at 1vpp square wave at 500Hz. 3. gThe VCO frequency is varied by adjusting the 20k potentiometer till the PLL is locked. The output frequency is measured. It should be 5 times the input frequency. 4. The step 2 and 3 are repeated for input frequency of 1KHZ and 1.5KHZ RESULT: PLL is studied and used as frequency multiplier

Block diagram of NE 565 PLL

+V 10 CC
3.6K 7

2
3 5

Phase Detector

Amp.

C Demodulated

Input

4
VCO

1
67

Input Phase Comparator VCO Output +VCC RT -VCC

output Reference output CT

CIRCUIT DIAGRAM FOR PLL: +6V 8 2 RT

a a a a a A A A

NE 565
3

7 6.8K 6 C1 5 4

C
0.001F

1F

Demodulated
68

VIN

Output Reference Output VCO output (fo)

-6V 0.001F

8 2 7
a a a a a A A A

4 PLL AS FREQUENCY MULTIPLIER: 3 5 +6V

NE 565

1 20 k C10F RT 2K
11 5

7490 C1 ( 5) 1 0.001F

10 69

VIN

10k

fin 0.01F -6V +6V

4.7k

2N2222

17. PRECISION RECTIFIER

AIM: To construct and study the working of half wave and full wave precision rectifiers. APPARATUS REQUIRED: 1. IC 741 -2Nos 2. Diode(1N4007) -2 Nos 3. Resistor 10Kohm -6 Nos 4. Dual power supply (0-30) v-1 No 5. AFO (0 to 1 MHZ) -1 No

70

6. CRO (0 to 20 MHZ)

-1 No

DESIGN: All the resistances are chosen as 10 Kohms and this condition make output voltage is equal to the input voltage. THEORY: Matched diodes are used .To get matched diodes CA3046 transistor array is used. This CA3046 in an IC with 5 transistors in a DIP package. If matched are not used for FWR the positive halves of the rectified wave will not be equal. Precision rectifier rectifies voltages of the order of millivolts much lower than the cut in voltage of diodes. All the resistances are chosen in kilo ohm range so that the AFO is not loaded and much greater than the o/p resistance of AFO (50 ohm). MAX WATTAGE OF RESISTANCE: Resistances used in the design are 1Kohm and 10Kohms .The maximum voltages across the resistance will be supply voltage. Hence wattage of resistance is V2 / R. V2 /R= 225 / 10K which is so much lower than 1/8W or 1/4W.So resistances with 5% tolerance, carbon film resistor with 1/8W or 1/4W is used.

PROCEDURE: 1. Connections are made as shown in fig 2. The transfer characteristic of the FWR is done for direct voltages of positive and negative values. 3. For this a variable supply with course knob of the supply fully anticlockwise and fine knob is adjusted to get voltage in the range of 1-50mv in both polarities. 4. Various I/p voltages are applied to FWR and o/p voltages are noted. For the measurement of input and output voltage DMM in dc range is used. 5. Experiment is to done for both polarities of input voltage. Note that slope=1 and small signal gain is equal to slope. The transfer characteristics is shown in fig.

71

6. Alternatively an ac input can also be given from an AFO, with amplitude in millivolts range. The input and output waveforms are viewed on the CRO & plotted as shown in model graph. QUESTIONS: 1. What is the basic difference between an ordinary rectifier and precision rectifier 2. Give applications of rectifiers. 3. Explain the operation FWR circuit RESULT: The input and output waveforms of the HWR & FWR are plotted.

10K HALF WAVE RECTIFIER 1N4007

10K VO(CRO) 1N4007 10K 72

AFO

a a a a a A A A

VI(v)

t(msec)

Vo(v)

T(msec)

FULL WAVE RECTIFIER:

10K

10K

10K

10K

1N4007

VO(CRO)

AFO

a a a a a A A A
10K 73

1N4007

10K

Vin

t(msec)

VO(v)

t(msec)

TABULAR COLUMN: Voltage Time Frequency

Half wave
Input. Output

Full wave
Input Output

74

18.STUDY OF COMPARATOR
AIM: To study the operation of 741 op-amp as comparator. APPARATUS REQUIRED: 1. IC741 -1No 2. Resistor 1Kohm -2 Nos 3. AFO -1 No 4. CRO -1 No 5. RPS -1 No 6. Linear IC trainer -1 No

75

7. Dual power supply -1 No THEORY: A comparator is a circuit, which compares a signal voltage applied at one input of an op-amp with a known reference voltage at the other input. It is basically an open loop op-amp with output I V (=Vcc). There are two types of comparators. (a) Non-inverting comparator (b) inverting comparator NON- INVERTING COMPARATOR: In this circuit, a fixed reference voltage V reference is applied to inverting input and a time varying signal Vi is applied to non- inverting input. The output voltage is at - Vsat for Vi < Vref and V0 goes to t Vsat for Vi > Vref. The Vref may be positive or negative voltage. PROCEDURE: 1. The circuit is connected as shown in figure and reference=+0.5V is applied. 2. The signal generator is adjusted so that VI = 2 Vpp sine wave at 1KHz 3. Using a CRO the input and output waveforms are observed simultaneously. The output waveform is plotted. 4. The circuit is connected as shown in fig and Vref =-0.5V is applied steps 2 and 3 are repeated QUESTIONS: 1. Draw the characteristics of an ideal comparator and that of a commercially available comparator. 2. List the different types of comparators 3. Sketch the input and output of inverting comparator with positive and negative reference voltage 4. What is the meaning of voltage limiting? Show how is it obtained. 5. Mention few applications of comparator RESULT: The operation of the comparator is studied.
COMPARATOR WITH POSITIVE Vref

1 K

AFO

-_--- -

VO(CRO)

a a a a a A A A
1 K 76

Vref = o.5V

MODEL GRAPH:
Vi

VREF

T(msec)

V0 +VSAT

T (msec)

-VSAT COMPARATOR WITH NEGATIVE Vref

1 K

VO(CRO)
AFO

a a a a a A A A
1 K 77

Vref = -o.5V

VI

-VREF

V0 +VSAT

VSAT

19.TRIANGULAR WAVEFORM GENERATOR

AIM: To construct and study the operation of a triangular waveform generator using IC 741. APPARATUS REQUIRED: 1. 2. 3. 4. 5. IC741 -2Nos Resistor 10Kohm -2 Nos 1Mohm -1 No 100kohm -1 No Capacitor 0.01MFD -1 No

78

6. 0.05MFD 7. Pot 100kohm 8. CRO 9. RPS 10. Linear IC trainer. THEORY:

-1 No -1 No -1 No -1 No -1 No

A triangular is generated by integrating a square waveform. The circuit uses a square waveform generator and integrator. The frequencies of the two waveforms are equal while the amplitude of triangular waveform is smaller. The decrease in amplitude is because the reactance of the feedback capacitor C2 decreases with increase in frequency. The resistor R2 is connected in parallel with C2 to avoid saturation problems at low frequencies. PROCEDURE: 1. Connections are made as shown in circuit diagram . 2. The output voltages VO1 and VO2 are noted. 3. The amplitude and time period of the square wave VO1 and triangular wave VO2 are recorded. QUESTIONS: 1. Explain the operation of triangular wave generator. 2. What is the difference between a saw tooth wave and a triangular wave? RESULT: A triangular wave generator is constructed using IC741 and studied. TRIANGULAR WAVE GENERATOR

VO

79

MODEL GRAPH:

Vo

80