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PERIPHERAL INTERFACING

TRAFFICLIGHTCONTROLLER
OBJECTIVE
Interfacing TRAFFIC LIGHT CONTROLLER with 8085 Microprocessor trainer kit and simulating the sequence of traffic light states.

APPARATUS REQUIRED
8085 Microprocessor trainer kit. Traffic light controller. Power Supply. Flat Ribbon Cable.

DESCRIPTION
Combination of Red, Amber and Green LEDs are provided to indicate Halt, Wait and Go states for vehicles. Combination of Red and Green LEDs are provided for pedestrian crossing. 36 LEDs are arranged in the form of an intersection. At the left corner of each road, a group of 5 LEDs (Red, Amber and Green) are arranged in the form of a Tsection to control the traffic of that road. Each road is named as North N, South S, East E and West W. L1,L10, L19 and L28 (Red) are for stop signal for the vehicles on the road N,S,W and E respectively. L2,L11,L20 and L29 (Amber) indicate wait state for the vehicles on the road N,S,E and W respectively. L3,L4 and L5 (Green) are for left, straight and right turn for the vehicles on the road S. Similarly L12 - L13 - L14 , L23 - L22 - L21 and L32 - L31 - L30 simulates same function for the roads E, N & W respectively. A total of 16 LEDs (2 Red & 2 Green at each road) are provided for pedestrian crossing. L 7 - L9, L16 - L18, L25 - L27 & L34 - L36 (Green) when on allows pedestrians to cross and L 6 - L8, L15 - L17, L24 - L26 & L33 - L35 (Red) when on alarms the pedestrians to wait. To minimize the hardware pedestrians indicator LEDs (both Green and Red) are connected to some port lines (PC 4 to PC7 ) with Red inverted. Red LEDs L10 and L28 are connected to port lines PC 2 to PC3 while L1 and L19 are connected to lines PC 0 and PC1 after inversion. All other LEDs (Amber and Green) are connected to Port A and port B.

INSTALLATION PROCEDURE
SDA_85M to NIFC_11 interface connection details: 1.Connect p3 on 85M to the connector C1 on the interface using a 26 core FRC. Care should be taken such that, pin1 of P3 on the kit coincides with pin1 of cable [Observe the notch on the cable connector] 2.Power connection: Connect +5v,GND to the interface. Color codes of power connection on the interface +5v - Orange, Blue, White GND - Black. 3.Enter the Program. 4.Now execute the program, Go <Starting address> <EXE> The LEDs on the interface glow according to certain sequence.

PERIPHERAL INTERFACING

ASSEMBLY LANGUAGE PROGRAM


ADDRES S
C000 C002 C004 C006 C009 C00A C00C C00D C00E C010 C011 C012 C014 C017 C018 C019 C01C C01F C022 C024 C025 C028 C029 C02A C02B C02E

LABEL

MNEMONICS OPCODE/OPERAND
MVI A,80H OUT CWR MVI E,03H LXI H,C100H MOV A,M OUT PORTA INX H MOV A,M OUT PORTB INX H MOV A,M OUT PORTC CALL DELAY INX H DCR E JNZ NEXTSTAT JMP REPEAT LXI MVI DCR JNZ DCX MOV ORA JNZ RET D,3000H C,FFH C L1 D A,D E L2 3E D3 06 21 7E D3 23 7E D3 23 7E D3 CD 23 05 C2 C3 11 0E 0D C2 1B 7A B3 C2 C9 80 DB 03 00 C1 D8 D9 DA 1F C0 09 C0 04 C0 00 30 FF 24 C0

REPEAT NEXTSTAT

DELAY L2 L1

22 C0

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PORT A PORT B PORT C

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PROGRAM TRACE
LABEL MNEMONICS MVI A,80H DESCRIPTION Initializing the ports of the PPI 8255 as O/P ports by writing the control word as 80H. DATA BITS COMMENT D7 1 I/O mode D6 D5 0 0 Mode0 D4 0 PortA O/P D3 0 PortC Upper O/P D2 0 Mode0 D1 0 PortB O/P D0 0 PortC Lower O/P

80H is moved to accumulator. REGISTERS A F 80 XX B C XX XX D E XX XX H L XX XX OUT CWR REPEAT MVI E,03H Control word specify 8255. Initialize E register REGISTERS A 80 XX B XX XX D XX 03 H XX XX the I/O function for each ports of with number of sequence. F C E L

LXI H,C100H

Initialize the memory pointer at C100H .i.e. loads the 16-bit data in the register pair designated. REGISTERS A F 80 XX B C XX XX D E XX 03 H L C1 00 C100H is the memory pointer to the first data of the sequence. MEMORY C100 C101 C102 C103 C104 BF BF AF EE EE HL memory pointer

NEXTSTAT

MOV A,M

Memory pointer content BFH is moved to accumulator. REGISTERS BF XX XX XX XX 03 C1 00 LED no PORTA bits BFH LED status A B D H L14 1 Will not glow F C E L L13 0 L12 L11 L5 L4 1 1 1 1 Will not glow L3 1 L2 1

GLOW
Since Negative logic

when the portA bit is 1 then LED is in OFF state, when the portA bit is 0 then LED is in ON state.

PERIPHERAL INTERFACING OUT PORTA L13 will glow

INX H

Increment the HL register pair by 1.The instruction views the contents of the HL registers as a 16-bit number. No flags are affected. REGISTERS BF XX XX XX XX 03 C1 01 A B D H F C E L

C101H is the memory pointer to input data sequence. MEMORY C100 C101 C102 C103 C104 MOV A,M BF BF AF EE EE

HL memory pointer

Memory pointer content BFH is moved to accumulator. REGISTERS A F BF XX B C XX XX D E XX 03 H L C1 01 LED no PORTB bits BFH LED status L32 1 Will not glow L31 0 L30 L29 L23 L22 1 1 1 1 Will not glow L21 1 L20 1

GLOW

Since Negative Logic when the portB bit is 1 then LED is in OFF state, when the portB bit is 0 then LED is in ON state. OUT PORTB L31 will glow

PERIPHERAL INTERFACING

INX H

Increment the HL register pair by 1. REGISTERS A F BF XX B C XX XX D E XX 03 H L C1 02 C102H is the memory pointer to input data sequence. C100 C101 C102 C103 C104 MEMORY BF BF AF EE EE

HL memory pointer

MOV A,M

Memory pointer content AFH is moved to accumulator. REGISTERS AF XX XX XX XX 03 C1 02 LED no LED glow PORTC bits AFH LED status L33 L35 1 1 L33,L35 L34 L36 0 L24 L26 1 0 L25,L27 A B D H F C E L L25 L27 0 L15 L17 1 1 L15,L17 L16 L18 0 L6 L8 1 0 L7,L9 L7 L9 0 L28 0 1 L10 0 1 L19 1 1 L1 1 1

GLOW

GLOW

GLOW

Will GLOW not

GLOW

OUT PORTC

glow L1 L19 => glow; since positive logic. Only when 1 is present in this place the LED will glow. L10 L28 => does not glow; since negative logic. This will not glow because only when 0 is present in this, the LED will glow. Here 11 is present hence it will not glow. L7,L9 L25,L27 => will glow; since negative logic. Here we have zero. L33,L35 L15,L17 => will have one. glow; since positive logic. Here we

PERIPHERAL INTERFACING

CALL DELAY INX H

In order to make these LEDs glowing programmer/user, delay was provided. Increment the HL register pair by 1. REGISTERS A F AF XX B C XX XX D E XX 03 H L C1 03

visible

to

the

C103H is the memory pointer to input data sequence. C100 C101 C102 C103 C104 DCR E MEMORY BF BF AF EE EE

HL memory pointer by 1 indicating remaining

E register was decremented number of sequence. REGISTERS A F AF XX B C XX XX D E XX 02 H L C1 03

JNZ NEXTSTAT JMP REPEAT

Now the next sequence is being looped. Once again the three sequence are executed.

PERIPHERAL INTERFACING

WE EW

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Now the next sequence is being traced. When E=02 PORTS CONFIGURATION & DISPLAY. LED no PORTA bits EEH LED status L14 1 L13 1 L12 1 L11 0 L
5

L4 1

L3 1

L2 0

Will not glow

GLOW
Since Negative logic L30 1 L29 0

Will not glow

GLOW
Since Negative logic L21 1 L20 0

LED no PORTB bits EEH LED status

L32 1

L31 1

L23 1

L22 1

Will not glow

GLOW
Since Negative logic L24 L26 1 1 L24,L26 L25 L27 0 L15 L17 1 1 L15,L17

Will not glow

GLOW
Since Negative logic L2
8

LED no LED glow PORTC bits ACH LED status

L33 L35 1 1

L34 L36 0

L16 L18 0

L6 L8 1 1

L7 L9 0

L10 0 1

L19 1 0

L1 1 0

0 1

L33,L35

L6 L8

GLOW GLOW

GLOW

GLOW

Will not glow

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WAITING SEQUENCE

11

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12

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Now the next sequence is being traced. When E=01 PORTS CONFIGURATION & DISPLAY. LED no PORTA bits FBH LED status L14 L13 L12 L11 1 1 1 1 Will not glow L5 1 L4 0 L3 L2 1 1 Will not glow

GLOW
Since Negative logic

LED no PORTB bits FBH LED status

L32 L31 L30 L29 1 1 1 1 Will not glow

L23 1

L22 0

GLOW
Since Negative logic

L21 L20 1 1 Will not glow

LED no LED glow PORTC bits 50H LED status

L33 L35 1

L34 L36

L24 L26 1

L25 L27

L15 L17 1

L16 L18

L6 L8 1

L7 L9

L28 0 0

L10 0 0

L19

L1

0 0 L34,L36

0 1 L24,L26

0 0 L16,L18

0 1 L6 L8

GLOW

GLOW

GLOW

GLOW

GLOW

1 1 0 0 Will not glow

Thus the LEDs glow, when E=00 the sequence is terminated and next cycle starts.

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NS S N

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DELAY SUBPROGRAM
DELAY LXI D,3000H Initialize the memory pointer at C100H .i.e. loads the 16-bit data in the register pair designated. REGISTERS A F XX XX B C XX XX D E 30 00 H L XX XX C100H is the memory pointer to the first data of the sequence. 3000 3001 3002 3003 3004 L2 MVI C,FFH

MEMORY
XX XX XX XX XX HL memory pointer

Move FFH immediately in to C register. REGISTERS A F XX XX B C XX FF D E 30 00 H L XX XX Move FFH immediately in to C register. REGISTERS A F XX XX B C XX FE D E 30 00 H L XX XX Loop until C = 00 Decrement the DE register pair by 1. REGISTERS A F XX XX B C XX XX D E 2F FF H L XX XX D register content 2FH is moved to accumulator. REGISTERS A F 2F XX B C XX XX D E 2F FF H L XX XX OR the accumulator content with E register content FF => 1111 1111 2F => 0010 1111 ----------1111 1111 => FF REGISTERS A F FF XX B C XX XX D E 2F FF H L XX XX Only when DE=0000,this loop will end. Return to main program

L1

DCR C

JNZ L1 DCX D

MOV A,D

ORA E

JNZ L2 RET

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PERIPHERAL INTERFACING

EXECUTION
ADDRE SS
C100 C101 C102 C103 C104 C105 C106 C107 C108

DATA
BF BF AF EE EE FC FB FB 50
H H H H H H H H H

VERIFICATION
The LEDs on the Interface glow according to the given sequence.

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