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P.VENKAT RAO(M120155EC) M.SHAILENDER(M120274EC) EXPERIMENT NO :1

AIM: To study the drain and Transfer Characteristics of NMOS and PMOS. DRAIN CHARACTERISTICS:
We will plot Drain Current (Ids) as a function of Drain to source voltage (Vds) for different constant values of Gate to source voltage (Vgs) for NMOS and PMOS. The results plotted can be seen below.

Drain characteristics for NMOS & PMOS transistors

0.0002 Drain Current (Ids) in amps 0.00018 0.00016 0.00014 0.00012 0.0001 0.00008 0.00006 0.00004 0.00002 0 0 0.5 1 1.5 Drain to Source Voltage(Vds) in volts 2 2.5 vgs=1.8V vgs=1.35v vgs=0.9V vgs=0.45V vgs=0V Vgs=-0.9V Vgs=-1.35V vgs=-1.8V vgs=-0.45V

Fig1: Drain Characteristics of NMOS and PMOS. INFERENCES: Drain current is zero till a certain voltage of Gate to source is reached. This particular voltage from where current starts to flow is the threshold voltage (Vth). The current starts flowing after the threshold voltage because an inversion region is formed. For NMOS device i. ii. iii. When Vgs < Vth, Ids is zero for any Vds value device is in cut-off (off state) region. For Vgs> Vds + Vth, the transistor is in the non-saturation region and the curve is a half parabola. For Vgs < Vds + Vth, the device is conducting and Ids is independent of Vds.

Vdsat is defined as the minimum drain-source voltage that is required to keep the transistor in saturation for a given Vgs.In the non-saturated state, the drain current initially increases almost linearly from the origin before bending in a parabolic response. Thus the name ohmic or linear for the non-saturated region. The drain current in saturation is virtually independent of Vds. This is because there is no carrier inversion at the drain region of the channel. Carriers are pulled into the high electric field of the drain/substrate pn junction and ejected out of the drain terminal. A near constant current is driven from the transistor no matter the drain to source voltage. PMOS transistor Ids versus Vds characteristics will be similar to NMOS, but the voltage and current polarities are negative to account for hole inversion and drain current that enters the transistor (PMOS curves are also shown in Fig1).

TRANSFER CHARACTERISTICS:
We will plot Drain Current (Ids) as a function of Gate to source voltage (V gs) for different constant values of Drain to source voltage (Vds) for NMOS and PMOS. The results plotted can be seen below

Transfer Characteristics for NMOS & PMOS

2.00E-04 Drain current(Ids)in amps 1.80E-04 1.60E-04 1.40E-04 1.20E-04 1.00E-04 8.00E-05 6.00E-05 4.00E-05 2.00E-05 0.00E+00 0 0.5 1 Gate to source voltage(Vgs)in volts 1.5 2 vds=-1.8V vds=-0.6V vds=-1.2V Vds=0.6V Vds=1.2V VdS=1.8V

Fig2: Transfer Characteristics of NMOS and PMOS. The transfer characteristic relates drain current response to the input gate-source driving voltage.The input characteristic curve can locate the gate voltage at which the transistor starts conducting current and leaves the OFFstate. This is the device threshold voltage. The PMOS transistor transfer characteristic in Fig 2 is analogous to the nMOS transistor except the Id and Vgs polarities are reversed. Vds is negative and the gate is at a voltage lower than the source terminal.

EXPERIMENT NO :2
AIM: To study the parameters of NMOS transistor using CADENCE tool. 1)THRESHOLD VOLTAGE(Vth):
The threshold voltage Vth, for a MOS transistor can be defined as the voltage applied between the gate and the source of an MOS device below which the drain-to-source current Ids drops to zero. Practically Ids never becomes zero but drops to a very small value that is insignificant. One of the most popular techniques for the Vth determination is the transconductance change method, which is considered to be insensitive to doping profiles and relatively insensitive to mobility degradation and series resistance effects. In this method, Vth is defined from the peak position of the transconductance (gm) derivative in respect to the gate voltage (Vgs). The origin of this method can be understood by analyzing the ideal case of a MOSFET where Ids =0 for Vgs<Vth and Ids is proportional to Vgs for Vgs>Vth and has a positive constant value for Vgs> Vth . Therefore, d2Ids/dV 2gs will tend to infinite at Vgs = VT0. Since for a real device the assumptions are not exactly true ,d2 Ids/dV 2gs will not become innite, but will instead exhibit a maximum at V gs= VT0. By using the above method we plotted the following graph using cadence tool.

4.50E-04 4.00E-04 3.50E-04 3.00E-04 2.50E-04 2.00E-04 1.50E-04 1.00E-04 5.00E-05 0.00E+00 -5.00E-05 0 -1.00E-04

vds=1(V) 1stderiv 2ndderiv 0.5 1 1.5 2 2.5

Fig3: Transfer Characteristics of NMOS. For Vds=1V we got d2Ids/dV 2gs is maximum at Vgs =0.545V. Therefore Vth=0.545V.

2)CHANNEL LENGTH MODULATION COEFFICIENT ():

When the MOSFET is biased in the saturation region the depletion region at the drain terminal extends laterally into the channel reducing the effective channel length.Since the depletion region width is biased dependent the effective channel length is also bias dependent and is modulated by drain to source voltage . i. The channel pinch-off point moves slightly away from drain as Vds > Vdssat.

ii. iii. iv.

The effective channel length (Leff) reduces with Vds. Electrons travel to pinch-off point will be swept to drain by electric field. The length accounted for conductance in the channel is replaced by Leff

By using cadence tool we plotted Ids versus Vds curve as below

Drain Characteristics
0.00012 Drain current(Ids)in amps 0.0001 0.00008 0.00006 0.00004 0.00002 0 0 0.5 1 1.5 2 2.5 Drain to source voltage(Vds)in volts vgs=1.35v

Fig4: Drain Characteristics of NMOS. We choose two points in saturation(Vds>Vgs-Vth) and using formula = (Ids2-Ids1) /( Ids1Vds2-Ids2Vds1). When Vds1=1.05V and Ids1=102.9 A, Vds2=1.6V and Ids2=110.4A. We get =0.15394(volt)-1

3)BODY BIAS EFFECT( ):

The bulk and source(BS) ,bulk and drain(BD) junction should be reverse biased for the device to function properly.Normally, the body effect occurs when source and bulk are at different potentials The depletion region widens in BS and BD junctions and under the channel as Vsb increases. Body effect: Vth increases due to the excess charge in the depletion region under the channel.The body effect can cause considerable degradation in circuit performance. Now to find the threshold voltage taking into consideration the body effect we take vsb as 1 volt.we again use the double differention method used earlier for finding threshold voltage.The fig required is plotted using cadence tool as follows.

Drain current(Ids)in amps

4.00E-04 3.50E-04 3.00E-04 2.50E-04 2.00E-04 1.50E-04 1.00E-04 5.00E-05 0.00E+00 -5.00E-05 0 -1.00E-04

Tranfer characteristics

vds=0.5(V)&vsb=1(V) 1stderiv 2ndderiv 1 2 3

Fig5: Transfer Characteristics of NMOS. Now the trans conductance is maximum at gate voltage of Vgs=0.65v. So threshold voltage at source to body voltage of 1v is 0.65v. substuting these values in below formula.

We get

=0.22 V1/2.

4)DRAIN INDUCED BARRIER LOWERING (DIBL):

DIBL is an electrostatic effect that causes the channel charge as well as current of short channel MOSFETS to be partially controlled by drain potential rather than gate potential. From fig 3 we have Vds2=1V Vth2=0.5V. To find another threshold value we plot atransfer curve for vds=0.5v as shown below.

4.00E-04 3.00E-04 2.00E-04 1.00E-04 0.00E+00 -1.00E-04 0

vds=0.5(V) istderiv 2ndderiv 1 2 3

Fig6: Transfer Characteristics of NMOS. Again using double differentiation method we get vth1 =0.55v. Now substing the values in the Mathematical formula DIBL= (VTh2-VTh1)/(Vds2-Vds1), We get DIBL= 0.01.