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Waljat College of Applied Sciences Question Bank for Cycle Test 1 (All questions come from the question

bank) 1. What are the advancements made in SAP2 over SAP1?

a. SAP-2 uses bidirectional data bus that reduces wiring capacitance. b. It has more general purpose registers (A, B and C for external use by programmer and temp for internal use) c. It has 2 input ports. The communication between peripheral and processor use handshaking mechanism. Port 2 can accept serial input d. SAP-1 has 2 output ports. Port 4 can send serial output. e. It makes available of flags (zero and sign) to the programmer f. It has more instructions (42) than SAP-1. Because of this, it uses 8-bit opcodes. The new instructions include i. Jump instructions for more program control flow. ii. Call and return instructions to facilitate subroutines iii. Introduces more addressing modes 1. immediate addressing 2. register addressing 3. implied addressing iv. Instructions for logical operations, v. RAR and RAL that rotate bits in a byte
2. Explain various types of instructions in SAP3, with examples. SAP3 instructions are same as those of 8085. Data Transfer : This group of instructions copy data from a location called a source to another location called a destination, without modifying the contents of the source. In technical manuals, the term data transfer is used for this copying function. However, the term transfer is misleading; it creates the impression that the contents of the source are destroyed when, in fact, the contents are retained without any modification. The various types of data transfer (copy) are listed below together with examples of each type:
mov lxi mvi sphl ldax xthl lhld xchg lda out stax in shld push sta pop

These instructions perform arithmetic operations such as addition, subtraction, increment, and decrement.
Arithmetic : add dad adc daa adi inr aci enx sub dcr sbb dcx sui sbi

These instructions perform various logical operations with the contents of the accumulator.
Logical : stc cpi ana rlc ani rrc xra ral xri rar ora cma ori cmc cmp

This group of instructions alters the sequence of program execution either conditionally or unconditionally.
Branching : jmp jm jnz pchl jz rst jnc jc jpo jpe jp

Following branching instructions change the sequence of a program either by calling a subroutine or returning from a subroutine. The conditional Call and Return instructions also can test condition flags.
call cm cnz cz cnc cc cpo cpe cp

ret rnz rz rnc rc rpo rm Control : These instructions control

rpe

rp

machine functions such


sim

as Halt, Interrupt, or do nothing.


nop hlt di ei rim

3.

Explain how software control-ROM with microprogramming works to issue a control word in a computer. Answer in pages 161, 162and 163 of Digital Computer Electronics by Malvino 4. Explain with a neat diagram, the architecture of 8085. Answer is from page 105 of Microprocessor Architecture and Programming and Applications with 8085 by Gaonkar. Including figure 4.7 and explanation of each block in the figure 5. Explain the function of various flags available in 8085. Answer is in page 107.of text book by Gaonkar 6. Name three components that must be connected to the isolate address and data buses of 8085, and sketch the connection details of these components. Answer is in text book by Gaonkar. Page 102-104 with figure 4.4. 7. Explain how the individual control signals are generated from RD,WR and IO/M signals of 8085? Answer is in text book by Gaonkar. Page 104-105 with figure 4.5a.

8.

Explain the various addressing modes of 8085, with examples. Every instruction of a program has to operate on a data. The method of specifying the data to be operated by the instruction is called Addressing. The 8085 has the following 5 different types of addressing. 1. 2. 3. 4. 5. Immediate Addressing Direct Addressing Register Addressing Register Indirect Addressing Implied Addressing

1. Immediate Addressing: In immediate addressing mode, the data is specified in the instruction itself. The data will be a part of the program instruction. EX. MVI B, 3EH - Move the data 3EH given in the instruction to B register; LXI SP, 2700H.

2. Direct Addressing: In direct addressing mode, the address of the data is specified in the instruction. The data will be in memory. In this addressing mode, the program instructions and data can be stored in different memory. EX. LDA 1050H - Load the data available in memory location 1050H in to accumulator; SHLD 3000H

3. Register Addressing: In register addressing mode, the instruction specifies the name of the register in which the data is available. EX. MOV A, B - Move the content of B register to A register; SPHL; ADD C.

4. Register Indirect Addressing: In register indirect addressing mode, the instruction specifies the name of the register in which the address of the data is available. Here the data will be in memory and the address will be in the register pair.

EX. MOV A, M - The memory data addressed by H L pair is moved to A register. LDAX B.

5. Implied Addressing: In implied addressing mode, the instruction itself specifies the data to be operated. EX. CMA - Complement the content of accumulator; RAL

9.

Which instruction takes maximum number of T states in 8085? How many T states it takes? How many machine cycles it takes?

Assume at Memory Location 2000H instruction CALL 3000H is written During a call instruction the 8085 pushes the current value of program counter(16 bit ie 2 byte | Here it is 2000H) to the stack and then copies the new value from the memory(specified in the instruction. (Here 3000H) So now 6 T states Opcode fetch + Memory write * 2 (PC pushed to stack) ( 3+3 ) + Memory read * 2 (New value of PC fetched from memory) ( 3+3 ) ie 6 + 3 + 3 + 3 + 3 = 18 T-states.
10. 11. Show the pin diagram of 8085 and explain the use of different groups of pins. Figure 4.1 b in page 97 of text book by Gaonkar. Pages 96-100 Write a program to choose only BCD numbers from a group of 12 bytes residing in locations starting from 0C20H, and arrange them in descending order in location 0C41H. Keep the count (BCD) in 0C40H.

12.

What is the output at port1 when the following instructions are executed?? MVI A, 8FH ; number 8FH is loaded in ACC. Therefore A= 8F H (143 decimal) ADI 72H ;add 72 H to ACC (now A = 8FH + 72H = 101H ) JC DSPLAY ;if carry, goto DSPLAY (since 101h is three digits, carry is there) OUT PORT1 ;output accumulator content to port 1 DSPLAY: XRA A ;XOR ACC with itself. The result of operation is 0. so A =0 OUT PORT1 ;output accumulator content to port 1 HLT ; halt the program. Since carry is generated in addition operation, the program control jumps to xra a instruction. This instruction makes the accumulator content 0, which is sent to output port 1. So the output at port 1 is 0.

13.

14.

Convert the following assembly code into machine code of 8085. MVI A, 34H MOV B, A SUI 50H JC DELETE MOV A, B SUI 80H JC DSPLAY DELETE: XRA S OUT PORT1 HLT DSPLAY: MOV A, B OUT PORT1 HLT You are given a set of 100 resistors of 10K. The actual values of all resistors are stored in memory locations starting at 2102H. You are asked to test them for 10% tolerance and reject the resistors that are outside the tolerance. Write a program to test if a resistor is in tolerance limit, and store the number of valid resistors in location 2100H. Explain the terms I/O-mapped IO and memory-mapped IO.

15.

Answer in chapter 5 of text book by Gaonkar. Sections 5.1.1, 5.4 for short answer. 16. How do you interface 4K RAM with 8085, with starting address 2000 H? 17. What is the advantage of Interrupt driven I/O operation over the Status check I/O? Remove this question from question bank for CT1. 18. Explain how a CALL instruction is executed. Sequence of events in execution of CALL instruction by 8085 is given in page 307-308 in text book by Gaonkar. 19. How many memory locations can be addressed by a microprocessor with a 14-bit address bus? With a 14-bit address bus, 214 locations can be addressed. Is 16 X 1024 =16,384 memory locations. 20. If the size of memory chips is 2048 X 8 bits, how many chips are required to make up 32 KB memory? One chip provides 2048 bytes of memory. i.e. 2KB memory. Therefore, to make up 32 KB memory, we need 32KB/2KB = 16 chips. 21. Memory chips of size 256 X 1 bits are to be used in a computer. How many chips are required to make up a 1KB memory? How are the chips connected to the CPU? One chip provides 256 cells of memory. So if you get 8 chips in parallel, you get 256 bytes of memory. Now you can calculate how many chips are required to get 1KB memory.

22.

Explain the terms address range and memory map. See section 4.3 and 4.4 of text book by Gaonkar 23. What is the sequence of steps 8085 takes to fetch an instruction? Explain with the help of a diagram. Section 4.2.2 with opcode fetch part of figure 4.10 (I had given it separately in notes) 24. Explain the three buses of the 8085- based computer system.page 96 98 of text book by Gaonkar