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SERVICE MANUAL
MODEL: RHT397H/RHT398H
P/NO : AFN35914227
MARCH, 2008
CONTENTS
SECTION SECTION SECTION SECTION SECTION 1.........SUMMARY 2.........CABINET & MAIN CHASSIS 3.........ELECTRICAL 4.........RS-06A LOADER PART 5.........REPLACEMENT PARTS LIST
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
1-1
SECTION 1 SUMMARY
CONTENTS
NEW FUNCTIONS OF DVB-T/HDD/DVD RECORDER ...................................................................1-3 PRODUCT SAFETY SERVICING GUIDELINES FOR DVB-T/HDD/DVD RECORDER PRODUCTS .......................................................................................1-4 SERVICING PRECAUTIONS ....................................................................................................................1-5
GENERAL SERVICING PRECAUTIONS INSULATION CHECKING PRODEDURE ELECTROSTATICALLY SENSITIVE (ES) DEVICES
SERVICE INFORMATION FOR EEPROM IC SETTING ..................................................................1-6 UPGRADE THE MAIN & LOADER PROGRAM.................................................................................1-7 SPECIFICATIONS ........................................................................................................................................1-9
1-2
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
FAST DUBBING
DUBBING MEANS A COPYING FUNCTION BETWEEN HDD TO DVD DISCS. COPYING BETWEEN HDD TO DVD IS A COMPLETELY DIGITAL PROCESS AND THEREFORE INVOLVES NO LOSS OF QUALITY IN THE AUDIO OR VIDEO. SO THIS MEANS THAT COPYING CAN BE CARRIED OUT AT THE MAXIMUM SPEED POSSIBLE. << DUBBING SPEED RATE >> NORMAL DUBBING : SPEED RATE MAX X1 FAST DUBBING : SPEED RATE MAX X4 WHEN FAST DUBBING FROM HDD TO DVD, THE SPEED OF COPYING DEPENDS ON THE RECODING MODE AND THE KIND OF USING THE DVD DISC, AND THIS MODE IS NOT AVAILABLE FOR EDITED VIDEO TITLE IN HDD. WHEN FAST DUBBING FROM DVD TO HDD, ONLY AVAILABLE WHEN COPYING VR MODE DISC(DVD-RW) TO HDD, AND ONLY NORMAL DUBBING AVAILABLE WHEN COPYING VIDEO MODE DISC(DVD+RW/RW, DVD-R) TO HDD.
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
1-3
CAUTION: Do not attempt to modify this product in any way. Never perform customized installations without manufacturers approval. Unauthorized modifications will not only void the warranty, but may lead to property damage or user injury.
Service work should be performed only after you are thoroughly familiar with these safety checks and servicing guidelines.
TIPS ON PROPER INSTALLATION 1. Never install any receiver in a closed-in recess, cubbyhole, or closely fitting shelf space over, or close to, a heat duct, or in the path of heated air flow. 2. Avoid conditions of high humidity such as: outdoor patio installations where dew is a factor, near steam radiators where steam leakage is a factor, etc. 3. Avoid placement where draperies may obstruct venting. The customer should also avoid the use of decorative scarves or other coverings that might obstruct ventilation. 4. Wall- and shelf-mounted installations using a commercial mounting kit must follow the factory-approved mounting instructions. A product mounted to a shelf or platform must retain its original feet (or the equivalent thickness in spacers) to provide adequate air flow across the bottom. Bolts or screws used for fasteners must not touch any parts or wiring. Perform leakage tests on customized installations. 5. Caution customers against mounting a product on a sloping shelf or in a tilted position, unless the receiver is properly secured. 6. A product on a roll-about cart should be stable in its mounting to the cart. Caution the customer on the hazards of trying to roll a cart with small casters across thresholds or deep pile carpets. 7. Caution customers against using extension cords. Explain that a forest of extensions, sprouting from a single outlet, can lead to disastrous consequences to home and family.
GRAPHIC SYMBOLS
The exclamation point within an equilateral triangle is intended to alert the service personnel to important safety information in the service literature. The lightning flash with arrowhead symbol within an equilateral triangle is intended to alert the service personnel to the presence of noninsulated dangerous voltage that may be of sufficient magnitude to constitute a risk of electric shock. The pictorial representation of a fuse and its rating within an equilateral triangle is intended to convey to the service personnel the following fuse replacement caution notice: CAUTION: FOR CONTINUED PROTECTION AGAINST RISK OF FIRE, REPLACE ALL FUSES WITH THE SAME TYPE AND RATING AS MARKED NEAR EACH FUSE.
SERVICE INFORMATION
While servicing, use an isolation transformer for protection from AC line shock. After the original service problem has been corrected, make a check of the following:
1-4
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
SERVICING PRECAUTIONS
CAUTION: Before servicing the DVB-T/HDD/DVD RECORDER covered by this service data and its supplements and addends, read and follow the SAFETY PRECAUTIONS. NOTE: if unforeseen circumstances create conflict between the following servicing precautions and any of the safety precautions in this publication, always follow the safety precautions. Remember Safety First: General Servicing Precautions 1. Always unplug the DVB-T/HDD/DVD RECORDER AC power cord from the AC power source before: (1) Removing or reinstalling any component, circuit board, module, or any other assembly. (2) Disconnecting or reconnecting any internal electrical plug or other electrical connection. (3) Connecting a test substitute in parallel with an electrolytic capacitor. Caution: A wrong part substitution or incorrect polarity installation of electrolytic capacitors may result in an explosion hazard. 2. Do not spray chemicals on or near this DVB-T/HDD/DVD RECORDER or any of its assemblies. 3. Unless specified otherwise in this service data, clean electrical contacts by applying an appropriate contact cleaning solution to the contacts with a pipe cleaner, cotton-tipped swab, or comparable soft applicator. Unless specified otherwise in this service data, lubrication of contacts is not required. 4. Do not defeat any plug/socket B+ voltage interlocks with which instruments covered by this service manual might be equipped. 5. Do not apply AC power to this DVB-T/HDD/DVD RECORDER and/or any of its electrical assemblies unless all solid state device heat sinks are correctly installed. 6. Always connect the test instrument ground lead to an appropriate ground before connecting the test instrument positive lead. Always remove the test instrument ground lead last. Insulation Checking Procedure Disconnect the attachment plug from the AC outlet and turn the power on. Connect an insulation resistance meter (500V) to the blades of the attachment plug. The insulation resistance between each blade of the attachment plug and accessible conductive parts (Note 1) should be more than 1Mohm. Note 1: Accessible Conductive Parts include Metal panels, Input terminals, Earphone jacks,etc. Electrostatically Sensitive (ES) Devices Some semiconductor (solid state) devices can be damaged easily by static electricity. Such components commonly are called Electrostatically Sensitive (ES) Devices. Examples of typical ES devices are integrated circuits and some field effect transistors and semiconductor chip components. The following techniques should be used to help reduce the incidence of component damage caused by static electricity. 1. Immediately before handling any semiconductor component or semiconductor-equipped assembly, drain off any electrostatic charge on your body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging wrist strap device, which should be removed for potential shock reasons prior to applying power to the unit under test. 2. After removing an electrical assembly equipped with ES devices, place the assembly on a conductive surface such as aluminum foil, to prevent electrostatic charge buildup or exposure of the assembly. 3. Use only a grounded-tip soldering iron to solder or unsolder ES devices. 4. Use only an anti-static solder removal device. Some solder removal devices not classified as anti-static can generate electrical charges sufficient to damage ES devices. 5. Do not use freon-propelled chemicals. These can generate an electrical charge sufficient to damage ES devices. 6. Do not remove a replacement ES device from its protective package until immediately before you are ready to install it. (Most replacement ES devices are packaged with leads electrically shorted together by conductive foam, aluminum foil, or comparable conductive material). 7. Immediately before removing the protective material from the leads of a replacement ES device, touch the protective material to the chassis or circuit assembly into which the device will be installed. Caution: Be sure no power is applied to the chassis or circuit, and observe all other safety precautions. 8. Minimize bodily motions when handling unpackaged replacement ES devices. (Normally harmless motion such as the brushing together of your clothes fabric or the lifting of your foot from a carpeted floor can generate static electricity sufficient to damage an ES device.)
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
1-5
OP1 : DA/DA 00000000 OP2 : 30/30 00000000 071102A OP3 : D3/D3 00000000 OP4 : 60/60 00000000 OP5 : 0E/0E 00000000 OP6 : AE/AE 00000000 OP7 : 47/47 00000000 Write : OK OP8 : 02/02 00000000 E x i t : MP OP9 : 0D/0D 00000000 Move : < > OPA : 00/00 00000000 E d i t : 5 Checksum of Option : 0x1105 DVD read time : --- second CD read time : 10 sec -- > OK 2. To MOVE from OP1 (Option 1) to another option, press 3. To CHANGE the option code, press button on the Remote Control.
4. To APPLY the option Code, after change the option press OK/Enter button on Remote Control. 5. To INITIALIZE the system, press CLEAR button on the R/C together with OPEN/CLOSE on the Front Panel about 5 sec. Note : This process will only clear the mapping channel and not delete data on HDD. 6. To exit from the option Code menu without Initialize the system, just turn off the power and then turn on again.
1-6
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Take the disc and turn off the power. 8) Turn on the power, and check the Main S/W Version.
4) If CD Data inspection OK, there will be message on OSD as below : 4) If CD Data inspection OK, there will be message on OSD as below :
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
1-7
5) Press PLAY button to update S/W and another button to cancel. 6) Loader S/W under updated. Do not turn off the power during updating process...!
If updating succeed, after completed there will be message : 4) Press button number 7 - 8 - 8 - 9 on the Remocon The picture on TV screen as below :
Power will be automatically turn off. 7) Turn on the power and check the Loader S/W Version.
1-8
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
SPECIFICATIONS
GENERAL Power requirements Power consumption Dimensions (approx.) Net weight (approx.) Operating temperature Operating humidity Television system Recording format RECORDING Recording format Recordable media Recordable time AC 200 ~ 240V, 50/60Hz 30W 430 X 49 X 275mm (w x h x d) without foot 4kg 5C to 35C 5% to 90% Analog: PAL I, B/G, I/I, SECAM D/K, K1, SECAM L color system Digital: DVB-T standard compliant PAL
DVD Video Recording, DVD-VIDEO HDD (320GB), DVD-ReWritable, DVD-Recordable, DVD+ReWritable, DVD+Recordable, DVD+Recordable (Double Layer), DVD-RAM DVD (4.7GB) : Approx. 1hour (XP mode), 2hours (SP mode), 4hours (LP mode), 6hours (EP mode), 11hours (MLP mode) DVD+R DL (8.5GB) : Approx. 2.9hour (XP mode), 3.8hours (SP mode), 7.3hours (LP mode), 9.1hours (EP mode) HDD (320GB, MPEG2 Recording) : Approx. 85hours (XP mode), 129hours (SP mode), 323hours (LP mode), 456hours (EP mode), 1081hours (MLP mode) 27MHz MPEG2 or MPEG4 (HDD only) 48kHz Dolby Digital
Video recording format Sampling frequency Compression format Audio recording format Sampling frequency Compression format PLAYBACK Frequency response Signal-to-noise ratio Harmonic distortion Dynamic range INPUTS ANTENNA IN VIDEO IN AUDIO IN DV IN USB IN PCMCIA CARD IN OUTPUTS S-VIDEO OUT COMPONENT VIDEO OUT HDMI Audio Audio Audio video/audio output output (digital audio) output (optical audio) output (analog audio)
DVD (PCM 48kHz) : 8Hz to 22kHz, CD : 8Hz to 20kHz DVD (PCM 96kHz) : 8Hz to 44kHz More than 100dB (AUDIO OUT connector) Less than 0.008% (AUDIO OUT connector) More than 95dB (AUDIO OUT connector)
Antenna input, 75ohms 1.0Vp-p 75ohms, sync negative, RCA jack x 1 / SCART x 2 2.0Vrms more than 47kohms, RCA jack (L, R) x 1 / SCART x 2 4pin (IEEE 1394 standard) 4pin (USB 1.1 standard) 68pin (Common interface): RH3xxC only
(Y) 1.0V (p-p), 75, sync negative, Mini DIN 4-pin x 1 (C) 0.3V (p-p), 75 (Y) 1.0V (p-p), 75, sync negative, RCA jack x 1 (Pb)/(Pr) 0.7V (p-p), 75, RCA jack x 2 19pin (HDMI standard, Type A) 0.5V (p-p), 75, RCA jack x 1 3V(p-p), Optical connector x 1 2.0Vrms (1kHz, 0dB), 600, RCA jack (L, R) x 1 / SCART x 2 1-9
LGE Internal Use Only
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
MEMO
1-10
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
2-1
A54 A26
CABLE10 462 463 CABLE7 468 462 463 261
E
CABLE11 468
104
C HDMI BOARD
253
A54A
F
468
I
101 468 462 463
A
468 410
CABLE6
468
261
A47 A52
CABLE13 471
I/O BOARD
SMPS BOARD H
C A I
320 468 465 470
CABLE5
B
B MAIN BOARD D E
468 468
A46
465
EXPLODED VIEWS
2-2
COMMON BOARD
CABLE12 264
465
H
452
KEY BOARD
CABLE1
A43A
261
300
285
280
TIMER BOARD
A44
286
274
OPTIONAL PARTS
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
281
RS-06A(DR-11H)
1030
A001
1033 1032
1434
1038 1026 1433 1013 1016 1015 1012 1011 1020 1432 1017 1041 1432 1432 1036
DR-11H : PT ONLY
1019 1018 A005 1044 1042 1043 1045
A46A
Main C.B.A
1018
1046 1047
OPTIONAL PART
1439
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
2-3
OPTIONAL PARTS
810 Accessory Assembly 806 RCA Plug(Black) 808 Battery 821 SCART Cable
802 Box
2-4
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
SECTION 3 ELECTRICAL
CONTENTS
ELECTRICAL TROUBLESHOOTING GUIDE...........3-2
1. POWER SUPPLY ON SMPS BOARD .............3-2 2. POWER SUPPLY ON I/O BOARD ...................3-4 3. SYSTEM CIRCUIT PART ..................................3-8 4. DISC NOT RECOGNIZED.................................3-8 5. WHEN PLAYING DISC, NO AUDIO OUTPUT ..........................................3-9 6. NO OPTICAL/DIGITAL OUTPUT....................3-10 7. NO TUNER AUDIO OUTPUT..........................3-11 8. NO EXTERNAL AUDIO INPUT.......................3-12 9. NO RGB / COMPONENT VIDEO SIGNAL WHEN PLAY DISC...........................................3-13 10. NO COMPOSITE / S-VIDEO SIGNAL WHEN PLAY DISC...........................................3-14 11. NO TV, EXTERNAL INPUT VIDEO SIGNAL ................................................3-15 12. NO DV (IEEE1394) INPUT (VIDEO/AUDIO) SIGNAL ....................3-16 13. NO DVB_T AUDIO / VIDEO OUTPUT ...........3-17 4. POWER MAIN BOARD BLOCK DIAGRAM ..3-33 5. I/O BOARD BLOCK DIAGRAM ......................3-34 6. VIDEO INPUT BLOCK DIAGRAM..................3-35 7. VIDEO OUTPUT BLOCK DIAGRAM..............3-36 8. AUDIO INPUT BLOCK DIAGRAM..................3-37 9. AUDIO OUTPUT BLOCK DIAGRAM..............3-38 10. POWER I/O BLOCK DIAGRAM......................3-39 11. FLD TIMER BOARD BLOCK DIAGRAM........3-40 12. POWER TIMER AND CI BLOCK DIAGRAM.......................................3-41
CIRCUIT DIAGRAMS...........................................3-43
1. SMPS CIRCUIT DIAGRAM .............................3-43 2. MPEG CIRCUIT DIAGRAM.............................3-45 3. FLASH / DDR CIRCUIT DIAGRAM ................3-47 4. IEEE1394 CIRCUIT DIAGRAM.......................3-49 5. ATAPI / HDMI / USB CIRCUIT DIAGRAM......3-51 6. I/O -COM CIRCUIT DIAGRAM .....................3-53 7. SCART / RCA CIRCUIT DIAGRAM................3-55 8. TUNER / DECODER CIRCUIT DIAGRAM ....3-57 9. LDO CIRCUIT DIAGRAM ................................3-59 10. COMMON INTERFACE BOARD CIRCUIT DIAGRAM .........................................3-61 11. HDMI DAUGHTER BOARD CIRCUIT DIAGRAM .........................................3-63 12. TIMER CIRCUIT DIAGRAM (8 & 9 TOOLS)..3-65 13. KEY CIRCUIT DIAGRAM (8 & 9 TOOLS)......3-67 CIRCUIT VOLTAGE CHART ....................3-69
WAVEFORMS..........................................................3-18
1. SYSTEM BLOCK .............................................3-18 2. VIDEO BLOCK (COLOR BAR INPUT)...........3-21 3. AUDIO BLOCK (1kHz SINEWAVE INPUT)....3-22 4. SERIAL INTERFACE BLOCK (BETWEEN MAIN & I/O)..................................3-24 5. TUNER BLOCK ................................................3-25 7. HDMI BLOCK ...................................................3-26
BLOCK DIAGRAMS.............................................3-30
1. OVERALL BLOCK DIAGRAM.........................3-30 2. SMPS BOARD BLOCK DIAGRAM.................3-31 3. MAIN BOARD BLOCK DIAGRAM..................3-32
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
3-1
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
3-2
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
NO
NO
NO
NO
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
3-3
NO
NO
NO
NO
NO
3-4
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
No 5.0VD
YES
NO
NO
No 3.3V
YES
NO
NO
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
3-5
No 2.5V
YES
NO
NO
No 1.8V
YES
NO
No SW_5.3VA
YES
NO
NO
3-6
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
No SW_FD(+)
YES
NO
NO
NO
NO
No 1.25V
YES
NO
NO
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
3-7
IC1198 : . (/RST_HOST)
YES
NO
Replace X1101
IC1201 Pin26 :
NO
YES
R1173, R1174 :
NO
IC1101 defect
NO
Check SMPS
NO
Check loader
3-8
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
NO
NO
IC1101 defect
YES YES
NO
YES YES
NO
Replace IC803
YES
Replace IC802
NO
Replace IC801
YES
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
3-9
6. NO OPTICAL/DIGITAL OUTPUT
R1107 : . Is there a signal?
YES
YES
3-10
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
NO
Check IC801 Pin14 (12V) Pin30 (5, 3V) Pin31, 32 (SCL, SDA) : .
NO
Replace IC801
YES
IC901 Pin 98, 99, 100, 95 (Ain_D0, AIN_SCLK, AIN_FSYNC, AIN_MCLK) : Is there a signal?
NO
NO
YES
NO
Change X901
YES
NO
YES
IC901 defect
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
3-11
YES
NO
YES
Replace IC801
YES
NO
NO
NO
Change X901
NO
IC901 Defect
3-12
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
NO
Check IC801 Pin14 (12V) Pin30 (5, 3V) Pin31, 32 (SCL, SDA) : .
YES
YES
Replace IC801
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
3-13
YES
NO
NO
Replace IC801
YES YES
3-14
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
NO
NO
YES
NO
Check IC801 Pin14 (12V) Pin30 (5, 3V) Pin31, 32 (SCL, SDA) : .
YES
YES
Replace IC801
NO
NO
NO
Change X901
NO
DV-mode switching?
YES
NO
High
NO
NO
Check DV cable
NO
Replace IC1401
YES
IC1101 defect
3-16
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
NO
YES
NO
YES
Replace TU601
NO
Replace IC2000
YES
YES
Replace IC1101
Replace IC2001
Replace IC2002
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
3-17
WAVEFORMS
1. SYSTEM BLOCK
IC1101 1
1
Frequency=13.5MHz
2
Frequency=198MHz
3-18
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4 5 6 5 4
< DDR RAS & CAS >
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
3-19
IC1101
3-20
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
IC1101 1 2 3
3 6 5
< C_OUT >
1 2 3 4
1 2
3 4
IC1101
6 7
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3-23
1 2
3-24
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
5. TUNER BLOCK
1 IC901 1
< SIF >
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
3-25
7. HDMI BLOCK
1 2
40pin
Coaxial
1. WIRING DIAGRAM 1
16pin 16pin
SMPS
4pin 50pin
7 5
I/O BOARD
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4
4pin 24pin 4pin
6
Junction Bd Junction Bd
4pin
40pin 40pin
30pin 30pin
50pin
WIRING DIAGRAMS
3-27
MAIN BOARD
2
12pin 12pin
24pin 40pin
40pin
LOADER
40pin
HDD
30pin
Super-Multi
3
CI Option Board
USB Timer DV V_IN // A_IN
1
30pin
2pin
Sub timer
2. WIRING DIAGRAM 2
8 5 4
3-28
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
8
Option
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
3-29
RF IN
I/O Board
CI Control CI Control CXD2099 CXD2099
VOUT_CVBS_EU1 VOUT_CVBS_EU2 VOUT_Y/C VOUT_Y/Pb/Pr VOUT_R/G/B E1_A_OUT_L/R E2_A_OUT_L/R
TS_VAL TS_CLK TS_SYNC TS_D[7:0]
CI Board
CAM CAM Module Module
I/O Board
TU_L/R_OUT
SCART2 (AV1) AIN_D0 AOUT_D0 VIN_D[7:0] SPDIF_OUT DAC_A PCM1780 L/R_OUT DAC NJM 4580
SW_V_OUT
NIM TUNER
TU_V_OUT
V_In
A_In_L/R
MM1763 MM1763 Video Video Buffer Buffer & & AV Switch AV Switch
V_In A_In_L/R
SW_A_OUT
L/R
F_CVBS_IN
F_A_L/R_IN
DMN8673
U-COM U-COM
HD[0:15] SPI I/O Interface
BLOCK DIAGRAMS
3-30
uPD78F uPD78F 0535GK 0535GK
D +/HA[1:5],HA22 USB_PWR_EN USB_OSC USB TPS2051B
SIO_SPI_CS0 SIO_SPI_CLK SIO_SPI_MISO SIO_SPI_MOSI
Latch 74LVT16373
HA[6:21]
FLASH
8MByte
USB In
USB_VCC
DDR SDRAM DDR SDRAM DDR SDRAM DDR SDRAM 64MByte 64MByte
64MByte 64MByte
MAIN Board
LOADER
DV In
TPB+/-
TIMER Board
ATAPI1_DATA[0:15] ATAPI1_.....
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
ATAPI2_DATA[0:15] ATAPI2_....
HDD
D101 RECTIFIER & SMOOTHING BLOCK D121,FR121,C120,R181, R191,R131,ZD121 P1701 FD(+) FD(-) -29V 14VA 3.8VA 33VA 5.3VA PWR CTL 5V(HDD) 12V(HDD) C103 SNUBER BLOCK D101,R104, C105,C106 5V RECTIFIER & SMOOTHING BLOCK D125,C121 RECTIFIER & SMOOTHING BLOCK D122,C122,R122
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
TH01
T101
3.8V RECTIFIER & SMOOTHING BLOCK D127,C124,L124,C134 33V RECTIFIER & SMOOTHING BLOCK D126,C126,R147,ZD122
3-31
PHOTO COUPLER IC102 ERROR AMP IC103 FEEDBACK BLOCK R141,R142, R143,R144, R145,R146, C143
FUSE F101
Y CAP C112
BR BL (BK)(WH)
Y CAP C113
E5_SDRAM_DQS[1:0] HA[5:1][23:22] /E5_LWEn /E5_OE /E5_CS0 /E5_CS0 HD[15:0] HD[15:0] HD[15:0] 74LVT16373 HA[21:6] /E5_LWEn /E5_OE HA[5:1][23:22]
IC1202
MX29LV640M TTC-90
HD[15:0] E5_ALE /RST_Flash IC701 MICOM USB_PWR_EN USB_OCS /RST_HOST
LOADER INTERFACE
HDD INTERFACE
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
GPIO3 VOUT_CLK VO_D[15:0] SCL SDA AOUT_IEC958 AOUT_MCLK VIDEO_INT UART2_CTS UART2_RTS UART2_TX UART2_RX
PC DEBUGGING UART
HYB25D512 160CE-5
E5_SDRAM_DQ[15:0]
DDR SDRAM
E5_SDRAM_CLKE
E5_SDRAM_BA[1:0]
VREF
IC1204
G2995
VREF
E5_SDRAM_DQS[3:2]
IC1501
TPS2051B
5VD USB_VCC
Timer BOARD
IC1203
USB_D+ PHY_LINKON PHY_LPS TPA+ TPATPB+ TPB/RST_1394
USB_D-
USB JACK
HYB25D512 160CE-5
E5_SDRAM_CLKE
I/O BOARD
/RST_PHILIPS
E5_SDRAM_BA[1:0] GPIO5
3-32
/RST_CxD I2S_SCL I2S_SDA /CI_EN CI_HIRQ TS_D_CLK TS_D_DATA TS_D_SYNC TS_D_VAL TS_VAL TS_SYNC TS_DATA TS_D_CLK /RST_TUNER /RST_HDMI
IC901
SAA7138 AV DECODER
PML04
CI Module
ATAPI1_DIOW_L
ATAPI1_DIOR_L
ATAPI1_IORDY
CI Card
ATAPI1_DMAACK_L
ATAPI1_INTRQ
PMD05
ATAPI2_D[15:0]
ATAPI2_DIOW_L
ATAPI2_DIOR_L
ATAPI2_IORDY ATAPI2_DMAACK_L
PMH06
CEC
ATAPI2_INTRQ
IC701
NEC MICOM
PMX03
74HCT125 74HCT125
IC703 IC703
3.3V
V33_USB
V33_PHY_D
3.3VA
V25_SSTL2
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
DAC 3.3V
V33_E5_VPAD
1.25V
V33_E5_AVDD
IC1101 DMN8673
HDMI IF
+5V_STB +5V_ST
V18_HDMI
1.8V
3-33
HDD IF LOADER IF USB IF IC1203 SDRAM IC1202 SDRAM
VREF
V33_E5_VDDREF
E5_1V25
E5_AVDD
IC1204 G2995
I2C I/O
IC702 S-24CS16A011
EEPROM
1W_H
PWR_CTL_H
SCL / SDA
5.3VA
12VA
FD(+)
SPI_I/O to Main
SLEEP_OFF
SYNC_DET_H
FRONT.AV IN
F_A_L/R_IN F_CVBS_IN
FD(+) FD(-)
IC901
SAA7138 AV DECODER
SW_A_OUT_L/R SW_V_OUT EU2_V_IN / S.VIDEO_Y EU2_A_IN_L/R EU2_V_OUT EU2_A_OUT_L/R EU1_V_IN EU1_A_IN_L/R EU1_V_OUT EU1_A_OUT_L/R R_Pr_OUT R_SCART_OUT
-29VA
5.3VA
TS_DATA[7:0]
SPI
TS_VAL
TS_CLK
TS_SYNC
HOST_DATA_IN
HOST_CLK_IN
HOST_ENA_L
TUNER_RESET_L
TS_DATA[0]
HDMI_CEC
VIN_VSYNC VIN_CLK
VIN_D[7:0]
VIN_INT AIN_DO
AOUT_FSYNC AOUT_SCLK
AOUT_D0 AOUT_MCLK
MICOM
R_OUT G_OUT B_OUT CVBS_OUT Y_OUT C_OUT
G_Py_OUT B_Pb_OUT
G_SCART_OUT B_SCART_OUT
IC801 IC801 MM1763 MM1763 AV Switch AV Switch + + Video Buffer Video Buffer
COMPONENT
Pb_RCA_OUT Y_RCA_OUT Pr_RCA_OUT C_SEPA_OUT Y_SEPA_OUT SPDIF_OUT
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
MAIN BOARD
SCART 1
3-34
CI Card Board IC803 IC803 PCM1780 PCM1780 AUDIO DAC AUDIO DAC
3.3VA
5.0VD CI_5V
SCART 2 SCART 2
14VA
TIMER BOARD
A_OUT_L/R
REAR.AUDIO
A_OUT_L/R
C F
I2C I/O
Z-MUTE_CTL_H TU_SECAM_H SYS_MUTE_L Z_MUTE_L/R SPI AFT TUNER_SEL
SW_FD(+)
SW_5.3VA
IC802
RF In
TU_V_IN
EU1_V_IN
TS_DATA[7:0]
TS_DATA[0]
SW_V_IOUT
PVC01 CN2000
CI BOARD
IC2000 CXD2099
PVM02 PMV02
TS_DATA[0] VIN_D[7:0] VIN_CLK
TIMER
PMC01
CN1
CN2002
PMT03
I/O
HDD
MPEG ENC/DEC
MAIN
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
3-35
ATAPI I/F
R / G / B CVBS
CVBS
JK802
MAIN
IC801 MM1763
Y
I/O
Y / C
Y / Pb / Pr
MPEG
Y/G Pb / B Pr / R
VIDEO BUFFER
C
PMV01
PVM01
V.ENCODER
RGB_SEL_OUT
3-36
MICOM MI
ATAPI I/F
DVD DRIVER
HDD
CVBS
CVBS G / B / R
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
75 ohm
SCART(AV2)
SCART/RCA(AV1)
RF In
CI BOARD
PVC01 CN2000 CN2002 PMC01 IC2000 CXD2099
TS_DATA[7:0] TS_DATA[0]
MAIN
TS_DATA[0]
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
MPEG ENC/DEC
PVM02 PMV02
AI_FSYNC AI_SCLK AI_DO
AI_MCLK
I2S OUT
F_ A_ L / R_IN
SECAM_AM
3-37
PVM01
PMV01
TU_ L / R OUT
TIMER
F_L/R_IN
I/O
L / R IN L / R IN
DVD DRIVER
HDD
AV3 In
SCART(AV2)
SCART/ RCA(AV1)
JK803
JK802
Coaxial RCA L /R Out
MAIN
SPDIF_OUT
IEC60958(S/PDIF)
I/O
Optical
MICOM
Z_MUTE L/R SYS_MUTE
AO_IEC958
AO_MCLK
MPEG ENC/DEC
IC803 AUDIO DAC PCM1780 IC802 OPAMP
Filter
AO_FSYNC
AO_SCLK
3-38
AO_DO
A_OUT L/R
DVD DRIVER
HDD
L / R out
L / R out
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
SCART(AV2)
SCART/RCA(AV1)
IC703 IC703 74HCT125 74HCT125 IC803 IC803 PCM1780 PCM1780 IC901 IC901 A/V DECODER A/V DECODER SAA7138 SAA7138 TU_3.3V TUNER TUNER TDFV-G155D TDFV-G155D Pull Up Pull Up for I2S Main for I2S Main IC802 OP AMP IC802 OP AMP NJM4580 NJM4580 JK803 JK803 Optical Drive Optical Drive Audio & Comp. Audio & Comp. Mute Block Mute Block SYS_5.3VA
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
3.3VA
3-39
Pull Up Pull Up for I2C & Key for I2C & Key
SW_5.3VA
1W_H PWR_CTL_H
5.3VA
5.0VD 3.8VA
PWR_CTL_H
3.3V
1.8V
14VA
SWITCH Block Q158 IC602 KIA78R05
SW_12VG FD(+)
1W_H SWITCH Block Q163,Q153
1W_H
IC152 KIA278R33
IC154 LD1117-1.8
SW_FD(+)
PWR_CTL_H IC153 DC-DC Block
1.25V
PWR_CTL_H IC151 KIA78R25
2.5V
3.3VA
I/O
KEY_RTN 0 / 1
MAIN
LED DVD KEY
LED1 LED1 P01~P11
TIMER
LED LED HDD HDD
KEY_RTN 0 / 1
PVM02
VSTB VCLK TIMER_OUT
PMV02
IC701 MICOM
FLD_ENA
FLD_CLK
FLD_DATA
-29VA
SW_5.3VA
VFD DISPLAY
FD(-)
SW_FD(+)
PMT03
PMV01
PVM01
3-40
CN1
5.3VA
REMOCON Receiver
F_CVBS_IN
F_A_L/R
FRONT AV JACK
TP_A+ / A -
IC1401
TSB41AB1
TP_B+ / BUSB_D+ / D-
DV In JACK
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
USB_VCC
USB JACK
TIMER
-29VA FD( - ) SW_FD(+)
SW_5.3VA
5.3VA
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
IC901 IC901 PT6315 PT6315 DIG901 DIG901 VFD Digitron VFD Digitron LED901 LED901 LED902 LED902
3-41
CI
5VD_CI VCC_CI
IC2002 IC2002 TPS2011 TPS2011 CN2001 CN2001 PCMCIA CARD PCMCIA CARD
3.3V
3V3D_CI
MEMO
3-42
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
IMPORTANT SAFETY
NOTE : FOR EASY IDENTIFICATION. THIS CIRCUIT DIAGRAM MAY OCCASIONALLY DIFFER FROM THE ACTUAL CIRCUIT USED. THIS WAY, IMPLEMENTATION OF THE LATEST SAFETY AND PERFORMANCE IMPROVEMENT CHANGES INTO THE SET IS NOT DELAYED UNTIL THE NEW SERVICE LITERATURE IS PRINTED. 1. Shaded( ) parts are critical for safety. Replace only with specified part number. 2. Voltages are DC-measured with a digital voltmeter during Play mode.
CIRCUIT DIAGRAMS
1. SMPS CIRCUIT DIAGRAM
WHEN SERVICING THIS CHASSIS, UNDER NO CIRCUMSTANCES SHOULD THE ORIGINAL DESIGN BE MODIFIED OR ALTERED WITHOUT PERMISSION FROM THE LG CORPORATION. ALL COMPONENTS SHOULD BE REPLACED ONLY WITH TYPES IDENTICAL TO THOSE IN THE ORIGINAL CIRCUIT. SPECIAL COMPONENTS ARE SHADED ON THE SCHEMATIC
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
3-43
3-44
3-45
3-46
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
3-47
3-48
3-49
3-50
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
3-51
3-52
3-53
3-54
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
3-55
3-56
3-57
3-58
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
3-59
3-60
3-61
3-62
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
3-63
3-64
3-65
3-66
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
3-67
3-68
INFORMATION : 1. Voltage Check using RH300 DV1 2. EE Mode : Check with Signal C2 3. Playback Mode : Check with DVD TEST DISC KDV-N Chapter 2 4. Record Mode : Check with recording signal C2 using DVD -RW Brand : Mitsubishi, VR Mode
3-69
3-70
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
INFORMATION : 1. Voltage Check using RH300 DV1 2. EE Mode : Check with Signal C2 3. Playback Mode : Check with DVD TEST DISC KDV-N Chapter 2 4. Record Mode : Check with recording signal C2 using DVD -RW Brand : Mitsubishi, VR Mode
PIN NO. 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 1 2 3 4 5 6 7 PIN NAME X2 (10 MHz) X1 (10 MHz) REGC VSS EVSS VDD EVDD I2C_CLK I2C_DATA STANBY_LED CEC_TX CEC_RX AUDIO_SEL COMP_MUTE_H AUDIO_MUTE_L VIDEO_MUTE_L Z_MUTE_CTL_L GREEN_PWR_H TIMER_H POWER_CTL_H DAV_IN MOD_ON_H D_TU_H SYNC_D_H RGB_CONT RGB_OUT TU_SE_VL_H TU_SECAM_H REMOCON_IN NC ITT_RESET_L FLD_ENA_L TXD RXD FLD_DATA_OUT FLD_DATA_IN FLD_CLK AVREF AVSS KEY_RTN_0 KEY_RTN_1 AFT_IN C+_DET_H RGB_IN_H NC NC NC DIG_LINK_TV_H HOST_CLK_IN HOST_DATA_IN HOST_DATA_OUT HOST_ENA_L HOST_RESET_L OPTION_RTN1 NT/PAL OPTION E0 E1 E2 GND I2C_DATA I2C_CLK WC EE MODE 3.1V 2.58V 2.52V 0V 0V 5.2V 5.2V 4.95V 4.95V 0.6V 3.04V 5.24V 0.01V 5.2V 5.18V 5.2V 5.17V 0.09V 5.19V 5.17V 0.6V 0.02V 0.09V 5.03V 0.02V 0.02V 0.02V 0.02V 4.88V 0.02V 0.02V 4.91V 5.19V 0.02V 0.75V 0V 5.14V 5.24V 0V 5.24V 5.24V 3.1V 0V 0.09V 5.03V 0V 4.42V 5.2V 5.03V 0V 0.43V 5.19V 5.14V 0.52V 0V 0V 0V 0V 0V 4.95V 4.94V 0V PB MODE 3.22V 2.61V 2.52V 0V 0V 5.2V 5.2V 4.94V 4.94V 0.61V 2.98V 5.24V 0.01V 5.2V 5.17V 5.19V 5.17V 0.1V 5.19V 5.12V 0.46V 0.02V 0.09V 5.03V 0.02V 0.02V 0.02V 0.02V 4.88V 0.02V 0.02V 4.97V 5.19V 0.02V 0.75V 0V 5.14V 5.24V 0V 5.24V 5.24V 3.1V 0.01V 0.09V 5.03V 0.01V 4.42V 5.19V 5.03V 0.01V 0.43V 5.19V 5.14V 0.42V 0V 0V 0V 0V 0V 4.95V 4.94V 0V REC MODE 3.18V 2.61V 2.52V 0V 0V 5.2V 5.2V 4.95V 4.95V 0.62V 3V 5.23V 0.01V 5.19V 5.17V 5.19V 5.17V 0.09V 5.19V 5.12V 0.51V 0.02V 0.09V 5.03V 0.02V 0.02V 0.02V 0.02V 4.88V 0.02V 0.02V 4.97V 5.19V 0.02V 0.74V 0V 5.13V 5.24V 0V 5.23V 5.23V 3.1V 0.01V 0.09V 5.03V 0V 4.42V 5.19V 5.03V 0V 0.43V 5.19V 5.14V 0.55V 0V 0V 0V 0V 0V 4.95V 4.94V 0V PIN NO. 8 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 1 2 PIN NAME VCC GND HOST_CLK_IN BUFFER_DATA_IN GND HOST_DATA_IN BUFFER_CLK_IN GND CEC_RX CEC_TX GND BUFFER_ENA_L HOST_ENA_L GND VCC (5.3VA) EE MODE 5.24V 0V 3.05V 5.03V 0V 0.02V 0.01V 0V 5.24V 3.04V 0V 5.24V 3.18V 0V 5.24V PB MODE 5.24V 0V 3.05V 5.03V 0V 0.02V 0.01V 0V 5.24V 2.99V 0V 5.24V 3.18V 0V 5.24V REC MODE 5.24V 0V 3.04V 5.02V 0V 0.02V 0.01V 0V 5.24V 3.04V 0V 5.24V 3.18V 0V 5.24V 1.07V 0.01V 0.01V 1.07V 7.06V 7.06V 1.6V 7.08V 7.08V 1.07V 7.06V 7.06V 2.45V 12.15V 1.51V 0V 1.06V 2.46V 1.07V 9.89V 2.45V 2.45V 0V 2.52V 2.52V 1.11V 1.09V 2V 2.52V 5.16V 4.93V 4.93V 0V 6.48V 6.48V 2.02V 6.48V 6.48V 2.02V 6.47V 6.47V 1.61V 6.09V 6.09V PIN NO. 3 4 5 6 7 8 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 PIN NAME VCC1 GND VCC2 DAC_A_R A_OUT_R VCC (12V) Z_MUTE_L E5_SPI_CS E5_SPI_CLK E5_SPI_MOSI AOUT_MCLK AOUT_DATA AOUT_SCLK AOUT_FSYNC NC NC VCC GND VCOM AOUT_R AOUT_L Z_MUTE_R FSW (NC) AVC (NC) VDDA (SADC) (1.8V) VSSA (PLL) VDDA (PLL) VSSA (AVI1) VDDA (AVI1) EU2_V_IN (AI11) AI12 AI13 AI10 VSSA(AVI2) VDDA (AVI2) R_SCART_IN (AI21) AI22 F_CVBS_IN (AI23) AI20 VDDA (1.8V) RES_REF_V AOUT1 (NC) VDDA (AOUT) AOUT2 (NC) VSSA VSSA (OUT) VSSA (AVI3) VDDA (AVI3) G_SCAR_IN (AI31) AI32 SW_V_OUT(AI33) AI30 VSSA (AVI4) VDDA (AVI4) SSIF SSIFD B_SCART_IN (AI41) AI42 AI43 AI40 EE MODE 6.1V 0V 6.1V 6.1V 6.1V 12.2V 4.95 3.26 3.13 0.02 1.65 1.63 1.64 1.63 0.00 0.00 4.95 0.00 2.47 2.42 2.42 4.95 0.47V 0.47V 1.78V 0.02V 3.18V 0V 3.17V 0.58V 0.58V 0.58V 1V 0V 3.17V 0.56V 0.56V 0.56V 1V 1.73V 0V 1.91V 3.17V 0V 0V 0V 0V 3.17V 0.58V 0.58V 0.96V 1V 0V 3.18V 1.01V 1V 0.58V 0.58V 0.58V 1V PB MODE 6.1V 0V 6.1V 6.1V 6.1V 12.2V 4.95 3.26 3.12 0.02 1.66 1.60 1.63 1.63 0.00 0.00 4.95 0.00 2.49 2.42 2.42 4.95 0.48V 0.62V 1.78V 0.02V 3.18V 0V 3.17V 0.58V 0.58V 0.58V 1V 0V 3.17V 0.56V 0.56V 0.56V 1V 1.78V 0V 1.91V 3.17V 0V 0V 0V 0V 3.17V 0.58V 0.58V 0.96V 1V 0V 3.17V 1.01V 1V 0.58V 0.58V 0.58V 1V REC MODE 6.09V 0V 6.09V 6.09V 6.09V 12.19V 4.95 3.18 3.07 0.02 1.62 1.60 1.61 1.60 0.00 0.00 4.95 0.00 2.49 2.42 2.42 4.95 0.62V 0.62V 1.78V 0.02V 3.18V 0V 3.17V 0.58V 0.58V 0.58V 1V 0V 3.16V 0.56V 0.56V 0.56V 1V 1.78V 0V 1.91V 3.16V 0V 0V 0V 0V 3.16V 0.58V 0.58V 0.96V 1V 0V 3.16V 1.01V 1V 0.58V 0.58V 0.58V 1V PIN NO. 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 PIN NAME TRST_PDR_N (GND) TCX (NC) TMS (NC) TDO TDI SCL SDA SCL_SILENT SDA_SILENT VDDD (CORE) VSSD (CORE) INT_A /RST_SAA7138 (CE) VSSA (OSC) XTAL1 XTAL0 VDDA (OSC) VIN_D2 VIN_D3 VIN_D4 VDDD (IO) VSSD (IO) VIN_D5 VIN_D6 VIN_D7 VIN_D8 VIND9 (ITU12) ITU11 (TP902) VDDD (IO) VSSD (IO) VDDD (CORE) VSSD (CORE) ITU10 (TP901) V_CLK ITU9 (NC) ITU8 (NC) ITU7 (NC) ITU6 (NC) VDD (IO) VSSD(IO) ITU5 (NC) ITU4 (NC) ITU3 (NC) ITU2 (NC) ITU1 (NC) ITU0 (NC) VDDD(IO) VSSD (IO) GPIO0 (NC) GPIO1 (NC) GPIO2 (NC) VDDD (CORE) VSSD (CORE) GPIO3 (NC) GPIO4 (NC) GPIO5 (NC) AIN_MCLKOUT VDDD (IO) VSSD (IO) AIN_FSYNC AIN_SCLK AIN_D0 A_MUTE (NC) EE MODE 0V 1.56V 3.2V 1.1V 3.2V 2.44V 0.18V 0.42V 0.42V 1.77V 0V 0.04V 3.21V 0V 0.86V 0.8V 1.8V 0.02V 0.02V 0.02V 3.28V 0V 0.02V 0.02V 0.02V 0.02V 0.02V 3.28V 3.24V 0V 1.77V 0V 2.68V 1.33V 1.24V 1.3V 1.3V 1.32V 3.22V 0V 1.26V 1.12V 1.15V 0.52V 0.67V 1.72V 3.2V 0V 3.21V 3.21V 3.21V 1.77V 0V 3.21V 3.21V 3.21V 1.61V 3.2V 0V 1.52V 1.38V 0.52V 0.01V PB MODE 0V 1.56V 3.2V 1.1V 3.2V 2.47V 0.18V 0.42V 0.42V 1.77V 0V 0.04V 3.21V 0V 0.86V 0.8V 1.8V 0.02V 0.02V 0.02V 3.28V 0V 0.02V 0.02V 0.02V 0.02V 0.02V 3.28V 3.22V 0V 1.77V 0V 2.67V 1.33V 1.24V 1.3V 1.3V 1.32V 3.21V 0V 1.26V 1.12V 1.15V 0.52V 0.67V 1.72V 3.21V 0V 3.21V 3.21V 3.21V 1.77V 0V 3.2V 3.2V 3.2V 1.62V 3.21V 0V 1.52V 1.38V 0.52V 0.01V REC MODE 0V 1.56V 3.19V 1.1V 3.2V 2.47V 0.18V 0.42V 0.42V 1.77V 0V 0.04V 3.17V 0V 0.86V 0.8V 1.81V 0.02V 0.02V 0.02V 3.28V 0V 0.02V 0.02V 0.02V 0.02V 0.02V 3.28V 3.22V 0V 1.77V 0V 2.67V 1.33V 1.24V 1.3V 1.3V 1.32V 3.22V 0V 1.26V 1.12V 1.15V 0.52V 0.67V 1.72V 3.21V 0V 3.21V 3.21V 3.21V 1.8V 0V 3.2V 3.2V 3.2V 1.62V 3.2V 0V 1.52V 1.38V 0.52V 0.01V PIN NO. 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 PIN NAME I2S_O_SD1 (NC) I2S_I_WS I2S_I_CLK I2S_I_SD TU_A_L_OUT TU_A_R_OUT VDDA (DAC) OUT1_RIGHT (NC) OUT1_LEFT (NC) VREF0 (GND) VSSA (DAC) VREF_DAC VRPOS_ADC VRNEG_ADC VDDA(SADC)(3.3V) VSSA (SADC) VDDD (CORE) VSSD (CORE) SW_A_OUT_R SW_A_OUT_L F_A_R_IN F_A_L_IN VREF_ADC SECAM_AM IN3_LEFT (NC) IN4_RIGHT (NC) IN4_LEFT (NC) EE MODE 3.2V 1.32V 1.32V 1.32V 1.59V 1.59V 3.21V 1.59V 1.59V 0V 0V 1.58V 3.04V 0.01V 3.21V 0V 1.77V 0.01V 1.58V 1.58V 1.58V 1.58V 1.58V 1.58V 1.58V 1.58V 1.58V PB MODE 3.2V 1.32V 1.32V 1.32V 1.59V 1.59V 3.22V 1.6V 1.6V 0V 0V 1.59V 3.04V 0.01V 3.22V 0V 1.8V 0.01V 1.58V 1.58V 1.58V 1.58V 1.58V 1.58V 1.58V 1.58V 1.58V REC MODE 3.2V 1.32V 1.32V 1.32V 1.59V 1.59V 3.2V 1.59V 1.59V 0V 0V 1.58V 3.04V 0.01V 3.28V 0V 1.8V 0.01V 1.58V 1.58V 1.58V 1.58V 1.58V 1.58V 1.58V 1.58V 1.58V
IC151 KIA78R25
IN OUT GND CONTROL IN OUT GND CONTROL VCC REF GND FB EN PGND LX VIN ADJ/GND OUT IN VOUT IN OUT GND CONTROL
IC703 74HCT125
IC152 KIA278R33
IC153 G5627
IC801 MM1763
EU1_V_IN 1.07V 1.07V EU1_A_IN_R 7.05V 7.05V EU1_A_IN_L 7.05V 7.05V EU2_V_IN 1.07V 1.07V EU2_A_IN_R 7.06V 7.06V EU2_A_IN_L 7.06V 7.06V TU_V_OUT 1.6V 1.69V TU_A_R_OUT 7.08V 7.08V TU_A_L_OUT 7.08V 7.08V VinEXT (NC) 1.07V 1.07V A_OUT_R 7.06V 7.06V A_OUT_L 7.06V 7.06V C_OUT 2.45V 2.45V VCC2 (12 V) 12.15V 12.15V CVBS_OUT 1.51V 1.5V GND2 0V 0V Y_OUT 1.06V 1.06V BIAS 2.46V 2.46V G_OUT 1.07V 1.07V Fsout 9.89V 9.89V B_OUT 2.45V 2.45V R_OUT 2.45V 2.45V GND1 0V 0V R_Pr_OUT 2.52V 2.52V B_Pb_OUT 2.52V 2.52V G_Y_OUT 1.11V 1.11V Y_SEPA_OUT 1.09V 1.09V VOUT (NC) 2V 2V C_SEPA_OUT 2.52V 2.52V VCC1 (5V) 5.16V 5.16V I2C_CLK 4.93V 4.93V I2C_DATA 4.93V 4.93V GND3 0V 0V EU2_A_OUT_L 6.48V 6.48V EU2_A_OUT_R 6.48V 6.48V EU2_V_OUT 2.02V 2.02V EU1_A_OUT_L 6.48V 6.48V EU1_A_OUT_R 6.48V 6.48V EU1_V_OUT 2.02V 2.02V SW_A_OUT_R 6.48V 6.48V SW_A_OUT_L 6.48V 6.48V SW_V_OUT 1.6V 1.6V
IC154 LD1117_1.8
IC901 SAA7138
IC602 KIA78R05
IC604 SI3865DV
GND 0V ANT(5V) 0.02V ANT(5V) 0.02V VCC (5.3V) 5.2V ANT_5V_CTL 0V VCC (100K/5.3V) 5.15V I2C_CLK A_TUNER_CLK A_TUNER_DATA I2C_DATA 2E PWR_CTL_H GND SCL D_TUNER_CLK D_TUNER_DATA SDA PWR_CTL_H 1E VCC NC FLMD0 ANT_5V_CTL MIC_DET_IN_L S_DET_L RESET XT2 (32.7 KHZ) XT1 (32.7 KHZ) FLMD0 4.93V 4.93V 4.93V 4.93V 5.2V 0V 0V 2.41V 2V 2V 2.37V 0V 5.2V 5.21V 5.19V 0V 0V 0.55V 0V 5.2V 2.95V 2.08V 0V
IC606 74HC4066
IC701 UPD78F0535GK
IC702 S-24CS16A011_6Kbit
IC802 NJM4580
A_OUT_L DAC_A_L 6.1V 6.1V 6.1V 6.1V
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
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4. DMN8673
PIN NO. PIN NAME EE MODE PB MODE REC MODE
INFORMATION : 1. Voltage Check using RH300 DV1 2. EE Mode : Check with Signal C2 3. Playback Mode : Check with DVD TEST DISC KDV-N Chapter 2 4. Record Mode : Check with recording signal C2 using DVD -RW Brand : Mitsubishi, VR Mode
PIN NO. C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 C25 C26 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 E1 E2 E3 E4 E23 E24 E25 E26 F1 F2 F3 F4 F23 F24 F25 F26 G1 G2 G3 G4 G23 G24 G25 PIN NAME VO_D[6] VO_D[10] VO_D[13] AIN_SCLK A2IN_D_GPIO AOUT_FSYNC AIN_D[0] AOUT_D[3] AOUT_D[0] UART2_RTS SCL VDD_CORE VDD_CORE VDD_DRAM IRTX1 SDRAM_A[2] SDRAM_A[3] TCK VI_D[2] VI_D[6] VI_D[9] VIO_D[2] VIO_D[5] VIO_D[9] VO_ACTIVE VO_D[3] VO_D[7] VDD_CORE VDD_CORE VDD_PAD1 VDD_PAD2 VDD_PAD3 VDD_PAD4 AOUT_D[1] A2_SCLK UART2_RX SPI_MOSI --> SIO_SPI_MOSI VDD_CORE SDRAM_VREF VDD_DRAM SDRAM_A[10] SDRAM_A[0] SDRAM_A[1] TDO TDI TMS TRSTn GND SDRAM_RASn SDRAM_BA[0] SDRAM_BA[1] AGND_AUDINPLL AGND_AUDOUTPLL AGND_SYSPLL BIAS_5V SDRAM_A[4] SDRAM_A[13] SDRAM_WEn SDRAM_CASn CLKI AGND_VIDPLL AVDD_AUDINPLL AVDD_SYSPLL SDRAM_A[8] SDRAM_A[7] SDRAM_A[6] EE MODE 1.10 1.19 1.02 1.62 0.00 1.62 1.21 0.00 1.62 0.00 3.15 1.08 1.08 2.35 3.21 1.14 1.17 2.25 1.55 1.50 1.62 1.25 1.18 1.80 2.49 1.08 1.81 1.08 1.08 3.22 3.22 3.22 3.22 0.00 1.61 4.91 3.05 1.08 1.19 2.35 1.12 1.14 1.14 0.89 2.23 2.25 0.00 0.00 2.01 1.21 1.18 0.00 0.00 0.00 1.05 1.19 1.18 2.03 2.08 1.48 0.00 1.05 2.35 1.17 1.18 1.17 PB MODE 1.08 0.38 1.07 1.63 0.00 1.63 1.21 0.00 1.64 0.00 3.18 1.05 1.05 2.29 3.23 1.10 1.16 2.25 1.55 1.50 1.62 0.66 0.94 1.77 2.49 0.94 1.78 1.05 1.05 3.24 3.24 3.24 3.24 0.00 1.61 4.91 3.05 1.05 1.17 2.29 1.08 1.09 1.09 0.40 2.24 2.26 0.00 0.00 1.97 1.18 1.18 0.00 0.00 0.00 1.05 1.16 1.06 1.98 1.93 1.49 0.00 1.05 2.26 1.16 1.16 1.16 REC MODE 1.10 1.17 1.01 1.61 0.00 1.61 1.20 0.00 1.61 0.00 3.16 1.05 1.05 2.30 3.21 1.10 1.15 2.25 1.55 1.49 1.61 1.25 1.06 1.80 2.48 1.07 1.81 1.05 1.05 3.22 3.22 3.22 3.22 0.00 1.60 4.91 3.04 1.05 1.17 2.30 1.04 1.03 1.08 0.85 2.24 2.25 0.00 0.00 1.97 1.18 1.16 0.00 0.00 0.00 1.06 1.15 1.02 1.98 1.85 1.49 0.00 1.06 2.30 1.15 1.15 1.15 PIN NO. G26 H1 H2 H3 H4 H23 H24 H25 H26 J1 J2 J3 J4 J23 J24 J25 J26 K1 K2 K3 K4 K23 K24 K25 K26 L1 L2 L3 L4 L11 L12 L13 L14 L15 L16 L23 L24 L25 L26 M1 M2 M3 M4 M11 M12 M13 M14 M15 M16 M23 M24 M25 M26 N1 N2 N3 N4 N11 N12 N13 N14 N15 N16 N23 N24 N25 N26 PIN NAME SDRAM_A[5] CLKX AGND_DCXO AVDD33_DCXO AVDD_AUDOUTPLL SDRAM_CKE SDRAM_A[12] SDRAM_A[11] SDRAM_A[9] DAC_Dvss DAC_OUTB DAC_OUTB AVDD33_VIDPLL SDRAM_DQ[28] SDRAM_DQ[29] SDRAM_DQ[30] SDRAM_DQ[31] DAC2 DAC1 AVDD33_DAC VDD_CORE SDRAM_DQ[24] SDRAM_DQ[25] SDRAM_DQ[26] SDRAM_DQ[27] DAC5 DAC3 AVDD33_DAC VDD_CORE GND GND GND GND GND GND VDD_DRAM VDD_DRAM SDRAM_DQM[3] SDRAM_DQS[3] DAC6 DAC4 AVDD33_DACD VDD_PAD5 GND GND GND GND GND GND SDRAM_CLK[1] VDD_DRAM SDRAM_DQM[2] SDRAM_DQS[2] GND_BATT VSS_REF RTC_CLKI VDD_PAD6 GND GND GND GND GND GND SDRAM_CLKn[1] VDD_DRAM SDRAM_DQ[22] SDRAM_DQ[23] EE MODE 1.16 1.69 0.00 3.23 1.06 2.10 1.14 1.12 1.17 0.00 1.58 1.58 3.23 1.18 1.11 1.11 1.11 0.63 0.64 3.21 1.08 1.11 1.13 1.12 1.11 0.72 0.73 3.21 1.08 0.00 0.00 0.00 0.00 0.00 0.00 2.35 2.35 0.35 1.16 0.72 0.64 3.21 3.22 0.00 0.00 0.00 0.00 0.00 0.00 1.22 2.35 0.35 1.16 0.00 0.00 0.00 3.22 0.00 0.00 0.00 0.00 0.00 0.00 1.20 2.35 1.13 1.13 PB MODE 1.16 1.72 0.00 3.24 1.05 2.05 1.09 1.08 1.14 0.00 1.58 1.58 3.23 1.18 1.11 1.11 1.11 0.61 0.62 3.22 1.05 1.11 1.13 1.12 1.11 0.72 0.73 3.22 1.05 0.00 0.00 0.00 0.00 0.00 0.00 2.29 2.29 0.32 1.16 0.72 0.62 3.22 3.24 0.00 0.00 0.00 0.00 0.00 0.00 1.20 2.29 0.32 1.16 0.00 0.00 0.00 3.24 0.00 0.00 0.00 0.00 0.00 0.00 1.17 2.29 1.13 1.13 REC MODE 1.15 1.73 0.00 3.22 1.06 2.05 1.06 1.05 1.15 0.00 1.58 1.58 3.22 1.18 1.11 1.11 1.11 0.64 0.64 3.20 1.05 1.11 1.13 1.12 1.11 0.72 0.64 3.20 1.05 0.00 0.00 0.00 0.00 0.00 0.00 2.30 2.30 0.30 1.15 0.73 0.73 3.20 3.22 0.00 0.00 0.00 0.00 0.00 0.00 1.20 2.30 0.30 1.15 0.00 0.00 0.00 3.22 0.00 0.00 0.00 0.00 0.00 0.00 1.16 2.30 1.13 1.13 PIN NO. P1 P2 P3 P4 P11 P12 P13 P14 P15 P16 P23 P24 P25 P26 R1 R2 R3 R4 R11 R12 R13 R14 R15 R16 R23 R24 R25 R26 T1 T2 T3 T4 T11 T12 T13 T14 T15 T16 T23 T24 T25 T26 U1 U2 U3 U4 U23 U24 U25 U26 V1 V2 V3 V4 V23 V24 V25 V26 W1 W2 W3 W4 W23 W24 W25 W26 Y1 PIN NAME V_REF VDD_REF RTC_CLKX VDD_PAD7 GND GND GND GND GND GND SDRAM_CLK[0] VDD_DRAM SDRAM_DQ[20] SDRAM_DQ[21] AGND_ADCD AVDD33_ADCD VDD_BATT VDD_PAD8 GND GND GND GND GND GND SDRAM_CLKn[0] VDD_DRAM SDRAM_DQ[18] SDRAM_DQ[19] RFP RFN AVDD33_ADC AVDD33_ADC GND GND GND GND GND GND VDD_DRAM VDD_DRAM SDRAM_DQ[16] SDRAM_DQ[17] USB_VSS AVDD33_USB AGND_ADC AGND_ADC SDRAM_DQ[12] SDRAM_DQ[13] SDRAM_DQ[14] SDRAM_DQ[15] USB_DPLUS0 USB_DMINUS0 USB_DPULS1 USB_DMINUS1 SDRAM_DQ[8] SDRAM_DQ[9] SDRAM_DQ[10] SDRAM_DQ[11] USB_OC_0 USB_PO_0 USB_PO_1 USB_OC_1 SDRAM_DQ[6] SDRAM_DQ[7] SDRAM_DQM[1] SDRAM_DQS[1] CLKO EE MODE 1.18 3.22 NC 3.22 0.00 0.00 0.00 0.00 0.00 0.00 1.21 2.35 1.13 1.14 0.00 0.00 0.00 3.22 0.00 0.00 0.00 0.00 0.00 0.00 1.20 2.35 1.18 1.18 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 2.35 2.35 1.18 1.18 0.00 NC 0.00 0.00 1.18 1.18 1.18 1.18 NC NC NC NC 1.18 1.18 1.18 1.18 0.00 NC NC 0.00 1.18 1.18 0.35 1.16 1.65 PB MODE 1.18 3.23 NC 3.24 0.00 0.00 0.00 0.00 0.00 0.00 1.19 2.29 1.13 1.14 0.00 0.00 0.00 3.24 0.00 0.00 0.00 0.00 0.00 0.00 1.17 2.29 1.18 1.18 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 2.29 2.29 1.18 1.18 0.00 NC 0.00 0.00 1.18 1.18 1.18 1.18 NC NC NC NC 1.18 1.18 1.18 1.18 0.00 NC NC 0.00 1.18 1.18 0.32 1.16 1.65 REC MODE 1.18 3.22 NC 3.22 0.00 0.00 0.00 0.00 0.00 0.00 1.19 2.30 1.13 1.14 0.00 0.00 0.00 3.22 0.00 0.00 0.00 0.00 0.00 0.00 1.17 2.30 1.18 1.18 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 2.30 2.30 1.18 1.18 0.00 NC 0.00 0.00 1.18 1.18 1.18 1.18 NC NC NC NC 1.18 1.18 1.18 1.18 0.00 NC NC 0.00 1.18 1.18 0.30 1.15 1.64 PIN NO. Y2 Y3 Y4 Y23 Y24 Y25 Y26 AA1 AA2 AA3 AA4 AA23 AA24 AA25 AA26 AB1 AB2 AB3 AB4 AB23 AB24 AB25 AB26 AC1 AC2 AC3 AC4 AC5 AC6 AC7 AC8 AC9 AC10 AC11 AC12 AC13 AC14 AC15 AC16 AC17 AC18 AC19 AC20 AC21 AC22 AC23 AC24 AC25 AC26 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 EE MODE ATAPI_DATA[6] 0.76 ATAPI_DATA[7] 0.00 ATAPI_DATA[8] 0.77 SDRAM_DQ[4] 1.18 SDRAM_DQ[5] 1.18 SDRAM_DQM[0] 0.35 SDRAM_DQS[0] 1.16 ATAPI_DATA[10] 0.77 ATAPI_DATA[4] 0.77 ATAPI_DATA[5] 0.77 ATAPI_DATA[9] 0.76 RST- /RST_E5/ 3.12 FLASH SDRAM_DQ[1] 1.18 SDRAM_DQ[2] 1.18 SDRAM_DQ[3] 1.18 ATAPI_DATA[12] 0.77 ATAPI_DATA[2] 0.76 ATAPI_DATA[11] 0.77 ATAPI_DATA[3] 0.77 D[00] 0.00 HOST_ALE E5_ALE 0.00 HOST_UDSn 3.21 SDRAM_DQ[0] 1.18 ATAPI_DATA[15] 0.78 ATAPI_DATA[14] 0.77 ATAPI_DATA[1] 0.77 ATAPI_DATA[0] 0.76 ATAPI_DMARQ 0.00 ATAPI2_DATA[2] 1.95 ATAPI2_DATA[6] 1.94 ATAPI2_DATA[10] 1.91 ATAPI2_DATA[14] 1.94 ATAPI2_ADDR[2] 0.00 VDD_CORE 1.08 VDD_CORE 1.08 VDD_CORE 1.08 VDD_PAD9 3.22 VDD_PAD10 3.22 VDD_PAD11 3.22 PHY_LREQ 0.00 CS1 /E5_CS1 3.22 MA[23] 0.00 MA[2] 0.00 WAIT /WAIT 3.82 D[12] 2.87 D[10] 0.00 D[4] 0.00 OE- /E5_OE 3.21 GPIO[1] VINT_INT 3.23 ATAPI_DATA[13] 0.76 ATAPI_DIORn 3.23 ATAPI_DMAACKn 3.23 ATAPI_ADDR[1] 0.00 ATAPI2_DMARQ 0.00 ATAPI2_DATA[3] 1.95 ATAPI2_DATA[7] 0.00 ATAPI2_DATA[11] 1.93 ATAPI2_DATA[15] 1.93 ATAPI2_ADDR[3] 3.22 ATAPI2_DMAACKn 3.22 ATAPI2_INTRQ 0.00 PHY_CTL[0] 0.07 PHY_DATA[0] 0.00 PHY_DATA[6] 0.00 PHY_CTL[1] 0.03 CS4 /E5_CS4 3.23 PIN NAME PB MODE 0.74 0.00 0.75 1.18 1.18 0.32 1.16 0.77 0.76 0.77 0.74 3.13 1.18 1.18 1.18 0.77 0.75 0.75 0.76 0.00 0.00 3.23 1.18 0.78 0.76 0.77 0.76 0.00 1.92 1.90 1.88 1.91 0.00 1.05 1.05 1.05 3.24 3.24 3.24 0.00 3.24 0.00 0.00 3.82 2.86 0.00 0.00 3.23 3.24 0.74 3.24 3.05 0.00 0.00 1.92 0.00 1.90 1.90 3.23 3.24 0.00 0.07 0.00 0.00 0.03 3.24 REC MODE 0.84 0.00 0.86 1.18 1.18 0.30 1.15 0.88 0.84 0.84 0.85 3.11 1.10 1.18 1.18 0.87 0.84 0.87 0.84 0.00 0.00 3.21 1.12 0.89 0.89 0.84 0.84 0.00 1.93 1.91 1.90 1.92 0.00 1.05 1.05 1.05 3.22 3.22 3.22 0.00 3.21 0.00 0.00 3.81 2.86 0.00 0.00 3.21 3.22 0.87 3.22 3.22 0.00 0.00 1.93 0.00 1.91 1.91 3.21 3.21 0.00 0.07 0.00 0.00 0.03 3.22 PIN NO. AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AE1 AE2 AE3 AE4 AE5 AE6 AE7 AE8 AE9 AE10 AE11 AE12 AE13 AE14 AE15 AE16 AE17 AE18 AE19 AE20 AE21 AE22 AE23 AE24 AE25 AE26 AF1 AF2 AF3 AF4 AF5 AF6 AF7 AF8 AF9 AF10 AF11 AF12 AF13 AF14 AF15 AF16 AF17 AF18 AF19 AF20 AF21 AF22 AF23 AF24 AF25 AF26 PIN NAME CS2 /E5_CS2 MA[22] MA[1] GPIO[3] HATA_IRQ GPIO[0] --> SiL9030_INT D[13] D[8] D[5] D[3] ATAPI_DIOWn ATAPI_RESET ATAPI_ADDR[3] ATAPI_INTRQ ATAPI2_DATA[0] ATAPI2_DATA[4] ATAPI2_DATA[8] ATAPI2_DATA[12] ATAPI2_ADDR[0] ATAPI2_ADDR[4] ATAPI2_IORDY ATAPI2_RESET PHY_DATA[3] PHY_DATA[4] PHY_DATA[7] PHY_DATA[1] CS5 CS0 /E5_CS0 MA[5] MA[4] GPIO[4] GPIO[2] /ETHERNET_IRQ D[15] D[14] D[2] D[1] ATAPI_ADDR[4] ATAPI_ADDR[2] ATAPI_ADDR[0] ATAPI_IORDY ATAPI2_DATA[1] ATAPI2_DATA[5] ATAPI2_DATA[9] ATAPI2_DATA[13] ATAPI2_ADDR[1] ATAPI2_DIOWn ATAPI2_DIORn PHY_LINK_ON PHY_DATA[2] PHY_DATA[5] PHY_CLK PHY_LPS CS3 /E5_CS3 MA[24] MA[3] LWE- /E5_LWEn DTACK GPIO[5] SIO_SPI_CS0 D[9] D[11] D[6] D[7] EE MODE 3.22 0.00 0.00 0.00 3.23 0.00 0.00 0.00 0.00 3.23 3.23 3.23 0.00 1.94 1.92 1.92 1.95 0.00 3.21 4.50 3.23 0.00 0.00 0.00 0.00 3.23 3.22 0.00 0.00 3.23 3.20 0.00 2.87 0.00 0.00 3.22 0.00 0.00 4.60 1.96 1.93 1.95 1.93 0.00 3.23 3.23 0.00 0.00 0.00 1.64 3.21 3.22 0.00 0.00 3.21 3.23 3.23 0.00 0.00 0.00 0.00 PB MODE 3.24 0.00 0.00 0.00 3.24 0.00 0.00 0.00 0.00 3.24 3.24 3.24 0.00 1.91 1.87 1.89 1.92 0.00 3.22 4.50 3.24 0.00 0.00 0.00 0.00 3.24 3.24 0.00 0.00 3.24 3.23 0.00 2.86 0.00 0.00 3.23 0.00 0.00 4.60 1.92 1.89 1.92 1.90 0.00 3.23 3.23 0.00 0.00 0.00 1.66 3.23 3.24 0.00 0.00 3.23 3.24 3.24 0.00 0.00 0.00 0.00 REC MODE 3.21 0.00 0.00 0.00 3.22 0.00 0.00 0.00 0.00 3.22 3.22 3.22 0.00 1.92 1.89 1.91 1.93 0.00 3.21 4.50 3.22 0.00 0.00 0.00 0.00 3.22 3.21 0.00 0.00 3.22 3.21 0.00 2.86 0.00 0.00 3.21 0.00 0.00 4.61 1.94 1.91 1.93 1.91 0.00 3.21 3.21 0.00 0.00 0.00 1.66 3.23 3.21 0.00 0.00 3.21 3.22 3.22 0.00 0.00 0.00 0.00
3-73
3-74
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Gap
3.12V 2.5V 3.31V 5.22V 1.81V 2.34V 1.03V 5.19V 4.83V 1.8V 3.23V 12V 3.56V 6V 3.6V 6V 6V 4.56V -0.2V 4.53V 11.99V 2.49V 6.49V 1.61V 6.49V 1.79V 1.94V 0.11V 5.18V 1.97V 2.53V 2.53V 0.01V 5.21V 5.21V 3.21V 1.8V 1.6V 4.88V 4.88V 3.26V 1.61V 3.26V 5.45V 5.45V 3.26V
Margin
12.88V 13.5V 12.69V 10.78V 14.19V 15.37V 5.27V 10.81V 5.17V 14.2V 12.77V 4V 12.44V 10V 12.4V 10V 10V 11.44V 16.2V 11.47V 4.01V 13.51V 9.51V 14.39V 9.51V 8.21V 8.06V 6.19V 10.82V 8.03V 3.77V 3.77V 9.99V 4.79V 10.79V 12.79V 14.2V 14.4V 11.12V 11.12V 12.74V 14.39V 12.74V 10.55V 10.55V 12.74V
Gap
3.12V 2.51V 3.31V 5.22V 12.62V 1.81V 2.34V 1.02V 5.19V 4.83V 1.81V 3.22V 11.99V 3.57V 6V 3.6V 6V 6V 4.56V -0.2V 4.5V 11.99V 1.05V 2.49V 6.49V 1.61V 6.49V 1.69V 2.27V 0.12V 5.18V 1.95V 2.53V 2.53V 0.05V 5.21V 5.21V 3.21V 1.8V 1.6V 4.87V 4.88V 3.26V 1.61V 3.26V 5.43V 5.45V 3.25V
Margin
12.9V 13.53V 12.7V 10.8V 37.34V 14.21V 13.66V 5.29V 10.83V 5.2V 14.22V 12.8V 4V 12.4V 10V 12.41V 10V 10V 11.47V 16.2V 11.59V 3.99V 14.96V 13.54V 9.54V 14.39V 9.54V 8.11V 8.04V 6.2V 10.84V 8.01V 3.78V 3.78V 9.97V 4.81V 10.81V 12.8V 14.23V 14.42V 11.13V 11.13V 12.76V 14.41V 12.76V 10.57V 10.57V 12.76V
12.64V 37.36V
INFORMATION : 1. Voltage Check using RH 300 DV1 2. SET : Ver=070827B Cware=v15_06 BSP=rh3t FME IO : Ver=70824_1 Loader: S603 3. EE Mode : Check with Signal C2 4. Playback Mode : Check with DVD TEST DISC KDV-N Chapter 2 5. Record Mode : Check with recording signal C2 using DVD -RW Brand : Mitsubishi, VR Mode
-41.52V 57.52V
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
3-75
3-76
3-77
3-78
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
2. I/O P.C.BOARD
(TOP VIEW)
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
3-79
3-80
I/O P.C.BOARD
(BOTTOM VIEW)
3-81
3-82
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
3-83
3-84
4-2. 9 TOOL
(TOP VIEW) (BOTTOM VIEW)
3-85
3-86
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
6. HDMI P.C.BOARD
(TOP VIEW) (BOTTOM VIEW)
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
3-87
3-88
MEMO
MEMO
3-89
3-90
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
DESCRIPTION OF CIRCUIT...................................................................................................................4-34
1. ALPC (AUTOMATIC LASER POWER CONTROL) CIRCUIT ...............................................................4-34 2. FOCUS/TRACKING/SLED SERVO CIRCUIT .......................................................................................4-35 3. SPINDLE SERVO CIRCUIT ..................................................................................................................4-36
BLOCK DIAGRAM .....................................................................................................................................4-51 CIRCUIT DIAGRAM ...................................................................................................................................4-53 CIRCUIT VOLTAGE CHART ...................................................................................................................4-55 PRINTED CIRCUIT BOARD DIAGRAMS...........................................................................................4-57
1. MAIN P.C.BOARD (TOP VIEW).............................................................................................................4-57 2. MAIN P.C.BOARD (BOTTOM VIEW) ....................................................................................................4-59 4-1
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Check it after connecting the power cable only on interface cable for NO Reset or Power ON.
Are the pin1 of LPB272+5V, pin4 of LPB272+12V respectively after the power cable connecting?
YES
NO
Does the pin1 (Reset) of LIC401 change 0V to 3.3V at the power supply initial input mode?
YES
NO
NO
NO
<Reference> 1. 65V (VHALF) : Check pin116 of LIC101 2. 2V (HDVREF) : Check pin80 of LIC101
YES
NO
OK
4-2
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
System check.
NO
NO
NO
NO
Does Disc rotate continuously and the drive recognize the disc?
YES
NO
After eject the tray, Insert DVD Disc and check rotation.
YES
Does Disc rotate continuously and the drive recognize the disc?
YES
NO
After eject the tray, Insert DVD+R/RW Disc and check rotation.
YES
Does Disc rotate continuously and the drive recognize the disc?
YES OK
NO
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4-3
Is the input voltage 0V at LIC201 pin49 when push the EJECT SW?
YES
NO
NO
Check the connction of LIC201 pin70. Replace the LIC201. Check the communication line between LIC201.
NO
NO
YES
4-4
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
NO
NO
Is there Sled drive voltage output? (LIC301 pin29, 30, 31, 32)
NO
NO
YES YES
YES
NO
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4-5
NO
NO
NO
Check the output of LIC301 pin43. Check the connector LPM301. Replace the LIC301.
YES YES
OK
NO
4-6
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
NO
NO
YES YES
NO
* LIC101 pin22 is MOUT2(FEP Monitor2). After disc recognition action, Monitor port is off. So, please check FE signal during disc recognition.
NO
Check the connection of LIC201 pin69. Check the communication line between LIC101 and LIC201. Replace the LIC201.
NO
NO
YES
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4-7
NO
NO
YES
NO
Check the Drive IC (LIC301) and P/U referring to Focus actuator operating is abnormal.
* LIC101 pin20 is MOUT1(FEP Monitor1). After disc recognition action, Monitor port is off. So, please check TE signal during disc recognition.
4-8
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
NO
Go to LD CHECK.
YES
NO
YES
NO
NO
Replace LIC101.
NO
OK
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4-9
NO
Go to LD CHECK.
NO
YES
NO
NO
OK
NO
NO
Replace LIC201.
Replace LIC101.
4-10
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Normal case
NO
YES
YES
Remove the dust, fingerprint and if the disc has long width scratch, change it.
Finalized disc?
NO
Eject disc.
YES
If DVD If DVD
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4-11
R/RW disc.
NO
NO
Eject tray.
Go to LD CHECK.
YES
OK
4-12
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Perform 6. Optical power setting parameter check from How to use Test tool.
YES
NO
OFF level
OK
N.G
N.G
N.G
N.G
OK
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4-13
CD/DVD?
DVD
CD
Select Mode : CD, Test and perform Test from 4. LD Test of How to use Test tool
Select Mode : DVD, Test and perform Test from 4. LD Test of How to use Test tool
END
4-14
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Select Mode : DVD, Test and perform Test from 4. LD Test of How to use Test tool
Select Mode : DVD, Test and perform Test from 4. LD Test of How to use Test tool
Check the input of recording pulse. (pin19, 20, 21, 22, 23, 24 of LPM101)
Check the input of recording pulse. (pin19, 20, 21, 22, 23, 24 of LPM101)
END
END
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4-15
4 0.7
3T
0.4 um
um
DVD+R/RW Disc
4-16
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
2. DISC SPECIFICATION
3. DISC MATERIALS
1) DVD-ROM
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4-17
Disc structure
Recording principles
[ Recording ] Recording is done by changing the organic dye layer and the substrate with a laser. When a strong laser is applied to a disc, the temperature of the organic dye material goes up, the dye is decomposed and the substrate changes at the same time. At this time, a durable bit is created as is the case with a CDROM. [ Playback ] Signals are read with the differences of the reflection of a laser from pits.
4-18
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Disc structure
Recording principles
[ Recording ] When a high-power laser is applied to the recording material, it melts and then becomes amorphous with a low reflection coefficient when it quickly cools off. When a mid-power laser is applied to heat gradually the recording material and then gradually cools it off, it becomes crystal with a high reflection coefficient. [ Playback ] A low-power laser is used for playback. The amount of reflected light depends on the status (amorphous or crystalline) of the recording material. This is detected by an optical sensor.
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4-19
To make recordings, it is necessary to modulate the write pulse, which is called Write Strategy. There can be many types in Write Strategy. Typically Write Strategy for DVD R has NMP(Non Multi-Pulse) type and MP(Multi-Pulse) type. In NMP type each single mark is created by subsequent separated short pulses. In MP type each single mark is created by one continuous pulse. Write Strategy for DVD RW has Type 1 and Type 2. In Type 1 the mark with nT width is created by one top pulse and (n-2) multi-pulses. Thus mark 3T is made by one top pulse and one multi-pulse. In Type 2 the mark with nT width is created by one top pulse and (n-3) multi-pulses. Thus mark 3T is made by one top pulse only. RS-06A uses MP type Write Strategy for DVD R and Type 1 for DVD RW as shown below.
4-20
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4. ORGANIZATION OF THE INNER DRIVE AREA, OUTER DRIVE AREA, LEAD-IN ZONE AND LEAD-OUT ZONE
1) Layout of DVD-ROM disc
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4-21
4-22
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Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4-23
Fig. 1
Fig. 2
Fig. 3
4-24
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
ESSENTIAL INSTRUMENT
1) Optical Power meter & Sensor (ADVANTEST, TQ8230/Q82014A) 2) Personal Computer 3) Adjustment Program (Dragon or ALPC) --> being recommended ALPC Program in case of SVC
OPTIONAL INSTRUMENT
1) USB-ATAPI Interface (if you dont have Notebook which has ATAPI Interface or use PC USB Port) 2) Connector-ATAPI Interface Board
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4-25
2) Enter the password. It is qaz. When you enter the password, turn off the Caps lock in your keyboard.
3) Set up the target device. Press ATAPI button on the main dialog of Dragon tool. And find the target device which is GDA-4164L.
4-26
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4) If the target device setting is completed, execute the Setup Laser Power(Manual) in the Alpc/Opc menu.
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4-27
you are able to measure the power through same procedure. (caution) Dont watch light directly. When you finish optical power measurement, press Press button(LD Off). button.(save to ERPROM)
2) CD LD Power Setting
Select the CD in the Select Laser Diode Press .
Measure optical read Power. Write Read Power value. Press button(save to ERPROM)
*** In case of CD power setting of RS-06A, loader doesnt need to set up write power. Although NMP, MP,Erase and HC power is N.G when you press setup, please ignore the N.G message. Because of RS-06A only support reading function about CD-R/RW. * Look at reference sheet to test Optical Power. ** Power value is mW unit. Value is read power X 100.
4-28
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
1)
ALPC Para
- We can see optical power setting value. - Write optical Power Setting value to paper. - Adjust power setting again. - Compare original parameter to new parameter. - if parameter value is different, original value is wrong or optical power may change. - But pick-up LD test is all ok, just adjust optical power setting again.
2)
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4-29
4-30
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
TiltTilt+ TRTR+ AFAF+ Gnd(FM) FM Vref SelCD Vcc(FM) ENBL IR I1 I2 I3 Gnd(LDD) W1DIS W1DISN Vdd(LDD) W2DIS W2DISN Gnd(LDD) W3DIS W3DISN Vdd(LDD) OSCEN OSCENN Gnd(Temp) Temp Gnd(OEIC) RFRF+ Vc(OEIC) E2+F2 C A E1+F1 E4+F4 D B E3+F3 Gnd(OEIC) Vcc(OEIC) GainSw
3 Out
High Low
CD-VR
5 6
4 3 2
R14 0
4 5
DVD-V R
SW R15 0
C16 Rd
7 8 + Gnd Vcc
6 7 8
Vref
1
C17
9 10 11
C5 C4 C3 C2
R8 R7 R6 R5 R4
12 13 14 15 16
IC1 LDD
C1
14 13 12 11 10 9
InR InW1 InW2 InW3 NC Vdd1
8
Rdis R3
17 18 7 6 5 4 3 2 1
R1 R2
19 20 21 22 23 24 25 26
22 23 24 25 26 27 28
R10 R11
R12
27
C15 R16
R9
28 29
Thermist
30 31 32
Disc side
EF4 EF1
IC3 OEIC 8 9 10
33 34 35
F4 F3 D
F1 F2 A
7 6 5 4
36 37 38 39 40 41
Ao Bo EF2 RF+
11
C
12 13 14
B
3
E4 E3
E1 E2
2 1
42
Sw
RF-
43 44 45
Top View
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4-31
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4-33
DESCRIPTION OF CIRCUIT
1. ALPC (AUTOMATIC LASER POWER CONTROL) CIRCUIT
1-1. Block Diagram
LPM101
VREFPD Optical Pick-up HOP-7232TL FM 19 124
LIC101
APC
AN22117A
S/H2 S/H3 S/H1
40 41 SH2
Ave
LIC201 MN103SC7G
M P X
LPF
123 FPD
VGA VGA
Erase Space
A/D
LD
PD
42 SH1
SH3
ADSC
4-34
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Pick-up E F B C G H A D
A,B,C,D E,F,G,H
LIC101 AN22117A
MPX Block
A,B,C,D
LIC301 BD7776ARFS
10
T-
9
T+
8
F-
7
F+
A/D
FE
FDRV TDRV STEP2 STEP1
A/D
TE
LEVEL SHIFT
LEVEL SHIFT
6 5 25 26 Logic 30 29 31 32 A+ A- B- B+
69 73 76 75
D A C
A/D
SLED COMPENSATOR
SDRV
M
Stepping Motor
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4-35
LIC101 AN22117A
Wobble Signal Generator WBLIN
EFM
LIC201 MN103SC7G
SERVO DSP
M
Frequency Controller Level Shift
SPDRV
77 Phase Controller
LIC301 BD7776ARFS
4-36
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
VCC21 CWAGC1 CWAGC2 CWBLVGA CRWCMP CRWAGC CWBLCMP CWBLBUF RFB RFA CDRF AIDENV/WBLDIF
CWBLHPF2 CWBLHPF1
N.C.
N.C.
96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 65 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
N.C. N.C.
N.C. N.C. N.C. GND2 AIN BIN CIN DIN VCC6 EIN FIN VCC1 GIN HIN GND1 SVREF CPCAPH CPCABH N.C. VHALF CTC2 CTC1 CBDOS CBDOF VCC3 VREF25 VPD VREFPD GND3 PO6 PO5 PO4
97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128
N.C. WBL CLUMPGT LPPS ASENV/LPPM GND4 VCC52 RSDAT RSEN N.C. SDAT SCK SEN CHSEL N.C. TGCHG LSEN LSCK LSDAT VCC4 SH5 FEPIDGT/SH6 SH1 SH2 SH3 WIDGT/SH4 WTGT GND5 BDO OFTR VCC51 TC
AN22117A
(Top View) 128Pin TQFP TQFP-128-P-1414A
N.C.
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
PIO2 PIO3 PIO4 CXDPH1 CXDPH2 GND6 STMDN STMD VHALF SEO1 SEO2 MOUT0 MOUT1 MOUT2 VCC8 IREAD IWRT1 IWRT2 IWRT3 GND7 CLPCLPF RVREF VCC7 STMOUT
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
4-37
Block Diagram
STMD
STMDN
STMOUT
SE01
SE02
TC
CXDPH1
SH6
SPLAOUT
INPUT
AIN BIN CIN DIN EIN FIN GIN GIN INPUT Buffer
Block
SAINL SBINL SCINL S/H AAF SDINL SEINL SFINL SGINL SHINL MPX (SE01) M P X M P X
Input select SW
SLP23
VGA VGA
LPF
COMP.
SLP14
PK ENV PK ENV
LPOS Block
SPLBOUT VGA/Bypass & offset DAC VGA/ Bypass MPX Block SRFMA VGA SRFMD SRFMB VGA SRFMC SDPDTEP DPD TE Dtetction SDPDTEN SPLAOUT SPLBOUT DPD Block MPX (SE01) SLP14 SLP23 S/H S/H
TECENV
MPX
WBL/LPP Block
AGC Bypss AGC Bypss BAL BAL VGA WBL Detection LPP Detection
CRWAGC CRWCMP CWBLCMP CWBLBUF CWBLVGA WBLDIF WBL ASENV/LPPN LPPS CLPPHPP CLPPPH CWAGC2
SRFMA SRFMB SH4 SH1 VREF25 HDVREF GATE VHALF VREF08 VREF To Each Block VREF Block CBDOF CBDOS ALL Sum GATE Block From LOGIC SRFMC SRFMD
COMP.
TCOP TC/TI Dtetction TCON TIOP TION BDO Block PK ENV SBDOAS Level Shift
MPX
SH2 SH3
S/H S/H
MPX COMP.
VGA
VGA
PK ENV PK ENV
S/H
LPF
APC Block
JLINE Block
SW To Each Block JLINE ITH 5bit DAC RD-scale 16bit DAC From LOGIC RD 11bit DAC LPF
CLPCLPF
IREAD VGA Read Buffer IWRT1 Write Buffer IWRT2 Write Buffer IWRT3 Write Buffer
RFA RFB
RFEQ Block
OFST HPF EQ AMP CLMP LPC LOGIC
LPCDAC Block
SRF/P0/PI0 Block
EQOUTB
FLTAMP
RFIN2 RFIN1
RFOUT
BDO
RREF
4-38
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Pin Assignment
Pin no.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
Pin Name
NC PO3 PO2 PO1 PO0 VCC53 PIO0 PIO1 PIO2 PIO3 PIO4 CXDPH1 CXDPH2 GND6 STMDN STMD VREF08 SEO1 SEO2 MOUT0 MOUT1 MOUT2 VCC8 IREAD IWRT1 IWRT2 IWRT3 GND7 CLPCLPF RVREF VCC7 STMOUT TC VCC51 OFTR BDO GND5 WTGT WIDGT/SH4 SH3
Type
O O O O PS I/O I/O I/O I/O I/O I I PS I I O O O O I/O I/O PS O O O O PS I I PS O O PS O O PS I I I General CMOS output pin
Function
Head Amp/OEIC gain change signal output pin 3. Head Amp/OEIC gain change signal output pin 2. Head Amp/OEIC gain change signal output pin 1. Power supply pin for CMOS I/F & LOGIC. General CMOS Input/Output pin 0. General CMOS Input/Output pin 1. General CMOS Input/Output pin 2. General CMOS Input/Output pin 3. General CMOS Input/Output pin 4. PH capacitor commection pin 1 for LPOS. PH capacitor commection pin 2 for LPOS GND pin for BG. PD input pin for STM. PD input pin for STM. 0.8V reference voltage output pin (APC). Output pin 1 after selection of each error signal. Output pin 2 after selection of each error signal. Analog monitor 0. Analog monitor 1. Analog monitor 2. Power supply pin for LPC (5.0V) DAC electric current output pin for READ. DAC electric current output pin 1 for WRITE. DAC electric current output pin 2 for WRITE. DAC electric current output pin 3 for WRITE. GND pin for LPC. Capacitor connection pin for LPC/DAC LPF. Capacitor connection pin for reference voltage setting. Power supply pin for LPC (3.3V). Encoder circuit comparator output. Track cross signal output. Power supply pin for CMOS I/F & LOGIC(3.3V) OFTR signal output. BDO output. Ground pin for CMOS I/F. Write gate signal input pin (pull-down) VFO through signal input pin. ROPC mark detection sampling signal innput pin (pull-down) PCA average detection, APC space detection/Playback power detection/ Erase detection sample timing signal input pin(pulldown).
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4-39
Pin no.
41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77
Pin Name
SH2 SH1 FEPIDGT/SH6 SH5 VCC4 LSDAT LSCK LSEN TGCHG NC CHSEL SEN SCK SDAT NC RSEN RSDAT VCC52 GND4 ASENV/LPPM LPPS CLUMPGT WBL NC EQOUTA EQOUTB VCC22 FLTAMP PAD0 PAD1 PAD2 PAD3 NC NCCWBLHPF1 CWBLHPF2 NC
Type
I I I I PS I/O I I I I I I I/O I I PS PS O O I O O O PS I I I I I I I -
Function
PCA peak/bottom detection, APC space detection/ Playback power detection/Erase detection sample timing signal input pin (pulldown) ROPC space detection, APC space detection/ Playback power detection sample timing signal input pin(pulldown). CAPA through signal input pin/servo sampling signal input pin (pull-down) Sample-and-hold timing signal input pin of wobble S/H at recording (pull-down) Power supply pin for internal LOGIC (5.0V) Serial data input for LPC. Serial clock enable input LPC. Serial enable input for LPC. LPC DAC bank change control signal input pin. Serial MPX channel change data input pin. Serial enable input pin for FEP (pull-down) Serial clock input pin for FEP (pull-up). Serial data input pin for FEP. Serial enable input for RF (pull-down). Serial signal data input for RF Power supply pin for CMOS I/F & internal current source power supply pin2 (3.3V) Ground pin for internal LOGIC ASENV output/LPP mark output pin LPP space output pin RFAGC input bias circuit clamp setting input pin (pulldown) WBL binary output Equalizer filter output pin 1. Equalizer filter output pin 2. Power supply pin for RFEQ/LPP (5.0V) Filter final stage AMP reference voltage stabilization pin. A/D input pin 0 A/D input pin 1 A/D input pin 2 A/D input pin 3 HPF capacitor connection pin for WBLAGC 1. HPF capacitor connection pin for WBLAGC 2. -
4-40
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Pin no.
78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117
Pin Name
RFIN2 RFIN1 HDVREF CLPPPH CLPPHPF RFOUT NC AIDENV/WBLDIF CDRF RFA RFB CWBLBUF CWBLCMP CRWAGC CRWCMP CWBLVGA2 CWAGC2 CWAGC1 VCC21 NC NC NC GND2 AIN BIN CIN DIN VCC6 EIN FIN VCC1 GIN HIN GND1 SVREF CPCAPH CPCABH NC VHALF CTC2
Type
I I O I I O O I I I I I I I I I I PS PS I I I I PS I I PS I I PS I I I I O I RFAGC signal input pin 2. RFAGC signal input pin 1.
Function
2.2V reference voltage output pin. Capacitor connection pin for LPP peak hold Capacitor connection pin for LPPHPF RF signal output pin. ASENV binary output/Differential signal output pin for ADIP detection CD RF signal input pin. DVD RF differential input pin 1. DVD RF differential input pin 2. Capacitor connection pin for WBLDIF. Floating Capacitor connection pin for VGA before WBL binary. AGC adjustment capacitor connection pin for +RW. Floating Capacitor connection pin for VGA before WBLDIF AGC. Floating Capacitor connection pin for VGA before SRL. AGC adjustment capacitor connection pin 2 for WBL extraction. AGC adjustment capacitor connection pin 1 for WBL extraction. Power supply pin for RF gene/WBL (5.0V) DVD Tracking input pin 1. DVD Tracking input pin 2. DVD Tracking input pin 3. DVD Tracking input pin 4. Power supply pin for DPD (3.3V) CD main signal input pin 1. CD main signal input pin 2. Power supply pin for INPUT MATRIX/SERVO (5.0V) CD servo signal input pin 1. CD servo signal input pin 2. Ground pin for INPUT MATRIX/SERVO/DPD. OEIC signal reference level input pin. PCA pick hold capacitor connection pin. PCA bottom bold capactior connection pin. Reference voltage output pin 1/2 VCC (3.3V). Floating capacitor connection pin for tracking error binary.
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4-41
Pin no.
118 119 120 121 122 123 124 125 126 127 128
Pin Name
CTC1 CBDOS CBDOF VCC3 VREF25 VPD VREFPD GND3 PO6 PO5 PO4
Type
I I I PS O I I PS O O O
Function
Capacitor connection pin for TC HPF. Capacitor connection pin for BDO detecting circuit LPF. Capacitor connection pin for BDO detecting circuit Pick detection. Power supply pin for APC/OPC/ASENV (5.0V). 2.5V reference voltage output pin. DVD front monitor signal input pin. Front light system reference level input pin. Ground pin for APC/OPC/ASENV. Ground CMOS output pin 6. Ground CMOS output pin 5. Ground CMOS output pin 4.
I : Input pin
O: Output pin
4-42
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109
AVDD33DRC EQOUTA EQOUTB REGDRC REFBTM REFTOP CDA1 AVDD33A AVSSA SE01 SE02 AVDD33D1 CPOP1 CPOP2 AVSSD1 RVI VREFH TC OFTR VDD12 VSS VDD3 BDO WTGT WIDGT SH3 SH2 SH1 FEPIDGT SH5 LSDAT LSCK LSEN TGCHG CHSEL VSS
AVSSDRC AIDENV REFMDLA AVDD_RX AVSS_RX AVSS_TX AVDD_TX MSTPOL MASTER NRESET HDD7 HDD8 HDD6 HDD9 VSS VDD3 HDD5 HDD10 HDD4 HDD11 HDD3 HDD12 HDD2 HDD13 VDD3 VSS HDD1 HDD14 HDD0 HDD15 DMARQ NIOWR NIORD IORDY NDMACK INTRQ
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
NPK3MD PK3MD NPK2MD PK2MD NPKMD PKMD NBSMD BSMD VDD3 P06 VDD5 VDD3 VDD12 VDD18 VSS LDDENA P02 VPPEX SEN P30 SCK NRST SDAT RSEN RSDAT P04 ASENV LPPS VDD12 VDD3 VSS PWM4 PWM3B PWM3A PLM2B PWM2A
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
NIOCS16 DA1 VDD3 VSS NPDIAG DA0 DA2 NCS1FX NCS3FX NDASP DRAMVDD12D DASPST NEJECT TRYLOAD PVPPDRAM TRCCLK TRCST SCLOCK SDATA P14 P15 FMSW VDD3 OSCO OSCI VSS WBL CLUMPGT FG DRAMVDD3 DRAMVDD12D VHALF PWM0A PWM0B PWM1A PWM1B
37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72
4-43
FEP
DRC CIRC
DVD Formatter
ATAPI I/F
HOST
DMA bus
LDD
ANALOG CD Write ODC (ECC command) eDRAM I/F
FEP
eDRAM 16 Mbit
SERVO
System I/F
Clock Generator
16.9 MHz
debugger
On-Chip Debugger
32 bit CPU
Bus control
Resistor bus
Watchdog Timer
Interrupt ion
Timer
GeneralPurpose Ports
PWM
Serial I/F
4-44
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Pin Table
Pin Number
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
Pin Name
AVSSDRC AIDENV WBLDIF REFMDLA AVDD_RX AVSS_RX AVSS_TX AVDD_TX MSTPOL TRCDATA 1 P17 MASTER P23 NRESET HDD7 HDD8 HDD6 HDD9 VSS VDD3 HDD5 HDD10 HDD4 HDD11 HDD3 HDD12 HDD2 HDD13 VDD3 VSS HDD1 HDD14 HDD0 HDD15 DMARQ NIOWR NIORD IORDY NDMACK
I/O
GND I O Power supply GND GND Power supply I/O I/O I I/O I/O I/O I/O GND Power supply I/O I/O I/O I/O I/O I/O I/O I/O Power supply GND I/O I/O I/O I/O O I/O I/O O I
Connection Target
GND FEP Cap Power supply GND GND Power supply HOST HOST HOST HOST HOST HOST GND Power supply HOST HOST HOST HOST HOST HOST HOST HOST Power supply GND HOST HOST HOST HOST HOST HOST HOST HOST HOST DRC analog Vss TE signal for DVD-RAM
Description
ADIP detector signal input Analog-to-digital converter reference voltage for ADIP Analog power supply (3.3V) Analog ground Analog ground Analog power supply (3.3V) MASTER pin polarity switch Trace data 1 General-purpose I/O (GIO/PWM1) ATAPI master/slave signal General-purpose I/O (GIO/TxD0/PWM0) ATAPI reset signal ATAPI data I/O ATAPI data I/O ATAPI data I/O ATAPI data I/O Digital Vss I/O pad VDD (3.3V) ATAPI data I/O ATAPI data I/O ATAPI data I/O ATAPI data I/O ATAPI data I/O ATAPI data I/O ATAPI data I/O ATAPI data I/O I/O pad VDD (3.3V) Digital Vss ATAPI data I/O ATAPI data I/O ATAPI data I/O ATAPI data I/O DMA request to ATAPI host ATAPI host write signal ATAPI host read signal Ready signal to ATAPI host ATAPI host DMA acknowledge signal
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4-45
Pin Number
36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56
Pin Name
INTRQ NIOCS16 P22 DA1 VDD3 VSS NPDIAG DA0 DA2 NCS1FX NCS3FX NDASP DASPST TRCDATA0 P16 NEJECT P25 TRYLOAD P26
I/O
O I/O I Power supply GND I/O I I I I I/O
Connection Target
HOST HOST HOST Power supply GND HOST HOST HOST HOST HOST HOST Power supply Mecha Mecha Cap -
Description
ATAPI Interrupt request to ATAPI host ATAPI host bus width select signal General-purpose I/O (GIO) ATAPI host daddress signal input I/O pad VDD (3.3V) Digital Vss Diagnostic signal from ATAPI slave to master ATAPI host address signal ATAPI host address signal ATAPI host chip select signal ATAPI host chip select signal ATAPI host chip select signal DRAM VDD (1.2V) DASP setting Trace data 0 General-purpose I/O (GIO/PWM0) Tray eject signal (SODC external interrupt) General-purpose I/O (GIO) Tray eject signal (SODC external interrupt) General-purpose I/O (GIO) DRAM internal power supply output Trace clock General-purpose I/O (GIO/TxD0/PWM0) Trace status General-purpose I/O (GIO/RxT0/PWM1) Debugger clock Debugger data General-purpose I/O(GIO/SerialCLK0/PWM0/external interrupt 3) Trace data 2 Trigger 1 General-purpose I/O(GIO/RxD0/PWM1/external interrupt 4) Trace data 3 Trigger 2 Power monitor detector multiplier conversion signal General-purpose I/O (GIO) Oscillator output Oscillator input (16.9344 MHz) Digital Vss Wobble binary signal
PVPPDRAM Power supply TRCCLK P20 TRCST P21 SCLOCK SDATA P14 TRCDATA2 EXTRIG1 P15 I/O I/O I/O I/O I/O
57 58 60 61 62 63
4-46
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Pin Number
64 65 66 67 68 69 70 71 72 73
Pin Name
CLUMPGT FG
I/O
O I
Connection Target
FEP DRIVER Power supply Power supply FEP DRIVER DRIVER DRIVER DRIVER DRIVER Spindle FG input DRAM VDD (3.3V) DRAM VDD (1.2V)
Description
RF AGC bias circuit clamp signal
DRAMVDD3 Power supply DRAMVDD12D Power supply VHALF PWM0A PWM0B P10 PWM1A PWM1B P11 PWM2A P27 PWM2B I/O O I/O I/O O I/O
Drive pin central reference voltage input Focus drive differential PWM+ output, focus drive BSDA output. Focus drive differential PWM- output General-purpose I/O (GIO/TxD0/SerialCLK0/PMW0) Focus 2 (tilt) drive differential PWM+ output, focus 2 drive BSDA output. Focus 3 (tilt) drive differential PWM-output General-purpose I/O (GIO/RxD0/PWM1) Tracking drive differential PWM+ output, tracking drive BSDA output General-purpose I/O (GIO/PWM0)
DRIVER I/O I/O I/O O GND Power supply Power supply I I I/O I/O O I/O I Power supply I/O O HOST DRIVER DRIVER DRIVER GND Power supply Power supply FEP FEP Mache FEP FEP FEP Reset Power supply FEP
Tracking drive differential PWM - output IEC60958-compliant digital output General-purpose I/O (GIO/TxD0) Traverse drive differential PWM+ output, stepper 1 drive output General-purpose I/O (GIO/PWM0) Traverse drive differential PWM- output, stepper 2 drive output General-purpose I/O (GIO/RxD0/PWM1) Spindle drive output Digital Vss I/O pad VDD (3.3V) Internal logic VDD(1.2V) LPP space input ASENV input LPP mark input General-purpose I/O (GIO/TxD0/PWM1/external interrupt 1) Inner limit switch input FEP serial interface data 2 (RF) FEP serial interface enable 2 (RF) FEP serial interface data IC Reset input (power on reset) I/O pad VDD(3.3) General-purpose I/O (GIO/TxD1) FEP serial interface enable
74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90
TX P12 PWM3A P31 PWM3B P31 PWM4 VSS VDD3 VDD12 LPPS ASENV LPPM P04 GENE0 RSDAT RSEN SDAT NRST VDD3 P30 SEN
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4-47
Pin Number
91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107
Pin Name
VPPEX P02 NLDERR LDDENA VSS VDD18 VDD12 VDD3 VDD5 P06 HFON VDD3 BSMD NBSMD PKMD NPKMD PK2MD NPK2MD PK3MD SRF1 P00 NPK3MD
I/O
Power supply I/O O GND Power supply Power supply Power supply Power supply I/O Power supply O O O O O O I/O
Connection Target
Power supply PU PU GND Power supply Power supply Power supply Power supply PU Power supply PU PU PU PU PU PU PU -
Description
Flash memory power supply Vpp General-purpose I/O (GIO/RxD0/PWM0/external interrupt 0) Laser error detection signal LDD enable signal Digital Vss Flash memory power supply Vpp Internal logic VDD (1.2V) I/O pad VDD (1.2V) DRAm VDD (5.0V) General-purpose I/O (GIO/RxD0/PWM1/external interrupt 2) External high frequency module (HFM) ON/OFF I/O pad VDD (1.2V) BIAS modulation signal differential current output NBIAS modulation signal differential current output PEAK1 modulation signal differential current output NPEAK1 modulation signal differential current output PEAK2 modulation signal differential current output NPEAK2 modulation signal differential current output PEAK3 modulation signal differential current output OEIC gain switching timing adjustment 1 (when using external WTST) General-purpose I/O (GIO/TxD0/PWM0) NPEAK3 modulation signal differential current output OEIC gain switching timing adjustment 2 (when using external WTST) General-purpose I/O (GIO/RxD0/PWM1) Digital Vss Serial MPX channel conversion data output signal Test mode selection signal(Do not connect to a pull-up resistor or similar part.) Write power switch signal General-purpose I/O (GIO) LDD serial interface enable LDD serial interface clock LDD serial interface data Write WOBBLE sample and hold sampling signal CAPA punch out signal Servo S/H sample signal General-purpose I/O (GIO/SerialCLK1)
108
SRF2 P01
I/O
PU -
109 110
GND I/O
GND FEP -
4-48
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Pin Number
117 118 119
Pin Name
SH1 SH2 SH3 WIDGT
I/O
I/O I/O I/O
Connection Target
FEP FEP FEP
Description
Sample timing signal for ROPC space detection, APC space detection, and read power detection Sample timing signal for PCA peak, bottom detection, APC peak detection, and mean valuer detection Sample timing signal for PCA mean value detection, APC space detection, and read power detection, and erase detection VFO punch out signal
120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144
SH4 P24 WTGT BDO VDD3 VSS VDD12 OFTR TC VREFH RVI AVSSD1 CPOP2 CPOP1 AVDD33DI SE02 SE01 AVSSA AVDD33A CDA1 REFTOP REFBTM REGDRC EQOUTB EQOUTA
I/O O I Power supply GND Power supply I I I I/O GND I/O I/O Power supply I I GND Power supply O O O O I I
FEP FEP FEP Power supply GND Power supply FEP FEP FEP Res. GND Cap. Res. Cap. Res. Power supply FEP FEP E GND Power supply Cap Cap Cap Cap FEP FEP Power supply
ROPC mark detection sampling signal General-purpose I/O (GIO/TxD1) Write gate Dropout signal input I/O pad VDD (3.3V) Digital Vss Internal logic VDD (1.2V) Off track signal input Track crossing signal input 2.2V reference voltage input Fixed current source for LVDS, WBL, and analog blocks WOBBLE analog Vss Filter connection pin for wobble PLL Filter connection pin for wobble PLL WOBBLE analog VDD (3.3V) Error signal output after selection, analog input rror signal output after selection, analog input Servo analog-to-digital converter analog Vss Servo analog-to-digital converter analog VDD (3.3V) Smoothing capacitance for DRC-VCO Analog-to-digital converter reference voltage for DRC (TOP) Analog-to-digital converter reference voltage for DRC (BOTTOM) DRC analog-to-digital converter analog VDD (1.2V) Internal regurator output RF differential signal (NEG) RF differential signal (POS) DRC analog-to-digital converter analog VDD (3.3 V)
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4-49
Pin Function
No Pin name 1 GND 2 DVcc 3 TLIN 4 AVM 5 TKIN 6 FCIN 7 FCO+ 8 FCO9 TKO+ 10 TKO11 TLO+ 12 TLO13 AGND 14 LDO+ 15 LDO16 CTL1 17 CTL2 18 LDVM 19 Vcc 20 LDIN 21 PRTRST 22 PRTFLG Description GND PWM block control power supply Tilt motor driver input Actuator driver block power supply Tracking driver input Focus driver input Focus driver inverted output Focus driver non-inverted output Tilt driver inverted output Tilt driver non-inverted output Tracking driver inverted output Tracking driver non-inverted output BTL driver GND Loading driver inverted output Loading driver non-inverted output Loading driver control input Loading driver control input Loading driver power supply Power supply Loading driver input Protect input Protect flag output No Pin name 23 SLVM 24 VC 25 SLIN2 26 SLIN1 27 LRPM 28 SLLIM 29 SLO230 SLO2+ 31 SLO132 SLO1+ 33 SLGND 34 SPGND 35 V 36 W 37 U 38 SPLIM 39 SPIN 40 C_COM 41 C_OUT 42 COM 43 FG 44 SPVM Description Motor driver power supply Reference voltage input Motor driver input2 Motor driver input1 Low speed rotational motor transfer terminal Input terminal for slide current limit Motor driver 2 non-inverted output Motor driver 2 inverted output Motor driver 1 non-inverted output Motor driver 1 inverted output Motor driver power supply GND Spindle driver power supply GND Spindle driver output V Spindle driver output W Spindle driver output U Input terminal for spindle current limit Spindle control voltage input Condenser connection terminal (com) Condenser connection terminal (OUT) Motor coil input terminal FG signal output Spindle driver Power supply
22 23 SLVM
20 25 SLIN2
19 26 SLIN1
LRPM
18 27 LRPM
17 28 SLLIM
STBY BRAKE CONTROL LEVEL SHIFT LEVEL SHIFT LEVEL SHIFT LEVEL SHIFT
16
FF
PRE LOGIC
15 30 SLO2+
14
FF
PRE LOGIC
13 32
TSD
12
OSC
LOGIC BEMF DETECTER
11
10
PROTECT
CURRENT SENSE
31
43
29 SLO2-
33
34
35
36 W
37
38
39
40 C_COM
41 C_OUT
42
44
FG
SLO1-
SLO1+
SLGND
4-50
SPGND
SPLIM
SPIN
COM
SPVM
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Spindle motor
Optical pick-up
Sled motor
BLOCK DIAGRAM
4-51
MEMO
4-52
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
CIRCUIT DIAGRAM
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4-53
4-54
LIC101
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 3.32 0.00 0.00 0.00 0.00 3.32 0.00 3.21 3.32 0.00 0.00 3.32 3.51 0.00 2.22 1.67 0.82 2.09 1.60 0.85 0.82 0.65 4.97 0.00 0.00 0.00 0.00 0.00 0.00 1.00 3.32 0.00 3.32 3.32 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0 4.97 pulse pulse pulse 3.31 0.00 pulse pulse
PIN NO. VOLTAGE 53 pulse 54 pulse 55 0.00 56 pulse 57 pulse 58 3.32 59 0.00 60 3.32 61 3.32 62 0.00 63 0.00 64 0.00 65 2.04 66 2.04 67 4.97 68 2.21 69 1.20 70 0.65 71 0.85 72 0.82 73 0.00 74 0.00 75 0.00 76 0.00 77 0.00 78 0.00 79 2.18 80 2.22 81 0.00 82 2.20 83 2.22 84 0.00 85 0.00 86 2.22 87 2.18 88 2.18 89 0.00 90 2.23 91 1.62 92 1.58 93 1.59 94 0.00 95 0.00 96 4.97 97 0.00 98 0.00 99 0.00 100 0.00 101 1.80 102 1.78 103 1.77 104 1.80 105 3.32
PIN NO. VOLTAGE 106 1.76 107 1.73 108 4.97 109 1.74 110 1.75 111 0.00 112 1.67 113 0.00 114 0.00 115 0.00 116 1.67 117 2.28 118 2.21 119 3.08 120 4.10 121 4.97 122 2.51 123 2.49 124 2.51 125 0.00 126 0.00 127 3.28 128 3.28
LIC201
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 0.00 2.00 3.31 3.31 0.00 0.00 3.31 3.30 0.00 3.30 pulse pulse pulse pulse 0.00 3.29 pulse pulse pulse pulse pulse pulse pulse pulse 3.28 0.00 pulse pulse pulse
PIN NO. VOLTAGE 30 pulse 31 pulse 32 pulse 33 pulse 34 pulse 35 pulse 36 pulse 37 4.94 38 3.27 39 3.28 40 0.00 41 4.95 42 3.27 43 3.27 44 pulse 45 3.27 46 4.94 47 1.18 48 0.00 49 3.28 50 0.00 51 2.63 52 0.00 53 0.00 54 3.27 55 3.27 56 0.00 57 3.28 58 0.00 59 3.29 60 OSC 61 OSC 62 0.00 63 0.00 64 0.00 65 pulse 66 3.29 67 1.19 68 1.65 69 1.63 70 1.64 71 1.64 72 0.00 73 1.64 74 0.00 75 1.66 76 1.97 77 1.85 78 0.00 79 3.29 80 1.20 81 3.33 82 3.33
PIN NO. VOLTAGE 83 3.33 84 pulse 85 pulse 86 pulse 87 3.17 88 pulse 89 0.00 90 pulse 91 3.33 92 3.32 93 3.32 94 0.00 95 1.80 96 1.19 97 3.27 98 4.94 99 3.30 100 3.28 101 1.39 102 1.00 103 1.39 104 1.00 105 1.39 106 0.98 107 1.00 108 1.40 109 0.00 110 pulse 111 3.31 112 pulse 113 pulse 114 pulse 115 3.31 116 0.00 117 0.00 118 0.00 119 0.00 120 0.00 121 0.00 122 0.00 123 3.28 124 0.00 125 1.19 126 0.00 127 3.28 128 2.21 129 1.50 130 0.00 131 0.00 132 0.00 133 3.31 134 1.60 135 2.08
PIN NO. VOLTAGE 136 0.00 137 3.31 138 0.83 139 2.27 140 1.76 141 1.26 142 2.00 143 2.00 144 3.30
LIC601
1.GND 2.VOUT 3.VIN 1.GND 2.VOUT 3.VIN 0.00 1.20 3.30 0.00 3.30 4.95
LIC701
LIC301
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 0.00 4.88 1.65 4.88 1.65 1.65 2.45 2.54 2.45 2.54 2.48 2.49 0.00 6.00 6.00 3.26 3.26 12.50 12.50 1.65 0.00 0.00 12.50 1.66 1.70 1.71 0.00 1.17 12.50 12.50 12.50 12.50 0.00 0.00 PULSE PULSE PULSE 1.12 1.76 PULSE PULSE PULSE PULSE
4-55
4-56
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes
4-57
4-58
4-59
4-60
Copyright 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes