Mod5213PulseWidthModulationModule ApplicationNote

Revision1.0 January30,2006 DocumentStatus:InitialRelease

TableofContents
Introduction PWMModuleRegisters PWMEnableRegister(PWME) PWMPolarityRegister(PWMPOL) PWMClockSelectRegister(PWMCLK) PWMPrescaleClockSelectRegister(PWMCAE) PWMCenterAlignEnableRegister(PWMCAE) PWMControlRegister(PWMCTL) PWMScaleARegister(PWMSCLA) PWMScaleBRegister(PWMSCLB) PWMChannelCounterRegister(PWMCNT) PWMChannelPeriodRegister(PWMPER) PWMChannelDutyRegister(PWMDTY) PWMShutdownRegister(PWMSDN) PinAssignmentConfiguration ProgramExample 3 3 3 4 4 4 5 5 6 6 7 7 8 8 9 10

Introduction
The pulse width modulation (PWM) module for the Mod5213 generates a synchronous series of pulses having programmable periods and duty cycles. It contains eight independent channels (PWM[7:0]), and each channel can be configured by multiple registersavailableinthePWMmodule. Withasuitablelowpassfilter,thePWMcanbe usedasadigitaltoanalogconverter. This application note will provide a briefexplanation of each register that is contained within the PWM module, and show how to configure and use the correct pins on the Mod5213 for PWM functionality. A program example that demonstrates pulse width modulation is also provided at the end of this document. For additional detailed informationontheMCF5213PWMmoduleanditsregisters,pleaserefertoChapter24 oftheMCF5213ReferenceManual(Revision1.2).

PWMModuleRegisters
The following 8bit registers below allow for the configuration of the eight channels availableinthePWMmodule.Eachchannelhasitsownsetofcounter,period,andduty registers. Therecanbeeightchannelswith8bitchannelregistersorfourchannelswith 16bit channel registers for higher resolutions, depending on how the PWM Control Registerisset.

PWMEnableRegister(PWME) EachPWMchannelhasanenablebitinthisregistertostartitswaveformoutput.While inrun mode, if alleightPWMoutputchannelsaredisabled,theprescalercountershuts off for power savings. If a bit is set/enabled, the associated PWM channel signal becomes available when its corresponding clock source begins its next cycle. See Section24.2.1oftheMCF5213ReferenceManualformoreinformation. ForPWME[7:0] 0disablesPWMoutput,and1enablesPWMoutput.

PWMPolarityRegister(PWMPOL) ThestartingpolarityofeachPWMchannelwaveformisdeterminedbytheassociatedbit. If the polarity is changed while a PWM signal is being generated, then a truncated or stretched pulse can occur during the transition. See Section 24.2.2 of the MCF5213 ReferenceManualformoreinformation. For PWMPOL[7:0] 0 sets a PWM channels output low at the beginning of the period,thengoeshighwhenthedutycountisreached.1setsaPWMchannelsoutput highatthebeginningoftheperiod,thengoeslowwhenthedutycountisreached.

PWMClockSelectRegister(PWMCLK) EachPWMchannelhasthecapabilityofselectingoneoftwoclocks.Forchannels0,1, 4,and5,theclockchoicesareclockAorSA(ScaleA).Forchannels2,3,6,and7,the choicesareclockBorSB(ScaleB).Theclockselectionisdonebysettingbitsforthe associatedchannels.IfaclockselectischangedwhileaPWMsignalisbeinggenerated, atruncatedorstretchedpulsecanoccurduringthetransition. ForPWMCLK[7:0]0setsaPWMchanneltouseaA/Bclocksource,and1setsa PWM channel to use a SA/SB clock source. See Section 24.2.3 of the MCF5213 ReferenceManualformoreinformation. PWMPrescaleClockSelectRegister(PWMPRCLK) ThisregisterselectstheprescaleclocksourceforclocksAandBindependently.Ifthe clock prescale is changed while a PWM signal is being generated, a truncated or stretched pulse can occur during the transition. See Section 24.2.4 of the MCF5213 ReferenceManualformoreinformation. ForPWMPRCLK[2:0]ThesethreebitscontroltherateofclockAwhichcanbeused 0 for PWM channels 0, 1, 4, and 5. 000 divides the internal bus clock by 2 , 001 1 7 dividesitby2 ,andsoforthuntil111whichdividesitby2 . ForPWMPRCLK[6:4]ThesethreebitscontroltherateofclockBwhichcanbeused forPWMchannels2,3,6,and7.ItissetinthesamewayasthatforclockAabove.

PWMCenterAlignEnableRegister(PWMCAE) The PWMCAE register contains eight control bits for the selection of centeraligned outputs or leftaligned outputs for each PWM channel. Write thse bits only when the corresponding channel is disabled. See Section 24.2.5 of the MCF5213 Reference Manualformoreinformation. For PWMCAE[7:0] 0 configures the associated channel to operate in leftaligned outputmode,and1configuresittooperateincenteralignedoutputmode. PWMControlRegister(PWMCTL) The PWMCTL register provides various control of the PWM module. Change the CONn(n+1)bitsonlywhencorrespondingchannelsaredisabled. Whentwochannelsare concatenated,theevennumberedchannelbecomesthehighorderbyteandtheassociated oddnumberedchannelbecomesthelowerorderbyte.Theoddnumberedchannelisthe outputforthe16bitPWMsignal,andtheassociatedevennumberedchannelisdisabled. Configuration for the 16bit channel are done through the oddnumbered channel. See Section24.2.6oftheMCF5213ReferenceManualformoreinformation. For PWMCTL[7] CON67 0 sets channels 6 and 7 as separate 8bit PWMs. 1 concatenateschannels6and7toformone16bitPWMchannel. For PWMCTL[6] CON45 0 sets channels 4 and 5 as separate 8bit PWMs. 1 concatenateschannels4and5toformone16bitPWMchannel. For PWMCTL[5] CON23 0 sets channels 2 and 3 as separate 8bit PWMs. 1 concatenateschannels2and3toformone16bitPWMchannel. For PWMCTL[4] CON01 0 sets channels 0 and 1 as separate 8bit PWMs. 1 concatenateschannels0and1toformone16bitPWMchannel. ForPWMCTL[3]0allowstheclocktotheprescalerwhile indozemode.1stops theinputclocktotheprescalerwheneverthecoreisindozemode. ForPWMCTL[2]0allowsthePWMcounterstocontinuewhileindebugmode.1 disablesthePWMinputclocktotheprescalerwhenthecoreisindebugmode.Useful foremulationasitallowsthePWMfunctiontobesuspended.

PWMScaleARegister(PWMSCLA) PWMSCLA istheprogrammablescale valueused inscalingclock Atogenerateclock SA.ClockSAisgeneratedwiththefollowingequation:

ClockSA=[ClockA/(2xPWMSCLA)]

Anyvaluewrittentothisregisterwillcausethescalecountertoloadthenewscalevalue (PWMSCLA). See Section 24.2.7 of the MCF5213 Reference Manual for more information. For PWMSCLA[7:0] All seven bits are used in inputting part of the divisor value to form clockSA from clock A,as indicatedbythe formulaabove forclockSA. 0x00 represents the value 256, 0x01 is 1, 0x02 is 2, and so forth until 0xFF, which is 255. PWMScaleBRegister(PWMSCLB) PWMSCLB is the programmable scale value used in scaling clock B to generate clock SB.ClockSBisgeneratedwiththefollowingequation:
ClockSB=[ClockB/(2xPWMSCLB)]

Anyvaluewrittentothisregisterwillcausethescalecountertoloadthenewscalevalue (PWMSCLB). See Section 24.2.8 of the MCF5213 Reference Manual for more information. For PWMSCLB[7:0] All seven bits are used in inputting part of the divisor value to form clock SB from clock B, as indicated by the formula above for clock SB. 0x00 represents the value 256, 0x01 is 1, 0x02 is 2, and so forth until 0xFF, which is 255.

PWMChannelCounterRegisters(PWMCNT) Each channel has a dedicated 8bit up/down counter that runs at the rate of a selected clocksource.Theusercanreadthecountersatanytimewithoutaffectingthecountor theoperationofthePWMchannel.Anyvaluewrittentothecountercausesthecounter to reset to 0x00, the counter direction to be set to up for centeraligned mode, the immediate load of both duty and period registers with values from the buffers, and the outputtochangeaccordingtothepolaritybit. The counter is also cleared at the end of the effective period. When the channel is disabled,theassociatedPWMCNTregisterdoesnotcount.Whenachannelisenabled, the associated PWM counter starts atthe count in the PWMCNT register. SeeSection 24.2.9oftheMCF5213ReferenceManualformoreinformation. For PWMCNT[7:0] Current value of the PWM up counter. Resets to zero when written.EachchannelhasitsownPWMCNTregister.

PWMChannelPeriodRegisters(PWMPER) The PWM period registers determine the period of the associated PWM channel. Calculatingtheoutputperioddependsontheoutputmode(centeraligned hastwicethe periodasleftalignedmode)aswellasPWMPER:
PWMperiod=Channelclockperiodx(PWMCAE[CAEn]+1)xPWMPERn

SeeSection24.2.10 oftheMCF5213ReferenceManualformoreinformation. ForPWMPER[7:0]ThevaluewrittentothisregisterrepresentsthePWMperiodofthe associatedchannel. Whenthecounterreachesthis value, itresetsto0x00(leftaligned mode),orcountsdown(centeralignedmode).

PWMChannelDutyRegisters(PWMDTY) ThePWMdutyregistersdeterminethedutycycleoftheassociatedPWMchannel.To calculate the output duty cycle (high time as a percentage of period) for a particular channel:
DutyCycle=|(1PWMPOL[PPOLn](PWMDTYn/PWMPERn)|x100%

SeeSection24.2.11oftheMCF5213ReferenceManualformoreinformation. ForPWMDTY[7:0]ThevaluewrittentothisregisterrepresentsthePWMdutycycle. Whenthecounterreachesthisvalue,thesignalgoeshigh(ifpolaritybitwas0)orgoes low(ifpolaritybitwas1). PWMShutdownRegister(PWMSDN) The PWM shutdown register provides emergency shutdown functionality of the PWM module. The PWMSDN[7:1] bits are ignored if PWMSDN[SDNEN] is cleared. See Section24.2.12oftheMCF5213ReferenceManualformoreinformation.

PinAssignmentConfiguration
TheGPIOmodulemustbeconfiguredtoenabletheperipheralfunctionoftheappropriate pins prior to configuring the PWM module. On the Mod5213, the PWM pins are 21 through 28withthefollowingassignments: Pin 21:PWMChannel6 Pin 22:PWMChannel4 Pin 23:PWMChannel2 Pin 24:PWMChannel0 Pin 25:PWMChannel7 Pin 26:PWMChannel5 Pin 27:PWMChannel3 Pin 28:PWMChannel1

Configuringthepinscanbedonebydirectlywritingtotheregisters,oritcanbedonevia thePin class. Forexample, ifonewould liketoconfigurepin24 forPWMChannel0 functionalitybywritingdirectlytotheregisters,thenitwouldbewrittenlikethis:

sim.gpio.ptcpar&=0xFC sim.gpio.ptcpar|=0x03

However,youwouldneedtoknowwhatregistertowriteto,aswellasknowwhatbitsto setinordertocorrectlyconfigureforPWMfunctionality.ThePinclassexiststoavoid thishassle.Thefollowingexampleshowstheequivalentofconfiguringpin24through theusageofthePinclass:

Pins[24].function(PIN24_PWM0)

Theinformationthatneedstobeknownisthepintobeconfigured(pin24)andthetype offunctionalityrequiredforthatpin(PIN24_PWM0). Thelistoffunctionalitiesavailable for each pin can be found in the pinconstant.h file of the \Nburn\MOD5213\include directory.

ProgramExample
/*********************************************************************/ /*Thisexampleprogramexercisesthepulsewidthmodulation*/ /*moduleintheMCF5213CPU.Whenrunningthisprogramonthe*/ /*MOD5213,thereshouldbeanoutputfrequencyofabout829.4kHz*/ /*onpin24(useofanoscilloscopetomeasurethisis */ /*recommended). Toachievethisvaluethroughcalculation, */ /*considerthefollowingcase: */ /**/ /*TheCPUfrequencyoftheMCF5213is66.3552Mhz.Theinternal*/ /*busclockisdeterminedbydividingthisvalueby2.Therefore,*/ /*theinternalbusclockis33.1776Mhz.Channel0isprogrammed*/ /*touseclockSA,sotheinternalbusclockpassesthrougha */ /*divisorprescalerofclockA,andthenthroughanadditional*/ /*divisorprescalerofclockSA,whichisthenagainfurther*/ /*dividedby2.Afterdividingtheresultingfrequencybythe*/ /*valuepresentinthechannelperiodregister(5),yougetthe*/ /*outputfrequencyonpin24.*/ /**/ /*Thedutycyclevalueinthechanneldutyregisteris3.When*/ /* thePWMcountermatchesthedutyregister,theoutputflipflop*/ /*changesstatecausingthePWMwaveformtoalsochangestate.*/ /*Thedutycyclewiththecurrentconfigurationis:*/ /* */ /*DutyCycle=(1PWMPOL[PPOLn](PWMDTYn/PWMPERn))x100%*/ /*=(1 0 (3/5))x100%*/ /*=40%*/ /*********************************************************************/ #include"predef.h" #include<stdio.h> #include<ctype.h> #include<basictypes.h> #include<serialirq.h> #include<system.h> #include<constants.h> #include<ucos.h> #include<serialupdate.h> #include<pins.h> #include<..\MOD5213\system\sim5213.h> // //InstructtheC++compilernottomanglethefunctionname // extern"C"{ voidUserMain(void*pd) } // //Namefordevelopmenttoolstoidentifythisapplication // constchar*AppName="Mod5213PWMDemo" /////////////////////////////////////////////////////////////////////// //UserMainMaintask.

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// voidUserMain(void*pd){ OSChangePrio(MAIN_PRIO) EnableSerialUpdate() SimpleUart(0,SystemBaud) assign_stdio(0) //////////////////////////////////////////////////////////////////// //Configurepin24forPWMChannel0functionality //SetforPWMfunctionality Pins[24].function(PIN24_PWM0) //DisableallPWMchanneloutputbeforemakinganysettings sim.pwm.pwme=0 //Settohaveaninitiallowsignal,thensethighondutyoutput //compare sim.pwm.pwmpol&=~0x01 //SettouseclockSA(ScaleA) sim.pwm.pwmclk|=0x01 //SettouseaclockAprescalevalueof2(InternalBusClock/ //2^1) sim.pwm.pwmprclk|=0x01 //Settooperatechannel0inleftalignedoutputmode sim.pwm.pwmcae&=~0x01 //Allchannelsareindependent8bitchannelsdozeanddebugmode //disabled sim.pwm.pwmctl=0 //Usescaledivisorvalueof2togenerateclockSAfromclockA sim.pwm.pwmscla=0x02 //Writeanyvaluetothisregistertoresetthecounterandstart //offclean sim.pwm.pwmcnt[0]=1 //SetPWMChannel0periodregistertoavalueof5 sim.pwm.pwmper[0]=5 //SetPWMChannel0dutyregistertoavalueof3 sim.pwm.pwmdty[0]=3 //EnablePWMoutputforPWMChannel0 sim.pwm.pwme|=0x01 iprintf("Applicationstarted\r\n") while(1){ OSTimeDly(TICKS_PER_SECOND) } }

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