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This page contains basic input and output instructions and their use in PLC logic
programs. These instructions are used to perform basic tasks such as bit control: ON or
OFF.
Timer/Counter
Instructions
[Introduction Page] [Command Index] [Programming References]
This page contains timer and counter instructions and their use in PLC logic programs.
These instructions are used for timing a process or counting the number of times a process
occurs.
Comparison Instructions
[Introduction Page] [Command Index] [Programming References]
Comparison instructions are used to test pairs of values using one of the eight following
logical operators to determine if a rung is true.
Location of Commands in the Software
Command Table
Command Name Purpose
Test whether one value is within the limit range of two other
LIM Limit Test
values.
Masked Test portions of two values to see whether they are equal.
MEQ Comparison for Compares 16 bit data of a source address to 16 bit data at a
Equal reference address through a mask.
NEQ Not Equal Test whether one value is not equal to a second value.
LES Less Than Test whether one value is less than a second value.
LEQ Less Than or Equal Test whether one value is less than or equal to a second value.
GRT Greater Than Test whether one value is greater than another is.
Greater Than or
GEQ Test whether one value is greater or equal to a second value.
Equal
These instructions are used to convert information, manipulate data in the controller, and
perform logic operations.
Command Table
Command Name Purpose
Convert from Radians Converts radians (source) to degrees and stores the result in
DEG
to Degrees the destination.
Convert from Degrees Converts degrees (source) to radians and stores the result in
RAD
to Radians the destination.
Decode 4 to 1 Decodes a 4-bit value (0 to 15), turning on the
DCD
of 16 corresponding bit in the 16-bit destination.
Command Table
Command Name Purpose
MOV Move Moves the source value to the destination.
Masked Moves data from a source location to a selected portion of the
MVM
Move destination.
AND And Performs a bitwise AND operation.
OR Or Performs a bitwise inclusive OR operation.
XOR Exclusive Or Performs a bitwise exclusive OR operation.
NOT Not Performs a NOT operation.
Command Table
Command Name Purpose
FFL and FIFO Load and The FIFO instructions load words into a file and unload them in
FFU FIFO Unload the same order as they were loaded. The first word in is the first
word out.
The LIFO instructions load words into a file and unload them in
LFL and LIFO Load and
the opposite order as they were loaded. The last word in is the
LFU LIFO Unload
first word out.
Math Instructions
[Introduction Page] [Command Index] [Programming References]
This page contains math instructions and their use in PLC logic programs. Use this page to
create programs that perform mathematical functions such as addition, subtraction, and
trigonometric forms. Most instructions take two input values and perform the function that
is assigned to an output location.
Command Table
Command Name Purpose
ADD Add Adds source A to source B and stores the result in the destination.
Subtracts source B from source A and stores the result in the
SUB Subtract
destination.
MUL Multiply Multiplies source A by source B and stores the result in the destination.
Divides source A by source B and stores the result in the destination
DIV Divide
and the math register.
Square Calculates the square root of the source and places the integer result in
SQR
Root the destination.
CPT Compute Evaluates an expression and stores the result in the destination.
Location of Commands in the Software
Command Table
Command Name Purpose
CLR Clear Sets all bits of a word to zero.
Command Table
Command Name Purpose
COS Cosine Takes the cosine of a number and stores the result in the destination.
SIN Sine Takes the sine of a number and stores the result in the destination.
TAN Tangent Takes the tangent of a number and stores the result in the destination.
Takes the arc sine of a number and and stores the result in (in radians)
ASN Arc Sine
in the destination.
Takes the arc cosine of a number and and stores the result (in radians)
ACS Arc Cosine
in the destination.
Arc Takes the arc tangent of a numberand stores the result (in radians) in
ATN
Tangent the destination.
Shift Register and Sequencer instructions simplify your ladder program by allowing you to
use a single instruction or pair of instructions to perform common complex operations.
Loads a bit of data array, shifts the pattern of data through the array
BSL Bit Shift Left
to the left and unloads the last bit of data in the array.
Loads a bit of data array, shifts the pattern of data through the array
BSR Bit Shift Right
to the right and unloads the last bit of data in the array.
Sequencer Controls sequential machine operation by transfering 16-bit through
SQO
Output a mask to image addresses for controlling outputs.
Sequencer Controls sequential machine operation by transfering 16-bit through
SQC
Compare a mask to image addresses to reference data for monitoring inputs.
Sequencer Capture reference conditions by manually stepping the machine
SQL
Load through its operating sequences.
Use these instructions to control the sequence in which your program is executed. Control
instructions allow you to change the order in which the processor scans a ladder program.
Typically, these instructions are used to minimize scan time, create a more efficient
program, and to troubleshoot a ladder program.
Command Table
Command Name Purpose
JMP Jump to Label Jump forward to the specified label instruction.
Return from
RET Exists current subroutine and returns to previous condition.
Subroutine
TND Temporary End Mark a temporary end that halts program execution.
Master Control
MCR Clears all set outputs between the paired MCR instructions.
Reset
Command Table
Immediate Input with
Program and immediate input with Mask.
IIM Mask
Interrupt the program scan to execute the I/O scan and service
REF Refresh
communications.
Communications Instructions
[Introduction Page] [Command Index] [Programming References]
Command Name Purpose
This instruction transfers data from one Node to another on the
Message Read / communication network. When the instruction is enabled,
MSG
Write message transfer is pending. Actual data transfer takes place at
the scan. (Used with DH+)
When conditions preceding the SVC instruction in the rung are
Service
SVC true, the SVC instruction interrupts the program scan to execute
Communications
the service communication portion of the operating cycle.
Programming References
[Introduction Page] [Command Index]
This page contains a list of SLC processor Status Files, recommends corrective action for
Faults, Guide to Wiring and other information.
The status file lets you monitor how your operating system works and lets you direct how
you want it to work. This is done by using the status file to set up interrupts, load memory
module programs, and monitor both hardware and software faults.
Note:Do not write to status file data unless the word or bit is listed as dynamic/static
configuration in the descriptions that follow. If you intend writing to status file data, it is
imperative that you first understand the function fully.
The status file S: contains the following words:
S:44 I/O Event Interrupt Time (SLC 5/03 and SLC 5/04)
S:1/8 Fault Static When set, this bit causes the controller to at Power
Override at Configuration up Configuration the Major Error Halted bit S:1/13
and Minor error bits S:5/0 to S:5/7 on power up if
the processor had previously been in the REM run
Powerup mode and had faulted. The controller then attempts
to enter the REM Run mode. Set this bit using the
Data Monitor function offline only.
S:1/14 OEM Lock Static Using this bit you can control access to a controller
Configuration file. To program this feature, select Future Access
Disallow when saving your program. When this bit
is set, only an programming device with an
matching copy of the processor file in its memory
can monitor the ladder program, others are denied
access.
File Organization
Program Files
Program files contain controller information, the main ladder program, interrupt
subroutines, and any subroutine programs. These files are:
• System Program (file 0) - This file contains various system related information and user-
programmed information such as processor type, I/O configuration, processor file name,
and password.
• Subroutine Ladder Program (file 3-255) - These files are user-created and accessed
according to subroutine instructions residing in the main ladder program file.
Data Files
Data files contain the status information associated with external I/O and all other
instructions you use in your main and subroutine ladder program files. In addition, these
files store information concerning processor operation. You can also use the files to store
"recipes" and look-up tables if needed. These files are organized by the type of data they
contain. The data file types are:
• Bit (file 3) - This file is used for F8:000 - F8:999 Floating Point File 1 - 1000
internal relay logic storage.
B3:1/0 or B3/16 9 - 999 Files to be assigned 1 - 1000
• Timer (file 4) - This file stores per file
the timer accumulator and preset
values and status bits. T4:0.PRE,
T4:0.ACC, T4:0/DN, T4:0/TT,
T4:0/EN
Direct Addressing
• The data stored in the specified address is used in the instruction. For example:
• N7:0, T4:8.ACC, T4:8.PRE, ST20:5
Indexed Addressing
• You may specify an address as being indexed by placing the "#" character in front of the
address. When an address of this form is encountered in the program, the processor takes
the element number of the address and adds to it the value contained in the Index Register
S:24, then uses the result as the actual address. For example:
• #N7:l0 where S:24= 15, The actual address used by the instruction is N7:25.
Indirect Addressing
• You may specify an address as being indirect by replacing the file number, element
number, or sub-element number with a [Xf:e.s] symbol. The word address inside of the
bracket is queried for a value. The queried value then becomes the file, element, or sub-
element portion of the indirect address. For example: B3:[N 10:2] states that the element
address of Bit file 3 is contained in address N10:2. Therefore, if N10:2 contains the value
5, B3:[N10:2] indirectly refers to address B3:5. Other examples include:
• N7:[N7:0], N[N7:0]:[N7:1], N7[T4:0.ACC], C5:[N7:0]
Troubleshooting Faults
The major error fault code, indicates the probable causes of faults, and recommends
corrective action. The following section describes the different ways to automatically clear
a fault using your programming software.
• Set one of the auto load bits S:1/10, S:1/11, or S:1/12 in the status file of the program in
an EEPROM to automatically transfer a new non-faulted program from the memory
module to RAM when power is cycled.
• Refer to Status Bits for more information on bits S:1/13, S:1/8, S:1/10, S:1/11, S:1/12,
S:5/0-7, and S:36/0-7. You can declare your own application specific major fault by
writing your own unique value to S:6 and then setting hit S:1/I3.
Manually Clearing Faults: SLC Processors
• Manually clear the major fault bit S:1/13, and the minor and major error bits S:5/0-7 in
the status file, using a programming device or a Data Table Access Module. Place the
processor in the REM Program mode. Correct the condition causing the fault, then return
the processor to either REM Run or any of the REM Test modes.
• SLC 5/03 and SLC 5/04 specific - Toggle the key switch from RUN to Progrram and then
back to RUN.
• SLC 5/03 and SLC 5/04 specific - Clearing these bits with the keys witch in the RUN
position causes the processor to immediately enter the Run mode.
• If you are online with a SLC 5/03 or SLC 5/04 processor with the keys witch position is
in RUN and you press the clear major fault function key, you are warned that the
processor will enter the Run mode once you clear the fault
Using the Fault Routine
• When designating a subroutine file, the occurrence of recoverable or non-recoverable
user faults causes the designated subroutine to be executed for one scan. If the fault is
recoverable, the subroutine can be used to correct the problem and clear the fault bit
S:1/13. The processor then continues in the run mode. If the fault is non-recoverable, the
subroutine can send a message via the Message instruction to another DH-485 node with
error code information and/or does an orderly shutdown of the process. The subroutine
does not execute for non-user faults.
Voltages DC Color
24v DC(+) Brown
24v DC(-) Blue
DC grounded circuits White / Blue stripe
Foreign Voltage (Outside the panel) Yellow
Temporary Jumpers Purple (easy to see)
Oddball voltages (Speed Control potentiometer wiring) Violet
Unspecified voltages (relay contact for customer connections) Gray
The allowable Current is Lower than the above stated values when the wire is in conduit,
wireway or ductbank. Go to the NEC for these requirements.
• Most places use 14 AWG minimum for 120 VAC field wiring, regardless of amps.
• Typically, 16 AWG minimum for 24 VDC field control circuits, and 18 AWG shielded
twisted pair for 4-20 mA wires (Belden 1032A or eq.)
• Avoid using 14 or 12 AWG shielded twisted pair for 4-20 mA wiring - it adds nothing in
function, costs more, and is a pain to work with inside instrument enclosures.
• Do not allow wire nuts on 4-20 mA or other analog signal wires - they get loose, they
pick up EMI/RFI, and are just no good. Field splices should only be made at terminal
strips in junction boxes!
• It's important to note any "foreign voltage" on the panel, since "foreign" wires may still
be hot after the panel is powered down and there isn't really a standard.