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Task 1 Open the design Design1. Create a new cell view. Label it CSAmp.

Create a schematic of the following circuit (the NMOS symbol is located in the library named Devices):

Set up a SPICE simulation for a DC sweep. Sweep the input voltage from 0 to 3.3 volts in steps of 0.1 volt. Plot the output voltage vs. the input voltage. On the output curve, determine the bias point (gate voltage) that offers maximum linearity. Find the bias current (drain current) at this point.

Task 2 Modify the circuit above to perform a transient analysis.

The DC voltage on the gate is changed to a sinusoidal voltage. The parameters for the sinusoidal voltage should be as follows: DC offset : Bias point determined in task 1 Sine wave peak : 0.1 V Frequency : 100 kHz

The SPICE simulation should be set up for a transient analysis as follows: Stop time : 100 us Time step : 1 us Plot both the input voltage and the output voltage. Find the peak-to-peak value of the output voltage. Hence determine the voltage gain.

Task 3 Modify the above circuit to perform an AC analysis. Hence determine the open loop gain of the common source amplifier in dB.

Remove the sinusoidal source and replace with an AC source. The DC offset should be the bias point determined in task 1. The AC magnitude is set to 1. A 1 pF capacitor is placed at the output. Plot the frequency response of the output voltage.

Task 4 Using the configuration in task 2, modify the schematic to form a differential amplifier. Perform a transient analysis using an input sinusoid of 0.1 V peak and 100 kHz and plot the input and differential output centered around 0.0 V. Task 5 Create a schematic of a PMOS simple current mirror to source 150 uA. Perform a DC simulation and plot the drain currents of both PMOS transistors. Task 6 Create a schematic of an NMOS simple current mirror to sink 150 uA. Perform a DC simulation and plot the drain currents of both NMOS transistors. Task 7 Create a schematic of a common source amplifier with the PMOS current mirror load from task 5. Perform a DC sweep to determine the gate bias voltage of the common source amplifier transistor that offers maximum distortion free output swing. Task 8 Perform a transient analysis at the bias point obtained in task 7. Use an input sinusoid of 0.1 V peak at 100 kHz. Determine the peak-to-peak output voltage swing. Hence find voltage gain.

Task 9 Create a schematic for a cascode amplifier. Bias the common gate transistor at 2.2 V. Bias the common source transistor at 800 mV. Use a load resistor of 10k. Use an input sinusoid of 0.1 V peak at 100 kHz. Perform a transient analysis and plot the input and output voltage waveforms. Find the output peak to peak voltage value. Hence, find the voltage gain. Task 10 Create a schematic of a cascode amplifier with a PMOS current mirror load. Use a 16.5k resistor to bias the current mirror. Bias the common gate transistor at 3.3 V. Bias the common source transistor at 807m. Use a sinusoid of 50 mV at 100 kHz. Perform a transient analysis and plot input and output voltage waveforms. Find the peak-to-peak output voltage value. Compute voltage gain.

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