Ak57 DVD Service Manual

TABLE OF CONTENTS
1.
1.1. 1.2. 1.3.
INTRODUCTION .....................................................................................................4
Purpose ....................................................................................................................................4 Scope .......................................................................................................................................4 General Features .......................................................................................................................4
2.
2.1. 2.2.
GENERAL DESCRIPTION .....................................................................................5

Introduction ..............................................................................................................................5 System Building Blocks...............................................................................................................5 2.2.1. AK57 Chassis Block Diagrams 5 2.2.1.1. Genaral ...................................................................................................................5 2.2.1.2. SMPS ......................................................................................................................6 2.2.1.3. DEFLECTION ...........................................................................................................6 2.2.2. AK57 Chassis Main Blocks 7 2.2.2.1. UOC-II (ULTIMATE-ONE-CHIP).................................................................................8 2.2.2.2. Audio ....................................................................................................................16 2.2.2.3. External AV I/O .....................................................................................................18 2.2.2.4. AV Switching .........................................................................................................19 2.2.2.4.1. MC74VHC4052 ..................................................................................................19 2.2.2.4.2. NLAST4599 .......................................................................................................21 2.2.2.5. TUNER..................................................................................................................23 2.2.2.6. SAW FILTERS ........................................................................................................25 2.2.2.6.1. K3958M (IF Filter for Video Applications).............................................................25 2.2.2.6.2. K9656M (IF Filter for Audio Applications) ............................................................25 2.2.2.6.3. K2966 (IF Filter for Intercarrier Applications).......................................................26 2.2.2.6.4. K2962 (IF Filter for Intercarrier Applications).......................................................26 2.2.2.6.5. G1975 (IF Filter for Intercarrier Applications) ......................................................27 2.2.2.7. SMPS ....................................................................................................................27 2.2.2.7.1. PRIMARY BLOCK ...............................................................................................27 2.2.2.7.1.1. SMPS CONTROLLER (NCP1207) ..........................................................................28 2.2.2.7.1.2. MOSFET............................................................................................................31 2.2.2.7.1.2.1. MTP3N60E ......................................................................................................31 2.2.2.7.1.2.2. MTP6N60E ......................................................................................................32 2.2.2.7.2. SECONDARY BLOCK...........................................................................................33 2.2.2.7.3. SMPS Block Diagram ..........................................................................................33 2.2.2.8. DEFLECTION .........................................................................................................34 2.2.2.8.1. HORIZANTAL DEFLECTION ................................................................................34 2.2.2.8.2. MD1803DFX ......................................................................................................34 2.2.2.8.3. FBT...................................................................................................................36 2.2.2.8.4. AN15524A (VERTICAL DEFLECTION OUTPUT).....................................................37 2.2.2.9. CRT BOARD ..........................................................................................................39 2.2.3. AK57 Chassis Scematics 42 2.2.3.1. Part1 ....................................................................................................................42 2.2.3.2. Part2 ....................................................................................................................43 2.2.3.3. Part3 ....................................................................................................................44 2.2.3.4. Part4 ....................................................................................................................45 2.2.4. DVD PLAYER 46 2.2.4.1. General Description ...............................................................................................46 2.2.4.1.1. MT1389D ..........................................................................................................46 2.2.4.1.2. SDRAM Memory Interface ..................................................................................46
2.3. 2.4.
2.2.4.1.3. Drive Interfaces.................................................................................................47 2.2.4.2. System Block Diagram and MT1389D Pin Description...............................................47 2.2.4.2.1. MT1389D Pin Description ...................................................................................47 2.2.4.2.2. 2.1 Sytem Block Diagram ...................................................................................56 2.2.4.3. Audio Output.........................................................................................................57 2.2.4.4. Audio DACS...........................................................................................................57 2.2.4.5. Video Interface......................................................................................................57 2.2.4.6. Flash Memory........................................................................................................58 2.2.4.7. Serial Eeprom Memory ...........................................................................................58 2.2.4.8. Audio Interface Audio Sampling Rate and PLL Component Configuration...................58 2.2.4.9. Scematics..............................................................................................................58 2.2.4.9.1. Part1 ................................................................................................................58 2.2.4.9.2. Part2 ................................................................................................................59 2.2.4.9.3. Part3 ................................................................................................................60 2.2.4.9.4. Part4 ................................................................................................................61 2.2.4.9.5. Part 5 ...............................................................................................................62 AK57 Service Menu ..................................................................................................................64 TUNER SETTINGS....................................................................................................................75
1. Introduction 1.1. Purpose
This document is prepared for the UOCII TV project and describes the whole system features and operating principles to be used in hardware design phase. The document is based on Device Specification UOCII-Version 1.12 from Philips Semiconductors. Prior to hardware design start, all parties involved must agree with the contents of this document.
1.2.
Scope
The document covers detailed descriptions of 11AK56 chassis system building blocks.
1.3.
General Features
11AK57 is a 90 / 50 Hz. chassis which is capable of driving 14 superflat and 15 realflat CRTs . The chassis will have the following main features; Remote Control 100 programs On Screen Display Mono Colour Standarts ; PAL, SECAM, NTSC, Transmission standarts ; B/G, L/L I/I, DK, Teletext ; One pages, Multi-standard alignment free PLL tuning, DVD or DVIX Player DVB-T option Europe Scart Detachable headphone output option, Front or side or back AV input option, Back AV output option, Coaxial output for IDTV/DVB-T 2W (%10 THD), 90-270V 50Hz or 170V-270V 50Hz SMPS Less than 3W DVD-Video, DVD R/RW, CD-R/RW, CD-Audio and MP3 Audio, JPEG (Picture CD), Video CD and its sub formats like CVD, SVCD, DVCD.
2. General Description 2.1. Introduction
This chapter describes system building blocks and their detailed descriptions.
2.2.
System Building Blocks
2.2.1. AK57 Chassis Block Diagrams

2.2.1.1. Genaral
P2.0_PWM0 73 71,72
WP I2C
EEPROM
5VSTB
SPDIF SPDIF-OUT
75 NLAST4599 SW0 76 18,19, 23,24 P0.6 6
P2.2_PWM1 P2.3_PWM2
IF SECAM PORT
IF BLOCK
AGC
TUN-IF
TUNER
IDTV30V 8V 5V 33V 12V B+ 33V 5V
RCA IN
Scart1
RCA-MONO-OUT
RCA-CVBS-OUT
DVD12V IDTV30V
DVD3V3
DVD-IR
DVB-T
DVD5V IDTV12V
22
DVD
DVD-ON DVD-MONO DVD-CVBS DVD-SPDIF

SW0 V1 V2 VOUT V3 V4 A1 A2 AOUT A3 A4 SW1
80
P0.3_ADC0
16,17 30 31
VERTICAL DRIVE HORIZANTAL DRIVE HOR. FB HEATER
EHT
DEFLECTION
42
CVBS2
UOCII
V+
28
AUDIO2
56,57,58 55
RGB BLKIN
4052
33
CRT BOARD
RGB
AUDEEM
77 SW2
P2.4_PWM3 AUDOUT1 48
2822M
IDTV-CVBS IDTV-MONO IDTV-SPDIF
NLAST4599
MONO
P2.5_PWM4 P3.2_ADC2 69 70 74 P1.2_INT0 P1.3_T1 P2.1_PWM0 50 51
78
MUTE
MUTE
A12V
Rx Tx IRQ
P3.3_ADC3
P3.1_ADC1
P1.0_INT1
CVBS1O
P1.1_T0
P0.5
59,61,66
9,39
52
53
47
68
67
KEYBOARD
RCA-CVBS-IN
STB
LED
3V3STB
NC
TV-IR
8V
RCA-MONO-IN
B+ 12V DVD12V IDTV12
SC-PIN8 RGB-FB SC-R SC-G SC-B SC-CVBS-IN SC-MONO-IN SC-CVBS-OUT SC-MONO-OUT
A12V DVD5V 5VSTB 3V3STB DVD3V3 STB
SMPS
11AK57 GENERAL BLOCK DIAGRAM
RCA OUT
2.2.1.2. SMPS
220V 50Hz
15
B+
16 2 13
A12V IDTV12V
14
1 8
DMAG
VI
12
DVD12V
2
CONT_INT
NCP1207
3
I_SENSE VCC
11
12V
GND
DRIVER
10
9V
TR.REG
3V3STB 5VSTB DVD3V3 DVD5V
9
6V
TR.REG
LDO
LDO
STB
11AK57 SMPS BLOCK DIAGRAM
2.2.1.3. DEFLECTION
HORIZONTAL HORIZONTAL DRIVE

Horz. Yoke
30KV
FOCUS SCREEN
+33V Lin.
+8V +5V
+9V
Heater
-14V VERTICAL
+14V VERTICAL
30KV
CRT BOARD
Heater
G2
FOCUS
TRANSISTORS
RGB DRIVE
VERTICAL DRIVE
VERTICAL AMPLIFIER AN5524A
VERTICAL YOKE
2.2.2. AK57 Chassis Main Blocks

AK57 chassis main blocks are; UOCII AUDIO EXT. AV I/O AV SWITCHING TUNER : : : : : Microcontroller + Video Proccessor + Sound Proccessor + IF + Teletext Audio Amp., Scart , AV input, AV output, 4052, 4599 PLL Tuner
SAW FILTERS SMPS DEFLECTION CRT BOARD
: SMPS Controller, SMT, Bridge Rect., Line Filters : FBT, HOT, Vertical Amplifier, Line Driver, : RGB Amp. with transistors,
2.2.2.1. UOC-II (ULTIMATE-ONE-CHIP)

UOCII is composed of microcontroller, video proccessor, sound proccessor and IF blocks. The various versions of the TDA955X H/N1 series combine the functions of a video processor together with a microcontroller.The ICs are intended to be used in economy television receivers with 90 and 110 degree picture tubes. The ICs have supply voltages of 8V and 3.3V and they are mounted in a QFP 80 envelope. The features are given in the following feature list. FEATURES TV-signal processor Multi-standard vision IF circuit with alignment-free PLL demodulator Internal (switchable) time-constant for the IF-AGC circuit The QSS and mono FM functionality are both available so that an FM/AM TV receiver can be built without the use of additional ICs The mono intercarrier sound circuit has a selective FM-PLL demodulator which can be switched to the different FM sound frequencies (4.5/5.5/6.0/6.5 MHz). The quality of this system is such that the external band-pass filters can be omitted. The FM-PLL demodulator can be set to centre frequencies of 4.74/5.74 MHz so that a second sound channel can be demodulated. In such an application it is necessary that an external bandpass filter is inserted. The vision IF and mono intercarrier sound circuit can be used for the demodulation of FM radio signals Video switch with 2 external CVBS inputs and a CVBS output. One of the CVBS inputs can be used as Y/C input. 2 external audio inputs. The selection of the various inputs is coupled to the selection of the CVBS signals Integrated chrominance trap circuit Integrated luminance delay line with adjustable delay time Switchable group delay correction in the CVBS path Picture improvement features with peaking (with switchable centre frequency, depeaking, variable positive/negative overshoot ratio and video dependent coring), dynamic skin tone control and blue-, black- and white stretching Integrated chroma band-pass filter with switchable centre frequency Switchable DC transfer ratio for the luminance signal Only one reference (12 MHz) crystal required for the m-Controller, Teletext- and the colour decoder PAL/NTSC or multi-standard colour decoder with automatic search system
Internal base-band delay line Indication of the Signal-to-Noise ratio of the incoming CVBS signal A linear RGB/YUV/YPBPR input with fast blanking for external RGB/YUV sources. The synchronisation circuit can be connected to the incoming Y signal. The Text/OSD signals are internally supplied from the m-Controller/Teletext decoder. RGB control circuit with Continuous Cathode Calibration, white point and black level offset adjustment so that the colour temperature of the dark and the light parts of the screen can be chosen independently. Contrast reduction possibility during mixed-mode of OSD and Text signals Adjustable wide blanking of the RGB outputs Horizontal synchronization with two control loops and alignment-free horizontal oscillator Vertical count-down circuit Vertical driver optimized for DC-coupled vertical output stages Horizontal and vertical geometry processing Horizontal and vertical zoom function for 16 : 9 applications Horizontal parallelogram and bow correction for large screen picture tubes Low-power start-up of the horizontal drive circuit
Microcontroller 80C51 m-controller core standard instruction set and timing 1 ms machine cycle 32 - 128Kx8-bit late programmed ROM 3 - 12Kx8-bit DataRAM (shared between Display, Acquisition and Auxiliary RAM) Interrupt controller for individual enable/disable with two level priority Two 16-bit Timer/Counter registers One 16-bit Timer with 8-bit Pre-scaler WatchDog timer Auxiliary RAM page pointer 16-bit Data pointer Stand-by, Idle and Power Down modes 14 bits PWM for Voltage Synthesis Tuning 8-bit A/D converter with 4 multiplexed inputs 5 PWM (6-bits) outputs for control of TV analogue signals 18 general I/O ports
Data Capture Text memory for 1 or 10 pages In the 10 page versions inventory of transmitted Teletext pages stored in the Transmitted Page Table (TPT) and Subtitle Page Table (SPT) Data Capture for US Closed Caption Data Capture for 525/625 line WST, VPS (PDC system A) and Wide Screen Signalling (WSS) bit decoding Automatic selection between 525 WST/625 WST Automatic selection between 625 WST/VPS on line 16 of VBI Real-time capture and decoding for WST Teletext in Hardware, to enable optimized mprocessor throughput
Automatic detection of FASTEXT transmission Real-time packet 26 engine in Hardware for processing accented, G2 and G3 characters Signal quality detector for video and WST/VPS data types Comprehensive teletext language coverage Full Field and Vertical Blanking Interval (VBI) data capture of WST data
Display Teletext and Enhanced OSD modes Features of level 1.5 WST and US Close Caption Serial and Parallel Display Attributes Single/Double/Quadruple Width and Height for characters Scrolling of display region Variable flash rate controlled by software Enhanced display features including overlining, underlining and italics Soft colours using CLUT with 4096 colour palette Globally selectable scan lines per row (9/10/13/16) and character matrix [12x10, 12x13, 12x16 (VxH)] Fringing (Shadow) selectable from N-S-E-W direction Fringe colour selectable Meshing of defined area Contrast reduction of defined area Cursor Special Graphics Characters with two planes, allowing four colours per character 32 software redefinable On-Screen display characters 4 WST Character sets (G0/G2) in single device (e.g. Latin, Cyrillic, Greek, Arabic) G1 Mosaic graphics, Limited G3 Line drawing characters WST Character sets and Closed Caption Character set in single device
Optional Used ICs at AK57 chassis are TDA9550 H/N1, TDA9551 H/N1, TDA9552 H/N1. FUNCTIONALOF TDA9550 H/N1 TV range is 90 Mono intercarrier multi-standard sound demodulator (4.5 - 6.5 MHz) with switchable centre frequency Audio switch Automatic Volume Levelling PAL decoder NTSC decoder ROM size 32 64K User RAM size 1K One page teletext Close Captioning
FUNCTIONALOF TDA9551H TV range is 90 Mono intercarrier multi-standard sound demodulator (4.5 - 6.5 MHz) with switchable centre frequency Audio switch
Automatic Volume Levelling PAL decoder SECAM decoder NTSC decoder ROM size 32 64K User RAM size 1K One page teletext Close Captioning
FUNCTIONALOF TDA9552H TV range is 90 Mono intercarrier multi-standard sound demodulator (4.5 - 6.5 MHz) with switchable centre frequency Audio switch Automatic Volume Levelling QSS sound IF amplifier with separate input and AGC circuit AM sound demodulator without extra reference circuit PAL decoder SECAM decoder NTSC decoder ROM size 32 64K User RAM size 1K One page teletext Close Captioning
BLOCK DIAGRAM
PINING
2.2.2.2. Audio
The TDA2822 is DUAL LOW-VOLTAGE POWER AMPLIFIER. Supply voltage down to 1.8V Low crossover distorsion Low quescent current Bridge or stereo configuration
ELECTRICALCHARACTERISTICS
Figure: Test Circuit (Stereo)
Figure: Test Circuit (Bridge)
Figure: Application in 11AK56
2.2.2.3. External AV I/O

SCART PINING 1. Audio right output 2. Audio right input 3. Audio left output 4. Ground AF 5. Ground Blue 6. Audio left input 7. Blue input 8. AV switching input 9. Ground Green 10. Not Used 11. Green input 12. Not Used 13. Ground Red 14. Ground Blanking 15. Red input 16. Blanking input 17. Ground CVBS output 18. Ground CVBS input 19. CVBS output 20. CVBS input 21. Ground 0.5Vrms / 1K 0.5Vrms / 10K 0.5Vrms / 1K 0.5Vrms / 10K 0.7Vpp / 75 0-12VDC /10K 0.7Vpp / 75
0.7Vpp / 75 0-0.4VDC, 1-3VDC / 75 1Vpp / 75 1Vpp / 75
Front/Side/Back AV Input
Audio Video
0.5Vrms / 10K 1Vpp / 75
Back AV Output Audio Video 0.5Vrms / 1K 1Vpp / 75
2.2.2.4. AV Switching 2.2.2.4.1. MC74VHC4052
The MC74VHC4052 utilize silicon--gate CMOS technology to achieve fast propagation delays, low ON resistances, and low OFF leakage currents. These analog multiplexers/demultiplexers control analog voltages that may vary across the complete power supply range (from VCC to VEE). The Channel--Select and Enable inputs are compatible with standard CMOS outputs; with pullup resistors they are compatible with LSTTL outputs. These devices have been designed so that the ON resistance (Ron) is more linear over input voltage than Ron of metal--gate CMOS analog switches. Fast Switching and Propagation Speeds Low Crosstalk Between Switches Diode Protection on All Inputs/Outputs Analog Power Supply Range (VCC -- VEE) = 2.0 to 12.0 V Digital (Control) Power Supply Range (VCC -- GND) = 2.0 to 6.0 V Improved Linearity and Lower ON Resistance Than MetalGate Counterparts Low Noise
2.2.2.4.2.
NLAST4599
The NLAST4599 is an advanced high speed CMOS single pole double throw analog switch fabricated with silicon gate CMOS technology. It achieves high speed propagation delays and low ON resistances while maintaining low power dissipation. This switch controls analog and digital voltages that may vary across the full powersupply range (from VCC to GND). The device has been designed so the ON resistance (RON) is much lower and more linear over input voltage than RON of typical CMOS analog switches. The channel select input structure provides protection when voltages between 0 V and 5.5 V are applied, regardless of the supply voltage. This input structure helps prevent device destruction caused by supply voltage input/output voltage mismatch, battery backup, hot insertion, etc. Features Select Pin Compatible with TTL Levels Channel Select Input OverVoltage Tolerant to 5.5 V Fast Switching and Propagation Speeds BreakBeforeMake Circuitry Low Power Dissipation: ICC = 2 _A (Max) at TA = 25C Diode Protection Provided on Channel Select Input Improved Linearity and Lower ON Resistance over Input Voltage Latchup Performance Exceeds 300 mA
ESD Performance: HBM > 2000 V; MM > 200 V Chip Complexity: 38 FETs PbFree Packages are Available
2.2.2.5. TUNER
Channel coverage of PLLTuner for VHF/UHF OFF-AIR CHANNELS BAND FREQUENCY CHANNELS RANGE (MHz) E2 to C E5 to E12 E21 to E69 48.25 to 82.25 (1) 175.25 to 224.25 471.25 to 855.25 (2) CABLE CHANNELS CHANNELS S01 to S08 S09 to S38 S39 to S41 FREQUENCY RANGE (MHz) 69.25 to 154.25 161.25 to 439.25 447.25 to 463.25
Low Band Mid Band High Band
(1). Enough margin is available to tune down to 45.25 MHz. (2). Enough margin is available to tune up to 863.25 MHz.
Noise Low band : Mid band : High band :
Typical Max. 5dB 9dB 5dB 9dB 6dB 9dB
Gain Min. Typical Max. All channels : 38dB 44dB 52dB Gain Taper (of-air channels): 8dB
Noise is typically 6dB for all channels. Gain is minimum 38dB and maximum 50dB for all channels. Terminals for External Connection
Electrical conditions
2.2.2.6. SAW FILTERS 2.2.2.6.1.

Standard B/G D/K I L/L
K3958M (IF Filter for Video Applications)
Pin configuration 1 Input 2 Input - ground 3 Chip carrier - ground 4 Output 5 Output Features TV IF video filter with Nyquist slopes at 33.90 MHz and 38.90 MHz Constant group delay
2.2.2.6.2.
Standard B/G D/K I L/L
K9656M (IF Filter for Audio Applications)
Pin configuration
1 2 3 4 5
Input Input - ground Chip carrier - ground Output Output
Features TV IF audio filter with two channels Channel 1 (L) with one pass band for sound carriers at 40,40 MHz (L) and 39,75 MHz (L- NICAM) Channel 2 (B/G, D/K, L, I) with one pass band for sound carriers between 32,35 MHz and 33,40 MHz
2.2.2.6.3.
Standard B/G D/K
K2966 (IF Filter for Intercarrier Applications)
Pin configuration 1 Input 2 Input - ground 3 Chip carrier - ground 4 Output 5 Output Features TV IF filter with Nyquist slope and sound shelf Broad sound shelf for sound carriers at 32,40MHz and 33,40 MHz Group delay predistortion
2.2.2.6.4.
Standard B/G I L/L
K2962 (IF Filter for Intercarrier Applications)
Pin configuration 1 Input 2 Input - ground 3 Chip carrier - ground 4 Output 5 Output
Features TV IF filter with two Nyquist slope and sound shelf Picture carriers at 33,90 MHz and 38,90 MHz Broad sound shelf at 15 dB level for sound carriers at 32,90 MHz and 33,40 MHz Constant group delay
2.2.2.6.5.
Standard B/G
G1975 (IF Filter for Intercarrier Applications)
Pin configuration 1 Input 2 Input - ground 3 Chip carrier - ground 4 Output 5 Output Features TV IF filter with Nyquist slope and sound shelf Picture carrier at 38.90MHz Reduced group delay predistortion as compared with standard B/G, half
2.2.2.7. SMPS 2.2.2.7.1. PRIMARY BLOCK
AC power applied via AC inlet, line filter components prevent chassis from incoming noise of AC line, also prevents AC line against created noises by TV. Bridge rectifier and bulk capacitor converts AC voltage to DC voltage. Applied DC voltage to primary winding is then swicthed via MOSFET by primary controller in a controlled manner. SMPS controller works on quasi-resonant PWM and gets first supply voltage from AC line (SMPS Controller supply). Controller drives MOSFET according to feedback information supplied by shunt regulator and opto-coupler, according to that information adjusts on-time of MOSFET for required power. After the start-up in normal operation mode SMPS controller is supplied by SMT. Primary block consist of following main parts, AC Inlet (PL800), Fuse (F800), Varistor (R803),
Line Filter For EMC (C801,L800,C800), SMPS Controller (IC806), SMPS Controller supply for first Start-up (R807), Bridge Rectifier (D820,D821,D822,D823), Rectifier For SMPS Controller(D803), Bulk Cap (C809), Clamping Circuitry (R820, C810, C811, D824), SMT (Switch Mode Transformer) (TR800), SMT Driver MOSFET (Q802), Current Sense Resistor (R828), Protection Components for MOSFET Failure (D805,D806,R826) 2.2.2.7.1.1. SMPS CONTROLLER (NCP1207)
PWM Current-Mode Controller for Free Running Quasi-Resonant Operation The NCP1207A combines a true current mode modulator and a demagnetization detector to ensure full borderline/critical Conduction Mode in any load/line conditions and minimum drain voltage switching (QuasiResonant operation). Due to its inherent skip cycle capability, the controller enters burst mode as soon as the power demand falls below a predetermined level. As this happens at low peak current, no audible noise can be heard. An internal 8.0 _s timer prevents the freerun frequency to exceed 100 kHz (therefore below the 150 kHz CISPR22 EMI starting limit), while the skip adjustment capability lets the user select the frequency at which the burst foldback takes place. The Dynamic SelfSupply (DSS) drastically simplifies the transformer design in avoiding the use of an auxiliary winding to supply the NCP1207A. This feature is particularly useful in applications where the output voltage varies during operation (e.g. battery chargers). Due to its highvoltage technology, the IC is directly connected to the highvoltage DC rail. As a result, the shortcircuit trip point is not dependent upon any VCC auxiliary level. The transformer core reset detection is done through an auxiliary winding which, brought via a dedicated pin, also enables fast Overvoltage Protection (OVP). Once an OVP has been detected, the IC permanently latches off. Finally, the continuous feedback signal monitoring implemented with an overcurrent fault protection circuitry (OCP) makes the final design rugged and reliable.
Features FreeRunning Borderline/Critical Mode QuasiResonant Operation CurrentMode with Adjustable SkipCycle Capability No Auxiliary Winding VCC Operation AutoRecovery Overcurrent Protection Latching Overvoltage Protection External Latch Triggering, e.g. Via Overtemperature Signal 500 mA Peak Current Source/Sink Capability Undervoltage Lockout for VCC Below 10 V Internal 1.0 ms SoftStart Internal 8.0 _s Minimum TOFF Adjustable Skip Level Internal Temperature Shutdown Direct Optocoupler Connection SPICE Models Available for TRANsient Analysis PbFree Package is Available Typical Applications AC/DC Adapters for Notebooks, etc. Offline Battery Chargers Consumer Electronics (DVD Players, SetTop Boxes, TVs, etc.) Auxiliary Power Supplies (USB, Appliances, TVs, etc.) Typical Application:
Internal Circuit Architecture
2.2.2.7.1.2.
MOSFET
The MTP3N60E used for voltage range 170-270V, The MTP6N60E used for voltage range 90 270V. 2.2.2.7.1.2.1. MTP3N60E
NChannel EnhancementMode Silicon Gate This advanced high voltage TMOS EFET is designed to with stand high energy in the avalanche mode and switch efficiently. This new high energy device also offers a drainto source diode with fast recovery time. Designed for high voltage, high speed switching applications such as power supplies, PWM motor controls and other inductive loads, the avalanche energy capability is specified to eliminate the guesswork in designs where inductive loads are switched and offer additional safety margin against unexpected voltage transients. Avalanche Energy Capability Specified at Elevated Temperature Low Stored Gate Charge for Efficient Switching Internal SourcetoDrain Diode Designed to Replace External Zener Transient Suppressor Absorbs High Energy in the Avalanche Mode SourcetoDrain Diode Recovery Time Comparable to Discrete Fast Recovery Diode
2.2.2.7.1.2.2.
MTP6N60E
NChannel EnhancementMode Silicon Gate This high voltage MOSFET uses an advanced termination scheme to provide enhanced voltageblocking capability without degrading performance over time. In addition, this advanced TMOS EFET is designed to withstand high energy in the avalanche and commutation modes. The new energy efficient design also offers a draintosource diode with a fast recovery time. Designed for high voltage, high speed switching applications in power supplies, converters and PWM motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients. Robust High Voltage Termination Avalanche Energy Specified SourcetoDrain Diode Recovery Time Comparable to a Discrete Fast Recovery Diode Diode is Characterized for Use in Bridge Circuits IDSS and VDS(on) Specified at Elevated Temperature
2.2.2.7.2.
SECONDARY BLOCK
Switching primary winding of SMT induces voltages to secondary windings of SMT. Induced voltages are then rectified by secondary recitification diodes and capacitors. Output Voltages +3.3.V_STB : The signal is +3.3VDC and continuous stand-by on/off. Used for digital part of UOCII. +5V_STB : The signal is +5VDC and continuos stand-by on/off. Used for port control. B+ : The voltage needed for FBT. Voltage range 114V 117V according to CRT. 12V : The voltage needed for horizantal driver circuit. 12V_A : The voltage supply of audio amplifier. 12V_DVD : The voltage needed for DVD. 12V_IDTV : The voltage needed for IDTV. +5V_DVD : The voltage needed for DVD. +3.3.V_DVD : The voltage needed for DVD.
2.2.2.7.3.
SMPS Block Diagram
220V 50Hz
15
B+
16 2 13
A12V IDTV12V
14
1 8
DMAG
VI
12
DVD12V
2
CONT_INT
NCP1207
3
I_SENSE VCC
11
12V
GND
DRIVER
10
9V
TR.REG
3V3STB 5VSTB DVD3V3 DVD5V
9
6V
TR.REG
LDO
LDO
STB
11AK57 SMPS BLOCK DIAGRAM
2.2.2.8. DEFLECTION
2.2.2.8.1. HORIZANTAL DEFLECTION
Deflection block consist of following main parts, Horizontal driver transistor (Q600), Horizontal driver (L600), HOT (Horizontal Output Transistor) (Q603), FBT (TR600), Linearity Coil (L601), Flyback Capacitors (C611), S-correction capacitor (C622), Modulated S-correction capacitor (C623), Hdrive signal is buffered and applied to line driver transistor by a capacitor. Line driver produces necessary base currents, parallel diode to base series resistor speeds up the reverse base current. UOCII has soft-start and soft-stop features to have more safe operation. There are two base current adjustment resistors on the circuit. Collector current differs according to CRT sizes . Tube dependent components are choosen to fit best picture performance by keeping; 11-12usec. Flyback time, Max. 1300V. collector voltage (peak-detect mode measurement) 2.2.2.8.2. MD1803DFX
HIGH VOLTAGE NPN POWER TRANSISTOR FOR STANDARD DEFINITION CRT DISPLAY Features State-Of-The-Art Technology: Diffused collector ENHANCED GENERATION More stable performance versus operating temperature variation Low base drive requirement Tighter hFE range at operating collector current Fully insulated power package U.L. compliant Integrated free wheeling diode In compliance eith the 2002/93/EC EUROPEAN DIRECTIVE
2.2.2.8.3.
FBT
Operating Ampient Temperatue : -10C..........+60C Stroge Ampient Temperature : -20C..........+80C Operating Horizantal Frequency : 15.625KHz 0.5KHz INDUCTANCE (Between pin1 to pin3) : 3.02mH %8 INTERNAL RESISTANCE : Max. 2.2Ohm Regulation:Max.%10 FLYBACK TIME : 11.5sec COLLECTOR VOLTAGE : 1000Vp_p FOCUS VOLTAGE RANGE % OF EHT: min.18.2 max.34.6 DEFLECTION CURRENT : 3.1Ap_p max.
AUXLIARY OUTPUTS: Heater Voltage : 6.3Vrms / max 750mA RGB Supply : +200V / max 30mA %5
Vertical Supply : +14V / max 1A %5 Vertical Supply : -14V / max 1A %5 Auxliary Voltage : +9V / max 1A %5
Tuning Voltage : +33V max 100mA %5
2.2.2.8.4.
AN15524A (VERTICAL DEFLECTION OUTPUT)
The AN5524A (TV vertical deflection output circuit) is a monolithic integrated circuit designed for vertical deflection output, such as TV and display. Features Built-in Pump-up circuit Built-in Thermal protection circuit Maximum deflection current = 1.6Ap-p Dimple forming type : Advantages : a) Withstand repeated movements between the body and the solder joint of the IC (when a heat-sink is used). b) Better vibration absorber (eg. CTV installed in the bus/coach). VCC operating range : 12V ~ 30V
2.2.2.9. CRT BOARD

Transistors are used for amplifying RGB signals. 2SC2482 For High Voltage Switching And Amplifier Applications: High Voltage : V(BR)=300V. Small Collector Output Capacitance : Cob=3.0pF (typ.)
2.2.3. AK57 Chassis Scematics

2.2.3.1. Part1
VPROT
C128
SC_FBLK
SC_G_IN
SC_B_IN
SC_R_IN
220R R159
L102
PL120
5 4
PL106
BLM21A601S
220p 50V REMOTE R124 100R R126 330R R125 330R +5V_STB EHT_INFO 220k R136
2.2.3. AK57 Chassis Scematics

2.2.3.1. Part1
+8V
VESTEL ELECTRONICS
TV R&D GROUP
3 2 1
C118 220n 16V BC858B Q104
R158 330k
R160 100R
C204
PL102
IF1 IRQ RX IF2 TX
BC858B Q107 1N4148
IF1 11
10n 50V C205 L100 1u
1 2 3 4
001.sht
100n
11AK57 VIDEO&AUDIO
Rev. DATE
08/10/2007
D103
BC848B
C137
C135 10k R127 L108 +3V3_STB 47u 16V
Ver.
AUDIO_OUT CVBS_OUT
Author
YALCIN ELIK
Sheet
01 of 04
R173
100u
BC848B
Q110
C101 100n 50V
NC/ADC 8
KEYBOARD
1 2
PL107 PL103
Q105 BC848B
R128 100R
LED L110 Q111 BLM21A601S C138 100u C141 100n 16V 390p 50V
R176
C140 100n 16V
C146
TU100 38.9MHz_TVTUN
100n 16V
C147
470R
100R
470R
C130
100n 16V
100n 16V
R162 100R
R174 100R
R161 3k9
R175 100R
C148
D102
16V C160
X100
220n 16V
NC 6
+5V_STB
100n C158 16V
C139 47p 50V
C142 47p 50V
100n C157 50V
C102 100u 16V
C103 100n 50V
SCL
BLM21A601S
KEYBOARD
100R C159 R186
VS 7
L101 22u
+5V
SDA
L103
16V
100R
R177
R178
R184
R185
SEL_CVBS
VST 9
1k R100
+33V
Q103 BC848B
BLM21A601S C136 100u 16V
100R
R123 10k
C145
10n 50V
Q109
D107
15k
IF2/GND 10
03
PL111
+8V
1
C168 220n 16V R195 4R7 820R R215 C187 C193 47u D116 50V BC848B Q118 RCA_A_IN 100n L115 4.5MHz_TRAP 1u Z102 C186 100R R198 1 270p 50V R216 220R 3 2 16V 2u2 L122 ESD_20V
2 3
1 A RACK_RCA_DVB JK102
XTALOUT 64
XTALIN 63
OSCGND 62
VDDC 61
VPE 60
VDDA 59
BO 58
GO 57
RO 56
BLKIN 55
BCLIN 54
B2_UIN 53
G2_YIN 52
R2_VIN 51
INSSW2 50
IFVO2 49
AUDOUT1 48
CVBS10 47
WHSTR 46
C 45
CVBS3_Y 44
GNDA1 43
CVBS2 42
GND 41
SDA 5
C100 39p 50V
100R R101
SDA
+3V3_STB
+5V_STB
12MHz
220n
STBY_PR
REMOTE
R137 4k7 L109 BLM21A601S C131 R130 R131 R138 4k7 R139 4k7 R140 4k7 R141 C132 100n 16V
STBY
SDA
3 B
TX
RX
SCL 4
C104 39p 50V
PL104
+5V_STB
S106
4k7
4k7
10k
AS 3
1
PL105
47u C105 C110 6k2 R112 10n
16V R148 100R R142 100R
3 220R R221 180R R222 4.5MHz_TRAP
VT 2
67 P1.0_INT1 68 P1.1_T0 69 P1.2_INTO 70 P1.3_T1 71 P1.6_SCL 72 P1.7_SDA 73 P2.0_PMW 74 P2.1_PWM0
SVO_IFOUT 38
C169 50V 1u
16V
R197 1k
2 Q115 BC858B
Z103
ESD_20V
D117
R244 75R
66 VDDP
VP1 39
100u
65 RESET
CVBS1 40
C172 100n 16V
100u 16V
6u8 R223 100R
RCA_V_IN
BLM21A601S R242 100R
4 C
C173
L118
1 2
100R R102
SCL
SCL
PL112
L124
2 1
PL121
D108
5V1
IC2 37 SIFAGC 36 PLLIF 35 EHTO 34
C171
BLM21A601S
100n
R129 10k
L104
IC100
1 A0 VCC 8
R199
27k
AGC 1
12k R111
AGC
16V
R143 100R R144 100R R145 100R R146 100R
C175 10n 50V
R218 120k R217 100k
EHT_INFO DVD_CVBS +8V R219 6k2 R220 680k DVD_ON R243 10k
390R R196 R254 1k C174 2n7 C170
1 2 3
PL113
D101 1N4148
C176 1u 50V
IC103
AUDEEM 33 DECSDEM 32 FBISO 31 HOUT 30
A1
WP
7
R147 100R
MUTE
50V 50V 4u7 R233 75R 27k R202 100R R203 HFLYBACK Q119 BC848B IDTV_CVBS 470k R225 10k R204 R201 30k SEL_MONO R226 R245 75R 3k3 RF_MONO R241 10k
24LC02
PL101
L125
A2
SCL
R114 100R
IRQ SW2 R157 100R R156 100R R155 100R
R154 100R
75 P2.2_PWM1 76 P2.3_PWM2 77 P2.4_PWM3 78 P2.5_PWM4 79 NC
AUDIO3 29
C178 220n 16V
5 4 3 2 1
ESD_20V ESD_20V ESD_20V
2
4 VSS SDA 5
2 1
R115 100R
SW1 SW0
AUDIO2 28 REFOUT_SNDIF 27 SNDPLL 26 GND2 25 P3.1_ADC1 P3.2_ADC2 P3.3_ADC3 22 AGCOUT 10 DECDIG VSSC_P
R200 C179
3 4 5
DVD_ON
L119
IDTV_MONO +5V_STB
2 1
80 P3.0_ADC0
R149 1k R150 4k7 R151 4k7 R152 4k7 R153 4k7
2k7 R224 820p 50V 2k2
BLM21A601S
17 VDRA
12 PF1LF
16 VDRB
13 GND3
VSSA
18 IFIN1
19 IFIN2
20 IREF
PL100
D121
14 DECBG
11 PH2LF
15 AVL
DEC
21 VSC
P0.5
P0.6
VP2
24 IC1
D122
D123
S105
23 IC
220n
220n
63V
63V
2n2 50V
50V
HOUT
C180
4n7 50V
+3V3_STB
C155
R164 100R
R166 100R
R168 100R
R169 100R
C149
C150
+5V
4u7
C164
10n 50V
IC102
3
L105
KEYBOARD
C163 100n 63V
C181 10u 50V
L120
2 3
8
C106 C107 6n8 50V 10n 50V C111 10u C109 R105 10k C112 4u7 50V D100 MUTE 1N4148 C108 22u 50V R103 5k6 R104 5k6 Q100 BC848B 50V
IN12
OUT1
BLM21A601S L106 BLM21A601S
2 1
+12V_A
2
SC_STATUS
AGC COMMON R179 15k LED SAW_SW C151 4n7 50V C153 C143 C144 L113 100n 16V 50V 10u 1u 50V C154 100n 16V C156 2u2 50V IN1 C162 R180 100R R189 100R 1n5 50V
AUDIO_OUT
7
10n 50V R113 1k
IN11
SUPPLY_VOLT
PL108 PL109
OUT1 4
OUT2 5 GND
C161 OUT1 4 1n5 50V OUT2 5 GND
DVD_SPDIF R247 10k
TDA2822M
R163 4k7 R165 4k3 C120 R167 10k 100n 25V
IN22
OUT2
3
R116 R117 4R7 4R7
IN2
SAW_SW
Z100 K3958M
IN1
IN2
R248 10k
5
C113 10n 25V
IN21
GND
S101
IDTV_SPDIF
+8V
C121 C123
25V 100n
100n 25V
+5V_STB
C165 50V VERT+ VERT10n OPTIONAL
D104 1N4148 BA591 D105 R206 470R 1k R208
S102 1k2 Q116 BC848B R209
R210
IF1
IF2
D120 +5V
1k L116 C182 L107 220n 16V
IC101
C114 IDTV_CVBS 100n 25V C115 R108 10k RCA_V_IN 100n 25V R110 47R
ESD_20V
Y0
VCC 16
+8V
BLM21A601S C122
+5V
R106 10R
4u7
50V
IC104
+8V SW0
Y2
X2 15
C124 50V 4u7
10u 50V R118 10k
RCA_A_IN
R190 22R SC_STATUS SC_FBLK SC_G_IN SC_A_IN SC_R_IN SC_B_IN C183 47u 16V R191 100R Q117 BC848B R213 75R SC_A_OUT
SW
IN2
6
S100
DVD_SPDIF
10R R134
10k R132
Q102 BC848B R109 2k2
COM_Y_OUT_IN
X1 14
C125 R119 10k R122 47R 50V 4u7
DVD_MONO
L111 +5V +5V_SPDIF C203 BLM21A601S 100n 16V
NLAST4599
2 VSS OUT 5
SPDIF_OUT
CVBS_OUT
SEL_CVBS
C116 SC_V_IN 100n 25V C117 DVD_CVBS 100n 25V
16V 10u
Y3
COM_X_OUT_IN 13
Q106 BC848B 2k2 R133
+5V
R207
1k2
C133
1k R211
R107 150R
R238 1k
SC_A_OUT
+5V_SPDIF
Y1
X0 12
C126 50V 4u7 R120 10k
IDTV_MONO 150R R135
R170 300R
+5V
SEL_MONO
SC_V_IN
M74HC4052
47p 50V C191 150p ESD_20V 50V 100R R227 C195 150p C196 50V 100R 100p R234 50V
R235 3k3
C197 150p 50V
C198 50V ESD_20V 4n7 D115
470R R181
R212 75R
Q114 BC848B
D124
R214 330R
SW2
SW
IN2
SEL_MONO Q112 BC848B R192 10k
ESD_20V
C127
R121 10k SW0
R229 100R
R231
100R
R236
100R R237
10k
INH
X3 11
SC_A_IN
IC105
D111
L121
R252 330R
GND
IN1
IDTV_SPDIF
C188
ESD_20V
ESD_20V
D112
L112 +5V BLM21A601S C134 16V 10u
L117
S104
D125
D106
75R R228
R230
R232
R239
R240
33V
75R
75R
75R
SC_A_OUT ESD_20V ESD_20V
S103
ESD_20V D109 ESD_20V
D118
D119
GND
IN1
RF_MONO 3k3 R182 R183 47R
C166 A
R172 300R
R194 100R
C167
2 BLM21A601S
1n 50V
SPDIF_OUT
BC858B Q113
L114
21 1 3 B 2 4 C 5 20 A
19 18
17 16
15 14
13 12
11 10
9 8
7 6
5 4
3 2
RACK_RCA_DVB JK101
PL119
10n 25V
D110
75R
GND
SW1
RCA_JACK_1P_90_LONG JK100
B5V1_SOD123
VSS
OUT
R193 220R
D113
D114
VEE
A 10
NLAST4599
ESD_20V
L123
PL118
R251 100R
PL117
R250 100R
PL116
C152
R187 39k
R188 75R
R205 1k
DVD_MONO
R249 1k
PL115
R246 1k
PL114
BLM21A601S
C177 220n 16V
PL800
VESTEL ELECTRONICS TV R&D GROUP

3.15A
F800
002.sht
Ver. 03 Rev.
11AK57 SMPS
DATE
08/10/2007
VAR-510V
Author
SMPS GROUP
Sheet
02 of 04
R803 L805 C800
PL802
C834
C855
1u 16V
S817
150n 250V 4 1
TR800
NC 1
C818 D807 UF5402 D808 C831 2200u 16V HOR_PR 1000u 25V L806 65uH C830 C832 100n 50V +12V C835 100n 50V
1u 16V +12V_IDTV
2x27m
L800
TH800
9R
1kV 100p
2u2
+12V_DVD
IC812 3 1 78L05_TO92 2 C833 16V 220u
+5V_STB
S800
C801
1 2
D825
5 6
3 4
1N4148
DRAIN 8 15
+112V BYD33D C821
RL800
R872 680k R873 680k
+300V 6 16
GND3
100p
1kV
R871 680k
BC327 Q809
150n 250V
S818
+3V3_STB
C2V7
+14V 11 R806 2R2 12 GND1
C820 STB_SUPPLY 100p 1kV D809 C824 C836 16V 470u BYD33D 100n 50V R858 10k 560R R862
D828
C844
Q810 BC848B 150R R861
10k R859 Q811 BC848B 10k R860
VVC 1N4007 1N4007 1N4007 1N4007 D820 D821 D822 1n 1kV D823 C802 1n 1kV C806 4 NC3 NC2 C811 R820 C809 150u 400V C856 1kV 10n NC1 C810 47n 630V 33k 220p 1kV BA159 GND D824 3 14 2 7 10
+8V5_1
1N4007
1N4007
D818
D819
DVD_PR +8V5 UF5402 1 C838 D811 C825 BYD33D 1n1kV D810 50V C822 1n 1kV 100n 50V 16V C837 9 IC813 L4931 2 3 6V3 2200u C842 C843 +5V_DVD 100n 50V
+22V 13
2200u
KA78R12 IC814 AUDIO_PR 1 IN OUT 2 VDIS GND 4 3
C826
GND2
R835 1k8
IC815 LM1117 3 IN OUT 2 GND VOUT 1 4 C845 100n 16V
100n
C823 R864 10k D832 1N4148 R821 33k R807 1k C803 1n 1kV 2u2 L804 SMPS_46
R863 3R3 2W
+3V3_DVD
1000u 16V
1k R836
+12V_A
D814 1N4148 D803 UF5407 160V 47u R830 1k R853 150k BA159 D815 D812 C839 1n 1kV C840
L807 150uH 4R7 R850 B+ 160V 33u C848
IC806
1
C807 100p 50V
C827
C812 100n 25V
C813 33u 50V
1n 50V
86k
DEMAG
VI
BA159
R837
I_SENSE
NC
7
250V 1u C849 D800 MCR22_6 400V C817 470p 1kV C847 470p 1kV MCR_GATE R832 1k2 C828 50V 22n R852 1M
MCR_GATE
PROTECTION
+3V3_STB D833 AUDIO_PR R867 3k3 1N4148 D834 HOR_PR 1N4148 D835 +12V_IDTV 1N4148 D836 1k5 R866 BC858B Q812 STBY_PR
MC44608
3 CONT_IN VCC 6
Q802 R824 10R L803 MTP6N60E/SSP7N60A
1N4148 D816 R851 680R
GND
DRIVER
R849 470R
C846 2200u 6V3
220u 16V
STBY 1N4148 D839
Q801 BC858B
R826 10k
C2V4_SOD123
22k R868 C853 1u 16V
R815 2k 1N4148
STBY
R831 22k
Q813 BC848B 220k R869
Q803 BC848B
DVD_PR 1N4148
D838
C854 1u 16V
R816 10k
D801
R822
470R
R823 10k
100V 4n7
R827
10k
D802 TL431SAMF2
C814
R839 99k
D805 1N4148_SOD123
+5V_DVD
6 5
1N4148_SOD123
D806
R828
0R22
330R R825 C815
+3V3_DVD
4 3
1k R865
47n 50V R810 C8V2 D804 50V 1n 4M7 C804 C816
IC811
4 3 1 2 C841 75R R838 R833 33R
50V 1n +12V_DVD C852 ESD_20V ESD_20V D829 D830 D831 1k R841
2 1
PL804
ESD_20V
TCET110G PL803
68n 50V
C5V6_SOD123
4n7 4kV
D827 TL431SAMF2
R842 4k7
1
C805 Q808 BC848B R856 5k1 2n2 4kV C851 R857 470R 100n 25V L801
A D813 K 1 2
R845 2k2
C850 10u 50V
R846 2k2
PL805
+12V_IDTV
R855
5k1
1k R854
1 2
Q804 BC848B
R834 22k Q805 BC848B
R843 22k R844 22k
STB_SUPPLY
3 4
STBY +33V_IDTV
OUTSUPPLY
FBKSUPPLY
INVERT_IN
STV9379FA IC600
GND OUT
N_INVERT_IN
VCC
003.sht
Ver. 03 Rev.
11AK57 DEFLECTION
DATE
08/10/2007
100u VERT+ C600 2n2 50V VERTC601 R600 100k R601 2k2 2n2 50V R612 10R 100p 50V 22n 100V 27k R605 390R C604 R607 2k2 R604 C603 +14V D603 HER107 63V C602 -14V
Author
YALCIN ELIK
Sheet
03 of 04
PL600
1
+14V C615 25V 470u
BA159
TR600
D607 R620 0R22 1/2W 45V 5 D606 EHT
100n 100V
C608
VPROT
C8V2
D600
5k1 R606
-14V C616 470u 25V BA159 R621 0R22 1/2W
15V 6
R608
R609
10R
1R
R613 33R Q601 BC639 C5V6 D602 R616 75R +5V R614 4R7 R617 Q602 BC639 C8V2 75R R622 0R22 1/2W
GND1 7
200V 9 BY299 +9V D608 FOCUS
E_W 4 G2
C609 100u 16V
C617
C618
100n 16V
220u 16V B+
150V 3 2
NC R633 +33V_IDTV
C610 100u
16V
+8V
D601
COLLECTOR 1 10
EHTINFO
BA159 D611 R630 0R22 1/2W
33R +33V C626 100u 50V 10k R634
7n5 1.6kV
C611
BA159_SMD GND2 VIDEO_B+ 10u 250V C619 12 13
GND3
L600
+12V 100R R602 1R5 1/2W
1
C605 100u 16V R611
3
Q603 C612 47n 250V
R624 0R47 1/2W
D609 +8V EHT_INFO R632 1k 22n 100V C625
5 2 4 R610 100R
C613 47n 250V
10V 11 8
HEATER
FBT_AK19 R618 47R BU2508AF
C607 2n2 2kV
250V 10u
PL603
2
C623
+5V R627 C624 100n 50V
1
HEATER
5k1
HOUT
R603 22R
C606 Q600 BC639 1N4148 D604 1N4148 D612 47n 100V C614
1
PL601
BA159 D610
2
R631 1R 1W VIDEO_B+
3 4
R619 HFLYBACK 10k 1N4148 D605
330n 250V
R628 1/4W
1n
500V
C622
+200V
+200V
R925 75R C901 R907 10k Q908 BF422
180p 50V R900 1k8 Q900 2SC2482 BF421 Q903 R917 100R C905 R909 330R 820p 50V +200V G 3
PL901
R 5 3k3 R901
R924 75R
B 8 GND F2 6 7 Q907 BF422 1 9 G1 2 G2 4 G3 EHT
+200V
R911
C902
PL900
1 2 3
180p 50V R902 1k8 Q901 2SC2482 BF421 Q904 R918 100R C900 220p 50V 3k3 R903 C907 R910 330R 820p 50V +200V R919 1k5 R 5
10k
PL902
4 5
R926 75R
+200V
R920 1k5
G 3
R912
C903
Q906 BF422
10k
R923 1k5
B 8 GND F2 6 7 1 9 G1 2 G2 4 G3 EHT
180p 50V R904 1k8 Q902 2SC2482 BF421 Q905 R922 100R C909 R914 330R 820p 50V C913
PL904
3k3 R905
1
2n7 1kV
1
PL905
+200V
1
PL907

PL903 PL906
004.sht
Ver. 03 Rev.
11AK57 CRT BOARD

DATE
08/10/2007
Author
YALCIN ELIK
Sheet
04 of 04
2.2.4. DVD PLAYER

2.2.4.1. General Description 2.2.4.1.1. MT1389D
The MT1389D Progressive Scan DVD-Player Combo Chip is a single-chip MPEG video decoding chip that integrates audio/video stream data processing, TV encoder, four video DACs with Macrovision. Copy protection, DVD system navigation, system control and housekeeping functions. The features of this chip can be listed as follows: Features Progressive scan DVD-player combo chip Integrated NTSC/PAL encoder. Built-in progressive video output DVD-Video, VCD 1.1, 2.0, and SVCD Unified track buffer and A/V decoding buffer. Direct interface of 32-bit SDRAM. Servo controller and data channel processing.
Video Related Features: Macrovision 7.1 for NTSC/PAL interlaced video. Simultaneous composite video and S-video outputs, or composite and YUV outputs, or composite and RGB outputs. 8-bit CCIR 601 YUV 4:2:2 output. Decodes MPEG video and MPEG2 main profile at main level. Maximum input bit rate of 15Mbits/sec
Audio Related Features: Dolby Digital (AC-3) and Dolby Pro Logic. Dolby Digital S/PDIF digital audio output. High-Definition Compatible Digital. (HDCD) decoding. Dolby Digital Class A and HDCD certified. CD-DA. MP3.
2.2.4.1.2.
SDRAM Memory Interface
The MT1389D provides a glueless 16-bit interface to DRAM memory devices used as OSD, MPEG stream and video buffer memory for a DVD player. The maximum amount of memory supported is 16MB of Synchronous DRAM (SDRAM). The memory interface is configurable in depth to support 110-Mb addressing. The memory interface controls access to both external SDRAM memories, which can be the sole unified external read/write memory acting as program and data memory as well as various decoding and display buffers.
2.2.4.1.3.
Drive Interfaces
The MT1389D supports the DV34 interface, and other RF and servo interfaces used by many types of DVD loaders. These interfaces meet the specifications of many DVD loader manufacturers.
2.2.4.2. System Block Diagram and MT1389D Pin Description 2.2.4.2.1. MT1389D Pin Description
2.2.4.2.2.
2.1 Sytem Block Diagram
A sample system block diagram for the MT1389D DVD player board design is shown in the following figurre:
2.2.4.3. Audio Output

The MT1389D supports two-channel and six-channel analog audio output. In a system configuration with six analog outputs, the front left and right channels can be configured to provide the stereo (2 channel) outputs and Dolby Surround, or the left and right front channels for a 5.1 channel surround system. The MT1389D also provides digital output in S/PDIF format. The board supports both optical and coaxial SPDIF outputs.
2.2.4.4. Audio DACS

The MT1389D supports several variations of an I2S type bus, varying the order of the data bits (leading or no leading zero bit, left or right alignment within frame, and MSB or LSB first) is possible using the MT1389D internal configuration registers. The I2S format uses four stereo data lines and three clock lines. The I2S data and clock lines can be connected directly to one or more audio DAC to generate analog audio output. The twochannel DAC is internal. The six channel DAC is PCM1606. The outputs of the DACs are not differential. The buffer circuits use National LM833 op-amps to perform the low-pass filtering and the buffering.
2.2.4.5. Video Interface

Video Display Output
The video output section controls the transfer of video frames stored in memory to the internal TV encoder of the MT1389D. The output section consists of a programmable CRT controller capable of operating either in Master or Slave mode. The video output section features internal line buffers which allow the outgoing luminance and chrominance data to match the internal clock rates with external pixel clock rates, easily facilitating YUV4: 2:2 to YUV4: 2:0 component and sample conversion. A polyphase filter achieves arbitrary horizontal decimation and interpolation.
Video Bus
The video bus has 8 YUV data pins that transfer luminance and chrominance (YUV) pixels in CCIR601 pixel format (4:2:2). In this format, there are half as many chrominance (U or V) pixels per line as luminance (Y) pixels; there are as many chrominance lines as luminance.
Video Post-Processing
The MT1389D video post-processing circuitry provides support for the color conversion, scaling, and filtering functions through a combination of special hardware and software. Horizontal upsampling and filtering is done with a programmable, 7-tap polyphase filter bank for accurate non-integer interpolations. Vertical scaling is achieved by repeating and dropping lines in accordance with the applicable scaling ratio.
Video Timing
The video bus can be clocked either by double pixel clock and clock qualifier or by a single pixel clock. The double clock typically is used for TV displays, the single for computer displays.
2.2.4.6. Flash Memory

The decoder board supports 70ns Flash memories. FLASH_512K_8b The MT1389D permits 8- bit common memory I/O accesses.
2.2.4.7. Serial Eeprom Memory

An I2C serial EEPROM is used to store user configuration (i.e. language preferences, speaker setup, etc.) and software configuration.. Industry standard EEPROM range in size from 1kbit to 256kbit and share the same IC footprint and pinout. The default device is 2kbit, 256kx 8, SOIC8 SGS Thomson ST24C02M1 or equivalent.
2.2.4.8. Audio Interface Audio Sampling Rate and PLL Component Configuration
The MT1389D audio mode configuration is selectable, allowing it to interface directly with low-cost audio DACs and ADCs. The audio port provides a standard I2S interface input and output and S/PDIF (IEC958) audio output. Stereo mode is in I2S format while six channels Dolby Digital (5.1 channel) audio output can be channeled through the S/PDIF. The S/PDIF interface consists of a bi-phase mark encoder, which has low skew. The transmit I2S interface supports the 112, 128, 192, 256, 384, and 512 sampling frequency formats, where sampling frequency Fs is usually 32 kHz, 44.1 kHz, 48 kHz, 96 kHz, or 192 kHz. The audio samples for the I2S transmit interface can be 16, 18, 20, 24, and 32-bit samples. For Linear PCM audio stream format, the MT1389D supports 48 kHz and 96 kHz. Dolby Digital audio only upports 48 kHz. The MT1389D incorporates a built-in programmable analog PLL in the device architecture in order to generate a master audio clock. The MCLK pin is for the audio DAC clock and can either be an output from or an input to the MT1389D. Audio data out (TSD) and audio frame sync (TWS) are clocked out of the MT1389D based on the audio transmit bit clock (TBCK). Audio receive bit clock (RBCK) is used to clock in audio data in (RSD) and audio receive frame sync (RWS).
2.2.4.9. Scematics 2.2.4.9.1. Part1
[1,2,4] [1,2,3] [1,2,3,4] [2] [2] [1] [2]

D
VCC VCC DV33 GND AL AR +12V MUTE_DAC DV33 GND AL AR +12V MUTE_DAC
D
LCH RCH
LCH RCH
[4] [4]
R116 24k C74 100pF
C75 AL 10uF/16v +
R117 10k C77
R118 5.1k 2 1/2VCC 3 1000pF
C76 1 + U13A NJM4558 OPA +12V
10uF/16v
R119 100 LCH 3
MUTE
VCC R120 10K R122 24k
C
+12V R124 470 2
R123 22k + CE31 C79 AR + 10k 4.7V 1 10K 1 1 10uF/16v C83 1000pF Q25 3906 3 R125
C78
100uF/16V D17 R121
R126 5.1k 6 1/2VCC 5
7 + U13B NJM4558 OPA +12V
A_MUTE
2 DV33 Q28 1 3906/NC 3 D19 1 1N4148/NC 2 3
Q15 2 3906
A_MUTE R147 1K
R134 10K/NC
R171 10K/NC MUTE_DAC
+12V
R17210k
R173100k 1/2VCC
CB57 0.1uF
R174 10k
+ CE38 47uF/16V
+ 100pF
A_MUTE
Q14 2N3904 SOT23
C80
10uF/16v
R127 100 RCH Q16 2N3904 SOT23
MediaTek Confidential
Title
MediaTek (ShenZhen) Inc.

COMMON1389E_HD60
Document Number Drawn: changqiao
Size C Date:
AUDIO OUT
Saturday, December 09, 2006
Checked: Tom Wang Sheet 1 of
Rev 3 5
R178 100 +5VV [1] +12V +12V VCC GND CVBS R G VB ASPDIF LCH RCH CVBS R90 75 L28 1.8uH C104 47P C105 47P 3 R86 75/NC 0 1 1 +5VV 2 C109 D25 1N4148/NC VCC R73 R88 ASPDIF CVBSO 2 C51 D27 0.1uF 1N4148/NC 1 + C52 10uF/16v C112 27PF Q10 3906/NC 33 0.1UF
R179 75 TP3 C110 100PF C111 100PF R180 100/NC
[1,2,5] VCC [1,2,3,5] GND [2] [2] [2] [2]

D
CVBS R G VB ASPDIF LCH RCH
1 2 3
J10 TJC3-3AW
D
[2] [5] [5]
OPTICAL P=2.54mm
J9 CVBSO R/V G/Y B/U D20 1N4148/NC 1 RGB/CVBS# ASPECT LCH RCH G/Y 1 Q6 3906/NC 3 2 D21 TJC3-10AW 1N4148/NC
C
+5VV
+5VV 2
R74 75/NC R76 0
1 2 3 4 5 6 7 8 9 10
G R78 75
C
2 L27 1.8uH C100 47P C101 47P
VCC L20 +5VV 10uH/NC C48
+5VV +5VV +5VV 2 VCC D24 1N4148/NC 3 R182 Q30 9014 1 3 RGB/CVBS# 4.7K 2 1 B/U [2] Q8 3906/NC 3 2 D26 1N4148/NC
B
R80 + C50 47uF/16v/NC 0.1uF R82 75/NC 0 1 1
R181 10K
R183 2K RGB_SWITCH 2
Q29 3906
VB L23 R84 75
B
2 1.8uH C58 47P C57 47P
+12V
R184 680 ASPECT R185 1k 3 R187 2k
C B E 3904 / 3906
Q31 2N3904 R188 2k 1 3 2
R186 75
[2]
FS0
2 1
Q32 2N3904
3906 C B E
R87
+5VV +5VV [2] D28 75/NC 0 1 1N4148/NC 1 FS1 2
R89
R/V Q11 3906/NC 3 2 D29 1N4148/NC

A
R L26 1.8uH
A
2 C64 47P
R91 75
C63 47P
Title

COMMON1389E_HD60
Drawn: changqiao
Size Document Number Custom VIDEO Date:
OUT
Checked: Tom Wang Sheet of 2
Rev 3 5
[1,2,5] DV33 [1,2,4,5] GND [2] [2] [2] [2] [2] [2] [2] [2] [2] MA[0..11] BA[0..1] DQM[0..1] DCLK DCKE CAS# RAS# WE# CS# DRAM
DV33 GND MA[0..11] BA[0..1] DQM[0..1] DCLK DCKE CAS# RAS# WE# CS# U8 MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 DBA0 DBA1 SDCLK SDCKE DCS# DRAS# DCAS# DWE# 8 6 4 2 33x4 CS# RAS# CAS# WE# DQM0 DQM1 23 24 25 26 29 30 31 32 33 34 22 35 20 21 38 37 19 18 17 16 15 39 36 40 54 41 28 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 BA0/A13 BA1/A12 CLK CKE CS RAS CAS WE DQML DQMH NC NC VSS VSS VSS DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 VCC VCC VCC VCCQ VCCQ VCCQ VCCQ VSSQ VSSQ VSSQ VSSQ 2 4 5 7 8 10 11 13 42 44 45 47 48 50 51 53 1 14 27 3 9 43 49 6 12 46 52 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 SD33 U7 MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 DBA0 SDCLK SDCKE DBA1 DRAS# DCAS# DWE# DQM0 DQM1 21 22 23 24 27 28 29 30 31 32 20 19 35 34 18 17 16 15 14 36 33 37 26 50 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 BA/A11 CLK CKE CS RAS CAS WE DQML DQMH NC NC VSS VSS DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 VCC VCC VCCQ VCCQ VCCQ VCCQ VSSQ VSSQ VSSQ VSSQ 2 3 5 6 8 9 11 12 39 40 42 43 45 46 48 49 1 25 7 13 38 44 4 10 41 47 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 SD33 SD33 + CE25 47uF/16v CB38 0.1uF CB39 0.1uF CB40 0.1uF
[2]
DQ[0..15] DRAM
DQ[0..15]
[2]
AD[0..7] FLASH
AD[0..7]
[2,3] [2,3]
SCL SDA IIC
SCL SDA
[2] [2] [2] [1] [2]
PCE# PRD# PWR# VCC A[0..20] FLASH
PCE# PRD# PWR# VCC A[0..20]
DV33 L29 FB
SD33 SD33 CB41 0.1uF CB42 0.1uF

C
SD33
RN1 DCS# DRAS# DCAS# DWE#

C
7 5 3 1
DBA0 DBA1 SDCKE SDCLK
R60 R61 R62 R63
33 33 33 33
BA0 BA1 DCKE DCLK C107 10PF
ESMT M12L64164A/N.C TSOP54
ESMT M12L16161A-7
CB43 0.1uF
CB44 0.1uF
CB45 0.1uF
CB46 0.1uF
CB47 0.1uF
16Mb
A20 R64 0/NC AA20 U9
B
DV33
FVCC
FVCC
R85
0 R68 CE26 10uF/16v + CB50 0.1uF CB52 0.1uF 10k 10k R70
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 AA20 PCE# PRD# PWR#
25 24 23 22 21 20 19 18 8 7 6 5 4 3 2 1 48 17 16 9 10 26 28 11 12
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 CE OE WE RESET
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15/A-1 WP/ACC BYTE VCC GND1 GND2
29 31 33 35 38 40 42 44 30 32 34 36 39 41 43 45 14 47 37 27 46
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 DV33 U11 1 2 3 4 NC NC NC GND VCC WP SCL SDA 8 7 6 5 GND SCL SDA
DV33
R67 1k
R65 1k
FVCC A0
EEPROM 24C02 SOP8
FVCC
A
CB53 0.1uF
MediaTek (ShenZhen) Inc. Title

COMMON1389E_HD60
Drawn: Size B Date: Document Number changqiao
IC FLASH MX29LV800 8Mb
SDRAM&FLASH
Checked: Tom Wang 3 of Sheet
Rev 3 5
JITFO V1P4 0.1uF RFV33 C4 R11 2200pF 680k OPO C5 0.1uF/NC R12 0 ADIN OPOP+ R15 150k R20
D
C3 R9
390pF 750k
JITFN DV33 L30 10UH DACVDD3 DV33 CB10 CB11 + CE13 0.1uF 47uF/16v + APLLVDD3
RFV33 C6
RFVDD3
R10 10
DV33
100k
DV33
0.1uF R18 15k C20 0.1uF
0.47uF/N.C
20pF
CE12 10uF/16v DC4
C9
C10
R13 1000pF
R16 150k
R17 C16 2200pF J2 ADACVDD3 6 5 4 3 2 1 PH2.0-6AW L10 680k V1P4 1.8uH
R19 6.8 PLLVDD3 ADACVDD3 + C21 6800pF C0603/SMD C26 0.1uF V2P8 CB14 + CE16 47uF/16v CB15 0.1uF V20 + CE17 47uF/16v CB16 0.1uF V1P4 + CE18 47uF/16v CE14 10uF/16v CB13 RFVDD3 0.1uF
10uF/16v
1500pF
C17
C15
NC 1
RFVDD3 C24 0.047uF
0.033uF
0.047uF
RFVDD3
G DACVDD3
APLLVDD3 AADVDD3
ADVCM
DV33
C23 C27
AR
AL
SLSL+
JITFN JITFO XTALI
RFV18
CE15 47uF/16v
PLLVDD3
DACVDD3 CVBS
ADACVDD3 ADACVDD3
0.1uF
SPSP+ LIMIT
R VB
R23
0.1uF
XI XO
C22
C25
R24
10k 0.1uF 0603 L11 10uH
AVDD3 IREF RFGC OSN OSP RFGND CRTPLP HRFZC RFRPAC RFRPDC RFVDD3 ADCVSS ADCVDD3 LPFOP LPFIN LPFIP LPFON PLLVDD3 IDACEXLP PLLVSS JITFN JITFO XTALI XTALO RFVDD18 RFGND18 ADACVDD2 ADACVDD1 ALF(CTR) ALS/SDATA0 AL/SDATA2 AVCM AR/SDATA1 ARS ARF(SW) ADACVSS2 ADACVSS1 APLLVSS APLLCAP APLLVDD AADVDD AKIN1 ADVCM AKIN2 AADVSS R/Cr/CVBS/SY B/Cb/SC DACVSSA G/Y/SY/CVBS DACVDDA DACVSSB DACVDDB CVBS DACVSSC
216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200 199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163
DV33
DV33 CE19 47uF/16v
AADVDD3 + C28 6800pF C0603/SMD C B A D C B A D RFO C29 C31 1uF C30 1uF C32 1uF 1uF C33 1uF CC BB AA DD
DV33 L37 FB RFV33 CE36 47uF/16v V18 V18 RFV18 CB17 0.1uF + C108 100NF
AVCC1
E F MDI1 LDO2 LDO1
2N3904
C
R32 R31 100k 3 R33
10k
AVCC1
RFVDD3 CB18 0.1uF
2 D 1
10k
IOA 1
C B E3
Q1 2N3904 R35 100k VCC
V2P8 V20 V1P4 TEZISLV OPO OPOP+ DMO FMO TROPEN TRO FOO ADIN V18 STBY A2 V18 A3 A4 A5 A6 A7 A8
2
1 G
2 Q2 2SK3018 3 3
2 Q3 2SK3018 L13 C38 0.1uF
C36 0.1uF
2SK3018
FB C37 V1P4 NC R38 NC + CE34 100uF/16v
RXD TXD TRCLOSE
A14 A13 A12 A11 A10 A9 A20 PCE# A1 PRD# AD0 AD1 AD2
PWR# A16 A15
VSCK IOA VSTB VSDA SCL SDA
DQM0 DQ7 DQ6 DQ5
AD3 AD4 AD5 AD6
AD7 A17 A0
25
R40 R41 1
10 10
CE21 47uF/16v
URST# IR
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
GND LD-DVD AVCC1 MDI1 LD-CD
E AVCC1 V20 GND F B A RFO IOA D C
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54
IOA18 IOA19 IOWR# A16 HIGHA7 DVDD3 HIGHA6 HIGHA5 HIGHA4 HIGHA3 HIGHA2 HIGHA1 IOA20 IOCS# IOA1 IOOE# AD0 AD1 AD2 DVSS AD3 AD4 AD5 AD6 IOA21 ALE AD7 A17 IOA0 DVDD18 UWR# URD# DVDD3 UP1_2 UP1_3 GPIO6 UP1_4 UP1_5 UP1_6 UP1_7 UP3_0 UP3_1 UP3_4 UP3_5 GPIO7 ICE PRST# IR INT0# DQM0# RD7 RD6 RD5 DVDD3
C
1 CB19 0.1uF Q4 3 8550 2 + 1 LDO2
AGND DVDA DVDB DVDC DVDD DVDRFIP DVDRFIN MA MB MC MD SA SB SC SD CDFON CDFOP TNI TPI MDI1 MDI2 LDO2 LDO1 SVDD3 CSO/RFOP RFLVL/RFON SGND V2REFO V20 VREFO FEO TEO TEZISLV OP_OUT OP_INN OP_INP DMO FMO TROPENPWM PWMOUT1/ADIN0 TRO FOO FG/ADIN1 GPIO0/VSYNC# GPIO1/HSYNC# GPIO2 IOA2 DVDD18 IOA3 IOA4 IOA5 IOA6 IOA7 HIGHA0
MT1389E
Pin Assignment v1.4
26
TOP
E3
A18 A19 DV33
55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108
2SB1132
RFV33
V18 + CE22 TP4 LDO1 DV33 FF+ LOADLOAD+ TROUT TRIN J4 5 4 3 2 1 PH2.0-5AW FOSO TRSO FMSO DMSO MO_VCC C39 C40 C41 0.1uF C42 VCC 330pF 330pF 29 7 6 5 4 3 2 1 R52 10k V1P4 R55 FOSO 20k C44 150pF VCC L31 FB TRCLOSE R4 100 2 Q9 8050 1 1 MO_VCC 3 3 R53 20k DMSO V1P4 R8 2K 8550 0.015uF R83 1 Q24 Q21 8550 R7 2K LOADC45 0.1UF LOAD+ MOVCC use DIP decal R46 R47 R48 R49 20k 18k 15k 10k FOO TRO FMO DMO VCC
HA1 HEADER 24 SMD0.5 TOP
Q5 8550 2 3
47uF/16v
R50 R54
10k 10k
R42 1
R43 1 TSL+ SL15 16 17 18 19 20 21 30
U4 VOTK+ VOTKVOLD+ VOLDPGND VNFTK PVCC2 G2 PREGND VINLD CTK2 CTK1 VINTK BIAS STBY CD5954 R58 10k CB36 0.1uF VOFC+ VOFCVOSL+ VOSLPGND PVCC1 VCC G1 VNFFC VOSL VINSLVINSL+ CF2 CF1 VINFC 14 13 12 11 10 9 8
R44 1
R45 1
SPSP+
MO_VCC
T+
R51
20k
FMSO TRSO V1P4 STBY
C43 150pF
CB34 0.1uF
22 23 24 25 26 27 28
+ CE24 47uF/16v
+ 10uF/16v 0.1uF R14 R175 33 XI C18 33pF 27MHz C19 33pF Y1 100k R176 33 XO
D
C11 10uF/16v +
C12
C13
C14
CB12
0.1uF
DV33
V18
FS VREF DACVDDC SPDIF MC_DATA ASDATA3 ASDATA2 ASDATA1 ASDATA0 ALRCK ACLK ABCK GPIO5 DVSS GPIO4 GPIO3 DVDD18 RA4 RA5 RA6 RA7 RA8 RA9 RA11 CKE DVDD3 RCLK RA3 RA2 RA1 DVDD18 RA0 RA10 BA1 BA0 RCS# RAS# CAS# RWE# DQM1 RD8 RD9 DVSS RD10 RD11 RD12 RD13 RD14 RD15 RD0 RD1 RD2 RD3 RD4
162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109
FS VREF DACVDD3 ASPDIF MUTE_DAC RGB_SWITCH FS0 FS1 C34 0.1uF
R26 560 URST# VCC DV33 GND IR TROUT TRIN LIMIT VSCK VSDA VSTB PCE# PWR# AL AR MUTE_DAC VSCK VSDA VSTB PCE# PWR# AL AR MUTE_DAC [1] [1] [1] [3] [3] [5] [5] [5] URST# VCC DV33 GND IR [1] [1,4,5] [1,3,5] [1,3,4,5] [1]
MA4 MA5 MA6 MA7 MA8 MA9 MA11 DCKE DCLK MA3 MA2 MA1 MA0 MA10 BA1 BA0 CS# RAS# CAS# WE# DQM1 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ0 DQ1 DQ2 DQ3 DQ4 TxD RxD 4 3 2 1 PH2.0-4AW
RGB_SWITCH FS0 FS1
RGB_SWITCH [4] FS0 [4] FS1 [4]
CVBS R G VB
CVBS R G VB
[4] [4] [4] [4]
VIDEO INTERFACE A[0..20] A[0..20] AD[0..7] PRD# PWR# PCE# J3 MA[0..11] DQ[0..15] BA[0..1] DQM[0..1] DCLK DCKE CAS# RAS# WE# CS# AD[0..7] PRD# PWR# PCE# FLASH MA[0..11] DQ[0..15] BA[0..1] DQM[0..1] DCLK DCKE CAS# RAS# WE# CS# MEMORY CB20 0.1uF CB21 0.1uF CB22 0.1uF CB23 0.1uF CB24 0.1uF SCL SDA DV33 IIC SCL SDA [3]
[3] [3] [3] [3] [3] [3] [3] [3] [3] [3] [3] [3] [3] [3]
B
U3 MT1389E LQFP216/SMD
DV33
RS-232
V18
[3] [3]
CB25 0.1uF
CB26 0.1uF
CB27 0.1uF
CB28 0.1uF
CB30 ASPDIF 0.1uF ASPDIF [4]
DV33
CB31 0.1uF
CB32 0.1uF
CB33 AUDIO INTERFACE 0.1uF
Title
2 R5 Q20 8050
100 TROPEN

COMMON1389E_HD60
Size C Date:
MT1389E LQFP 216

Rev 3 5
COMMON1389E_HD60_V3 MT1389E (LQFP216) DVD MP Board for SANYO HD60 PUH
1 2 3 4 5
NAME VCC DV33 RFV33 AV33 V18 SD33 +12V -12V AVDD5 DVDD3
INDEX & POWER, RESET MT1389E SDRAM & FLASH VIDEO OUT & AV-CON AUDIO OUT - WM8766
TYPE Digital 5V Digital 3.3V Servo 3.3V Laser Diode 3.3V Digital 1.8V Digital 3.3V Audio +12V Audio -12V Audio 5V Audio 3.3V DEVICE SUPPLY MT1389E MT1389E MT1389E SDRAM OP AMP. OP AMP. Audio DAC Audio DAC
Rev V1 V2 V3
History Initial released. Modified from 3-SY1389DP1-V11 Add SCART and VGA output Modify Video backend circuit.
P#
Date 2005.01.19 2005.03.01 2005.03.09
+12V URST# IR DV33 VCC GND
+12V
[4 5 ]
URST# [ 2 ] IR [2] DV33 VCC GND [ 2,3,5] [ 2,4,5 ] [ 2,3,4,5]
CON1 6 5 4 3 2 1 TJC3-6AW HEAD6-2.54/H P=2.54mm +5VCC +3.3VCC +12VCC CE5 100uF/25v + CB5 0.1uF +12VCC L35 FB [2] [2] [2] VSCK VSDA VSTB VSCK VSDA VSTB +12V
+5VCC L36 FB
VCC U10 AZ-1117 3.3V/NC OUT 2 IN GND
+3.3VCC
3 DV33 VCC CE10

B
RESET Circuit
+ CE39 100uF/16v/NC DV33
B
+ CB8 0.1uF
100uF/16v R2 10K CON2 6 5 4 3 2 1 TJC3-6AW P=2.54mm IR IRVCC VSDA VSCK VSTB R3 10k R1 R177 10k 10
D3 +3.3VCC DV33 + CE1 L32 1N4148
R6 10k
URST#
C1 10pF
10uF/16v FB CB3 + CE2 0.1uF 100uF/16v + CE9 10uF/16v DC4
L33
V18 D11 + CE37 100uF/16v 1N4007 D9 1N4007 + CE7 CB7 100uF/16v 0.1uF
FB
FM1 FM2
Title

COMMON1389E_HD60
Size C Date:
INDEX
Rev 3 5
2.3.
S-No 001 OSD FAPS
AK57 Service Menu

Tanm ( Definition ) First APS
Mmkn Ayarlar ( Possible Settings )

ON = Aktif OFF = n-Aktif ON = Active OFF = In-active OFF
Varsaylan Deer ( Default ) OFF
002
ISPM
I2C Modu ( I2C Mode ) Yazlm ve donanm resetleme ( Resetting software and hardware )
OFF
003
INIT
ON = Resetleme aktif OFF = Resetleme in-aktif ON = Enable resetting OFF = Disable resetting
OFF
Table 1 Init
S-No 004
OSD AGCSPD
Tanm ( Definition ) IF AGC hz ( IF AGC speed )

0 = Yava 1 = Standart 2 = Hzl 3 = Hz seviyesi 2 den daha yksek 0 = Slow 1 = Standard 2 = Fast 3 = Fastest 0..63
Varsaylan Deer ( Default ) 1
005
AGCTO
AGC Take over
31
Table 2 AGC Servis ayarlar ( AGC Service settings )
S-No 006
OSD COFF
Tanm ( Definition ) Cut Off Ayar ( Cut-Off setting )

0..63
Table 3 VG2 Alignment Servis ayarlar ( VG2 Alignment Service settings )
S-No 007
OSD VERT SLOP
Tanm ( Definition ) Dikey eim (VSL), SBL biti yar blanke anahtarlanmaldr. ( Vertical slope (VSL), SBL bit should be keyed to half-blank.) S-dorulamas (SC) ( S-correction (SC) ) 4:3 Wide Screen iin dikey kaydrma ( 4:3 vertical shifting for Wide Screen ) Dikey genlik (VA) ( Vertical Amplitude (VA) ) Yatay kaydrma ( Horizontal shifting ) 16:9 Wide Screen iin dikey kaydrma ( 16:9 vertical shifting for Wide Screen ) 16:9 Dikey genlik ( 16:9 Horizontal amplitude ) 50 Hzlik RGB modunda yatay kaydrma ( In RGB mode with 50 Hz, horizontal shifting ) 60 Hzlik RGB modunda yatay kaydrma ( In RGB mode with 60 Hz, horizontal shifting ) 4:3 MODE 60 Hz yatay kaydrma ( In 4:3 MODE with 60 Hz, horizontal shifting ) 4:3 MODE 60 Hz dikey kaydrma ( In 4:3 MODE with 60 Hz, vertical shifting ) 4:3 MODE 60 Hz dikey genlik ( In 4:3 MODE with 60 Hz, vertical amplitude ) 16:9 MODE 60 Hz dikey kaydrma ( In 16:9 MODE with 60 Hz, vertical shifting ) 16:9 MODE 60 Hz Dikey genlik ( In 16:9 MODE with 60 Hz, vertical amplitude )

0..63
008
SCORRECTION
0..63
32
009
VERT SHIFT
0..63
32
010
VERT AMP
0..63
32
011
HOR SHIFT
0..63
32
012
VERT SHIFT16
0..63
32
013
VERT AMP16
0..63
32
014
RGB HSH
0..63
37
015
RGB HSH60
0..63
37
016
60HZ HSH 43
0..63
31
017
60HZ VSH 43
0..63
31
018
60HZ VA 43
0..63
31
019
60HZ VSH 169
0..63
31
020
60HZ VA 169
0..63
31
Table 4 Geometri Servis ayarlar ( Geometry Service settings )
S-No 021
OSD QSS
Tanm ( Definition ) Qss amfi mode deitirici

ON = QSS Aktif OFF = QSS n-aktif ON = QSS Active OFF = QSS In-Active 0..63
Varsaylan Deer ( Default ) ON
( Switching the mode of the QSS amplifier )

022 OIF IF-PLLde DC ofset dorultmas ( DC offset correction at IF-PLL ) PLL demodulatr frekans ( PLL demodulator frequency )
29
023
IF
024
OFR
Frekans Girii Aktivasyonu: Installation mensndeki Tuning Mode olan Frekans modunu aktif veya pasif hale getirir. ( Frequency Entry Activation: Frequency mode which is value Tuning Mode item on the Installation menu can be enabled or disabled by OFR. ) IF-PLL Hz filtresi
0 = 58.75 MHz 1 = 45.75 MHz 2 = 38.90 MHz 3 = 38.00 MHz 4 = 33.40 MHz 5 = 42.00 MHz 6 = 33.90 MHz 7 = 48.00 MHz 8 = EXTERNAL ON = Aktif OFF = n-aktif ON = Active OFF = In-Active
ON
025
FFI
( Fast filter IF-PLL )
ON =Hzl zaman sabiti OFF = Normal zaman sabiti ON = Fast time constant OFF = Normal time constant 0..15
OFF
026
BS1
(Gerekli ayarlamay yapmak iin ilgili Tuner dkmanna baklmaldr.) ( Please look at the related Tuner specification for necessary adjustments. ) (Gerekli ayarlamay yapmak iin ilgili Tuner dkmanna baklmaldr.) ( Please look at the related Tuner specification for necessary adjustments. ) (Gerekli ayarlamay yapmak iin ilgili Tuner dkmanna baklmaldr.) ( Please look at the related Tuner specification for necessary adjustments. ) (Gerekli ayarlamay yapmak iin ilgili Tuner dkmanna baklmaldr.) ( Please look at the related Tuner specification for necessary adjustments. )
027
BS2
0..15
028
BS3
0..15
029
CB
0..255
142
S-No 030
OSD B1-H
Tanm ( Definition ) (Gerekli ayarlamay yapmak iin ilgili Tuner dkmanna baklmaldr.) ( Please look at the related Tuner specification for necessary adjustments. ) (Gerekli ayarlamay yapmak iin ilgili Tuner dkmanna baklmaldr.) ( Please look at the related Tuner specification for necessary adjustments. ) (Gerekli ayarlamay yapmak iin ilgili Tuner dkmanna baklmaldr.) ( Please look at the related Tuner specification for necessary adjustments. ) (Gerekli ayarlamay yapmak iin ilgili Tuner dkmanna baklmaldr.) ( Please look at the related Tuner specification for necessary adjustments. )

0..255
031
B1-L
0..255
32
032
B2-H
0..255
30
033
B2-L
0..255
Table 5 Tuning Servis ayarlar ( Tuning Service settings )
S-No 034
OSD FRAV
Tanm ( Definition ) AV iin Peaking merkezi frekans ( For AV, Peaking center frequency ) SECAM iin Y-delay ayar ( For SECAM, Y-delay setting ) NTSC iin Y-delay ayar ( For NTSC, Y-delay setting ) PAL iin Y-delay ayar ( For PAL, Y-delay setting ) AV-1 iin Y-delay ayar ( For AV-1, Y-delay setting ) SVHS iin Y-delay ayar ( For S-VHS-2, Y-delay setting )

0 = 2.7 Mhz 1 = 3.1 Mhz 2 = 3.5 Mhz 0..15
035
YSCM
12
036
YNTS
0..15
037
YPAL
0..15
038
YAV1
0..15
039
YSVHS
0..15
Table 6 Video Servis ayarlar ( Video Service settings )

S-No 040 OSD WPRC Tanm ( Definition ) Cold iin White point Red

0..63
S-No
OSD
Tanm ( Definition ) ( For Cold, White point Red ) Cold iin White point Green ( For Cold, White point Green ) Cold iin White point Blue ( For Cold, White point Blue ) Black seviyesi ofset Red Blue ( Black level offset Red Blue) Black seviyesi ofset Green ( Black level offset Green ) Normal iin White point Red ( For Normal, White point Red ) Normal iin White point Green ( For Normal, White point Green ) Normal iin White point Blue ( For Normal, White point Blue ) RGB iin Black seviyesi ofset Red Blue ( For RGB, Black level offset Red Blue ) RGB iin Black seviyesi ofset Green ( For RGB, Black level offset Green ) Warm iin White point Red ( For Warm, White point Red ) Warm iin White point Green ( For Warm, White point Green ) Warm iin White point Blue ( For Warm, White point Blue ) YUV iin Black seviyesi ofset Red Blue ( For YUV, Black level offset Red Blue ) YUV iin Black seviyesi ofset Green ( For YUV, Black level offset Green ) RGB iin White point Red ( For RGB, White point Red ) RGB iin White point Green ( For RGB, White point Green ) RGB iin White point Blue ( For RGB, White point Blue )

0..63
041
WPGC
042
WPBC
0..63
31
043 044
BLORB BLOG
0..63 0..63
32 32
045
WPRN
0..63
37
046
WPGN
0..63
32
047
WPBN
0..63
19
048
BLRB-RGB
0..63
32
049
BLG-RGB
0..63
32
050
WPRW
0..63
49
051
WPGW
0..63
40
052
WPBW
0..63
25
053
BLRB-YUV
0..63
32
054
BLG-YUV
0..63
32
055
WPRW-RGB
0..63
32
056
WPGW-RGB
0..63
40
057
WPBW-RGB
0..63
32
Table 7 White ton ayarlar ( White tone adjustments )
S-No 058
OSD OSO
Tanm ( Definition ) Dikey overscande Switch-off ( Switch-off at vertical overscan )

ON = Aktif Switch-off OFF = n-aktif Switch-off ON = Enable Switch-off OFF = Disable Switch-off ON = Sync genlii %60 sabit seviyede bulunan dikey slicing OFF = Otomatik dikey slicing seviyesi ON = Vertical slicing level
059
FSL
Dikey sync iin Forced Slicing seviyesi ( For vertical sync, Forced Slicing level )
OFF
fixed to 60% of sync amplitude OFF = Automatic vertical slicing level

060 PN8-STB If option is ON TV can open from stanby when PIN8 is activated Peak white snrlayc ( Peak white limiting ) Bypass chroma temel-band ( Bypass chroma base-band ) OFF = feature is not avaliable ON = feature is avaliable 0..15 OFF
061
PWL
062
BPS
ON = Bypass temel-band kroma gecikme izgisi OFF = Temel-band kroma gecikme izgisi aktif ON = Bypass baseband
OFF
chroma delay line

OFF = Baseband chroma
delay line active

063 CLPL Soft krpma seviyesi ( Soft clipping level ) 0 1 2 3 = = = = PWLin 0% stnde PWLin 5% stnde PWLin 10% stnde n-aktif 0
064
CL
Katot drive seviyesi ( Cathode drive level ) Option for sleep timer last minute indicator
0 = 0% above PWL 1 = 5% above PWL 2 = 10% above PWL 3 = Off 0..15
10
065
ST-LMI
ON = last minute
OFF
indicator appears on TV OFF = last minute indicator does not appear on TV
S-No 066
OSD DNMENU
Tanm ( Definition ) Dynamic Menu Mode

ON = Dynamic Menu Enable OFF = Dynamic Menu Disable
067
UK-EU
IDTV UK veya PAN-EU
OFF = 0 UK (IDTV UK) ON = 1 PAN-EU (IDTV PAN-EU)
OFF
Table 8 Bit Kontrol Servis ayarlar ( 8 Bit Control Service settings )
S-No 068
OSD FAVI
Tanm ( Definition ) FAV ( FAV )

ON = Aktif OFF = n-aktif ON = Active OFF = In-active ON = Aktif OFF = n-aktif ON = Active OFF = In-active ON = Aktif OFF = n-aktif ON = Active OFF = In-active ON = Aktif OFF = n-aktif ON = Active OFF = In-active ON = Aktif OFF = n-aktif ON = Active OFF = In-active ON = Aktif OFF = n-aktif ON = Active OFF = In-active ON = Aktif OFF = n-aktif ON = Active
069
BAVI
BAV ( BAV )
OFF
070
BSVI
SVHS ( SVHS )
OFF
071
SSTDBG
BG ses standard ( BG sound standard )
ON
072
SSTDI
I ses standard ( I sound standard )
ON
073
SSTDDK
DK ses standard ( DK sound standard )
ON
074
SSTDL
L- L prime ses standard ( L- L prime sound standard )
ON
S-No
OSD
Tanm ( Definition )

OFF = In-active
Varsaylan Deer ( Default )
Table 9 Kaynak seimi Servis seenekleri ( Source Switching Service settings)
S-No 075
OSD TXHPOS
Tanm ( Definition ) Teletext tek sayfa balang noktas ayarlar ( One page Teletext starting point setting ) Teletext parlaklk ayar ( Teletext brightness setting ) Teletext contrast ayar ( Teletext contrast setting ) Men dili seimi ( Menu language setting ) Men dili seimi ( Menu language setting )

0..20
076
TXTBRI
0..63
32
077
TXTCON
0..15
078
LSEL1
0..255
255
079
LSEL2
0..255
255
080
-------
Table 10 Teletext Servis seenekleri ( Teletext Service settings )
S-No 081
OSD PWPRF
Tanm ( Definition ) Alta grnt ve sesin gelmesine gre, fast startup ve perfect startup. ( According to video and sound, when TV opening, fast startup and perfect startup ) STANDBYdan alr. ( Opens from STANDBY. )

0..15 0 = Fast 15 = Perfect
082
PWRES
ON = Son duruma gore alr OFF = STANDBYdan alr ON = Opens depending on the last state OFF = Opens from STANDBY
ON
Table 11 G Servis seenekleri ( Power Service settings )
S-No
OSD
Tanm ( Definition )
Varsaylan Deer ( Default )
083
MAXCOL
Picture mensndeki maksimum renk ayar snrlaycs (Maximum color setting limiter at Picture menu ) Picture mensndeki maksimum parlaklk ayar snrlaycs (Maximum brightness setting limiter at Picture menu ) Picture mensndeki minimum parlaklk ayar snrlamas (Minimum brightness setting limiter at Picture menu) Picture mensndeki maksimum contrast ayar snrlaycs (Maximum contrast setting limiter at Picture menu )
0..63
50
084
MAXBRI
0..63
57
085
MINBRI
0..63
20
086
MAXCON
0..63
50
Table 12 Picture Servis seenekleri ( Picture Service settings )
S-No 087
OSD SAVEFS
Tanm ( Definition ) Fabrika Servis ayarlarn saklama ( Saving Factory settings ) Fabrika Servis ayarlarn ykleme ( Loading Factory setting ) Ses menusunde AVLi optional yapar (AVL is optional in sound menu) OAVL = 0 (AVL is off and AVL line is not avaliable in sound menu) OAVL = 1 (AVL line is avaliable in sound menu) OAVL = 2 (AVL is on and AVL line is not avaliable in sound menu) Other values of OAVL work like OAVL =1 Selection for hotel mode search HTLSRC = 0 (TV) HTLSRC = 1 (AV) HTLSRC = 2 (FAV) HTLSRC = 3 (SVHS) HTLSRC > 3 (HOTEL MODE NOT AVAILABLE) Maximum volume for hotel mode Volume level definition for hotel mode when tv is openning Preover Shoot Ratio PSYS_RATIO_PRE_OVERSHOOT_MIN =0 PSYS_RATIO_PRE_OVERSHOOT_MAX =3

OFF
088
LOADFS
OFF
OFF
089
OAVL
0-63
32
090
HTLSRC
0-63
32
091 092 093
HMAXVOL HDEFVOL RPO
0-63 0-63 0-3
32 32 32
094
PF
095
APSSND
096
SRCO
Peaking Frequency PF1-PF0 = 0 (2.7 Mhz) 1 (3.1 Mhz) 2 (3.5 Mhz) 3 (spare) Default value of sound standard in APS menu 0-> BG 1-> I 2-> DK 3-> L\L Control DVD,IDTV, AV2 (Only AK58) sources 0-> DVD, AV2 are OFF 1-> DVD is ON. AV2 is OFF 2-> AV2 is ON. DVD is OFF 3-> DVD, AV2 are ON
0-3
0-3
0-7
Table 13 Fabrika Servis ayarlar ( Factory Service settings ) Geometri ayarlar : Service mensndeki 007-011 satrlar arasndaki 50Hz geometri ayarlar yapldktan sonra, NTSC offsetlerin belirlenmesi iin 016-018 satrlar arasndaki NTSC 60Hz ayarlar yaplr. NTSC ayarlarn her tp almas iin bir kez yaplmas yeterlidir. nk NTSC ayarlar yaplrken, NTSC offset deerleri hesaplanarak EEPROM da saklanr. 16:9 Zoom modu ayarlarda NTSC ayarlar gibi yaplr ve 16:9 offset deerleri hesaplanarak EEPROMda saklanr. Daha sonra 50 Hz geometri ayarlar deitirildiinde, 007-011 veya 016-018 satrlar arasnda iken men tusuna baslarak geometri ayarlar kaydedildiinde, otomatik olarak 16:9 modu, RGB horizontal shift ve NTSC geometri deerleri hesaplanr. RGB horizontal shift offset deerleri koda gml haldedir. NTSC ve 16:9 modu offset deeri EEPROMda saklanmaktadr. Geometry Adjustment: After adjusting 50Hz geometry items (between 007-011). NTSC 60 Hz geometry items (between 016-018) should be adjusted to determine NTSC 60Hz offset. NTSC offset is automatically calculated and stored in NVM. Later on, if we need to change 50Hz geometry settings, NTSC 60Hz geometry settings is automatically calculated by using NTSC offset. 16:9 mode geometry adjustment works like NTSC 60Hz geometry adjustment. If press to menu button between 007-011 or 016-018 items. New geometry setting is stored and, 16:9 mode, RGB shift and NTSC geometry automatically calculated. RGB shift offset value is stored in software. Only NTSC offset and 16:9 mode offset values are stored in EEPROM. AGC ayar : Tunere 60db yayn verildikten sonra AGCTO iteminin uzerine gelinip mavi tua basldgnda AGC otomatik olarak ayarlanr. AGC adjustment: Connect to tuner 60db broadcast and, press to blue button on AGCTO item. AGC is automatically adjusted. Screen Ayar: Servis mensnde sar tua baslarak, dikey tarama iptal edilir ve screen ayarnn yaplabilmesi iin ilgili registerlar gncellenir. Ekranda ince bir izgi belirir. Daha sonar bu ince izgi en ince hale gelene kadar screen potansiyometrisi ayarlanr. Tekrar sar tua basldnda eski ayarlar geri yklenir. Screen Adjustment: When yellow button is pressed in service menu. Vertical scan is disabled and related registers are updated. Thin line will be appeared on the screen. Then the screen potentiometer is gently adjusted until the thin line will be lightly disappeared When press to yellow button again, old register values are reloaded and vertical scan is enabled. FOCUS Ayar : TV de yayn verilir. . FOCUS potansiyometresi en uygun deerede ayarlanr. FOCUS Adjustment: TV is tuned to the signal. Then focus potantiometer (the upper pot on the rear side of the FBT transformer) is adjusted for optimum focusing drive.
2.4.
TUNER SETTINGS
VHF1-VHF3 Frq. (Mhz) 156,25 MHz 140,25 Mhz 114,25 MHz 170,25 MHz 170,25 MHz 142,25 MHz 149,25 MHz 142,25 MHz 142,25 MHz VHF3-UHF Frq. (Mhz) 441,25 MHz 431.25 Mhz 401,25 MHz 465,25 MHz 449,25 MHz 425,25 MHz 424,25 MHz 425,25 MHz 425,25 MHz AK56 SERVICE MENU ITEMS B1-H B1-L B2-H 012 050 030 011 050 029 009 146 027 013 018 031 013 018 030 011 082 029 011 194 028 011 011 Explanations B1H B1L B2H B2L BS1 BS2 BS3 CB High byte of VHF1-VHF3 cross-over frequency Low byte of VHF1-VHF3 cross-over frequency High byte of VHF3-UHF cross-over frequency Low byte of VHF3-UHF cross-over frequency Band switching byte for VHF1 Band switching byte for VHF3 Band switching byte for UHF Control byte 082 082 029 029 B2-L 02 098 130 130 130 002 242 002 002 BS1 001 001 003 001 001 001 001 001 001 BS2 002 002 006 002 002 002 002 002 002 BS3 004 008 133 004 008 008 008 008 008 CB 142 142 142 142 142 142 142 142 142
Philips UV1316S MK3 LG TAEW-G002D Thomson CTT5020

Samsung TECC2949PG28B
Samsung TECC2949PG35B Alps TEDE9X226A Alps TEDE9-004A Samsung TECC2949PG40B Samsung TECC2949PS40B
According to Reference Divider 62.5 Khz apply the following formula Value = ( Frequency (Mhz) * 1000 ) / ( 62.5 ) + 622 ; Binary_value ( 2 bytes ) = ToBinary( value ); x can be 1 or 2 Bx-H = MSByte( Binary_value ); ( most significant byte ) Bx-L = LSByte( Binary_value ); ( least significant byte )

Ak57 DVD Service Manual

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Ak57 DVD Service Manual

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TABLE OF CONTENTS

GENERAL DESCRIPTION .....................................................................................5

1. Introduction 1.1. Purpose

2. General Description 2.1. Introduction

System Building Blocks

2.2.1. AK57 Chassis Block Diagrams

DVD-ON DVD-MONO DVD-CVBS DVD-SPDIF

VERTICAL DRIVE HORIZANTAL DRIVE HOR. FB HEATER

IDTV-CVBS IDTV-MONO IDTV-SPDIF

P2.5_PWM4 P3.2_ADC2 69 70 74 P1.2_INT0 P1.3_T1 P2.1_PWM0 50 51

B+ 12V DVD12V IDTV12

SC-PIN8 RGB-FB SC-R SC-G SC-B SC-CVBS-IN SC-MONO-IN SC-CVBS-OUT SC-MONO-OUT

A12V DVD5V 5VSTB 3V3STB DVD3V3 STB

11AK57 GENERAL BLOCK DIAGRAM

3V3STB 5VSTB DVD3V3 DVD5V

11AK57 SMPS BLOCK DIAGRAM

HORIZONTAL HORIZONTAL DRIVE

VERTICAL AMPLIFIER AN5524A

2.2.2. AK57 Chassis Main Blocks

SAW FILTERS SMPS DEFLECTION CRT BOARD

2.2.2.1. UOC-II (ULTIMATE-ONE-CHIP)

Figure: Test Circuit (Stereo)

Figure: Test Circuit (Bridge)

Figure: Application in 11AK56

2.2.2.3. External AV I/O

0.7Vpp / 75 0-0.4VDC, 1-3VDC / 75 1Vpp / 75 1Vpp / 75

0.5Vrms / 10K 1Vpp / 75

Back AV Output Audio Video 0.5Vrms / 1K 1Vpp / 75

2.2.2.4. AV Switching 2.2.2.4.1. MC74VHC4052

Low Band Mid Band High Band

Noise Low band : Mid band : High band :

Typical Max. 5dB 9dB 5dB 9dB 6dB 9dB

2.2.2.6. SAW FILTERS 2.2.2.6.1.

K3958M (IF Filter for Video Applications)

K9656M (IF Filter for Audio Applications)

Input Input - ground Chip carrier - ground Output Output

K2966 (IF Filter for Intercarrier Applications)

K2962 (IF Filter for Intercarrier Applications)

G1975 (IF Filter for Intercarrier Applications)

2.2.2.7. SMPS 2.2.2.7.1. PRIMARY BLOCK

Internal Circuit Architecture

SMPS Block Diagram

3V3STB 5VSTB DVD3V3 DVD5V

11AK57 SMPS BLOCK DIAGRAM

Tuning Voltage : +33V max 100mA %5

AN15524A (VERTICAL DEFLECTION OUTPUT)

2.2.2.9. CRT BOARD

2.2.3. AK57 Chassis Scematics

2.2.3. AK57 Chassis Scematics

BC858B Q107 1N4148

C135 10k R127 L108 +3V3_STB 47u 16V

C101 100n 50V

C140 100n 16V

100n C158 16V

C139 47p 50V

C142 47p 50V

100n C157 50V

C102 100u 16V

C103 100n 50V

100R C159 R186

BLM21A601S C136 100u 16V

16V R148 100R R142 100R

3 220R R221 180R R222 4.5MHz_TRAP

67 P1.0_INT1 68 P1.1_T0 69 P1.2_INTO 70 P1.3_T1 71 P1.6_SCL 72 P1.7_SDA 73 P2.0_PMW 74 P2.1_PWM0