Interrupt

A signal informing a program that an event has occurred. When a program receives an interrupt signal, it takes a specified action (which can be to ignore the signal). Interrupt signals can cause a program to suspend itself temporarily to service the interrupt. Interrupt signals can come from a variety of sources. For example, every keystroke generates an interrupt signal. Interrupts can also be generated by other devices, such as a printer, to indicate that some event has occurred. These are called hardware interrupts. Interrupt signals initiated by programs are called software interrupts. A software interrupt is also called a trap or an exception. PCs support 256 types of software interrupts and 15 hardware interrupts. Each type of software interrupt is associated with an interrupt handler -- a routine that takes control when the interrupt occurs. For example, when you press a key on your keyboard, this triggers a specific interrupt handler. The complete list of interrupts and associated interrupt handlers is stored in a table called the interrupt vector table, which resides in the first 1 K of addressable memory. Almost all personal (or larger) computers today are interrupt-driven - that is, they start down the list of computer instructions in one program (perhaps an application such as a word processor) and keep running the instructions until either (A) they can't go any further or (B) an interrupt signal is sensed. After the interrupt signal is sensed, the computer either resumes running the program it was running or begins running another program. Basically, a single computer can perform only one computer instruction at a time. But, because it can be interrupted, it can take turns in which programs or sets of instructions that it performs. This is known as multitasking. It allows the user to do a number of different things at the same time. The computer simply takes turns managing the programs that the user effectively starts. Of course, the computer operates at speeds that make it seem as though all of the user's tasks are being performed at the same time. (The computer's operating system is good at using little pauses in operations and user think time to work on other programs.) Actions taken by the CPU following an Interrupt. Hardware actions:

- As soon as the CPU is prepared to handle the interrupt, it asserts an interrupt

acknowledge signal on the bus.

- The interrupt controller puts a small integer (interrupt vector) on the data bus to
identify the interrupting device. The CPU saves the interrupt vector, temporarily.

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The CPU pushes Program Counter and Program Status World (PSW) onto the stack. The CPU uses the interrupt vector to form a new Program Counter, pointing to the start of the Interrupt Service Routine for the device causing the interrupt. Often the PSW is loaded or modified as well (e.g. to disable further interrupts).

Software Actions: The Interrupt Service Routine saves all the registers on the stack so they can be restored later. Information about the interrupt, such as status codes, are read. I/O error handled here. A special signal may inform the device or the interrupt controller that the interrupt has been processed. Restore all the saved registers. Execute the Return From Interrupt (RTI) instruction. CPU continues from where it left the main program.

Polling Making continuous requests for data from another device - it is a software technique whereby the processor continually asks a peripheral device if it needs servicing. In electronic communication, 'polling' is the continuous checking of other programs or devices by one program or device to see what state they are in, usually to see whether they are still connected or want to communicate. Specifically, in multi-point or multi-drop communication (a controlling device with multiple devices attached that share the same line), the controlling device sends a message to each device, one at a time, asking each whether it has anything to communicate (in other words, whether it wants to use the line). Polling works well if a minimum amount of processing is required in response to each request. For slow I/O transfers, the processor will be spending most of its time in its polling loop, asking each I/O device in turn if it has any data ready. This amounts to wasted time, during which the CPU could be carrying out other useful tasks. In applications where there is little else for the processor to do (such as keyboard scanning, for example), this is fine, but for applications which involve substantial calculation as well, this amounts to inefficient use of the processor. The advantage of polling is its simplicity.
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Interrupt vector table: A table of interrupt vectors (pointers to routines that handle interrupts). On PCs, the interrupt vector table consists of 256 4-byte pointers, and resides in the first 1 K Byte of addressable memory. Each interrupt number is reserved for a specific purpose. For example, 16 of the vectors are reserved for the 16 IRQ lines. An interrupt vector table is also called a dispatch table. IRQ: Abbreviation of interrupt request line, and pronounced I-R-Q. IRQs are hardware lines over which devices can send interrupt signals to the microprocessor. When you add a new device to a PC, you sometimes need to set its IRQ number by setting a DIP switch. This specifies which interrupt line the device may use. IRQ conflicts used to be a common problem when adding expansion boards, but the Plug-and-Play specification has removed this headache in most cases. Pointers: In programming, a pointer is a special type of variable that holds a memory address (that is, it points to a memory location). Routines: A section of a program that performs a particular task. Programs consist of modules, each of which contains one or more routines. The term routine is synonymous with procedure, function, and subroutine Event: An action or occurrence detected by a program. Events can be user actions, such as clicking a mouse button or pressing a key, or system occurrences, such as running out of memory. Most modern applications, particularly those that run in Macintosh and Windows environments, are said to be event-driven, because they are designed to respond to events. Direct Memory Access Direct Memory Access is a capability provided by some computer bus architectures that allows data to be sent directly from an attached device (such as a disk drive) to the memory on the computer's motherboard. The microprocessor is freed from involvement with the data transfer, thus speeding up overall computer operation. Usually a specified portion of memory is designated as an area to be used for direct memory access. In the Industry Standard Architecture bus standard, up to 16 megabytes of memory can be addressed for DMA. The Extended Industry Standard Architecture and Micro Channel Architecture standards allow access to the full range of memory addresses (assuming they're addressable with 32 bits). Peripheral Component Interconnect accomplishes DMA by using bus master (with the microprocessor "delegating" I/O control to the PCI controller). An alternative to DMA is the Programmed Input/Output (Programmed Input/Output) interface in which all data transmitted between devices goes through the processor. A newer protocol for the ATA/IDE interface is Ultra DMA/33, which provides a burst
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data transfer rate up to 33 MB (megabyte) per second. Hard drives that come with Ultra DMA/33 also support PIO modes 1, 3, and 4, and multiword DMA mode 2 (at 16.6 megabytes per second). DMAs are used most commonly today by floppy disk drives, tape drives and sound cards. Some expansion boards, such as CD-ROM cards, are capable of accessing the computer's DMA channel. When you install the board, you must specify which DMA channel is to be used, which sometimes involves setting a jumper or DIP switch. PCI: Acronym for Peripheral Component Interconnect, a local bus standard developed by Intel Corporation. Most modern PCs include a PCI bus in addition to a more general ISA expansion bus. Many analysts, however, believe that PCI will eventually supplant ISA entirely. PCI is also used on newer versions of the Macintosh computer. PCI is a 64-bit bus, though it is usually implemented as a 32-bit bus. It can run at clock speeds of 33 or 66 MHz. At 32 bits and 33 MHz, it yields a throughput rate of 133 MBps. Although it was developed by Intel, PCI is not tied to any particular family of microprocessors. DMA Controllers Standard DMA transfers are managed by the DMA controller, built into the system chipset on modern PCs.

CPU
Bus Bus Req. Ack. DMA Controller Transfer Request DISK Peripheral Controller

BUS Transfer Complete

Transmit Acknowledge

Memory
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The disk is connected to a peripheral controller which communicates to the DMAC via the transfer Request and Transmit Acknowledge handshake lines. The DMA in turn interfaces to the CPU via the Bus Request, Bus Acknowledge and Transfer Complete lines. The sequence of events involved in transferring data from disk to memory using DMA: The CPU first sets up the disk controller for a read, initialises and starts the DMAC. The disk controller then requests a transfer from the DMAC. The DMAC does not respond immediately, but waits until the peripheral device actually has some data ready to transfer. Once it has, the DMAC requests the system bus from the processor. Unlike the situation with interrupts, the CPU can respond immediately, since its internal state is not changed during DMA cycles; there is no need to push or pull information from stack Once the DMA takes control of the bus, it places the memory start address of the desired block in the address register, acknowledges the peripheral controllers request, then requests the data from the peripheral. The data is latched into memory, after which the DMAC acknowledges the transfer to the disk. The DMAC then relinquishes the bus, increments the start address register and compares the start and finish addresses. If they are equal the DMA transfer is terminated and the DMAC interrupts the CPU (DMA end). If they are not equal, the DMAC waits for the next transfer request from the disk controller.

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