CO-ORDINATION OF DIRECTIONAL OVERCURRENT PROTECTION WITH LOAD CURRENT FOR PARALLEL FEEDERS P J Hindle *, J W Wright, G Lloyd

ALSTOM T&D Protection & Control Ltd Stafford, ST17 4LX, UK 1. INTRODUCTION
51 67 IF 1 / 2 A B F1 IF 1 / 2 51 I F1 67 51 IF1 / 2 51 C D E F2 51

Directional phase overcurrent relays are commonly applied at the receiving ends of parallel feeders or transformer feeders. Their purpose is to ensure full discrimination of main or back-up power system overcurrent protection for a fault near the receiving end of one feeder. This paper reviews this type of relay application and highlights load current setting constraints for directional protection. Such constraints have not previously been publicised in well-known text books. A directional relay current setting constraint that is suggested in some text books [1], [2] is based purely on thermal rating considerations for older technology relays. This constraint may not exist with modern numerical relays. In the absence of any apparent constraint, there is a temptation to adopt lower current settings with modern directional relays in relation to reverse load current at the receiving ends of parallel feeders. This paper identifies the danger of adopting very low current settings without any special relay feature to ensure protection security with load current during power system faults. A system incident recorded by numerical relays is also offered to highlight this danger. In cases where there is a need to infringe the identified constraints an implemented and tested relaying technique is proposed (patent applied for). 2. APPLICATION OVERVIEW Co-ordination of overcurrent protection for parallel feeders poses a particular problem of discrimination when one feeder is subjected to a fault close to its receiving end. This situation is illustrated by the fault at location F1 in Figure 1. The difficulty exists for both plain parallel feeders and for parallel transformer feeders. To ensure co-ordination of overcurrent protection for the fault condition illustrated in Figure 1 directional , relay D-67 must operate to clear the fault before there is any danger of non-directional relay operation (C-51 or A-51) for the healthy feeder. It is not always a requirement to provide non-directional receiving-end protection (C-51/D-51) as well as directional protection.

LOAD

SOURCE

51 = Non-directional timed-delayed overcurrent 67 = Directional timed-delayed overcurrent

Figure 1- Parallel Feeder Overcurrent Protection Consideration Co-ordination of protection can be achieved using dependent-time relays or independent-time relays. With reference to Figure 1, protection co-ordination according to either practice is illustrated in Figure 2 and Figure 3.

TIME A-51 D-67 C-51 E-51 IF1 / 2 CURRENT IF 2 (Single Feeder)

Figure 2 Co-ordination of Dependent-Time Overcurrent Protection British and North American overcurrent relaying practice has been primarily based on the application of dependent-time overcurrent relays. In continental Europe, there is a preference for independent-time overcurrent relays. There are various technological, historical and habitual reasons for such preferences. The

relative application advantages and disadvantages of both types have been well discussed and documented over many years and it is not the objective of this paper to advocate one practice in preference to another.

setting dependent-time relays down to 50% of load current with a standard inverse time multiplier setting down to 0.1 is mentioned. A very similar recommendation is offered in an alternative UK text book [2]. In discussing the application of low voltage directional overcurrent protection for parallel transformers, another text book [3] suggests that low settings in current and time may be permissible. One North American reference [4] positively implies that there is no load current setting constraint. What is not mentioned in well-known references is the fact that setting directional overcurrent protection too far below maximum load current in the non-operate direction is a potential threat to protection security during power system source faults. This fact is considered in this paper. 4. DIRECTIONALITY WITH LOAD 4.1 Parallel Transformer Feeders

TIME A-51 C-51 D-67 E-51 IF 1 / 2 CURRENT IF 2 (Single Feeder)

Figure 3 Co-ordination of Independent-Time O/C Protection 3. DIRECTIONAL RELAY SETTINGS When considering time settings, the minimum operating times for directional relays C-67 and D-67 must take into account the transient response of relay directional elements for reverse faults, where transient saturation of current transformers might occur. The directional protection should not operate for reverse faults. By definition, overcurrent relays can discriminate between normal load and fault conditions by responding to excess current flow. Relay current settings would usually be in excess of maximum load current by a safe margin, which is at least based on relay accuracy and relay reset ratio. Where directional overcurrent protection is applied to look in the opposite direction to the flow of load current, at the receiving ends of parallel feeders, the directional aspect of the protection might be considered as an alternative means of discriminating between normal load and fault conditions. In such applications, the adoption of current settings below load current appears to be an option. This can assist with relay co-ordination. Many applications exist where directional relay current settings are below the maximum load current in the non-operate direction. Guidance in protection literature about how far below load current directional overcurrent relays can be practically set is rather limited and vague. One text book [1] suggests that settings below load current in the non-operate direction are permissible for plain parallel feeders, but mentions that any relay thermal withstand limitation must be taken into account. A practice of

Figure 4 illustrates the distribution of HV and LV load currents, for a Dy11 (+300) transformer feeder, during a B-C phase fault at the HV source. LV Directional overcurrent protection (DOC) may be applied in the case of parallel feeders, but Figure 4 has been simplified to consider a single, loaded, transformer only.
I(HV) A E N B c C DOC Dyn11 I (LV) Transformer
n

ZL

Figure 4 Distribution of Feeder Load Currents for an HV Source Fault Figure 5 illustrates the relationships between HV and LV voltage and current vectors before and after application of the HV fault. The level of LV load current on two phases during the fault would be 86.7% of the prefault level and it would be virtually zero on the third phase. Figure 6 graphically illustrates the behaviour of the two LV, quadrature-polarised, directional elements which see significant current during the HV fault. It can be seen that the C-phase directional element sees a polarising voltage and operating current relationship that may lead to unwanted protection operation. Such unwanted operation would only be possible if the LV directional protection current setting was below 86.7% of the prefault load current.

VA IA VC N IC IB HV Prefault VB Vc Ib = I L

Va =1.0p.u.

Ic = I L Vb

by the transformer LV directional protection might be up to 100% rated current. To offer security against HV phase-phase faults, the directional protection should not be set below 86.6% rated current. Where there are only two parallel feeders, of course, the directional protection is not even required when one feeder is out of service. Where a current setting as high as 86.6% rated current is unacceptable for overcurrent protection co-ordination under normal circumstances, with all parallel feeders in service, advantage could be obtained through the use of modern numerical relays with more than one group of settings. The preferred application settings could form Setting-Group-1, but contingency settings could form Setting-Group-2. If there are only two feeders in total, the LV directional protection could actually be disabled in Setting-Group-2. 4.2 Plain Parallel Feeders

Ia = I L LV Prefault Va=0.866 p.u.

VA IA N IC VC IB VB Ic = 0.866IL Ib = 0 n Vb = 0

Ia = 0.866IL Vc=0.866 p.u. LV Postfault

E

HV Postfault

I(send) A

Plain I (receive) Feeder

Figure 5 Feeder Voltage and Load Current Vectors for a B-C Source Fault

ZL

VPOL-a

Vb-c C OPERATE

VPOL-c

Va-b C

KCEG

OPERATE

Ic

Figure 7 Distribution of Plain Feeder Current for a Source Bus Fault Figure 7 illustrates the distribution of sending-end and receiving-end load currents for a plain feeder during a BC phase fault at the source bus. Figure 8 illustrates the relationships between receivingend and sending-end voltage and current vectors before and after application of the source fault. The level of LV load current on two phases during the fault would be 50% of the prefault level and it would be 100% on the third phase.
VA Va

Ia

RESTRAIN RESTRAIN

Figure 6 Load Current Operation of One Transformer Directional Element For parallel transformer feeders, a common design criterion is that the maximum system load must be carried with one of the feeders out of service. In the case of two parallel feeders, without any allowance for some shorttime overload capability, the maximum prefault load current for each feeder would be 50% rated current, if such a rule is applied and if both feeders are in service. This means that directional protection should not be set below 43.3% rated current to offer security for two parallel feeders. In the case of three parallel transformer feeders, the prefault load current with all feeders in service might be 66.7% of rated current and so LV directional protection should not be set below 57.7% of rated current for directional protection security. When one feeder of a parallel set is intentionally out of service for maintenance, the prefault load current seen

I B = IL VC IA = IL

IC = I L VB

Ib = 0.5IL N Vc

I c = 0 . 5 IL

Prefault

V Ia = IL b Postfault

Figure 8 Feeder Receiving-End Voltage and Current Vectors for a Source Fault Figure 9 graphically illustrates the behaviour of three receiving-end, quadrature-polarised, directional elements

during the HV fault. The B-C phase polarising voltage for the A-phase directional protection would be zero. This would prevent many electromechanical or even static directional relays from making a directional decision for the A-phase.

numerical relay disturbance records, this will no longer be possible. With the application of dependent-time directional overcurrent protection, any pick-up of relays with reverse load current during a power system source fault is likely to be marginal, resulting in a long protection operation time. In such instances, a source fault is more likely to be cleared before any risk of unwanted relay operation. The common rule-of-thumb directional protection setting constraint mentioned earlier [2] (setting of >50% rated current), does not appear to pose a load current security problem for two plain feeders - even when a protected feeder is fully loaded prior to a source fault occurring. Such a setting would also be secure for two parallel transformer feeders when the total load on the feeders does not exceed the rated current for one feeder and when both feeders are in service. When one feeder is out of service, however, an HV phase-phase fault could result in one directional relay giving response to a 86.7% rated current against a setting of 50% rated current. For the security infringement just quoted, the relay operating current multiple would be low (1.73 times setting). This would result in relatively slow operation of a dependent-time overcurrent relay element. The same setting reference [2] quotes a minimum dependent-time relay time multiplier setting (TMS >0.1). With an operating current multiple of 1.73, a TMS of 0.1 and with an IEC type-A [5] operating time characteristic selected, the time required for unwanted relay response would be as long as 1.27 seconds. Provided the HV fault was cleared in less time than this, there would be little chance of unwanted tripping. This aspect probably explains why unwanted load trips have not so far been a generally reported problem with dependent-time directional relays applied to two parallel transformers. With new relays, the virtual absence of a thermal constraint on minimum current settings may lead to less secure current settings being adopted in future; unless relays are designed to address the issue highlighted in this paper. It is important to note that the derivations of load current constraints in section 4 were based on an assumption that the system load impedances were linear, with equal impedance to positive and negative sequence current. This may not always be the case. Where deltaconnected induction motors form a significant percentage of the total system load, the increase in A and C-phase motor currents with suppression of Bphase current must be considered [6], [7]. 6. RELAY SECURITY FEATURE For power systems in some areas of the world, plant shortages can mean that each feeder of a parallel set

RESTRAIN

OPERATE C

VPOL-A VB-C

IA RESTRAIN IB VPOL-C OPERATE C VA-B

C
IC OPERATE

VC-A

VPOL-B

RESTRAIN

Figure 9 Load Current Operation of One Feeder Directional Element Some numerical relays incorporate a polarising voltage memory system to allow response to close-up 3-phase faults. With such relays, the behaviour of the A-phase element with B-C voltage memory must also be considered. It can be seen from Figure 9 that the C-phase directional element sees a polarising voltage and operating current relationship that may lead to unwanted protection operation. Such unwanted operation would only be possible if the LV directional protection current setting was below 50.0% of the prefault load current. When considering the normal design criterion for parallel feeders, that was discussed in section 4.1, where the maximum system load must be carried with one of the feeders out of service, the minimum pick-up current setting constraint for directional protection applied to two parallel feeders would be 25% rated current with full system operation. 5. OBSERVATIONS The fact that a load current security risk is not highlighted for directional protection in common literary references is probably a reflection that reverse load current security problems have not commonly been encountered in practice. Technical reasons for this may be that very low current settings are not commonly applied, or that protected circuits are rarely fully loaded. The other possibility is that unwanted trips have occasionally occurred, but have been dismissed as inexplicable events. With the analytical benefit of

would be loaded to near full capacity with all plant in service. In such situations it would be essential to adopt minimum safe current settings for receiving-end directional protection in relation to load current, in order to provide source fault security. The setting rules must be particularly adhered to when independent-time protection is applied, if the time to unwanted relay operation for a source fault would be less than the clearance time for the source fault. One relaying technique for avoiding the load current setting constraints identified in this paper (patent applied for) is to adopt 2-out-of-3 phase overcurrent protection tripping logic. Since the directional element of only one phase may be insecure with load current during a source fault, overall protection security will be achieved if at least two directional elements are required to operate before tripping. Real-time digital simulator tests on relays have confirmed the suitability of the 2-out-of-3 logic for preventing unwanted reverse load current tripping for source faults. In such applications, directional earth fault protection must be used in conjunction with phase overcurrent protection. 7. REPORTED PROBLEM INCIDENT In a recently reported incident, there was unwanted Cphase directional protection tripping at both receiving ends of two parallel, 66kV/12kV, Dyn11, transformer feeders. The overcurrent protection for the 60Hz system in question was applied in a similar manner to that depicted in Figure 1. Receiving-end directional protection was provided by independent-time phase overcurrent elements of numerical relays. These were set to 104 Amps primary, with time settings of 200 milliseconds. The relays were able to capture the incident in question using their integral disturbance recording facilities. Recorder triggering was via trip output relay initiation. The numerical records for this incident were loaded into spread-sheet software for analysis. A one-cycle Fourier filtering technique was used to derive the variation in magnitude and angle of the phase current and phase voltage vectors seen by the relays before and during the incident. The variations in magnitude are displayed in Figure 10. It should be noted that the relay time scales are not synchronised to each other, but to the trip output initiation of each relay. With knowledge that the power transformers are of Dyn11 configuration, it can be deduced from the LV fault voltage and current magnitude profiles depicted in Figure 10 that the HV fault was between phases B and C. For this fault condition, section 4.1 highlights the security risk for C-Phase LV directional protection. In

accordance, it was the C-phase protection that actually initiated unwanted tripping in this case. Other information confirmed that the fault also involved earth. This would only have influenced the magnitude of LV load current during the fault. It can also be seen from Figure 10 that the fault was evolutionary in its initial stage.
Derived 60Hz RMS Phase-Neutral LV Voltage Magnitudes 12 MAG V(C) 10 8 6 4 2 0 0 0.2 0.4 TIME (S) 0.6 0.8 1.0 1.2 kV MAG V(B) MAG V(A)

350 300 250 200 150 100 50 0 -50 0 A

Derived 60Hz RMS LV Phase Current Magnitudes - Transformer No.1

MAG I(A)

MAG I(C) TIME (S) 0.2 0.4 0.6

MAG I(B) 0.8 1.0 1.2

Derived 60Hz RMS LV Phase Current Magnitudes - Transformer No.2 250 200 150 A 100 50 0 0 -50 0.2 0.4 0.6 0.8 1.0 1.2 MAG I(C) MAG I(B) TIME (S) MAG I(A)

Figure 10 Derived Relay Voltage and Current Vector Magnitudes Figure 10 highlights the fact that unwanted tripping of transformer number 2 occurred before tripping of transformer number 1. Transformer 1 passed fault current for a longer period and its fault current contribution increased after transformer 2 tripped. Figure 10 shows that the average LV prefault load current seen by transformers 1 and 2 was 160 Amps and 175 Amps, respectively. The difference was probably due to disparity between tap changer positions. The LV

directional protection setting of 104 Amps was 65% of the lowest prefault current, which is an infringement of the 87% minimum safe setting constraint identified in section 4.1. With further processing of the Fourier-filtered voltage and current samples recorded by the relays, it was possible to derive the theoretical response of the relay directional elements to the fault voltage and current waveforms recorded for each transformer, as displayed in Figure 11. It can be seen from Figure 11, with reference to Figure 10, that transient variations in current for transformer number 1, during the evolutionary stage of the fault, cause a transient reset in the derived C-Phase directional element response. This transient directional decision reset would have occurred before the 200 millisecond protection time delay expired, which would explain the relative delay for the unwanted trip of transformer 1. The derived directional decision for transformer 2, which saw marginally more load current, is continuous until interruption of transformer 2 current, as a result of the trip that took place.
Derived C-Phase Directional Element Response TF1 1.0 STATE

8. CONCLUSIONS There are minimum safe current setting constraints to be observed when applying directional overcurrent protection at the receiving-ends of parallel feeders. The minimum safe settings to ensure that there is no possibility of an unwanted trip during clearance of a source fault are as follows for linear system load:-

Parallel plain feeders:Set >50% Prefault load current Parallel transformer feeders:Set >87% Prefault load current When the above setting constraints are infringed, independent-time protection is more likely to issue an unwanted trip during clearance of a source fault than dependent-time protection. Where the above setting constraints are unavoidably infringed, secure phase fault protection can be provided with relays which have 2-out-of-3 directional protection tripping logic. A common minimum current setting recommendation (50% relay rated current) would be virtually safe for plain parallel feeder protection as long as the circuit load current does not exceed 100% relay rated current. It would also be safe for parallel transformer feeders, if the system design criterion for two feeders is such that the load on each feeder will never exceed 50% rated current with both feeders in service. For more than two feeders in parallel the 50% relay rated current setting may not be absolutely safe. With modern numerical relay technology, the absence of a past thermal constraint on settings has encouraged users to adopt lower current settings for directional protection. In doing so, an identified mode of insecurity that might be encountered can be addressed through simple relaying logic. The integral disturbance recording facilities of modern numerical relays are able to highlight causes of unwanted tripping that may have gone unnoticed in the past.

TIME (S) 0 0

0.2

0.4

0.6

0.8

1.0

1.2

Derived C-Phase Directional Element Response TF2 1.0 STATE

TIME (S) 0 0

0.2

0.4

0.6

0.8

1.0

1.2
9. REFERENCES

Figure 11 Derived TF1 & TF2 C-Phase LV Directional Element Responses This incident highlights the danger of applying directional protection at the receiving ends of parallel feeders with very low current settings in relation to reverse load current. It also highlights the fact that removal of old technology thermal constraints can entice users to adopt current settings that are insecure and that a relay solution to the problem is desirable.

1. GEC Measurements, Protective Relay applications Guide, section 9.19, third edition, 1987. 2. The Electricity Council, Power System Protection section 8.4.6, Vol. 2, second edition, 1986, ISBN: 0-906048-53-2 3. F.E Wellman, Protective Gear Handbook, page 215, chapter 10, second edition, 1968, ISBN: 273 43655 4.

4. IEEE, IEEE Recommended Practice for Electric Power Distribution for Industrial Plants, section 5.5.2.1, first edition, 1986, ISBN: 0-471-85687-8 5. IEC Standard 255-3 part 3, section 3.1, second edition, 1989. 6. G Fielding & M Elkateb, New Solid State Relay Characteristics to Meet the Special Requirements of Distribution Systems and Plant, section 3.1.1, Paper 28, CIRED conference, Lige, 1979. 7. GEC Measurements, Protective Relay applications Guide, section 20.12, third edition, 1987.