Chapter 4 BJT BIASING CIRCUIT

Introduction Biasing
The analysis or design of a transistor amplifier requires knowledge of both the dc and ac response of the system. In fact, the amplifier increases the strength of a weak signal by transferring the energy from the applied DC source to the weak input ac signal The analysis or design of any electronic amplifier therefore has two components: The dc portion and The ac portion During the design stage, the choice of parameters for the required dc levels will affect the ac response. What is biasing circuit? Biasing: Application of dc voltages to establish a fixed level of current and voltage.

Purpose of the DC biasing circuit

To turn the device ON To place it in operation in the region of its characteristic where the device operates most linearly . Proper biasing circuit which it operate in linear region and circuit have centered Q-point or midpoint biased Improper biasing cause Improper biasing cause Distortion in the output signal Produce limited or clipped at output signal

Important basic relationship

I= IC + I B E
IC = IB

I E = ( + 1)I B I C

V= V CE V BE CB

Operating Point
Active or Linear Region Operation Base Emitter junction is forward biased Base Collector junction is reverse biased Good operating point Saturation Region Operation Base Emitter junction is forward biased Base Collector junction is forward biased Cutoff Region Operation Base Emitter junction is reverse biased

BJT Analysis

DC analysis

AC analysis

Calculate the DC Q-point

Calculate gains of the amplifier

solving input and output loops

Graphical Method

DC Biasing Circuits
Fixed-bias circuit Emitter-stabilized bias circuit Collector-emitter loop Voltage divider bias circuit DC bias with voltage feedback

FIXED BIAS CIRCUIT

This is common emitter (CE)

configuration 1st step: Locate capacitors and replace them with an open circuit 2nd step: Locate 2 main loops which; BE loop (input loop) CE loop(output loop)

FIXED BIAS CIRCUIT

1st step: Locate capacitors and replace them with an open circuit

FIXED BIAS CIRCUIT

2nd step: Locate 2 main loops.

BE Loop
1

CE Loop

FIXED BIAS CIRCUIT

BE Loop Analysis

From KVL;

0 V CC + I B R B +V BE = V CC V BE I B = RB
A

IB

FIXED BIAS CIRCUIT

CE Loop Analysis

From KVL;
V CC + I C RC +V CE = 0
IC
2

V CE = V CC I C RC As we known;

I C = I B B Substituting

with

V VBE I C = DC CC RB
Note that RC does not affect the value of Ic

FIXED BIAS CIRCUIT

DISADVANTAGE
Unstable because it is too dependent on and produce

width change of Q-point For improved bias stability , add emitter resistor to dc bias.

Load line analysis

A fixed bias circuit with given

values of VCC,RC and RB can be analyzed ( means, determining the values of IBQ, ICQ and VCEQ) using the concept of load line also. Here the input loop KVL equation is not used for the purpose of analysis, instead, the output characteristics of the transistor used in the given circuit and output loop KVL equation are made use of.

Saturation Region

Q-Point DC Load Line

Cutoff Region

Plot load line equation

V= V CC I C RC CE
IC(sat) occurs when transistor operating in saturation region

I Csat

VCC = RC

VCE = 0

VCE(off) occurs when transistor operating in cut-off region

VCE( off ) = VCC I C RC

I C =0

Circuit Values Affect the Q-Point

Increasing Rc Decreasing Vcc

Varying Ib

EMITTER-STABILIZED BIAS CIRCUIT

An emitter resistor, RE is added to improve stability 1st step: Locate capacitors and replace them with an open circuit 2nd step: Locate 2 main loops which;

BE loop
Resistor, RE added

CE loop

EMITTER-STABILIZED BIAS CIRCUIT

1st step: Locate capacitors and replace them with an open circuit

EMITTER-STABILIZED BIAS CIRCUIT

2nd step: Locate 2 main loops.

BE Loop
1

CE Loop

EMITTER-STABILIZED BIAS CIRCUIT

BE Loop Analysis

From kvl;
V CC + I B R B +V BE + I E R E = 0

Recall; I E = ( + 1) I B Substitute for IE

V CC + I B R B +V BE + ( + 1)I B R E = 0 V CC V BE I B = R B + ( + 1)R E

EMITTER-STABILIZED BIAS CIRCUIT

CE Loop Analysis

From KVL;
V CC + I C RC +V CE + I E R E = 0 Assume;
2

Therefore;

I E IC

VCE = VCC I C ( RC + RE )

Improved Bias Stability

The addition of the emitter resistor to the dc bias of the BJT provides improved stability, that is, the dc bias currents and voltages remain closer to where they were set by the circuit when outside conditions, such as temperature, and transistor beta, change.

Without Re

With Re

V CC V BE Ic = RB

V CC V BE Ic = R B + ( + 1)R E

Note :it seems that beta in numerator canceled with beta in denominator

VOLTAGE DIVIDER BIAS CIRCUIT

Provides good Q-point stability with a single polarity supply voltage

This is the biasing circuit wherein, ICQ and VCEQ are almost independent of

beta. The level of IBQ will change with beta so as to maintain the values of ICQ and VCEQ almost same, thus maintaining the stability of Q point. Two methods of analyzing a voltage divider bias circuit are: Exact method : can be applied to any voltage divider circuit Approximate method : direct method, saves time and energy, 1st step: Locate capacitors and replace them with an open circuit 2nd step: Simplified circuit using Thevenin Theorem 3rd step: Locate 2 main loops which; BE loop CE loop

VOLTAGE DIVIDER BIAS CIRCUIT

2nd step: : Simplified circuit using Thevenin Theorem

Thevenin Theorem;

From Thevenin Theorem;

RTH = R1 // R2 =

R1 R2 R1 + R2

VTH =

R2 VCC R1 + R2

Simplified Circuit

VOLTAGE DIVIDER BIAS CIRCUIT

2nd step: Locate 2 main loops.

BE Loop CE Loop

2 1 1

VOLTAGE DIVIDER BIAS CIRCUIT

BE Loop Analysis

From KVL;
V TH + I B RTH +V BE + I E R E = 0

Recall; I E = ( + 1) I B
1

Substitute for IE
V TH + I B RTH +V BE + ( + 1)I B R E = 0 V V BE I B = TH R RTH + ( + 1)R E

VOLTAGE DIVIDER BIAS CIRCUIT

CE Loop Analysis

From KVL; Assume;

2

V CC + I C RC +V CE + I E R E = 0

Therefore;
VCE = VCC I C ( RC + RE )

I E IC

Approximate analysis:

Ri R2 I R 2 I b ( + 1)R E R 2 R E > 10R 2

If this condition applied then you can use approximation method . This makes IB to be negligible. Thus I1 through R1 is almost same as the current I2 through R2. Thus R1 and R2 can be considered as in series. Voltage divider can be applied to find the voltage across R2 ( VB)

Approximate Analysis
When RE > 10R2 , Then IB << I2 and I1 I2 :

R 2 VCC VB = R1 + R 2
VE IE = RE

VE = VB VBE

From Kirchhoffs voltage law:

VCE = VCC I C R C I E R E
IE IC VCE = V CC I C (R C + R E )
This is a very stable bias circuit. The currents and voltages are nearly independent of any variations in .

DC Bias with Voltage Feedback

Another way to improve the stability of a bias circuit is to add a feedback path from collector to base. In this bias circuit the Q-point is only slightly dependent on the transistor beta, .

Base-Emitter Loop
From Kirchhoffs voltage law:

-VCC + I R C +I B R B +VBE +I E R E = 0 C
Where IB << IC:
I' = I + I I C C B C

Knowing IC = IB and IE IC, the loop equation becomes:

VCC I B R C I B R B VBE I B R E = 0

Solving for IB:

IB = VCC VBE R B + (R C + R E )

Collector-Emitter Loop
Applying Kirchoffs voltage law: IE + VCE + ICRC VCC = 0 Since I C IC and IC = IB: IC(RC + RE) + VCE VCC =0 Solving for VCE: VCE = VCC IC(RC + RE)