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Table of Contents
2
Table of Contents
3
vCE(t) i C(t)
VCC IO
pv (t)
iC
vCE
p
E
v C i
=
t2
CE
dt t v p t1
0 t1 t2
( )
switch
Increased switching speed, decreases the switching losses Eswitch But, leads to increased di/dt and therewith to higher over voltages =
v
vCE(t) i C(t) VCC
IO
di dt
stray
di/dt
0
pv (t)
pv (t)
Eswitch
0 t1 t2 t 0 t1 t2
Eswitch
t
Would you use Porsche Diesel - 1960 these different vehicles with the same driver and in the same environment?
Motivation
6
Table of Contents
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vovershoot
di = Lstray dt
These voltage overshoots may destroy the IGBT module because they are added to the DC-link voltage and may lead to VCE > VCEmax
Motivation
8
Lstray = 20 nH
Lstray = 100 nH
The mechanical design has a significant influence on the stray inductance of the DC-link
The conductors must be paralleled
Lstray = 100 %
loop
1 cm 10 nH
Lstray < 20 %
The mechanical design has a significant influence on the stray inductance of the DC-link
The connections must be in line with the main current flow
Lstray = 30 %
The mechanical design has a significant influence on the stray inductance of the DC-link
Also the orientation must be taken into regard
Lstray = 100 %
+ + -
Lstray = 80 %
bus bar
The mechanical design has a significant influence on the stray inductance of the DC-link
A paralleling of the capacitors reduces the inductance further
Lstray = 100 %
Lstray = 50 %
For paralleling standard modules a minimum requirement is DC-link design with two paralleled bars
+
Low Inductance DC-link Design
~ +
17
Fan
DC-link
Driver
Apple
Heat Sink
+ + + --+ + -
+ + + -
+ + + -
Capacitor
Capacitor
Table of Contents
21
vovershoot
di = Lstray dt
These voltage overshoots may destroy the IGBT module because they are added to the DC-link voltage and may lead to VCE > VCEmax
Motivation
22
Snubber Networks
23
DC-link
Snubber
Not to increase Lstray, the snubber must be located directly at terminals of the IGBT module
Snubber Networks
24
IGBT switch off (raise of VCE ) before optimisation Voltage overshoot Oscillation
r e b b u n s y a r t s
VCE
r e b b u n s y a r t s
V1 VDC
V2
2C
L =
22
s u b C D y a r t s
r e b b u n s
22
C C 2 i
r e b b u n s
s u b C D y a r t s
0 0
From different suppliers different snubber capacitors are available. In a trial and error process the optimum can be find, based on measurements. The different snubber capacitors have different stray inductance values. Again it is necessary to find one with lowest inductance.
better good
IGBT switch off (raise of VCE ) after optimisation Voltage overshoot No oscillation
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Over voltages at the gate VGE > +/- 20 V can occur due to
Induction at stray inductances Burst impulses by EMC
Gate Clamping
31
VGE
Gate Clamping
32
Gate clamping with Schottky Diode from gate to supply voltage of driver
On driver board (distance to module 5 cm, twisted pair wires) Additional RGE is recommended
V+ supply
VGE
Gate Clamping
33
Gate clamping with Zener Diode or Avalanche Diode from gate to emitter potential
On driver board (distance to module 5 cm, twisted pair wires) Or on auxiliary PCB Parallel RGE is recommended
VGE
Gate Clamping
34
Gate Clamping
35
Table of Contents
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Thermal Management
37
Thermal Management
38
Table of Contents
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G AE
VGE
VGE
VGE
Due to hard connected gates, all IGBTs must have the same VGE This means: all IGBTs do not switch independently from each other
VGE(th)
t t1 1 t1 n
G AE
VGE 1 VGE 2 VGE n
With individual gate resistors all IGBTs are independent from each other
VGE
VGE(th)
t1 t2
G AE
V1 i= V2 Vn E
G
RE1 RE2 REn
AE
V1 i 10 A V2 Vn
fast IGBT
slow IGBT
G AE
VRE1 i VRE2
G
VRE1 VRE2 i
AE E
This circuit is patented by SEMIKRON, but SEMIKRON customers are allowed to use it together with SEMIKRON power semiconductor modules.
Additional Proposals
48
AE E
Additional Proposals
49
Limitation of equalising currents Damping of oscillations Prevention of gate over voltages Refer also to SEMIKRON Application Manual - Power Modules
German English Chinese Korean Japanese Russian (on internet only)
Conclusion
50
PCB for paralleling IGBT close to the module connectors Same track length on the board Short, twisted pair wires from the board to the modules ( 5 cm)
RGon RGoff
RE
RGon RGoff
RE
RE
RGoff RGon
RE
RGoff RGon
Top
Bot
Table of Contents
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Simulation of 4 paralleled IGBT modules with inhomogeneous current sharing leads to oscillations
IC
Motivation
55
G E
Symmetrical AC Connection
56
AC link design
Short connections with identical current path length for each module Wide and thick bars Flexible interconnections for large systems might be necessary to compensate differences in thermal expansion Long hole drillings' can compensate mechanical tolerances
Isolated supporting poles take over vibrations and forces from heavy AC cables
Look for a symmetric AC-connection so that the current sharing will be even over all modules
Symmetrical AC Connection
57
Table of Contents
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Optimisation problem
In order to optimise the thermal management it seems to be be useful splitting the current of one half bridge topology into two modules. The question is: what is better use two paralleled half bridges, or two single switches in series connection? 1
2 1
~ 59
2 2
Motivation
+
1 1 1 3 3
Paralleling of GB modules
60
+
1
+
1
2 1
~
2 1
~
61
Paralleling of GA modules
Increased switching speed, decreases the switching losses Eswitch But, leads to increased di/dt and therewith to higher over voltages =
di dt
stray L
di/dt
0
pv (t)
pv (t)
Eswitch
0 t1 t2 t 0 t1 t2
Eswitch
t
Comparison
For GB modules the diodes for commutation are placed in the same module. Therewith the stray inductance is as low as possible. Paralleled GB modules allow higher switching speeds
+
1 1 3 3
+
1 2
~
2 1
~
63
GA or GB?
Comparison
In half bridge modules the snubber capacitors can be placed closed to the terminals with short - and therewith low inductive connections. So that the snubbers work very efficient. Paralleled GB modules allow higher switching speeds
GA or GB?
64
SEMIKRON recommends the use of paralleled half bridge modules instead of single switch modules
Conclusion
65
Table of Contents
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Conclusion
68
Conclusion
69
70
Document status:
preliminary
2006-04-04 1.3 Christian Daucher With assistance from Dr. Arendt Wintrich Norbert Pluschke
Information furnished in this document is believed to be accurate and reliable. However, no representation or warranty is given and no liability is assumed with respect to the accuracy or use of such information. Furthermore, this technical information specifies semiconductor devices but promises no characteristics. No warranty or guarantee expressed or implied is made regarding delivery, performance or suitability. Specifications mentioned in this document are subject to change without notice. This document supersedes and replaces all information previously supplied and may be supersede by updates.
71
Remove this connection and handle the modules only when it is assured, that the environment is ESD proof
Additional
72