ECE 385 SAMPLE QUIZ (Answers)

This quiz has 15 problems. Make sure you have a complete quiz before you begin. Write your full name and circle your section and TA name on the front page. Your quiz will be returned to your TA after grading. You will have 45 minutes to complete this quiz. Write all of your answers on the quiz itself. This quiz is closed-book. You may NOT use a calculator. DO NOT DO ANYTHING THAT MIGHT BE PERCEIVED AS CHEATING. The minimum penalty will be a grade of zero. The exam is meant to test your understanding. Read the questions/problems carefully before you answer. Good luck!

FULL NAME: ______________________________________ SECTION (CIRCLE ONE):

ABC Tues 11:30am ABI Wed 3:00pm ABE Tues 3:00pm ABM Thurs 11:30am ABG Wed 12:00pm ABO Thurs 3:00pm

TA NAME (CIRCLE ONE):

Patrick Goh Chong Li Joe Meng Robert Rucker Glenn Ko Wee Hong Yeo Ying-Yu Chen Young Mo Kang Jane Tu

Question 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 TOTAL

Score /2 /2 /3 /2 /2 /2 /3 /2 /3 /2 /3 /2 /2 /3 /2 /35

ECE 385 Quiz

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1. (2 points) Explain why a debouncer circuitry is necessary for a mechanical switch. Without a debouncer circuitry, a single click may be registered as multiple counts due to mechanical vibrations. Read the section on contact bounce on GG. 30 of the lab manual for more details.

2. (2 points) Explain the role of a resistor that is attached to an LED in a simple LED output indicator circuitry. The resistor is to limit the current drawn to the LED, preventing it from overheating and burning. Read the section on LED on GG. 28 of the manual for more details.

3. (3 points) Draw a logic diagram of a simple SR latch using two NAND gates. Clearly label S, R, Q, and Q signal nodes. Why is the input SR = 00 restricted? (Hint: take a look at the values of Q and Q when SR = 00.)

When S'R' = 00, the outputs signals Q and Q' both become 1, so it is conveniently restricted to prevent the undesired outputs (Note that Q' should be an inverted signal of Q for proper operation). Review ECE 290 materials if necessary. 4. (2 points) Explain the difference between a latch and a flip-flop. Latch is a clock or enable level sensitive device while flip-flop is a clock edge sensitive device. The latch captures the input when the clock signal is high, so as long as the clock is logic 1, the output can change if the input also changes. Flip-flop will store the input only when there is a rising or falling edge of the clock.

5. (2 points) Is the ripple counter in Experiment #3 a synchronous or asynchronous counter? A ripple counter is an asynchronous counter. The output bit of previous stage is used to clock the next stage (no common clock signal.)

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6. (2 points) Why do you think shift register memory is cheaper to implement than parallel-load RAM? In a shift register memory, only the input to the leftmost bit and the output from the rightmost bit needs to be connected to the package. This saves space and resources.

7. (3 points) Give an example of race during the transition of states, represented with 2 bits. Explain why we want to avoid them. State transition from "00" to "11". The transition will temporarily go through state "01" or "10", resulting in unwanted behaviors.

8. (2 points) What kind of variable(s) does the output of a Mealy machine depend upon? Current state + input.

9. (3 points) For Experiment #6, Xavier proposed that instead of continuously shifting the registers, it will be easier if we implement a clock logic to shift the registers when needed and stop it when it is not needed. Comment on the viability of his proposal. Gated clock logic may result in clock skew that will result is timing issues. However if the timing issues are addressed, the proposal may be viable. Still it is discouraged as timing issues are not easily addressed.

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10. (2 points) Give an advantage of using a modular design. Modular design allows easier debugging as debugging a smaller, simpler piece of code is much more easier than debugging a huge chunk of complicated logic.

11. (3 points) Explain how the simulator can be used to debug Experiment #7, if it is suspected that the computational unit is not working correctly. Be specific. We can connect pins to the inputs (A_In, B_In, F) and outputs (A_Out, B_Out, F_A_B) of the computational unit. Then try different combinations of inputs and see which produces the wrong outputs.

12. (2 points) Tom implements the 8-bit multiplier given in Experiment #8 by skipping the ADD states when the least significant bit of register B (i.e. M) is zero. Which of the following types of shifts must be used in order for Toms multiplier to function properly? Circle the correct answer. a. Logical shift X-A-B with a zero. b. Logical shift X-A-B with a one. c. Arithmetic shift X-A-B. d. Circular shift X-A-B.

13. (2 points) Given that signal B is of type std_logic_vector (7 downto 0) and signal BB is of type std_logic_vector (8 downto 0). Write a short VHDL code that will perform sign extension on signal B and assign it to signal BB. BB <= B(7) & B(7 downto 0);

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14. (3 points) On many keyboards, if a key is held down for a certain length of time, the keyboard will begin to transmit the keycode for that key repeatedly. For some applications, it is desirable to ignore this auto-repetition. What bug will you have if you use this algorithm (given in pseudocode)?
if ( secondNewestCode /= F0 AND newestCode /= secondNewestCode ) then transmit newestCode

If you press a key, release it, then press the same key again, this code will ignore the second key press. The sequence will be: ... CODE CODE CODE F0 CODE CODE CODE CODE ... The first condition will cause "F0 CODE" to be ignored. The second condition will cause the next CODE to also be ignored, even though it is the first transmission for that key press.

15. (2 points) What is the order of access to PC, IR, MAR, MDR for a load (LDR) instruction on the SLC-3. Try figuring this one on your own. It should not be too hard. Good luck on the quiz!

ECE 385 Quiz

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