VLSI DESIGN AND ANALYSIS

DEPT. OF ELECTRONICS

MODULE II BASIC ELECTRICAL PROPERTIES OF MOS AND CMOS CIRCUITS

A MOS transistor is a majority-carrier device, in which the current in a conducting channel between the source and the drain is modulated by a voltage applied to the gate.

Symbols

Figure 1 : symbols of various types of transistors.

An MOS transistor is termed as a majority-carrier device, in which the current conduction in a conducting channel between the source and drain is modulated by a voltage applied at the gate. In nMOS the majority carrier are electrons. A positive voltage applied on the gate with respect to the substrate enhances the number of electrons in the channel and hence increases the conductivity of the channel. If gate voltage is less than a threshold voltage Vt , the channel is cutoff (very low current between source & drain). In PMOS (p-type MOS transistor) majority carriers are holes. Applied voltage is negative with respect to substrate. Symbol Definitions Vt: the threshold voltage of an nMOS or a pMOS transistor. Vtn: the threshold voltage of an nMOS transistor. Vtp: the threshold voltage of a pMOS transistor. Vds: the voltage difference between the drain and the source for an nMOS or a pMOS transistor. Vdsn: the voltage difference between the drain and the source for an nMOS transistor. Vdsp: the voltage difference between the drain and the source for a pMOS transistor.
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Vgs: the voltage difference between the gate and the source for an nMOS or a pMOS transistor. Vgsn: the voltage difference between the gate and the source for an nMOS transistor. Vgsp: the voltage difference between the gate and the source for a pMOS transistor. Ids: the current between the drain and the source for an nMOS or a pMOS transistor. Idsn: the current between the drain and the source for an nMOS transistor. Idsp: the current between the drain and the source for a pMOS transistor. Vin: the input voltage. Vinp: the input voltage for a pMOS transistor. Vinn: the input voltage for an nMOS transistor. Vout: the output voltage. Vdd: power supply. Vss: ground. Four modes of transistors Enhancement mode nMOS transistor: Vtn > 0 If Vgs > Vtn, the transistor starts to conduct. The number of electrons in the channel increases so that Idsn increases accordingly. If Vgs < Vtn, the transistor is cut off and Ids is almost zero. Depletion mode nMOS transistor: Vtn < 0 (in the textbook it is referred as -Vtn and Vtn > 0) Even if Vgs = 0 > Vtn, the transistor is on. If Vgs < Vtn < 0, the transistor is cut off. Enhancement mode pMOS transistor: Vtp < 0 (in the textbook it is referred as -Vtp and Vtp > 0) If Vgs < Vtp < 0, the transistor starts to conduct. The number of holes in the channel increases so that Idsp increases accordingly. If Vgs > Vtp, the transistor is cut off.
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Depletion mode pMOS transistor: Vtp > 0 Even if Vgs = 0 < Vtp, the transistor is on. If Vgs > Vtp > 0, the transistor is cut off. Conduction characteristics of MOS transistors

Devices that are normally cut-off with zero gate bias are classified as "enhancement- mode "devices. Devices that conduct with zero gate bias are called "depletion-mode"devices. Enhancement-mode devices are more popular in practical use. The n-channel transistors and pchannel transistors are the duals of each other; that is , the voltage polarities required for correct operation are the opposite. Most CMOS integrated circuits at present use enhancement mode transistors. nMOS ENHANCEMENT TRANSISTOR Structure of an n-channel enhancement-type transistor is shown in figure. which is formed on a p-type substrate of moderate doping level. As shown in the figure, the source and the drain regions made of two isolated islands of n+-type diffusion. These two diffusion regions are connected via metal to the external conductors.

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The depletion regions are mainly formed in the more lightly doped p-region. Thus, the source and the drain are separated from each other by two diodes.

OPERATION OF nMOS TRANSISTOR With zero gate bias, i.e. Vgs = 0, Ids = 0 because the source and the drain are effectively insulated from each other by the two reversed-bias pn junctions (indicated as the diode symbol in Figure 3). Accumulation mode: With positive gate bias with respect to the source and substrate (generally denoted by Vgs > 0), an electric field E across the substrate is established such that electrons are attracted to the gate and holes are repelled from the gate.(See Figure 4 (a)) Depletion mode: If Vg Vtn, a depletion channel under the gate free of charges is established.(See Figure 4 (b)) Inversion mode: If Vgs > Vtn, an inversion channel (region) consisting of electrons is established just under the gate oxide and a depletion channel (region) is also established just under the inversion region.(See Figure 4 (c)) Hence the term n-channel is applied to the nMOS structure.

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Electrically, a MOS device acts as a voltage-controlled switch. It conducts initially when Vgs = Vt. Vgs establishes a conducting channel, while Vds is responsible for sweeping the electrons from the source to the drain. Thus, establish a current flow between the drain and the source. The electric field established by Vgs is orthogonal to the electric field established by Vds. When Vgs Vt and Vds = 0, the width of the n-type channel at the source end is equal to that at the drain end. This is due to Vgs = Vgd (See Figure 5 (a)). Nonsaturated (resistive or linear) mode: when Vgs - Vt > Vds > 0, the width of the n-type channel at the source end is larger than that at the drain end. This is due to Vgs Vgd > Vt. (See Figure 5 (b)) Saturated mode: When Vds > Vgs - Vt > 0, the n-type channel no longer reaches the drain. That is, the channel is pinched off. This is due to Vgs > Vt and Vgd < Vt. (See Figure 5 (c)) In nonsaturated mode, Ids is a function of gate and drain voltage, while in saturated mode, Ids is a function of gate voltage. In saturated mode, the movement of electrons in the channel is brought about under the influence of positive drain voltage. After the electrons leave the channel and inject into the drain depletion region, they are accelerated toward the drain. Because the voltage across the pinched-off channel tends to remain fixed at Vgs - Vt, the drifting speed of electrons in the channel is controlled by Vgs - Vt, but almost independent of Vds. This is what saturation means.

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For a fixed Vds and Vgs, the factors that influence Ids are: The distance between source and drain. The channel width Vt The thickness of gate oxide. The dielectric constant of the gate oxide. The carrier mobility. Normal conduction characteristics of a MOS transistor are: Cut-off region: Ids 0 Non-saturated region: The channel is weakly inverted. Ids is dependent on the gate and drain voltage with respect to the substrate. Saturated region: The channel is strongly inverted. Ids is ideally independent of Vds.
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pMOS ENHANCEMENT TRANSISTOR A reversal of n-type and p-type regions yields a p-channel channel transistor. (See Figure 6)

For a pMOS enhancement transistor; (1) Vg < 0 (2) Holes are major carrier (3) Vd < 0 , which sweeps holes from the source through the channel to the drain .

MOS EQUATIONS BASIC DC EQUATIONS Three MOS operating regions are: 1. Cutoff or subthreshold region 2. Linear region 3. Saturation region. The following equation describes all these three regions

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Where is MOS transistor gain and it is given by =/tox(W/L) , again is the mobility of the charge carrier , is the permittivity of the oxide layer. ,toxis the thickness of the oxide layer. ,W is the width of the transistor.( shown in diagram) L is the channel length of the transistor.(shown in diagram)

V-I CHARACTERISTICS OF MOS The graph of Id and Vds for a given Vgs is given below:

Figure : VI Characteristics of MOSFET

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THRESHOLD VOLTAGE (

The voltage at which an MOS device begins to conduct ("turn on"). The threshold voltage is a function of (1) Gate conductor material (2) Gate insulator material (3) Gate insulator thickness (4) Impurity at the silicon-insulator interface (5) Voltage between the source and the substrate Vsb (6) Temperature Threshold voltage equations:

Where,

And

Vt-mos is the ideal threshold voltage for an ideal MOS capacitor Vfb is the flat-band voltage k: Boltzmanns constant = 1.38 * 10-23 J/oK. q: electronic charge = 1.602 * 10-19 Coulomb. T: Temperature (oK). NA: the density of carriers in the doped substrate. Ni: the density of carriers in the undoped substrate.
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si: the permittivity of silicon = 1.06 * 10-12 (F/cm) Cox: the gate-oxide capacitance, which is inversely proportional to the gate oxide thickness (tox). Qfc: the fixed charge due to surface states that arise due to imperfections in the silicon-oxide interface and doping. ms: the work function difference between the gate material and the silicon substrate. Two common techniques for the adjustment of Vt are: Affecting Qfc by varying the doping concentration at the silicon-insulator interface through ion implantation. Affecting Cox by using different insulating material for the gate. A layer of silicon nitride (Si3N4) combined with a layer of silicon oxide can effectively increase the relative permittivity of gate insulator from 3.9 to 6. BODY EFFECT When connecting several devices in series as shown in Figure below, the source-tosubstrate of each individual devices may be different. For example, Vsb2 > Vsb1 = 0. As Vsb (Vsource - Vsubstrate) is increased, the density of the trapped carriers in the depletion layer also increases. The overall effect is an increase in the threshold voltage, Vt (Vt2 > Vt1).

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