RTD INTERFACE SIMULATION

USING IN-AMP
in
CIRCUIT MAKER 2000

Submitted by:
MUHAMMAD TALHA
SE # 014

Submitted to:
Noman Masud

Submission date:
8-AUG-2005

Due Date:
8-AUG-2005

Department of Electrical Engineering

Pakistan Institute of Engineering & Applied Sciences

Nilore, Islamabad, Pakistan

Table Of Contents
Table Of Contents................................................................................................................i
Table Of Figures.................................................................................................................ii
Table Of Tables..................................................................................................................ii
ABSTRACT......................................................................................................................iii
1 Introduction.......................................................................................................................1
2 Design Steps......................................................................................................................1
2.1 RTD Interface............................................................................................................1
2.2 IN-AMP Interface......................................................................................................3
3 Cascading All Stages........................................................................................................6
3.1 Simulation Results.....................................................................................................7

Table Of Figures

Figure 1 RTD-Buffer Interface............................................................................................2

Figure 2 The Out out of stage 1 when RTD=280 Ohm.......................................................2
Figure 3 Out put of Stage1 when RTD=60 Ohm.................................................................3
Figure 4 Output of Stage 2 when RTD= 280 Ohm.............................................................3
Figure 5 Output of Stage 2 when RTD=60 Ohm................................................................4
Figure 6 Schematic of In-Amp Configured for the gain of 10............................................4
Figure 7 Output of Linear Amplifier when RTD= 60 Ohm................................................5
Figure 8 Output of Linear Amplifier when RTD= 280 Ohm..............................................6
Figure 9 Schematic of RTD Interface for Data Acquisition System..................................7
Figure 10 Verification of results.........................................................................................7
Figure 11 Simulation result when RTD Resistance is 280 Ohm........................................8
Figure 12 Simulation result when RTD resistance is 60 Ohm.............................................8

Table Of Tables

Table 1 Temperature & Resistance Range........................................................................1

Table 2 Outputs of Stage 2 ( In-Amp).................................................................................4
Table 3 Desired Range of Linear Amplifier.......................................................................5
Table 4 Resistances for linear Amplifier.............................................................................5

ii

ABSTRACT
In practical scenarios control engineer may encounter with a situation where he have to
develop an interface circuit for the sensor. This sort of situation arose when a system
specification requirement changes from user point of view, and control engineer has to
alter the current system and develop a compatible interface circuit. In order to incorporate
these requirements control engineer must able to tackle the problem and he should know
about the difficulties and the limitations of such interface.
The purpose of this project is to teach us about the tools and techniques that are
used to develop the necessary interface for the new system from scratch or to modify the
existing interface circuit.

iii

1 Introduction
The purpose of the project is to simulate the temperature sensor interfacing circuit
employing the resistance temperature detector (RTD), we used the PT-100 sensor for this
simulation. Circuit maker 2000 is used as a tool for this purpose.
The basic principle of RTD is that as the temperature changes the resistance of the device
changes, usually RTDs are positive temperature co-efficient. The design procedure
consists of following essential steps

2 Design Steps
Design consists of the four major steps
RTD Buffer & Precision Power supply Interface
IN-Amp Interface
Linear Amplifier Interface

2.1 RTD Interface

The first step in the development of the project is to select the temperature range for the
application we are designing for, here we have selected the temperature -100 to 500
The corresponding resistance from the datasheet is given as:
Temperature
-100 oC.
500 oC.

Resistance
60.26 Ohm
280.98 Ohm

Table 1 Temperature & Resistance Range

In the next step we have to design a buffer amplifier in the shown configuration to
provide a necessary interface to the instrumentation amplifier, it should be noted that the
high precision voltage source should be used to make the circuit work effectively, the
output of this stage if fed to the IN-Amp stage, the configuration for the circuit is shown
in the schematic given below:

V1
5V
+V

V2
10V
+V
+

U2
AD820

A
R1
280k

To In-Amp

RG
5k

Figure 1 RTD-Buffer Interface

here we have employed the single supply rail-to-rail op-amp AD 820, V1 is the high
precision voltage source.
When the RTD value is maximum i.e. the 281-Ohm the voltage at the terminal A
is 5.2811 V.
When the RTD value is minimum i.e. the 60 Ohm the voltage at the terminal A is
5.0621 V.
the simulated output at are given as:
A: u1_3

5.500 V

5.400 V

5.300 V

5.200 V

5.100 V
0.000us

0.500us

1.000us

1.500us

2.000us

2.500us

3.000us

3.500us

4.000us

4.500us

5.000us

Figure 2 The Out out of stage 1 when RTD=280 Ohm

A: u1_3

5.300 V

5.200 V

5.100 V

5.000 V

4.900 V
0.000us

0.500us

1.000us

1.500us

2.000us

2.500us

3.000us

3.500us

4.000us

4.500us

5.000us

Figure 3 Out put of Stage1 when RTD=60 Ohm

2.2 IN-AMP Interface

In this stage we have to select the IN-Amp and the corresponding gain of the In-Amp. As
it is desired to have the CMRR of > 50 db, so we select the AD620 IN-Amp which is
capable of providing the CMRR of 100 db at the gain of 10, data sheet attached, so we go
for the gain of 10.
From the data sheet we have the relation:
RG= 49.4K/(G-1)
By setting the gain of 10, we find the resistance RG to be 5.5K Ohm. The IN Amp is used
in the configuration shown. When the input AD620 is cascaded with the previous circuit
we obtain the following outputs.
A: r7_1

2.8055 V

2.8005 V

2.7955 V

2.7905 V

2.7855 V
0.000ps

25.00ps

50.00ps

75.00ps

100.0ps

125.0ps

150.0ps

175.0ps

200.0ps

Measurement Cursors
1

r7_1

X: 0.0000

Y: 2.7955

Figure 4 Output of Stage 2 when RTD= 280 Ohm

A: r7_1

614.425mV

609.425mV

604.425mV

599.425mV

594.425mV

589.425mV

584.425mV
0.000ns

0.250ns

0.500ns

0.750ns

1.000ns

1.250ns

1.500ns

1.750ns

Measurement Cursors
1

r7_1

X: 0.0000

Y: 599.43m

Figure 5 Output of Stage 2 when RTD=60 Ohm

V3
15 V
+V

R3
5.5K

U1
AD620
RG
ININ+
V-

RG
V+
OUT
REF

V4
+V-15V

Figure 6 Schematic of In-Amp Configured for the gain of 10

The corresponding voltages of the AD620 are

Voltage at the Output of AD620
Resistance of RTD
0.6 Volts
60.26 Ohm
2.8 Volts
280.98 Ohm
Table 2 Outputs of Stage 2 ( In-Amp)

Since we are required to develop the data acquisition system so these voltages levels
should be calibrated to the compatible form we need to develop a linear amplifier for this
purpose. The linear amplifier configuration is given as
Input
0.6 V
2.8 V

Minimum
Maximum

Output
0V
10 V

Table 3 Desired Range of Linear Amplifier

By inserting the values in the following equation , and solving ,we obtain the value of M
and B
Output= M*Input + B
We found that
M= 4.545
B= -2.727
Since
M=(1+ R f /( R G+R 1|| R 2 ));
B=VR e f (R 2 ( R f /( R G+R 1|| R 2 ))/( R 1+ R 2)
By the above equations we found the following values of resistors
Obtained Value
11.99 K
1K
10 K
3.00412K

R1
R2
Rf
Rg

Selected Value
15 K
1K
10 K
2.98K

Table 4 Resistances for linear Amplifier

The results of the simulated circuit are given as:

A: u2_6

4.8783mV
4.8758mV
4.8733mV
4.8708mV
4.8683mV
0.000ns

0.250ns

0.500ns

0.750ns

1.000ns

1.250ns

1.500ns

1.750ns

Measurement Cursors
1 u2_6

X: 0.0000

Y: 4.8733m

Figure 7 Output of Linear Amplifier when RTD= 60 Ohm

A: u2_6

10.20 V
10.10 V
10.00 V
9.900 V
9.800 V
0.000ps

25.00ps

50.00ps

75.00ps

100.0ps

125.0ps

150.0ps

175.0ps

200.0ps

Measurement Cursors
1 u2_6

X: 0.0000

Y: 9.9599

Figure 8 Output of Linear Amplifier when RTD= 280 Ohm

3 Cascading All Stages

In the end all of the above steps are combined and the different parts are cascaded to
simulate the overall circuit. The resistances of linear amplifies are infractions, therefore
we take the standard resistances by omitting the fractional part.
The linear amplifier is coupled via 1K resistor.
In the final simulation we have simulated the circuit and viewing the output of all the
blocks on the single graph to understand what is going on in each block simultaneously.
The schematic of the system is shown along with the simulation graphs.

V2
5V
+V

V1
10V
+V

V3
15 V
+V
RG1
5.5K

U3
AD820
A

U1
AD620
RG
ININ+
V-

280
RTD

RG
V+
OUT
REF

B
R3
1k

R4
5k

V6
10V
+V

V4
+V-15V

+
VRef
10V
+V

U2
AD820

To ADC
Rg
2.98K

R1
12k

R2
1k

Rf
15k

Figure 9 Schematic of RTD Interface for Data Acquisition System

3.1 Simulation Results

The following results are verified from the following simulation curves
Resistance of RTD
O/p of Buffer (at O/p of IN-Amp (at O/p
of
Linear
probe A)
probe B)
Amplifier (at probe
C)
60 Ohm
5.06 V
0.6 V
0.004 V
280 Ohm
5.28 V
2.79 V
9.96 V
Figure 10 Verification of results

A: u1_3
B: u1_6
C: u2_6

10.00 V

9.000 V

8.000 V

7.000 V

6.000 V

5.000 V

4.000 V

3.000 V

2.000 V
0.000fs

25.00fs

50.00f s

75.00fs

100.0fs

125.0fs

150.0fs

175.0fs

200.0fs

Measurement Cursors
1

u2_6

X: 0.0000

Y: 9.9599

Figure 11 Simulation result when RTD Resistance is 280 Ohm

A: u1_3
B: u1_6
C: u2_6

6.000 V

5.000 V

4.000 V

3.000 V

2.000 V

1.000 V

0.000 V
0.000us

0.500us

1.000us

1.500us

2.000us

2.500us

3.000us

3.500us

4.000us

4.500us

5.000us

Measurement Cursors
1

u2_6

X: 0.0000

Y: 4.8733m

Figure 12 Simulation result when RTD resistance is 60 Ohm