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TV

SERVICE MANUAL DOCUMENTATION TECHNIQUE TECHNISCHE DOKUMENTATION DOCUMENTAZIONE TECNICA DOCUMENTACION TECNICA

LCD03B 27& 30

WARNING : ATTENTION : ACHTUNG : ATTENZIONE : IMPORTANTE :

Before servicing this chassis please read the safety recommendations. Avant toute intervention sur ce chssis, lire les recommandations de scurit. Vor jedem Eingriff auf diesem Chassis, die Sicherheitsvorschriften lesen. Prima di intervenire sullo chassis, leggere le norme di sicurezza. Antes de cualquier intervencin, leer las recomendaciones de seguridad.

Code : 35792740 - 0504 / 6M -LCD03B 27 & 30 Print.


No copying, translation, modification on other use authorized. All rights reserved worldwide. Tous droits de reproduction, de traduction, d'adaptation et d'excution rservs pour tous les pays. Smtliche Urheberrechte an diesen Texten und Zeichnungen stehen uns zu. Nachdrucke, Vervielfltigungen - auch auszugsweise - nur mit unserer vorherigen Zustimmung zulssig. Alle Rechte vorbehalten. I diritti di riproduzione, di traduzione, e esecuzione sono riservati per tutti i paesi. Derechos de reproduccion, de traduccion, de adaptacion y de ejecucion reservados para todos los paises.

Do not disconnect modules when they are energized! Repairs on power supply section are to be carried out only with isolating transformer. Ne pas retirer les modules lorsqu' ils sont sous tension. N'effectuer les travaux de maintenance sur la partie relie au secteur (Switch Mode) qu'au travers d'un transformateur d'isolement. Module nicht bei eingeschaltetem Gert entfernen! Servicearbeiten am Netzteil nur unter Verwendung eines Regeltrenntrafos durchfhren. Non scollegare le piastre quando sono alimentate! Per le riparazioni sulla sezione alimentatore, utilizzare un trasformatore isolatore. No desconectar los mdulos cuando estn activados. Las reparaciones en la seccin de alimentacin de energa deben ser ejecutadas solamente con un transformador de separacin.

Indicates critical safety components, and identical components should be used for replacement. Only then can the operational safety be garanteed. Le remplacement des lments de scurit (reprs avec le symbole ) par des composants non homologus selon la Norme CEI 65 entraine la non-conformit de l'appareil. Dans ce cas, la responsabilit du fabricant n'est plus engage. Wenn Sicherheitsteile (mit dem Symbol Haftung des Herstellers. gekennzeichnet) nicht durch Original - Ersatzteile ersetzt werden, erlischt die

La sostituzione dei componenti di sicurezza (evidenziati con il segno ) con componenti non omologati secondo la norma CEI 65 comporta la non conformit dell'apparecchio. In tal caso "esclusa la responsabilit " del costruttore. La sustitucin de elementos de seguridad (marcados con el simbolo ) por componentes no homologados segun la norma CEI 65, provoca la no conformidad del aparato. En ese caso, el fabricante cesa de ser responsable.

MEASUREMENT CONDITIONS - CONDITIONS DE MESURES - MESSBEDINGUNGEN CONDIZIONI DI MISURA - CONDICIONES DE MEDIDAS


RECEIVER : On UHF,input level : 1 mV, bar test pattern : - PAL, I standard, 100% white. Via the scart socket, input level : 1 Vpp, bar test pattern : Colour, contrast and brightness at mid-position, sound at minimum. Programme selected : PR 01. DC voltages measured between the point and earth using a digital voltmeter. RICEVITORE : In UHF, livello d'entrata 1 mV, monoscopio barre : - PAL, norma G. bianco 100%. Via SCART, livello d'entrata 1 Vpp, monoscopio barre : Colore, Contrasto, Luminosit media, Suono minimo. Programma selezionato PR 01. Tensioni continue rilevate rispetto alla massa con un voltmetro digitale. RECEPTEUR : En UHF, niveau d'entre 1 mV mire de barres - SECAM, Norm L, Blanc 100%. Par la prise Pritlvision, niveau d'entre 1 Vcc, mire de barres . Couleur, contraste, lumire mi-course, son minimum. Programme affect PR 01. Tensions continues releves par rapport la masse avec un voltmtre numrique. EMPFNGER : Bei UHF Eingangspegel 1 mV, Farbbalken : - PAL, Norm G, Weiss 100%. ber die Scartbuchse : Eingangspegel 1 Vss, Farbbalken : Farbe, Kontrast, Helligkeit in der Mitte des Bereichs, Ton auf Minimum. Zugeordnetes Programm PR 01. Gleichspannungen mit einem digitalen Voltmeter zur Masse gemessen.

RECEPTOR : En UHF, nivel de entrada 1 mV, mira de barras : - PAL, norma G, blanco 100%. Por la toma Peritelevision, nivel de entrada 1 Vpp mira de barra. Color, Contraste, luz a mitad de carrera, Sonido minimo. Programa afectado PR 01. Tensiones continuas marcadas en relacion a la masa con un voltimetro digital.

21 20 19 18 17 16 15 14 13 11 10 9 8 7 6 5 3 2 1 4 12

ENGLISH

FRANAIS
AUDIO "D" AUDIO "D" AUDIO "G" AUDIO "BLEU" AUDIO "G" MONO "BLEU" COMMUT. LENTE "VERT" AV LINK "VERT"

DEUTSCH
AUDIO "R" AUDIO "R" AUDIO "L" AUDIO "BLAU" AUDIO "L" MONO "BLAU" AV UMSCHALTUNG "GRN" AV LINK "GRN"

ITALIANO
AUDIO "D" AUDIO "D" AUDIO "S" AUDIO "BLU" AUDIO "S" MONO BLU "COMMUTAZIONE LENTA" "VERDE" AV LINK "VERDE"

ESPAOL
AUDIO "D" AUDIO "D" AUDIO "I" AUDIO "AZUL" AUDIO "I" MONO AZUL "CONMUTACION LENTA" "VERDE" AV LINK "VERDE"

NOTE :

MAIN ... etc. identifies each

pcb module. NOTE :


MAIN ... etc. repres des

platines constituant l'appareil.


HINWEIS :
MAIN ... usw. Kennzeichnung

der Platinen, aus denen das Gert zusammengesetzt ist.


NOTA :
MAIN ... ecc. sigla delle

piastre dell' apparecchio.


NOTA :
MAIN ... etc. marcas de las

placas que constituyen el aparato.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

AUDIO "R" AUDIO "R" AUDIO "L" AUDIO "BLUE" AUDIO "L" MONO "BLUE" SLOW SWITCH "GREEN" AV LINK "GREEN"

NC
"RED" "ROUGE" "ROT" "ROSSO" "ROJA"

NC
"RED" FAST SWITCH VIDEO FAST SWITCH VIDEO VIDEO OR "SYNC" PLUG SCREEN BOX "ROUGE" COMMUT. RAPIDE VIDEO COMMUT. RAPIDE VIDEO VIDEO SYNCHRO BLINDAGE PRISE "ROT" AUSTASTUNG VIDEO AUSTASTUNG VIDEO VIDEO ODER SYNCHRO ABSCHIRMUNG DES STECKERS "ROSSO" "COMMUTAZIONE RAPIDA" VIDEO "COMMUTAZIONE RAPIDA" VIDEO VIDEO O SINCRO INVOLUCRO METALLICO DELLA PRESA "ROJA" "CONMUTACION RAPIDA" VIDEO "CONMUTACION RAPIDA" VIDEO VIDEO O SINCRO BLINDAJE DEL ENCHUFE

: INPUT - ENTRE - EINGANG - ENTRATA - ENTRADA

: OUTPUT - SORTIE - AUSGANG - USCITA - SALIDA

: EARTH - MASSE - MASSE - MASSA - MASA

INFORMATION - INFORMATIONS - INFORMATIONEN INFORMAZIONE - INFORMACIONES

EN

Chassis group table 1 - The electronic chassis configuration (modules) and schematic diagram page numbers. 2 - The chassis configuration.

FR

Le tableau ci-dessous regroupe : 1 - Lenvironnement lectronique de chaque chassis (modules) et le numro de page o il est dcrit. 2 - La dsignation des chassis

DE

Die nachstehendeTabelle umfat: 1 - Die elektronischen Baugruppen (Module) der Chassis varianten und die Seiten auf der sie beschrieben werden 2 - Die Chassisbezeichnung

IT

La tabella qui di seguito contiene: 1 - lambiente elettronico di ogni telaio (moduli) e il numero di pagina nella quale descritto. 2 - La descrizione dei telai

ES

El cuadro siguiente agrupa: 1 - El entorno electrnico de cada chasis (mdulos) y el nmero de pgina donde est descrito. 2 - La designacin de los chasis

Chassis LCD03B
Reference Information Block Diagram 4 5 Service Mode 6to11 6to11 FCB 12to14 12to14 KDB Inverter Power Supply 15to20 15to20 DC/DC -Audio Board 21to22 21to22 Earphone Board 23to44 23to44 45to58 45to58 Main Video

27LCDB03B/BK 30LCDB03B/BK

3 3

LCD03B
First issue 05 / 04 3

BLOCK DIAGRAM - SCHEMA SYNOPTIQUE - BLOCKSCHALTBILD - SCHEMA A BLOCCHI - ESQUEMA DE BLOQUES


(27)

27LCDB03B BOARD DIAGRAM


10 pin

Inverter

16 pin X2

16 pin X2

2 pin

10 pin

IR Board
12 pin

PFC/DC+DC/Audio Board LCD Panel


30 pin 6 pin 16 pin

2 pin

Keypad Board
5 pin

AC Inlet

12 pin Keypad/IR Interface UART Fan Control

5 pin

J5 30 pin
LVDS THC63LVDM83A Scaller PW166B DVI Receiver HDCP Sil169 DVI-I YPb Pr

6 pin Audio Processor MSP3412G Flash AT49BV8192A

16 pin

Main Board
AFE AD9883 DDC Analog Mux. BA7657F

Tuner

Tuner Module
14 pin

3 pin

3 pin

J13 J8

80 pin golden finger

PhoneJack Audio Input 80 pin Teltext Chipset SAA5264 14 pin De-Interface Chipset PW1230

Video Mux. CXA7002R Fan Fan SCART 2 Output Power SCART 1

Video Decoder VPC3230D

Connector Board

Y Cb Cr

Component L/R Audio input

S-Video Composite Video L/R Audio Input Subwoofer L/R Audio Output Output

LCD03B First issue 04 / 04

BLOCK DIAGRAM - SCHEMA SYNOPTIQUE - BLOCKSCHALTBILD - SCHEMA A BLOCCHI - ESQUEMA DE BLOQUES


(30)

30LCDB03B Board Diagram


Fan

10 pin

10 pin

Inverter
12 pin 12 pin

PFC/DC+DC Board
AC Inlet

LCD Panel
30 pin 16 pin 5 pin

3 pin Fan Control

3 pin Flash AT49BV8192A Scaller PW166B

J5 30 pin
LVDS THC63LVDM83A AFE AD9883 Analog Mux. BA7657F DVI -I DVI Audio 12 pin YPb Pr P h oneJack A u d io Input

16 pin

5 pin

4 pin

Audio Board
6 pin 6 pin

Main Board
Keypad/IR Interface 5 pin UART 12 pin DDC

DVI Receiver HDCP Sil169

J13

80 pin golden finger 14 pin

5 pin

Keypad Board
10 pin

IR Board
10 pin

J8
De- Interface Chipset PW1230

80 pin Video Decoder VPC3230D SVideo

Video Mux. CXA7002R

Tuner Module
Tuner

Audio Processor MSP3412G Teltext SDA555XFL

14 pin

Connector Board
L/R Audio Input Composite Video

20 Pin

Scart Board
Scart 2

Y Cb Cr

Component L/R / Audio input

Scart 1

LCD03B First issue 04 / 04

SERVICE MODE - MODE SERVICE - SERVICE-MODE - MODO SERVICIO


Overview
EN

Sound Picture Preferences Installation


Figure Overview OSD

Service Mode Operation Manual


Model support: 15 20 and 20 bi-sonic Service Mode 1. Press the menu button, and then the screen display will appear Overview OSD, below as Figure Overview OSD. Then press the info button and 1, 0and 3 buttons step by step to enter Service Mode. And Figure Service mode will appear on the screen display.

FR
Mode Service 1.Presser la touche Menu lecran de selection ci-dessus apparait Prenez la touche Info, la touche 1 puis les touches 0 et 3 pour acceder au Mode Service

IT

Manuale Procedura Service Mode


Modelli: 15 20 e 20 bi-colonna Service Mode 1. Premere il tasto menu per far visualizzare il menu Sommario, vedi pagina OSD. Poi premere sequenzialmente i tasti info , 1, 0 e 3 per entrare in Service mode. Il menu di Service mode verr visualizzata sullo schermo. Per cambiare pagina premere il tasto Menu. Menu Sommario

DE

ES

Anleitung Service Mode


Fr Modelle: 15, 20 und 20 bi-sonic Service Mode 1. Drcken sie die MENU Taste. Es erscheint das bersicht Men (siehe Abbildung 1). Drcken sie dann nacheinander die Tasten INFO, 1, 0, und 3. Die erste Seite des Service-Modes wird angezeigt (siehe Abbildung 2).

Manual de operacin del Modo Servicio


Para modelos de : 15, 20 y 20 bi-columna Modo Servicio 1. Pulsar la tecla men, en la pantalla se mostrar el men OVERVIEW (NDICE), como se muestra en la figura MENU OVERVIEW (NDICE). A continuacin, pulsar las teclas info, 1, 0 y 3 una tras otra para entrar en Modo Servicio y se mostrar la primera pgina del Modo Servicio en la pantalla.

NAVIGATION INSIDE THE SERVICE MODE - DEPLACEMENT DANS LE MODE SERVICE SUCHE IN SERVICE MODE - OPZIONI NEL SERVICE MODE - BUSQUEDA EN MODO SERVICIO
REMOTE CONTROL - TELECOMMANDE - FERNBEDIENUNG TELECOMANDO - MANDO A DISTANCIA
Changing page - Changement de page Seitenwechsel - Cambiare Pagina - Cambio de pgina

- Press "Menu" button - Appuyer sur la touche "Menu" - Taste "Menu" - Premere " Menu" - Pulse "Menu" Choosing a setting from the menu / setting e value Choix d'un rglage dans un menu / Rglage d'une valeur Wahl einer einstellung in einem men / Einstellung eines wertes Scegliere una Regolazione dal Menu / Selezione di un valore Eleccion de un Ajuste en un menu / Ajuste de un valor

Color temp Red Drive Green Drive Blue Drive Red Offset Green Offset Blue Offset Reset To Default Calibration... Auto Turn on

P-W -

P-N

P-C

V-N

V-C

Color temp Red Drive Green Drive Blue Drive Red Offset Green Offset Blue Offset Reset To Default Calibration... Auto Turn on

P-W -

P-N

P-C

V-N

V-C

+ - 123 + - 123 + - 123 + - 123 + - 123 + - 123 190247 Eu 20L0BI Ver 09171I

+ - 123 + - 123 + - 123 + - 123 + - 123 + - 123 190247 Eu 20L0BI Ver 09171I

Tuner 1D on off

Tuner 1D on off

Naviagation up - Change value - Rglage de la valeur - Wert nden - Cambiare valore - Cambiar valor

Naviagation down

> <

VALUE VALUE

LCD03B
10 First issue 04 / 04

Color temp Red Drive Green Drive Blue Drive Red Offset Green Offset Blue Offset Reset To Default Calibration... Auto Turn on

P-W -

P-N

P-C

V-N

V-C

+ - 123 + - 123 + - 123 + - 123 + - 123 + - 123 190247 Eu 20L0BI Ver 09171I

Tuner 1D on off

Page1 on service mode

EN
1. Color Temp: P-N means Normal on YpbPr, V-N means Normal on Video mode. Each item decide different gamma curve. 2. Red drive, Green drive and blue drive means gamma RGB gain. Control by scaler 3. Red offset, Green offset and blue offset means gamma RGB offset. Control by scaler 4. Reset To Default: press OK will load all default value on User OSD 5. Calibration: press this botton guide to calibrate A/D converter white and black level on PC input. Also guide to calibrate A/D converter PbPr offset on YpbPr input 6. Auto Turn On: toggle on/off control auto turn on . this function for factory burn-in sets . Only active on selection PC input then main power off. 7. Green lable: Tuner s/w version, time while compiling s/w, model name, main s/w version.

IT
1. Color Temp: P-N significa Normale in funzione YPbPr, V-N significa Normale in funzione Video. Ogni selezione determina una differente curva di risposta. 2. Red Drive, Green Drive e Blue Drive significa guadagno gamma RGB. Controllato da una scala. 3. Red Offset, Green Offset e Blue Offset significa Offset gamma RGB. Controllato da una scala. 4. Reset To Default: premendo OK verranno caricati tutti i valori di Default nel Menu Utente. 5. Calibration: premere questo tasto guida per calibrare il livello Bianco /Nero del convertitore A/D dellingresso PC. Calibra anche loffset del convertitore A/D PbPr dellingresso YpbPr. 6. Auto Turn On: Commutatore controllo automatico On/Off. Funzione utile per le prove di bruciatura in fabbrica. Attivando On si attiva lo spegnimento automatico in base al segnale di ingresso PC. 7. Caselle in Verde: Versione Software Tuner, Data compilazione Software, Nome modello, Versione software Main.

FR
1. Color Temp: Temperature des couleurs. P-N correspond un reglage Normal /YpPr V-N correspond un reglage normal / mode vido chaque item permet de rgler la courbe de gamma. 2. Red drive, Green drive and blue drive: green drive et Bleu drive correspond aux reglages de gain du gamma RVB ( control par le scaler). 3. Red offset, green offset et blue offset: correspond aux rglage doffset du gamma RVB ( control par le scaler ). 4. Reset To Default: Appuyer sur OK. Charger les valeurs par defaut sur le menu OSD. 5. Calibration: Appuyer sur OK pour valider. Etalonne les niveaux blanc et noir du convertisseur A/D de l entre PC Etalonne egalement les offset Pb/Pr du convertisseur A/D sur l entre Ypb Pr 6. Auto Turn On: Option On/OFF valide le reglage usine, le dmarrage automatique. Seulement active sur lentre PC. 7. Green lable Indication dans les fentres vertes: Version software tuner, temps de compilation software , nom du modele, version, version du software principal.

ES
1. Color Temp: P-N significa Normal en modo YpbPr, V-N significa Normal en modo Video. Cada elemento tiene una curva de gamma distinta. 2. Red drive, Green drive y Blue drive ajustan la ganancia de la gamma RGB. 3. Red offset, Green offset y Blue offset ajustan el offset de la gamma RGB. 4. Reset To Default: Al pulsar OK se cargarn todos los valores por defecto del men de usuario 5. Calibration: Pulsando este botn ayuda a calibrar el convertidor A/D de nivel de blanco y negro para la entrada de PC. Tambin sirve para calibrar el offset del convertidor A/D PbPr en la entrada YpbPr 6. Auto Turn On: Selecciona el control del autoencendido. Slo activo en la seleccin de entrada de PC y desconexin de red. 7. Casillas en verde: versin de software del sintonizador, datos de compilacin del s/w, modelo, versin del s/w principal

DE
Seite 1 des Service-Modes 1. Color Temp: P-W steht fr Warm im YPbPr-Mode, P-N steht fr Neutral bei YPbPr-Mode, P-C steht fr Kalt im YPbPr,-Mode, V-W steht fr Warm im Video-Mode, V-N steht fr Neutral im Video-Mode, V-C steht fr Kalt im Video-Mode. Alle Modi haben unterschiedliche Gamma-Kennlinien. 2. Red Drive, Green Drive und Blue Drive: Einstellung der RGBVerstrkung 3. Red Offset, Green Offset und Blue Offset: Einstellung des RGBOffsets 4. Reset to Default: Durch Drcken der OK-Taste werden die Benutzerdaten gelscht und die Defaultwerte geladen. 5. Calibration: Kalibrieren der Schwarz- und Weipegel des ADWandlers des PC-Eingangs 6. Auto Turn On: Aktivierung des automatischen Einschalten des Gertes ber den PC-Eingang. (nur fr den Burn-In in der Farbrik vorgesehen). 7. Grn markierte Felder: Software-Version Tuner, Compiler-Daten, interne Modellbezeichnung, Version der Hauptsoftware.

LCD03B
First issue 04 / 04

OSD Position Factory Save... Auto Adjustment Video Int Gain Colour Tuner Set V-Level Tuner Get V-Level Set First INstallation Exit
Page2 on service mode

+ - 123 + - 123 -

NotEnabled...

Tuner Set Factory Programs

EN
8. OSD position: OSD position selection. 9. Factory Save: press OK save all parameters on service mode. 10. Auto Adjustment: auto adjustment new timing(position ,phaseetc). Only active on PC mode. 11. Video int Gain: this slider bar used to align brightness spec of Video mode. Larger value bring to brighter. Control by Video decoder VPC3230 12. Colour: adjust color saturation. Same funct ion on User OSD. Control by Video decoder VPC3230. 13. Tuner Set V-Level: not used 14. Tuner Get V-Level: not used. 15. Set First Installation: Enable means TV will pop-up installation OSD at next power-on. 16. Tuner Set Factory Programs: not used. 17. EXIT: exit service mode.

IT
8. OSD position: Selezione posizione OSD. 9. Factory Save: Premere OK per salvare tutti i parametri del service Mode. 10. Auto Adjustment: Auto regolazione nuove temporizzazioni ( posizione, fase ... etc). Attivo solo in funzione PC. 11. Video int Gain: Regola il livello di luminosit in funzione Video. Pi alto il valore pi limmagine luminosa. Controllo tramite il Decoder Video VPC3230. 12. Colour: Regola la saturazione del colore. Stessa funzione del Menu utente. Controllo tramite Video Decoder VPC3230. 13. Tuner Set V-Level: Non utilizzato. 14. Tuner Get V-level: Non utilizzato. 15. Set First Installation: Enable significa abilitazione, allaccensione, del menu di prima installazione. 16. Tuner Set factory Programs: Non utilizzato. 17. EXIT: Uscita dal Service Mode.

FR
8. OSD position: Selection de la position OSD. 9. Factory Save: pressez la touche OK pour sauvegarder tous les parametres du mode service 10.Auto Adjustment: Actif seulement en mode PC. Auto rglage des nouveaux parametres de temps ( Position, phase..). 11. Video int Gain: Rglage de la lumire en mode vido. Contrle par le dcodeur vido VPC 3230. La position leve du curseur augmente la lumire. 12. Colour: Rgle la saturation de la couleur. 13. Tuner Set V-Level:Pas utilis. 14. Tuner Get V-Level: Pas utilis. 15. Set First Installation: Signifie que la TV la prochaine mise sous tension affichera le menu d installation. 16. Tuner Set Factory Programs: Pas utilis. 17. EXIT: Sortie du mode Service.

ES
8. OSD position: Selecciona la posicin del OSD. 9. Factory Save: Al pulsar OK, se guardan todos los parmetros del modo servicio. 10. Auto Adjustment: Autoajuste de nuevo timing (posicin, faseetc). Slo activo en modo PC. 11. Video int Gain: Esta barra deslizante se utiliza para ajustar las especificaciones del brillo en el modo Video. Cuanto mayor sea el valor, ms brillante. Control por el descodificador de Video VPC3230 12. Colour: ajusta la saturacin del color. Es la misma funcin que el men de usuario. Control por el descodificador de Video VPC3230. 13. Tuner Set V-Level: no utilizado. 14. Tuner Get V-Level: no utilizado. 15. Set First Installation: Enable significa que la prxima vez que se conecte el TV aparecer el men de primera instalacin. 16. Tuner Set Factory Programs: no utilizado. 17. EXIT: Salida del Modo Servicio.

DE
Seite 2 des Service-Modes 8. OSD Position: Wahl der Men-Position auf dem Bildschirm 9. Factory Save: Drcken der OK-Taste speichert alle Einstellungen des Service-Modes ab. 10. Auto Adjustment: Automatischer Abgleich von Timing, Lage, Phase usw. im PC-Mode 11. Video Int Gain: Helligkeitsvoreinsteller fr den Video-Mode. Steuerung ber den Videodecoder VPC3230. 12. Colour: Einstellung der Farbsttigung; gleiche Funktion wie die Benutzersteuerung. Steuerung ber den Videodecoder VPC3230. 13. Tuner Set V-Level: nicht benutzt 14. Tuner Get V-Level: nicht benutzt 15. Set First Installation: Enable lsst beim nchsten Einschalten des Gertes nach einer Netztrennung das Installationsmen erscheinen. 16. Tuner Set Factory Programs: nicht benutzt. 17. Exit: Verlassen des Service-Modes.

LCD03B
First issue 04 / 04

Pw Gamma Scale Mode VPC AGC ON VPC AGC OFF

Automatic

HV Lock Sensitivity Color Delay Audio Gain Pb Offset Pr Offset - NotEnabled... -

+ - 123 + - 123 + - 123 + - 123 + - 123 -

Enter PW1230 Adjustment Page...


EN
Page3 on service mode

IT
18. PW Gamma: Selezione curva gamma. In Automatic viene selezionata automaticamente la curva gamma ideale, in base alla scelta utente Calda, Fredda o Neutra, nella funzione Tonalit . Si consiglia di non cambiare valore. 19. Scale Mode: Selezione Rapporto schermo. 20. VPC AGC ON: Attiva, nel Decoder Video, il Controllo automatico del Guadagno (Regolazione livello ingresso analogico). 21. VPC AGC OFF: Disabilita, nel Decoder Video, il Controllo Automatico del Guadagno. 22. HV Lock Sensitivity: Sensibilit Sync HV Tuner. Si consiglia di non cambiare valore. Livello soglia per saltare eventuali emittenti con segnale debole. 23. Color Delay: Regola il ritardo colore rispetto al segnale video. Utilizzato per la fabbrica. Si consiglia di non cambiare valore. 24. Audio Gain: Non utilizzato. 25. Pb offset: Regola loffset Pb sul segnale YpbPr in ingresso. 26. Pr offset: Regola loffset Pr sul segnale YpbPr in ingresso. Le regolazioni menzionate nei punti 25 e 26 possono essere eseguite automaticamente come indicato nella riga Calibration di pagina 1. 27. Enter PW Adjustment page: Controllo parametric Deinterlacer. Utilizzato in fabbrica. Si consiglia di non cambiare valore.

18. PW Gamma: gamma curve selection. Automatic means pick-up proper gamma curve automatically when user choose Normal, Warm and Cool. Value change is not recommended. 19. Scale Mode: screen ratio selection. 20. VPC AGC ON: turn on Video decoder Auto gain control (analog input level adjustment.). 21. VPC AGC OFF: turn off Video decoder Auto gain control. 22. HV Lock Sensitivity: Tuner HV sync sensitivity. Value change is not recommended. Fake programme be detected or Real programme be skipped. 23. Color Delay: Color timing delay which only impact on Video mode. For development only. Value change is not recommended 24. Audio gain: not used. 25. Pb offset: adjust Pb offset on YpbPr input. 26. Pr offset: adjust Pr offset on YpbPr input. These 2(25,26) Functions above could be automatically done by Calibration page1. 27. Enter PW1230 Adjustment page: Deinterlacer parameters control. For development only. Value change is not recommended.

FR
18. PW Gamma: Selection de la courbe de gamma Automatic correspont loptention de la courbe de gamma approprie quand lutilisateur choisit la position froide, neutre, chaude ou le rendu des couleurs est meilleur. il est deconseill de slectionner la position value Change. 19. Scale Mode: Selection format decran. 20. VPC AGC ON:Active le Vido dcodeur. Slectionnez Auto gain Control ( rglage du niveau dentre analogique ). 21. VPC AGC OFF:Dsactive le Vido dcodeur. Slectionnez Auto gain Control. 22. HV Lock Sensitivity: Sensibilit de la Synch. HV tuner. Il est imperatif de ne pas modifier sa valeur. Le tuner dtectera les mauvais progrmmes ou passera les programmes corrctes. 23. Color Delay: Rglage du dlai couleur en mode vido. Rglage usine, ne pas modifier. 24. Audio gain: Non utilis. 25. Pb offset: Rglage de loffset Pb sur l entre Ypb Pr. 26. Pr offset: Rglage de loffset Pr sur lente Ypb Pr. Ces 2 rglages ( 25, 26 ) sont automatiquement effectues par calibration de la page 1 du mode service. 27. Enter PW1230 Adjustment page: Ne pas modifier. Rglage usine Contrle les parametres Deinterlacer.

ES
18. PW Gamma: Seleccin de la curva de gamma. Automatic quiere decir que recuperar automticamente la curva ideal de gamma cuando el usuario seleccione Normal, Clido o Fro. No se recomienda cambiar este valor. 19. Scale Mode: selecciona la relacin de pantalla. 20. VPC AGC ON: activa el "control automtico de ganancia" del descodificador de video (ajuste del nivel de entrada analgica). 21. VPC AGC OFF: desactiva el "control automtico de ganancia" del descodificador de video. 22. HV Lock Sensitivity: Sensibilidad de los sincronismos HV del sintonizador para la bsqueda de emisoras. No se aconseja cambiar este valor. Los canales reales pueden ser ignorados o los falsos memorizados. 23. Color Delay: Retardo del color en modo Video. No se recomienda cambiar este valor 24. Audio gain: no utilizado. 25. Pb offset: ajuste del offset de Pb en la entrada YpbPr. 26. Pr offset: ajuste del offset de Pr en la entrada YpbPr. Estas 2 funciones anteriores (25,26) sern hechas automticamente en Calibration de la pgina 1. 27. Enter PW1230 Adjustment page: control de los parmetros de Deinterlacer. No se recomienda cambiar este valor. 36. V. Position: ajusta la posicin Vertical sobre la entrada PC.

DE
18. PW Gamma: Auswahl der Gamma-Kennlinie: Bei Einstellung Automatic wird automatisch die jeweilige Kennlinie gewhlt, wenn der Benutzer zwischen Warm, Neutral oder Kalt umschaltet. Eine nderung dieser Grundeinstellung ist nicht empfehlenswert. 19. Scale Mode: Wahl des Bildformates 20. VPC AGC ON: Aktiviert die automatische Verstrkungsregelung des Videodecoders (Anpassung der Pegel der Analogeingnge) 21. VPC AGC OFF: Deaktiviert die automatische Verstrkungsregelung des Videodecoders. 22. HV Lock Sensitivity: Empfindlichkeit des Synchrondetektors im Tuner. Eine nderung dieser Grundeinstellung ist nicht empfehlenswert, da sonst der Sendersuchlauf falsche Ergebnisse liefern knnte. 23. Color Delay: Einstellung Farbversatz. Eine nderung dieser Grundeinstellung ist nicht empfehlenswert. 24 Audio Gain: nicht benutzt 25. Pb Offset: Einstellung des Pb Offsets bei YPbPr. 26. Pr Offset: Einstellung des Pr Offsets bei YPbPr. Zu 26 und26: Der Abgleich dieser Funktionen kann automatisch mit der Funktion Calibration auf der Service-Mode Seite 1 durchgefhrt werden. 27. Enter PW1230 Adjustment Page: Abgleich der Parameter des Deinterlacers. Eine nderung dieser Grundeinstellungen ist nicht empfehlenswert.

LCDB03B
First issue 04 / 04

Video Format Scale Mode RGB Filter Video Filter Monitor Sync

NTSC-M

On

Off

Reset All Nvram Test Pattern H.position V.position


Page4 on service mode

- NotEnabled... -

+ - 123 + - 123 -

EN
28. Video Format: select Video standard. Force to Auto. 29. Default Language: set default language. Same function on User OSD. 30. RGB filter: sharpness filter of PC port of scaler. Impact on PC and YpbPr input 31. Video filter: sharpness filter of Video of scaler. Impact on TV Video and YcbCr. 32. Monitor Sync: force to On. So that Video format can auto detection. 33. Reset All Nvram: press OK will reset all parameters on service mode, including color temp settings, brightness setting.etc. 34. Test Pattern: display test-pattern which generate by scaler. Only active on PC source. 35. H.Position: adjust horizontal position while PC source in 36. V.Position: adjust Vertical position while PC source in

IT
28. Video Format: Seleziona lo standard Video. Forzato su Auto. 29. Default language: Seleziona la lingua. Stessa funzione del Menu Utente. 30. RGB Filter: Definizione filtro del demoltiplicatore (scaler) della porta PC. Influisce sugli ingressi PC e YpbPr. 31. Video Filter: Definizione filtro del demoltiplicatore del segnale Video. Influisce sui segnali TV Video e YcbCr. 32. Monitor Sync: Forzato su On. In questo modo pu essere rilevato automaticamente il Formato Video. 33. Reset All Nvram: Premendo OK verranno resettati tutti I parametri del Service Mode, inclusi regolazione Temp. Colore, Regolazione Luminosit, ... ecc.). 34. Test Pattern: Attivazione serie di segnali test. Attivo solo con ingresso PC. 35. H. Position: Regola la posizione Orizzontale in ingresso PC. 36. V. Position: Regola la posizione Verticale in ingresso PC.

FR
28. Video Format: selectionne le standard Vido. Forcer Auto. 29. Default Language: Selectionne la langue par dfaut. Mme fonction que le rglage utilisateur. 30. RGB filter: Filtre Contour RGB du Port PC. Agit sur les entres PC et Ypb Pr. 31. Video filter: filtre contour Vido. Agit sur les entres TV Vido et Ye bCr. 32. Monitor Sync: Forc ON Auto dtection du format Vido. 33. Reset All Nvram: Appui sur OK. Reset De tous les parametres du MODE SERVICE incluant la temprature de couleur, Contour... etc. 34. Test Pattern: Affichage de la mire interne. Actif seulement en mode PC 35. H.Position: Rglage Horizontal en mode PC. 36. V.Position: Rglage Vertical en mode PC.

ES
28. Video Format: selecciona el estndar de Video. Auto fuerza a modo automtico. 29. Default Language: selecciona el idioma por defecto. Hace la misma funcin que el men "Usuario". 30. RGB filter: filtro de nitidez. Vlido para las entradas de PC e YpbPr. 31. Video filter: filtro de nitidez. Vlido para las entradas de TV, Video e YcbCr. 32. Monitor Sync: forzado a On. El formato de video puede ser autodetectado. 33. Reset All Nvram: pulsando OK se borrarn todos los parmetros del Modo Servicio, incluyendo los ajustes de temperatura de color, ajustes de brillo y contraste....., etc. 34. Test Pattern: muestra unas cartas de ajuste generadas internamente. Activo solamente en modo PC. 35. H. Position: ajusta la posicin horizontal sobre la entrada PC. 36. V. Position: ajusta la posicin Vertical sobre la entrada PC.

DE
28. Video Format: Auswahl des Videostandards. Sollte auf Auto stehen. 29. Default Language: Auswahl der Mensprache; gleiche Funktion wie die Benutzersteuerung. 30. RGB Filter: Abgleich des Schrfefilters des Scalers fr PC-Mode und YPbPr. 31. Video Filter: Abgleich des Schrfefilters des Scalers fr den VideoMode. 32. Monitor Sync: Sollte immer auf On stehen damit das Videoformat automatisch erkannt wird. 33. Reset All Nvram: Drcken der OK-Taste setzt alle Parameter im Service-Mode ( auch Farbtemparatur, Helligkeit usw.) zurck. 34. Test Pattern: Zeigt ein vom Scaler erzeugtes Testmuster auf dem Bildschirm. Nur im PC-Mode. 35. H.Position: Horizontallage fr PC-Eingang. 36. V.Position: Vertikallage fr PC-Eingang.

LCD03B
First issue 04 / 04

Life Time Project Code Panel Resolution NvRam Ver. HXV Res / HFreq HXV Total Mode Num DCLK Factory Save...

00034:10 EU20L03B 800 X 600 OC / 14 649 X 548 864 X 625 55 41.0 M

00033:35

15,52

Tuner: 1D

Page5 on service mode

EN
37. Life Time: The left item means the time added by stand by + TV on The right item display the time of TV-on only. 38. Project Code: as title 39. Panel Resolution: as title 40. NvRam Ver. Display EEPROM data veriosn. 41. HXV Res / Hfreq: timing information. Resolution and H clock 42. HXV Total: timing information. 43. Mode Num: timing information. Sequence of Timing chart. 44. DCLK: timing information. Data clock These 4(41,42,43,and 44) items above are for development check only. 45. Factory save: save factory parameters. 46. Green label: display tuner s/w version.

IT
37. Life Time: Il contatore a sinistra indica il tempo totale di funzionamento in Stand By + apparecchio acceso. Il contatore a destra indica il tempo totale di funzionamento ad apparecchio acceso (ON). 38. Project code: Codice progetto. 39. Panel Resolution: Risoluzione pannello. 40. NvRam Ver: Versione EEPROM. 41. HXV res / Hfreq: Informazione timing. Risoluzione e Clock H. 42. HXV Total: Informazioni timing. 43. Mode Num: Informazioni Timing. Sequenza carta tempi. 44. DCLK: Informazioni Timing. Clock Data. I valori menzionati nei punti 41, 42 43 e 44 sono solo per la fabbrica 45. Factory save: Parametri memorizzati in fabbrica. 46. Casella verde: Versione software Tuner

FR
37. Life Time: -Indication de gauche: indique le temps fonctionnement total du TV: On+ Stand by. -Indication de droite: Indique le temps de fonctionnement du TV en On seulement. 38. Project Code: Info code. 39. Panel Resolution: Resolution du panneau dcran. 40. NvRam Ver. Version EEPROM. 41. HXV Res / Hfreq: Information de temps resolution et Horloge H. 42. HXV Total: Information de temps. 43. Mode Num: Information de temps 44. DCLK: Information de temps. Data clock. Ces 4 lignes dinformation sont utilises en dveloppement. 45. Factory save: Sauvegarde les paramtres usine. 46. Green label: Affiche la version de Software du tuner.

ES
37. Life Time: Los nmeros de la izquierda muestran la suma de las horas en stand-by + TV encendido. Los de la derecha indican slo las horas de TV encendido. 38. Project Code: informativo 39. Panel Resolution: informativo 40. NvRam Ver. Indica la versin de la EEPROM. 41. HXV Res / Hfreq: informacin de timing. Resolucin y frecuencia H. 42. HXV Total: informacin de timing. 43. Mode Num: informacin de timing. 44. DCLK: informacin de timing. Frecuencia del reloj. Estas 4 funciones anteriores (41,42,43,y 44) son informativas. Slo son para comprobacin. 45. Factory save: memoriza los valores de fbrica. 46. Casilla en verde: indica la versin de software del sintonizador.

DE
Seite 5 des Service-Modes 37. Life Time: Betriebsstundenzhler, links: Summe Standby-Zeit und TV-Ein, rechts: nur TV-Ein-Zeit. 38. Project Code: 39. Panel Resolution: Auflsung der LCD-Panels 40. NvRam Ver. : Version EEPROM-Daten 41. HXV Res / HFreq:Timing-Information (Auflsung und H-Clock) 42. HXV Total: Timing Information 43. Mode Num Timing Information 44. DCLK: Timing Information Data Clock 45. Factory Save: Daten des Service-Modes speichern. 46. Grn hinterlegtes Feld: Version Tuner-Software

LCD03B First issue 04 / 04

POWER SUPPLY INTERFACE - INTERFACE ALIMENTATION - NETZTEIL - ALIMENTAZIONE - INTERFAZ ALIMENTACIN


SCHEMATIC DIAGRAM - SCHEMA DE PRINCIPE - SCHALTBILD - SCHEMA - ESQUEMA

PFC BOARD

ACEMI Board

IC651

AC+ L6561

To DC-DC board Audio Power board Inverter board

NOTES: 1. Resistor values are in ohm, K = 1,000 ohm, M = 1,1000 000 ohm 2. All resistors are 0805, 5% exept where otherwise indicated 3. Represents PCB common ground

PFC Board 27" / 30"

EMI BOARD
AC+

AC+ PFC Board AC-

ACMainsvoltage 50HZ / 60HZ

CN6101
NOTES: 1. Resistor values are in ohm, K = 1,000 ohm, M = 1,1000 000 ohm 2. All resistors are SMD 0603 5% exept where otherwise indicated 3. All capacitors are SMD 0603 5% exept where otherwise indicated 4. Represents PCB common ground

MCD03B First issue 04 / 04

INVERTER SCHEMATIC DIAGRAM - SCHEMA DE LA PLATINE INVERSEUR - SCHALTBILD INVERTER - SCHEMA INVERTER - ESQUEMA DE INVERSOR
( INVERTER 27, 30 )

INVERTER POWER BOARD


T6301

V- INVERTER

To PFC Board AudioPower Board

U6301 UC3843A

CN701
12 U7301 TSM101A 11 10 9 8 7 6 5 4 3 2 U7302 PQ1CY10322
1 V0 2 FB 4

CN702
10 9 8 7 6 5 4 3 2 1

AudioPower Board

on/off gnd
5 3

NOTES: 1. All resistors are 1/8 watt, 5% exept where otherwise indicated 2. Represents PCB common ground

INVERTER POWER BOARD

LCD03B First issue 10 / 03

POWER SUPPLY INTERFACE - INTERFACE ALIMENTATION - NETZTEIL - ALIMENTAZIONE - INTERFAZ ALIMENTACIN


SCHEMATIC DIAGRAM - SCHEMA DE PRINCIPE - SCHALTBILD - SCHEMA - ESQUEMA

AUDIO POWER BOARD

To PFC Board

CN703=>J2 Audio board

CN704=>J12 Main board

To Inverter
AUDIO POWER BOARD

NOTES: 1. Resistor values are in ohm, K = 1,000 ohm, M = 1,1000 000 ohm 2. All resistors are SMD 0603 5% exept where otherwise indicated 3. All capacitors are SMD 0603 5% exept where otherwise indicated 4. Represents PCB common ground

MCD03B First issue 04 / 04

AUDIO CHANNEL SCHEMATIC DIAGRAM - SCHEMA DES CIRCUITS AUDIO - SCHALTBILD MEHRKANAL AUDIO - SCHEMA DEI CIRCUITI AUDIO - ESQUEMA DE LOS CIRCUITOS AUDIO
( AUDIO 27,30 )

AUDIO BOARD

J1=>J9 Main board

PWM-STAGE 1

U1 TDA7490L

CN705

G-2-5

PWM-STAGE 2

J2=>CN703 Audio power board

NOTES: 1. Resistor values are in ohm, K = 1,000 ohm, M = 1,1000 000 ohm 2. All resistors are SMD 0603 5% exept where otherwise indicated 3. All capacitors are SMD 0603 5% exept where otherwise indicated 4. Represents PCB common ground

AUDIO BOARD

LCD03B First issue 10 / 03

MAIN BOARD INTERFACE - INTERFACE MAIN BOARD - SCHALTBILD MAIN BOARD - SCHEMA DELLA MAIN BOARD INTERFAZ MAIN BOARD
( MAIN BOARD 1/11-27,30)

+5VS

2 2 2
DN1 DN2

DN3

3
BAV99

3
BAV99

3
BAV99

TP 13 6

3 16

DN8 BAV99

11
TP 2 GSDA TP 5 TP 9 TP 10 GSCL 15 D-Sub15

12 13 14

6 1 7 2 8 3 9 4 10 5

R1 G1 B1 TP 7

TP 1 TP 3 TP 6 R6 75 R7 75 R8 75

R1 47 R2 47 R4 47 C4 47P 50 V J C5 47P 50 V J C6 47P 50 V J

J1

RED_PR_IN GREEN_Y P_I N BLUE_PB _IN

J2

7 6 1 2 4 5 3

7 6 1 2 4 5 3

L1 TP 4 L2 TP 8

220 OHM R3 220 OHM R5 1K R9 10K R1 0 10K C7 C8 D1 1000 P J TZMC5V1 TZMC5V1 1K A UD_PC_ L AUD_PC _R

2 1 2

D2

TP 13 7

1000PJ

PC _5V

+5VS DN4

+5VS DN5 D26 27V D27 27V TZMC5V1 TZMC5V1

AUDIO PC INPUT

D3 TZMC5V1

D4 TZMC5V1

17

D5 TZMC5V1 BAV99 27" Only BAV99 30" Only

D6 TZMC5V1 D8

D7

R1 1 R1 2 +5VS

1K 1K R1 3 R1 4 +5VS D9 C1 0 0 .1U K 0 .1U K D1 0 1N4148 PC _5V 0.1U K 1N4148 47 47 0.1U K

RG B_VS RG B_HS

P3 P3

+5VS C9

U1
C1 2 C1 1

DN6

DN7

BAV99 BAV99 R1 5 4.7K GSCL GSDA R1 6 4.7K

U2
8 7 6 5 VCC WP SCL SDA A0 A1 A2 GND 1 2 3 4
C14 0.1UK

1 2 3 4 5 6 7 8

C1 3 0.1UK

C1+ V+ C1C2+ C2VT2OUT R2IN

VCC GND T1OUT R1IN R1OUT T1IN T2IN R2OUT

16 15 14 13 12 11 10 9

UART_R X UAR T_TX RX TX D

RX TX D

P7 P7 Optical Points

5 4 3 2
H9

9 8 7 6

SP232ECN

OP1 OP

OP2 OP

OP3 OP

OP4 OP

OP5 OP

OP6 OP

OP7 OP

OP8 OP

OP9 OP

OP10 OP

OP11 OP

OP12 OP

OP13 OP

OP14 OP

OP15 OP

OP16 OP

AT24C02A
S crew Holes

HO LE-V 8

MAIN BOARD 27" / 30"


1 1 1 1 1 1 1 5 4 3 2
H1 HO LE-V 8

9 8 7 6

5 4 3 2
H2

9 8 7 6

5 4 3 2
H3

9 8 7 6

5 4 3 2
H4

9 8 7 6

5 4 3 2
H5

9 8 7 6

5 4 3 2
H6

9 8 7 6

5 4 3 2
H7

9 8 7 6

5 4 3 2
H8

9 8 7 6

HO LE-V 8

HO LE-V 8

HO LE-V 8

HO LE-V 8

HO LE-V 8

HO LE-V 8

HO LE-V 8

LCD03B Firs issue 04 / 04

MAIN BOARD INTERFACE - INTERFACE MAIN BOARD - SCHALTBILD MAIN BOARD - SCHEMA DELLA MAIN BOARD INTERFAZ MAIN BOARD
( MAIN BOARD 2/11-27)

+5VS

+3 V_DD VI

(O PEN) R1 7 0 D1 6 BAV99 (O PEN) C1 5 22P J (O PEN) C1 6 (O PEN) 22P J

R1 8

10K

D1 1 BAV99 3

D1 2 BAV99 3

D1 3 BAV99 3

D1 4 BAV99 3

D1 5 BAV99 3

J3
1 1 1 1 1 1
TP138 D2 D1 D0 D2 + D1 + D0 + P3 P3 P2 P3 P3 +5VS D1 7 +5 V_ED ID P3 GF BK DV I_CK GP EN GVS GH SSO G

31

31

L3

30 OH M R2 1 R2 2 33 R2 3 R2 4 R2 5 0 0 0 0 RN 1 5 6 7 8 5 6 7 8 RN 2

(o pen) CN 1 22P 47

(O PEN) R1 9 0

R2 0

10K

(o pen) CN 2 22P GR E[ 0..7] P3 GR GR GR GR GR GR GR GR E7 E6 E5 E4 E3 E2 E1 E0

P2 IDCK P2

0.1U K

QO1 QO0 HSYNC VSYNC DE OGND ODCK OVCC CTL3 OCK_INV HS_DJTR GND VCC QE23 QE22 QE21 QE20 QE19 QE18 QE17 QE16 OVCC OGND QE15 QE14

1 9 17 2 10 18 3 11 19 4 12 20 5 13 21 6 14 22 7 15 23 8 16 24 C1 C3 C5 C5_ C2 C4 32

1 9 17 2 10 18 3 11 19 4 12 20 5 13 21 6 14 22 7 15 23 8 16 24 25 27 29 30 26 28

TP11 TP12 TP13 TP14 TP15 TP16

TP17 TP18 TP19 TP20 TP21

4 3 2 1 4 3 2 1
47 RN 3 5 6 7 8

1
D1 8 1N4148 HO T_ PLUG L4 42 OH M

C1 7 C1 8 C2 0 C1 9 22P J 22P J 22P J 22P J (O PEN) (O PEN) (O PEN) (O PEN)

(o pen) CN 3 22P GGE GGE GGE GGE 7 6 5 4

GG E[ 0..7]

P3

47

1
1N4148 C2 2

U3
50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26

4 3 2 1

ID CK +

1
+ C2 1 22 U 16V

(o pen) CN 4 22P GGE GGE GGE GGE 3 2 1 0

L32 220 OH M TP231

R2 6 A UD_DV I_L 1K R2 7 10K

ZD 1 TZ MC 5V1

+5VS

J4
2 2 2 2
TP233 3 D2 2 BAV99

ZD 2 TZ MC 5V1

R31 2210 018551 1K R3 3 10K AU D_ DV I_R ZD 3 TZ MC 5V1

R2 9

1.5K R3 0 1.5K

+3 V_D DVI

(o pen)

OGND QO23 OVCC AGND RX2+ RX2AVCC AGND AVCC RX1+ RX1AGND AVCC AGND RX0+ RX0AGND RXC+ RXCAVCC EXT_RES PVCC PGND RESERVED SCL

SII169
+3 V_D DVI D2 + D2 D1 + D1 D0 + D0 ID CK + IDCK -

76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100

DVI AUDIO input


+3 V_DD VI +5V _ED ID

1 1

C23

3300P K

ZD 4 TZ MC 5V1

R3 2 R3 4 +3V_ADVI +3V_PDVI

0 (O PEN) 10K +3 V_DD VI

R3 5 3.3K +5V _ED ID

D2 3

2
R3 7 10K +3 V_DD VI 1N4148

S II169_ RS TZ

P7

P2

R3 6 39 0

DV I_SCL_3V

DV I_SDA_3V R3 8 0 +3 V_DD VI (O PEN) (O PEN) 0

P2

R3 9 3.3K

Q1 BS N20

Q2 BS N20

U4
R4 0 2K R4 1 2K

8 7

VC C WP SC L SD A

A0 A1 A2 GN D

1 2 3 4

C2 4 0.1U K +3V_ADVI R4 2

DV I_SC L DV I_SDA_3V

6 5

DV I_SD A

Q3 BS N20

Q4 BSN20

AT24C02A

R4 3 0 (O PEN)

DV I_SCL_3V P2

MAIN BOARD
+3V_ADVI VCC +3 V_DD VI V33 L5 42 OH M C2 5 0.1U K C2 6 0.1U K C2 7 0.1U K C2 8 0.1U K C3 4 0.1U K U5

GN D

VIN

VOUT

LD 1117-3. 3

C2 9 47U 16V

C3 0 0.1U K

C3 1 0.1U K

C3 2 0.1U K

C3 3 0.1U K

+3V_PDVI VC C C3 5 0.1U K C3 6 0.1U K C3 7 0.1U K C3 8 0.1U K C3 9 0.1U K U6

GN D

VI N

VOUT

2 1
+ C4 0 47U 16V C4 1 0.1U K

LD 1117-3. 3

LCD03B First issue 04 / 04

D1 9 BAV99

D2 0 BAV99

L33 220 OH M

TP232

(o pen)

CN 5

D2 1 BAV99 3

51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75

QO2 QO3 QO4 QO5 QO6 QO7 OVCC OGND QO8 QO9 QO10 QO11 QO12 QO13 QO14 QO15 VCC GND QO16 QO17 QO18 QO19 QO20 QO21 QO22

QE13 QE12 QE11 QE10 QE9 QE8 OGND OVCC QE7 QE6 QE5 QE4 QE3 QE2 QE1 QE0 PDOZ SCDT STAG_OUT VCC GND PIXS SDA PDZ RESETZ

25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

RN 4 5 6 7 8 RN 5 5 6 7 8 5 6 7 8

4 3 2 1
47

47

P3 GB E[ 0..7]

4 3 2 1 4 3 2 1

GBE GBE GBE GBE GBE GBE GBE GBE

7 6 5 4 3 2 1 0

32

1 1

22P CN 6 8

RN 6 47 R2 8 1.5K

22P

P7 DV I_PD O P7 DV I_SC DT

MAIN BOARD INTERFACE - INTERFACE MAIN BOARD - SCHALTBILD MAIN BOARD - SCHEMA DELLA MAIN BOARD INTERFAZ MAIN BOARD
( MAIN BOARD 3/11-30)
+5VS +3V_DDV I R18 C1 5 O PEN D16 BAV99 [ P.4] TP138 D2D1D0D2+ D1+ D0+ TP11TP12TP13TP14TP15TP16 TP17TP18TP19TP20TP21 [ P.4] [ P.4] [ P.2] [ P.4] [ P.4] +5VS D17 +5V_EDI D GFBK DVI_C K G PEN GVS GHSS OG C1 7 O PEN C1 8 O PEN C1 9 O PEN C2 0 O PEN R22 33 R23 R24 R25 0 0 0 L3 OPEN R21 0 RN1 5 6 7 8 5 6 7 8 RN2 R19 NC_R0603 C1 6 O PEN 2 2 2 2 2 2 R17 NC_R0603 R20 10K CN1 OPEN 5 6 7 8 5 6 7 47 4 3 2 1 4 3 2 1 47 RN3 5 6 7 8 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 8 7 6 5 47 4 3 2 1 8 10K

J3
1 9 17 2 10 18 3 11 19 4 12 20 5 13 21 6 14 22 7 15 23 8 16 24 C1 C3 C5 C5 _ C2 C4 1 9 17 2 10 18 3 11 19 4 12 20 5 13 21 6 14 22 7 15 23 8 16 24 25 27 29 30 26 28

1 CN2 OPEN GRE[0..7] GRE7 GRE6 GRE5 GRE4 GRE3 GRE2 GRE1 GRE0

3 31

D11 BAV99 3

D12 BAV99 3

D13 BAV99 3

D14 BAV99 3

D15 BAV99 3

31

[P .4 ]

CN3 O PEN GGE7 GGE6 GGE5 GGE4

GG E[0..7]

[ P.4]

D18 1N4148 HO T_PLUG L4 42 OHM 1N4148 IDCK+ P2 IDCK P2 +3V_DDV I V33 L5 42 OHM VCPU33 L37 OPEN +5VS C2 5 0.1U K C2 6 0.1U K C2 7 0.1U K C2 8 0.1U K C2 2 + C2 1 22U 16V 0.1U K 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 QO2 QO3 QO4 QO5 QO6 QO7 OVCC OGND QO8 QO9 QO10 QO11 QO12 QO13 QO14 QO15 VCC GND QO16 QO17 QO18 QO19 QO20 QO21 QO22

QO1 QO0 HSYNC VSYNC DE OGND ODCK OVCC CTL3 OCK_INV HS_DJTR GND VCC QE23 QE22 QE21 QE20 QE19 QE18 QE17 QE16 OVCC OGND QE15 QE14

1 CN4 OPEN 8

32

U3 SII169

D19 BAV99 1

D20 BAV99 1

R29

1.5K R30 1.5K

+3V_DDV I

OGND QO23 OVCC AGND RX2+ RX2AVCC AGND AVCC RX1+ RX1AGND AVCC AGND RX0+ RX0AGND RXC+ RXCAVCC EXT_RES PVC C PGND RESERVED SCL

C2 3

3300P K

76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100

R32 NC_R0603 R34 10K +3V_DDV I D23 SII169_RST Z [ P.6] +3V_ADVI

+3V_DDV I +3V_DDV I +5V_EDI D R35 3.3K 1 1 +5V_EDI D [ P.2] D2+ D2D1+ D1D0+ D0IDCK+ IDCK -

+3V_PDVI

[ P.2]

DVI_SCL_3V

2 Q1 BSN 20

3 Q2 BSN 20

U4 AT24C02A
R40 2K 1 DVI _SCL R41 2K 8 7 6 5 VC C WP SC L SD A A0 A1 A2 GND 1 2 3 4 C2 4 0.1U K

R36 390

R37 10K

+3V_DDV I

1N4148 DVI_SDA_3V R38 NC _R0603 [ P.2]

+3V_DDV I +3V_ADVI R42 NC_R0603 R43 NC_R0603 DVI_SCL_3V [ P.2]

R39 3.3K 1

[ P.2]

DVI_SDA_3V

2 Q3 BSN 20

3 Q4 BSN 20

DVI _SDA

Q21 2N3906 R186 10K R188 1K +9V +9V R170 27K R171 100 1U K ZD1 TZ MC5V1 1 1 ZD2 TZ MC5V1 C172 [P .1 ] AUD_PC_ L 1U K R172 47K +9V R173 1K R174 27K Q18 2N3904 Q17 2N3904 5 4 3 C231 + 10U 16V Q22 2N3904 10K

+9V R187

VCC L35 42 OHM +5VS PC_AUDIO_SE L [P. 6] L36 OPEN

U5 LD1117-3.3
3 VIN GND VOUT 2

+3V_ADVI

D21 BAV99 3

D22 BAV99

C3 5 0.1U K

C3 6 0.1U K

C3 7 0.1U K

C3 8 0.1U K

QE13 QE12 QE11 QE10 QE9 QE8 OGND OVCC QE7 QE6 QE5 QE4 QE3 QE2 QE1 QE0 PDOZ SCDT STAG_OUT VCC GND PIXS SDA PDZ RESETZ

25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

RN4 5 6 7 8 RN5 5 6 7 8 5 6 7 8

47 4 3 2 1 47 4 3 2 1 4 3 2 1

GGE3 GGE2 GGE1 GGE0

[ P.4] GB E[0..7]

P7 DVI_PDO P7 RN6 47 DV I_SCDT R28 1.5K CN5 O PEN

GBE7 GBE6 GBE5 GBE4 GBE3 GBE2 GBE1 GBE0

32

5 CN6 O PEN C3 3 0.1U K

R189 C 232 0.1U K

C3 4 0.1U K

+ 1 2

C2 9 47U 16V

C3 0 0.1U K

C3 1 0.1U K

C3 2 0.1U K

R190 10K

1K

C171 L32 220 OHM TP231 R26 1K 2 AUD _DVI_L [P .2 ] [P .2 ] AUD _DVI_L

16

AUD_INPUT_L

[P. 7]

6 7 8

R27 NC _R0603 J4

TP233 3

4 L33 220 OHM 2

R176 47K +9V R178 27K R179 100 Q19 2N3904 R177 1K

AV_SEL LO W HIGH

OUTPUT DVI PC

C3 9 0.1U K

1 + 2 C4 0 47U 16V

R175 100

GND

U37C 74HC4053

U6 +3V_PDVI LD1117-3.3
3 VIN VOUT 2

R191 NC _R0603

C4 1 0.1U K

TP232

R31

1K

AUD_DVI_R ZD3 TZ MC5V1

[P .2 ]

2210018551

1 1

R33 NC _R0603

C173 [P .2 ] AUD_DVI_R 1U K

MAIN BOARD U37A 74HC4053 14


R192 NC _R0603 11 AUD_IN PU T_R [P. 7]

ZD4 TZ MC5V1

DVI

AUDIO

i nput 2

R180 47K +9V 1K R181 R182 27K R183 1001 Q20 2N3904

12 13 6 7 8

[P .1 ] AUD_PC _R

C174

1U K

R184 47K R185 1K

LCD03B First issue 04 / 04

16

MAIN BOARD INTERFACE - INTERFACE MAIN BOARD - SCHALTBILD MAIN BOARD - SCHEMA DELLA MAINBOARD INTERFAZ MAIN BOARD
( MAIN BOARD 4/11-27,30)

74LVC1G126
P7 PC_AV P1 RG B_ HS

VD 33 R4 4 R4 7 47 R4 9 47 0

1 2 3

OE A GND

VCC

(O PEN) R4 5 0

U7
4

GB LKSPL

P7 R4 6 C4 2 3.3K C43 3900P 50 V K .039U 16 V K

T race and Components Close IC


PVD D VD 33

R1 64 C2 16 R5 4 0 (o pen) 0 MUXCR R1 35 R 138 R1 40 R 141 0 (o pen) C2 17 50 V K 2 C 218 C2 19 50 V K 2 C 220 C2 21 50 V K 2 C 222 C2 23 50 V K 2 C 224 C2 25 50 V K 2 C 226 C2 27 50 V K 2 C 228

470K 470P 50 V K 0.01U L12 10U K (o pen)

74LVC1G126
1
P1 RGB_VS

OE A GND

VCC

PV DD GV MID C4 7 0.1U K

AV DD

CO MP _CRPR_ JUMPDW N CO MP _CRPR CO MP _YCYP_JUMPDWN CO MP _YCY P CO MP _CBPB_JUM PD WN CO MP _CBP B R5 5

2 3

U8
4

1 10 U M 20V

+5VS L31 B EAD R 165 C2 29 0.01U 50 V K P7 C 230 1U K GCOAST

(o pen)

(o pen)

40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21

C N7 22P

0.01U

5 4
C N8 22P

0 MU XY 0 (o pen) 0 MUXCB

1 10 U M 20V

GND VD CLAMP MIDSCV GND PVD PVD FILT GND VSYNC HSYNC COAST GND VD VD GND GND VDD VDD GND

+ + +

0.01U

U32
1 2 3 4 5 6 7 8 9 10 11 12 RIN_1 HDdetect GIN_1 GND BIN_1 GNDD RIN_2 GNDD GIN_2 GNDD BIN_2 VIN_1 HIN_1 DIN_2 HD_O R_out VCC G_out CON_IN CON_O CTL B_out VD_out VIN_2 24 23 22 21 20 19 18 17 16 15 14 13
68K

C5 3

0 .22U K

BA IN

1 10 U M 20V

0.01U

C5 6 C58 TW O_ OPTI ON C6 1 P7 P7 SCL_C PU SDA_C PU R5 1 R5 2 0 0

0 .22U K

GA IN

RE D_PR_I N

1 10 U M 20V

1000 P J SO GI N 50V 0 .22U K RA IN

0.01U

GR EE N _YP_IN

1 10 U M 20V

0.01U

BA7657F

GV RE F

BLUE _PB_IN

61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80

0.1U K

(o pen)

(o pen)

TWO_OPTION SELECTS 2 FOR D-SUB PC AND YPBPR


8 7

(o pen)

(o pen)

CN 12 22P

PC_AV SELECTS D-SUB OR SOGIN(YPBPR )


AD RE AD RE AD RE AD RE AD RE AD RE AD RE AD RE R 163 A DCK 0 0 1 2 3 4 5 6 7

CN 11 22P

CN 10 22P

C6 4

CN 9 22P

1 10 U M 20V

GNDD VD GNDD VSOUT SOGOUT HSOUT DATACK GNDD VDD R7 R6 R5 R4 R3 R2 R1 R0 VDD VDD GNDD

41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

GND VD BAIN GND VD VD GND GAIN SOGIN GND D VD VD GND RAIN A0 SCL SDA REF BYPASS VD GND

U9

AD9883KST-110 I2C Addr: 0x98

GND B0 B1 B2 B3 B4 B5 B6 B7 VDD GND G0 G1 G2 G3 G4 G5 G6 G7 GND

20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

RN7 47 ADBE0 ADBE1 ADBE2 ADBE3 ADBE4 ADBE5 ADBE6 ADBE7 AD GE AD GE AD GE AD GE AD GE AD GE AD GE AD GE 0 1 2 3 4 5 6 7

1 2 3 4 1 2 3 4

RN8

8 7 6 5 8 7 6 5 47 8 7 6 5 8 7 6 5

GBE0 GBE1 GBE2 GBE3 GBE4 GBE5 GBE6 GBE7 GGE GGE GGE GGE GGE GGE GGE GGE

GB E[ 0..7] P7

TWO_OPTION SELECTS 1 FOR YPBPR FROM RCA JACK TWO_OPTION SELECTS 2 FOR PC FROM D-SUB PC_AV SELECTS D-SUB OR SOGIN(YPBPR )
L30 30 OH M(o pen)

G1

CO MP _YCYP_JUMPDW

ADSO G

16

CO MP_CBPB_J UM PD WN CO MP _CRPR_ JUMPDW N

G2

P7

VCC

11

GNDD

2R

CX2 RCX2

6 7

1N4148 C7 3 220P 50V J

+5VS L8 42 OH M

U14 LD1117-3.3
3
C7 4 0.1U K

R6 7 221K F

GND

C8 7 + C7 7 10U 16V 0.1U K

GND

C7 6 C7 8 0.1U K C7 9 0.1U K C8 0 0.1U K C8 1 0.1U K C8 2 0.1U K C8 3 0.1U K C8 4 0.1U K C8 5 0.1U K C8 6 0.1U K 0.1U K C8 9 0.1U K C9 0 0.1U K C9 1 0.1U K C9 2 0.1U K C9 3 0.1U K C9 4 0.1U K C9 5 0.1U K C9 6 0.1U K

LCD03B First issue 04 / 04

AV DD

VD 33

PV DD

+ + +

1 2 RN9 3 47 4 1 2 RN 10 3 47 4

0 1 2 3 4 5 6 7

GG E[ 0..7] P7

1 2 3 4 1 2 3 4

8 7 6 5 47 8 RN 12 7 6 5 47
RN 11

GR GR GR GR GR GR GR GR

E0 E1 E2 E3 E4 E5 E6 E7

GR E[0 ..7] P7

R5 8 L7

0 30 OH M(o pen) GCLK

C 210 22P J (o pen)

C 211 22P J (o pen)

DV I_CK

C6 5 22P J (o pen)

C6 6 22P J (o pen)

A DHS AD VS VD3 3 C6 9

R5 9 R6 0

47 47 C6 7 22P OPEN C6 8 22P OPEN

GFBK GVS

P7 P7

TP234 TP235 TP236 TP237

1 2 3 4 5 6

J14
MV_EN

U12 74LVC1G126
1 2 3 OE A GND Y 4 VCC 5

0.1U K VD 33

U11 74LV123PW
R6 1 C7 0 220P 50V J R6 2 D2 4 47K 36 0 P7 GAFE OE VD 33 1K

1 2 3 9 10

1A 1B 1R 2A 2B

CX1 RCX1 1Q 1Q 2Q 2Q

14 15 13 4 5 12 1

U13 74LVC1G126
1 2 OE A GND Y 4 VCC 5 3
+ C7 1 1U 50V R6 6 47K

VD 33

2 R6 3
1N4148 D2 5 R6 4

1K

R6 5

47 C7 2 22P J (o pen)

GH SSO G

P7

VD 33

MAIN BOARD
AV DD VCPU 33 L10 42 OH M + C7 5 47U 16V VD 33 +5VS L11 42 OH M

VI N

VOUT

U15 LD1117-3.3
3 VIN VOUT 2

PVDD

C8 8 47 U 16V

MAIN BOARD INTERFACE - INTERFACE MAIN BOARD - SCHALTBILD MAIN BOARD - SCHEMA DELLA MAIN BOARD INTERFAZ MAIN BOARD
( MAIN BOARD 5/11-27)
TP 24 P7 ,P9 P3 GFBK RESE T TP 25

E3
R6 8 P3 P2 GCL K G PEN P3 GVS P3 GHSS OG NC_R0603 Y1 X608 14.318M HZ C100 18P 50 V J R7 0 R7 3 TP 28 SDA_ CP U SCL _CPU DECOE P3 P2 VIDE O_RESET L CD_ON P1 0 P3 PW R_ON LVDS_ EN 10K 470 10K RX D TX D

RESET MCKEXT DCKEXT XTALI XTALO RXD TXD IRRCVR0 IRRCVR1 PORTA0 PORTA1 PORTA2 PORTA3 PORTA4 PORTA5 PORTA6 PORTA7 PORTB0 PORTB1 PORTB2 PORTB3 PORTB4 PORTB5 PORTB6 PORTB7

H19 G20 J17 G19

GCLK GPENSOG GVS GHS

GFBK GREF GBLKSPL GCOAST

H17 H18 F19 F20

X607 TP 27 GBLKSPL GCOAST P3 P3 VCPU33 R7 1 C9 9 18P 50 V J VCPU33 R7 2 P1 P1 P9 RX TX D

W13 Y13 P3 P4 C1 D3 E4 D2 C2 B1 B2 A1 C4 D5 B3 A2 A3 C5 D6 B4 A4 C6 B5 A5

GRE[0. .7] P3

U16C PW166B-10T

GRE0 GRE1 GRE2 GRE3 GRE4 GRE5 GRE6 GRE7 GGE0 GGE1 GGE2 GGE3 GGE4 GGE5 GGE6 GGE7 GBE0 GBE1 GBE2 GBE3 GBE4 GBE5 GBE6 GBE7

M20 N19 N18 N17 N20 P20 P19 R20 F18 E19 E20 J18 H20 J19 J20 K19 D16 A18 C17 B18 A19 B19 A20 D18 K20 L17 L18 L19 L20 M18 M17 M19 E17 C19 B20 C20 E18 F17 D19 D20 B15 A16 C15 D15 B16 A17 C16 B17

GRE0 GRE1 GRE2 GRE3 GRE4 GRE5 GRE6 GRE7 GGE0 GGE1 GGE2 GGE3 GGE4 GGE5 GGE6 GGE7 GBE0 GBE1 GBE2 GBE3 GBE4 GBE5 GBE6 GBE7 GRO0 GRO1 GRO2 GRO3 GRO4 GRO5 GRO6 GRO7 GGO0 GGO1 GGO2 GGO3 GGO4 GGO5 GGO6 GGO7 GBO0 GBO1 GBO2 GBO3 GBO4 GBO5 GBO6 GBO7
V25P

U16A PW166B-10T
SDA _CPU SCL _CPU

IRRCVR_3V 3.3K 3.3K

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15

P1 P2 N3 N4 R1 R2 T1 T2 R3 U1 U2 R4 T3 V1 W1 V2 T4 U3 Y1 W2 F4 F3 E1 F2 F1 G2 G1 H1 H4 H3 H2 J1 J2 J4 J3 K1 M3 M4 N2 M1 L2 L1 K2 M2 N1 E2 D1

TP 26 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D1 0 D1 1 D1 2 D1 3 D1 4 D1 5 RDn WR n

A[1 ..19] P9

DCLK DVS DHS DCKEXT DEN DRE0 DRE1 DRE2 DRE3 DRE4 DRE5 DRE6 DRE7
D[0..15] P9

W12 DCL KR V13 U13 Y13 Y15 R19 T20 R18 R17 T18 U19 T17 V20 U18 V19 W20 W19 Y20 V17 U16 W18 Y19 Y18 V16 U15 Y16 V15 W16 W15 Y12 W11 Y11 U10 V10 W10 Y10 W9 Y9 W8 V8 U8 Y8 Y7 W7 Y5 V6 U6 W5 Y4 V5 Y3 V4 Y2
DR0 DR1 DR2 DR3 DR4 DR5 DR6 DR7 DG0 DG1 DG2 DG3 DG4 DG5 DG6 DG7 DB 0 DB 1 DB 2 DB 3 DB 4 DB 5 DB 6 DB 7

C9 7 22 P 50 V J R6 9 RVS RHS RDE

C9 8 22P 50 V J DC LK

DC LK RV S RHS RDE DR[0. .7]

P8 P8 P8 P8

P8

DG [0..7] P8

GG E[0..7 ] P3

L CD_BR

R7 4 C101 2.2U K 16V

PW M_ BR VR 0 VR 1 VR 2 VR 3 VR 4 VR 5 VR 6 VR 7

Misc

DGE0 DGE1 DGE2 DGE3 DGE4 DGE5 DGE6 DGE7 DBE0 DBE1 DBE2 DBE3 DBE4 DBE5 DBE6 DBE7 DRO0 DRO1 DRO2 DRO3 DRO4 DRO5 DRO6 DRO7 DGO0 DGO1 DGO2 DGO3 DGO4 DGO5 DGO6 DGO7 DBO0 DBO1 DBO2 DBO3 DBO4 DBO5 DBO6 DBO7

DB [0..7] P8

GB E[0..7 ] P3

Display Port

Graphics Port

P6 P6 P6 P6 P5 P6

VCL K VPEN VVS VH S VFI EL D VG[0 ..7]

D12 C13 A14 B14 A15


VG0 VG1 VG2 VG3 VG4 VG5 VG6 VG7 VB0 VB1 VB2 VB3 VB4 VB5 VB6 VB7

VCLK VPEN VVS VHS VFIELD VY0 VY1 VY2 VY3 VY4 VY5 VY6 VY7 VUV0 VUV1 VUV2 VUV3 VUV4 VUV5 VUV6 VUV7

VR [0..7]

U16D PW166B-10T

D8 C8 B7 A7 B8 D9 C9 A8 B9 A9 B10 A10 D11 A11 C12 B13

U16B PW166B-10T
VCPU33

TP 33 TP 35 TP 36 R7 5 R7 6 R7 7 R7 8 4.7K NC_R0603 4.7K 4.7K R7 9 NC_R0603

TM S TCK TD O

D13 A6 W3 A13 U5 B6

CPUTMS CPUTCK CPUTDO MODE0 MODE1 MODE2

Graphics Port

RD WR BHEN ROMOE ROMWE RAMOE RAMWE CS0 CS1 EXTINT NMI

TP 29 TP 30 TP 31 ROM OE n P9 ROM WE n P9 TP 32 TP 34 CS0 n P9 CS1 n P9

CS 0n CS 1n

VB[ 0..7] P6

NM I P9

R8 0

R8 1 NC_R0603

NO TE : U pon reset, the on-board A/ D and video decoder will be tri-stated.


VCPU33 L14 V3P 42 OH M V33 R8 3 VCPU33 C1 0.1U Z

MAIN BOARD

VCPU25 R8 2 27

V3P VCPU33 C102 0.1U 25 V K

B1 2 C3 C10 C11 C14 G3 G18 K1 8 L3 P1 8 V1 1 V1 4 Y1 4 V7

C7 C18 K3 U20 V9 V1 2 V1 8 V3 Y6 Y1 7

R8 4

U33
8 7 6 5 NC VCC SCL1 SCL0 SDA1 SDA0 GND EN 1 2 3 4
SCL _CPU SDA_ CP U

U17 AT24C1616K
8 7 6 5 VCC WP SCL SDA NC NC NC GND 1 2 3 4

C103 0.1U 25 V K

C104 0.1U 25 V K

C105 0.1U 25 V K

C106 0.1U 25 V K

C107 0.1U 25 V K

C108 0.1U 25 V K

C109 0.1U 25 V K

C110 0.1U 25 V K

C111 0.1U 25 V K

C112 0.1U 25 V K

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10

VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14

SC L

3.3K 3.3K

U16E

PW166B-10T

Power and Ground

SD A VCPU33 VCC R8 5

PCA9515DP
I2C_EN ABLE SCL _CPU SDA_ CP U R8 6 + C 116 100U 16V

VCPU25

VCPU25

GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GND13 GND14 GND15 GND16 GND17 GND18 GND19 GND20 GND21 GND22 GND23 GND24 GND25

A1 2 B1 1 D4 D7 D10 D14 D17 G4 G17 K4 K1 7 L4 P1 7 T19 U4 U7 U9 U11 U12 U14 U17 W4 W6 W1 4 W1 7

C2

0.1U Z

C117 0.1U 25 V K

C118 0.1U 25 V K

C119 0.1U 25 V K

C120 0.1U 25 V K

C121 0.1U 25 V K

C122 0.1U 25 V K

C123 0.1U 25 V K

C124 0.1U 25 V K

C125 0.1U 25 V K

C126 0.1U 25 V K

C127 0.1U 25 V K

U34
8 7 6 5 NC VCC SCL1 SCL0 SDA1 SDA0 GND EN 1 2 3 4
SCL _CPU SDA_ CP U

SCL_5V VCPU33 C128 0.1U 25 V K

3.3K 3.3K

P7,P9

RESE T +5VS

U18
1 2 3 NC VSS NC RES 4 VDD 5

3 SW1

1
SD A_5V

PCA9515DP
I2C_EN ABLE

R8 7

470

4
R8 8 1K

V6300L

LCD03B First issue 04 / 04

MAIN BOARD INTERFACE - INTERFACE MAIN BOARD - SCHALTBILD MAIN BOARD - SCHEMA DELLA MAIN BOARD INTERFAZ MAIN BOARD
( MAIN BOARD 6/11-30)
TP 24 [P .6] TP25 TP 26 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D1 0 D1 1 D1 2 D1 3 D1 4 D1 5 RD n WR n RO MO En RO MW En CS 0n CS 1n

P3

RESE T

GFBK
R6 8 NC_R06 03 Y1 X608 14 .318M HZ C 100 18P 50V J R7 0 R7 3 470 10K TP 28 SD A_CP U SC L_CPU P2 P1 0 LCD_ON P3 PW R_ ON LV DS_E N 10K RXD TX D

E3 W1 3 Y13 P3 P4 C1 D3 E4 D2 C2 B1 B2 A1 C4 D5 B3 A2 A3 C5 D6 B4 A4 C6 B5 A5

RESET MCKEXT DCKEXT XTALI XTALO RXD TXD IRRCVR0 IRRCVR1 PORTA0 PORTA1 PORTA2 PORTA3 PORTA4 PORTA5 PORTA6 PORTA7 PORTB0 PORTB1 PORTB2 PORTB3 PORTB4 PORTB5 PORTB6 PORTB7

P3 P2 GCL K G PEN P3 GVS P3 GHSS OG

H19 G20 J17 G19

GCLK GPENSOG GVS GHS

GFBK GREF GBLKSPL GCOAST

H17 H18 F19 F20

X607

TP 27 GBLKSPL GCOAST P3 P3
VCPU 33 R7 1 R7 2 R 212

C9 9 18P 50V J V33 R 213 [P .1] [P .1]

GRE[0. .7] P3

U16C PW166B-10T

GRE0 GRE1 GRE2 GRE3 GRE4 GRE5 GRE6 GRE7 GGE0 GGE1 GGE2 GGE3 GGE4 GGE5 GGE6 GGE7 GBE0 GBE1 GBE2 GBE3 GBE4 GBE5 GBE6 GBE7

M20 N19 N18 N17 N20 P20 P19 R20 F18 E19 E20 J18 H20 J19 J20 K19 D16 A18 C17 B18 A19 B19 A20 D18 K20 L17 L18 L19 L20 M18 M17 M19 E17 C19 B20 C20 E18 F17 D19 D20 B15 A16 C15 D15 B16 A17 C16 B17

GRE0 GRE1 GRE2 GRE3 GRE4 GRE5 GRE6 GRE7 GGE0 GGE1 GGE2 GGE3 GGE4 GGE5 GGE6 GGE7 GBE0 GBE1 GBE2 GBE3 GBE4 GBE5 GBE6 GBE7 GRO0 GRO1 GRO2 GRO3 GRO4 GRO5 GRO6 GRO7 GGO0 GGO1 GGO2 GGO3 GGO4 GGO5 GGO6 GGO7 GBO0 GBO1 GBO2 GBO3 GBO4 GBO5 GBO6 GBO7
V25P

3.3K

3.3K

3.3K

GG E[0..7 ] P3

SD A_CP U VCPU 33 SC L_CPU SD A2 SC L2 Q23 2N3 904 [P .7] LCD_BR R 193 100

3.3K

U16A PW166B-10T

RX TX D

IRRCVR_3V [P .6]

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15

P1 P2 N3 N4 R1 R2 T1 T2 R3 U1 U2 R4 T3 V1 W1 V2 T4 U3 Y1 W2 F4 F3 E1 F2 F1 G2 G1 H1 H4 H3 H2 J1 J2 J4 J3 K1 M3 M4 N2 M1 L2 L1 K2 M2 N1 E2 D1

A[1..19] [P .6]

DCLK DVS DHS DCKEXT DEN DRE0 DRE1 DRE2 DRE3 DRE4 DRE5 DRE6 DRE7
D[0..15] [P .6]

W12 DCL KR V13 U13 Y13 Y15 R19 T20 R18 R17 T18 U19 T17 V20 U18 V19 W20 W19 Y20 V17 U16 W18 Y19 Y18 V16 U15 Y16 V15 W16 W15 Y12 W11 Y11 U10 V10 W10 Y10 W9 Y9 W8 V8 U8 Y8 Y7 W7 Y5 V6 U6 W5 Y4 V5 Y3 V4 Y2
DR0 DR1 DR2 DR3 DR4 DR5 DR6 DR7 DG0 DG1 DG2 DG3 DG4 DG5 DG6 DG7 DB 0 DB 1 DB 2 DB 3 DB 4 DB 5 DB 6 DB 7

C9 7 22 P 50 V J R6 9 RVS RHS RDE

C9 8 22P 50 V J DC LK

DC LK RV S RHS RDE DR[0. .7]

P8 P8 P8 P8

P8

DG [0..7] P8

R7 4 C1 01 2.2U K 16V

PW M_BR VR 0 VR 1 VR 2 VR 3 VR 4 VR 5 VR 6 VR 7

Misc

DGE0 DGE1 DGE2 DGE3 DGE4 DGE5 DGE6 DGE7 DBE0 DBE1 DBE2 DBE3 DBE4 DBE5 DBE6 DBE7 DRO0 DRO1 DRO2 DRO3 DRO4 DRO5 DRO6 DRO7 DGO0 DGO1 DGO2 DGO3 DGO4 DGO5 DGO6 DGO7 DBO0 DBO1 DBO2 DBO3 DBO4 DBO5 DBO6 DBO7

DB [0..7] P8

GB E[0..7 ] P3

Display Port

Graphics Port

P6 P6 P6 P6 P5 P6

VCL K VPEN VVS VH S VFI EL D VG[0 ..7]

D12 C13 A14 B14 A15


VG0 VG1 VG2 VG3 VG4 VG5 VG6 VG7 VB0 VB1 VB2 VB3 VB4 VB5 VB6 VB7

VCLK VPEN VVS VHS VFIELD VY0 VY1 VY2 VY3 VY4 VY5 VY6 VY7 VUV0 VUV1 VUV2 VUV3 VUV4 VUV5 VUV6 VUV7

[P .7]

VR[0..7 ]

U16D PW166B-10T

D8 C8 B7 A7 B8 D9 C9 A8 B9 A9 B10 A10 D11 A11 C12 B13

U16B PW166B-10T
VCPU 33

TP 33 TP 35 TP 36 R7 5 R7 6 R7 7 R7 8 4.7K NC_R06 03 4.7K 4.7K

TM S TCK TD O

D13 A6 W3 A13 U5 B6

CPUTMS CPUTCK CPUTDO MODE0 MODE1 MODE2

Graphics Port

RD WR BHEN ROMOE ROMWE RAMOE RAMWE CS0 CS1 EXTINT NMI

TP 29 TP 30 TP 31 [P .6] [P .6] TP 32 TP 34 [P .6] CS 0n [P .6] CS 1n

VB[ 0..7] P6

NMI

[P .6]

R8 1 R8 0 R7 9

NC_R0603 0 NC_R0603

NO TE : U pon reset, the on-board A/ D and video decoder will be tri-stated.


VCPU33 L14 V3P 42 OH M V33 R8 3 VCPU33 C1 0.1U Z VCPU33 C102 0.1U 25 V K

MAIN BOARD

VCPU25 R8 2 27

V3P

B1 2 C3 C10 C11 C14 G3 G18 K1 8 L3 P1 8 V1 1 V1 4 Y1 4 V7

C7 C18 K3 U20 V9 V1 2 V1 8 V3 Y6 Y1 7

R8 4

U33
8 7 6 5 NC VCC SCL1 SCL0 SDA1 SDA0 GND EN 1 2 3 4
SCL _CPU SDA_ CP U

U17 AT24C1616K
8 7 6 5 VCC WP SCL SDA NC NC NC GND 1 2 3 4

C103 0.1U 25 V K

C104 0.1U 25 V K

C105 0.1U 25 V K

C106 0.1U 25 V K

C107 0.1U 25 V K

C108 0.1U 25 V K

C109 0.1U 25 V K

C110 0.1U 25 V K

C111 0.1U 25 V K

C112 0.1U 25 V K

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10

VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14

SC L

3.3K 3.3K

U16E

PW166B-10T

Power and Ground

SD A VCPU33 VCC R8 5

PCA9515DP
I2C_EN ABLE SCL _CPU SDA_ CP U R8 6 + C 116 100U 16V

VCPU25

VCPU25

GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GND13 GND14 GND15 GND16 GND17 GND18 GND19 GND20 GND21 GND22 GND23 GND24 GND25

A1 2 B1 1 D4 D7 D10 D14 D17 G4 G17 K4 K1 7 L4 P1 7 T19 U4 U7 U9 U11 U12 U14 U17 W4 W6 W1 4 W1 7

C2

0.1U Z

C117 0.1U 25 V K

C118 0.1U 25 V K

C119 0.1U 25 V K

C120 0.1U 25 V K

C121 0.1U 25 V K

C122 0.1U 25 V K

C123 0.1U 25 V K

C124 0.1U 25 V K

C125 0.1U 25 V K

C126 0.1U 25 V K

C127 0.1U 25 V K

U34
8 7 6 5 NC VCC SCL1 SCL0 SDA1 SDA0 GND EN 1 2 3 4
SCL _CPU SDA_ CP U

SCL_5V VCPU33 C128 0.1U 25 V K

3.3K 3.3K

P7,P9

RESE T +5VS

U18
1 2 3 NC VSS NC RES 4 VDD 5

3 SW1

1
SD A_5V

PCA9515DP
I2C_EN ABLE

R8 7

470

4
R8 8 1K

V6300L

LCD03B First issue 04 / 04

MAIN BOARD INTERFACE - INTERFACE MAIN BOARD - SCHALTBILD MAIN BOARD - SCHEMA DELLA MAIN BOARD INTERFAZ MAIN BOARD
( MAIN BOARD 7/11-27,30)

P7 P7 P7 P7

DC LK RV S RH S RD E

R8 9 R9 0 R9 1

47 47 47 C 129 22P OP EN C 130 22P OP EN C 131 22P OP EN

D C LK DV S DH S DE N

TP140

V3 3

Fir st Pixel

1
C 132 DRL V7 0.1U K DRL V5 DG LV 0 DRL V2 DRL V0 DRL V6 DRL V3 DRL V4 DRL V1 DRL V5 DG LV 0

VCC TXIN5
T .L.

TXIN4 TXIN3 TXIN2 GND TXIN1 TXIN0 TXIN27 LVDS GND TXOUT0TXOUT0+ TXOUT1TXOUT1+ LVDS VCC LVDS GND TXOUT2TXOUT2+ TXCLK OUTTXCLK OUT+ TXOUT3TXOUT3+ LVDS GND PLL GND PLL VCC C PLL GND PWR DWM TXCLK IN TXIN26 GND

56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29

DRL V4 DRL V3 DRL V2

2 3 4 5

CN13

TXIN6 TXIN7 GND TXIN8 TXIN9 TXIN10 VCC TXIN11 TXIN12 TXIN13 GND TXIN14 TXIN15 TXIN16 VCC TXIN17 TXIN18 TXIN19 GND TXIN20 TXIN21 TXIN22 TXIN23 VCC TXIN24 TXIN25

TP39 TP40 TP41 TP42 TP43 TP44 TP45 TP46 TP47 TP48 VC C L15 TP49

RX IN 3+ RX IN3RX CL KI N+ RX CL KI NRX IN 2+ RX IN2RX IN 1+ RX IN1RX IN 0+ RX IN0-

G1

TP37 TP38

U19 THC63LVDM83A

J5
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 G2

DR [0..7] P7

DR 0 DR 1 DR 2 DR 3 DR 4 DR 5 DR 6 DR 7

DR 2 DR 0 DR 6 DR 3 DR 4 DR 1 DR 5 DG 0

5 6 7 8 5 6 7 8

RN 13 4 3 47 2 1 RN 14 4 3 2 47 1

DRL V1 DRL V0 DRL V6

DG LV 1 DG LV 2 V3 3 DG LV 6

6 7 8 9

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30

5 4

O PEN

80 OH M

RX IN0RX IN 0+ RX IN1V33 RX IN 1+ L16 80 OH M C 135 22U 16V

O PEN

C 133 DG LV 7 0.1U K DG LV 3 DG LV 4

CN 14

10 11 12 13

V3 3

DG LV 5 DB LV 0 DB LV 6 R9 2 OP EN DB LV 7 R9 3 10K DB LV 1 DB LV 2

14 15 16 17 18 19 20 21

RX IN2RX IN 2+ RX CL KI NRX CL KI N+ RX IN3RX IN 3+

C 134 + 0.1U K

FOR CMO CONNECTOR

CN 15

DG [0..7] P7

22P

26
O PEN DH S C 138 0.1U K DV S

D C LK DE N

DG DG DG DG DG DG DG DG

0 1 2 3 4 5 6 7

DG 6 DR 7 DG 1 DG 5 DG 2 DG 3 DG 7 DG 4

5 6 7 8 5 6 7 8

RN 15 4 3 47 2 1 RN 16 4 3 47 2 1

DG LV 6 DRL V7 DG LV 1 DG LV 5 DG LV 2 DG LV 3 DG LV 7 DG LV 4 CN 16

DB LV 3 DB LV 4 DB LV 5 V3 3

22 23 24 25

V33 L17 80 OH M P9

LVD S_EN + C 136 22U 16V

27 28

MAIN BOARD
8 7 6 5
CN 17 O PEN

DB [0..7] P7

DB 0 DB 1 DB 2 DB 3 DB 4 DB 5 DB 6 DB 7

5 6 7 8 5 6 7 8

RN 17 4 3 47 2 1 RN 18 4 3 47 2 1

DB LV 0 DB LV 1 DB LV 2 DB LV 3 DB LV 4 DB LV 5 DB LV 6 DB LV 7

CN 18

LCD03B First issue 04 / 04

O PEN

C 137 0.1U K

MAIN BOARD INTERFACE - INTERFACE MAIN BOARD - SCHALTBILD MAIN BOARD - SCHEMA DELLA MAIN BOARD INTERFAZ MAIN BOARD
( MAIN BOARD 8/11-27,30)
VCPU33 VCPU33 R9 4 0 ROM OE n ROM WE n RESE T R9 5 ( open) 0 FW Pn A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 D[0..15] +5VS C139 0.1U K

U20 AT49BV8192A(T)
26 28 11 12 14 47 25 24 23 22 21 20 19 18 8 7 6 5 4 3 2 1 48 17 16 CE OE WE RP WP BYTE A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 VPP VCC D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 GND GND 13 37

+5VS R9 6

Q13 2N3906

L18 42 OHM

1
29 31 33 35 38 40 42 44 30 32 34 36 39 41 43 45 46 27
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D1 0 D1 1 D1 2 D1 3 D1 4 D1 5

2
1 2 3 4
22P +5VS R9 9 R100 Q15 2N3904 10K R102 1K R103 47 0 R104 R105 10K R106 10K VCPU33 Q16 2N3904 Q14 2N3906 CN 19 10K R9 7 1K

R9 8 1K

5
(o pne)

2N3904 2N3906

LED1_SE L 1K R101 10K

IRRCVR_3V

LED2_SE L 1K

FC En R107 R108 C140 0.1U K 3.3K 3.3K D0 D1 D2 D3 D4 D5 D6 D7 A1 A3 A5 A7 A8 A10 A13 A15 A16 A18 C141 0.1U K KPD0 KPD1 KPD2 KPD3 KPD4 KPD5

U21
1A1 1A2 1A3 1A4 2A1 2A2 2A3 2A4 1G 2G 2 4 6 8 11 13 15 17 1 19
KPD0 KPD1 KPD2 KPD3 KPD4 KPD5 KPD6

KPD[0. .6]

VCPU33

VCPU33

J7
60 59
A2 A4 A6 A9 A11 A12 A14 A17 A19

ROM OE n D1 5 D1 4 D5 D4 D3 D2 D9 D8

RESE T

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31

18 16 14 12 9 7 5 3

1Y1 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4 GND

TP 50 TP 51 TP 52 TP 53 TP 54 TP 55 TP 56 TP 57 TP 58 TP 59 TP 60

12 11 10 9 8 7 6 5 4 3 2 1

12 11 10 9 8 7 6 5 4 3 2 1

VC C

20

KPD6 R109 R110 R111 R112 R113 R114 R115

TP 61

J6

5
CN 21 22P

CS 0n

CS0 n

10K

10K

10K

10K

10K

10K

10K

CONN ML 60P D1.27 ST AMP/104549

VCPU33

CN 20 22P

R116

ROM WE n D7 D6 D1 3 D1 2 D1 1 D1 0 D1 D0

R118 3.3K

R117 3.3K

U22
1A1 1A2 1A3 1A4 2A1 2A2 2A3 2A4 1G 2G 2 4 6 8 11 13 15 17 1 19

D8 D9 D1 0 D1 1 D1 2 D1 3 D1 4 D1 5

18 16 14 12 9 7 5 3

3.3K

20

R5 0 3.3K SCART 1_M ODE1 INPUT_D ET TV_DET DV I_SCDT SCART 1_M ODE2

1Y1 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4 GND

VC C

R119 R120 R121 R122

0 0 0 0 CS0 n

1 sets YPbPr from D-sub(PC), 0 sets YPbPr from RCA jacks(YCbCr)

TW O_OPTION_DET

SCART 2_M ODE1 SCART 2_M ODE2 R5 3 3.3K

NM I

74AHC244
VCPU33

10

A[1 ..19] VCPU33 C143 0.1U K

MAIN BOARD
C 142 0.1U K

D0 D1 D2 D3 D4 D5 D6 D7 CS1 n VCPU33 R130 10K

3 4 7 8 13 14 17 18 11 1

D1 D2 D3 D4 D5 D6 D7 D8 CLK CLR

Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8

2 5 6 9 12 15 16 19

R128

PC_ AV DVI _PDO MV _E N S II16 9_RST Z GAF EO E SCART _F B_EN MUTE AUDIO_RE SET

[P.3] [P.2] [P.3] [P.2] [P.3] [P.7] [P.7] [P.7]

VC C

20

U23

20

U24
D8 D9 D1 0 D1 1 D1 2 D1 3 D1 4 D1 5

U24
Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 2 5 6 9 12 15 16 19
R123 R124 R125 R126 R127 R129 0 0 0 0 0 0 LED1_SE L LED2_SE L TW O_OPTION I2C_EN ABLE

74AHC244

10

3 4 7 8 13 14 17 18 11

D1 D2 D3 D4 D5 D6 D7 D8 CLK CLR

2 5 6 9 12 15 16 19

R 123 R 124 R 125 R 126 R 127 R 129

0 0 0 0 0 0

LED1_SEL LED2_SEL VIDEO_RESET DECO E TW O_OPTION I2C_ ENABLE PC_AUDI O_SEL

[P .4] [P .4] [P .7] [P .7] [P .3] [P .4] [P .2]

VC C

GND

CS1 n VC PU33 R131 10K +

1
C 145 10U 16V

LCD03B First issue 04 / 04

10

C 144 10U 16V

10

74LVC273

GND

30" Only 74LVC273

74LVC273

MAIN BOARD INTERFACE - INTERFACE MAIN BOARD - SCHALTBILD MAIN BOARD - SCHEMA DELLA MAIN BOARD INTERFAZ MAIN BOARD
( MAIN BOARD 9/11-27,30)

+12V 20D00 45105 TP 63 5 TP 65 4 TP 67 3 TP 70 2 TP 73 1 R133 EAR_MUTE L19 L21 220 OHM 220 OHM 220 OHM 220 OHM R132 10K L29 220 OHM L34 C 146 22 P J ( open) ( open) 220 OHM ( open) AUDIO_R_EAR EARPHONE_MUTE AUDIO_L_EAR R4 8 47K EAR_MUTE Q9 2N3904 AUDIO_L_OUT AUDIO_R_OUT L22 L23 10K EARPHONE_MUTE P7 MUTE TP 64 TP 68 TP 71 TP 74 220 OHM C 147 22 P J ( open)

J9
TP 66 1 2 3 4 5 6

J8
+12V L24

G2

220 OHM

G1

( open) L6 ( open) L9

42 OHM

TO AUDIO BOARD

TO KEYPAD BOARD

L6 L9

560PJ 560PJ +12V +5VS VCC

30" Only

J12
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
TP 77 +12V TP 78 TP 79 TP 80 C150 0.33U Z

U25
1 VI GND VO 3

+9V

1
+ C 149 47U 16V

C151 0.1U K

U27
VPU 33 TP 81 TP 82 TP 83 PW R_ON L CD_ON L CD_BR P7 P7 P7 +5VS C156 0.1U K

7809ABD2T

L2 6

VCPU33

VIN GND

VOUT

2
42 OHM + C 155 47U 16V C157 0.1U K

TO POWER BOARD

U28
VPU 25

LD1117-3.3
2

L1 3

VCPU25

VIN GND

VOUT

42 OHM + C 159 47U 16V C161 0.1U K

C160 VR [0..7] VR 0 VR 1 VR 2 VR 3 VR 4 VR 5 VR 6 VR 7 VG[0 ..7] VG0 VG1 VG2 VG3 VG4 VG5 VG6 VG7 COM P_ YC YP COM P_ YC YP _J UM PU P CO MP _CBPB COMP _CB PB_JUM PU P COMP _CRPR COMP _CRPR_JU MP UP R5 6 R5 7 R142 R143 R144 R145 0 0 ( open) 0 0 ( open) SCART _FB_ EN AUDIO_RE SET COM P_ Y COMP_C B TP 84 TP 87 TP 90 TP 93 TP 96 TP 98 TP 10 1 TP 10 4 TP 10 7 TP 11 0 TP 11 3 TP 11 6 TP 11 9 TP 12 1 TP 12 3 TP 12 5 TP 14 7 TP 14 8 TP 14 9 TP 15 0 TP 15 1 TP 15 2 TP 15 3 VCC TP 12 7 +9V TP 13 0 +12V TP 13 2

J13
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79
GF80

VB[ 0..7]

CO MP _C R 0 0 ( open) SC ART 1_M ODE1 SC ART 1_M ODE2

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80

GND

SCART 2_M ODE1 SCART 2_M ODE2 DEC OE INPUT_D ET TV_DET SC L SDA SCL_5V SD A_5V VIDE O_RESET VVS VH S VCL K VPEN VFI EL D A UD_PC_ L AUD_PC _R AUD _DVI_L AUD_DVI_R A UDIO_L_O UT AU DIO_R_OUT

VB0 VB1 VB2 VB3 TP 14 3 VB4 VB5 VB6 VB7

TP 85 TP 86 TP 88 TP 89 TP 91 TP 92 TP 94 TP 95 TP 97 TP 99 TP 10 0 TP 10 2 TP 10 3 TP 10 5 TP 10 6 TP 10 8 TP 10 9 TP 11 1 TP 11 2 TP 11 4 TP 11 5 TP 11 7 TP 11 8 TP 12 0 TP 12 2 TP 12 4 TP 12 6 TP 12 8 TP 14 4 TP 14 5 TP 14 6 TP 24 2

TO POWER BOARD
U29
VCC C164 0.1U K

R137 681F

+ C162 10 U 16V V33

VIN

VOUT

0.1U K

LM318M

R136 681F

MAIN BOARD

LD1117-3.3

C 163 47U 16V

C165 0.1U K

G1
COM P_ YC YP _J UM PU P TP 23 8 TP 23 9 TP 24 0 TP 24 1 CO MP _CB PB_JUM PU P CO MP _CRPR_JU MP UP

J15

AUDIO_L_EAR AUDIO_ R_EAR +5VS

1 2 3 4 5 6 G2

LCD03B First issue 04 / 04

MAIN BOARD INTERFACE - INTERFACE MAIN BOARD - SCHALTBILD MAIN BOARD - SCHEMA DELLA MAIN BOARD INTERFAZ MAIN BOARD
( MAIN BOARD 10/11-27)

FA N_ E +5V _FAN + 12V_FAN +5V _FAN R151 Q6 2SB772S R152 4.7K +5V _FAN SC L_5V SD A_5V R147 R148 R146 +12V_FAN1 Q5 2N3904 + C3 2.2U 50V R150 2.2K 0 0 10K 4.7K C5 2 0.1U K C5 1 0.1U K

R134

(o pen) Q10 2N3906 FA N_ B R139 0 ( open) + 12V_FAN R162 4.7K

C4 8 0.1U M

U36 CD4049UBCM
1 2 3 4 5 6 7 8 VDD AR A BR B CR C VSS NC FR F NC ER E DR D 16 15 14 13 12 11 10 9

U35 G768B
14 12 11 6 1 10
R153 2.2K R149 2.2K

SMBCLK SMBDATA ALERT

VCC VCC DXP1 DXN

15 2 3 4 5 16 13 7 8

C4 5 2200 PJ C4 6 2200 PJ R159 2.2K R166 4.7K

2SB772S Q8

CLOCK _FAN R167 R168 Y2 25 .6KH Z 2M 10 M

+12V_FAN 2

RESET DXP2 OUT1 FG1 CLK OUT2 FG2 GND GND

Q7 2N3904 + R160 2.2K C4 4 2.2U 50V

R158 2.2K

C4 9 10 P J

C5 0 10 PJ CLOC K_FA N

+5V _FAN R154 10K FANSPI N1

+5V _FAN R161 10K

FANSPIN 2 +12V_FAN 1 TP 72 VCC L27 42 OHM L28 42 OHM TP 14 1 +5V _FAN +12V + 12V_FAN FANSPI N1 TP 69

1 2 3

J10

TP 24 3 +12V_FAN 2 TP 76 FANSPI N2 TP 14 2 TP 75 FA N_ B TP 24 4 FA N_ E

1 2 3

J16

1 2 3

J11 MAIN BOARD

L25 42 OHM

LCD03B First issue 04 / 04

MAIN BOARD INTERFACE - INTERFACE MAIN BOARD - SCHALTBILD MAIN BOARD - SCHEMA DELLA MAIN BOARD INTERFAZ MAIN BOARD
( MAIN BOARD 11/11-30)

J11
+5V_FAN

C4 8 0.1U K +5V_FA N +12V_FA N

TP24 4 R1 34 NC_R06 03 TP 76 Q10 2N3906 R1 39 C5 1 0.1U K NC_R0603 +12V_FA N Q6 2SB772S R1 52 4.7K +12V_FAN1 Q5 2N390 4 + C3 2.2U 50V R 150 2.2K SCL_ 5V +5V_FA N SDA_ 5V R1 47 R1 48 0 0

U36
CLOCK_ FA N R 167 R 168 Y2 25 .6KH Z 2M 10 M

3 2 1

OPEN

TP24 3

1 2 3 4 5 6 7 8

VDD AR A BR B CR C VSS

NC FR F NC ER E DR D

16 15 14 13 12 11 10 9

C5 2 0.1U K R 151 4.7K

U35
14 12 11 6 1 10
R1 53 2.2K R 149 2.2K

R1 62 4.7K

CD4049UBCM
C4 9 10P J C50 10PJ

SMBCLK SMBDATA ALERT

VCC VCC DXP1 DXN

15 2 3 4 5 16 13 7 8

C4 5 2200PJ

2SB772S Q8 R1 66 4.7K

R1 46 10K

C4 6 0

+12V_FAN2

RESET DXP2 OUT1 FG 1 CLK OUT2 FG2 GN D GN D

R1 59 2.2K

Q7 2N3 904 + R1 60 2.2K C4 4 2.2U 50V

R1 58 2.2K

VCC L27 42 OH M

+5V_FAN +5V_FA N +12V_FA N R1 54 10K

G768B
CLOCK_ FA N +5V_FA N

R1 61 10K FANSP IN 2

+12V L28 42 OH M

+12V_FAN R 200 Q25 2SB772S OPEN FANSPIN1 D2 8 TZMC 5V 1 R2 01 OPEN R 203 OPEN

OPEN

D2 9 TZMC 5V 1

+12V_FAN3 TP75 R 202 +12V_FAN1 TP72 FANSP IN 1 TP 69 TP24 6 +12V_FAN2 TP24 5 + C 233 OP EN 50V Q24 2N390 4

OPEN

OPEN R2 04 OPEN R 205 OPEN

1 2 3
TP14 1

J10

FANSP IN2

1 2 3
TP24 7

J17

MAIN BOARD

TP142

Remove Third

Fan

L25 42 OH M

LCD03B First issue 04 / 04

VIDEO SIGNAL PROCESSING - TRAITEMENT VIDEO - VIDEO SIGNALVERARBEITUNG - ELABORAZIONE VIDEO - TRATAMIENTO VIDEO
( CONNECTOR BOARD 1/7-27,30)

J1
TP1 Bottom View 3 5 6 1 3 4 2 TP4 R2 1K R3 22K R4 22K D1 TZMC5V1 D2 TZMC5V1 R5 75 V CC D N1 3 BAV99 1 AUD_CVBS_R 4 TP3 R1 1K 5 6 TP2 CVBS_I N L1 1000 OHM CVBS_A V

[P 4] [P 3] [P 3]

Connector board

AUD_CVBS_ L

MC TZ 5V1 D3

TZMC5V1 D4

J2
Y Bottom View . G1 TP6 S1 G2 1 3 S1 G1 . C 2 G3 4 3 1 G1 2 TP7 TP5

L2 1000 OHM VCC 2 R6 75 D N2 3 BAV99 1 S _Y [P 3]

4 TP8 L3 S_C VCC D N3 3 BAV99 1 2

[P 3]

1000 OHM

R7 75 L37 INPUT_DET 1000 OHM [P 3]

S-VIDEO IS INDEPENDENT R840 (open) J3 7 6 1 0 G1 COMP_YCYP COMP_YCYP_JUMP UP COMP_CBPB_JUMPU P 3 BAV99 1 COMP_CRPR_JUMP UP R87 R63 VCC 2 R13 75 3 BAV99 1 R88 0 (open) 0 COMP_CRPR D N5 0 (open) 0 COMP_CBPB TP123 TP122 TP124 TP125 1 2 3 4 5 6 G2 TP9 L4 220 OHM L5 220 OHM C1 TP11 1000PJ C2 1000P J D5 TZMC5V1 D6 TZMC5V1 R8 R9 0 0 R10 100K AUDIO_L_LINE [P 7] AUDIO_R_LI NE [P 7] R11 100K

L6 1000 OHM R12 75 VCC 2 D N4

R62

J11

2 4 5 3

TP10

J4
5 6 L7 3 4 1000 OHM 1 2

AUDIO MONITOR OUTPUT

D7 TZMC5V1

D8 TZMC5V1

L8 1000 OHM R14 75 BAV99 D N6 1 V CC 2

R64

Mode1 8.6-12V +5VS 3 3.5-8.6V 0-3.5V 1 1 0 0

Mode2 1 1 0 scart 4:3 scart 16:9 Prev. status

2 D N7 BAV99

J5
3 4

V+

SCART1_SWITCH R15 AUD_COMP_L 1K R16 22K ZD1 TZMC5V1

R100 0V~ 4.85V

10K

R223 4.3K

R157 10K

U1

5
OUT1 OUT2 OUT3 OUT4 1 7 8 14 SCART 1_MODE1 SCART 1_MODE2 SCART 2_MODE1 Connector board SCART 2_MODE2 HIGH ACTIVE

[P 3]

R226 6.8K

3.49V R103 10K

1.40V R222 3.9K

SCART2_SWITCH R17 AUD_COMP_R 1K R18 22K ZD4 TZMC5V1 ZD3 TZMC5V1

R2 24 0V~4.85V

10K

11

GND

ZD2 TZMC5V1

3 IN1+ 2 IN15 IN2+ 6 IN210 IN3+ 9 IN312 IN4+ IN413

27/30L03B
CODE: 99.M2675.001

LMV324M

[P 3]

R225 6.8K

LCD03B First issue 04 / 04

VIDEO SIGNAL PROCSSING - TRAITEMENT VIDEO - VIDEO SIGNALVERARBEITUNG - ELABORAZIONE VIDEO - TRATAMIENTO VIDEO
( CONNECTOR BOARD 2/7-27,30)

Connector board
SCART 1_ROUT SCART 1_LOUT

VCC DN8 BAV99

VCC C3 0.1UK

[ P2] [ P2]

R20 R21

0 0 R24 100K R25 C5 100K J6 C6 TP12 TP14 TP17 TP20 TP22 TP24 1 3 5 REVERSE 7 9 11 13 15 17 19 21 ( SCART1) 2 4 6 8 10 12 14 16 18 20 TP25 SCART1_CV BS_IN TP23 R36 0 TZMC5V1 D18 R37 75 SCART1_BLN K [ TP13 R28 TP15 TP16 R30 TP18 R32 CLK_OUT DATA_OUT 0 0 TP19 TP21 SCART1_AL_I N D13 12.4_ TO_ 14.1V 0 SCART1_AR_IN

R19 68K R22 100 R27 68K R29 1K AUD_SCART1_L [ Q1 2N3904 R23 47

L9

1000 OHM R26 75

[ P2] [ P2] [ P2] [ P1]

SCART 1_CV BS_IN

C4 10U 16V

SCART1_CVBS

[ P2]

TZMC5V1 D10

D9

TZMC5V1

1000PJ 1000PJ

[ P2]

SCART1_BLUE_IN

[ P2]
SCART1_AL_I N

R31 R33

1K 1K R34 22K R35 22K D11 TZMC5V1 D12 TZMC5V1

SCART1_SWITCH

P3] P3]

D14

TZMC5V1 D15

[ P2] SCART 1_GREEN_IN


TZMC5V1

[ P2]
SCART1_AR_IN

AUD_SCART 1_R [ D16 TZMC5V1 D17 TZMC5V1

[ P2]

SCART1_RED_IN

P3]
VCC DN9 BAV99

[ P2]

DN10 VCC

[ P2]
BAV99 L11 1000 OHM SCART1_ VIDEO_OUT[P2] VCC C8 0.1U K C9 10U 16V +9V AUD_TV_R AUD_TV_L R44 68K R39 68K R42 100 R46 1K R47 22 + C16 10U 16V Q3 2N3904 R54 R55 1K 68 Q2 2N3904 R4 5

SCART1_BLUE_IN

L10 + 1000 OHM R38 75

C7 10U 16V

SCART1_BLUE [

P3]

VCC DN11 BAV99 CVBS_TV 0

SCART1_R OUT SCART1_LOUT

[ P2] [ P2]

R40 R43 C11 22P K ( open)

470 470 C14 22P K ( open)

+9V

L12 42 OHM

R41 560 + C10 10U 16V

[ P3]
L13 1000 OHM

C12 C13 22P K 22 P K ( open) ( open)

C15 10U 16V SCART1_GREEN

[ P3] [ P3]
R49 470 R146 100 Q4 2N3906

[ P2]

SCART1_GREEN_IN

[ P3]

R48 75

R230 100 ( open) +9V TP29 J7 TP26 1 3 5 7 9 11 13 TP27 2 TP28 4 TP30 6 TP31 8 10 TP32 TP33 12 14 TP34 R229 100 ( open) R50 R51 R52 R53 100 100 0 0 L14 VCC DN 12 BAV99 SCART1_VIDEO_OUT [ 1000 OHM TP120 TP121

TUNER_ DET TUNER_ACK

P2] [ P2]
SCART1_RED_IN L15 1000 OHM R56 75 C17 SCART1_RED

[ P3]

SCL_TV SDA_TV

SCL_5V SDA_5V

[ P2] [ P2]

10U16V

27/30L03B Connector board


Top View (ST 14 13 ) 2 1

LCD03B First issue 04 / 04

VIDEO SIGNAL PROCSSING - TRAITEMENT VIDEO - VIDEO SIGNALVERARBEITUNG - ELABORAZIONE VIDEO - TRATAMIENTO VIDEO
( CONNECTOR BOARD 3/7-30)

SCART BOARD

SCART2_AL_IN

R11

1K D1 TZMC5V1 D2 TZMC5V1

AUD_SCART2_L

SCART2_AR_I N

R13

1K R16 22K R17 22K

AUD_SCART2_R D5 TZMC5V1 D6 TZMC5V1 VCC

SCART2_RO UT SCART2_LOUT

R6 R7

0 0

J1
C3 D3 2 R9 R10 100K 100K 1000PJ C4 1000PJ D4 TP1 TP3 1 3 5 TP6 7 9 TP9 11 13 SCART2_S_C_IN TP11 15 17 TP13 19 21

(SCART2) 2 4 REVERSE 6 8 10 12 14 16 18 20 TP14 SCART2_S_Y_IN SCART2_S_Y_IN L4 1000 OH M TP12 TP2 TP4 TP5 TP7 R14 R15 0 0 TP8 TP10 SCART2_AL_IN SCART2_SWITCH D7 12.4 to 14.1V R12 0 SCART2_AR_I N SCART2_S_C_IN

DN2 BAV99 3 1000 OH M L2 R18 75

TZMC5V1

TZMC5V1

SCART2_S_ C

TZMC5V1 D8

D9

CLK_OUT2 DATA_OUT2

VCC DN4 BAV99 3 1 2

TZMC5V1

SCART2_S_Y R19 75

DN3

VCC BAV99

L3 1000 OH M Sc rew Holes

SCART2_ VD_OUT SCART2_LOUT TP93 TP95 SCART2_RO UT TP97 2 4 6 8 OP2 OP OP3 OP OP4 OP TP99 SCART2_S_Y SCART2_S _C +9V TP101 TP104 10 12 14 16 TP103 18 20 1 3 5 7 9 11 13 15 17 19 TP105 TP98 TP100 TP102 SCART2_VD_ OUT SCART2_SWITCH SCART2_DET VCC TP96 AUD_SCART2_R TP94 AUD_SCART2_L

5 4 3 2 H1

9 8 7 6

5 4 3 2 H2

9 8 7 6

Optical Points OP1 OP

HOLE-V8

HOLE-V8

OP5 OP

OP6 OP

OP7 OP

OP8 OP

R27 0

SCART BOARD 30"

J2

LCD03B First issue 04 / 04

VIDEO SIGNAL PROCSSING - TRAITEMENT VIDEO - VIDEO SIGNALVERARBEITUNG - ELABORAZIONE VIDEO - TRATAMIENTO VIDEO
( CONNECTOR BOARD 4/7-27,30)

V CC_ A VCC_ A PI N59 C5 4 0.1U K C5 5 10U Z C5 6 0.1U K PI N6 9 C5 7 1500 P J C5 8 390P K VCC_ A PI N76 C5 9 1500 P J

R7 5 R7 6 R7 7 R7 8 R7 9 R8 0 C6 0 3.3P C Y1 20.25MHZ C6 4 C6 5 UV 0 UV 1 UV 2 UV 3 UV 4 UV 5 UV 6 UV 7 C6 1 3.3P C V 33D V 33D RN 1 47 0

47 47 47 47 47 (O PEN)

SVVS SV HS S VPEN VF IE LD

[ P3] [ P3] [ P3] [ P3]

5 6 7 8 5 6 7 8
V 33D RN 2 47

4 3 2 1 4 3 2 1

D U V0 D U V1 D U V2 D U V3 D U V4 D U V5 D U V6 D U V7

DUV [0..7] [ P6]

0.047 U K

2
+

10U 16V

ASG F XTAL2 XTAL1 N.C CLK5 VSTBY FPDAT/VSYA VS MSY/H S FSY/HC/HSYA AVO INTLC VSUPSY GNDSY C0 C1 C2 C3 GNDC VSUPC C4 C5 C6 C7

R9 1 75 [ P3] OUT _S_C R9 0 [ P3] OU T_ S_ Y CV BS_VD R 145 75 R9 2 75 R 206 75 C2 21 330P J C7 1 R2 03 75 C7 0 75 R2 01 75 C2 20 330P J

VCC_ A C2 19 330P J C6 8 0 .68U K TP106

64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41

C6 9 0 .68U K 0 .68U K

0 .68U K

B1/CB1IN G1/Y1I N R1/CR1IN B2/CB2IN G2/Y2I N R2/CR2IN ASG F N.C/FFRSTWIN VSUPCAP VSUPD GNDD GNDCAP SCL SDA RESQ TEST VGAV YCOEQ FFIE FFWE FFRSTW FFRE FFOE CLK20

2
C7 4 TP107 [ P3] [ P5] [ P5] [ P5] SCAR T_ TT_BLN K SCART_TEXT_B SCART_TEXT_G SCAR T_TEXT_R L19 L20 3.3N H L21 3.3N H L22 3.3N H 3.3N H R9 5 R9 6 R9 7 R9 8 75 C79 75 C81 75 C83 75 C85

C73 10U 16V 1 0 .047U K +

65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80

GNDF VRT I2CSEL ISGND VSUPF VOUT CI N VIN1 VIN2 VIN3 VIN4 VSUPAI GNDAI VREF FB1IN AISGND

U3 VPC3230D
I 2C : 0X8E

Y0 Y1 Y2 Y3 VSUPY GNDY Y4 Y5 Y6 Y7 GNDLLC VSUPLLC LLC1 LLC2 VSUPPA GNDPA

40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25

Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7

RN 3 5 6 7 8 RN 4 5 6 7 8 R9 3 R9 4

47

4 3 2 1
47

DY DY DY DY DY DY DY DY

0 1 2 3 4 5 6 7

4 3 2 1

DY [0..7]

[ P6]

0 0 (O PEN)

SV CL K

[ P6]

330P J C8 0 330P J C8 2 330P J C8 4 330P J 0 .22U K 0 .22U K 0 .22U K

VPC323 XD V I NB 1 VI NG 1 VI NR1

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

C7 5 1500 P J

C7 6 0.1U K

C7 7 22P J

R9 9 0 (O PEN) VC C R1 04 C8 6 0.22U K C9 0 1500 P J C9 3 390P K R 105 R 106 100 VI DE O_ R ESET [ P3] L23 V CC_ A

[ P1]

CO MP _CBP B

R 207

75

C8 9

0 .22U K

V I NB 2

C8 8 100P K

C9 1 0.1U K

1
+ C9 2 22U 16V

C8 7 47U 16V

BEAD

VC C R5 7 47 0

C2 23 330P J

10 0 10 0

SD A SC L

[ P3] [ P3]

U4 LD1117-3.
VC C

V33 D

VC C Q7 2N3904 [ P1] R2 02 75 C9 4 C 224 330P J R1 56 75 0 .22U K VI NG 2 R1 07 1K

R5 8 SCART 1_BLN K

10 0 1

2N3906 Q8

CO MP _YCY P

DECOE L H
Q10 2N 3904

Y/C Output Disable E nable


C9 5 0.1U K

GND

1 2

VIN

VOUT

2 1
0.1U K + C9 6 47U 16V C9 7 0.1U K C9 8 0.1U K C9 9 0.1U K C 100 0.1U K C 101

PI N1 0

PI N2 9

PI N3 6

R1 67

10K

1
R 109 10K

1K

R1 08

DECOE

[ P3]

R1 69 10K

[ P1]

CO MP _CRP R

R2 05 75

C1 02 C2 25 330P J

0.22U K

VI NR2

+9V VC C

Q6 2N3904

CONNECTOR BOARD

S CAR T_ FB_EN

R2 15

1 2

Q5 2N3904 R 216 15 0

C1 25 0.1U K

D2 1 1N4148

SEL FBI1 FBI2 VIA1 VIA2 VIB1 VIB2

TT_BLN K SCART 1_BLU E TE XT _B SCAR T 1_G R EEN TE XT _G S CAR T 1_RED TE XT_R R2 18 0 (o pen) R2 19 10 0 R 220 100

C2 5 C2 6 C2 8 C4 3 C4 5 C4 7 R 221 10 0

0 .1U K 0 .1U K 0 .1U K 0 .1U K 0 .1U K 0 .1U K

15 14 2 6 3 7 4 8

VP

FBO VO A VO B VO C

13 12 11 10 16
R 217 0

C 126 10U 16V

SCAR T_ TT_BLN K SCART_TEXT_B SCART_TEXT_G SCAR T_TEXT_R

U1 TDA8601T

LCD03B First issue 04 / 04

GN D

VIC1 VIC2

IOCNR

PI N4 5

VIDEO SIGNAL PROCSSING - TRAITEMENT VIDEO - VIDEO SIGNALVERARBEITUNG - ELABORAZIONE VIDEO - TRATAMIENTO VIDEO
( CONNECTOR BOARD 5/7-27,30)

+2. 5V +3.3VDA C C103 R110 4.7K R111 4.7K 0 R112 NC_R0603 R113 0 R114 NC_R0603 R115 R116 0 0 R148 ( open) 0 R149 ( open) 0 R150 ( open) C 104 0.1U K +2.5VDA C 0.1U K C105 +3.3VDA C 0.1U K EE _SCL EE _SDA +3.3VDA C C106 0.1U K C107 0.1U K +2.5VDA C +2. 5V

U5
1 2 3 4 NC NC NC GND VCC WP SCL SDA 8 7 6 5

U6
R118 R120 0 0

+3.3VDA C LA NG 3 LA NG 2 TP 11 7 TP 11 8 LC B IN FO LIST I2C_ EN RG B_GAIN TP 11 9 R227 R204 R117 R119 R121 R122 R123 R228 0 (o pen) 0 (o pen) NC_R0603 0 NC_R0603 0 NC_R0603 0 (o pen)

AT24C02

C108

0.1U K

[ P3] SCL [ P3] SDA

0 R142 NC_R0603

6M HZ C 109 33 PJ C 110 33 P J

RED

SDA555xFL I2C : 0X60

+ C111 10 U 16V

AUDIO_RE SET [ P4] [ P4] SVVS SVHS R143 R147 0 0

U8
VCC

(Byp ass Group Delay Circuit)


+3.3VDA C L24 + C 113 47U 16V C 115 0.1U K + C 116 10U 16V R8 5 27 0 R8 9 47 0 +2.5VDA C +2. 5V L25 BEAD + C 117 47U M 16V C 120 0.1U K BEAD +3. 3V C6 2 180P J Q9 2N3904

+9V R8 1 56 0

LD1117-3.3
3
C 114 0.1U K

VIN GND

VOUT

R8 2 6.8K

C6 3 R200 C2 3 2.2K 1 100P K +

1
R8 3 3.3K R8 6 47 0

CVBS_V D

22 U 25V

VCC

LM 317M
3 VIN GND VOUT 2
C 119 0.1U K

U9

( open)

R151 681F

R152 681F

+3.3VDA C PI N1 1 P IN30 C 122 0.1U K PI N4 4 C 123 0.1U K C 124 0.1U K

LCD03B First issue 04 / 04

C 121 10U 16V

C 118 10U 16V

C6 7 82 P J

ONNECTOR BOARD

R137 R139

0 0

GRE EN R140 10K

TP 10 8

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 VDD 2.5 VSS VDD 3.3 CVBS VDDA 2.5 VSSA P2.0 P2.1 P2.2 P2.3 HS/SSC VS P3.0 P3.1 P3.2 P3.3 P3.4 P3.5

P1.7 P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P1.0 VDD 3.3 VSS VDD 2.5 BLANK/COR B G R VDDA 2.5 VSSA XTAL1 XTAL2 RSTP4.3 P4.2 VDD 3.3 VSS P3.7 P3.6

52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27

+3. 3V

LA NG 1

TT_FSB TT_ B TT _G TT_R

R128 R129 R131 R133

0 0 0 0

FS B BLUE GRE EN RED

R124 22 0

R125 68 Q11 2N3904

R126 68

R127 68

1 2

R132 R134 33 0

47

TT_BLNK

[ P3]

R135 2N3906 Q12 R136 2N3906 Q13 2N3906 Q14 R141

10 10 10

TEX T_ B TEX T_ G TE XT _R

[ P3] [ P3] [ P3]

TT_ RSTn R138

+3. 3V Y2

BLUE

VIDEO SIGNAL PROCSSING - TRAITEMENT VIDEO - VIDEO SIGNALVERARBEITUNG - ELABORAZIONE VIDEO - TRATAMIENTO VIDEO
( CONNECTOR BOARD 6/7-27,30)

U11A
1 2 3 4 6 7 8 9
DY[0..7 ] P4 DY DY DY DY DY DY DY DY 0 1 2 3 4 5 6 7

[ P3] VG[0 ..7] RN 13 47

VDDQ VDDQ VDDQ VDDQ VD D VD D VD D

VB0 VB1 VB2 VB3 VB4 VB5 VB6 VB7 VG0 VG1 VG2 VG3 VG4 VG5 VG6 VG7 VR0 VR1 VR2 VR3 VR4 VR5 VR6 VR7 SVHS SVVS SVCLK PVCLK CREF PVVS PVHS DGB0 DGB1 DGB2 DGB3 DGB4 DGB5 DGB6 DGB7 DGG0 DGG1 DGG2 DGG3 DGG4 DGG5 DGG6 DGG7 DGR0 DGR1 DGR2 DGR3 DGR4 DGR5 DGR6 DGR7 DGHS DGVS DGCLK

DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 DG0 DG1 DG2 DG3 DG4 DG5 DG6 DG7 DR0 DR1 DR2 DR3 DR4 DR5 DR6 DR7 DCLK DVS DHS DEN DENG DENB DENR ADR ADG ADB VREFIN VREFOU T RSET COMP MVE CGMS TESTCLK

110 111 113 114 116 117 118 119 121 122 124 125 127 128 129 130 132 133 135 136 138 139 141 142 102 103 104 145 106 107 108 156 153 150
YC LK YV S YH S YE N Y PEN

4 3 2 1 4 3 2 1 4 3 2 1 4 3 2 1 4 3 2 1 4 3 2 1

47 RN 11 47 RN 12 5 6 7 8 5 6 7 8

VB0 VB1 VB2 VB3 VB4 VB5 VB6 VB7 VG0 VG1 VG2 VG3 VG4 VG5 VG6 VG7 VR 0 VR 1 VR 2 VR 3 VR 4 VR 5 VR 6 VR 7

VB[0 ..7] [ P3]

U11B
19 49 77 112 134 187 219 251 10 24 39 46 57 65 74 85 96 105 115 126 137 147 171 189 193 202 212 222 228 233 240 246 253 196 198 59 61 148 164 167 Vss Vss Vss Vss Vss Vss Vss Vss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss DPAVss DPDVss MPDVss MPAVss ADDVss ADAVss ADGVss AVS33B AVS33G AVS33R VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd DPAVdd DPDVdd MPDVdd MPAVdd ADDVdd ADAVdd ADGVdd AVD33B AVD33G AVD33R 5 34 93 123 140 175 205 235 14 29 42 54 64 69 80 90 101 109 120 131 143 165 180 200 208 216 224 230 237 243 249 256 197 199 58 60 149 163 166 151 154 157

P2P5V RAM A0 RAM A1 RAM A2 RAM A3 RAM A4 RAM A5 RAM A6 RAM A7 RAM A8 RAM A9 RA MA10 RA MA11 RA MA12 RA MA13

U11C
213 210 207 204 203 206 209 211 214 217 215 220 221 218 MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MA12 MA13 MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 mRASn mCASn mWEn 255 252 248 245 242 239 236 232 231 234 238 241 244 247 250 254 225 226 227
RAM D0 RAM D1 RAM D2 RAM D3 RAM D4 RAM D5 RAM D6 RAM D7 RAM D8 RAM D9 RAMD 10 RAMD 11 RAMD 12 RAMD 13 RAMD 14 RAMD 15 RN5 R154 RC LK R155 0 0

HY57V641620HGT-6
4M*1 6 SDRAM

P3P3V

U10
RA MA11 RA MA10 RAM A9 RAM A8 RAM A7 RAM A6 RAM A5 RAM A4 RAM A3 RAM A2 RAM A1 RAM A0 RA MA12 RA MA13 R153 P3P3V RC LK P3P3V RR ASn RC ASn RW En 1K

49 43 9 3 27 14 1

P3P3V

15 16 17 18 20 21 22 23 30 31 32 33 35 36 37 38 11 12 13 25 26 27 28 70 71 72 73 75 76 78 79 81 82 83 84 86 87 88 89 91 92 94 95 97 98 99 100 66 67 68

5 6 7 8 5 6 7 8 5 6 7 8 5 6 7 8

RN 14 47 VR [0..7] RN 15 47 [P 3]

DU V[0..7 ] P4

DU V0 DU V1 DU V2 DU V3 DU V4 DU V5 DU V6 DU V7

223 229

MCLKFB MCLK

4 3 2 1
47

5 RR ASn 6 RC ASn 7 RW En 8

35 22 34 33 32 31 30 29 26 25 24 23 20 21 19 38 37 18 17 16 39 15

A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 BA0 BA1 CS CLK CKE RAS CAS WE

PW1230
P3P3V R158 R159 R160 R161 R162 AV DD2 AV DD1 AV D2 5 Y3 AV D3 3 R170 C135 18 P J 2M C136 18 P J DI_RE SET 10M HZ P3 SCL P3 SDA R163 R164 R165 R166 0 0 10K 10K 10K 10K 10K 0 0

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

53 51 50 48 47 45 44 42 13 11 10 8 7 5 4 2 40 36

RAMD 15 RAMD 14 RAMD 13 RAMD 12 RAMD 11 RAMD 10 RAM D9 RAM D8 RAM D7 RAM D6 RAM D5 RAM D4 RAM D3 RAM D2 RAM D1 RAM D0

RN 16 47 P3 VCLK P3 VVS P3 VHS DEC OE P3 VPEN P3

L36 70 OHM SVHS SVVS SVC LK SVC LK SVPE N SVVS SVHS R208 R209 R210 TP 11 4 TP 11 5 R211 TP 11 1 TP 11 2 TP 11 3 C226 0.01U K 27 0 0.01U K 47 47 47 47

U11D
48 50 51 52 53 43 44 45 47 40 41 56 55 TDO TCK TDI TMS TRSTN I2CA1 I2CA2 SCL SDA XTALI XTALO TEST RESETn MCUA0 MCUA1 MCUA2 MCUA3 MCUA4 MCUA5 MCUA6 MCUA7 MCUD0 MCUD1 MCUD2 MCUD3 MCUD4 MCUD5 MCUD6 MCUD7 MCUCS MCUWR MCUCMD MCURDY 168 169 170 172 173 174 176 177 178 179 181 182 183 184 185 186 190 191 192 188

NC/RFU NC

161 162 159 160 201 146 144

6 12 46 52 28 41 54

VSSQ VSSQ VSSQ VSSQ VSS VSS VSS

P4

UDQM LDQM

P3P3V

R212 C227 C228 2 R213 R214

AV D3 3 P3P3V

1 10 U 0 16V 0 TP 11 6

152 155 158

C 127 0.1U K

C 128 0.1U K

C 129 0.1U K

C 130 0.1U K

C 131 0.1U K

C 132 0.1U K

C 133 0.1U K

C139 + 22U 16V

C140

C141

1
+ C 137 10U 16V

PW1230
DY 0 DY 1 DY 2 DY 3 DY 4 DY 5 DY 6 DY 7 DU V0 DU V1 DU V2 DU V3 DU V4 DU V5 DU V6 DU V7 RN7 RN8 4 3 2 1 4 3 2 1 4 3 2 1 4 3 2 1 RN9 RN 10 47 47 5 6 7 8 5 6 7 8 5 6 7 8 5 6 7 8 47 47 ( open) ( open) VG0 VG1 VG2 VG3 VG4 VG5 VG6 VG7 VB0 VB1 VB2 VB3 VB4 VB5 VB6 VB7 ( open) ( open) P3

PW1230
I2C : 0X64

VIDE O_RESET

R168

V33 D P2P5V L28 AV D2 5 42 OHM

L27

P3P3V

42 OHM

PW1230
[ P4] [ P4] [ P4] [ P4] SVC LK SVPE N SVVS SVHS

RN6 SV CL K 4 SV PEN 3 SVVS 2 SVHS 1

47 ( open) 5 VCLK 6 VPEN 7 VVS 8 VHS P2P5V

[ P3] VCL K [ P3] VPEN [ P3] VVS [ P3] VH S

P3P3V

L29 AV D3 3 42 OHM C 143 0.1U K C144 0.01U K VCC

U12 LM317M
VIN GND VOU T 1

0.1U K 0.01U K

C 138 0.1U K

P2P5V

2
R171 681F + C 142 47U 16V

C 229 0.1U K

C 230 0.1U K

C 231 0.1U K

C 232 0.1U K

C 234 0.1U K

C 235 0.1U K

C 236 0.1U K

C 237 0.1U K P3P3V

P2P5V L30 AV DD2 42 OHM C 152 0.1U K L31 AV DD1 42 OHM C164 0.01U K C153 0.01U K

C 145 0.1U K

C 146 0.1U K

R172 681F

C 238 0.1U K

C 239 0.1U K

C 240 0.1U K

C 241 0.1U K

C 242 0.1U K

C 243 0.1U K

C 244 0.1U K

C 245 0.1U K

C 246 0.1U K

C 247 0.1U K

C 248 0.1U K

C 249 0.1U K

C 250 0.1U K

C 251 0.1U K

C 147 10U 16V

C ONNECTOR BOARD

C 252 0.1U K

C 253 0.1U K

C 254 0.1U K

C 255 0.1U K

C 256 0.1U K

C 257 0.1U K

C 258 0.1U K

C 259 0.1U K

C 260 0.1U K

C 261 0.1U K

C 163 0.1U K

LCD03B First issue 04 / 04

VIDEO SIGNAL PROCSSING - TRAITEMENT VIDEO - VIDEO SIGNALVERARBEITUNG - ELABORAZIONE VIDEO - TRATAMIENTO VIDEO
( CONNECTOR BOARD 7/7-27,30)

NOTE:I2C ADDRESS SELECT


C 165 3.3P C R1 73 10 R 174 OP EN Y4 18.432MHZ R 175 4.7K R 176 4.7K C 166 3.3P C C1 67 56 P J VC C

L32 42 OH M

1
+ TP109 TP110 C 171 56P J C 172 56P J C 168 100U 16V

C 169 470P K

C 170 1.5N M

61

60

59

58

57

64

63

62

56

55

54

53

51

52

NC

STANDBYQ

ADR_SEL

NC

D_CTR_I/O_0

D_CTR_I/O_1

NC

AUD_CL_OUT

TP

XTAL_OUT

XTAL_IN

ANA_IN-

ANA2_IN+

ANA1_IN+

TESTEN

50

[ P3] [ P3]

SCL_5V SDA_5V

R1 77 R1 78

10 0 10 0 C1 74 100P K C1 75

1 2 3 4
100P K

I2C_CLK I2C_SDA I2S_SL I2S_WS I2S_DA_OUT I2S_DA_IN1 ADR_DA ADR_WS ADR_CL DVSUP DVSS I2S_DA_IN2 NC NC NC RESETQ

AVSUP AVSS MONO_IN VREFTOP

49 48 47 46 45 44 43 42 41 40 39 38 37 36
C1 89C 190 C1 91 330 P J C 192 330 P J C 209 330 P J C2 15 330 P J C 193 330 P J C 194 330 P J L35 C 1813 30N Z C1 82 C1 87 C1 88 3 30N Z 3 30N Z 3 30N Z R 183 R 184 R 185 R 186 47 0 47 0 47 0 47 0 C1 79 C1 80 3 30N Z 3 30N Z R 181 R 182 47 0 47 0 C1 77 C1 78 3 30N Z 3 30N Z R 179 R 180 47 0 47 0 [ P3] AUD_ MU X_ R [ P3] A UD_ MU X_L A UD_PC_R A UD_ PC_L [ P3] [ P3] [ P3] [ P3] [ P3] [ P3] C 173 10U 1 C1 76 + 25V 2

0.1U K

5
VCC L33 42 OH M

SC1_IN_R SC1_IN_L
U1 3

6 7 8 9 10

ASG1 SC2_IN_R

MS P3412G

SC2_IN_L ASG2 SC3_IN_R SC3_IN_L ASG4 SC4_IN_R SC4_IN_L AGNDC

AUD_ CO MP _R A UD_CO MP _L

11
+ C1 83 C 184 100 U 16V 1.5N M C1 85 220P Z 470P K C 186

12 13 14 15 16

VC C R 187 4.7K D1 9 [ P3] A UDI O_RESET 1N4148 + C 196 22U 10V

AUD_SC ART 2_R AU D_SCART 2_L

35
330 P J

34 33

C 195

0.1U K

[ P3] A UDI O_ R_EAR C 197 1U Z

SC2_OUT_R

SC2_OUT_L

SC1_OUT_L

DACM_SUB

17

SC1_OUT_R

DACM_R

DACM_C

DACM_S

DACM_L

AHVSUP

VREF2

VREF1

C 199 330P J [ P3] AUDI O _L_ EAR C2 03 C 204 330P J 1U Z

CAPL_M

DACA_L

CAPL_A

DACA_R

AHVSS

1
C1 98

2
35V

330 P J

80 OH M

3.3U

470P K

C2 05 [ P3] [ P3] AU DI O_ R_ Ou t A UDI O _L_O ut

10U +

25V R 188 R 189 + 47 0 47 0 47 0 47 0 C 211 C 213 C 210 C2 12 C2 14 10 00P J 10 00P J 10 00P J 10 00P J 10 00P J R1 92 R1 95 R 196 R1 97 22 0 22 0 22 0 22 0

C 206 2

10U 25V 1 +

C2 07

10U 25V

R 190 R 191

C 208 10U 25V 2 1 +

R1 93

R 194

A UDI O _L_Li ne A UDI O_ R_ Line C2 16 2 10U 25V 1 C2 17 10U 25V 2 1 +

[ P1] [ P1] [ P3] [ P3]

10K

10K

SCART 2_LO UT SC ART 2_R OU T

R1 98 22 0

Optic al Points

OP 1 OP C 218 1 10U 25V 2 SUBW OOF ER_SPAR E R 199 10K +

OP2 OP

OP 3 OP

OP 8 OP

OP9 OP

OP10 OP

Screw Hol es

5 4 3 2
H1

9 8 7 6

5 4 3 2
H2

9 8 7 6

5 4 3 2
H3

9 8 7 6

5 4 3 2
H4

9 8 7 6

5 4 3 2
H5

9 8 7 6 1 1 1 1
H6 HO LE_0 H7 HO LE_0 H8 HO LE_0 H9 HO LE_0 CONNECTOR BOARD

HO LE-V 8

HO LE-V 8

HO LE-V 8

HO LE-V 8

HO LE-V 8

LCD03B First issue 04 / 04

C 200 1.5N M

C2 01

C7 2 100 U 16V

C7 8 100 U 16V

C1 12 100 U 16V

C1 50 100 U 16V

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

+9V D2 0 L34 2 42 OH M 1N4148

OP4 OP

OP 5 OP

OP6 OP

OP 7 OP

OP1 1 OP

OP12 OP

OP1 3 OP

OP 14 OP

OP1 5 OP

OP16 OP

TUNER SCHEMATIC DIAGRAM - SCHEMA TUNER - SCHALTBILD TUNER - SCHEMA DELLA SINTONIZZATORE - ESQUEMA SINTONIZADOR
( TUNER / POWER IN 20 BI)

VSYN C 1 +5V +5V C7 2 10uF C4 10uF D 7 8 9 10 11 12 13 14 15 16 17 C3 D 6 5 4 3 2 1 44 43 42 41 40 0.1uF U1 T1 T2 U7 C1 NC NC +5V(TUNER) SC L SCL SDA AS AF right AF left IRIN +5V R1 6 R1 7 R1 8 R1 9 R3 7 4.7K 4.7K 4.7K 4.7K 4.7K SCL SDA SCL 1 1,2 SDA1 1,2 RST 2 RST 2 SDA +5V(IF) VSYN C 1 AF 2nd IF CVBS 1 2 3 4 5 C5 MTV312M 18 19 20 21 22 23 24 25 26 27 28 6 A 9 10 11 12 13 14 A FQ1216ME/I H-3 VDD D2 1 +9V 1 L2 1 2 2 H + C1 2 470uF L3 BEAD 70ohm 2012 D +9V J1 1 3 5 7 9 11 13 R5 1 R5 0 0 0 D CON14A P 2 4 6 8 10 12 14 TV_COMP_OUT AUDIO_ R AUDIO_ L IRIN SCL SDA 1 2 2 R2 6 0 1,2 1,2 SCL 1 SDA1 6 5 1 2 3 U4 SCL SDA WP A0 A1 A2 AT24C08 D VSS 4 A A A 7 VCC 8 C2 0 0.1uF A A +5V C1 6 100pF R2 4 130K 1 VSYN C 1 HSYN C 1 2 3 4 U3 A H_OSC HD SYNCOUT VD BA7046 P_COM P VCC VIN GN D 8 7 6 5 R44 470K C17 1uF R43 C5 8 C1 9 1000pF 1uF A + 470 + TV_VIDEO R25 10K C1 8 2200P C1 5 0.1uF 2 C1 1 100uF R2 2 2R2 ,1W,2512 1 IN GN D OUT 3 inductor 10uH C2 7 + C1 3 0.1uF A C1 4 R23 470K 0.1uF 0.1uF C7 5 100uF +5V A C5 7 47uF R2 1 C1 0 NC 0.1uF POWER COIL 100U SM4001 2 U2 LM78L05 +5V +5V FB2 C9 47uF R20 510 TV_AUDI O 2 R1 5 0 TV_VIDEO 1 R8 Q1 NC NC A FM_R FM_L SIF 2 2 2 A +5V C2 1 R4 NC NC A TV_COMP_OUT 1 A 20pF C6 20pF 100uF C2 0.1uF A C8 0 0.1uF A R2 R3 33 33 SCL 1 SDA 1 1,2 1,2 + F CONNECTOR FB 1 inductor 10uH HSYN C 1 F1 +5V

NC NC VDD3 DA0/P5. 0 DA1/P5. 1 DA2/P5. 2 VSYN C HSYN C P5.3 P5.4 P5.5

R1 10K 1,2 1,2 SDA1 SCL 1

Y1 12MHz C7 20pF D C8 20pF D D

SC-OUT- R SC-OUT-L

R5 2 R5 3

NC NC

LCD03B First issue 10 / 03

P1.1 P3.2/INT0 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 P6.1/AD1 P6.0/AD0 SDA

RST VDD P6.3/AD3 VSS X2 X1 ISDA/P3.4/T 0 ISCL/P3.5/T1 STOUT/P4. 2 P6.2 P1.0

DA8 DA9 P4.1 P4.0 DA7 DA6/P5. 6 P6.7 P6.6 P6.5 P6.4 SCL

39 38 37 36 35 34 33 32 31 30 29

FM IN

TV IN

TUNER SCHEMATIC DIAGRAM - SCHEMA TUNER - SCHALTBILD TUNER - SCHEMA DELLA SINTONIZZATORE - ESQUEMA SINTONIZADOR
( TUNER / SOUND PROCESSOR 20 BI )

Y2 C2 3 3.3pF VCCSI F A 18.432MHz DI P MSPX 2 MSPX1 A C2 4 3.3pF

R4 2 12K

R3 8 470 BPF7 3 Q2 C28 BC848B SOT23 56pF ANAIN A C26 56pF ANAIN 1

C5 0 SIF 1nF BPF1

R3 9 330

C5 1 BPF2 910pF L8 1uH 1008 A C5 2 3.9nF BPF3

C5 3 BPF4 860pF L9 1uH 1008 A

C5 4 BPF5 10nF R4 0 3.9K BPF6 R4 1 100 U6

64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49

NC STANDBYQ ADR-SEL D-CTR-I/O 0 D-CTR-I/O 1 NC NC AUD-CL-OUT TP XTAL_OUT XTAL_I N TESTEN ANA-IN2+ ANA-IN ANA-IN1+ AVSUP

1,2 1,2

SCL 1 SDA1

VCCAUDIOD C3 5 10uF D RST D RESET# D D C3 6 1.5nF C3 7 470pF C3 8 220pF D

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

I2C-CL I2C-DA I2S-CL I2S-WS I2S-DA-OUT I2S-DA-IN 1 ADR-DA ADR-WS ADR-CL DVSUP DVSS I2S-DA-IN 2 NC NC NC RESET Q

DACA- R DACA- L VREF 2 DACM- R DACM- L NC DACM-SUB NC SC2-OUT- R SC2-OUT- L VREF 1 SC1-OUT- R SC1-OUT- L CAPL-A AHVSUP CAPL-M

+8VOP

17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

U9 AUDIO_ R C22 + 2 3 4 A A A R5 5 N C B6 L5 +5V 2.7uH L7 2.7uH L10 BEAD 70ohm VCCAUDIOA VCCAUDIOD VCCSI F VDD C6 1 + 10uF A C6 0 0.1uF BEAD 70ohm B7 BEAD 70ohm C6 2 + 10uF C6 3 0.1uF A VCCAUDIOAH +8VO P C7 0 NC + SC-OUT-R 10uF 1 OUT A INAINA+ GN D LM358 VCC OUT B INBINB+ 8 7 6 5 C25 + 10uF R5 6 AUD_ L AUD_ L 100K DACML C4 7 1nF R5 4 N C C6 9 NC AUD_ R DACMR C4 9 R5 7 100K A AUD_ R AUDIO_ L A 1nF CAPL A + C45 10uF A A A A C4 2 470pF C4 3 1.5nF + C4 4 10uF

LCD03B First issue 10 / 03

D VCCAUDIOA C2 9 470pF A C3 0 1.5nF A + C3 1 10uF A TV_AUDI O MSP3415G PLQFP64 AVSS MONO-IN VREFTOP SC1-IN-R SC1-IN-L ASG SC2-IN-R SC2-IN-L ASG SC3-IN-R SC3-IN-L ASG SC4-IN-R SC4-IN-L AGNDC AHVSS 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 C55 C56 MONOI N VREFTO P 330nF 330nF C32 FM_R FM_L 330nF C3 3 10uF A + C3 4 0.1uF A AGNDC + A C4 0 0.1uF A C4 1 CAPLM + 10uF VCCAUDIOAH A C3 9 3.3uF SC-OUT-L

INTEGRATED CIRCUITS BLOCK DIAGRAM

PortC PortB PortA (7:0) (7:0) (7:0)

JTAG Debugger

A D CS (19:1) (15:0) (1:0)

NMI

TxD RxD

GPIO

PWM

IR Decoder

2-Wire Serial

16-Bit Microprocessor

Processor ROM RAM Interface

Wtchdog Timers

Interrupt Controller

UART

Processor Memory Interface VYUV (7:0) YUV to RGB YPbPr to RGB Memory Buffer Graphic or Video Port Pixel Processing Scaler

OnScreen Display

Microprocessor BUS OSD and Gain Color LooKup Tables Color Space Expander Display Timing Generator DRGB (23:0) DRGB (23:0) DVS,DHS DEN,DCLK

Color Matrix

GRGB (23:0) GVS GHS GCLK VVS VHS VCLK

Reset Sync Decoder And Timer Auto Image Optimisation Power On Reset

MCLK DCLK UCLK PLL and Oscillator X1 X0

PW113 Image Processor Internal Block Diagram

GREF GFBK

Reset

Input Unit Premary Video Port ITU-R BT 601 Secondary Video Port ITU-R BT 6656

Video Unit

Motion Detection & Noise Reduction

Memory Unit Film-Mode Detection (3:2&2:2) Previous Video I-Channel P-Channel Premary Picture (l/P)

Display Unit

Display Timing

I-Channel

Deinterlacer P-Channel RGB Video Enhancement YUV Up Scaler

Digital Output Timing

Digital Graphic Port 24-Bit

Down Scaler

CSC Two-Wire Interface Proramming Unit Analog Output Digital Output Data

PW1230 Interna Block Diagram

Color Lut

Blue Screen

VSync/ HSync DACs Timing

LCD03B First issue 04 / 04

63

INTEGRATED CIRCUITS BLOCK DIAGRAM


A { 16 to A20 }

PSEN RD WR

SDA55XX

A { 0 to 15 } D { 0 to 7 } ALE

Analog / MUX ADC ADC

Slicer RAM 256x8 ADC Interface Memory Extension STACK 128x8 Memory Extension / Unit Counter 0 CORE Counter 1 Interrupt Contoller BUS Arbiter

Acquisition PROGRAM ROM 128K x8 Acquisition Interface

WDT Capture Control PWM P { 0 to 04} Port Logic

XRAM SRAM 16K x8bit

Peripheral BUS Interface

Caracter ROM

UART RAM / ROM Interface SFRs CLOCK & Sync System Display Logic DISPLAY GENERATOR Display REGs CLUT FIFO DAC's R G B

16K x8bit H V

BLANK / COR

CIN VIN1 VIN2 VIN3 VIN4 VOUT

71 72 73 74 75 70 AGC 2 x ADC NTSC PAL Analog Front-end Adaptive Comb Filter Color Decoder NTSC PAL SECAM Saturation Tint
Y

Mixer

2D Scaler PIP

Output Formatter ITU-R 656 ITU-R 601 Memory Control

31...34 37...40 41...44 47...50 18 19...23

Y OUT CrCb OUT YCOE FIFO CNTL

Cr

Cr Panorama

Cb

Mode Peacking Cb Contrast Brightness

RGB/ YCrCb FB RGB/ YCrCb

1..3 79 4..6

Processing Y Analog Component U/B Cr Matrix Front-End Contrast V/R Saturation Cb 4 x ADC FB Brightness FB Tint

Y/G

VPC3230
I2C Bus Sync + Clock Generation

27,28 56 57 54 13,14

LLClock H Sync V Sync AVO

Clock Gen. 62 63

20.25 MHz I2C Bus

AD9883A
54

R AIN

CLAMP

A/D

8 70...77

R OUTA

G AIN

48

CLAMP

A/D

2...9

G OUTA

43

B AIN

CLAMP

A/D

8 12...19
37

B OUTA MIDSCV DTACK HSOUT VSOUT SOGOUT

HSYNC CO AST CLAMP FILT

30 29 38 33

67

SYNC PROCESSING AND CLOCK GENERATIO N

66 64 65

SCL SD A A0

56 57 55

REF SERIAL REGISTER AND POWER MANAGEMENT

58

REF BYPASS

AD9883A

64

LCD03B First issue 04 / 04

This technical documentation is for use by maintenance technicians only Documentation technique exclusivement destine aux professionnels de la maintenance Diese Angaben und Hinweise sind ausschlielich fr den Service des Fachhndlers bestimmt Documentazione tecnica destinata esclusivamente ai tecnici dell'assistenza Documentacin tcnica destinada exclusivamente a los profesionales de mantenimiento

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The description and characteristics given here are of informative significance only, and non committal. To keep up the high quality of our products, we reserve the right to make any changes or improvement without previous notice. Les descriptions et caractristiques figurant sur ce document sont donnes titre d'information et non d'engagement. En effet, soucieux de la qualit de nos produits, nous nous rservons le droit d'effectuer, sans pravis, toute modification ou amlioration. Die Beschreibungen und Daten in dieser Anleitung dienen nur zur Information und sind nicht bindend. Um die Qualitt unserer Produkte stndig zu verbessern, behalten wir uns das Recht auf nderungen vor. Le descrizioni e le caratteristiche date su questo documento sono fornite a semplice titolo informativo e senza impegno. Ci riserviamo il diritto di eseguire, senza preavviso, qualsiasi modifica o miglioramento. Las descripciones y caractersticas que figuran en este documento se dan a ttulo de informacin y no de compromiso. En efecto, en bien de la calidad de nuestros productos, nos reservamos el derecho de efectuar, sin previo aviso, cualquier modificacin o mejora.

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