LG GU230 Dimsun Service Manual

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Internal Use Only
Service Manual
GU230
Date: Oct, 2009 / Issue 1.0
- -
Copyright 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Table Of Contents
1. Introduction ................................................... 5
1.1 Purpose ......................................................................5
1.2 Regulatory Information .................................................5
1. Abbreviation ................................................................7
2. System Specifcation ..................................... 9
2.1 H/W Features ..............................................................9
2.2 Technical Specifcation ...............................................11
3. Technical brief ............................................. 16
.1 Digital Main Processor ...............................................16
.2 Power Management ..................................................21
. FEM with integrated Power Amplifer Module
(SKY77547, U04) .................................................... 5
.4 Crystal(26 MHz, X101) ...............................................8
.5 RF Subsystem of PMB8810 (U102) ............................9
.6 MEMORY(PF8F5060M0Y0BE, U101) ........................44
.7 BT Module ................................................................46
.8 SIM Card Interface .....................................................48
.9 LCD Interface ............................................................49
.10 Battery Charger Interface .........................................52
.11 Keypad Interface .....................................................5
.12 Audio Front-End ......................................................55
.1 Camera Interface(1.M Fixed Focus Camera) ............61
.14 KEY BACLKLIGHT LED Interface ................................6
.15 Vibrator Interface .....................................................64
.16 Slide SW Interface ...................................................65
4. Trouble Shooting .......................................... 66
4.1 RF Component ..........................................................66
4.2 RX Trouble ................................................................67
4. TX Trouble .................................................................72
4.4 Power On Trouble ......................................................77
4.5 Charging Trouble .......................................................80
4.6 Vibrator Trouble .........................................................82
4.7 LCD Trouble ..............................................................84
4.8 Camera Trouble .........................................................88
4.9 Speaker Trouble ........................................................92
4.10 Earphone Trouble .....................................................95
4.11 Receiver Trouble ......................................................98
4.12 Microphone Trouble ...............................................101
4.1 SIM Card Interface Trouble .....................................10
4.14 KEY backlight Trouble ............................................105
4.15 Micro SD Trouble ...................................................108
4.16 Bluetooth Trouble ...................................................110
4.17 FM Radio Trouble ...................................................112
4.18 Slide on/off Trouble ................................................118
5. Download ................................................... 116
6. Block diagram ............................................ 122
7. Circuit Diagram .......................................... 123
8. BGA Pin Map .............................................. 129
9. PCB Layout ................................................. 131
10. Engineering mode .................................... 137
11. Stand Alone Test ...................................... 138
12 Auto Calibration ........................................ 143
13. Exploded view & Replacement part list . 149
1.1 Exploded view .......................................................149
1.2 Replacement Parts ................................................151
1. Accessory .............................................................
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LGE Internal Use Only Copyright 2009 LG Electronics. Inc. All right reserved.
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1. Introduction
1. Introduction
\VX\_

1.1 Purpose
This manual provides the information necessary to repair, calibration, description and download the
features of this model.
1.2 Regulatory Information
A. Security
Toll fraud, the unauthorized use of telecommunications system by an unauthorized part (for example,
persons other than your companys employees, agents, subcontractors, or person working on your
companys behalf) can result in substantial additional charges for your telecommunications services.
System users are responsible for the security of own system. There are may be risks of toll fraud
associated with your telecommunications system. System users are responsible for programming
and configuring the equipment to prevent unauthorized use. The manufacturer does not warrant that
this product is immune from the above case but will prevent unauthorized use of common-carrier
telecommunication service of facilities accessed through or connected to it.
The manufacturer will not be responsible for any charges that result from such unauthorized use.
B. Incidence of Harm
If a telephone company determines that the equipment provided to customer is faulty and possibly
causing harm or interruption in service to the telephone network, it should disconnect telephone
service until repair can be done. A telephone company may temporarily disconnect service as long
as repair is not done.
C. Changes in Service
A local telephone company may make changes in its communications facilities or procedure. If these
changes could reasonably be expected to affect the use of the this phone or compatibility with the
network, the telephone company is required to give advanced written notice to the user, allowing the
user to take appropriate steps to maintain telephone service.
D. Maintenance Limitations
Maintenance limitations on this model must be performed only by the manufacturer or its authorized
agent. The user may not make any changes and/or repairs expect as specifically noted in this
manual. Therefore, note that unauthorized alternations or repair may affect the regulatory status of
the system and may void any remaining warranty.
1. INTRODUCTION
1. INTRODUCTION
- 6 -
1. Introduction
]VX\_

E. Notice of Radiated Emissions

This model complies with rules regarding radiation and radio frequency emission as defined by
local regulatory agencies. In accordance with these agencies, you may be required to provide
information such as the following to the end user.
F. Pictures
The pictures in this manual are for illustrative purposes only; your actual hardware may look
slightly different.
G. Interference and Attenuation
Phone may interfere with sensitive laboratory equipment, medical equipment, etc. Interference
from unsuppressed engines or electric motors may cause problems.
H. Electrostatic Sensitive Devices
ATTENTION
Boards, which contain Electrostatic Sensitive Device (ESD), are indicated
by the sign. Following information is ESD handling:
Service personnel should ground themselves by using a wrist strap when exchange system
boards.
When repairs are made to a system board, they should spread the floor with anti-static mat
which is also grounded.
Use a suitable, grounded soldering iron.
Keep sensitive parts in these protective packages until these are used.
When returning system boards or parts like EEPROM to the factory, use the protective
package as described.
2. INTRODUCTION
- 7 -
1. Introduction
1. Introduction
^VX\_

1.3 Abbreviations
For the purposes of this manual, following abbreviations apply:
Offset Phase Locked Loop OPLL
Light Emitting Diode LED
Low Drop Output LDO
Liquid Crystal Display LCD
Intermediate Frequency IF
International Portable User Identity IPUI
Global System for Mobile Communications GSM
General Purpose Interface Bus GPIB
Gaussian Minimum Shift Keying GMSK
Flexible Printed Circuit Board FPCB
Electrostatic Discharge ESD
Electrical Erasable Programmable Read-Only Memory EEPROM
Digital Signal Processing DSP
dB relative to 1 milli watt dBm
Digital Communication System DCS
Digital to Analog Converter DAC
Constant Current Constant Voltage CC-CV
Bit Error Ratio BER
Baseband BB
Automatic Power Control APC
1. INTRODUCTION
- 8 -
1. Introduction
_VX\_

Wireless Application Protocol WAP

Voltage Control Temperature Compensated Crystal Oscillator VCTCXO
Voltage Controlled Oscillator VCO
Universal Asynchronous Receiver/Transmitter UART
Time Division Multiple Access TDMA
Time Division Duplex TDD
Travel Adapter TA
Side Tone Masking Rating STMR
Pseudo SRAM PSRAM
Static Random Access Memory SRAM
Sending Loudness Rating SLR
Subscriber Identity Module SIM
Surface Acoustic Wave SAW
Real Time Clock RTC
Root Mean Square RMS
Receiving Loudness Rating RLR
Radio Frequency RF
Public Switched Telephone Network PSTN
Phase Locked Loop PLL
Programmable Gain Amplifier PGA
Printed Circuit Board PCB
Power Amplifier Module PAM
1. INTRODUCTION
- 9 -
2. System Specication
2.1 H/W Features
Item Feature Comment
Standard Battery Lithium-ion r, 3.7V 900mAh
Stand by TIME Up to 200 hrs : Paging Period 5, RSSI 85dBm
Talk time Up to 200min : GSM Tx Level 7
Stand by time Up to 200 hours (Paging Period: 5, RSSI: -85 dBm)
Charging time Approx. 4 hours
RX Sensitivity
GSM, EGSM: -109dBm, DCS: -109dBm
TX output power
GSM, EGSM: 32.5dBm(Level 5),
DCS , PCS: 29.5dBm(Level 0)
SIM card type 3V Small
Display MAIN : 2.2 TFT 176 220 pixel 262K Color
Status Indicator
Hard icons. Key Pad
0 ~ 9, #, *, Up/Down Left/Right Navigation Key
Send Key, PWR Key ,Soft Key(Left/Right)
ANT Internal
EAR Phone Jack Yes
PC Synchronization Yes
Speech coding EFR/FR/HR
Data and Fax Yes
GPRS compatibility Class 10
Vibrator Yes
Loud Speaker Yes
Voice Recoding Yes
Microphone Yes
2. SYSTEM SPECIFICATION
- 10 -
Travel Adapter Yes
Speaker/Receiver 18x12 Speaker/ Receiver
MIDI SW MIDI (Mono SPK)
Item Feature Comment
Camera 1.3M
Bluetooth / FM Radio Bluetooth version 2.1 / 76~108MHz supported
- 11 -
2.2 Technical Specification
Item Description Specification
1 Frequency Band
GSM850 EGSM
TX: 824 ~ 849 MHz TX: 880 ~ 915MHz
RX: 869 ~ 894 MHz RX: 925 ~ 960 MHz
DCS
TX: 1710 ~ 1785 MHz
RX: 1805 ~ 1880 MHz
PCS
TX: 1850 ~ 1910 MHz
RX: 1930 ~ 1990 MHz
2 Phase Error
RMS < 5 degrees
Peak < 20 degrees
3 Frequency Error < 0.1 ppm
4 Power Level
Level Power Toler. Level Power Toler.
6 31dBm 3dB 14 15dBm 3dB
12 19dBm 3dB
GSM850/EGSM
Level Power Toler. Level Power Toler.
DCS/PCS
- 12 -
2. System Specifcation
XYVX\_

5
Output RF Spectrum
(due to modulation)
Offset from Carrier (kHz). Max. dBc
100 +0.5
200 -30
250 -33
400 -60
600~ <1,200 -60
1,200~ <1,800 -60
1,800~ <3,000 -63
3,000~ <6,000 -65
6,000 -71
GSM850/ EGSM
Offset from Carrier (kHz). Max. dBc
100 +0.5
200 -30
250 -33
400 -60
600~ <1,200 -60
1,200~ <1,800 -60
1,800~ <3,000 -65
3,000~ <6,000 -65
6,000 -73
DCS/PCS
6
Output RF Spectrum
(due to switching
transient)
GSM850/ EGSM
Offset from Carrier (kHz). Max. dBm
400 -19
600 -21
1,200 -21
1,800 -24
- 13 -
6
Output RF Spectrum
(due to switching
transient)
Offset from Carrier (kHz). Max. dBm
400 -22
600 -24
1,200 -24
1,800 -27
7 Spurious Emissions Conduction, Emission Status
8 Bit Error Ratio
GSM850, EGSM
BER (Class II) < 2.439% @-102 dBm
DCS,PCS
BER (Class II) < 2.439% @-100 dBm
9 RX Level Report Accuracy 3 dB
10 SLR 83 dB
11 Sending Response
300 -12
1,000 -6
2,000 -6
3,000 -6
Frequency (Hz) Max.(dB) Min.(dB)
100 -
200 -
4,000 -
3,400 -9
0
0
4
4
-12
0
0
4
12 RLR 23 dB
DCS/PCS
- 14 -
2. System Specifcation
X[VX\_


13 Receiving Response
300 -7
500 -5
1,000 -5
3,000 -5
Frequency (Hz) Max.(dB) Min.(dB)
100 -
200 -
4,000
3,400 -10
2
*
0
2
-12
0
2
2
14 STMR 185 dB
* Mean that Adopt a straight line in between 300 Hz
and 1,000 Hz to be Max. level in the range.
15 Stability Margin > 6 dB
-20
-10
0
7
dB to ARL (dB) Level Ratio (dB)
-35
-30
10
30.7
33.3
33.7
31.7
17.5
22.5
25.5
16 Distortion
17 Side Tone Distortion Three stage distortion < 10%
18
System frequency
(13 MHz) tolerance
2.5 ppm
19 32.768KHz tolerance 30 ppm
20 Ringer Volume
At least 65 dBspl under below conditions:
1. Ringer set as ringer.
2. Test distance set as 50 cm
- 15 -
21 Charge Current
Fast Charge : Typ. 400 mA
Slow Charge : Typ. 80mA
Total Charging Time : < 3 hours
2 -> 1
0 -> OFF
Bar Number Power
4 -> 2
-104 2
-106
-98 2
-101 2
22 Antenna Display
2 -> 1
1 -> 0
Battery Bar Number Voltage
3
3 -> 2 3.707 0.05 V
23 Battery Indicator
24
Low Voltage Warning
( Blinking Bar)
3.45 0.05V (Call), one time per one minute
3.45 0.05V (Standby), one time per three minute
25
Forced shut down
Voltage
3.33 0.05V
27 Battery Type
Lithium-Ion Battery
Standard Voltage = 3.7 V
Battery full charge voltage = 4.2 V
Capacity: 900mAh
28 Travel Charger
Switching-mode charger
Input: 100 ~ 350V, 50/60 Hz
Output: 4.8 V, 400 mA
3.708 0.05 V
26
Sustain RTC
without battery
Over 50 hours
3.604 0.05 V
3.451 0.05 V
7
7 -> 5
5 -> 4
-92
-93 2
1 -> 0 -106 2
X]VX\_

3. TECHNICAL BRIEF
3.1 Digital Main Processor
Figure. 3.1.1 X-Gold tm 213 Hardware Block Diagram
3. TECHNICAL BRIEF
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3. Technical brief
3. Technical brief
X]VX\_

3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
X]VX\_

3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
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3. Technical brief
X^VX\_

3. TECHNICAL BRIEF
3.1.1 General
Technology:
SoC, Monolithic, 65 nm CMOS
Package:
eWLB, 8x8x0.8 mm
0.5 mm pitch
217 balls / 6-layer PCB
3.1.2 RF Transceiver
Dual-band direct conversion receiver
Tri/Quad-band possible with external circuitry
Fully integrated digital controlled X0
Additional buffer for 2 external system clocks
Fully digital RF-Synthesizer incl. -Transmitter
3.1.3 Baseband
DSP:
156 MHz TeakLite
MCU:
ARM1176 @ 208 MHz
MCU RAM:
3.00Mbit
Memory I/F:
512 Mbit (can be extended to 2 Gbit in AD-Mux/Demux, and up to 4 Gbit in AAD-Mux mode)
Modem:
GPRS class 12, (RX/TX CS1-CS4)
EGPRS class 12, (RX MCS1-MCS9, TX MCS1-MCS4)
Cipher Units:
A51/2/3
GEA-1/2/3
Security:
OMTP TR0
Secure Boot
RSA(ROM)/SHA-1(HW accel.)
OCDS disabling
Certificate Management
- 18 -
3. Technical brief
X_VX\_

3. TECHNICAL BRIEF
Speech Codec:
FR / HR / EFR / NB-AMR
Audio Codec (running on ARM1176):
SP-MIDI
SB-ADPCM
MP3
WB-AMR
AAC/AAC+/eAAC+
Others:
DARP (SAIC)
TTY
Customization:
E-Fuses
3.1.4 External Memory
External Bus Unit
25-bit address bus (512 Mbit) - can be extended to 27 address bits (2 Gbit)
16-bit data bus
1.8V & 2.8V support
Flash / RAM
NOR Type
Serial Flash SPI and SPI-4
Parallel Flash (Page & Burst Mode)
- 16-bit Demultiplexed
- 16-bit AD-multiplexed
- 16-bit AAD-multiplexed
iNAND Type e.g. oneNAND
Memory card
SD/MMC card interface with 1 or 4 data lines
3.1.5 Connectivity
3xUSIF (configurable either as SPI or UART), I2C, I2S; Interfaces @ 1.8V
Direct (U)SIM 1.8/3V
USB2.0 up to 480 Mbit/s (High Speed) w/ external USB Phy over ULPI interface
Stereo Headset (Amplifier integrated)
3 external analog measurement PINs
Bluetooth, A-GPS, WLAN support (I2C, I2S, SPI)
- 19 -
3. Technical brief
X`VX\_

3. TECHNICAL BRIEF
3.1.6 Mixed Signal
Improved audio performance
Loudspeaker Audio Class D Amplifier, 700 mW@8 mono for
hands-free and ringing
Stereo Headset 2x30 mW@16 w/o coupling C
Mono Earpiece 100 mW@16
Digital microphone supported
Differential microphone inputs
3.1.7 FM Radio
Integrated FM radio
FM Stereo RDS Receiver
Sensitivity 2 V EMF
Support for US & EU bands
Stereo recording
3.1.8 Power Management
Direct-to-Battery Connection
LDOs (incl. capless)
DC/DC step-down converter
DC/DC step-up for white LED supply
Battery Type
Li-Ion
Charging control
Battery temperature
Watchdog protection
Start-up on flat battery
External Charger
Switch mode
USB battery charging
USB charging spec 1.0 compliant
Backlight
Up to 4 serial white LEDs (integrated LDO)
- 20 -
3. Technical brief
YWVX\_

3. TECHNICAL BRIEF
3.1.9 Display
Type
176*220, QCIF, 262k color (parallel)
Interface
Parallel 8/9bit MIPI-DBI Type B
Serial MIPI-DBI Type C
Interf. voltage at 1.8V or 2.8V
gRacr - Display Controller (Hardware)
30 fps Display update without DMA (up to 60 fps) (full or partial)
Video post processing Scaling, Rotation (90 steps), Mirroring
Overlay with alpha blending
Color conversion YUV -> RGB
2D vector graphics (Lines, filled rectangles, Bit block transfer
(e.g. sprites, scrolling, antialiased bitmap fonts)
3.1.10 Camera
1.3 Mpx YUV parallel interface
HW JPEG encoder (39 Mpx/sec)
39 MHz Pixel Rate
15 fps@1.3 Mpx full resolution
3.1.11 Video Capabilities
Video Decoding MPEG-4/H.263
QCIF@30 fps
QVGA@15fps
Video Encoding MPEG-4/H.263
QCIF@15 fps
3.1.12 Audio Capabilities
Polyphonic ring tones
64 voices MIDI, SP-MIDI
FM synthesizer
AMR-WB
True ring tones (MP3)
MP3, eAAC+
G.722 SB-ADPCM encoding/decoding
- 21 -
3. Technical brief
YXVX\_

3.2 Power Management

A mobile platform requires power supplies for different functions. These power supplies are
generated in the integrated power management Unit (PMU). The PMU is designed to deliver the
power for a typical standard phone.
Figure. 3-2-1 Block Figure of the PMU Modules X-Gold tm 213
3. TECHNICAL BRIEF
DC/DC Step Down Converter for 1.8V (SD1)
The DC/DC converter generates a 1.8V supply rail. This voltage rail is used to supply main parts of
the system, like the digital core of the chip (via LDO LCORE), some parts of the mixed signal macro,
parts of the RF macro and the external memory if a 1.8V memory is used. The efficiency of the
DC/DC converter is optimized for an average load current of 100mA. That is the load current
estimated for the GSM talk mode.
YXVX\_


3. TECHNICAL BRIEF
YXVX\_


3. TECHNICAL BRIEF
- 22 -
3. Technical brief
YYVX\_

3. TECHNICAL BRIEF
Linear voltage Regulators (low dropout) LDOs
The LDOs are used to generate the supply for the different supply domains not directly supplied out of
the DC/DC converter.
The VSIM output current is high enough to drive USB SIM cards.
LCORE
The LCORE LDO provides the VCORE supply used for most of the digital parts of the chip
LPMU
The LPMU provides VPMU sued for the PMU supply, e.g. for the startup state machine and analog
parts like ADC, sense amplifier etc.
LUSB
The LUSB LDO generates the supply for the USB transceiver (output driver and input). If no USB
interface is required, LUSB can be used as general purpose LDO.
LAUX
The LAUX generates VAUX. It is a general purpose LDO and can be used for different functions
depending on the phone application, e.g. for the display or Camera.
LMMC
The LMMC generates VMMC. It is a general purpose LDO and can be used e,g. for memory cards
LSIM
The LSIM LDO generates the VSIM supply for the SIM card and interface. It is designed to supply
Standard SIM cards.
Other LDOs
The RF module has implemented several LDOs for different RF Power domain.
The mixed signal module has some LDOs for the audio driver and microphone supply.
- 2 -
3. Technical brief
YZVX\_

3. TECHNICAL BRIEF
Table. 3-2-1 Power supply Domains (without RF)
- 24 -
3. Technical brief
Y[VX\_

3. TECHNICAL BRIEF
3.2.1 Power on and startup
Analog startup Circuit
Because the POR circuit and the LPBG are directly connected to the battery, it is not possible to
switch them off. If the battery voltage exceed the power on reset threshold (2.5V), the power on
reset is released, the LPMU regulator and the LRTC voltage regulator are switched on. The LPMU
regulator starts in its ultra-low power mode
The LPMU regulator generates a control signal (lpmu_OK) that enables the 50KHZ PMU oscillator.
The output clock of the oscillator is checked with a fully coded counter. A counter overflow releases
the reset (vpmu_rst_n) signal for the small PMU state-machine.
Small first digital State-Machine
The small PMU state-machine is always connected to VPMU After starting from reset the small
startup state machine enters the SYSTEM OFF state and only continuous the startup procedure if a
switch on event like first connect, on-key, wake up or charge detect occurs.
PMU-main State-Machine
The main PMU state-machine is always connected to VPMU also. The power up sequence driven
by the PMU state-machine can be seen in Figure18. After enabling the reference (HPGB) and
waiting for the settling time, the battery voltage is measured and compared with the power on
threshold. If the battery voltage is high enough, the SD1 DC/DC converter and the LCORE LDO are
started. A timer ensures that the supply voltage will be stable before the DCXO is enabled. The
DCXO settling time is ensured using a fixed timer. After an overflow of this timer, the reset is
released for the rest of the system. The PMU state machine remains in this System-ON state until
the system is switched into the OFF state. For example the system sleep mode is completely
configured by software( for example switching off the LDOs, switching of the DCXO etc.) and
controlled by the VCXO_enable signal. The reason for the startup is stored in the ResetSourceRead
register.
Battery Measurement
- 25 -
3. Technical brief
Y\VX\_

The ADC and the oscillator for the ADC needs the VDD_ADC supply voltage from the LADC LDO.
LADC uses either the charger voltage VDD_CHARGE or VDDRTC as input voltage. The input
voltage is selected automatically by a bulk switch circuit. LADC, the ADC and the oscillator are
enabled on request for every battery measurement if the charger unit is not running. This is handled
by an ADC control block in one of the state-machines. If the charger unit is running the ADC is
controlled by the charger state-machine
3. TECHNICAL BRIEF
Figure.3.2.1 First Part of the State Machine, Running in Different Power
Domains than the Second Part
- 26 -
3. Technical brief
Y]VX\_

3. TECHNICAL BRIEF
Figure 3.2.2 Second (Main) Part of the Startup State Machine in the VPMU Domain
- 27 -
3. Technical brief
Y^VX\_

3. TECHNICAL BRIEF
3.2.2 Switching on due to first connect
If the battery voltage is connected the first time, that means the system enters the first time the
SYSOFF state, this is stored in a first connect flag. If the first connect flag is set, the system will
start immediately and not wait for any other system on event in the SYSOFF state.
3.2.3 Switching on due to on-Key event
The on key is connected to the ONKEY pad. The ESD protection and the input structure of this pad
are connected to VRTC. If the ONKEY pad is forced to VRTC by an external key or similar circuit,
the system starts. The ONKEY is sampled with the PMU clock. It has to be sampled four times high
before a valid on event is generated. The status of the ON key can be read in the PMU registers, so
it can be used as a functional key during phone operation also.
3.2.4 Switching on due to RTC alarm
The real time clock can generate a wakeup signal called RTC alarm. This signal is sampled from
the state-machine and after successfully detecting a high, the system is switched on.
3.2.5 Switching on due to charging
When a battery with a voltage below the SSONLEV level is inserted, the state machine will not start
the system. As long as the battery voltage stays lover than SYSONLEV the system will stay off. The
only possibility to start up the system is due to an external charger.
If an external charger is connected and detected and the battery is charged above the SYSONPRE
voltage level the system will start up.
The PMU main state machine waits in the Check battery state until the battery voltage condition is
fulfilled. The charger state machine provides the necessary pre-charge indication signal. This pre-
charge signal is denounced in a small counter to have a stable signal. This is important, especially
in half/full-wave charging where the charger detection is switching between charger detected/not
detected according the AC supply frequency. reasons For details on pre-charging see the charger
chapter. The charger is controlled by an independent state machine. The pre-charge signal is used
to trigger the pre-charge signal is used to trigger the pre-charge functionality. The charger state
machine fully control the pre-charge, the PMU-state machine now changes to state HPBG on state
and the system starts. This state change is indicated to the charger state-machine to enable the
charger watchdog for safety
- 28 -
3. Technical brief
Y_VX\_

3. TECHNICAL BRIEF
3.2.6 Power Supply Start-up sequence
In order to avoid an excessive drop on the battery voltage caused by in-rush current during system
power-on, possibly leading to system instability and hick-ups a staggered turn-on approach for the
regulators is implemented. The regulators are turned on in a well defined sequence, thus spreading
the in-rush current transients over time.
The IOs of X-GOLD TM 213 are isolated in OFF mode (core supply is off). The isolation signal is
controlled by the PMU state machine. This ensures that the PADs are in a well defined state during
core supply settling. This allows to power up the LCORE core regulator and wait for the core to reach
reset state before powering up the I/O supply regulators.
- 29 -
3. Technical brief
Y`VX\_

3. TECHNICAL BRIEF
Figure 3.2.3 Start Up Sequence (triggered by First Connect Event)
Y`VX\_

3. TECHNICAL BRIEF
Figure 3.2.3 Start Up Sequence (triggered by First Connect Event)
- 0 -
3. Technical brief
ZWVX\_

3. TECHNICAL BRIEF
3.2.7 External Reset Handling
The chip reset can be controlled by an external RESET_N ball. If this ball is pulled low, the chip will be
reset. All PMU registers are reset during the external reset including LSIM control bits. The PMU
statemachines are also not reset from the external reset. An SW or watchdog reset will not reset the
PMU registers. A SW and Watchdog reset is seen on the reset_n pad to allow the reset of external
devices. Basically there are three reset sources, first the reset signal controlled by the PMU
(reset_pmu_n_o), second the reset signal controlled by the SCU (resetout_o) and third the external
reset (RESET_N). The SCU reset is triggered by SW (for example due to a SW reset or watchdog
reset). The PMU reset is controlled by the PMU state machine. The output of the reset handling block
is the reset_postscu_n_o signal. This signal controls for example the C subsystem and releases
reset for the controller. During normal start up, the PMU releases the reset_pmu_n_o signal after
entering the SYSTEM ON state. At this time the resetout_o signal is high, the RESET_N pad is not
pulled low and therefore the reset_postscu_n_o signal follows the reset_pmu_n_o signal. That means
the C reset will be released and the C starts operation. If the SW triggers an external reset via the
SCU, signal resetout_o will be forced to low for a certain time and RESET_N will be forced to low by
the open drain driver. At the same time the feedback to the SCU will be masked to not reset the
baseband. The RESET_N pad is in the VDDRTC domain but the internal pull up is connected to the
VDD_VDIG1 (1.8V) domain. That allows the pad to be used as reset for external devices running in
the VDD1V8 domain. The RESET_N pad can also be used to monitor the chip internal reset condition
during startup.
The open drain driver is a weak driver, that means it can be forced to high during debug from external
pushing some current into the pad. In testmode signal reset_pmu_n_o is high, that means the chip
reset is fully controlled from external.
- 1 -
3. Technical brief
ZXVX\_

3. TECHNICAL BRIEF
3.2.8 Sysclock Switching
The PMU controls the rf_sysclk_en signal of the DCXO in the RF macro. During startup the PMU
enables the DCXO. After the system is running the DCXO is controlled by the SCU of the baseband
by using the vcxo_enable signal. This is handled by a dedicated logic in the PMU, see Figure 21. As
long as rf_sysclk_en_pmu, the output of the PMU state-machine is high, vcxo_enable controls the
rf_sysclk_en signal to the RF. If rf_sysclk_en_pmu is low, the DXCO is switched off, independent
from vcxo_enable.
Figure 3.2.4 PMU, CGU and External Reset
- 2 -
3. Technical brief
ZYVX\_

3. TECHNICAL BRIEF
3.2.10 Software Reset
A software reset does not affect any PMU register. The PMU register are reset with the
reset_pmufsm_n_o signal. That means all PMU register are reset in OFF state. For details about
the SW reset see chapter External Reset Handling
3.2.9 Undervoltage Shutdown
In active mode the PMU periodically measures the battery voltage using the ADC from the charger
unit. If the battery is measured to be below the programmable shut-down level (called SYSOFF), the
system changes to OFF mode. This is done via the SHUTDOWN state of the PMU state machine.
(see chapter switch OFF)
Figure 3.4.2 How sysclock Enable is Routed in the PMU
- -
3. Technical brief
ZZVX\_

3. TECHNICAL BRIEF
3.2.11 PMU Clock
During the first startup (for example plugging in a battery) a PMU internal oscillator is used for
generation of the PMU clock (pmu_clock). The frequency is slightly above 32 kHz (typ. 50 kHz) to
be out of the audio band also for worst case devices. After first startup the software shall enable the
32 kHz crystal oscillator. It is not possible to use the 32 kHz oscillator during first startup, because
the settling time of the oscillator can be quite long. After the 32 kHz oscillator is running and settled
the software shall switch the PMU clock to the 32 kHz clock and disable the internal PMU oscillator
for power saving reasons. The 32 kHz oscillator shall never be disabled after the PMU clock has
been switched. The ADC in the charger unit has its own oscillator generating a frequency of about
10 MHz. This oscillator is running during charging and during battery measurements triggered by
the PMU. It is off otherwise.
3.2.12 System Sleep Mode
The sleep mode is controlled by using the VCXO_enable signal. This signal is used to switch the
LDOs and the DC/DC converter SD1 in a programmable way into its low power mode (PFM). In
addition DC/DC converter SD1 can be configured to change the output voltage to a lower value for
additional power saving. VCXO_enable is also used to deactivate the HPBG and setting LDO LPMU
in the ultra-low-power mode. In addition the DCXO is switched off by the VCXO_enable signal. The
VCXO_enable signal is also used to switch some LDOs (software configured) to sleep and/or off
mode or to change the output voltages of said LDOs. The state of the main PMU state machine is
not changed due to VCXO_enable.
3.2.13 DC/DC Pre-Load Register Handling
The DC/DC converter works in different modes. If the mode is switched from PFM to PWM the pulse-
width of the DC/DC converter depends on the current battery voltage (and on the output voltage).
The PMU state-machine knows the battery voltage because of the battery supervision function.
Depending on this value it selects a startup pulse-width for the DC/DC converter out of a register
table. (4-values)
- 4 -
3. Technical brief
Z[VX\_

3. TECHNICAL BRIEF
3.2.14 Power Down Sequence
Setting bit OFF in the GeneralControl register switches the system into OFF mode. After the turn off
event, the state-machine switches to the SHUTDOWN state. The reset_pmu_n_o signal changes to
low, the I/O pads are isolated using the padisolation_n signal, the LCORE LDO and the SD1 DC/DC
converter are switched off, the LPMU LDO is switched to ultra-low power mode, the DCXO is turned
off and the bandgap buffer is disabled. Before switching OFF the software shall have enabled the 32
kHz oscillator and has switched the PMU clock to the 32 kHz clock to archive the target OFF current
- 5 -
3. Technical brief
Z\VX\_

3.3.1 Internal Block Diagram

3.3 FEM with integrated Power Amplifier Module (SKY77547, U304)
Figure. 3.3.1 SKY77547 FUNCTIONAL BLOCK DIAGRAM
3. TECHNICAL BRIEF
- 6 -
3. Technical brief
Z]VX\_

3.3.2 General Description

The SKY77547 is a transmit and receive front-end module (FEM) with Integrated Power Amplifier
Control for quad-band cellular handsets comprising GSM850/900 and DCS1800/PCS1900 operation.
Designed in a low profile, compact form factor.
The FEM also supports Class 12 General Packet Radio Service (GPRS) multi-slot operation.
The module consists of a GSM850/900 PA block and a DCS1800/PCS1900 PA block, impedance
matching circuitry for 50 input and output impedances, TX harmonics filtering, high linearity and a
low insertion loss PHEMT RF switch, and a Power Amplifier Control (PAC) block with internal current
sense resistor. A custom BiCMOS integrated circuit provides the internal PAC function and decoder
circuitry to control the RF switches. The two Heterojunction Bipolar Transistor (HBT) PA blocks are
fabricated onto a single Gallium Arsenide (GaAs) die. One PA block supports the GSM850/900 bands
and the other PA block supports the DCS1800/PCS1900 bands. Both PA blocks share common power
supply pads to distribute current. The output of each PA block and the outputs to the four receive pads
are connected to the antenna pad through a PHEMT RF switch. The GaAs die, PHEMT die, Silicon
(Si) die and passive components are mounted on a multi-layer laminate substrate. The assembly is
encapsulated with plastic overmold.
- 7 -
3. Technical brief
Z^VX\_

Figure 3.3.2 Band SW Logic Table

Figure 3.3.3 FEM CIRCUIT DIAGRAM
3. TECHNICAL BRIEF
TX_EN BS1 BS2
STANDBY 0 X X X
RX1 1 0 0 0
RX2 1 0 0 1
RX3 1 0 1 1
RX4 1 0 1 0
LB_TX 1 1 0 X
HB_TX 1 1 1 X
Mode VLOGIC
Input Control Bits
1. X = DONT CARE
2. RX1, RX2, RX3, and RX4 are broadband receive ports and each supports the GSM850, GSM900, DCS, and PCS bands.
10n L304
2.2n
L309
C332
4.7u
1.8p
C349 C348
1.8p
RF500
SW301
2
G
T
N
A
F
R
1
G
100p
C365
ANT301
R312 110
110 R316
R317 110
110 R318
C329
1n
3.3n L302 L303 3.3n
4.7u
C364
ANT302
33p
C331
1.5n
L301
3.9p
C337
1n
C339
SKY77547
U304
34
35
36
16
15
14
13
12
11
10
31
32
33
7
1
9
8
1
8
9
1
7
0
2
6
1
2
5
2
2
4
3
2
3
4
2
2
25
26
27
28
29
30
1
GND1
VBATT
DCS_PCS_IN
GND17
GSM_IN
GND16
GND15
C
I
G
O
L
V
4
1
D
N
G
P
M
A
R
V
3
1
D
N
G
N
E
_
X
T
2
1
D
N
G
1
S
B
1
1
D
N
G
2
S
B
0
1
D
N
G
2
D
N
G
9
D
N
G
3
D
N
G
8
D
N
G
4
D
N
G
T
N
A
PGND3
PGND2
PGND1
GND5
RX1
RX2
RX3
RX4
GND6
GND7
PGND6
PGND5
PGND4
VBAT
C341
1p
1n
C342
1n
C343
R319 1K
C344
10n
39p
C345
1.2p C338
3.3n L310
C363
100p
VLOGIC
BS2
BS1
TX_EN
GSM_OUT
DCS_PCS_OUT
TX_RAMP
DCS
PCS
GSM850
EGSM
- 8 -
3. Technical brief
Z_VX\_

3.4 Crystal(26 MHz, X101)

Figure. 3.4.2 Digital PREDISTORTION with LUXO
The DCXO tuning characteristic should be a first order linear function of the programming word AFC.
The variable capacitance array is a first order linear function of the digital word DIG, which leads to a
nonlinear curve ppm vs. DIG (and also a nonlinear ppm vs. AFC for DIG=AFC). In order to linearize
the ppm vs. AFC curve the implementation of a predistortion is necessary.
To get the wanted linear ppm vs. AFC tuning curve some digital predistortion of the AFC word is
required. This predistortion is performed by the linearization unit for crystal oscillator (LUXO). The
LUXO calculates the corresponding DIG value according to the given AFC value.
Figure. 3.4.1 Crystal Oscillator External Connection
The X-GOLDTM213 RF-Subsystem contains
a fully integrated 26 MHz digitally controlled
crystal oscillator, designed for 8 pF crystals.
The only external part of the oscillator is the
crystal itself. Overall pulling range of the
DCXO is approximately 55 ppm,
controllable by a 13-bit tuning word.
This frequency serves as comparison
frequency within the RF-PLL and as clock
frequency for the digital circuitry.
The 26 MHz reference clock can also be
applied to external components like Bluetooth
or GPS, via the two buffered output signals
FSYS1 and FSYS2
3. TECHNICAL BRIEF
- 9 -
3. Technical brief
Z`VX\_

3.5 RF Subsystem of PMB8810 (U102)

3.5.1 GENERAL DESCRIPTION
The PMB8810 RF subsystem is designed for dual-band GSM voice and data applications (GPRS
class 12). The system can be configured to support one low band, GSM850 or EGSM900, and one
high band, DCS1800 or PCS1900. A block diagram of the RF subsystem is given in Figure 3-4-1.
Figure. 3-5-1 Block DIAGRAM of RF Subsystem
3. TECHNICAL BRIEF
Z`VX\_


3. TECHNICAL BRIEF
Z`VX\_


3. TECHNICAL BRIEF
- 40 -
3. Technical brief
[WVX\_

3.5.2 FUNCTIONAL DESCRIPTION

Figure. 3.5.2 RECEIVER CHAIN BLOCK DIAGRAM
3. TECHNICAL BRIEF
3.5.2.1 Receiver
The X-GOLD213 dual-band receiver is based on a Direct Conversion Receiver (DCR) architecture.
Input impedance of the LNAs is optimized to achieve a matching without (external) high quality
inductors. By use of frequency dividers (by 2/4) the LO frequency is derived from the RF frequency
synthesizer.
The receive path is fully differential to suppress the on-chip interferences and reduce DC-offsets. The
analog chain of the receiver contains two LNAs (low/high band), a quadrature mixer followed by an
analog baseband filter and 14-bit continuous-time delta-sigma analog-to-digital converter. The filtered
and digitized signal is fed into the digital signal processing chain, which provides decimation, DC offset
removal and programmable gain control.
- 41 -
3. Technical brief
[XVX\_

Figure. 3.5.3 TRANSMITTER CHAIN BLOCK DIAGRAM

3. TECHNICAL BRIEF
3.5.2.2 Transmitter
The GMSK transmitter supports power class 4 for GSM850 or GSM900 as well as power class 1
for DCS1800 or PCS1900. The digital transmitter architecture is based on a fractional-N sigma-
delta synthesizer for constant envelope GMSK modulation. This configuration allows a very low
power design without any external components.
Up- and down-ramping is performed via the ramping DAC connected to VRAMP.
RF synthesizer
The RF subsystem contains a fractional-N sigma-delta synthesizer for the frequency synthesis.
Respective to the chosen band of operation the phase locked loop (PLL) operates at twice or forth of
the target signal frequency. In receive operation mode the divided output signal of the digital
controlled oscillator output (DCO) serves as local oscillator signal for the balanced mixer. For
transmit operation the fractional-N sigma-delta synthesizer is used as modulation loop to process the
phase/frequency signal. The 26 MHz reference signal of the phase detector incorporated in the PLL
is provided by the reference oscillator.
- 42 -
3. Technical brief
[YVX\_

Figure. 3.5.4 PA AND FEM CONTROL BLOCK DIAGRAM

3. TECHNICAL BRIEF
3.5.2.3 Front-end/PA Control Interface
Two outputs (FE1, FE2) for direct control of antenna switch modules enable to select RX- and TX-
mode as well as low- and high-band operation.
An extra band select signal PABS for the power amplifier is used, to support discrete PA and
switching modules. Time accurate power dissipation of the PA is achieved by the control signal
PAEN.
A minor set of power amplifiers require a bias voltage to enhance power efficiency. Support of this
power amplifiers is achieved by the implemented bias DAC.
- 4 -
3. Technical brief
[ZVX\_

Figure. 3.5.5 POWER SUPPLY BLOCK DIAGRAM

3. TECHNICAL BRIEF
3.5.2.4 Power Supply
To increase power efficiency most parts of the RF subsystem are supplied by the DCDC converter
situated in the PMU subsystem. Conversion of the 1.8 V output voltage of the DCDC to the 1.3
V/1,4 V circuit supply voltages is achieved by several Low-DropOut regulators (LDO).
One embedded direct-to-battery LDO provides the 2.5 V supply voltage for the remaining circuits.
- 44 -
3. Technical brief
[[VX\_

3.6 MEMORY(PF38F5060M0Y0BE, U101 )

The NumonyxStrataFlash Cellular Memory (M18) device provides high read and write
performance at low voltage on a 16-bit data bus.
The flash memory device has a multi-partition architecture with read-while-program and read-while-
erase capability.
The device supports synchronous burst reads up to 108 MHz using ADV# and CLK address-
latching (legacy-latching) on some litho/density combinations and up to 133 MHz using CLK
address-latching only on some litho/density combinations. It is listed below in the following table.
.
Figure. 3.6.1 MEMORY BLOCK DIAGRAM
3. TECHNICAL BRIEF
- 45 -
3. Technical brief
[\VX\_

3. TECHNICAL BRIEF
In continuous-burst mode, a data Read can traverse partition boundaries.
Upon initial power-up or return from reset, the device defaults to asynchronous arrayread mode.
Synchronous burst-mode reads are enabled by programming the Read Configuration Register. In
synchronous burst mode, output data is synchronized with a user-supplied clock signal. A WAIT
signal provides easy CPU-to-flash memory synchronization.
Designed for low-voltage applications, the device supports read operations with VCC at 1.8 V,
and erase and program operations with VPP at 1.8 V or 9.0 V. VCC and VPP can be tied together
for a simple, ultra-low power design. In addition to voltage flexibility, a dedicated VPP connection
provides complete data protection when VPP is less than VPPLK.
A Status Register provides status and error conditions of erase and program operations.
One-Time-Programmable (OTP) registers allow unique flash device identification that can be
used to increase flash content security. Also, the individual block-lock feature provides zero-
latency block locking and unlocking to protect against unwanted program or erase of the array.
The flash memory device offers three power savings features:
Automatic Power Savings (APS) mode: The device automatically enters APS following a read-
cycle completion.
Standby mode: Standby is initiated when the system deselects the device by deasserting CE#.
Deep Power-Down (DPD) mode: DPD provides the lowest power consumption and is enabled
by programming in the Enhanced Configuration Register. DPD is initiatied by asserting the DPD
pin.
Table 3_6_1 M18 Frequency combinations
- 46 -
3. Technical brief
[]VX\_

3.7 BT module
3. TECHNICAL BRIEF
Figure 3.7.1. BT BLOCK DIAGRAM
This module has an integrated radio transceiver that has been optimized for use in 2.4GHz
Bluetooth Wireless systems. It has been designed to provide low-power, robust
communications for applications Operating in the globally available 2.4GHz unlicensed ISM
band. It is fully compliant with the Bluetooth Radio Specification and enhanced data rate
specification and meets or exceed the requirement to provide the highest communication link
quality of service.
- 47 -
3. Technical brief
[^VX\_

3.7.1 Transmitter path

3. TECHNICAL BRIEF
This module features a fully integrated zero IF transmitter. The baseband transmitted data Is
digitally modulated in the modem block and up-converted the 2.4GHz ISM band in the
Transmitter path. The transmitter path consists of signal filtering, I/Q up-conversion, high -output
power amplifier(PA), and RF filtering. It also incorporates modulation schemes P/4-DQPSK for 2
Mbps and 8-DPSK for 3 Mbps to support enhanced data rate.
Digital modulator
The digital modulator performs the data modulation and filtering required for the GFSK,
B/4DQPSK, and 8-DPSK signal. The fully digital modulator minimizes any frequency drift Or
anomalies in the modulation characteristics of the transmitted signal and is much more Stable than
direct VCO modulation schemes.
Power Amplifier
The integrated PA for the BCM2070 is configurable for Class 2 operation, transmitting up to +4 dBm
as well as Class 1 operation and transmit power up to +12 dBm at the chip, GFSK,
>2.5V supply. Due to the linear nature of the PA, combined with some integrated filtering, no
External filters are requires for meeting Bluetooth and regulatory harmonic and spurious
requirements. For integrated mobile handset applications, where Bluetooth is integrated next to the
celluar radio, minimal external filtering can be applied to achieve near thermal noise levels for
spurious and radiated noise emissions.
Using a highly linearized, temperature compensated design the PA can transmit +12 dBm for Basic
rate and +10 dBm for enhanced data rates(2 to 3 Mbps). A flexible supply voltage range Allows the
PA to operate from 1.2V to 3.0V. The minimum supply voltage at VDDTF is 1.8V to achieve
+10dBm of transmit power.
3.7.2 Receiver path
The receiver path uses a low IF scheme to down-convert the received signal for demodulation in
the digital demodulator and bit synchronizer. The receiver path provides a high degree of Linearity,
an extended dynamic range, and high order on-chip channel filtering to ensure reliable operation in
the noisy 2.4GHz ISM bnad. The front-end topology, with built-in out -of-bnad attenuation, enables
the device to be used in most applications with no off-chip Filtering. For integrated handset
operation where the Bluetooth function is integrated close to the celluar transmitter, minimal
external filtering is required to eliminate the desensitization of The receiver by the cellular transmit
signal.
- 48 -
3. Technical brief
[_VX\_

3.8 SIM Card Interface

Figure 3.8.1. SIM CARD Interface
Signal Description
SIM_RST This signal makes SIM card to HW default status.
SIM_CLK This signal is transferred to SIM card.
SIM_DATA This signal is interface datum.
The Main Base Band Processor(XMM2130) provides SIM Interface Module.
The XMM2130 checks status Periodically During established call mode whether SIM card is inserted
or not, but it doesn't check during deep sleep mode. In order to communicate with SIM card, 3
signals SIM_DATA, SIM_CLK, SIM_RST.
And This model supports 3V SIM Card.
3. TECHNICAL BRIEF
ZD202 ZD203
5000-6P-1.8SL
J201
9 8
10 7
6 3
5 2
4 1
C1 C5
C2 C6
C3 C7
GND1 GND4
GND2 GND3
4.7K
R216
2V85_VSIM
2V85_VSIM
0.1u
C227
DNI
C229
22p
C230
DNI
R232
DNI_DIODE_1006
ZD201
22p
C241
SIM_CLK
SIM_DATA
SIM_RST
SIM_CONNECTOR
- 49 -
3. Technical brief
[`VX\_

3.9 LCD Interface

Figure 3.9.1. LCD Interface
LGDP4525B is a 262,144-color one-chip SoC driver for a-TFT liquid crystal display with resolution of
176RGBx220 dots, comprising a 528-channel source driver, a 220-channel gate driver, 87120 bytes
RAM for graphic data of 176RGBx220 dots, and power supply circuit.
LGDP4525B can operate with low I/O interface power supply up to 1.65V, with an incorporated
voltage follower circuit to generate voltage levels for driving an LCD.
The LGDP4525B also supports a function to display in 8 colors and a standby mode, allowing for
precise power control by software. These features make the LGDP4525B an ideal LCD driver for
medium or small size portable products such as digital cellular phones or small PDA, where long
battery life is a major concern.
3. TECHNICAL BRIEF
CN102
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
R101
100K
R105
100K
150K
R103
1u
C102
1u
C103
VMMC 1V8_VDD
100
R104
DNI
C104
DNI
C105 VA101
R102
100K
1V8_VDD VBAT
1V8_VDD
R106
100K
LCD_ID
F_DATA00
F_DATA01
F_DATA02
F_DATA03
F_DATA04
F_DATA05
F_DATA06
F_DATA07
F_NLCD_CS
F_NLCD_RS
F_NLCD_WR
F_VSYNCOUT
MLED1
MLED2
MLED3
_LCD_RESET
LCD_RD
IM0
IM0
IM1
IM1
- 50 -
3. Technical brief
\WVX\_

The RT9367C is a high efficiency charge pump LED driver using Semtechs proprietary
mAhXLifeTM technology. Performance is optimized for use in single-cell Li-ion battery applications.
The charge pump provides backlight current in conjunction with four matched current sinks. The
load and supply conditions determine whether the charge pump operates in 1x, 1.5x, or 2x mode.
An optional fading feature that gradually adjusts the backlight current is provided to simplify control
software. The RT9367C also provides two low- dropout, low-noise linear regulators for powering a
camera module or other peripheral circuits.
The RT9367C uses the proprietary SemWireTM single wire interface. The interface controls all
functions of the device, including backlight current and two LDO voltage outputs. The single wire
implementation minimizes microcontroller and interface pin counts.
In sleep mode, the device reduces quiescent current to 100A while continuing to monitor the serial
interface. The two LDOs can be enabled when the device is in sleep mode. Total current reduces to
0.1A in shutdown.
Figure 3.9.2. RT9367C CIRCUIT DIAGRAM
3. TECHNICAL BRIEF
2.2u
C308
RT9367C
U301
1
2
20
19
18
8
7
6
5
9
4
10
3 1
1
2
2
1
1
13
4
1
15
16
17
LED3
LED4
NC2
2
O
D
L
AVIN
N
1
C
1
O
D
L
N
2
C
D
N
G
A
D
N
G
P
NC1
P
2
C
ENA
P
1
C
PVIN
SCL
SDA
LED2
LED1
VOUT
G
_
G
U
L
S
FB303
1000
VBAT
2.2u
C314 R309
100K
1u
C323
1u
C324
1u
C325
C327
1u
2.2u
C328
FB305
1000
FB306
1000
CAM_IOVDD CAM_AVDD
I2C_SCL
I2C_SDA
SWIF
MLED1
MLED3
MLED2
- 51 -
3. Technical brief
\XVX\_

LED Backlight Current Sinks

The backlight current is set via the SemWire interface. The current is regulated to one of 32 values
between 0.5mA and 25mA. The step size varies depending upon the current setting. Between
0.5mA and 12mA, the step size is 0.5mA. The step size increases to 1mA for settings between
12mA and 15mA and 2mA for settings greater than 15mA. This feature allows fi ner adjustment for
dimming functions in the low current setting range and coarse adjustment at higher current settings
where small current changes are not visibly noticeable in LED brightness.
All backlight current sinks have matched currents, even when there is variation in the forward
voltages (VF ) of the LEDs. A VF of 1.2V is supported when the input voltage is at 3.0V. Higher
VF LED mis-match is supported when VIN is higher than 3.0V. All current sink outputs are
compared and the lowest output is used for setting the voltage regulation at the VOUT pin. This is
done to ensure that suffi cient bias exists for all LEDs.
The backlight LEDs default to the off state upon powerup. For backlight applications using less than
four LEDs, any unused output must be left open and the unused LED driver must remain disabled.
When writing to the Backlight Enable Control register, a zero (0) must be written to the
corresponding bit of any unused output.
3. TECHNICAL BRIEF
Backlight Quiescent Current
The quiescent current required to operate all four backlights is reduced by 1.5mA when backlight
current is set to 4.0mA or less. This feature results in higher efficiency under light-load conditions.
Further reduction in quiescent current will result from using fewer than four LEDs.
- 52 -
3. Technical brief
\YVX\_

3.10 Battery Charger Interface

Figure 3.10.1 BATTERY CHARGER BLOCK
The BQ25040 is an intelligent, stand-alone constant current, constant-voltage (CCCV), thermally
regulated dual input linear charger designed for charging a single-cell lithium-ion (Li+) battery.
The IC controls the charging sequence from the prequalification state through constant current fast
charge, top-off charge, and full-charge indication.
Proprietary thermal-regulation circuitry limits the die temperature during fast charging or when the IC
is exposed to high ambient temperatures, allowing maximum charging current without damaging the
IC.
The BQ25040 accepts input supply range from -0.3V to 28V, but disables charging if the input
voltages exceed +6.9V to protect against unqualified or faulty AC adapters cables. The IC operates
over the extended temperature range (-40C to +85C)
3. TECHNICAL BRIEF
820
R208
0.1u
C216
BQ25040 U202
6 5
7 4
8 3
9 2
10 1
11
PGND
IN BAT
ISET _PG
VSS1 CHG
LDO VSS2
IFULL EN_SET
C247
0.1u
1V8_VDD
C212
1u
5.1K
R211
VBUS_USB
1u
C215
VBAT
100K
R223
CHG_EN
LDO_OUT
_EOC
(10V)
CHARGING IC
- 5 -
3. Technical brief
\ZVX\_

3.11 Keypad Interface

Figure 3.11.1 MAIN KEY STRUCTURE
3. TECHNICAL BRIEF
The Keypad Interface is a peripheral controller, which can be used for scanning external keypad
matrices with up to 8 rows and 8 columns (that is 64 standard keys). By adding an additional row of
keys connected to ground the number of keys can be extended by up to 8 keys. This results in a
maximum number of 72 keys to by identified by the Keypad Interface Controller.
The Keypad Scan Module reduces the number of interrupts and polling through the processor and
therefore reduces the power consumption. The module is able to debounce and scan the external
keypad matrix automatically without any software intervention. After debouncing it generates an
interrupt. The interface controller contains information about the key (or key combination) that was
pressed and how long it was pressed.
100 R236
100 R234
C201
DNI
VA208
KB201
KB202 KB203
KB204 KB205
KB206 KB207
KB208
KB209
KB210
KB211 KB212
KP_IN1
KP_IN2
KP_IN3
KP_IN4
KP_OUT0
KP_OUT1
KP_OUT2
SHARP NUM 0 STAR
NUM 9 NUM 8 NUM 7
NUM 6 NUM 5 NUM 4
NUM 3 NUM 2 NUM 1
- 54 -
3. Technical brief
\[VX\_

Figure 3.11.3 Block Diagram and System Integration of the KPD

3. TECHNICAL BRIEF
Figure 3.11.2 SLIDE KEY STRUCTURE
KB101
VRTC
KB102 KB103
470
R111
KB104 KB105
KB106
C110
1u
KB107
KB108 KB109
C109
DNI
R112
470
DNI
C111
R113
470
C112
DNI
470
R114
DNI
C113
R115
470
C114
DNI
470
R116
C115
DNI
R117
470
DNI
C116
KP_IN1
KP_IN2
KP_IN4
KP_OUT3
KP_OUT5
END_KEY
KP_IN3
KB101
VRTC
KB102 KB103
470
R111
KB104 KB105
KB106
C110
1u
KB107
KB108 KB109
C109
DNI
R112
470
DNI
C111
R113
470
C112
DNI
470
R114
DNI
C113
R115
470
C114
DNI
470
R116
C115
DNI
R117
470
DNI
C116
KP_IN1
KP_IN2
KP_IN4
KP_OUT3
KP_OUT5
END_KEY
KP_IN3
- 55 -
3. Technical brief
\\VX\_

3.12 Audio Front-End

Figure 3.12.1 Audio Section Overview
3.12.1 Functional Overview
The audio front-end of X-GOLD213 offers the digital and analog circuit blocks for both receive and
transmit audio operation, from a mobile phone perspective (called audio-in and audio-out
subsequently). It features a high-quality, stereo digital-to-analog path with amplifier stages for
connecting acoustic transducers to X-GOLD213. In audio-in path the supply voltage generation for
electret microphones, a low-noise amplifier and analog to digital conversion are integrated in X-
GOLD213. A more detailed functional description will be given in the following sections.
The audio front-end itself can be considered to be organized in three sub-blocks:
Interface to processor cores (TEAKLite and - indirectly - ARM)
Digital filters
Analog part
The following figure shows an architecture overview of the Audio section.
1. TECHNICAL BRIEF
- 56 -
3. Technical brief
\]VX\_

The audio front-end of X-GOLD213 has the following major operation modes:
Power-down: All analog parts are in power down and all clocks of the digital part are switched off.
Audio mode: Digital decimation/interpolation filters are connected to the interface buffers and the
analog part is enabled.
These major modes can be modified by certain control register settings.
Due to the new gain settings in the TX path, the maximum input voltage is limited to 0.8 Vpp.
In both voiceband paths, the value range for voice samples is confined to 97.5%, i.e. to [-31948,
31947] or [8334H, 7CCBH] in X-GOLD213.
On the TX path, 83% "1"s on the VTPDM line correspond to a 16-bit value of 7CCBH and 17% "1"s
correspond to a 16-bit value of 8334H at the digital filter output. Thus the usable range is 66%. This
range can be scaled to 100% by Firmware.
The high-pass functions of the voiceband filters have to be implemented in firmware on TEAKLite.
3. TECHNICAL BRIEF
Figure 3.12.2 Overview of Clocking and Interfaces of Audio Front End
\]VX\_

The audio front-end of X-GOLD213 has the following major operation modes:
Power-down: All analog parts are in power down and all clocks of the digital part are switched off.
Audio mode: Digital decimation/interpolation filters are connected to the interface buffers and the
analog part is enabled.
These major modes can be modified by certain control register settings.
Due to the new gain settings in the TX path, the maximum input voltage is limited to 0.8 Vpp.
In both voiceband paths, the value range for voice samples is confined to 97.5%, i.e. to [-31948,
31947] or [8334H, 7CCBH] in X-GOLD213.
On the TX path, 83% "1"s on the VTPDM line correspond to a 16-bit value of 7CCBH and 17% "1"s
correspond to a 16-bit value of 8334H at the digital filter output. Thus the usable range is 66%. This
range can be scaled to 100% by Firmware.
The high-pass functions of the voiceband filters have to be implemented in firmware on TEAKLite.
3. TECHNICAL BRIEF
Figure 3.12.2 Overview of Clocking and Interfaces of Audio Front End
- 57 -
3. Technical brief
\^VX\_

Interpolation Filter
The interpolation path of the X-GOLD213 audio front-end increases the sampling rate of the audio
samples to the rate of the digital-to-analog converter. Because the input sampling rates can vary
between 8 kHz and 47.619 kHz the filter characteristic and oversampling ratio can be adjusted to the
respective sampling rate. The requirements for the interpolation filters depend on the sampling rate,
because a sufficient out-of-band discrimination in the audio frequency band (20 Hz,...,20 kHz) has to
be ensured.
Decimation Filter
The digital decimation filter on X-GOLD213 has two operating modes: 8 kHz output sampling rate
and 16 kHz output sampling rate (or 16 kHz output sample rate and 16kHz bandwidth in case of
doubled ASMD clock).
3.12.3 Analog Part
The analog part of the X-GOLD213 audio front-end in audio-out direction consists of a stereo
digital to analog converter (multi-bit oversampling converter) which transforms the output of the
digital interpolation filter into analog signals. It is followed by the gain control/amplifier section. The
DAC outputs can be switched to several output buffers. In audio-in section there is an input
multiplexer which selects either one of two differential microphone inputs to be connected to the low-
noise amplifier and analog pre-filter. The signals from the analog pre-filter are input to a second-
order sigma-delta analog-to-digital converter. In addition there is a connection for FM-radio playing.
Audio-out Part
The analog audio-out part consists of two multi-bit digital-to-analogue converters (DAC) and an
output stage. The signal sources are switched to the output drivers in the output stage. The output
drivers consist of: a) one mono, differential class-D Loudspeaker driver, b) one mono, differential
Earpiece driver and c) one stereo, single-ended (with uni- or bipolar signals), Headset driver.
3. TECHNICAL BRIEF
3.12.2 Digital Part
The digital part of the X-GOLD213 audio front-end comprises an interface to the TEAKLite bus,
interfaces to the interrupt units of TEAKLite, digital interpolation filters for oversampling digital-to-
analog conversion, digital decimation filters for analog-to-digital conversion and an interface to the
analog part of the audio front-end. For the digital microphone all the filtering is done in a dedicated
hardware. The output sample stream is then fed in a duplicated ring buffer structure like the data
from the analog microphone path (after A/D conversion and subsequent digital filtering).
- 58 -
3. Technical brief
\_VX\_

Output Amplifier
The different output buffers in X-GOLD213 are driven by the outputs of the selection block. The
differential earpiece driver can be used to drive a 16 earpiece and works in differential. The two
single ended headset drivers can be used to drive a 16 headset. They can work unipolar mode,
where an AC coupling of the headset might be needed, or can work also in bipolor mode. The
differential loudspeaker driver can be used to drive a 8 loudspeaker. As it is a class-D amplifier the
needed suppression of the higher harmonics of the switching signals
has to be achieved by the external circuitry. The buffers are designed to be short circuit protected.
3. TECHNICAL BRIEF
Figure 3.12.3 Switching for R/L DACs onto Buffers
Digital-to-analog converters
The multi-bit oversampling DACs of the X-GOLD213 audio front-end convert the 16-bit data words
coming from the digital interpolation filters to analogue signals.
- 59 -
3. Technical brief
\`VX\_

Figure 3.12.4 Different Application Scenarios

3. TECHNICAL BRIEF
In order to achieve the single-speaker concept by parallel connection of Earpiece and Headset amplifier
the Earpiece amplifier have to sustain the up to 5 V voltage of the class-D amplifier.
Audio-in Path
The audio-in path of X-GOLD213 provides two differential microphone input sources, MIC1and MIC2.
The inputs for microphone MIC1 are MICP1 and MICN1.
The inputs for microphone MIC2 are MICP2 and MICN2.
The audio-in path consists of an input selector, a low noise amplifier and following pre-filter with gain
control, a second order -converter and a digital decimation filter. It supports both standard GSM
(bandwidth 3.5 kHz) and wideband (bandwidth 7 kHz) speech bands.
The differential input signal from the microphone first passes a low noise amplifier and following pre-filter
and an anti-aliasing pre-filtering stage achieving and overall variable gain ranging from 0 dB to +39 dB .
The signal is then modulated by a second order -converter which is clocked with the same clock rate
as the digital to analog converters. The -converter delivers a 1-bit pulse density modulated data
stream at a rate of 2 MHz to the digital decimation filter which reduces the rate to 8 kHz or 16 kHz,
depending on the current mode.
To improve SNR the sample frequency can be doubled in dedicated modes and the modulated data
stream is 4MHz instead of 2 MHz.
- 60 -
3. Technical brief
]WVX\_

3. TECHNICAL BRIEF
Microphone Supply
X-GOLD213 has a single ended power-supply concept for electret microphones:
For both modes a minimal load capacitance of t.b.d. nF is necessary to guarantee stable operation of
the buffer.
The maximal load capacitance must not exceed t.b.d. nF.
2 microphone supplies VMIC and VUMIC are available. The supply VUMIC has a ultra-low-power
mode, where the current consumption is minimum, whilst at the same time the noise performance is
reduced.
For this purpose the VUMIC is directly supplied out of the VMIC regulator, the Mic-Buffer can be
switched off and only the quiescent current of the VMIC regulator is present. This mode can be used
to supply a headset and allow accessory detection with highly reduced current consumption For
normal operation the supply can be switched to normal operation mode with improved noise
performance. In case of an digital microphone VMIC can be used for supplying this microphone.
Figure 3.12.5 Typical Microphone Supply Generation (alternative)
- 61 -
3. Technical brief
]XVX\_

3.13 Camera Interface(1.3M Fixed Focus Camera)

3.13.1 PMB8810 Camera Interface
The Camera Interface (CIF) represents a complete video and still picture input interface (see Figure
26).
The CIF contains image processing, scaling, and compression functions. The integrated image
processing unit supports image sensors with integrated YC
b
C
r
processing.
Scaling is used for downsizing the sensor data for either displaying them on the LCD, or for generating
data streams for MPEG-4 compression. In general, YC
b
C
r
4:2:2 JPEG compressed images should
use the full sensor resolution, but they can also be downscaled to a lower resolution for smaller JPEG
files. Scaling also can be used for digital zoom effects, because the scalers are capable of up-scaling
as well.
CIF
All data is transmitted via the memory interface to an AHB bus system using a bus master interface.
Programming is done by register read/write transactions using an AHB slave interface.
3. TECHNICAL BRIEF
Figure 3.13.1 Block Diagram of Camera Interface
]XVX\_

3.13 Camera Interface(1.3M Fixed Focus Camera)

3.13.1 PMB8810 Camera Interface
The Camera Interface (CIF) represents a complete video and still picture input interface (see Figure
26).
The CIF contains image processing, scaling, and compression functions. The integrated image
processing unit supports image sensors with integrated YC
b
C
r
processing.
Scaling is used for downsizing the sensor data for either displaying them on the LCD, or for generating
data streams for MPEG-4 compression. In general, YC
b
C
r
4:2:2 JPEG compressed images should
use the full sensor resolution, but they can also be downscaled to a lower resolution for smaller JPEG
files. Scaling also can be used for digital zoom effects, because the scalers are capable of up-scaling
as well.
CIF
All data is transmitted via the memory interface to an AHB bus system using a bus master interface.
Programming is done by register read/write transactions using an AHB slave interface.
3. TECHNICAL BRIEF
Figure 3.13.1 Block Diagram of Camera Interface
- 62 -
3. Technical brief
]YVX\_

Functional Overview of CIF

The following list gives an overview over the CIFs functionality:
78 MHz system clock
78 MHz sensor clock
78 MHz JPEG encoder clock
32-bit AHB slave programming interface
ITU-R BT 601 compliant video interface supporting YC
b
C
r
ITU-R BT 656 compliant video interface supporting YC
b
C
r
data
8-bit camera interface
12-bit resolution per color component internally
YC
b
C
r
4:2:2 processing
Hardware JPEG encoder incl. JFIF1.02 stream generator and programmable quantization and
Huffman tables
Windowing and frame synchronization
Continuous resize support
Frame skip support for video (e.g. MPEG-4) encoding
Macro block line, frame end, capture error, data loss interrupts and sync. (h_start, v_start)
interrupts
Programmable polarity for synchronization signals
Luminance/chrominance and chrominance blue/red swapping for YUV input signals
Maximum input resolution of 3 Mpixels (2048x1536 pixels)
Main scaler with pixel-accurate up- and down-scaling to any resolution between 3 MP
(2048x1536) and 32x16
pixel in processing mode
Buffer in system memory organized as ring-buffer
Buffer overflow protection for raw data and JPEG files
Asynchronous reset input, software reset for the entire IP and separate software resets for all sub-
modules
Interconnect test support
Semi planar storage format
Color processing (contrast, saturation, brightness, hue)
Power management by software controlled clock disabling of currently not needed sub-modules
3. TECHNICAL BRIEF
- 6 -
3. Technical brief
]ZVX\_

3.14 KEY BACLKLIGHT LED Interface

Key Backlight LED is controlled by switch (Q201, Q101). If KEY_BL_EN is high, Current is flowing
from VBAT to LED. Then Light emitted from The LED.
KEY_BL_EN is operating PWM. It is reducing current consumption.
Figure 3.14.1 Key Backlight Block
3. TECHNICAL BRIEF
[Main Key backlight LED interface] [Slide Key backlight LED interface]
0
2
1
7
0
1
R
0
2
1
8
0
1
R
VA104
LD102
VBAT
VA102
DNI
LD101
R109 1.2K
DNI
VA103
R110
100K
Q101
1
2
3
SLIDE_BL_EN
KTC4075E
Q201
1
2
3
LD201 LD204 LD203 LD202
VA201
DNI
VA202
DNI
1.2K R222
VA204
DNI 0
0
3
1
3
2
R
VA205
DNI
5
1
2
R
0
0
3
0.1u
C249
5
2
2
R
0
0
3
VBAT
0
0
3
1
4
2
R
KEY_BL_EN
KEY BACKLIGHT
- 64 -
3. Technical brief
][VX\_

3.15 Vibrator Interface

Support PWM signal which generated by hardware itself via register control
Direct connect to the VIB and VSSVIB pin from XMM2130 without any external component required
It is capable to driver the vibrator motor up to 150mA
Figure 3.15.1 Vibrator Driver Block Diagram
3. TECHNICAL BRIEF
Figure 3.15.2 Vibrator Driver Block
L101 18n
DM-YK407-6F2
VB101
2
1
C132
1u
C133
33p
VIB_P
VIBRATOR
- 65 -
3. Technical brief
]\VX\_

3.16 Slide SW Interface

Hall sensor respond to the magnetic field. If it is used for mobile phones, It is used for opening of the
slide. A little magnet attached to the slide. If slide is opened, Hall sensor is ON.
Therefore, to see whether the opening of the slide.
Figure 3-16-1 Hall effect switch Block Diagram
3. TECHNICAL BRIEF
1u
C202
U203
BU52031NVX
5
3 2
4 1
OUT VDD
GND NC
D
N
G
P
VA203
R235 22
1V8_VDD
SLIDE
SLIDE SW
- 66 -
4. Trouble Shooting
4. Trouble Shooting
]^VX\_

4.1 RF Component
4. TROUBLE SHOOTING
Figure 4.1
U101
Memory(512NOR/128pSDRAM)
PF38F5060M0Y3DF
U102 (PMB8810) Main Chip (A-GOLDRADIO)
U304 FEM(Tx Module)
X101 Crystal, 26MHz Clock
4. TROUBLE SHOOTING
U102
U304
X101
U101
- 67 -
]_VX\_

START
Re-download SW or
Do calibration again
HP8960 : Test mode
62 CH, 7 level setting (TCH)
62CH, -60dBm setting (BCCH)
Spectrum analyzer setting
Oscilloscope setting
(1) Check
Crystal Circuit
(2) Check
Mobile SW &TX module
4.2 RX Trouble
CHECKING FLOW
4. TROUBLE SHOOTING
(3) Check PLL Control
4. Trouble Shooting
- 68 -
4. Trouble Shooting
]`VX\_

(1) Checking Crystal Circuit

4. TROUBLE SHOOTING
TEST POINT
CIRCUIT WAVEFORM
CHECKING FLOW
1 pin
Figure 4.2.1
26 MHzO.K?
No
Crystal is OK.
See next page to check PLL
Circuit
Yes
Replace X101
Figure 4.2.2 Figure 4.2.3
X101
1 pin : 26MHz
26MHz X101
2 1
3
4
GND2 HOT2
HOT1 GND1
2V85_VSIM
G4
G2
G3
M8
A11
B11
K12
K11
B2
A3
B3
A2
J8
H7
J7
H8
USIF2_TXD_MTSR
USIF2_RXD_MRST
USIF2_RTS_N
USIF2_CTS_N
USIF1_TXD_MTSR
USIF1_RXD_MRST
USIF1_RTS_N
USIF1_CTS_N
DPLUS
DMINUS
XOX
XO
VSIM
SIM_IO
SIM_CLK
SIM_RST
C128 SIM_CLK
SIM_DATA
SIM_RST
BT_CTS
BT_RTS
BT_RXD
BT_TXD
USB_DP
USB_DM
UART_TX
UART_RX
_LCD_RESET
CAM_EN
1 pin
- 69 -
4. Trouble Shooting

68/158
4.2.2 Checking Mobile SW &FEM
4. TROUBLE SHOOTING
TEST POINT
Figure 4.2.4
TP2
TP4(VLOGIC)
TP1
TP5 (Tx_EN)
SW301
TP6 (BS1)
TP7 (BS2)
TP3
- 70 -
4. Trouble Shooting
^XVX\_

(2) Checking Mobile SW &FEM

4. TROUBLE SHOOTING
CIRCUIT
CONTROL LOGIC
TP2
TP3
TP1
TP4
EGSM Rx
VLOGIC
Tx_EN
BS1
BS2
10n L304
10n
L306
3.3p C334
2.2n
L309
C332
4.7u
LR65C
FL307
10 3
5 2
6 4
7
8
9 1
INPUT1 OUTPUT2
OUTPUT1
GND2
INPUT2 GND1
C_GND1 C_GND3
C_GND2 C_GND4
1.8p
C349 C348
1.8p
RF500
SW301
2
G
T
N
A
F
R
1
G
100p
C365
ANT301
R312 110
110 R316
R317 110
110 R318
C329
1n
3.3n L302 L303 3.3n
4.7u
C364
ANT302
33p
C331
1.5n
L301
L312 6.8n
C340 3.3p
12n
L308
L307
4.3n
3.9p
C337
1n
C339
SKY77547
U304
34
35
36
16
15
14
13
12
11
10
31
32
33
7
1
9
8
1
8
9
1
7
0
2
6
1
2
5
2
2
4
3
2
3
4
2
2
25
26
27
28
29
30
1
GND1
VBATT
DCS_PCS_IN
GND17
GSM_IN
GND16
GND15
C I
G
O
L
V
4
1
D
N
G
P
M
A
R
V
3
1
D
N
G
N
E
_
X
T
2
1
D
N
G
1
S
B
1
1
D
N
G
2
S
B
0
1
D
N
G
2
D
N
G
9
D
N
G
3
D
N
G
8
D
N
G
4
D
N
G
T
N
A
PGND3
PGND2
PGND1
GND5
RX1
RX2
RX3
RX4
GND6
GND7
PGND6
PGND5
PGND4
VBAT
C341
1p
1n
C342
1n
C343
R319 1K
C344
10n
39p
C345
1.2p C338
6.8n L311
3.3n L310
DNI
L305
C363
100p
B9509
FL308
10 3
5 2
6 4
7
8
9 1
INPUT1 OUTPUT2
OUTPUT1
GND2
INPUT2 GND1
C_GND1 C_GND3
C_GND2 C_GND4
VLOGIC
BS2
BS1
TX_EN
RX12
RX12X
RX34
RX34X
GSM_OUT
DCS_PCS_OUT
TX_RAMP
=> B9508
GSM850
EGSM
DCS
PCS
DCS
PCS
GSM850
EGSM
RF PART
TP1
TP3
TP7
TP6
TP5
TP4
TP2
- 71 -
4. Trouble Shooting

70/158
CHECKING FLOW
4. TROUBLE SHOOTING
Start
TP1 & TP2 is Short?
Replace Mobile SW (SW301)
Yes
No
Yes
Re-download SW and
Check PMB8810 Check TP4~TP7?
No
Yes
Replace FL301 , FL302
Check FL301,
FL302?
No
Yes
GSM850 Rx
Replace U304
No
Check TP3(Vbat)
of U304 ?
TP4 TP5 TP6 TP7
- 72 -
4. Trouble Shooting
^ZVX\_

4.3 TX Trouble
START
Redownload SW or
HP8960 : Test mode
62 CH, 7 level setting (TCH)
62CH, -60dBm setting (BCCH)
Spectrum analyzer setting
Oscilloscope setting
(1)Check
Crystal Circuit
CHECKING FLOW
4. TROUBLE SHOOTING
(2) Check
Mobile SW &FEM
(3) Check PLL Control
- 7 -
4. Trouble Shooting
^[VX\_

(1) Checking Crystal Circuit

4. TROUBLE SHOOTING
TEST POINT
CIRCUIT WAVEFORM
CHECKING FLOW
Figure 4.3.1
26 MHzO.K?
No
Crystal is OK.
See next page to check PLL
Circuit
Yes
Replace X100
Figure 4.3.2 Figure 4.3.3
1 pin
X101
1 pin : 26MHz
26MHz X101
2 1
3
4
GND2 HOT2
HOT1 GND1
2V85_VSIM
G4
G2
G3
M8
A11
B11
K12
K11
B2
A3
B3
A2
J8
H7
J7
H8
USIF2_TXD_MTSR
USIF2_RXD_MRST
USIF2_RTS_N
USIF2_CTS_N
USIF1_TXD_MTSR
USIF1_RXD_MRST
USIF1_RTS_N
USIF1_CTS_N
DPLUS
DMINUS
XOX
XO
VSIM
SIM_IO
SIM_CLK
SIM_RST
C128 SIM_CLK
SIM_DATA
SIM_RST
BT_CTS
BT_RTS
BT_RXD
BT_TXD
USB_DP
USB_DM
UART_TX
UART_RX
_LCD_RESET
CAM_EN
1 pin
- 74 -
4. Trouble Shooting

73/158
4.3.2 Checking Mobile SW & TX Module
4. TROUBLE SHOOTING
TEST POINT
Figure 4.3.4
TP2
TP4(VLOGIC)
TP1
TP5 (Tx_EN)
SW301
TP6 (BS1)
TP7 (BS2)
TP3
TP8(Tx_Ramp)
- 75 -
4. Trouble Shooting

74/158
4. TROUBLE SHOOTING
CIRCUIT
CONTROL LOGIC
Low Band Tx
VLOGIC
Tx_EN
BS1
BS2
Figure 4.3.5
Figure 4.3.6
TP4
TP
2
TP
1
TP
3
TP
5
TP
6
TP
7
TP
8
Tx_EN
TP8 (Tx_Ramp)
Figure 4.3.7

74/158
4. TROUBLE SHOOTING
CIRCUIT
CONTROL LOGIC
Low Band Tx
VLOGIC
Tx_EN
BS1
BS2
Figure 4.3.5
Figure 4.3.6
TP4
TP
2
TP
1
TP
3
TP
5
TP
6
TP
7
TP
8
Tx_EN
TP8 (Tx_Ramp)
Figure 4.3.7
10n L304
10n
L306
3.3p C334
2.2n
L309
C332
4.7u
LR65C
FL307
10 3
5 2
6 4
7
8
9 1
INPUT1 OUTPUT2
OUTPUT1
GND2
INPUT2 GND1
C_GND1 C_GND3
C_GND2 C_GND4
1.8p
C349 C348
1.8p
RF500
SW301
2
G
T
N
A
F
R
1
G
100p
C365
ANT301
R312 110
110 R316
R317 110
110 R318
C329
1n
3.3n L302 L303 3.3n
4.7u
C364
ANT302
33p
C331
1.5n
L301
L312 6.8n
C340 3.3p
12n
L308
L307
4.3n
3.9p
C337
1n
C339
SKY77547
U304
34
35
36
16
15
14
13
12
11
10
31
32
33
7
1
9
8
1
8
9
1
7
0
2
6
1
2
5
2
2
4
3
2
3
4
2
2
25
26
27
28
29
30
1
GND1
VBATT
DCS_PCS_IN
GND17
GSM_IN
GND16
GND15
C I
G
O
L
V
4
1
D
N
G
P
M
A
R
V
3
1
D
N
G
N
E
_
X
T
2
1
D
N
G
1
S
B
1
1
D
N
G
2
S
B
0
1
D
N
G
2
D
N
G
9
D
N
G
3
D
N
G
8
D
N
G
4
D
N
G
T
N
A
PGND3
PGND2
PGND1
GND5
RX1
RX2
RX3
RX4
GND6
GND7
PGND6
PGND5
PGND4
VBAT
C341
1p
1n
C342
1n
C343
R319 1K
C344
10n
39p
C345
1.2p C338
6.8n L311
3.3n L310
DNI
L305
C363
100p
B9509
FL308
10 3
5 2
6 4
7
8
9 1
INPUT1 OUTPUT2
OUTPUT1
GND2
INPUT2 GND1
C_GND1 C_GND3
C_GND2 C_GND4
VLOGIC
BS2
BS1
TX_EN
RX12
RX12X
RX34
RX34X
GSM_OUT
DCS_PCS_OUT
TX_RAMP
=> B9508
GSM850
EGSM
DCS
PCS
DCS
PCS
GSM850
EGSM
RF PART
TP1
TP3
TP7
TP6
TP5
TP4
TP2
TP8
- 76 -
4. Trouble Shooting

75/158
CHECKING FLOW
4. TROUBLE SHOOTING
Start
TP1 & TP2 is Short?
Replace Mobile SW (SW301)
Yes
No
Yes
Re-download SW and
Check PMB8810 Check TP4~TP7?
No
Yes
Check PMB8810 & circuit
Check TP8 ?
No
Yes
Replace U304
No
Check TP3(Vbat)
of U304 ?
TP4 TP5 TP6 TP7
- 77 -
4. Trouble Shooting

76/158
4.4 Power On Trouble
4. TROUBLE SHOOTING
1V8_VDD(TP5)
VPMU(TP11)
VCORE(TP4)
VUSB(TP12)
VMMC(TP13)
VAUX(TP7)
VDDTRX(TP8)
VDDMS (TP2)
VDDXO(TP3)
VDDTDC(TP9)
VDD_VRF2(TP10)
VRF1(TP6)
U102
Figure 4.4.1
Figure 4.4.2 Figure 4.4.3 Remote power on
TP1
TP1
0 R114
100K
R120
END_KEY PWRON
POWER ON
TP1
- 78 -
4. Trouble Shooting
^`VX\_

4. TROUBLE SHOOTING
Figure 4.4.4 power block of GU230
C101
2.2u
1V8_VDD
1V8_VDD
VUSB
1V8_VDD
VBAT
75
FB101
R102
0
VCORE
1V8_VDD
VDDMS
1V8_VDD
VUSB
VDDTRX
1V8_VDD
1V8_VDD
VDDTDC
C105
0.1u
22u
C136
1V8_VDD
1V8_VDD
VDDRF2 VDDTDC
VMMC
470
R106
VCORE
KTC4075E
Q101
1
2
3
VMMC
1V8_VDD
VRF1
C110
0.1u
VAUX
VAUX
0.1u
C112
1u
C113
VRF1 VDDMS
100K
R108
L102 3.3u
VBAT
VDDXO
C115
2.2u 470n
C118
VBAT_RF2
470n
C119
1V8_VDD VPMU
4.7n C120
VBAT
47n
C121
C122
470n
47n
C123 C124
47n
VPMU
VBAT
VBAT VDDRF2
0.1u
C125
33uF C106
M10
L1 N11
K2 R11
K3 T11
N12
6
K
5
T
6
R
7
M
4
T
6
M
6
L
0
1
L
5
1
C
5
1
F
0
1
H
3
1
G
9
M
7
L
2
1
F
8
P
2
1
E
4
1
G
6
1
R
2
1
A
2
1
B
1
1
E
3
1
H
2
1
G
3
1
A
0
1
J
3
1
F
4
1
F
5
1
P
4
1
P
8
G
8
K
9
J
9
H
8
F
9
T
0
1
P
5
R
7
K
9
G
8
N
6
1
P
4
1
L
7
R
7
T
6
T
7
P
1
D
S
_
D
D
V
B
F
_
1
D
S
1
D
S
_
S
S
V
W
S
_
1
D
S
S
M
S
S
V
P
S
T
A
B
V
U
M
P
_
T
A
B
V
1
OI
D
D
V
2
OI
D
D
V
U
B
E
_
D
D
V
U
M
P
V
U
M
P
_
S
S
V
1
E
R
O
C
_
S
S
V
2
E
R
O
C
_
S
S
V
3
E
R
O
C
_
S
S
V
E
R
O
C
V
E
R
O
C
D
D
V
P
C
8
V
1
D
D
V
R
S
L
S
S
V
X
R
T
S
S
V
X
R
S
S
V
1
8
V
1
D
D
V
P
M
A
R
V
G I
D
_
S
S
V
S
M
D
D
V
O
X
D
D
V
C
D
T
D
D
V
D
M
M
D
D
V
G
E
N
D
D
V
T
A
B
V
O
C
D
S
S
V
X
U
A
V
O
X
S
S
V
C
M
M
V
B
S
U
V
2
F
R
D
D
V
1
F
R
V
O
L
_
S
S
V
F
R
S
S
V
C
T
R
V
N
E
S
N
E
S
P
E
S
N
E
S
G
H
C
D
D
V
S
C
B
S
C
G
H
C
V
T
N
H
S
V
M0
M1 A_D0
M2 A_D1
VDD_FMR A_D2
FMRIN
VBAT
C127
1u
C131
0.1u
VDDXO
C134
0.1u
220n
C135
VBAT_RF2 VRTC
R115
3.9K
220n
C137
5.6K
R116
18p
C138
u
1.
0
0
4
1
C
I
N
D
9
1
1
R
FM_ANT
LCD_ID
BAT_TEMP
TX_RAMP
LDO_OUT
AD02
AD01
AD00
PIN_H10
Seperate and shield
Speaker Supply
VDD_IO2
VBATSP
VDD1V8CP
VDD_IO1
PIN_H13 PIN_B14
RF SUPPLIES (DIRTY GND)
PMU SUPPLIES
PIN K8 PIN M9 PIN L7 PIN P8
RF SUPPLIES (CLEAN GND)
VBAT_PMU
PIN P14
PIN P16
PIN P10
PIN R5 PIN G9
PIN_B12 PIN_E11 PIN_G14 PIN_G13
ABB SUPPLIES
DBB SUPPLIES
PIN K7
PIN N8
VDD_EBU
TP8
TP10
TP3 TP9 TP2
TP6
TP11 TP7 TP13 TP12 TP4
TP5
TP14
- 79 -
4. Trouble Shooting

78/158
4. TROUBLE SHOOTING
START
Check Battery Voltage
> 3.35V
Push power-on key
And check the level change
into high of POWERKEY(TP1)
Check the voltage of
The LDO outputs at U102
Logic level at RPWRON of R114
= HIGH(above 1.2V)?
Is the phone power on?
The phone will
Properly operating.
Charge or Change Battery
Check the contact of power key
Or dome-switch
Replace U102
VCORE(TP4)=1.2V, VPMU(TP11)=1.2V. VRTC=2.3V,
VDD_1.8V(TP5)=1.8V
VAUX(TP7)=2.8V, VMMC(TP13)=2.8V,
VDD_RF2(TP10)=2.5V, VRF1(TP6)=1.8V,
VDDTRX(TP8)=1.3V, VDDMS(TP2)=1.3V,
VDDXO(TP3)=1.3V, VDDTDC(TP9)=1.3V
Re-download software
Does it work properly?
Replace the main board
YES
YES
YES
YES
YES
NO
NO
NO
NO
NO
NO
CHECKING FLOW
Replace U102 and Re-download software
- 80 -
4. Trouble Shooting

79/158
4.5 Charging Trouble
TEST POINT
CIRCUIT
Figure 4.5.1
4. TROUBLE SHOOTING
CN201
U202
Figure 4.5.2
TP3
TP1
TP3
TP2
TP4
TP4
TP1
TP2
820
R208
0.1u
C216
BQ25040 U202
6 5
7 4
8 3
9 2
10 1
11
PGND
IN BAT
ISET _PG
VSS1 CHG
LDO VSS2
IFULL EN_SET
C247
0.1u
1V8_VDD
C212
1u
5.1K
R211
VBUS_USB
1u
C215
VBAT
100K
R223
CHG_EN
LDO_OUT
_EOC
(10V)
CHARGING IC
TP1
TP2
TP3
TP4
- 81 -
4. Trouble Shooting

80/158
START
Is I/O Connector(CN201)
well-soldered ?
Check the voltage at
Pin 1 of BQ25040(TP1) = 4.8V ?
Is the voltage
at Pin 10 of BQ25040(TP4) = 4.2V
YES
YES
YES
Battery is charged?
YES
Charging is
properly operating
NO
NO
NO
Resolder the CN201
(Pin 1 : VCHARGE)
The TA is out of order
Change the TA
Replace the
U202
Replace the main board
CHECKING FLOW
4. TROUBLE SHOOTING
Battery is charged?
NO
Change the battery
Charging is
properly operating
YES
NO
Is the voltage
at TP3 = 1.8V
Replace the U101
NO
YES
Is the voltage
at Pin 4 of BQ25040(TP2) = 4.8V
YES
Replace the
U202
NO
- 82 -
4. Trouble Shooting

81/158
4. TROUBLE SHOOTING
4.6 Vibrator Trouble
TEST POINT
CIRCUIT
Figure 4.6.1
Main
IC
(U102)
Figure 4.6.2
TP1
TP1 TP2
TP2
4
B
3
1
L
5
1
L
6
1
L
4
A
8
R
8
T
0
1
F
9
E
9
C
9
B
9
D
0
T
U
O
_
P
K
1
T
U
O
_
P
K
2
T
U
O
_
P
K
3
T
U
O
_
P
K
5
T
U
O
_
P
K
B
I
V
B
I
V
_
S
S
V
0
T
U
O
K
L
C
K
2
3
F
K
2
3
C
S
O
N
_
T
E
S
E
R
N
I
2
T
K
2
3
K
L
C
0
T
U
O
_
P
K
1
T
U
O
_
P
K
2
T
U
O
_
P
K
3
T
U
O
_
P
K
5
T
U
O
_
P
K
E
D
I
L
S
P
_
B
I
V
T
E
S
E
R
N
5
T
N
I
E
0
T
N
I
E
4
T
N
I
E
1
T
N
I
E
Main IC
(U102)
L101 18n
DM-YK407-6F2
VB101
2
1
C132
1u
C133
33p
VIB_P
VIBRATOR
TP2 TP1
- 8 -
4. Trouble Shooting

82/158
4. TROUBLE SHOOTING
START
YES
NO
YES
Vibrator
Working well !
Replace the U102
NO
CHECKING FLOW
SETTING : Enter the engineering mode, and set vibrator on at vibration of BB test menu
Check the contacted
of vibrator ?
Replace vibrator
Is the voltage at TP1 high? Is the voltage at TP2 high?
NO
YES
Replace the L101
- 84 -
4. Trouble Shooting

83/158
4. TROUBLE SHOOTING
4.7 LCD Trouble
TEST POINT
Figure 4.7.1
CN101
CN101
CN102
CN301
FL303
CN102
TP6
U302
TP2
TP1
FL305
TP4
TP5
TP3
FL306
- 85 -
4. Trouble Shooting
_]VX\_

4. TROUBLE SHOOTING
CIRCUIT
Figure 4.7.2
CN102
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
R101
100K
R105
100K
150K
R103
1u
C102
1u
C103
VMMC 1V8_VDD
100
R104
DNI
C104
DNI
C105 VA101
R102
100K
1V8_VDD VBAT
1V8_VDD
R106
100K
LCD_ID
F_DATA00
F_DATA01
F_DATA02
F_DATA03
F_DATA04
F_DATA05
F_DATA06
F_DATA07
F_NLCD_CS
F_NLCD_RS
F_NLCD_WR
F_VSYNCOUT
MLED1
MLED2
MLED3
_LCD_RESET
LCD_RD
IM0
IM0
IM1
IM1
ICVE10184E150R101FR FL305
15pF 0
1 5
6 4
7 3
8 2
9 1
INOUT_A1 INOUT_B1
INOUT_A2 INOUT_B2
INOUT_A3 INOUT_B3
INOUT_A4 INOUT_B4
1
G
2
G
15pF
FL303 ICVE10184E150R101FR
0
1
5
6 4
7 3
8 2
9 1
INOUT_A1 INOUT_B1
INOUT_A2 INOUT_B2
INOUT_A3 INOUT_B3
INOUT_A4 INOUT_B4
1
G
2
G
15pF 0
1 5
6 4
7 3
8 2
9 1
INOUT_A1 INOUT_B1
INOUT_A2 INOUT_B2
INOUT_A3 INOUT_B3
INOUT_A4 INOUT_B4
1
G
2
G
LCD_CD
NLCD_MAIN_CS
LCD_DATA00
LCD_DATA01
LCD_DATA02
LCD_DATA03
LCD_DATA04
LCD_DATA05
LCD_DATA06
LCD_DATA07
LCD_VSYNC
NLCD_WR
F_NLCD_RS
F_NLCD_CS
F_DATA01
F_VSYNCOUT
F_DATA00
F_NLCD_WR
F_DATA07
F_DATA06
F_DATA03
F_DATA05
F_DATA02
F_DATA04
2.2u
C308
RT9367C
U301
1
2
20
19
18
8
7
6
5
9
4
10
3 1
1
2
2
1
1
13
4
1
15
16
17
LED3
LED4
NC2
2
O
D
L
AVIN
N
1
C
1
O
D
L
N
2
C
D
N
G
A
D
N
G
P
NC1
P
2
C
ENA
P
1
C
PVIN
SCL
SDA
LED2
LED1
VOUT
G
_
G
U
L
S
FB303
1000
VBAT
2.2u
C314 R309
100K
1u
C323
1u
C324
1u
C325
C327
1u
2.2u
C328
FB305
1000
FB306
1000
CAM_IOVDD CAM_AVDD
I2C_SCL
I2C_SDA
SWIF
MLED1
MLED3
MLED2
TP6
TP3
TP4
TP5
TP2
TP1
- 86 -
4. Trouble Shooting

85/158
4. TROUBLE SHOOTING
Waveform
Graph 4.7.1. LCD Backlight Control Signal Waveform
Graph 4.7.2. LCD Data Waveform
LCD_BACKLIGHT_CTRT(TP2)
LCD_RS(TP4)
LCD_CS(TP5)
LCD_WR(TP3)
- 87 -
4. Trouble Shooting

86/158
4. TROUBLE SHOOTING
START
Is the connection of
CN301 with LCD connector ok ?
YES
NO
Reassemble LCD connector
NO
Check the Voltage Level of
TP1 is about Battery voltage ?
(SWIF signal is high Level)
NO
YES
YES
Check the Waveform of
EMI filter( TP3, TP4, TP5) ?
Resoldering or Replace U302
NO
Resoldering EMI filter.
(FL303,FL304,FL305)
Does LCD work
properly ?
Replace LCD module
LCD working well !
YES
CHECKING FLOW
CN301 with CN101 connector ok ?
YES
NO
Reassemble FPCB with Main connector
NO
YES
Data pins on CN101 ?
Replace Main FPCB
- 88 -
4. Trouble Shooting

87/158
4. TROUBLE SHOOTING
4.8 Camera Trouble
TEST POINT
U302
U301
CN300
TP1
TP3
TP2
TP6
TP5
TP4
TP7
- 89 -
4. Trouble Shooting
`WVX\_

4. TROUBLE SHOOTING
CIRCUIT
BU15TD2WNVX U302
5
3 2
4 1
VOUT VIN
GND STBY
D
N
G
P
SD-105076-001
CN302
6
1
4
1
3
1
7
1
6 1
2
5
1
8
7 5
9 4
10 3
11 2
12 1
18 24
19 23
20 22
5
2
6
2
7
2
8
2
9
2
0
3
1
3
2
3
1
D
N
G
P
2
D
N
G
P
3
D
N
G
P
4
D
N
G
P
5
D
N
G
P
6
D
N
G
P
7
D
N
G
P
8
D
N
G
P
D0 PCLK
D1 VSYNC
D2 HSYNC
D3 STANDBY
D4 SCK
D5 SDA
D6 RESETB
D7 MCLK
1
D
N
G
D
2
D
N
G
D
3
D
N
G
D
1
D
N
G
A
2
D
N
G
A
D
D
V
D
O
I
D
D
V
D
D
V
A
100K
R330
C353
15p
15p
C309
56p
C360
C361
56p 56p
C362
0.1u
C350
C351
0.1u
1u
C352
51 R320
22 R321
CAM_DVDD
C354
1u
VBAT
0.1u
C355
1V8_VDD
100K
R322
CAM_AVDD
CAM_DVDD CAM_IOVDD
DNI
C356
C357
DNI
R324
2.2K
R325
2.2K
CAM_DATA0
CAM_DATA1
CAM_DATA2
CAM_DATA3
CAM_DATA4
CAM_DATA5
CAM_DATA6
CAM_DATA7
CAM_HSYNC
CAM_PCLK
CAM_RESET
CAM_VSYNC
CAM_MCLK
CAM_STANDBY
I2C_SCL
I2C_SDA
CAM_EN
2.2u
C308
RT9367C
U301
1
2
20
19
18
8
7
6
5
9
4
10
3 1
1
2
2
1
1
13
4
1
15
16
17
LED3
LED4
NC2
2
O
D
L
AVIN
N
1
C
1
O
D
L
N
2
C
D
N
G
A
D
N
G
P
NC1
P
2
C
ENA
P
1
C
PVIN
SCL
SDA
LED2
LED1
VOUT
G
_
G
U
L
S
FB303
1000
VBAT
2.2u
C314 R309
100K
1u
C323
1u
C324
1u
C325
C327
1u
2.2u
C328
FB305
1000
FB306
1000
CAM_IOVDD CAM_AVDD
I2C_SCL
I2C_SDA
SWIF
MLED1
MLED3
MLED2
TP10
TP9
TP7
TP5
TP6
TP8 TP8 TP1 TP2 TP3
- 90 -
4. Trouble Shooting
`XVX\_

4. TROUBLE SHOOTING
Waveform
Graph 4.8.1. I2C Data Waveform
Graph 4.8.3.CAM_VSYNC vs.
CAM_HSYNC Waveform
CAM_MCLK
Graph 4.8.2. MCLK Waveform
Graph 4.8.4.CAM_HSYNC vs.
CAM_PCLK Waveform
13MHz
20.8MHz
CAM_VSYNC
CAM_HSYNC
CAM_HSYNC
CAM_PCLK
I2C_DATA
CAM_RESET
CAM_MCLK
- 91 -
4. Trouble Shooting

90/158
CN300 with Camera ok ?
Check the each voltage Level of
TP1(1.8V), TP3(2.8V), TP2(1.5V) is right ?
(SWIF signal is high Level)
I2C_CLK(TP5), I2C_DATA(TP6) ?
Does Camera work
properly ?
Check the 13MHz of
CAM_MCLK(TP7) ?
Data pins on CN300 ?
START
Camera working well !
CHECKING FLOW
4. TROUBLE SHOOTING
NO Reassemble camera connector
with camera.
NO
NO
YES
YES
Resoldering or Replace U301, 302
NO
Resoldering R325, R324
Replace U102 or Change the board
YES
Figure 4.8.5.
YES
YES
NO
Replace U102 or Change the board
YES
NO
Replace Camera Module.
- 92 -
4. Trouble Shooting

`XVX\_
TEST POINT
Figure 4.9.1
2. TROUBLE SHOOTING
CIRCUIT
CN103
TP3 TP4
TP1 U206 TP2
TP5 TP6
TP1
TP2
4.9 Speaker Trouble
U206
2.2uF
C258
2.2uF
C251
2.2uF
C260
2.2uF C256
47p
C261
VBAT
1u
C250
1V8_VDD
LM49150TLX
U206
4
E
4
D
3
D
4
C
2
A
D2 B3
B2
A1
E3
C3
C1
E2 C2
A3 D1
A4 E1
4
B
1
B
A
D
D
V
S
L
D
D
V
MONO_IN+ MONO+
MONO_IN- MONO-
RIN ROUT
LIN
BYPASS
LOUT
I2CVDD
SDA
SCL VO_LDO
D
N
G
P
C
S
S
V
N
I
C
P
I
C
P
C
_
D
N
G
C262
47p
C252 1u
1u C253
C254 220n
220n C255
2.2uF
C259
C257
0.1u
DNI
C263 C264
DNI
EPN
HP_LOUT
HP_ROUT
I2C_SCL
I2C_SDA
RCV_SPK_P
RCV_SPK_N
HSL
HSR
EPP
GND
`ZVX\_

4.9 Speaker Trouble

TEST POINT
Figure 4.9.1
2. TROUBLE SHOOTING
CN103
FB301
FB302
C252
U206
C253
R324
R325
CIRCUIT
TP1
U206
TP2
- 9 -
4. Trouble Shooting
`[VX\_

CIRCUIT
2. TROUBLE SHOOTING
SD-105076-001
CN302
7
9
10
11
12
18
19
20
5
2
6
2
7
2
8
2
9
2
0
3
1
3
2
D
N
G
P
3
D
N
G
P
4
D
N
G
P
5
D
N
G
P
6
D
N
G
P
7
D
N
G
P
8
D
N
G
P
PCLK
VSYNC
HSYNC
STANDBY
SCK
SDA
RESETB
C353
15p
22 R321
1V8_VDD
DNI
C356
R324
2.2K
R325
2.2K
CAM_HSYNC
CAM_PCLK
CAM_RESET
CAM_VSYNC
CAM_STANDBY
I2C_SCL
I2C_SDA
VBAT
120 FB301
FB302 120
CN301
GB042-50S-H10-E3000
32 19
33 18
34 17
35 16
36 15
37 14
38 13
39 12
40 11
41 10
42 9
43 8
44 7
45 6
46 5
47 4
48 3
49 2
50 1
KP_IN1
KP_IN2
KP_IN3
MLED1
MLED3
MLED2
RCV_SPK_P
RCV_SPK_N
ZD102
CN103
2
1
33p
C106
ZD101
33p
C107
33p
C108
RCV_SPK_P
RCV_SPK_N
TP5
TP6
TP4 TP3
CN103
- 94 -
4. Trouble Shooting

93/158
START
<Play any Sound file>
Check the Audio signal
of TP1, TP2. is it ok?
Check the Audiosignal
TP3, TP4. is it ok?
No
Yes
Re-soldering or
Replace TP5, TP6
Re download the board
Or Replace of U102(BaseBand chip)
No
CHECKING FLOW
Check the Audiosignal
CN103. Is it ok?
No
Replace or Change
U206
Yes
2. TROUBLE SHOOTING
Yes
Check the signal of
I2C CLK, DATA. Is it
ok?
No
Yes
Replace or Change the
FPCB
Speaker
Working well!!
The Sound is playing
through the Speaker?
No
Yes
Re-soldering or replace
speaker.
- 95 -
4. Trouble Shooting

94/158
4.10 Earphone Trouble
TEST POINT
CIRCUIT
Figure 4.10.1
2. TROUBLE SHOOTING
CN201
U206
CN201
TP7
U205
TP1 TP2
TP1
TP2
U206
TP3 TP4
TP5 TP6

2.2uF
C258
2.2uF
C251
2.2uF
C260
2.2uF C256
47p
C261
VBAT
1u
C250
1V8_VDD
LM49150TLX
U206
4
E
4
D
3
D
4
C
2
A
D2 B3
B2
A1
E3
C3
C1
E2 C2
A3 D1
A4 E1
4
B
1
B
A
D
D
V
S
L
D
D
V
MONO_IN+ MONO+
MONO_IN- MONO-
RIN ROUT
LIN
BYPASS
LOUT
I2CVDD
SDA
SCL VO_LDO
D
N
G
P
C
S
S
V
N
I
C
P
I
C
P
C
_
D
N
G
C262
47p
C252 1u
1u C253
C254 220n
220n C255
2.2uF
C259
C257
0.1u
DNI
C263 C264
DNI
EPN
HP_LOUT
HP_ROUT
I2C_SCL
I2C_SDA
RCV_SPK_P
RCV_SPK_N
HSL
HSR
EPP
GND
TP1
U206
TP2
- 96 -
4. Trouble Shooting
`^VX\_

4.10 Earphone Trouble

CIRCUIT
2. TROUBLE SHOOTING
C266
DNI
MAX14526DEEWP
U205
B5
C5
2
B
1
C
2
C
C3 A2
C4
D3
D1 D4
A1
B1
A3
B4 B3
A5
A4
D5 D2
BAT VB
DN1
DP2
U1 UID
U2
RES
MIC
AUD1 CAP
AUD2
GND
ISET IC
L
C
S
A
D
S
T
NI
COMN1
COMP2
27p
C205
R265 1
1 R264
C213
10u
TP202
2.2K R219
0.1u
C225
R226
2.2K
C226
39p
VBUS_USB
120p
C228
DNI
C265
C231 2.2u
2.2K
R229
C235
1.5n
C233
27p
C234 22n
DNI
R209
1.5n
C237
22n C236
C238 2.2u
FB203 1000
1.5n
C232
1V8_VDD
VBAT
C244
0.1u
1 R220
1 R233
10 R263
10 R262
MUIC_INT
HP_LOUT
HP_ROUT
I2C_SCL
I2C_SDA
HS_MIC_N
HS_MIC_P
USB_DP
USB_DM
UART_TX
UART_RX MUIC_ID
MUIC_DM
MUIC_DP
(25V)
(10V)
SD-105076-001
CN302
7
9
10
11
12
18
19
20
5
2
6
2
7
2
8
2
9
2
0
3
1
3
2
D
N
G
P
3
D
N
G
P
4
D
N
G
P
5
D
N
G
P
6
D
N
G
P
7
D
N
G
P
8
D
N
G
P
PCLK
VSYNC
HSYNC
STANDBY
SCK
SDA
RESETB
C353
15p
22 R321
1V8_VDD
DNI
C356
R324
2.2K
R325
2.2K
CAM_HSYNC
CAM_PCLK
CAM_RESET
CAM_VSYNC
CAM_STANDBY
I2C_SCL
I2C_SDA
DNI
R261
VBUS_USB
CN201
GU073-5P-SD-E1500
15
13
11
9
7
5
4
3
2
1
14
12
10
8
6
VA207
1n C217
270n
L201
10p
C242
FM_ANT
MUIC_ID
MUIC_DM
MUIC_DP
MUST BE PLACED NEAR IO CONNECTOR
TP7
TP3
TP4
U206
TP5
TP6
CN201
- 97 -
4. Trouble Shooting

96/158
START
YES
YES
Earphone will work properly
Can you hear your
voice from
the earphone?
Set the audio part of the test
Equipment to echo mode
Change the earphone
and try again
NO
Can you hear
the sound from
the earphone?
Set the audio part of the test
equipment to PRBS or
Continuous wave mode
YES
YES
CHECKING FLOW
Can you hear
the sound from
the earphone?
NO
NO
2. TROUBLE SHOOTING
Check the Audio signal of
TP1, TP2. is it ok?
TP3, TP4. is it ok?
No
Yes
Re-soldering or
Replace TP5, TP6
or Replace of U102
(BaseBand chip)
No
Pin 2,3 of CN201. Is it ok?
No
Replace or Change
U206
Yes
Check the signal of I2C
CLK, DATA. Is it ok?
No
Yes
Replace or Change
U205
Yes
YES
Check the DC Voltage of
pin(#4) in CN201 is about
1.2V?
No
Replace or Change
U205
TP7. is it ok?
No
Re-soldering or
Replace TP5, TP6
Check the signal of I2C
CLK, DATA. Is it ok?
No
Yes
- 98 -
4. Trouble Shooting

97/158
4.11 Receiver Trouble
TEST POINT
Figure 4.11.1
2. TROUBLE SHOOTING
CIRCUIT
CN103
TP3 TP4
TP1 U206 TP2
TP5 TP6
TP1
TP2
U206
2.2uF
C258
2.2uF
C251
2.2uF
C260
2.2uF C256
47p
C261
VBAT
1u
C250
1V8_VDD
LM49150TLX
U206
4
E
4
D
3
D
4
C
2
A
D2 B3
B2
A1
E3
C3
C1
E2 C2
A3 D1
A4 E1
4
B
1
B
A
D
D
V
S
L
D
D
V
MONO_IN+ MONO+
MONO_IN- MONO-
RIN ROUT
LIN
BYPASS
LOUT
I2CVDD
SDA
SCL VO_LDO
D
N
G
P
C
S
S
V
N
I
C
P
I
C
P
C
_
D
N
G
C262
47p
C252 1u
1u C253
C254 220n
220n C255
2.2uF
C259
C257
0.1u
DNI
C263 C264
DNI
EPN
HP_LOUT
HP_ROUT
I2C_SCL
I2C_SDA
RCV_SPK_P
RCV_SPK_N
HSL
HSR
EPP
GND
U206
TP1
TP2
- 99 -
4. Trouble Shooting
XWWVX\_

CIRCUIT
2. TROUBLE SHOOTING
SD-105076-001
CN302
7
9
10
11
12
18
19
20
5
2
6
2
7
2
8
2
9
2
0
3
1
3
2
D
N
G
P
3
D
N
G
P
4
D
N
G
P
5
D
N
G
P
6
D
N
G
P
7
D
N
G
P
8
D
N
G
P
PCLK
VSYNC
HSYNC
STANDBY
SCK
SDA
RESETB
C353
15p
22 R321
1V8_VDD
DNI
C356
R324
2.2K
R325
2.2K
CAM_HSYNC
CAM_PCLK
CAM_RESET
CAM_VSYNC
CAM_STANDBY
I2C_SCL
I2C_SDA
VBAT
120 FB301
FB302 120
CN301
GB042-50S-H10-E3000
32 19
33 18
34 17
35 16
36 15
37 14
38 13
39 12
40 11
41 10
42 9
43 8
44 7
45 6
46 5
47 4
48 3
49 2
50 1
KP_IN1
KP_IN2
KP_IN3
MLED1
MLED3
MLED2
RCV_SPK_P
RCV_SPK_N
ZD102
CN103
2
1
33p
C106
ZD101
33p
C107
33p
C108
RCV_SPK_P
RCV_SPK_N
TP5
TP6
TP4 TP3
CN103
- 100 -
4. Trouble Shooting

99/158
START
<Play any Sound file>
of TP1, TP2. is it ok?
Check the Audio
signal TP3, TP4. is it
ok?
No
Yes
Re-soldering or
Replace TP5, TP6
Or Replace of U102(BaseBand chip)
No
CHECKING FLOW
Check the Audio
signal CN103. Is it ok?
No
Replace or Change
U206
Yes
2. TROUBLE SHOOTING
Yes
Check the signal of
I2C CLK, DATA. Is it
ok?
No
Yes
Replace or Change the
FPCB
Speaker
Working well!!
The Sound is playing
through the Speaker?
No
Yes
Re-soldering or replace
speaker.
- 101 -
4. Trouble Shooting
XWYVX\_

4.12 Microphone Trouble

TEST POINT
CIRCUIT
Figure 4.12.1
2. TROUBLE SHOOTING
R237
MIC201
U102
R238
R240
R201
2.2K
R201 C221
DNI
100 R237
MIC201
2
1
100 R238
VMIC
C239
DNI
C223
DNI
C222
10u
C240
DNI
C224
47p
VA206
DNI
C204 33n
R240
1K
33n C203
MIC_N
MIC_P
MICROPHONE
TP3
MIC201
TP4
- 102 -
4. Trouble Shooting

101/158
START
NO
YES
Microphone will work
properly.
SETTING : After initialize Agilent 8960, Test EGSM900, DCS mode ( or GSM850, PCS mode )
YES
Check the signal
Level at each side
of MIC201.
Is it a few tens
mV AC?
Check the soldering of
TP3, TP4
Make a phone call,
then check TP1 mic bias signal
comes from U102?
NO
Change the microphone
YES
NO
Resolder component
CHECKING FLOW
1. Check mic Bias signal line
2. Change the U102
2. TROUBLE SHOOTING
- 10 -
4. Trouble Shooting

102/158
4.13 SIM Card Interface Trouble
TEST POINT
CIRCUIT
Figure 4.13.1
4. TROUBLE SHOOTING
PIN 1 PIN 3
PIN 6 PIN 4
J201 C230
TP1
TP1
ZD202 ZD203
5000-6P-1.8SL
J201
9 8
10 7
6 3
5 2
4 1
C1 C5
C2 C6
C3 C7
GND1 GND4
GND2 GND3
4.7K
R216
2V85_VSIM
2V85_VSIM
0.1u
C227
DNI
C229
22p
C230
DNI
R232
DNI_DIODE_1006
ZD201
22p
C241
SIM_CLK
SIM_DATA
SIM_RST
SIM_CONNECTOR
TP1
- 104 -
4. Trouble Shooting

103/158
START
Does the SIM card
support 3V or 1.8V?
NO
Change the SIM Card.
This phone supports 3V or 1.8V SIM card.
YES
Is Voltage at the pin1 (TP1)
of J201 2.85V or 1.8V?
NO
Change the U102
NO
YES
Re-soldering J201
YES
Voltage output
of VSIM LDO
Is 2.85Vor 1.85V?
Change the SIM Card
And try again.
Does it work
Properly?
YES
SIM card is properly working
Re-download SW.
Does it work
Properly?
NO
Change the main board
NO
YES
SIM card is properly working.
CHECKING FLOW
4. TROUBLE SHOOTING
- 105 -
4. Trouble Shooting

104/158
4. TROUBLE SHOOTING
4.14 KEY backlight Trouble
TEST POINT
Figure 4.14.1
LD202
LD201
R222
C249
LD204
Main - TOP
Main -BOTTOM
LD203
TP1
- 106 -
4. Trouble Shooting

105/158
4. TROUBLE SHOOTING
4.14 KEY backlight Trouble
TEST POINT
Figure 4.14.2
LD101
LD102
R110
R107
R108
Sub -TOP
Sub - BOTTOM
R109
TP2
- 107 -
4. Trouble Shooting

106/158
4. TROUBLE SHOOTING
START
Is TP1. TP2 = high ?
NO
Check Q201, Q101
Are all LEDs
Working?
NO
YES
Check the soldering
each R and LED
Backlight will work properly.
NO
Replace or resolder
component
CHECKING FLOW
YES
CIRCUIT
[Main Key backlight LED interface] [Slide Key backlight LED interface]
Figure 4.14.3
TP1
TP2
0
2
1
7
0
1
R
0
2
1
8
0
1
R
VA104
LD102
VBAT
VA102
DNI
LD101
R109 1.2K
DNI
VA103
R110
100K
Q101
1
2
3
SLIDE_BL_EN
KTC4075E
Q201
1
2
3
LD201 LD204 LD203 LD202
VA201
DNI
VA202
DNI
1.2K R222
VA204
DNI 0
0
3
1
3
2
R
VA205
DNI
5
1
2
R
0
0
3
0.1u
C249
5
2
2
R
0
0
3
VBAT
0
0
3
1
4
2
R
KEY_BL_EN
KEY BACKLIGHT
TP1
TP2
- 108 -
4. Trouble Shooting

107/158
4. TROUBLE SHOOTING
4.15 Micro SD Trouble
TEST POINT
CIRCUIT
Figure 4.15.1
J202
TP1
TP1
TP1
TP2
R247
47K
30
R258
SCHB1A0206 J202
12 10
11 9
5 4
6 3
7 2
8 1
DAT2 DAT1
DAT3 DAT0
CMD VSS
VDD CLK
GND1 GND3
GND2 GND4
47K
R246
47K
R248
47K
R249
47K
R250
47K
R251
VMMC
C245
1u
USD_CLK
USD_CMD
USD_D1 USD_D2
USD_D3 USD_D0
u-SD CARD
TP1
TP1
- 109 -
4. Trouble Shooting

108/158
4. TROUBLE SHOOTING
Micro SD Card will
work properly
Micro SD Detect
OK?
START
Re-attach or
Replace J202
NO
YES
USD_CMD(TP2)
Is High?
NO
YES
Check out MC_CLK & Data
Timing OK?
Re-download SW
NO
YES
YES
Replace Micro SD Card
CHECKING FLOW
Check the
C245 (TP1)=2.8V?
YES
NO
Change U102
- 110 -
4. Trouble Shooting

109/158
4. TROUBLE SHOOTING
4.16 Bluetooth Trouble
TEST POINT
CIRCUIT
Figure 4.16.1
TP1
TP2
TP3
TP4
BT Ant.
Matching Component
TP4
TP3
TP1
TP2
TP301
1p
C311
C306 2.2u
2.2p C320
15K R308
9
5
3
C
I
N
D
I
N
D
8
5
3
C
BCM2070CB0KUFBXG
U303
2
C
2
D
2
F
3
D
6
C
7
A
7
G
5
E
4
E
6
B
B7
E3
E6
B3
E8 B5
D7
D8 G3
C8 G2
F5 A4
F4
G6 C7
F6 A8
F3 E7
C4 F7
B2
B4 D1
G4
2
A
1
C
1
B
1
E
1
F
1
G
1
A
5
A
8
B
8
F
5
G
6
A
8
G
3
A
T
A
B
V
3
O
D
D
V
2
O
D
D
V
1
O
D
D
V
3
C
D
D
V
2
C
D
D
V
1
C
D
D
V
G
E
R
V
X
P
D
D
V
F
R
D
D
V
A
N
L
D
D
V
FI
D
D
V
F
T
D
D
V
V
H
G
E
R
V
RES
RFP RST_N
REG_EN
SCL TM0
SDA TM2
SPIM_CLK PCM_IN
SPIM_CS_N PCM_OUT
PCM_CLK
LPO_IN PCM_SYNC
XIN UART_TXD
XOUT UART_RXD
UART_RTS_N
GPIO_0 UART_CTS_N
GPIO_1
TCXO_OR_OUT_GPIO_5
TCXO_OR_IN_GPIO_6
GPIO_7
NI
_
X
E
O
C
0
T
U
O
_
X
E
O
C
1
T
U
O
_
X
E
O
C
7
S
S
V
6
S
S
V
5
S
S
V
4
S
S
V
3
S
S
V
2
S
S
V
1
S
S
V
2450MHz
FL306
IN OUT
GND1 GND2
C310
DNI
1V8_VDD
1n
C312
2.2u
C313
1V8_VDD VAUX
C315
2.2u
0
R326
10p C316
10n C317
10n C318
10n C319
10p
C321 C322
1u
600 FB304
C326 1n
C336 1n
0
R327
CLK32K
DBB_BT_INT
BT_DBB_INT
BT_CLK
FSYS_EN
PCM_CLK
PCM_RX
PCM_TX
PCM_SYNC
BT_CTS
BT_RTS
BT_RXD
BT_TXD
BT_RESET
BLUETOOTH
TP1
TP2
TP3
TP4
- 111 -
4. Trouble Shooting

111/158
4. TROUBLE SHOOTING
4.17 FM Radio Trouble
TEST POINT
CIRCUIT
U102
U205
CN201
Filter Circuit
- 112 -
4. Trouble Shooting

111/158
4. TROUBLE SHOOTING
4.17 FM Radio Trouble
TEST POINT
CIRCUIT
U102
U205
CN201
Filter Circuit
C266
DNI
MAX14526DEEWP
U205
B5
C5
2
B
1
C
2
C
C3 A2
C4
D3
D1 D4
A1
B1
A3
B4 B3
A5
A4
D5 D2
BAT VB
DN1
DP2
U1 UID
U2
RES
MIC
AUD1 CAP
AUD2
GND
ISET IC
L
C
S
A
D
S
T
NI
COMN1
COMP2
27p
C205
R265 1
1 R264
C213
10u
TP202
2.2K R219
0.1u
C225
R226
2.2K
C226
39p
VBUS_USB
120p
C228
DNI
C265
C231 2.2u
2.2K
R229
C235
1.5n
C233
27p
C234 22n
DNI
R209
1.5n
C237
22n C236
C238 2.2u
FB203 1000
1.5n
C232
1V8_VDD
VBAT
C244
0.1u
1 R220
1 R233
10 R263
10 R262
MUIC_INT
HP_LOUT
HP_ROUT
I2C_SCL
I2C_SDA
HS_MIC_N
HS_MIC_P
USB_DP
USB_DM
UART_TX
UART_RX MUIC_ID
MUIC_DM
MUIC_DP
(25V)
(10V)
R121
DNI
4.7n C120
R15
T15
M11
M10
N11
R11
T11
N12
M0
M1
M2
VDD_FMR
FMRIN
FMRINX
CP1
CP2
C139 33n
R118 DNI
1V8_VDD
R123
DNI
10K
PT101
FM_ANT
LCD_ID
BAT_TEMP
PT101 is DNI defaultly
DNI
R261
VBUS_USB
CN201
GU073-5P-SD-E1500
15
13
11
9
7
5
4
3
2
1
14
12
10
8
6
VA207
1n C217
270n
L201
10p
C242
FM_ANT
MUIC_ID
MUIC_DM
MUIC_DP
- 11 -
4. Trouble Shooting

112/158
4. TROUBLE SHOOTING
A condition is good?
START
Check of ear_jack condition
NO
YES
CHECKING FLOW
Check condition of
Filter Circuit
(L201, C242, C217)
A condition is good?
NO
YES
Give the additory
solder in
L201, C242, C217
Check Trouble Shooting
4.10 Ear mic
Check U102 Circuit
(VDD_FMR)
- 114 -
4. Trouble Shooting

113/158
4. TROUBLE SHOOTING
4.18 Slide on/off Trouble
TEST POINT
CIRCUIT
Figure 4.18.1
Zoom in
U203
TP1
TP2
TP1
TP1
1u
C202
U203
BU52031NVX
5
3 2
4 1
OUT VDD
GND NC
D
N
G
P
VA203
R235 22
1V8_VDD
SLIDE
SLIDE SW
TP1
TP2
- 115 -
4. Trouble Shooting

114/158
4. TROUBLE SHOOTING
Slide on/off will
work properly
Is there the magnet
in the slide?
START
Replace U102
Place the magnet properly.
NO
YES
Voltage at pin 4( TP1)
of U203 = 1.8V?
YES
NO
Voltage of VDD at U102( TP1)
= 1.8V?
NO
check the magnetic
YES
Open slide
Voltage at pin 1 of U203 (TP2)
=1.8V
Re-soldering U203
NO
YES
Close slide.
Voltage at pin 1 of U203( TP1)
= 0V
YES
Replace U203
NO
CHECKING FLOW
- 116 -
5. Download
5. Download
XX^VX\_

5. DOWNLOAD
5.1 S/W Download
Figure 5.1. S/W download & upgrade setup
5. DOWNLOAD
Preparation
Target terminal
Nexus2 or Nexus3 with JIG Cable ( M-USB SW 56Kohm )
PC supporting USB with Windows 2000 or newer.
Phone
JIG Cable:
M-USB SW56Kohm
(ID: 2184933)
PC USB
cable
NEXUS
: Switch On
Nexus 3 Setting method Nexus 2 Setting Method
M18: 3G_SP
VCHAR: 5.0V
USB DOWNLOAD
REMOTE PWR: 0.0V
CABLE:
M-USB SW56Kohm
(ID: 2184933)
9 USB
9 USB
SERIAL
USB
LOW
HIGH
BATT
DC
5.0V / M0 mode
M
-U
S
B
S
W
ID
:
2
1
8
4
9
3
3
56Kohm: USB
130Kohm: UART
1. Cable type 2. Switch
- 117 -
5. Download
XX_VX\_

5. DOWNLOAD
5.2 Download program user guide
1. USB Driver Installation to Downloading INFINEON
a. Run Setup.exe for Installation Infineon usb driver.
b. Click Install button.
c. Click Exit button after installation completion.
GU230 GU230
- 118 -
5. Download
XX`VX\_

5. DOWNLOAD
Eg. In case of Infineon, Flash Loader utility will be installed as shown below.
2. Device Detection
a. Connect cable within the device.
b. Windows will pop-up Found new hardware wizard and detect the new usb device.
c. Check Install the software automatically (Recommended) button, install driver for the
device. (or set specific location.)
d. In case of Infineon, Flash Loader utility will be installed..
e. If you have several usb ports for usb download, you have to repeat
installation from No. a to No. c for each the usb port.
3. USB Port Mapping
a. Setup_USB_PortMapping_04.zip
b. Run USB Map Program and check solution, click mapping start.
c. Connect the usb or nexus cable with the device in order of port number.
d. If you have the disable port, click SKIP button.
e. After mapping is completed, click Save & Exit button.
XX`VX\_

5. DOWNLOAD
Eg. In case of Infineon, Flash Loader utility will be installed as shown below.
2. Device Detection
a. Connect cable within the device.
b. Windows will pop-up Found new hardware wizard and detect the new usb device.
c. Check Install the software automatically (Recommended) button, install driver for the
device. (or set specific location.)
d. In case of Infineon, Flash Loader utility will be installed..
e. If you have several usb ports for usb download, you have to repeat
installation from No. a to No. c for each the usb port.
3. USB Port Mapping
a. Setup_USB_PortMapping_04.zip
b. Run USB Map Program and check solution, click mapping start.
c. Connect the usb or nexus cable with the device in order of port number.
d. If you have the disable port, click SKIP button.
e. After mapping is completed, click Save & Exit button.
- 119 -
5. Download
XYWVX\_

5. DOWNLOAD
Connection in 1
st
port Connection in 2
nd
port Skip 3
rd
port
4. Configuration to Download
a. Run GSMULTI after version 3.0.
b. Select Model DLL file .(GU230.zip-GU230_090917.dll)
c. GU230 is supported usb download, USB button will be appeared.
- 120 -
5. Download
XYXVX\_

5. DOWNLOAD
5. Multi-Download Program Setting (Model-Base)
Setting Completed
- 121 -
5. Download
XYYVX\_

5. DOWNLOAD
Stand-by Condition: Wait phone connecting confirm -> Phone connection
GU230
GU230
- 122 -
6. Block diagram
6. Block diagram
XYZVX\_

6.Block Diagram
6. Block Diagram
- 123 -
7. Circuit diagram
16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
L
K
J
I
H
G
F
E
D
C
B
A
L
K
J
I
H
G
F
E
D
C
B
A
16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
C101
2.2u
1V8_VDD
1V8_VDD
VUSB
1n
C102
1V8_VDD
1V8_VDD
10K
R101
VBAT
75
FB101
R102
0
VCORE
R121
DNI
1V8_VDD
VDDMS
1V8_VDD
L101 18n
1V8_VDD
VUSB
VDDTRX
1V8_VDD
BAT101
C103
18p
1V8_VDD
47n
C114
1u
C147
VDDTDC
100K
R104
C104
220n
C105
0.1u
22u
C136
1V8_VDD
1V8_VDD
VDDRF2
100K
R105
VBUS_USB
47p
C107
VDDTDC
VMMC
470
R106
47p
C108 C109
47p
VCORE
KTC4075E
Q101
1
2
3
1V8_VDD
VRTC
VMMC
1V8_VDD
VRF1
C110
0.1u
VAUX
VAUX
100K
R107
C111
47p
0.1u
C112
1u
C113
VRF1 VDDMS
OJ102
DM-YK407-6F2
VB101
2
1
VMIC
100K
R108
VBAT
1V8_VDD
L102 3.3u
VBAT
100K
R109
VDDXO
C115
2.2u
TP109
C116
1u
VDDTRX
100K
R110
26MHz X101
2 1
3 4
GND2 HOT2
HOT1 GND1
18p
C117
470n
C118
UA101
12
11
10
9
8
7
6
5
4
3
2
1 GND
RX
TX
NC1
ON_SW
VBAT
NC2
NC3
NC4
DSR
RTS
CTS
GND
RX
TX
VCHAR
ON_SW
VBAT
PWR
URXD
UTXD
3G 2.5G
2V85_VSIM
VBAT_RF2
470n
C119
100K
R111
1V8_VDD VPMU
4.7n C120
VBAT
U101
PF38F5060M0Y3DF
C11 D9
E7
D12 G5
D4 F3
E5 E12
D10 D5
E10
D11 H4
E4 G10
E3
G3
G4 D7
F6
F7 H11
G8 E9
G9 E8
F10
F11 C4
F4 E11
F5
G6 E6
G7
F8 F12
F9 D8
G11
G12 D6
K14 H7
K1 C8
H12 C7
H3
C12 D3
C3
A14 H8
A1 NC1
P_CRE NC2
NC3
WAIT_ NC4
NC5
R_LB_ NC6
R_UB_ NC7
R_CS_ NC8
CLK ADQ0
ADQ1
WE_ ADQ2
OE_ ADQ3
ADQ4
AVD_ ADQ5
ADQ6
F1_CE_ ADQ7
F2_CE ADQ8
ADQ9
F_RST_ ADQ10
F_WP_ ADQ11
F_DPD ADQ12
ADQ13
VCC ADQ14
ADQ15
VCCQ1
VCCQ2 A16
VCCQ3 A17
A18
VSS1 A19
VSS2 A20
VSS3 A21
VSS4 A22
A23
VPP A24
47n
C121
C122
470n
47n
C123 C124
47n
VPMU
100K
R112
VBAT
VBAT VDDRF2
0.1u
C125
33uF C106
C126
1u
PMB8810_A-GOLDRADIO_
U102
9 R 5A 5B 8C 8B 8A 8D 4B 3 1L
51L
61L
4A 8R 8T 0 1F
9E 9C 9B 9D 01E
01D
01C
01B
01A
9A 6E 7G 6F 7E 7F 6G 8E 7C 6C 7B 7 A 5C 6B 6A 2 D 1G 1F 4 D 3C 3E 4F 2E 3F 1B 1C 2C 3 D 2F 1D 1E 9L 0 1K
8L
F9 G10
H11
T1 J11
A1 F11
T16 G11
A16 C4
J12
T10 J13
P11 K16
R10 H15
H16
P13 G16
P12 J16
T13 J15
R13 H12
T12
R12 K5
G5
N15 H6
N16 H2
T14 H3
R14 H1
M16
M15 G4
G2
K15 G3
M8
T2
P9 A11
J6 B11
R3 K12
M3 K11
K4 B2
N4 A3
T3 B3
J3 A2
R2 J8
P4 H7
H4 J7
J2 H8
J4
R1 B14
C12
J1 B15
R4 B16
C13
P3 B13
P1 C14
P5 E16
N2 F16
L3 C16
L2 D16
L4 A14
K1 A15
P2
N1 R15
M2 T15
N3 M11
M1 M10
L1 N11
K2 R11
K3 T11
N12
6K 5T 6R 7 M 4T 6M 6L
01 L
51C
51F
01H
31G 9M 7L
21F 8P
21E
41G
61R
21A
21B
11E
31 H
21G
31A
01 J
31F
41F
51P
41 P 8G 8K 9 J 9H 8F 9T
01 P 5R 7 K 9G 8N
61 P
41L 7R 7T 6 T 7 P
1 DS_DDV
BF_1DS
1DS_SSV
WS _ 1DS
SMSSV
PSTABV
U MP _ TABV
1OIDDV
2OIDDV
UBE_ D DV
UMPV
UMP_SSV
1EROC_SSV
2E ROC_SSV
3ER O C _SSV
EROCV
EROCDDV
P C 8V1 D DV
RSLSSV
XRTSSV
XRSSV
18V1DDV
PMARV
G I D_SSV
SMDDV
OXDDV
CDTDDV
DMMDDV
GENDDV
TABV
OCDSSV
XUAV
OXSSV
CMMV
BSUV
2FRDDV
1F RV
OL_SSV
FRSSV
CTRV
NESNES
PESNES
GHCDDV
SC BSC
GHCV
TNHSV M0
M1 A_D0
M2 A_D1
VDD_FMR A_D2
FMRIN A_D3
FMRINX A_D4
CP1 A_D5
CP2 A_D6
A_D7
TX1 A_D8
FE2 A_D9
RX12 A_D10
RX12X A_D11
RX34 A_D12
RX34X A_D13
VDET A_D14
PABS A_D15
PABIAS
FE1 WR_N
TX2 RD_N
PAEN
VDDTRX A_D16
A_D17
USIF2_TXD_MTSR A_D18
USIF2_RXD_MRST A_D19
USIF2_RTS_N A_D20
USIF2_CTS_N A_D21
USIF1_TXD_MTSR A_D22
USIF1_RXD_MRST A_D23
USIF1_RTS_N A_D24
USIF1_CTS_N CS0_N
DPLUS CS1_N
DMINUS ADV_N
XOX WAIT_N
XO ANAMON
BFCLK0
VSIM
SIM_IO FSYS_EN
SIM_CLK
SIM_RST EPN
EPP
MMCI_CMD HSL
MMCI_DAT_0 HSR
MMCI_CLK LSN
MMCI_DAT_1 LSP
MMCI_DAT_2
MMCI_DAT_3 MICN1
MICP1
SWIF_TXRX MICN2
TDO MICP2
TDI VMIC
TMS VUMIC
TCK
TRST_N ACD
TRIG_IN AGND
MON1 VREF
MON2
MON3 NC1
FSYS1 NC2
FSYS2 NC3
DIGUP_CLK NC4
DIGUP1
DIGUP2 VDDFS
NB F DEL
PBFDE L
V R DDE L
0 D_FID
1D _ FID
2D _ FI D
3 D_FID
4D_FID
5D_FI D
6D _F I D
7 D_FID
8 D_F I D
1SC_FID
D C_F I D
RW_F I D
DR_FID
DH_FID
DV_F I D
TESER _ FI D
0D_FIC
1 D_F I C
2D _ FI C
3D_FIC
4D_FIC
5 D_F I C
6D _ FI C
7 D_FIC
K L CP_FIC
C NYS H_F I C
CNYSV _ FI C
2 TU OK LC
DP_FIC
TESER_FIC
0NI_PK
1NI_PK
2NI_PK
3NI_PK
4NI_PK
5NI_PK
0TUO_PK
1TUO_PK
2TUO_PK
3TUO_PK
5TUO_PK BIV
BIV_SSV
0TUOKLC
K2 3 F
K23CSO
N_TESER
NI2T
0KLC_1S2I
XR_1S2I
XT_1S2I
0AW_1S2I
LCS_C2I
ADS_C2I
FFONO
VBAT
100K
R113
1V8_VDD
C127
1u
0.1u
C128
1V8_VDD
C129
0.1u
0 R114
1n
C130
C131
0.1u
C132
1u
C133
33p
VDDXO
C134
0.1u
220n
C135
VBAT_RF2
CN101
9
8
7
6
5
4
3
2
1
VRTC
R115
3.9K
220n
C137
5.6K
R116
100K R117
18p
C138
C139 33n
TP104
TP105
TP106
TP107
32.768KHz
X102
2
1
3
4
OJ103
u1.0
041C
C143
DNI
R118 DNI
IND
911R
1V8_VDD
100K
R120
R123
DNI
47p
C144 C145
47p DNI
C142
10K
PT101
END_KEY
0ATAD_
MAC
1A TAD _
MAC
2A TAD _
MAC
3ATAD_
MAC
4ATAD_
MAC
5A TA D_
MAC
6ATAD_
MAC
7ATAD _
MA C
CNYSH_
MAC
K LCP _
MA C
TESER_
MAC
CNYSV _
MAC
K23KLC
KL C
M _
MAC
DC _D C L
SC_ N IA
M _ DCLN
00ATAD_DCL
1 0A TAD _ DCL
2 0A TAD _DC L
30ATAD_DC L
4 0A TAD_DCL
5 0A TAD _D CL
60ATA D _DC L
70ATA D _DC L
YBDNATS_
MAC
NE _
G HC
TNI _ TB _BB D
C NYSV_ DC L
R
W _DC LN
BT_DBB_INT
MUIC_INT
EPN
VLOGIC
BS2
FM_ANT
BT_CLK
FSYS_EN
I2C_SCL
I2C_SDA
KLC_
MCP
XR_
MCP
XT_
MCP
CNYS_
MCP
1NI_PK
2NI_PK
3NI_PK
4NI_PK
0TU
O_PK
1TU
O_PK
2TU
O_PK
3TU
O_PK
5TU
O_PK
LCD_ID
BAT_TEMP
MIC_N
HS_MIC_N
MIC_P
HS_MIC_P
USD_CLK
USD_CMD
USD_D1
USD_D2
USD_D3
KEY_BL_EN
BS1
TX_EN
RX12
RX12X
RX34
RX34X
SIM_CLK
SIM_DATA
SIM_RST
SWIF
EDILS
GSM_OUT
DCS_PCS_OUT
BT_CTS
BT_RTS
BT_RXD
BT_TXD
TX_RAMP
VIB_P
P_BIV
TDO
TDO
TCK
TCK
TMS
TMS
TDI
TDI
LDO_OUT
USB_DP
USB_DP
USB_DM
USB_DM
PWRON
PWRON
PWRON
PWRON
AD22
AD22
AD21
AD21
AD20
AD20
AD19
AD19
AD18
AD18
AD17
AD17
AD16
AD16
MEM_CLK
MEM_CLK
NWAIT
NWAIT
AD15
AD15
AD14
AD14
AD13
AD13
AD12
AD12
AD11
AD11
AD10
AD10
AD09
AD09
AD08
AD08
AD07
AD07
AD06
AD06
AD05
AD05
AD04
AD04
AD03
AD03
AD02
AD02
AD01
AD01
AD00
AD00
NADV
NADV
NRAM_CS
NRAM_CS
NRD
NRD
NWR
NWR
NRESET
NRESET
TESERN
NROM_CS
NROM_CS UART_TX
UART_TX
UART_TX
UART_RX
UART_RX
UART_RX
NLB
NLB
NUB
NUB
HSL
HSR
DSR
DSR
RSD
EPP
_LCD_RESET NTRST
NTRST
C
OE _
TESER_TB
NE _LB _E D I LS
CAM_EN
USD_D0
CTR_DDV
ABB
RF
RF
5TNIE
INT PORT
0 TNIE
VIBRATOR
VDDP_SIM
BT_DBB_INT
DIF_RESET
EINT4
LIGHT BLUE
RF PADS
(SUPER CAP)
USIF1_CTS_N
(512 NOR / 128 pSRAM : AD MUX type)
PT101 is DNI defaultly
VDDP_DIG1
PIN_H10
PIN COLOR DESCRIPTION
EINT4/EINT1 SIGNAL CHECK
Seperate and shield
Speaker Supply
6TNIE
MEMORY
_CHG_EOC
VDD_IO2
VBATSP
SLIDE T2IN
SIGNAL NAME
DIGUP2
BACKUP BATTERY
ABB
VDDP_DIG1
MUIC_INT CC0CC1IO
ON BOARD ARM9 JTAG & ETM INTERFACE
0TNIE
ABB PADS
VDDP_EBU
CC0CC1IO
PMU PADS RF SUPPLY DOMAIN
VDDP_DIG1
VDDP_MMC
DBB SUPPLIES
4TNIE
VDD1V8CP
EINT2
VDD_IO1
1TNIE
EINT7
CC1CC6IO
EINT0
PIN NAME
PIN_H13 PIN_B14
RF SUPPLIES (DIRTY GND)
ORANGE
PMU SUPPLIES
PIN K8 PIN M9 PIN L7 PIN P8
VDDP_DIG1
VDDP_ULPI
RF SUPPLIES (CLEAN GND)
(NOT MOUNTED)
1TNIE
VDDP_DIG1
uSD_DET
YELLOW
7TN IE
VBAT_PMU
PIN P14 PIN P16
POWER ON
CC1CC6IO
USIF1_RTS_N
PIN P10
PIN R5 PIN G9
1
GID_PDDV
VDDP_DIG2
VDDP_DIG1
EINT3
CN101 : SWDEBUG
6TNIE
PIN_B12 PIN_E11 PIN_G14 PIN_G13
UART PORT
CC0CC7IO
OI 3 CC1CC
ABB SUPPLIES
DBB SUPPLIES
PIN K7
PIN N8
(FOR SWDEBUGGING / NOT MOUNTED)
VDD_EBU
0TNIE
RF
DBB SIGNAL PADS MAGENTA
PMU PADS
LIGHT GREEN
ON BOARD UART/USB INTERFACE
7. Circuit diagram
- 124 - LGE Internal Use Only Copyright 2009 LG Electronics. Inc. All right reserved.
DNI
R261
C266
DNI
2.2K
R201
R247
47K
2.2uF
C258
820
R208
2.2uF
C251
MAX14526DEEWP
U205
B5
C5
2B 1C 2C
C3 A2
C4
D3
D1 D4
A1
B1
A3
B4 B3
A5
A4
D5 D2 BAT VB
DN1
DP2
U1 UID
U2
RES
MIC
AUD1 CAP
AUD2
GND
ISET IC LCS
ADS
TNI
COMN1
COMP2
16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
L
K
J
I
H
G
F
E
D
C
B
A
L
K
J
I
H
G
F
E
D
C
B
A
16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
KTC4075E
Q201
1
2
3 VBUS_USB
2.2uF
C260
0.1u
C216
1u
C202
U203
BU52031NVX
5
3 2
4 1 OUT VDD
GND NC
DNGP
100 R236
2.2uF C256
C221
DNI
BQ25040 U202
6 5
7 4
8 3
9 2
10 1 11 PGND
IN BAT
ISET _PG
VSS1 CHG
LDO VSS2
IFULL EN_SET
100 R237
LD201
CN201
GU073-5P-SD-E1500
15
13
11
9
7
5
4
3
2
1
14
12
10
8
6
LD204 LD203
100 R234
C201
DNI
ZD202
LD202
27p
C205
MIC201
2
1
100 R238
C247
0.1u
VA208
47p
C261
VBAT
1u
C250
ZD203
R265 1
1 R264
1V8_VDD
C212
1u 5.1K
R211
VA207
5000-6P-1.8SL
J201
9 8
10 7
6 3
5 2
4 1 C1 C5
C2 C6
C3 C7
GND1 GND4
GND2 GND3
R210
51K
VMIC
VBUS_USB
C213
10u
1u
C215
C239
DNI
C223
DNI
TP202
1V8_VDD
4.7K
R216
1n C217
LM49150TLX
U206
4E 4D 3 D 4 C 2A
D2 B3
B2
A1
E3
C3
C1
E2 C2
A3 D1
A4 E1
4B 1B
ADDV
S L DDV
MONO_IN+ MONO+
MONO_IN- MONO-
RIN ROUT
LIN
BYPASS
LOUT
I2CVDD
SDA
SCL VO_LDO
DNG
PCSSV
N IC
P I C
PC_ D NG
2.2K R219
VA201
DNI
CN202
HSBC-3PT25-17N
3
2 4
1
R221
100K
1V8_VDD
C218
0.1u
2V85_VSIM
VA202
DNI
1.2K R222
39p
C220
VBAT
100K
R223
VA203
C222
10u
30
R258
VA204
DNI
C240
DNI
C224
47p
0.1u
C225
003
1 3 2R
VA205
DNI
VA206
DNI
R226
2.2K
10 R227
2V85_VSIM
C226
39p
VBUS_USB
0.1u
C227
120p
C228
DNI
C265
DNI
C229
22p
C230
VBAT
C231 2.2u
2.2K
R229
C235
1.5n
C233
27p
C234 22n
DNI
R209
512R
003
1.5n
C237
DNI
R232
22n C236
270n
L201
C238 2.2u
R235 22
FB203 1000
1.5n
C232
C262
47p
1V8_VDD
C204 33n
KB201
0.1u
C249
DNI_DIODE_1006
ZD201
4.7u
C248
R240
1K
5 2 2R
003
C243
4.7u
VBAT
22p
C241
C252 1u
1u C253
C254 220n
220n C255
2.2uF
C259
VBAT
00 3
142R
33n C203
10p
C242
KB202 KB203
C244
0.1u
KB204 KB205
KB206 KB207
KB208
C257
0.1u
KB209
KB210
1V8_VDD
KB211 KB212
1 R220
SCHB1A0206 J202
12 10
11 9
5 4
6 3
7 2
8 1 DAT2 DAT1
DAT3 DAT0
CMD VSS
VDD CLK
GND1 GND3
GND2 GND4
1 R233
47K
R246
DNI
C263
47K
R248 47K
R249
47K
R250
47K
R251
VMMC
C245
1u
C264
DNI
10 R263
10 R262
CHG_EN
MUIC_INT
EPN
FM_ANT
HP_LOUT
HP_LOUT
HP_ROUT
HP_ROUT
I2C_SCL
I2C_SCL
I2C_SDA
I2C_SDA
KP_IN1
KP_IN2
KP_IN3
KP_IN4
KP_OUT0
KP_OUT1
KP_OUT2
BAT_TEMP
MIC_N
HS_MIC_N
MIC_P
HS_MIC_P
USD_CLK
USD_CMD
USD_D1 USD_D2
USD_D3
KEY_BL_EN
SIM_CLK SIM_DATA
SIM_RST
SLIDE
LDO_OUT
USB_DP
USB_DM
UART_TX
UART_RX MUIC_ID
MUIC_ID
MUIC_DM
MUIC_DM
MUIC_DP
MUIC_DP
RCV_SPK_P
RCV_SPK_N
HSL
HSR
EPP
GND
_EOC
USD_D0
MUIC
SLIDE SW
5PIN CONNECTOR
(25V)
AMP_SUBSYSTEM
SHARP NUM 0 STAR
NUM 9 NUM 8 NUM 7
NUM 6 NUM 5
KEY BACKLIGHT
(10V)
NUM 4
NUM 3 NUM 2 NUM 1
u-SD CARD
(10V)
BATTERY CONNECTOR
( USB & EAR MIC & TA &UART )
KEYPAD INTERFACE
CHARGING IC
MICROPHONE
SIM_CONNECTOR
- 125 -
7. Circuit diagram
TP301
BU15TD2WNVX U302
5
3 2
4 1 VOUT VIN
GND STBY DN
GP
SD-105076-001
CN302
6 1 41 31 71 6 1 2 51 8
7 5
9 4
10 3
11 2
12 1
18 24
19 23
20 22
5 2 6 2 72 82 9 2 0 3 13 23
1
D
N
GP
2
D
N
GP
3
D
N
GP
4
D
N
GP
5
D
N
GP
6
D
N
GP
7
D
N
GP
8
D
N
GP
D0 PCLK
D1 VSYNC
D2 HSYNC
D3 STANDBY
D4 SCK
D5 SDA
D6 RESETB
D7 MCLK
1
D
N
G
D
2
D
N
G
D
3
D
N
G
D
1
D
N
GA
2
D
N
G A
D
DV
D
OI
D
DV
D
DVA
10n L304
15pF 01 5
6 4
7 3
8 2
9 1 INOUT_A1 INOUT_B1
INOUT_A2 INOUT_B2
INOUT_A3 INOUT_B3
INOUT_A4 INOUT_B4
1G 2G
10n
L306
3.3p C334
VMMC VBAT
C301
1u
1p
C311
C302
47p 1u
C303 C304
39p
15pF
FL303 ICVE10184E150R101FR
01 5
6 4
7 3
8 2
INOUT_A2 INOUT_B2
INOUT_A3 INOUT_B3
INOUT_A4 INOUT_B4
1G 2G
2.2n
L309
39p
C305
C306 2.2u
C332
4.7u
LR65C
FL307
10 3
5 2
6 4
7
8
9 1 INPUT1 OUTPUT2
OUTPUT1
GND2
INPUT2 GND1
C_GND1 C_GND3
C_GND2 C_GND4
1.8p
C349
2.2p C320
C348
1.8p
CTRV
C307
47p
DDV_8V1
120 FB301
FB302 120
CN301
GB042-50S-H10-E3000
26 25
27 24
28 23
29 22
30 21
31 20
32 19
33 18
34 17
35 16
36 15
37 14
38 13
39 12
40 11
41 10
42 9
43 8
44 7
45 6
46 5
47 4
48 3
49 2
50 1
15pF 01 5
6 4
7 3
8 2
INOUT_A2 INOUT_B2
INOUT_A3 INOUT_B3
INOUT_A4 INOUT_B4
1G 2G
15K R308
953C
IND
100K
R330
C353
15p
2.2u
C308
15p
C309
IND
853C
RT9367C
U301
12
20
19
18
8
7
6
5
9
4
10
3 11
2
21
1
13
41
15
16
17 LED3
LED4
NC2 2ODL
AVIN
N1C
1 O D L
N2C
DNGA
DNGP
NC1
P2C
ENA
P 1 C
PVIN
SCL
SDA
LED2
LED1
VOUT
G_GULS
RF500
SW301
2G
TN A
FR
1G
100p
C365
BCM2070CB0KUFBXG
U303
2C 2D 2F 3D 6C 7A 7G 5E 4E 6B
B7
E3
E6
B3
E8 B5
D7
D8 G3
C8 G2
F5 A4
F4
G6 C7
F6 A8
F3 E7
C4 F7
B2
B4 D1
G4
2A 1C 1B 1E 1F 1G 1A 5A 8B 8F 5 G 6A 8 G 3A
TABV
3ODDV
2ODDV
1ODDV
3CDDV
2CDDV
1CDDV
GERV
XPDDV
FRDDV
ANLDDV
FIDDV
FTDDV
VHGERV
RES
RFP RST_N
REG_EN
SCL TM0
SDA TM2
SPIM_CLK PCM_IN
SPIM_CS_N PCM_OUT
PCM_CLK
LPO_IN PCM_SYNC
XIN UART_TXD
XOUT UART_RXD
UART_RTS_N
GPIO_0 UART_CTS_N
GPIO_1
TCXO_OR_OUT_GPIO_5
TCXO_OR_IN_GPIO_6
GPIO_7
NI_XEOC
0TUO_XEOC
1TUO_XEOC
7SSV
6SSV
5SSV
4SSV
3SSV
2SSV
1SSV
2450MHz
FL306
IN OUT
GND1 GND2
C310
DNI
1V8_VDD 1n
C312
2.2u
C313
FB303
1000
VBAT
1V8_VDD
2.2u
C314 R309
100K
VAUX
C315
2.2u
0
R326
10p C316
16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
L
K
J
I
H
G
F
E
D
C
B
A
L
K
J
I
H
G
F
E
D
C
B
A
16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
ANT301
10n C317
10n C318
10n C319
10p
C321 C322
1u
R312 110
600 FB304
1u
C323
56p
C360
1u
C324 1u
C325
110 R316
R317 110
110 R318
C326 1n
C327
1u
2.2u
C328
C329
1n
3.3n L302 L303 3.3n
FB305
1000
FB306
1000
4.7u
C364
CAM_IOVDD CAM_AVDD
ANT302
33p
C331
1.5n
L301
L312 6.8n
C340 3.3p
12n
L308
C336 1n
0
R327
C361
56p 56p
C362
L307
4.3n
3.9p
C337
1n
C339
SKY77547
U304
34
35
36
16
15
14
13
12
11
10
31
32
33
7 1
9
8 1
8
91
7
02
6
1 2
5
2 2
4
32
3
4 2
2
25
26
27
28
29
30
1
GND1
VBATT
DCS_PCS_IN
GND17
GSM_IN
GND16
GND15
C I
G
O LV
41
D
N
G
P
M A
RV
3 1
D
N
G
NE_XT
2 1
D
N
G
1SB
11
D
N
G
2SB
01
D
N
G
2
D
N
G
9
D
N
G
3
D
N
G
8
D
N
G
4
D
N
G
T
NA
PGND3
PGND2
PGND1
GND5
RX1
RX2
RX3
RX4
GND6
GND7
PGND6
PGND5
PGND4
VBAT
C341
1p
1n
C342
1n
C343
R319 1K
C344
10n
39p
C345
1.2p C338
6.8n L311
3.3n L310
DNI
L305
0.1u
C350 C351
0.1u
1u
C352
51 R320
22 R321
C363
100p
CAM_DVDD
C354
1u
VBAT
0.1u
C355
B9509
FL308
10 3
5 2
6 4
7
8
9 1 INPUT1 OUTPUT2
OUTPUT1
GND2
INPUT2 GND1
C_GND1 C_GND3
C_GND2 C_GND4
1V8_VDD
100K
R322
CAM_AVDD CAM_DVDD CAM_IOVDD
DNI
C356
C357
DNI
R324
2.2K
R325
2.2K END_KEY
CAM_DATA0
CAM_DATA1
CAM_DATA2
CAM_DATA3
CAM_DATA4
CAM_DATA5
CAM_DATA6
CAM_DATA7
CAM_HSYNC
CAM_PCLK
CAM_RESET
CAM_VSYNC
CLK32K
CAM_MCLK
LCD_CD
NLCD_MAIN_CS
LCD_DATA00
LCD_DATA01
LCD_DATA02
LCD_DATA03
LCD_DATA04
LCD_DATA05
LCD_DATA06
LCD_DATA07
CAM_STANDBY
DBB_BT_INT
LCD_VSYNC
NLCD_WR
BT_DBB_INT
VLOGIC
BS2
BT_CLK
FSYS_EN
I2C_SCL
I2C_SCL
I2C_SDA
I2C_SDA
PCM_CLK
PCM_RX
PCM_TX
PCM_SYNC
KP_IN1
KP_IN2
KP_IN3 KP_IN4
KP_OUT3
KP_OUT5
LCD_ID
BS1
TX_EN
RX12
RX12X
RX34
RX34X
SWIF
GSM_OUT
DCS_PCS_OUT
BT_CTS
BT_RTS
BT_RXD
BT_TXD
TX_RAMP
MLED1
MLED1
MLED3
MLED3
MLED2
MLED2
F_NLCD_RS
F_NLCD_RS
F_NLCD_CS
F_NLCD_CS
F_DATA01
F_DATA01
F_VSYNCOUT
F_VSYNCOUT
F_DATA00 F_DATA00
F_NLCD_WR
F_NLCD_WR
F_DATA07
F_DATA07
F_DATA06
F_DATA06
F_DATA03
F_DATA03
F_DATA05
F_DATA05
F_DATA02
F_DATA02
F_DATA04
F_DATA04
RCV_SPK_P
RCV_SPK_N
_LCD_RESET
BT_RESET
SLIDE_BL_EN
CAM_EN
CAMERA INTERFACE
=> B9508
BACKLIGHT CHARGE PUMP
HIGH
GSM850
EGSM
DCS
PCS
B TO B INTERFACE
LOW
X
BS1
HIGH
HIGH
HIGH
HIGH
HIGH
HIGH
LOW
VLOGIC
HB_TX
LB_TX
DCS_RX
PCS_RX
DCS
PCS
GSM850
EGSM
GSM850_RX
EGSM_RX
STANDBY
MODE
RF PART
BLUETOOTH
HIGH
LOW
X
BS2
X
X
LOW
HIGH
LOW
HIGH
HIGH
LOW
X
TX_EN
HIGH
HIGH
LOW
LOW
LOW
LOW
RT9367C
7. Circuit diagram
12 11 10 9 8 7 6 5 4 3 2 1
H
G
F
E
D
C
B
A
H
G
F
E
D
C
B
A
12 11 10 9 8 7 6 5 4 3 2 1
VMMC
ZD102
VBAT
CN101
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
1V8_VDD VRTC
C101
1u
CN102
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
R101
100K
KB101
VRTC
R105
100K
150K
R103
0
2
1
7
0
1
R
1u
C102
1u
C103
VMMC 1V8_VDD
100
R104
DNI
C104
DNI
C105 VA101
R102
100K
1V8_VDD VBAT
KB102 KB103
470
R111
KB104 KB105
KB106
C110
1u
KB107
KB108 KB109
1V8_VDD
CN103
2
1
33p
C106
C109
DNI
ZD101
33p
C107
33p
C108
0
2
1
8
0
1
R
VA104
R112
470
DNI
C111
R113
470
C112
DNI
470
R114
DNI
C113
R115
470
C114
DNI
470
R116
C115
DNI
R117
470
DNI
C116
LD102
R106
100K
VBAT
VA102
DNI
LD101
R109 1.2K
DNI
VA103
R110
100K
Q101
1
2
3
RCV_SPK_P
RCV_SPK_P
RCV_SPK_N
RCV_SPK_N
KP_IN1
KP_IN1
KP_IN2
KP_IN2
KP_IN4
KP_IN4
KP_OUT3
KP_OUT3
KP_OUT5
KP_OUT5
SLIDE_BL_EN
SLIDE_BL_EN
LCD_ID
LCD_ID
F_DATA00
F_DATA00 F_DATA01
F_DATA01
F_DATA02
F_DATA02
F_DATA03
F_DATA03
F_DATA04
F_DATA04
F_DATA05
F_DATA05
F_DATA06
F_DATA06
F_DATA07
F_DATA07
F_NLCD_CS
F_NLCD_CS
F_NLCD_RS
F_NLCD_RS
F_NLCD_WR
F_NLCD_WR
F_VSYNCOUT
F_VSYNCOUT
MLED1
MLED1
MLED2
MLED2
MLED3
MLED3
_LCD_RESET
_LCD_RESET
LCD_RD
IM0
IM0
IM1
IM1
END_KEY
END_KEY
KP_IN3
KP_IN3
(10V)
- 127 -
7. Circuit diagram
12 11 10 9 8 7 6 5 4 3 2 1
H
G
F
E
D
C
B
A
H
G
F
E
D
C
B
A
12 11 10 9 8 7 6 5 4 3 2 1
VBAT
VMMC 1V8_VDD VRTC
FPCB_EDGE_CONN49P_6293
ECN1
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
CN101
26 25
27 24
28 23
29 22
30 21
31 20
32 19
33 18
34 17
35 16
36 15
37 14
38 13
39 12
40 11
41 10
42 9
43 8
44 7
45 6
46 5
47 4
48 3
49 2
50 1
VBAT VRTC 1V8_VDD VMMC
RCV_SPK_P
RCV_SPK_P
RCV_SPK_N
RCV_SPK_N
KP_IN1
KP_IN1
KP_IN2
KP_IN2
KP_IN3
KP_IN3
LCD_ID
LCD_ID
F_NLCD_RS
F_NLCD_RS
F_NLCD_WR
F_NLCD_WR
F_VSYNCOUT
F_VSYNCOUT
MLED1
MLED1
MLED2
MLED2
MLED3
MLED3
_LCD_RESET
_LCD_RESET
KP_IN4
KP_IN4
KP_OUT3
KP_OUT3
KP_OUT5
KP_OUT5
SLIDE_BL_EN
SLIDE_BL_EN
END_KEY
END_KEY
F_DATA00
F_DATA00
F_DATA01
F_DATA01
F_DATA02
F_DATA02
F_DATA03
F_DATA03
F_DATA04
F_DATA04
F_DATA05
F_DATA05
F_DATA06
F_DATA06
F_DATA07
F_DATA07
F_NLCD_CS
F_NLCD_CS
- 129 -
8. BGA Pin Map
8. BGA Pin Map
XY`VX\_

8 BGA PIN MAP (Top View)

8.1 BGA IC pin check (U102)
Ball Diagram (Top View), PMB8810(A-GOLDRADIO+)
: not in use
8. BGA PIN MAP
- 10 -
8. BGA Pin Map
XZWVX\_


Ball Diagram (Top View), PF38F5060M0Y3DF
: not in use
8. BGA PIN MAP
XZWVX\_


Ball Diagram (Top View), PF38F5060M0Y3DF
: not in use
8. BGA PIN MAP
w v { T W U X X W X ^ W Y W m w z u p h t W Z Y | n
E D C B
4
1 1 2 B K
7 0 2 B K
4 0 2 B K
3 0 2 B K
2 1 2 B K
1 0 2 B K
5 0 2 B K
KB209
U
203
6 2 1 C 5 3 2 R
2 0 2 C 3 0 2 A V
8 0 2 B K
6 0 2 B K
0 1 2 B K
KB202
4 0 2 D L
5 2 2 R 4 0 2 A V
3 0 2 D L
5 1 2 R 1 0 2 A V
1 4 2 R 5 0 2 A V
1 3 2 R
1 0 2 D L
2 0 2 A V
C
N
101
- 131 -
9. PCB Layout
U203 Slide SW
- No detect the slide ON/OFF
LD200 & LD201
- No Key Backlight
{ v i T W U X X W X ^ W Y W m w z u p h t W Z Y | n
14
1
G
5 4
F E D C B A
D
E
B A 1
C
4
A B C D E
1
K J H
F
0 5
E
D
C
B
A 1
R
J
K
L
M
P
N
G
H
T
6 2
5 2
6 1
8
C
D
E
F
G
A
B
1
9 2 2 C
C
224
0 3 2 C
2 0 2 D Z
3 0 2 D Z
R
232
1 4 2 C
1 0 2 D Z
7 2 2 C
R
114
6 1 1 C
R
201
U
205
TP104
C
135
4 3 1 C
5 6 2 C
C
266
3 3 2 C
4 6 2 R
R
220 9 2 2 R
2 3 2 C
8 3 2 C
2 0 2 P T
6 3 2 C
7 0 2 A V
C
253
C
144
2 2 2 R
6 1 1 R Q
101
0 4 2 R
1 0 3 N C
9 0 1 P T
C
301
C
360
8 0 2 R
C
314
FB305
BAT101
U
302
2 0 2 J
8 5 2 R
9 4 2 R
R
248
2 1 3 L
1 1 3 L
0 4 3 C
4 3 3 C
7 3 1 C
2 0 1 X
1 0 3 P T
C
343
3 3 1 C
2 3 1 C
C
318
7 2 3 R C
321
7 1 3 C
6 0 3 C
R
316
C
N
201
C
129
R
216
R
120
R
104
C
114
R
107
0 4 2 C
R
111
9 3 2 C
6 0 2 A V
C
217
R
113
R
109 2 1 1 R
R
117
C
223
C
225
R
233
FB203
Q
201
C
249
1 0 1 U
8 3 2 R
6 0 1 R
4 0 2 C
3 0 2 C 7 3 2 R
2 2 2 C
C
221
U
2
0
6
TP106
TP105
C
128
5 3 2 C
4 4 2 C
3 6 2 R
2 6 2 R
7 3 2 C
C
226
5 6 2 R
1 3 2 C
5 0 2 C
C
228
4 3 2 C
9 1 2 R
3 6 2 C
C
251
1 6 2 R
C
256
4 6 2 C
1 0 2 L
2 4 2 C
C
250
C
254
7 5 2 C
C
255
J201
R
115
8 0 1 R
C
113
2 0 1 R
1 0 2 C I M
C
309
R
322
TP107
C
305
C
304
FB301
FB302
C
357
6 2 2 R
C
213
R
320
9 0 2 R
1 6 2 C
C
258
C
259
2 6 2 C
R
324
R
325
C
260 C
252
C
145
C
201
R234
R236
VA208
1 3 1 C
6 0 1 C
6 3 1 C
2 0 1 L C
105
C
121
C
303
C
307
C
N
302
C
355
C
350
5 1 2 C
C
361
C
123
X101
C
124
2 0 1 U
4 0 1 C
C
101
1 2 1 R
2 1 1 C
0 1 1 C
8 1 1 C
C
107
1 0 1 T P
0 2 1 C
R
123
C
122
C
247
R
211
R
223
C
216
5 1 1 C
C
302
3 0 3 L F
C
354
2 1 2 C
2 6 3 C
C
351
2 0 2 U
7 4 2 R
R
250
6 4 2 R
R
251
C
245
2 0 3 L
C
138
C
127
L307
L305
1 4 3 C
R
118
2 4 1 C
R
119
9 0 1 C C
130
3 4 1 C
C
140
5 2 1 C
1 1 1 C
9 3 1 C
C
102
8 0 1 C
C
365
2 0 3 T N A
8 5 3 C
L301
R
101
5 0 3 L F
4 0 3 L F
R
309
C
356
R
321
C
353
0 1 2 R
0 3 3 R
2 5 3 C
2 0 2 N C
5 1 3 C
C
359
8 0 3 R
C
336
C
319
C
312
3 0 3 L
L308
L306
FL308
FL307
9 1 1 C 1 0 1 B F
R
110
R
105
C
103
C
117
1 0 3 T N A
U
301
3 0 3 U
C
329
U
304
C
324
C
323
C
325
3 0 3 B F
C
327
C
328
FB306
C
308
C
147
1 2 2 R 7 2 2 R
6 2 3 C 6 1 3 C
R
326
C
313
R
312
3 6 3 C 7 3 3 C
L304 C
338
C
339
C
342
C
345
C
3
6
4
9 4 3 C
SW
301
1 0 1 B V
L101
8 4 2 C
8 1 2 C
3 4 2 C
0 2 2 C
6 0 3 L F
C
320
1 1 3 C
C
310
C
322
FB304
R
319
R
317
R
318
C
344
L310
8 4 3 C
9 0 3 L
C
332
C
331
CN301(Main FPCB Connector)
- No LCD Display
- No Speaker & Receiver
9. PCB Layout
U301
No LCD Backlight
BAT100(Backup Battery)
No service
U202
No Charging
U303
The Bluetooth working bad
U304(Tx Module)
- Cant make a call
- Tx Low power
- Not good BER
- No Service
SW301(mobile switch)
- Cant make a call
- Tx Low power
- Not good BER
- No Service
U101(Memory)
No booting
U102 (Main BB)
-No operating almost all
functions
U206
The Audio working bad
CN300(Camera connector)
No Camera
U205
No Earphone
-No Download
9. PCB Layout
w v { W U X T X W Y Z ] W W l w z l r W Z Y | n
3 0 1 B K
2 0 1 B K
5 0 1 B K
8 0 1 B K
1 0 1 D L
K
B
1
0
1
K
B
1
0
7
K
B
1
0
6
9 0 1 B K
2 0 1 D L
K
B
1
0
4
D
p
a
n
n
a
g
e
D
p
a
n
n
a
g
e
LD101 & LD102
- No multi key Backlight
9. PCB Layout
{ v i W U X X W Y Z ] W W l w z l r W Z Y | n
3 0 1 N C
2 0 1 D Z
0 1 1 C
1 0 1 R
4 0 1 C
5 0 1 R
4 0 1 R
6 0 1 R
2 0 1 N C
3 1 1 C
4 1 1 R
R
108
VA102
2 1 1 C 3 1 1 R
R
117
R
115
R
111
6 0 1 C
7 0 1 C 8 0 1 C
1 0 1 D Z
5 1 1 C 6 1 1 R
1 1 1 C 2 1 1 R
C
109
C
114
C
116
5 0 1 C
1 0 1 A V
1 0 1 N C
1 0 1 C
R
102
R
103
3 0 1 C 2 0 1 C
Q
1
0
1
0 1 1 R
VA104
9 0 1 R
VA103
R
107
CN102
- No LCD Display
CN101
- No LCD Display
- No Speaker & Receiver
- No key function
Q101
- No Key Backlight
9. PCB Layout
w v { W U X T X W ^ Z ` X W j w z k j s m W Z Y | n
0 5 6 2
5 2
1 N C E
1 0 1 N C
- 17 -
10. Engineering Mode
10. Engineering Mode
X[_VX\_
10. ENGINEERING MODE
11. ENGINEERING MODE
Engineering mode is designed to allow a service man/engineer to view and test the basic functions provided
by a handset. The key sequence for switching the engineering mode on is 1809#*230# Select. Pressing END
will switch back to non-engineering mode operation. Use Up and Down key to select a menu and press select
key to progress the test. Pressing back key will switch back to the original test menu.
[1] BB TEST
[6-1] All Auto Test
[1-1] Battery Info
[1-1-1] BattInfo
[1-2] Bluetooth Test
[1-2-1] Enter Test Mode
[1-2-2] OnOff Test
[1-2-3] Headset Test
[1-2-4] BT Test1
[1-2-5] BT Test2
[1-2-6] Xhtml Compose Print
[1-2-7] Xhtml Print Test
[3-3] Layer1 Info
[4] Call Timer
[3] Eng Mode
[6] MF TEST
[5] Factory Reset
[2] Model Version
[3-1] Cell environ.
[3-2-1] Mobility
[3-2-2] RadioRes
[3-2-1] Gprs
[6-2-1] BacklightOn
[6-2-2] BacklightOff
[6-3-1] Audio Test
[2-1] Version
[3-2] PS Layer Info
[3-4] Reset Information
[3-5] Memory Configurarion
[3-6] MemGenConf
[3-7] MemAllUse
[3-8] MemDetUse
[3-9] MemDump
[3-10] Change Frequency Band
[6-2] Backlight
[6-3] Audio
[6-4-1] VibratorOn
[6-4-2] VibratorOff
[6-4] Vibrator
[6-5-1] Auto LCD
[6-5] LCD
[6-6] Key pad
[6-7] Mic Speaker
[6-8] Camera
[6-8-1] Camera Main Preview
[6-8-2] FlashOn
[6-8-3] FlashOff
[6-8-4] CameraFlashBunning
[6-9-1] FM Radio Test
[6-9] FM Radio
[6-10] Touchpad Test
[7] Network selection
[7-1] Automatic
[7-2] GSM850
[7-3] EGSM
[7-4] DCS
[7-5] PCS
- 18 -
11. Stand Alone Test
X[`VX\_
11. STAND ALONE TEST
11.1 Introduction
This manual explains how to examine the status of RX and TX of the model.
A. Tx Test
TX test - this is to see if the transmitter of the phones is activating normally.
B. Rx Test
RX test - this is to see if the receiver of the phones is activating normally.
11.2 Setting Method
1. Set COM Port
2. Check PC Bau Rate
3. Confirm EEPROM & Delta file prefix name
4. Click Update Info for communicating Phone and Test-Program
- 19 -
X\WVX\_
Not Connected
Connected
4. Click Update Info for communicating Phone and Test-Program
- 140 -
X\XVX\_
Change ptest mood

5. For the purpose of the Standalone Test, Change the Phone to ptest mode and then Click
the Reset bar.
6. Select Non signaling in the Quick Bar menu. Then Standalone Test setup is finished.
- 141 -
X\YVX\_
1. Non signaling mode bar and then confirm OK text in the command line.
2. Put the number of TX Channel in the ARFCN
3. Select Tx in the RF mode menu and PCL in the PA Level menu.
4. Finally, Click Write All bar and try the efficiency test of Phone.
11.3 Tx Test
- 142 -
!53i!58
11.4 Rx Test

1. Put the number of RX Channel in the ARFCN.
2. Select Rx in the RF mode menu.
3. Finally, Click Write All bar and try the efficiency test of Phone.
4. The Phone must be changed normal mode after finishing Test.
5. Change the Phone to normal mode and then Click the Reset bar.
Chanqe normal mode

- 14 -
12. Auto Calibration
X\\VX\_
12.1 Overview
Auto-cal (Auto Calibration) is the PC side Calibration tool that perform Tx, Rx and Battery
Calibration with Agilent 8960(GSM call setting instrument) and Tektronix PS2521G(Programmable
Power supply).
Auto-cal generates calibration data by communicating with phone and measuring equipment then
write it into calibration data block of flash memory in GSM phone.
12. AUTO CALIBRATION
CM_GSM_MULTI
Common
Debug
dll,ocx
Hot_Kimchi
Model
UI
Multi_HK
LG_UI_Ad6500_004.dll
KF300d
Spec_GU230_001
dwdio.dll
LG_RfCal_InfiKE000Ag_177.dll
LG_RfTest_E5515C_122.dll
xmm2130_eep008.cfg
AutoSetup_GU230_001
Ezlooks
Procedure_GU230_001
PwrSupply_Cmd
script_001
Setup_Cal_Parameter_001
PwrSupply_Cmd
DLL_PwrControlD.dll
Dll_SerialATD.dll
LG_CL_039.dll
At_Serial_Cmd
ComLMPLib_1_11.dll
HK_40
ShieldBox_DllD.dll
GuiTk115d.dll
Dll_EzLooksMQ_016.dll
ComLMPLib_2_11.dll
Debug
Result
Auto
CalAuto
Cal
DLL_E5515CD.DLL
(Windows 98)MFCD DLL COPY
vsflex7l_ocx_regist
(Windows XP)MFCD DLL COPY
12.2 Configuration of HotKimchi
X\\VX\_
12.1 Overview
Auto-cal (Auto Calibration) is the PC side Calibration tool that perform Tx, Rx and Battery
Calibration with Agilent 8960(GSM call setting instrument) and Tektronix PS2521G(Programmable
Power supply).
Auto-cal generates calibration data by communicating with phone and measuring equipment then
write it into calibration data block of flash memory in GSM phone.
CM_GSM_MULTI
Common
Debug
dll,ocx
Hot_Kimchi
Model
UI
Multi_HK
LG_UI_Ad6500_004.dll
KF300d
Spec_GU230_001
dwdio.dll
LG_RfCal_InfiKE000Ag_177.dll
LG_RfTest_E5515C_122.dll
xmm2130_eep008.cfg
AutoSetup_GU230_001
Ezlooks
Procedure_GU230_001
PwrSupply_Cmd
script_001
Setup_Cal_Parameter_001
PwrSupply_Cmd
DLL_PwrControlD.dll
Dll_SerialATD.dll
LG_CL_039.dll
At_Serial_Cmd
ComLMPLib_1_11.dll
HK_40
ShieldBox_DllD.dll
GuiTk115d.dll
Dll_EzLooksMQ_016.dll
ComLMPLib_2_11.dll
Debug
Result
Auto
CalAuto
Cal
DLL_E5515CD.DLL
vsflex7l_ocx_regist
(Windows XP)MFCD DLL COPY
12.2 Configuration of HotKimchi
- 144 -
X\]VX\_
12.3 Description of Basic File.
1. Common
-. LG_CL_039.dll : Common logic dll, Module In Charge of Reading PID & S/W Version, Booting.
-. Dll_SerialATD.dll : Serial Communication Module From Phone by AT Command.
-. DLL_PwrControlD.dll : Communication Module From Power supply.
-. DLL_E5515CD.DLL : Communication Module From Agilent 8960(Test Set).
-. At_Serial_Cmd.xml : Definition File of AT Command.
-. PwrSupply_Cmd.xml : Definition File of Power supply command.
2. Debug
-. Debug - Cal : Result File of Calibration.
Auto : Result File of Auto Test.
CalAuto : Result File of Cal & Auto Test.
3. dll, ocx
-. vsflex7l_ocx_regist : Registration File for System use
-. Windows XXX)MFCD DLL : Registration File for System use
4. HotKimchi
-. HK_40.exe : Execute File, HK_XX XX is File Version.
-. ComLMPLib_1_11.dll : Communication Module With PLC or Shield Box In Automation Rack.
Support to J&S Shield Box and Tescom TC-5981A.
-. ComLMPLib_2_11.dll : Communication Module With PLC or Shield Box In Automation Rack.
Support to J&S Shield Box and Tescom TC-5981A.
-. Dll_EzLooksMQ_005.dll : Communication Module with ezTray Installed In Local PC.
-. GuiTk115d.dll : control library
-. ShieldBox_DllD.dll : Communication with Shield Box. Support to Tescom TC-5952B.
5. Model
-. LG_RfCal_InfiKE000Ag_177.dll : Main Module of Calibration
-. LG_RfTest_E5515C_122.dll : Main Module of Auto Test
-. Xmm2130_eep008.cfg : Cal Data Save binary Module.
-. AutoSetup_GU230_100.xml : RF TEST Setup Module.
-. Ezlooks.xml : Calibration ezLooks Item & Cal Spec Definition Module.
-. Procedure_GU230_001.xml : RF TEST Procedure Definition Module.
-. Script_001.xml : RF TEST Setup calibration Setup Module.
-. Spec_GU230_001.xml : Definition Module of Auto Test Spec
-. Setup_Cal_Parameter_001.xml : Calibration Definition Module.
6. UI
-. LG_UI_Ad6500_002.dll : ADI Model UI Dll.
- 145 -
X\^VX\_
1. Connect as Fig 6-2(RS232 serial cable is connected between COM port of PC and MON port of
TEST JIG, in general)
2. Set the Power Supply 4.0V
3. Set the 3
rd
, 4
th
of DIP SW ON state always
4. Press the Phone power key, if the Remote ON is used, 1
st
ON state
1. Copy the file to C:\Cm_Gsm_Multi
2. Copy the files of((Windows XXX)MFCD DLL, vsflex7l_ocx_regist to C:\Cm_Gsm_Multi\dll,ocx
3. Select MFCD DLL of your computer OS
4. Click on vsflex7l_ocx_regist
5. Click on Multi_HK reg
6. Connect as Fig 11-2 (RS232 serial cable is connected between COM port of PC, in general.
7 . Run HK_40exe to start calibration.
8 Click Logic Operation of SETTING menu bar
12.4 Procedure
7. Multi_HK
-. Registration File For System Setting.
- 146 -
X\_VX\_
9. Set PORT (using RS232 cable) that PC can communicate with the phone
10. Select LOGIC MODE that you want
Logic mode: 1-> Calibration only
2-> Auto test only
3-> Cal & Auto
- 147 -
X\`VX\_
11. Select the model name GU230
12. Click start button
Model name Start button
- 148 -
X]WVX\_
12.5 AGC
This procedure is for Rx calibration.
In this procedure, We can get RSSI correction value. Set band EGSM and press Start button the
result window will show correction values per every power level and gain code and the same
measure is performed per every frequency.
12.6 APC
This procedure is for Tx calibration.
In this procedure you can get proper scale factor value and measured power level.
12.7 ADC
This procedure is for battery calibration.
You can get main Battery Config Table and temperature Config Table will be reset.
12.8 Target Power
29.5 dBm 29.5 dBm 29.5 dBm Max power
1909.8 MHz 1880 MHz 1850.2 MHz Frequency
810 661 512 Channel
PCS 1900
1784.8 MHz 1747.6 MHz 1710.2 MHz Frequency
885 699 512 Channel
DCS1800
124 37 975 Channel
EGSM 900
251 191 128 Channel
GSM 850
High Middle Low Description BAND
X]WVX\_
12.5 AGC
This procedure is for Rx calibration.
In this procedure, We can get RSSI correction value. Set band EGSM and press Start button the
result window will show correction values per every power level and gain code and the same
measure is performed per every frequency.
12.6 APC
This procedure is for Tx calibration.
In this procedure you can get proper scale factor value and measured power level.
12.7 ADC
This procedure is for battery calibration.
You can get main Battery Config Table and temperature Config Table will be reset.
12.8 Target Power
1909.8 MHz 1880 MHz 1850.2 MHz Frequency
810 661 512 Channel
PCS 1900
885 699 512 Channel
DCS1800
124 37 975 Channel
EGSM 900
251 191 128 Channel
GSM 850
High Middle Low Description BAND
- 149 -
13. Exploded view & Replacement part list
13.1 Exploded view
ASSY Exploded view
- 151 -
by SBOM standard on GCSC
Level
Location
No.
Description Part Number Spec Color Remark
2 AAAY00 ADDITION AAAY0428106
MATALLIC
BLACK
3 MCDF CARD,WARRANTY MCDF0011301 PRINTING, (empty), , , , ,
WITHOUT
COLOR
3 MCJA00 COVER,BATTERY MCJA0094601 MOLD, PC LUPOY SC-1004A, , , , ,
GRAY
SILVER
L, 38
3 MLAA00 LABEL,APPROVAL MLAA0062401 COMPLEX, (empty), , , , ,
WITHOUT
COLOR
3 MMBB00 MANUAL,OPERATION MMBB0356503 PRINTING, (empty), , , , ,
WITHOUT
COLOR
2 APAY00 PACKAGE APAY0137402 GU230 CIS(EU1/1200ea/CIS UB/CIS UB Label_China)
WITHOUT
COLOR
3 APLY00 PALLET ASSY APLY0003901 EU1 TYPE_Body(SW)+Cap(EU)+AL_1200EA
WITHOUT
COLOR
4 MPCY00 PALLET MPCY0012403 COMPLEX, (empty), , , , , DARK BLUE
3 MBAD00 BAG,VINYL(PE) MBAD0005204 COMPLEX, (empty), , , , ,
WITHOUT
COLOR
3 MLAC00 LABEL,BARCODE MLAC0004539 PRINTING, (empty), , , , ,
Without
Color
3 MLAZ01 LABEL MLAZ0050901 PRINTING, (empty), , , , ,
WITHOUT
COLOR
2 APEY00 PHONE APEY0883006
MATALLIC
BLACK
3 ACGM COVER ASSY,REAR ACGM0138901
MATALLIC
BLACK
K
4 MCJN00 COVER,REAR MCJN0107001 MOLD, PC LUPOY SC-1004A, , , , ,
GRAY
SILVER
33
4 MLAB LABEL,A/S MLAB0001102 C2000 USASV DIA 4.0 WHITE
4 MPBT00 PAD,CAMERA MPBT0080601 COMPLEX, (empty), , , , ,
WITHOUT
COLOR
32
4 MPBU00 PAD,CONNECTOR MPBU0077201 COMPLEX, (empty), , , , ,
WITHOUT
COLOR
31
4 MPBZ00 PAD MPBZ0256001 COMPLEX, (empty), , , , ,
WITHOUT
COLOR
4 MTAK00 TAPE,CAMERA MTAK0028201 COMPLEX, (empty), , , , ,
WITHOUT
COLOR
34
4 MWAE00 WINDOW,CAMERA MWAE0050501 CUTTING, Tempered Glass, 0.8, , , , SILVER 35
3 ACGQ COVER ASSY,SLIDE ACGQ0048301
MATALLIC
BLACK
12.3 Replacement Parts Note: This Chapter is used for reference, Part order is ordered
<Mechanic component>
- 152 -
Level
Location
No.
4 ABGF00 BUTTON ASSY,MAIN ABGF0021801 Rusia Keypad_Drawing No:ABGF0018301
MATALLIC
BLACK
H, 25
4 ABGG00 BUTTON ASSY,SUB ABGG0011801
GRAY
SILVER
C, 9
4 ACGK00 COVER ASSY,FRONT ACGK0141201 BLACK I
5 MCJK00 COVER,FRONT MCJK0111301 COMPLEX, (empty), , , , ,
GRAY
SILVER
20
5 MDAG00 CAP,EARPHONE JACK MCCC0067501 MOLD, Urethane Rubber S190A, , , , ,
WITHOUT
COLOR
23
5 MFBD00 FILTER,MIKE MFBD0040301 COMPLEX, (empty), , , , ,
GRAY
SILVER
22
5 MTAA01 TAPE,DECO MTAA0200401 COMPLEX, (empty), , , , ,
GRAY
SILVER
21
4 ACGR00
COVER
ASSY,SLIDE(LOWER)
ACGR0020201 BLACK F
5 MCJH00 COVER,FOLDER(LOWER) MCJH0048701 MOLD, PC LUPOY SC-1004A, , , , , BLACK 17
5 MDAF00 DECO,FOLDER(LOWER) MDAF0011601 MOLD, POM LUCEL N109-LD, , , , , BLACK 18
5 MMAA MAGNET,SWITCH MMAA0009501 COMPLEX, (empty), , , , , Black
5 MPBN00 PAD,SPEAKER MPBN0076501 COMPLEX, (empty), , , , ,
WITHOUT
COLOR
16
4 ACGS00
COVER
ASSY,SLIDE(UPPER)
ACGS0030201 BLACK D
5 MBFF00 BRACKET,LCD MBFF0028201 CUTTING, STS, 0.3, , , ,
WITHOUT
COLOR
5
5 MCJJ00 COVER,FOLDER(UPPER) MCJJ0058701 MOLD, PC LUPOY SC-1004A, , , , , BLACK 1
5 MDAN00 DECO,SPEAKER MDAN0018101 COMPLEX, (empty), , , , ,
WITHOUT
COLOR
6
5 MFBC00 FILTER,SPEAKER MFBC0053601 COMPLEX, (empty), , , , ,
WITHOUT
COLOR
8
5 MPBG00 PAD,LCD MPBG0097101 COMPLEX, (empty), , , , ,
WITHOUT
COLOR
7
5 MTAD00 TAPE,WINDOW MTAD0112101 COMPLEX, (empty), , , , ,
WITHOUT
COLOR
4
4 ARDY00 RAIL ASSY,SLIDE ARDY0014101 BLACK G, 19
4 GMEY00 SCREW MACHINE,BIND GMEY0011201 1.4 mm,3 mm,MSWR3(BK) ,N ,+ ,NYLOK
WITHOUT
COLOR
24
4 GMEY01 SCREW MACHINE,BIND GMEY0019501
1.4 mm,1.6 mm,SWCH18A ,N ,+ ,NYLOK ,; ,BH ,+ ,3.5
,0.5 ,SWCH ,WHITE ,N ,[empty]
SILVER
4 GMZZ00 SCREW MACHINE GMZZ0019003
3.5 mm,1.5 mm,MSWR3 ,N ,+ ,- ,NYLOK Coating (ZnB-
BLACK)
Black 15
4 MGAZ00 GASKET MGAZ0077901 COMPLEX, (empty), , , , ,
WITHOUT
COLOR
- 15 -
Level
Location
No.
4 MIDZ INSULATOR MIDZ0242801 COMPLEX, (empty), , , , ,
WITHOUT
COLOR
4 MIDZ00 INSULATOR MIDZ0220801 COMPLEX, (empty), , , , ,
WITHOUT
COLOR
4 MTAB00 TAPE,PROTECTION MTAB0328601 COMPLEX, (empty), , , , ,
WITHOUT
COLOR
A, 2, 36
4 MWAC00 WINDOW,LCD MWAC0125101 CUTTING, PMMA MR 200, 0.64, , , ,
WITHOUT
COLOR
B, 3
6 ADCA00 DOME ASSY,METAL ADCA0102001
WITHOUT
COLOR
10, 26
6 MTAZ00 TAPE MTAZ0256301 COMPLEX, (empty), , , , ,
WITHOUT
COLOR
3 GMEY SCREW MACHINE,BIND GMEY0011201 1.4 mm,3 mm,MSWR3(BK) ,N ,+ ,NYLOK
WITHOUT
COLOR
3 MLAA00 LABEL,APPROVAL MLAA0062305 COMPLEX, (empty), , , , ,
WITHOUT
COLOR
5 ACKA00 CAN ASSY,SHIELD ACKA0021701
WITHOUT
COLOR
6 MCBA00 CAN,SHIELD MCBA0055001 PRESS, STS, 0.2, , , ,
WITHOUT
COLOR
28
6 MPBZ00 PAD MPBZ0247101 COMPLEX, (empty), , , , ,
WITHOUT
COLOR
5 ADCA00 DOME ASSY,METAL ADCA0106901
WITHOUT
COLOR
5 MLAZ00 LABEL MLAZ0038301 PID Label 4 Array
WITHOUT
COLOR
- 154 -
Level
Location
No.
1 GSM(SLIDE) TGLL0025624
MATALLIC
BLACK
4 SJMY00 VIBRATOR,MOTOR SJMY0007905
3 V,0.08 A,5.8*5.1*9 ,cylinder motor ,; ,3V , , ,11000 , , ,
,29
29
4 SNGF00 ANTENNA,GSM,FIXED SNGF0051201
3.0 ,-5.0 dBd,, ,internal, GSM850/900/1800/1900 ,;
,QUAD ,-5.0 ,50 ,3.0
4 SACY00 PCB ASSY,FLEXIBLE SACY0098401
5 SACE00 PCB ASSY,FLEXIBLE,SMT SACE0096101
6 SACC
PCB ASSY,FLEXIBLE,SMT
BOTTOM
SACC0065001
6 SACD
PCB ASSY,FLEXIBLE,SMT
TOP
SACD0077501
7 CN101
CONNECTOR,BOARD TO
BOARD
ENBY0040401 50 PIN,0.4 mm,ETC , ,H=1.0, Plug
6 SPCY PCB,FLEXIBLE SPCY0193701 POLYI ,0.1 mm,DOUBLE , ,; , , , , , , , , ,
4 SAEY00 PCB ASSY,KEYPAD SAEY0068701
5 SAEB00
PCB
ASSY,KEYPAD,INSERT
SAEB0030401
6 SUSY00 SPEAKER SUSY0028901
ASSY ,8 ohm,90 dB,1812 mm,3.0T 10mm ,; , , , , , ,
,[empty]
5 SAEE00 PCB ASSY,KEYPAD,SMT SAEE0035201
6 SAEC00
PCB ASSY,KEYPAD,SMT
BOTTOM
SAEC0034101
7 C101 CAP,CHIP,MAKER ECZH0001215 1 uF,10V ,K ,X5R ,TC ,1005 ,R/TP
7 C102 CAP,CERAMIC,CHIP ECCH0004904 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP
7 C106 CAP,CHIP,MAKER ECZH0000830 33 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP
7 CN101 CONNECTOR,FFC/FPC ENQY0014601
49 PIN,0.3 mm,ANGLE , , ,; , ,0.30MM ,FFC/FPC
,ANGLE ,BOTH ,SMD ,[empty] ,LOCKING ,
7 CN102 CONNECTOR,FFC/FPC ENQY0014901
35 ,0.3 mm,ETC , , ,; , ,0.30MM ,FPC ,STRAIGHT ,BOTH
,SMD ,R/TP ,[empty] ,
7 Q101 TR,BJT,NPN EQBN0007601 SOT-23 ,0.15 W,R/TP ,EMT3
13.2 Replacement Parts Note: This Chapter is used for reference, Part order is ordered
<Main component>
- 155 -
Level
Location
No.
7 R101 RES,CHIP,MAKER ERHZ0000406 100 Kohm,1/16W ,J ,1005 ,R/TP
7 R104 RES,CHIP ERHY0003301 100 ohm,1/16W ,J ,1005 ,R/TP
7 R107 RES,CHIP,MAKER ERHZ0000411 120 ohm,1/16W ,J ,1005 ,R/TP
7 VA101 VARISTOR SEVY0004001 18 V, ,SMD ,3pF, 1005
7 VA104 VARISTOR SEVY0003901
5.5 V, ,SMD ,Vdc 5.5, Vb 8, Cp 420, 1.0*0.5*0.6 , ,5.5 ,
,480 ,1.0*0.5*0.6 ,[empty] ,SMD ,R/TP
7 ZD101 DIODE,TVS EDTY0008610 SOD-523 ,5 V,250 W,R/TP ,PB-FREE
7 ZD102 DIODE,TVS EDTY0008610 SOD-523 ,5 V,250 W,R/TP ,PB-FREE
6 SAED00
PCB ASSY,KEYPAD,SMT
TOP
SAED0033701
7 LD101 DIODE,LED,CHIP EDLH0015109
White ,1608 ,R/TP ,0.2t ,; ,[empty] ,2.7~3.1V ,25mA
,112~285mcd , ,95mW ,[empty] ,[empty] ,2P
6 SPEY00 PCB,KEYPAD SPEY0063201 FR-4 ,0.5 mm,DOUBLE , ,; , , , , , , , , ,
4 SVLM00 LCD MODULE SVLM0036101
Main ,2.2" ,176*220 ,39.848*52.95*1.9t ,262K ,TFT ,TM
,LG4525B , ,
3 SAFY00 PCB ASSY,MAIN SAFY0360204
4 SAFB00 PCB ASSY,MAIN,INSERT SAFB0104201
5 BRAH00 RESIN,PC BRAH0001301 ; , , , ,[empty] Black
- 156 -
Level
Location
No.
5 SUMY00 MICROPHONE SUMY0003815
FPCB ,-44 dB,4*1.0 ,TDMA Noise improvement ,; , ,
,[empty] ,[empty] , ,FPC
5 SVCY00 CAMERA SVCY0022901 CMOS ,MEGA ,1.3M FF [Socket, Siliconfile 1/5"]
4 SAFF00 PCB ASSY,MAIN,SMT SAFF0251304
5 SAFC00
PCB ASSY,MAIN,SMT
BOTTOM
SAFC0133201
6 BAT101 MODULE,ETC SMZY0018401
3.3V, Cap(0.07F), Size(Coin, 4.8 x 1.4), Pb-Free ,;
,Module Assembly
6 C101 CAP,CERAMIC,CHIP ECCH0005603 2.2 uF,10V ,K ,X5R ,TC ,1608 ,R/TP
6 C102 CAP,CERAMIC,CHIP ECCH0000143 1 nF,50V,K,X7R,HD,1005,R/TP
6 C103 CAP,CERAMIC,CHIP ECCH0000113 18 pF,50V,J,NP0,TC,1005,R/TP
6 C104 CAP,CHIP,MAKER ECZH0001216 220 nF,10V ,K ,X5R ,TC ,1005 ,R/TP
6 C105 CAP,CHIP,MAKER ECZH0003103 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP
6 C106 CAP,TANTAL,CHIP ECTH0005203
33 uF,10V ,M ,STD ,2012 ,R/TP ,; , ,[empty] ,[empty] ,
,[empty] , ,[empty] ,[empty] ,[empty] ,[empty]
6 C114 CAP,CERAMIC,CHIP ECCH0002002 47000 pF,10V ,K ,B ,HD ,1005 ,R/TP
6 C118 CAP,CHIP,MAKER ECZH0001217 470 nF,6.3V ,K ,X5R ,TC ,1005 ,R/TP
6 C119 CAP,CHIP,MAKER ECZH0001210 470 nF,10V ,Z ,Y5V ,HD ,1005 ,R/TP
6 C120 CAP,CERAMIC,CHIP ECCH0000151 4.7 nF,25V,K,X7R,HD,1005,R/TP
6 C122 CAP,CHIP,MAKER ECZH0001217 470 nF,6.3V ,K ,X5R ,TC ,1005 ,R/TP
- 157 -
Level
Location
No.
6 C136 CAP,TANTAL,CHIP ECTH0001903 22 uF,6.3V ,M ,L_ESR ,1608 ,R/TP
6 C213 CAP,CERAMIC,CHIP ECCH0005604
10000000 pF,6.3V ,M ,X5R ,TC ,1608 ,R/TP , , ,[empty]
,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,0.8 mm
6 C215 CAP,CHIP,MAKER ECZH0003503 1 uF,25V ,K ,X5R ,HD ,1608 ,R/TP
6 C222 CAP,CERAMIC,CHIP ECCH0005604
10000000 pF,6.3V ,M ,X5R ,TC ,1608 ,R/TP , , ,[empty]
,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,0.8 mm
6 C225 CAP,CHIP,MAKER ECZH0003504 100 nF,25V ,K ,X7R ,HD ,1608 ,R/TP
- 158 -
Level
Location
No.
6 C231 CAP,CERAMIC,CHIP ECCH0000198 2.2 uF,6.3V ,M ,X5R ,TC ,1005 ,R/TP
6 C234 CAP,CERAMIC,CHIP ECCH0000179 22 nF,16V ,K ,X5R ,HD ,1005 ,R/TP
6 C236 CAP,CERAMIC,CHIP ECCH0000179 22 nF,16V ,K ,X5R ,HD ,1005 ,R/TP
6 C242 CAP,CERAMIC,CHIP ECCH0000110 10 pF,50V,D,NP0,TC,1005,R/TP
6 C243 CAP,CERAMIC,CHIP ECCH0007802 4.7 uF,10V ,M ,X5R ,TC ,1608 ,R/TP
6 C256 CAP,CHIP,MAKER ECZH0001421 2.2 uF,6.3V ,K ,X5R ,HD ,1608 ,R/TP
- 159 -
Level
Location
No.
6 C311 CAP,CHIP,MAKER ECZH0000802 1 pF,50V ,C ,NP0 ,TC ,1005 ,R/TP
6 C320 CAP,CERAMIC,CHIP ECCH0000901 2.2 pF,50V ,C ,NP0 ,TC ,1005 ,R/TP
- 160 -
Level
Location
No.
6 C341 CAP,CHIP,MAKER ECZH0000802 1 pF,50V ,C ,NP0 ,TC ,1005 ,R/TP
6 CN201 CONNECTOR,I/O ENRY0008801
5 , mm,ANGLE , , ,; , ,0.64MM ,ANGLE ,[empty] ,DIP
,[empty] ,
6 CN202 CONNECTOR,ETC ENZY0020402 3 ,2.5 mm,BOTTOM , ,
6 CN301
CONNECTOR,BOARD TO
BOARD
ENBY0040501 50 PIN,0.4 mm,ETC , ,H=1.0, Socket
6 CN302 CONN,SOCKET ENSY0023701 24 ,ETC , ,0.7 mm,7x7x3.95t, (1.3M Socket)
6 FB101 FILTER,BEAD,CHIP SFBH0007103 75 ohm,1005 ,CHIP BEAD, 300mA
6 FB203 FILTER,BEAD,CHIP SFBH0000912 1000 ohm,1005 ,
6 FB301 FILTER,BEAD,CHIP SFBH0007101 120 ohm,1005 ,Ferrite Bead
6 FB302 FILTER,BEAD,CHIP SFBH0007101 120 ohm,1005 ,Ferrite Bead
- 161 -
Level
Location
No.
6 FL303 FILTER,EMI/POWER SFEY0010501
SMD ,SMD ,18 V,4ch. EMI_ESD Filter (100Ohm,15pF),
Pb-free
Pb-free
Pb-free
6 FL306 FILTER,CERAMIC SFCY0000901
2450 MHz,2.00*1.25*0.95 ,SMD ,Bluetooth Band Pass
Filter
6 FL307 FILTER,SAW,DUAL SFSB0002302
1842.5 MHz,75 MHz,3.5 dB,10 dB,1960 MHz,60 MHz,3.5
dB,10 dB,1.8*1.4*0.68 ,SMD
,1805M~1880M,1930M~1990M,10p,B,100,DCS+PCS
Rx,LH,DIP_OUT ,; ,1842.5+1960 ,1.8*1.4*0.68 ,SMD
,R/TP
6 FL308 FILTER,SAW,DUAL SFSB0002301
881.5 MHz,25 MHz,2.6 dB,30 dB,942.5 MHz,35 MHz,30
dB,15 dB,1.8*1.4*0.68 ,SMD
,869M~894M,925M~960M,10p,B,150,LH,GSM850+EGS
M Rx,DIP_OUT ,; ,881.5+942.5 ,1.8*1.4*0.68 ,SMD ,R/TP
6 J201 CONN,SOCKET ENSY0018701 6 PIN,ETC , ,2.54 mm,H=1.8
6 J202 CONN,SOCKET ENSY0021401 8 PIN,ETC , , mm,
6 L101 INDUCTOR,CHIP ELCH0001402 18 nH,J ,1005 ,R/TP ,Pb Free
6 L102 INDUCTOR,SMD,POWER ELCP0008003 3.3 uH,M ,2.5*2.0*1.0 ,R/TP ,Chip power
6 L201 INDUCTOR,CHIP ELCH0001556 270 nH,J ,1608 ,R/TP ,
6 L301 INDUCTOR,CHIP ELCH0001033 1.5 nH,S ,1005 ,R/TP ,PBFREE
6 L302 INDUCTOR,CHIP ELCH0003826 3.3 nH,S ,1005 ,R/TP ,chip
6 L304 INDUCTOR,CHIP ELCH0001409 10 nH,J ,1005 ,R/TP ,PBFREE
6 L306 INDUCTOR,CHIP ELCH0001409 10 nH,J ,1005 ,R/TP ,PBFREE
6 L307 INDUCTOR,CHIP ELCH0004733 4.3 nH,S ,1005 ,R/TP ,Coil
6 L308 INDUCTOR,CHIP ELCH0003819 12 nH,J ,1005 ,R/TP ,
6 L309 INDUCTOR,CHIP ELCH0005001 2.2 nH,S ,1005 ,R/TP ,
6 L311 INDUCTOR,CHIP ELCH0001408 6.8 nH,J ,1005 ,R/TP ,Pb Free
6 L312 INDUCTOR,CHIP ELCH0001408 6.8 nH,J ,1005 ,R/TP ,Pb Free
- 162 -
Level
Location
No.
6 R108 RES,CHIP,MAKER ERHZ0000204 100 Kohm,1/16W ,F ,1005 ,R/TP
6 R211 RES,CHIP,MAKER ERHZ0000530 5.1 Kohm,1/16W ,J ,1005 ,R/TP
6 R227 RES,CHIP,MAKER ERHZ0000206 10 ohm,1/16W ,F ,1005 ,R/TP
- 16 -
Level
Location
No.
6 R320 RES,CHIP ERHY0000105 51 ohm,1/16W,F,1005,R/TP
6 SW301 CONN,RF SWITCH ENWY0004501 ,SMD , dB,H=3.6, Straight type
6 U101 IC EUSY0368502
BGA ,56 ,R/TP ,512M NOR + 128M pSRAM 1.8V
AD_AAD MUX, 8 by 8 ,56 ,R/TP , ,; ,IC,MCP
6 U102 IC EUSY0366601
BGA ,210 ,R/TP ,EDGE RF, BB, PM, FM RDS Onechip
BB, 216pin, 0.5mm pitch ,; ,IC,Digital Baseband
Processor
- 164 -
Level
Location
No.
6 U202 IC EUSY0388501
DFN ,10 ,R/TP ,Cal Test Mode Single Charger IC for Micro
USB ,; ,IC,Charger
6 U205 IC EUSY0405401 CSP ,20 ,R/TP ,MUIC ,; ,IC,Analog Multiplexer
6 U206 IC EUSY0365301
Micro SMD ,20 ,R/TP ,Class D, Bypass ,; ,IC,Audio Sub
System
6 U301 IC EUSY0344402 QFN ,20 ,R/TP ,4CH,2LDO,3X3 ,; ,IC,Sub PMIC
6 U302 IC EUSY0405501
SSON004 ,4 ,R/TP ,150mA 1.5V Single LDO ,; ,IC,LDO
Voltage Regulator
6 U303 IC EUSY0382201 FPBGA ,50 ,R/TP ,4.5x4.0x0.6, BT2.1 ,; ,IC,Bluetooth
6 U304 RF MODULE,HANDSET SMRH0005601 MHz, MHz,GSM Quad Tx Module 6x8 ,
6 VA207 VARISTOR SEVY0004001 18 V, ,SMD ,3pF, 1005
6 VA208 VARISTOR SEVY0004101 5.6 V, ,SMD ,360pF, 1005
6 X101 X-TAL EXXY0018404
26 MHz,10 PPM,8 pF,40 ohm,SMD ,3.2*2.5*0.6 ,12ppm
at -30'C ~ +85'C, C0 1.0pF, C1 3.6fF ,; ,26 ,10PPM ,8 , ,
,SMD ,R/TP
6 X102 X-TAL EXXY0004602
.032768 MHz,20 PPM,12.5 pF,65000 ohm,SMD
,6.9*1.4*1.3 ,
5 SAFD00 PCB ASSY,MAIN,SMT TOP SAFD0130501
6 SPFY PCB,MAIN SPFY0207101 FR-4 ,0.8 mm,BUILD-UP 6 , ,; , , , , , , , , ,
6 U203 IC EUSY0362601 SSON004 ,4 ,R/TP ,Hall IC ,; ,IC,CMOS
6 VA203 VARISTOR SEVY0004101 5.6 V, ,SMD ,360pF, 1005
- 165 -
Level
Location
No.
3 SBPL00 BATTERY PACK,LI-ION SBPL0090901
3.7 V,900 mAh,1 CELL,PRISMATIC ,U510 BATT, Europe
label, Pb-Free ,; ,3.7 ,900mAh ,0.2C ,PRISMATIC
,50x34x46 , ,BLACK ,Innerpack ,Europe Label
BLACK
3 SGEY00
EAR PHONE/EAR MIKE
SET
SGEY0003218
; ,. ,. ,. ,. ,. ,[empty] ,BLACK ,5P MICRO USB
CONNECTOR ,5P ,Earphone,Stereo
3 SSAD00 ADAPTOR,AC-DC SSAD0034901
100-240V ,5060 Hz,4.8 V,0.4 A,GOST ,AC-DC
ADAPTOR ,; ,90Vac~264Vac ,4.8Vdc ,400mA ,5060 ,CB
,WALL 2P ,USB ,
ADAPTOR,AC-DC SSAD0034902
100-240V ,5060 Hz,4.8 V,.4 A,GOST ,AC-DC ADAPTOR
,; ,150Vac~350Vac ,4.8Vdc ,400mA ,5060 ,CB ,WALL 2P
,USB ,
13.3 Accessory Note: This Chapter is used for reference, Part order is ordered

LG GU230 Dimsun Service Manual

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LG GU230 Dimsun Service Manual

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S

E. Notice of Radiated Emissions

Wireless Application Protocol WAP

Item Description Specification

3.2 Power Management

3.2 Power Management

3.2 Power Management

3.3.1 Internal Block Diagram

3.3.2 General Description

Figure 3.3.2 Band SW Logic Table

3.4 Crystal(26 MHz, X101)

3.5 RF Subsystem of PMB8810 (U102)

3.5 RF Subsystem of PMB8810 (U102)

3.5 RF Subsystem of PMB8810 (U102)

3.5.2 FUNCTIONAL DESCRIPTION

Figure. 3.5.3 TRANSMITTER CHAIN BLOCK DIAGRAM

Figure. 3.5.4 PA AND FEM CONTROL BLOCK DIAGRAM

Figure. 3.5.5 POWER SUPPLY BLOCK DIAGRAM

3.6 MEMORY(PF38F5060M0Y0BE, U101 )

3.7.1 Transmitter path

3.8 SIM Card Interface

3.9 LCD Interface

LED Backlight Current Sinks

3.10 Battery Charger Interface

3.11 Keypad Interface

Figure 3.11.3 Block Diagram and System Integration of the KPD

3.12 Audio Front-End

Figure 3.12.4 Different Application Scenarios

3.13 Camera Interface(1.3M Fixed Focus Camera)

3.13 Camera Interface(1.3M Fixed Focus Camera)

Functional Overview of CIF

3.14 KEY BACLKLIGHT LED Interface

3.15 Vibrator Interface

3.16 Slide SW Interface

(1) Checking Crystal Circuit

(2) Checking Mobile SW &FEM

(1) Checking Crystal Circuit

4.9 Speaker Trouble

4.10 Earphone Trouble

4.12 Microphone Trouble

8 BGA PIN MAP (Top View)

8.2 BGA IC pin check (U101)

8.2 BGA IC pin check (U101)

Change ptest mood

Chanqe normal mode

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